[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: make stolen more region centric

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: make stolen more region centric
URL   : https://patchwork.freedesktop.org/series/71615/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7674_full -> Patchwork_15991_full


Summary
---

  **SUCCESS**

  No regressions found.

  

New tests
-

  New tests have been introduced between CI_DRM_7674_full and 
Patchwork_15991_full:

### New Piglit tests (7) ###

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-byte_ivec4-position-double_dmat4:
- Statuses : 1 fail(s)
- Exec time: [0.17] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-double_dmat3x4-float_mat3x2_array3-position:
- Statuses : 1 fail(s)
- Exec time: [0.17] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-double_dvec4_array5-position-float_vec2:
- Statuses : 1 fail(s)
- Exec time: [0.14] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-float_float-double_dmat3_array2:
- Statuses : 1 fail(s)
- Exec time: [0.16] s

  * spec@glsl-4.20@execution@vs_in@vs-input-double_dmat3x4-int_ivec3-position:
- Statuses : 1 fail(s)
- Exec time: [0.14] s

  * spec@glsl-4.20@execution@vs_in@vs-input-double_dvec3-int_ivec2-position:
- Statuses : 1 fail(s)
- Exec time: [0.15] s

  * 
spec@glsl-4.20@execution@vs_in@vs-input-float_mat4-double_dvec4_array2-position:
- Statuses : 1 fail(s)
- Exec time: [0.14] s

  

Known issues


  Here are the changes found in Patchwork_15991_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_persistence@vcs1-mixed-process:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#109276] / [fdo#112080]) 
+1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-iclb1/igt@gem_ctx_persiste...@vcs1-mixed-process.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/shard-iclb5/igt@gem_ctx_persiste...@vcs1-mixed-process.html

  * igt@gem_ctx_shared@q-smoketest-all:
- shard-tglb: [PASS][3] -> [INCOMPLETE][4] ([fdo#111735])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-tglb7/igt@gem_ctx_sha...@q-smoketest-all.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/shard-tglb3/igt@gem_ctx_sha...@q-smoketest-all.html

  * igt@gem_ctx_shared@q-smoketest-bsd:
- shard-tglb: [PASS][5] -> [INCOMPLETE][6] ([i915#461])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-tglb7/igt@gem_ctx_sha...@q-smoketest-bsd.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/shard-tglb3/igt@gem_ctx_sha...@q-smoketest-bsd.html

  * igt@gem_eio@kms:
- shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([i915#476])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-tglb8/igt@gem_...@kms.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/shard-tglb2/igt@gem_...@kms.html

  * igt@gem_exec_schedule@fifo-bsd1:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +6 similar 
issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-iclb1/igt@gem_exec_sched...@fifo-bsd1.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/shard-iclb8/igt@gem_exec_sched...@fifo-bsd1.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +6 similar 
issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-iclb7/igt@gem_exec_sched...@preempt-other-chain-bsd.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/shard-iclb1/igt@gem_exec_sched...@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd2:
- shard-tglb: [PASS][13] -> [INCOMPLETE][14] ([fdo#111606] / 
[fdo#111677])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-tglb5/igt@gem_exec_sched...@preempt-queue-bsd2.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/shard-tglb9/igt@gem_exec_sched...@preempt-queue-bsd2.html

  * igt@gem_linear_blits@interruptible:
- shard-kbl:  [PASS][15] -> [DMESG-WARN][16] ([i915#667])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-kbl2/igt@gem_linear_bl...@interruptible.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/shard-kbl3/igt@gem_linear_bl...@interruptible.html

  * 
igt@gem_persistent_relocs@forked-interruptible-faulting-reloc-thrash-inactive:
- shard-iclb: [PASS][17] -> [TIMEOUT][18] ([i915#530])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-iclb5/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrash-inactive.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/shard-iclb5/igt@gem_persistent_rel...@forked-interruptible-faulting-reloc-thrash-inactive.html

  * 

[Intel-gfx] ✗ Fi.CI.IGT: failure for Fixes coccicheck warnings

[Patchwork]

== Series Details ==

Series: Fixes coccicheck warnings
URL   : https://patchwork.freedesktop.org/series/71610/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7674_full -> Patchwork_15990_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_15990_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_15990_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_15990_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_big_fb@linear-8bpp-rotate-180:
- shard-tglb: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/shard-tglb9/igt@kms_big...@linear-8bpp-rotate-180.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/shard-tglb9/igt@kms_big...@linear-8bpp-rotate-180.html

  
New tests
-

  New tests have been introduced between CI_DRM_7674_full and 
Patchwork_15990_full:

### New Piglit tests (37) ###

  * spec@!opengl 2.0@vertex-program-two-side enabled back front2:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * spec@!opengl 2.0@vertex-program-two-side enabled back front2 back2:
- Statuses : 1 fail(s)
- Exec time: [0.14] s

  * 
spec@amd_shader_trinary_minmax@execution@built-in-functions@fs-max3-int-int-int:
- Statuses : 1 fail(s)
- Exec time: [0.10] s

  * 
spec@amd_shader_trinary_minmax@execution@built-in-functions@fs-min3-int-int-int:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * spec@arb_fragment_program@fp-fragment-position:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * 
spec@arb_gpu_shader5@execution@built-in-functions@fs-texturegatheroffset-uniform-array-offset:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * spec@arb_gpu_shader5@execution@sampler_array_indexing@vs-weird-uniforms:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * spec@arb_texture_barrier@arb_texture_barrier-blending-in-shader 32 1 1 128 
4:
- Statuses : 1 fail(s)
- Exec time: [0.11] s

  * spec@arb_texture_multisample@texelfetch@6-gs-usampler2dms:
- Statuses : 1 fail(s)
- Exec time: [0.08] s

  * spec@arb_texture_query_lod@execution@fs-texturequerylod-nearest-biased:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * spec@arb_texture_rg@fbo-rg-gl_rg16:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-double_dmat2-int_ivec2_array3-position:
- Statuses : 1 fail(s)
- Exec time: [5.79] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-double_dmat4x2-position-double_dvec2_array2:
- Statuses : 1 fail(s)
- Exec time: [6.31] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-int_ivec2_array3-position-double_dmat2x3:
- Statuses : 1 fail(s)
- Exec time: [5.74] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-int_ivec4-position-double_dmat2x4_array2:
- Statuses : 1 fail(s)
- Exec time: [5.96] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dmat3x4-int_ivec2:
- Statuses : 1 fail(s)
- Exec time: [6.21] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dmat4x2-int_int:
- Statuses : 1 fail(s)
- Exec time: [6.03] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-float_mat3x4_array3-double_dmat3x2_array2:
- Statuses : 1 fail(s)
- Exec time: [6.23] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-float_mat4x3-double_dmat2:
- Statuses : 1 fail(s)
- Exec time: [6.06] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-ubyte_uvec3-position-short_int-double_dmat4x3:
- Statuses : 1 fail(s)
- Exec time: [6.31] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-uint_uvec2-double_dmat3x2-position:
- Statuses : 1 fail(s)
- Exec time: [5.76] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-uint_uvec4_array3-double_dvec3_array2-position:
- Statuses : 1 fail(s)
- Exec time: [6.28] s

  * 
spec@glsl-1.10@execution@interpolation@interpolation-none-other-smooth-fixed:
- Statuses : 1 fail(s)
- Exec time: [0.15] s

  * spec@glsl-1.10@execution@interpolation@interpolation-none-other-smooth-none:
- Statuses : 1 fail(s)
- Exec time: [0.13] s

  * 
spec@glsl-1.30@execution@interpolation@interpolation-none-gl_frontcolor-flat-distance:
- Statuses : 1 fail(s)
- Exec time: [0.16] s

  * 
spec@glsl-1.30@execution@interpolation@interpolation-noperspective-gl_backsecondarycolor-smooth-vertex:
- Statuses : 1 fail(s)
- Exec time: [0.13] s

  * 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block 
(rev2)
URL   : https://patchwork.freedesktop.org/series/71581/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7675 -> Patchwork_15993


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/index.html

Known issues


  Here are the changes found in Patchwork_15993 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_close_race@basic-threads:
- fi-byt-j1900:   [PASS][1] -> [TIMEOUT][2] ([i915#816])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-byt-j1900/igt@gem_close_r...@basic-threads.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-byt-j1900/igt@gem_close_r...@basic-threads.html

  * igt@i915_pm_rpm@module-reload:
- fi-skl-6770hq:  [PASS][3] -> [FAIL][4] ([i915#178])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-skl-6770hq/igt@i915_pm_...@module-reload.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-skl-6770hq/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live_blt:
- fi-ivb-3770:[PASS][5] -> [DMESG-FAIL][6] ([i915#725])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-ivb-3770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gt_heartbeat:
- fi-kbl-guc: [PASS][7] -> [DMESG-FAIL][8] ([fdo#112406])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-kbl-guc/igt@i915_selftest@live_gt_heartbeat.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-kbl-guc/igt@i915_selftest@live_gt_heartbeat.html

  
 Possible fixes 

  * igt@gem_close_race@basic-threads:
- fi-byt-n2820:   [TIMEOUT][9] ([i915#816]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-byt-n2820/igt@gem_close_r...@basic-threads.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-byt-n2820/igt@gem_close_r...@basic-threads.html

  * igt@i915_selftest@live_blt:
- fi-hsw-4770r:   [DMESG-FAIL][11] ([i915#725]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-hsw-4770r/igt@i915_selftest@live_blt.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-hsw-4770r/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
- fi-hsw-peppy:   [DMESG-FAIL][13] ([i915#722]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [FAIL][15] ([i915#217]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
 Warnings 

  * igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6770hq:  [DMESG-WARN][17] ([i915#889]) -> [DMESG-WARN][18] 
([i915#88])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html

  * igt@kms_chamelium@vga-edid-read:
- fi-icl-u2:  [SKIP][19] ([fdo#109309]) -> [FAIL][20] ([i915#217])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7675/fi-icl-u2/igt@kms_chamel...@vga-edid-read.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15993/fi-icl-u2/igt@kms_chamel...@vga-edid-read.html

  
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#112406]: https://bugs.freedesktop.org/show_bug.cgi?id=112406
  [i915#178]: https://gitlab.freedesktop.org/drm/intel/issues/178
  [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
  [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
  [i915#88]: https://gitlab.freedesktop.org/drm/intel/issues/88
  [i915#889]: https://gitlab.freedesktop.org/drm/intel/issues/889


Participating hosts (52 -> 43)
--

  Missing(9): fi-ilk-m540 fi-hsw-4200u fi-glk-dsi fi-byt-squawks 
fi-bsw-cyan fi-ctg-p8600 fi-elk-e7500 fi-byt-clapper fi-bdw-samus 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7675 -> Patchwork_15993

  CI-20190529: 20190529
  

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block 
(rev2)
URL   : https://patchwork.freedesktop.org/series/71581/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
27998f819a38 drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence 
block (v2)
-:14: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#14: 
In addition to the refactoring, the original patch is augmented by looking up

total: 0 errors, 1 warnings, 0 checks, 129 lines checked

___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block (v2)

[Vivek Kasireddy]

Parsing the i2c element is mainly done to transfer the payload from the
MIPI sequence block to the relevant slave device. In some cases, the
commands that are part of the payload can be used to turn on the backlight.

This patch is actually a refactored version of this old patch:
https://lists.freedesktop.org/archives/intel-gfx/2014-December/056897.html

In addition to the refactoring, the original patch is augmented by looking up
the i2c bus from ACPI NS instead of relying on the bus number provided
in the VBT.

v2:
- Add DRM_DEV_ERROR for invalid adapter and failed transfer and also
  drop the DRM_DEBUG that existed originally. (Hans)
- Add two gotos instead of one to clean things up properly.

CC: Hans de Goede 
Cc: Nabendu Maiti 
Cc: Matt Roper 
Cc: Bob Paauwe 
Signed-off-by: Vivek Kasireddy 
---
 drivers/gpu/drm/i915/display/intel_dsi.h |  3 +
 drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 99 +++-
 2 files changed, 100 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h 
b/drivers/gpu/drm/i915/display/intel_dsi.h
index b15be5814599..5651bc8aa5c2 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.h
+++ b/drivers/gpu/drm/i915/display/intel_dsi.h
@@ -68,6 +68,9 @@ struct intel_dsi {
/* number of DSI lanes */
unsigned int lane_count;
 
+   /* i2c bus associated with the slave device */
+   int i2c_bus_num;
+
/*
 * video mode pixel format
 *
diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c 
b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index f90946c912ee..35fcef7c0d70 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -83,6 +83,12 @@ static struct gpio_map vlv_gpio_table[] = {
{ VLV_GPIO_NC_11_PANEL1_BKLTCTL },
 };
 
+struct i2c_adapter_lookup {
+   u16 slave_addr;
+   struct intel_dsi *intel_dsi;
+   acpi_handle dev_handle;
+};
+
 #define CHV_GPIO_IDX_START_N   0
 #define CHV_GPIO_IDX_START_E   73
 #define CHV_GPIO_IDX_START_SW  100
@@ -375,11 +381,98 @@ static const u8 *mipi_exec_gpio(struct intel_dsi 
*intel_dsi, const u8 *data)
return data;
 }
 
+static int i2c_adapter_lookup(struct acpi_resource *ares, void *data)
+{
+   struct i2c_adapter_lookup *lookup = data;
+   struct intel_dsi *intel_dsi = lookup->intel_dsi;
+   struct acpi_resource_i2c_serialbus *sb;
+   struct i2c_adapter *adapter;
+   acpi_handle adapter_handle;
+   acpi_status status;
+
+   if (intel_dsi->i2c_bus_num >= 0 ||
+   !i2c_acpi_get_i2c_resource(ares, ))
+   return 1;
+
+   if (lookup->slave_addr != sb->slave_address)
+   return 1;
+
+   status = acpi_get_handle(lookup->dev_handle,
+sb->resource_source.string_ptr,
+_handle);
+   if (ACPI_FAILURE(status))
+   return 1;
+
+   adapter = i2c_acpi_find_adapter_by_handle(adapter_handle);
+   if (adapter)
+   intel_dsi->i2c_bus_num = adapter->nr;
+
+   return 1;
+}
+
 static const u8 *mipi_exec_i2c(struct intel_dsi *intel_dsi, const u8 *data)
 {
-   DRM_DEBUG_KMS("Skipping I2C element execution\n");
+   struct drm_device *drm_dev = intel_dsi->base.base.dev;
+   struct device *dev = _dev->pdev->dev;
+   struct i2c_adapter *adapter;
+   struct acpi_device *acpi_dev;
+   struct list_head resource_list;
+   struct i2c_adapter_lookup lookup;
+   struct i2c_msg msg;
+   int ret;
+   u8 vbt_i2c_bus_num = *(data + 2);
+   u16 slave_addr = *(u16 *)(data + 3);
+   u8 reg_offset = *(data + 5);
+   u8 payload_size = *(data + 6);
+   u8 *payload_data;
+
+   if (intel_dsi->i2c_bus_num < 0) {
+   intel_dsi->i2c_bus_num = vbt_i2c_bus_num;
+
+   acpi_dev = ACPI_COMPANION(dev);
+   if (acpi_dev) {
+   memset(, 0, sizeof(lookup));
+   lookup.slave_addr = slave_addr;
+   lookup.intel_dsi = intel_dsi;
+   lookup.dev_handle = acpi_device_handle(acpi_dev);
+
+   INIT_LIST_HEAD(_list);
+   acpi_dev_get_resources(acpi_dev, _list,
+  i2c_adapter_lookup,
+  );
+   acpi_dev_free_resource_list(_list);
+   }
+   }
 
-   return data + *(data + 6) + 7;
+   adapter = i2c_get_adapter(intel_dsi->i2c_bus_num);
+   if (!adapter) {
+   DRM_DEV_ERROR(dev, "Cannot find a valid i2c bus for xfer\n");
+   goto err_bus;
+   }
+
+   payload_data = kzalloc(payload_size + 1, GFP_KERNEL);
+   if (!payload_data)
+   goto err_alloc;
+
+   payload_data[0] = reg_offset;
+   memcpy(_data[1], (data + 7), payload_size);
+
+   msg.addr = 

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/gem: Extend mmap support for lmem

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/gem: Extend mmap support for lmem
URL   : https://patchwork.freedesktop.org/series/71601/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7673_full -> Patchwork_15986_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_15986_full:

### Piglit changes ###

 Possible regressions 

  * spec@!opengl 1.5@vertex-buffer-offsets (NEW):
- {pig-hsw-4770r}:NOTRUN -> [WARN][1]
   [1]: None

  
New tests
-

  New tests have been introduced between CI_DRM_7673_full and 
Patchwork_15986_full:

### New Piglit tests (37) ###

  * shaders@glsl-vs-vec4-indexing-temp-dst-in-loop:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * spec@!opengl 1.1@depthstencil-default_fb-clear samples=4:
- Statuses : 1 fail(s)
- Exec time: [0.17] s

  * spec@!opengl 1.1@depthstencil-default_fb-readpixels-24_8:
- Statuses : 1 fail(s)
- Exec time: [0.10] s

  * spec@!opengl 1.1@depthstencil-default_fb-readpixels-32f_24_8_rev samples=4:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * spec@!opengl 1.1@gl-1.1-xor-copypixels:
- Statuses : 1 fail(s)
- Exec time: [0.10] s

  * spec@!opengl 1.1@gl-1.2-texture-base-level:
- Statuses : 1 fail(s)
- Exec time: [0.10] s

  * spec@!opengl 1.1@texture-al:
- Statuses : 1 fail(s)
- Exec time: [0.09] s

  * spec@!opengl 1.5@vertex-buffer-offsets:
- Statuses : 1 warn(s)
- Exec time: [0.10] s

  * 
spec@amd_shader_trinary_minmax@execution@built-in-functions@fs-min3-int-int-int:
- Statuses : 1 fail(s)
- Exec time: [0.11] s

  * spec@arb_copy_image@arb_copy_image-targets gl_texture_1d 32 1 1 
gl_texture_rectangle 32 32 1 11 0 0 5 13 0 14 1 1:
- Statuses : 1 fail(s)
- Exec time: [0.13] s

  * spec@arb_depth_buffer_float@fbo-depth-gl_depth_component32f-tex1d:
- Statuses : 1 fail(s)
- Exec time: [0.11] s

  * spec@arb_depth_buffer_float@fbo-stencil-gl_depth32f_stencil8-copypixels:
- Statuses : 1 fail(s)
- Exec time: [0.11] s

  * spec@arb_gpu_shader5@execution@sampler_array_indexing@gs-weird-uniforms:
- Statuses : 1 fail(s)
- Exec time: [0.09] s

  * spec@arb_gpu_shader5@execution@sampler_array_indexing@vs-struct-nonconst:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * 
spec@arb_gpu_shader_fp64@execution@built-in-functions@fs-greaterthanequal-dvec4-dvec4:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * spec@arb_gpu_shader_fp64@execution@glsl-uniform-initializer-3:
- Statuses : 1 fail(s)
- Exec time: [0.09] s

  * spec@arb_pixel_buffer_object@pbo-drawpixels:
- Statuses : 1 fail(s)
- Exec time: [0.08] s

  * spec@arb_shader_image_load_store@restrict:
- Statuses : 1 fail(s)
- Exec time: [0.10] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-double_dmat4x3-position-float_mat2_array3:
- Statuses : 1 fail(s)
- Exec time: [5.81] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-int_int-double_dmat3x2-position:
- Statuses : 1 fail(s)
- Exec time: [5.76] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-int_ivec3-double_dvec4-position:
- Statuses : 1 fail(s)
- Exec time: [0.15] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dvec2-float_mat3:
- Statuses : 1 fail(s)
- Exec time: [5.64] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-ushort_uvec4-double_dvec3-position:
- Statuses : 1 fail(s)
- Exec time: [5.52] s

  * spec@ext_texture_compression_s3tc@s3tc-targeted:
- Statuses : 1 fail(s)
- Exec time: [0.10] s

  * spec@glsl-1.10@execution@glsl-1.10-built-in-matrix-state:
- Statuses : 1 fail(s)
- Exec time: [0.33] s

  * spec@glsl-1.10@execution@glsl-render-after-bad-attach:
- Statuses : 1 fail(s)
- Exec time: [0.14] s

  * spec@glsl-1.10@execution@varying-packing@simple ivec4 arrays_of_arrays:
- Statuses : 1 fail(s)
- Exec time: [0.09] s

  * spec@glsl-1.30@execution@built-in-functions@fs-clamp-ivec2-int-int:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * 
spec@glsl-1.30@execution@interpolation@interpolation-flat-gl_frontcolor-flat-fixed:
- Statuses : 1 fail(s)
- Exec time: [0.13] s

  * spec@glsl-4.00@execution@built-in-functions@fs-lessthan-dvec2-dvec2:
- Statuses : 1 fail(s)
- Exec time: [0.13] s

  * spec@glsl-4.00@execution@built-in-functions@gs-greaterthan-dvec3-dvec3:
- Statuses : 1 fail(s)
- Exec time: [0.11] s

  * 
spec@glsl-4.20@execution@vs_in@vs-input-double_dmat4x3-position-double_dvec2_array2:
- Statuses : 1 fail(s)
- Exec time: [6.64] s

  * spec@glsl-4.20@execution@vs_in@vs-input-float_mat3-double_dvec3-position:
- Statuses : 1 fail(s)
- Exec time: [6.61] s

  * 

Re: [Intel-gfx] [PATCH] drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block

[Vivek Kasireddy]

On Fri, 3 Jan 2020 12:05:11 +0100
Hans de Goede  wrote:
Hi Hans,

> Hi Vivek,
> 
> On 03-01-2020 01:00, Vivek Kasireddy wrote:
> > Parsing the i2c element is mainly done to transfer the payload from
> > the MIPI sequence block to the relevant slave device. In some
> > cases, the commands that are part of the payload can be used to
> > turn on the backlight.
> > 
> > This patch is actually a refactored version of this old patch:
> > https://lists.freedesktop.org/archives/intel-gfx/2014-December/056897.html
> > 
> > In addition to the refactoring, the old patch is augmented by
> > looking up the i2c bus from ACPI NS instead of relying on the bus
> > number provided in the VBT.
> > 
> > Cc: Deepak M 
> > Cc: Nabendu Maiti 
> > Cc: Matt Roper 
> > Cc: Bob Paauwe 
> > Signed-off-by: Vivek Kasireddy   
> 
> Thank you for this patch, I have been doing a lot of work to make
> DSI panels on Bay Trail and Cherry Trail devices work better, as such
> I've done a lot of testing of DSI panels. But I have never seen any
> MIPI sequences actually use the i2c commands. May I ask how you have
> tested this? Do you have a device which actually uses the i2c
> commands?
Oh, they sure exist; we do have a device that uses i2c commands to turn
on the backlight that we have tested this patch on. 

> 
> I also have some small review comments inline:
> 
> > ---
> >   drivers/gpu/drm/i915/display/intel_dsi.h |  3 +
> >   drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 93
> >  2 files changed, 96 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h
> > b/drivers/gpu/drm/i915/display/intel_dsi.h index
> > b15be5814599..5651bc8aa5c2 100644 ---
> > a/drivers/gpu/drm/i915/display/intel_dsi.h +++
> > b/drivers/gpu/drm/i915/display/intel_dsi.h @@ -68,6 +68,9 @@ struct
> > intel_dsi { /* number of DSI lanes */
> > unsigned int lane_count;
> >   
> > +   /* i2c bus associated with the slave device */
> > +   int i2c_bus_num;
> > +
> > /*
> >  * video mode pixel format
> >  *
> > diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> > b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c index
> > f90946c912ee..60441a5a3dba 100644 ---
> > a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c +++
> > b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c @@ -83,6 +83,12 @@
> > static struct gpio_map vlv_gpio_table[] = { {
> > VLV_GPIO_NC_11_PANEL1_BKLTCTL }, };
> >   
> > +struct i2c_adapter_lookup {
> > +   u16 slave_addr;
> > +   struct intel_dsi *intel_dsi;
> > +   acpi_handle dev_handle;
> > +};
> > +
> >   #define CHV_GPIO_IDX_START_N  0
> >   #define CHV_GPIO_IDX_START_E  73
> >   #define CHV_GPIO_IDX_START_SW 100
> > @@ -375,8 +381,93 @@ static const u8 *mipi_exec_gpio(struct
> > intel_dsi *intel_dsi, const u8 *data) return data;
> >   }
> >   
> > +static int i2c_adapter_lookup(struct acpi_resource *ares, void
> > *data) +{
> > +   struct i2c_adapter_lookup *lookup = data;
> > +   struct intel_dsi *intel_dsi = lookup->intel_dsi;
> > +   struct acpi_resource_i2c_serialbus *sb;
> > +   struct i2c_adapter *adapter;
> > +   acpi_handle adapter_handle;
> > +   acpi_status status;
> > +
> > +   if (intel_dsi->i2c_bus_num >= 0 ||
> > +   !i2c_acpi_get_i2c_resource(ares, ))
> > +   return 1;
> > +
> > +   if (lookup->slave_addr != sb->slave_address)
> > +   return 1;
> > +
> > +   status = acpi_get_handle(lookup->dev_handle,
> > +sb->resource_source.string_ptr,
> > +_handle);
> > +   if (ACPI_FAILURE(status))
> > +   return 1;
> > +
> > +   adapter = i2c_acpi_find_adapter_by_handle(adapter_handle);
> > +   if (adapter)
> > +   intel_dsi->i2c_bus_num = adapter->nr;
> > +
> > +   return 1;
> > +}
> > +
> >   static const u8 *mipi_exec_i2c(struct intel_dsi *intel_dsi, const
> > u8 *data) {
> > +   struct drm_device *dev = intel_dsi->base.base.dev;
> > +   struct i2c_adapter *adapter;
> > +   struct acpi_device *acpi_dev;
> > +   struct list_head resource_list;
> > +   struct i2c_adapter_lookup lookup;
> > +   struct i2c_msg msg;
> > +   int ret;
> > +   u8 vbt_i2c_bus_num = *(data + 2);
> > +   u16 slave_addr = *(u16 *)(data + 3);
> > +   u8 reg_offset = *(data + 5);
> > +   u8 payload_size = *(data + 6);
> > +   u8 *payload_data;
> > +
> > +   if (intel_dsi->i2c_bus_num < 0) {
> > +   intel_dsi->i2c_bus_num = vbt_i2c_bus_num;
> > +
> > +   acpi_dev = ACPI_COMPANION(>pdev->dev);
> > +   if (acpi_dev) {
> > +   memset(, 0, sizeof(lookup));
> > +   lookup.slave_addr = slave_addr;
> > +   lookup.intel_dsi = intel_dsi;
> > +   lookup.dev_handle =
> > acpi_device_handle(acpi_dev); +
> > +   INIT_LIST_HEAD(_list);
> > +   acpi_dev_get_resources(acpi_dev,
> > _list,
> > +  i2c_adapter_lookup,
> > +

Re: [Intel-gfx] [PATCH v3 1/9] drm/amd/display: Align macro name as per DP spec

[Manasi Navare]

Harry, Jani - Since this also updates the AMD driver file, should this be 
merged through
AMD tree and then backmerged to drm-misc ?

Manasi

On Mon, Dec 30, 2019 at 09:45:15PM +0530, Animesh Manna wrote:
> [Why]:
> Aligh with DP spec wanted to follow same naming convention.
> 
> [How]:
> Changed the macro name of the dpcd address used for getting requested
> test-pattern.
> 
> Cc: Harry Wentland 
> Cc: Alex Deucher 
> Reviewed-by: Harry Wentland 
> Signed-off-by: Animesh Manna 
> ---
>  drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c | 2 +-
>  include/drm/drm_dp_helper.h  | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c 
> b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> index 42aa889fd0f5..1a6109be2fce 100644
> --- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> +++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
> @@ -2491,7 +2491,7 @@ static void dp_test_send_phy_test_pattern(struct 
> dc_link *link)
>   /* get phy test pattern and pattern parameters from DP receiver */
>   core_link_read_dpcd(
>   link,
> - DP_TEST_PHY_PATTERN,
> + DP_PHY_TEST_PATTERN,
>   _test_pattern.raw,
>   sizeof(dpcd_test_pattern));
>   core_link_read_dpcd(
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index 8f8f3632e697..d6e560870fb1 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -699,7 +699,7 @@
>  # define DP_TEST_CRC_SUPPORTED   (1 << 5)
>  # define DP_TEST_COUNT_MASK  0xf
>  
> -#define DP_TEST_PHY_PATTERN 0x248
> +#define DP_PHY_TEST_PATTERN 0x248
>  #define DP_TEST_80BIT_CUSTOM_PATTERN_7_00x250
>  #define  DP_TEST_80BIT_CUSTOM_PATTERN_15_8   0x251
>  #define  DP_TEST_80BIT_CUSTOM_PATTERN_23_16  0x252
> -- 
> 2.24.0
> 
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Re: [Intel-gfx] [PATCH v3 8/9] drm/i915/dp: Update the pattern as per request

[Manasi Navare]

On Thu, Jan 02, 2020 at 11:23:14AM +0200, Jani Nikula wrote:
> On Mon, 30 Dec 2019, Animesh Manna  wrote:
> > As per request from DP phy compliance test few special
> > test pattern need to set by source. Added function
> > to set pattern in DP_COMP_CTL register. It will be
> > called along with other test parameters like vswing,
> > pre-emphasis programming in atomic_commit_tail path.
> >
> > Signed-off-by: Animesh Manna 
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp.c | 55 +
> >  1 file changed, 55 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index cbefda9b6204..7c3f65e5d88b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -5005,6 +5005,61 @@ static u8 intel_dp_prepare_phytest(struct intel_dp 
> > *intel_dp)
> > return DP_TEST_ACK;
> >  }
> >  
> > +static inline void intel_dp_phy_pattern_update(struct intel_dp *intel_dp)
> 
> As a general rule, please only use the inline keyword for static inlines
> in headers. Sometimes, it's useful in small helpers, but usually you
> should just let the compiler decide what gets inlined.
> 
> In this case, the inline probably just hides the compiler warning about
> the unused function.
> 
> BR,
> Jani.
>

Yes I completely agree with Jani here, please do not use inline
other than some one line helpers in header files.
 
> > +{
> > +   struct drm_i915_private *dev_priv =
> > +   to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
> > +   struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> > +   struct drm_dp_phy_test_params *data =
> > +   _dp->compliance.test_data.phytest;
> > +   u32 temp;
> > +
> > +   switch (data->phy_pattern) {
> > +   case DP_PHY_TEST_PATTERN_NONE:
> > +   DRM_DEBUG_KMS("Disable Phy Test Pattern\n");
> > +   I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port), 0x0);
> > +   break;
> > +   case DP_PHY_TEST_PATTERN_D10_2:
> > +   DRM_DEBUG_KMS("Set D10.2 Phy Test Pattern\n");
> > +   I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> > +  DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_D10_2);
> > +   break;
> > +   case DP_PHY_TEST_PATTERN_ERROR_COUNT:
> > +   DRM_DEBUG_KMS("Set Error Count Phy Test Pattern\n");
> > +   I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> > +  DDI_DP_COMP_CTL_ENABLE |
> > +  DDI_DP_COMP_CTL_SCRAMBLED_0);
> > +   break;
> > +   case DP_PHY_TEST_PATTERN_PRBS7:
> > +   DRM_DEBUG_KMS("Set PRBS7 Phy Test Pattern\n");
> > +   I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> > +  DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_PRBS7);
> > +   break;
> > +   case DP_PHY_TEST_PATTERN_80BIT_CUSTOM:
> > +   DRM_DEBUG_KMS("Set 80Bit Custom Phy Test Pattern\n");
> > +   temp = ((data->custom80[0] << 24) | (data->custom80[1] << 16) |
> > +   (data->custom80[2] << 8) | (data->custom80[3]));
> > +   I915_WRITE(DDI_DP_COMP_PAT(intel_dig_port->base.port, 0), temp);
> > +   temp = ((data->custom80[4] << 24) | (data->custom80[5] << 16) |
> > +   (data->custom80[6] << 8) | (data->custom80[7]));
> > +   I915_WRITE(DDI_DP_COMP_PAT(intel_dig_port->base.port, 1), temp);
> > +   temp = ((data->custom80[8] << 8) | data->custom80[9]);
> > +   I915_WRITE(DDI_DP_COMP_PAT(intel_dig_port->base.port, 2), temp);
> > +   I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> > +  DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_CUSTOM80);
> > +   break;
> > +   case DP_PHY_TEST_PATTERN_CP2520:
> > +   DRM_DEBUG_KMS("Set HBR2 compliance Phy Test Pattern\n");
> > +   temp = ((data->hbr2_reset[1] << 8) | data->hbr2_reset[0]);
> > +   I915_WRITE(DDI_DP_COMP_CTL(intel_dig_port->base.port),
> > +  DDI_DP_COMP_CTL_ENABLE | DDI_DP_COMP_CTL_HBR2 |
> > +  temp);
> > +   break;
> > +   default:
> > +   WARN(1, "Invalid Phy Test PAttern\n");

Small nit here, it should be PHY Pattern

Manasi

> > +   }
> > +}
> > +
> >  static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp)
> >  {
> > u8 test_result = DP_TEST_NAK;
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center
> ___
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Re: [Intel-gfx] [PATCH v3 3/9] drm/i915/dp: Move vswing/pre-emphasis adjustment calculation

[Manasi Navare]

On Thu, Jan 02, 2020 at 03:56:09PM +0530, Manna, Animesh wrote:
> On 02-01-2020 14:48, Jani Nikula wrote:
> >On Mon, 30 Dec 2019, Animesh Manna  wrote:
> >>vswing/pre-emphasis adjustment calculation is needed in processing
> >>of auto phy compliance request other than link training, so moved
> >>the same function in intel_dp.c.
> >I guess I'm still asking why you think this is better located in
> >intel_dp.c than intel_dp_link_training.c, as the function has been moved
> >once in the other direction already to split out stuff from intel_dp.c
> >and to make the file smaller. Even the file name suggests it should
> >really be in intel_dp_link_training.c, right?
> 
> Just a thought, can we change the name to "intel_dp_link_config.c" from 
> "intel_dp_link_training.c" which will provide little wider scope
> and all the function playing with link configuration can be under it and also 
> exposed through header file.
> 
> AFAIK, processing phy compliance request always do not need link training. I 
> understood link training is very specific process consisting of clock 
> recovery + channel eq.
> So I am afraid of exposing intel_get_adjust_train() from 
> intel_dp_link_training.c which is not only specific to link-training. Need 
> your suggestion.
> 
> Regards,
> Animesh
>

I agree with Jani here and I think I had even suggested this earlier that 
instead of moving this function to intel_dp.c
we should make it non static so it can be used even for PHY compliance but 
since this function still deals
with adjusting training patterns IMHO it should still stay in 
intel_dp_link_training.c

Manasi
 
> >
> >BR,
> >Jani.
> >
> >
> >>No functional change.
> >>
> >>v1: initial patch.
> >>v2:
> >>- used "intel_dp" prefix in function name. (Jani)
> >>- used array notation instead pointer for link_status. (Ville)
> >>
> >>Signed-off-by: Animesh Manna 
> >>---
> >>  drivers/gpu/drm/i915/display/intel_dp.c   | 34 ++
> >>  drivers/gpu/drm/i915/display/intel_dp.h   |  4 +++
> >>  .../drm/i915/display/intel_dp_link_training.c | 36 ++-
> >>  3 files changed, 40 insertions(+), 34 deletions(-)
> >>
> >>diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
> >>b/drivers/gpu/drm/i915/display/intel_dp.c
> >>index 991f343579ef..2a27ee106089 100644
> >>--- a/drivers/gpu/drm/i915/display/intel_dp.c
> >>+++ b/drivers/gpu/drm/i915/display/intel_dp.c
> >>@@ -4110,6 +4110,40 @@ ivb_cpu_edp_signal_levels(u8 train_set)
> >>}
> >>  }
> >>+void
> >>+intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> >>+ const u8 link_status[DP_LINK_STATUS_SIZE])
> >>+{
> >>+   u8 v = 0;
> >>+   u8 p = 0;
> >>+   int lane;
> >>+   u8 voltage_max;
> >>+   u8 preemph_max;
> >>+
> >>+   for (lane = 0; lane < intel_dp->lane_count; lane++) {
> >>+   u8 this_v = drm_dp_get_adjust_request_voltage(link_status,
> >>+ lane);
> >>+   u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status,
> >>+  lane);
> >>+
> >>+   if (this_v > v)
> >>+   v = this_v;
> >>+   if (this_p > p)
> >>+   p = this_p;
> >>+   }
> >>+
> >>+   voltage_max = intel_dp_voltage_max(intel_dp);
> >>+   if (v >= voltage_max)
> >>+   v = voltage_max | DP_TRAIN_MAX_SWING_REACHED;
> >>+
> >>+   preemph_max = intel_dp_pre_emphasis_max(intel_dp, v);
> >>+   if (p >= preemph_max)
> >>+   p = preemph_max | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED;
> >>+
> >>+   for (lane = 0; lane < 4; lane++)
> >>+   intel_dp->train_set[lane] = v | p;
> >>+}
> >>+
> >>  void
> >>  intel_dp_set_signal_levels(struct intel_dp *intel_dp)
> >>  {
> >>diff --git a/drivers/gpu/drm/i915/display/intel_dp.h 
> >>b/drivers/gpu/drm/i915/display/intel_dp.h
> >>index 3da166054788..83eadc87af26 100644
> >>--- a/drivers/gpu/drm/i915/display/intel_dp.h
> >>+++ b/drivers/gpu/drm/i915/display/intel_dp.h
> >>@@ -9,6 +9,7 @@
> >>  #include 
> >>  #include 
> >>+#include 
> >>  #include "i915_reg.h"
> >>@@ -91,6 +92,9 @@ void
> >>  intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,
> >>   u8 dp_train_pat);
> >>  void
> >>+intel_dp_get_adjust_train(struct intel_dp *intel_dp,
> >>+ const u8 link_status[DP_LINK_STATUS_SIZE]);
> >>+void
> >>  intel_dp_set_signal_levels(struct intel_dp *intel_dp);
> >>  void intel_dp_set_idle_link_train(struct intel_dp *intel_dp);
> >>  u8
> >>diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
> >>b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> >>index 2a1130dd1ad0..e8ff9e279800 100644
> >>--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> >>+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> >>@@ -34,38 +34,6 @@ intel_dp_dump_link_status(const u8 
> >>link_status[DP_LINK_STATUS_SIZE])
> >>  link_status[3], link_status[4], 

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/selftest: Move igt_atomic_section[] out of the header

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/selftest: Move igt_atomic_section[] 
out of the header
URL   : https://patchwork.freedesktop.org/series/71599/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7673_full -> Patchwork_15985_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_15985_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_busy@close-race:
- shard-tglb: [PASS][1] -> [INCOMPLETE][2] ([i915#435]) +1 similar 
issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-tglb1/igt@gem_b...@close-race.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-tglb3/igt@gem_b...@close-race.html

  * igt@gem_ctx_persistence@bcs0-mixed-process:
- shard-skl:  [PASS][3] -> [FAIL][4] ([i915#679])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-skl1/igt@gem_ctx_persiste...@bcs0-mixed-process.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-skl4/igt@gem_ctx_persiste...@bcs0-mixed-process.html

  * igt@gem_ctx_persistence@vcs1-queued:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) 
+2 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-iclb4/igt@gem_ctx_persiste...@vcs1-queued.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-iclb7/igt@gem_ctx_persiste...@vcs1-queued.html

  * igt@gem_ctx_shared@q-smoketest-bsd:
- shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([i915#461])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-tglb7/igt@gem_ctx_sha...@q-smoketest-bsd.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-tglb6/igt@gem_ctx_sha...@q-smoketest-bsd.html

  * igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([i915#469])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-tglb9/igt@gem_...@unwedge-stress.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-tglb3/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_schedule@preempt-queue-bsd:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +8 similar 
issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-iclb6/igt@gem_exec_sched...@preempt-queue-bsd.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-iclb4/igt@gem_exec_sched...@preempt-queue-bsd.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-skl:  [PASS][13] -> [FAIL][14] ([i915#644])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-skl6/igt@gem_pp...@flink-and-close-vma-leak.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-skl3/igt@gem_pp...@flink-and-close-vma-leak.html

  * igt@gem_sync@basic-each:
- shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#472] / 
[i915#707])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-tglb7/igt@gem_s...@basic-each.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-tglb6/igt@gem_s...@basic-each.html

  * igt@gem_tiled_swapping@non-threaded:
- shard-apl:  [PASS][17] -> [DMESG-WARN][18] ([i915#183])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-apl3/igt@gem_tiled_swapp...@non-threaded.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-apl2/igt@gem_tiled_swapp...@non-threaded.html

  * igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][19] -> [FAIL][20] ([i915#454])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-iclb3/igt@i915_pm...@dc6-psr.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-iclb4/igt@i915_pm...@dc6-psr.html

  * igt@i915_suspend@forcewake:
- shard-kbl:  [PASS][21] -> [DMESG-WARN][22] ([i915#180])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-kbl6/igt@i915_susp...@forcewake.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-kbl4/igt@i915_susp...@forcewake.html

  * igt@i915_suspend@sysfs-reader:
- shard-apl:  [PASS][23] -> [DMESG-WARN][24] ([i915#180]) +5 
similar issues
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-apl2/igt@i915_susp...@sysfs-reader.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/shard-apl1/igt@i915_susp...@sysfs-reader.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl:  [PASS][25] -> [FAIL][26] ([i915#34])
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/shard-skl10/igt@kms_f...@plain-flip-fb-recreate-interruptible.html
   [26]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/gem: Extend mmap support for lmem

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/3] drm/i915/gem: Extend mmap support for lmem
URL   : https://patchwork.freedesktop.org/series/71616/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7674 -> Patchwork_15992


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15992/index.html

Known issues


  Here are the changes found in Patchwork_15992 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live_blt:
- fi-ivb-3770:[PASS][1] -> [DMESG-FAIL][2] ([i915#770])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15992/fi-ivb-3770/igt@i915_selftest@live_blt.html

  
 Possible fixes 

  * igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6700k2:  [INCOMPLETE][3] ([i915#671]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15992/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
- fi-kbl-7500u:   [INCOMPLETE][5] ([i915#879]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-7500u/igt@i915_module_l...@reload-with-fault-injection.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15992/fi-kbl-7500u/igt@i915_module_l...@reload-with-fault-injection.html

  
 Warnings 

  * igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][7] ([i915#725]) -> [DMESG-FAIL][8] 
([i915#553] / [i915#725])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15992/fi-hsw-4770/igt@i915_selftest@live_blt.html

  
  [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#770]: https://gitlab.freedesktop.org/drm/intel/issues/770
  [i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879


Participating hosts (46 -> 41)
--

  Additional (5): fi-hsw-4770r fi-bsw-n3050 fi-ilk-650 fi-elk-e7500 
fi-byt-n2820 
  Missing(10): fi-ehl-1 fi-bdw-5557u fi-hsw-4200u fi-byt-j1900 fi-ctg-p8600 
fi-blb-e6850 fi-tgl-y fi-byt-clapper fi-bsw-nick fi-bdw-samus 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7674 -> Patchwork_15992

  CI-20190529: 20190529
  CI_DRM_7674: 6cdc2db5a5641dd00f47fcc80b83bb8adb97 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15992: 60145208a94f714b8705e29797b26667aabd5b27 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

60145208a94f drm/i915/selftests: Compare mmaps with GPU
154d982f9b59 drm/i915/selftests: Extend fault handler selftests to all memory 
regions
905c9c1e0ac0 drm/i915/gem: Extend mmap support for lmem

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15992/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH i-g-t] i915/perf: Find the associated perf-type for a particular device

[Fosha, Robert M]

On 1/3/20 9:41 AM, Chris Wilson wrote:

Since with multiple devices, we may have multiple different perf_pmu
each with their own type, we want to find the right one for the job.

The tests are run with a specific fd, from which we can extract the
appropriate bus-id and find the associated perf-type. The performance
monitoring tools are a little more general and not yet ready to probe
all device or bind to one in particular, so we just assume the default
igfx for the time being.

Signed-off-by: Chris Wilson 
Cc: "Robert M. Fosha" 
Cc: Tvrtko Ursulin 
Cc: Michal Wajdeczko 
---
  benchmarks/gem_wsim.c  |  4 +-
  lib/igt_perf.c | 66 +++---
  lib/igt_perf.h | 13 --
  overlay/gem-interrupts.c   |  2 +-
  overlay/gpu-freq.c |  4 +-
  overlay/gpu-top.c  | 12 ++---
  overlay/rc6.c  |  2 +-
  tests/i915/gem_ctx_freq.c  |  2 +-
  tests/i915/gem_ctx_sseu.c  |  2 +-
  tests/i915/gem_exec_balancer.c | 18 +---
  tests/perf_pmu.c   | 84 ++
  tools/intel_gpu_top.c  |  2 +-
  12 files changed, 141 insertions(+), 70 deletions(-)

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 6305e0d7a..9156fdc90 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -2268,8 +2268,8 @@ busy_init(const struct workload_balancer *balancer, 
struct workload *wrk)
for (d = [0]; d->id != VCS; d++) {
int pfd;
  
-		pfd = perf_i915_open_group(I915_PMU_ENGINE_BUSY(d->class,

-   d->inst),
+   pfd = perf_igfx_open_group(I915_PMU_ENGINE_BUSY(d->class,
+   d->inst),
   bb->fd);
if (pfd < 0) {
if (d->id != VCS2)
diff --git a/lib/igt_perf.c b/lib/igt_perf.c
index e3dec2cc2..4922a2df7 100644
--- a/lib/igt_perf.c
+++ b/lib/igt_perf.c
@@ -4,17 +4,59 @@
  #include 
  #include 
  #include 
+#include 
  #include 
  
  #include "igt_perf.h"
  
-uint64_t i915_type_id(void)

+const char *i915_perf_device(int i915, char *buf, int buflen)
+{
+   drm_unique_t u = {
+   .unique = buf + 1,
+   .unique_len = buflen - 1,
+   };
+   drm_set_version_t sv = {
+   .drm_di_major = 1,
+   .drm_di_minor = 4,
+   .drm_dd_major = -1,/* Don't care */
+   .drm_dd_minor = -1,/* Don't care */
+   };
+
+   if (ioctl(i915, DRM_IOCTL_SET_VERSION, ))
+   return "i915";


perf_pmu has test cases that use drm_open_driver_render() and pass the 
render_fd. What about this cases?



+
+   memset(buf, 0, buflen);
+   ioctl(i915, DRM_IOCTL_GET_UNIQUE, );
+
+   if (u.unique_len >= buflen)
+   return NULL;
+
+   if (strncmp(buf + 1, "pci:", 4))
+   return NULL;
+
+   if (strcmp(buf + 1, "pci::00:02.0") == 0)
+   return "i915";
+
+   return memcpy(buf, "i915-", strlen("i915-"));
+}
+
+uint64_t i915_perf_type_id(int i915)
+{
+   char buf[80];
+
+   return igt_perf_type_id(i915_perf_device(i915, buf, sizeof(buf)));
+}
+
+uint64_t igt_perf_type_id(const char *device)
  {
char buf[64];
ssize_t ret;
int fd;
  
-	fd = open("/sys/bus/event_source/devices/i915/type", O_RDONLY);

+   snprintf(buf, sizeof(buf),
+"/sys/bus/event_source/devices/%s/type", device);
+
+   fd = open(buf, O_RDONLY);
if (fd < 0)
return 0;
  
@@ -52,15 +94,27 @@ _perf_open(uint64_t type, uint64_t config, int group, uint64_t format)

return ret;
  }
  
-int perf_i915_open(uint64_t config)

+int perf_igfx_open(uint64_t config)
+{
+   return _perf_open(igt_perf_type_id("i915"), config, -1,
+ PERF_FORMAT_TOTAL_TIME_ENABLED);
+}
+
+int perf_igfx_open_group(uint64_t config, int group)
+{
+   return _perf_open(igt_perf_type_id("i915"), config, group,
+ PERF_FORMAT_TOTAL_TIME_ENABLED | PERF_FORMAT_GROUP);
+}
+
+int perf_i915_open(int i915, uint64_t config)
  {
-   return _perf_open(i915_type_id(), config, -1,
+   return _perf_open(i915_perf_type_id(i915), config, -1,
  PERF_FORMAT_TOTAL_TIME_ENABLED);
  }
  
-int perf_i915_open_group(uint64_t config, int group)

+int perf_i915_open_group(int i915, uint64_t config, int group)
  {
-   return _perf_open(i915_type_id(), config, group,
+   return _perf_open(i915_perf_type_id(i915), config, group,
  PERF_FORMAT_TOTAL_TIME_ENABLED | PERF_FORMAT_GROUP);
  }
  
diff --git a/lib/igt_perf.h b/lib/igt_perf.h

index e00718f47..a8328c70c 100644
--- a/lib/igt_perf.h
+++ b/lib/igt_perf.h
@@ -51,10 +51,17 @@ perf_event_open(struct perf_event_attr *attr,
  return 

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: make stolen more region centric

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: make stolen more region centric
URL   : https://patchwork.freedesktop.org/series/71615/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7674 -> Patchwork_15991


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/index.html

Known issues


  Here are the changes found in Patchwork_15991 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live_active:
- fi-glk-dsi: [PASS][1] -> [DMESG-FAIL][2] ([i915#765])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-glk-dsi/igt@i915_selftest@live_active.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/fi-glk-dsi/igt@i915_selftest@live_active.html

  
 Possible fixes 

  * igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6700k2:  [INCOMPLETE][3] ([i915#671]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
- fi-skl-6770hq:  [INCOMPLETE][5] ([i915#671]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html

  
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#765]: https://gitlab.freedesktop.org/drm/intel/issues/765


Participating hosts (46 -> 38)
--

  Additional (3): fi-byt-n2820 fi-elk-e7500 fi-bsw-n3050 
  Missing(11): fi-ehl-1 fi-hsw-4200u fi-hsw-peppy fi-snb-2520m fi-kbl-7500u 
fi-ctg-p8600 fi-pnv-d510 fi-tgl-y fi-byt-clapper fi-bdw-samus fi-snb-2600 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7674 -> Patchwork_15991

  CI-20190529: 20190529
  CI_DRM_7674: 6cdc2db5a5641dd00f47fcc80b83bb8adb97 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15991: c3ed5865acfcfa43c898b9cfccd38c4c6cc4a362 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

c3ed5865acfc drm/i915/lmem: stop mapping the aperture for fake LMEM
bdef42f5a543 drm/i915/gtt: refactor the storage assumptions around paging 
structures
798fff7d1586 drm/i915: make stolen more region centric

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15991/index.html
___
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Re: [Intel-gfx] [PATCH] drm/i915/dp: Fix incorrect test parameter for DP link layer compliance

[Manasi Navare]

On Fri, Jan 03, 2020 at 11:07:37PM +0800, Lee Shawn C wrote:
> Run intel_dp_compliance would failed at video pattern related
> test case sometimes. DP test applet read incorrect test type
> from kernel to cause this symptom. Add a "\n" (newline) in
> seq_printf() then DP test applet will get proper parameters.
> 
> Cc: Manasi Navare 
> Cc: Jani Nikula 
> Cc: Daniel Vetter 
> Cc: Ville Syrjala 
> Cc: Cooper Chiou 
> Signed-off-by: Lee Shawn C 

Manasi

>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 0ac98e39eb75..74180158a909 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3167,7 +3167,7 @@ static int i915_displayport_test_data_show(struct 
> seq_file *m, void *data)
>   intel_dp = enc_to_intel_dp(>base);
>   if (intel_dp->compliance.test_type ==
>   DP_TEST_LINK_EDID_READ)
> - seq_printf(m, "%lx",
> + seq_printf(m, "%lx\n",
>  intel_dp->compliance.test_data.edid);
>   else if (intel_dp->compliance.test_type ==
>DP_TEST_LINK_VIDEO_PATTERN) {
> @@ -3209,7 +3209,7 @@ static int i915_displayport_test_type_show(struct 
> seq_file *m, void *data)
>  
>   if (encoder && connector->status == connector_status_connected) 
> {
>   intel_dp = enc_to_intel_dp(>base);
> - seq_printf(m, "%02lx", intel_dp->compliance.test_type);
> + seq_printf(m, "%02lx\n", 
> intel_dp->compliance.test_type);
>   } else
>   seq_puts(m, "0");
>   }
> -- 
> 2.17.1
> 
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [CI,1/3] drm/i915/gem: Extend mmap support for lmem

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/3] drm/i915/gem: Extend mmap support for lmem
URL   : https://patchwork.freedesktop.org/series/71616/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/gem: Extend mmap support for lmem
Okay!

Commit: drm/i915/selftests: Extend fault handler selftests to all memory regions
Okay!

Commit: drm/i915/selftests: Compare mmaps with GPU
-
+drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:984:9: warning: dereference 
of noderef expression
+drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:985:13: warning: 
dereference of noderef expression

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,1/3] drm/i915/gem: Extend mmap support for lmem

[Patchwork]

== Series Details ==

Series: series starting with [CI,1/3] drm/i915/gem: Extend mmap support for lmem
URL   : https://patchwork.freedesktop.org/series/71616/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
905c9c1e0ac0 drm/i915/gem: Extend mmap support for lmem
154d982f9b59 drm/i915/selftests: Extend fault handler selftests to all memory 
regions
-:158: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'x' - possible side-effects?
#158: FILE: drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:834:
+#define expand32(x) (((x) << 0) | ((x) << 8) | ((x) << 16) | ((x) << 24))

total: 0 errors, 0 warnings, 1 checks, 412 lines checked
60145208a94f drm/i915/selftests: Compare mmaps with GPU

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[Intel-gfx] [CI 1/3] drm/i915/gem: Extend mmap support for lmem

[Chris Wilson]

From: Abdiel Janulgue 

Local memory objects are similar to our usual scatterlist, but instead
of using the struct page stored therein, we need to use the
sg->dma_address.

Signed-off-by: Abdiel Janulgue 
Cc: Chris Wilson 
Cc: Matthew Auld 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 ++-
 drivers/gpu/drm/i915/i915_drv.h  |  6 ++---
 drivers/gpu/drm/i915/i915_mm.c   | 34 +++-
 3 files changed, 39 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index ed0d9a2f0e7b..37efd95c086d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -217,6 +217,7 @@ static vm_fault_t i915_error_to_vmf_fault(int err)
 
case -ENOSPC: /* shmemfs allocation failure */
case -ENOMEM: /* our allocation failure */
+   case -ENXIO:
return VM_FAULT_OOM;
 
case 0:
@@ -237,11 +238,9 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
struct vm_area_struct *area = vmf->vma;
struct i915_mmap_offset *mmo = area->vm_private_data;
struct drm_i915_gem_object *obj = mmo->obj;
+   resource_size_t iomap;
int err;
 
-   if (unlikely(!i915_gem_object_has_struct_page(obj)))
-   return VM_FAULT_SIGBUS;
-
/* Sanity check that we allow writing into this object */
if (unlikely(i915_gem_object_is_readonly(obj) &&
 area->vm_flags & VM_WRITE))
@@ -251,10 +250,16 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
if (err)
goto out;
 
+   iomap = -1;
+   if (!i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_STRUCT_PAGE)) {
+   iomap = obj->mm.region->iomap.base;
+   iomap -= obj->mm.region->region.start;
+   }
+
/* PTEs are revoked in obj->ops->put_pages() */
-   err = remap_io_sg_page(area,
-  area->vm_start, area->vm_end - area->vm_start,
-  obj->mm.pages->sgl);
+   err = remap_io_sg(area,
+ area->vm_start, area->vm_end - area->vm_start,
+ obj->mm.pages->sgl, iomap);
 
if (area->vm_flags & VM_WRITE) {
GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
@@ -553,7 +558,9 @@ __assign_mmap_offset(struct drm_file *file,
}
 
if (mmap_type != I915_MMAP_TYPE_GTT &&
-   !i915_gem_object_has_struct_page(obj)) {
+   !i915_gem_object_type_has(obj,
+ I915_GEM_OBJECT_HAS_STRUCT_PAGE |
+ I915_GEM_OBJECT_HAS_IOMEM)) {
err = -ENODEV;
goto out;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2ee9f57d165d..50181113dd2b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2027,9 +2027,9 @@ int i915_reg_read_ioctl(struct drm_device *dev, void 
*data,
 int remap_io_mapping(struct vm_area_struct *vma,
 unsigned long addr, unsigned long pfn, unsigned long size,
 struct io_mapping *iomap);
-int remap_io_sg_page(struct vm_area_struct *vma,
-unsigned long addr, unsigned long size,
-struct scatterlist *sgl);
+int remap_io_sg(struct vm_area_struct *vma,
+   unsigned long addr, unsigned long size,
+   struct scatterlist *sgl, resource_size_t iobase);
 
 static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
 {
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 2998689e6d42..b6376b25ef63 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -35,6 +35,7 @@ struct remap_pfn {
pgprot_t prot;
 
struct sgt_iter sgt;
+   resource_size_t iobase;
 };
 
 static int remap_pfn(pte_t *pte, unsigned long addr, void *data)
@@ -48,12 +49,17 @@ static int remap_pfn(pte_t *pte, unsigned long addr, void 
*data)
return 0;
 }
 
-static inline unsigned long sgt_pfn(const struct sgt_iter *sgt)
+#define use_dma(io) ((io) != -1)
+
+static inline unsigned long sgt_pfn(const struct remap_pfn *r)
 {
-   return sgt->pfn + (sgt->curr >> PAGE_SHIFT);
+   if (use_dma(r->iobase))
+   return (r->sgt.dma + r->sgt.curr + r->iobase) >> PAGE_SHIFT;
+   else
+   return r->sgt.pfn + (r->sgt.curr >> PAGE_SHIFT);
 }
 
-static int remap_sg_page(pte_t *pte, unsigned long addr, void *data)
+static int remap_sg(pte_t *pte, unsigned long addr, void *data)
 {
struct remap_pfn *r = data;
 
@@ -62,12 +68,12 @@ static int remap_sg_page(pte_t *pte, unsigned long addr, 
void *data)
 
/* Special PTE are not associated with any struct page */
set_pte_at(r->mm, addr, pte,
-  pte_mkspecial(pfn_pte(sgt_pfn(>sgt), 

[Intel-gfx] [CI 2/3] drm/i915/selftests: Extend fault handler selftests to all memory regions

[Chris Wilson]

From: Abdiel Janulgue 

Instead of testing individually our new fault handlers, iterate over all
memory regions and test all from one interface.

Signed-off-by: Abdiel Janulgue 
Cc: Matthew Auld 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
---
 .../drm/i915/gem/selftests/i915_gem_mman.c| 306 +-
 1 file changed, 218 insertions(+), 88 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index cbf796da64e3..2a31f51be8d6 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -9,6 +9,7 @@
 #include "gt/intel_engine_pm.h"
 #include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
+#include "gem/i915_gem_region.h"
 #include "huge_gem_object.h"
 #include "i915_selftest.h"
 #include "selftests/i915_random.h"
@@ -725,114 +726,231 @@ static int igt_mmap_offset_exhaustion(void *arg)
goto out;
 }
 
-#define expand32(x) (((x) << 0) | ((x) << 8) | ((x) << 16) | ((x) << 24))
-static int igt_mmap(void *arg, enum i915_mmap_type type)
+static int gtt_set(struct drm_i915_gem_object *obj)
 {
-   struct drm_i915_private *i915 = arg;
-   struct drm_i915_gem_object *obj;
-   struct i915_mmap_offset *mmo;
-   struct vm_area_struct *area;
-   unsigned long addr;
-   void *vaddr;
-   int err = 0, i;
+   struct i915_vma *vma;
+   void __iomem *map;
+   int err = 0;
 
-   if (!i915_ggtt_has_aperture(>ggtt))
-   return 0;
+   vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
+   if (IS_ERR(vma))
+   return PTR_ERR(vma);
 
-   obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
-   if (IS_ERR(obj))
-   return PTR_ERR(obj);
+   intel_gt_pm_get(vma->vm->gt);
+   map = i915_vma_pin_iomap(vma);
+   i915_vma_unpin(vma);
+   if (IS_ERR(map)) {
+   err = PTR_ERR(map);
+   goto out;
+   }
+
+   memset_io(map, POISON_INUSE, obj->base.size);
+   i915_vma_unpin_iomap(vma);
+
+out:
+   intel_gt_pm_put(vma->vm->gt);
+   return err;
+}
+
+static int gtt_check(struct drm_i915_gem_object *obj)
+{
+   struct i915_vma *vma;
+   void __iomem *map;
+   int err = 0;
+
+   vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
+   if (IS_ERR(vma))
+   return PTR_ERR(vma);
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
-   if (IS_ERR(vaddr)) {
-   err = PTR_ERR(vaddr);
+   intel_gt_pm_get(vma->vm->gt);
+   map = i915_vma_pin_iomap(vma);
+   i915_vma_unpin(vma);
+   if (IS_ERR(map)) {
+   err = PTR_ERR(map);
goto out;
}
-   memset(vaddr, POISON_INUSE, PAGE_SIZE);
+
+   if (memchr_inv((void __force *)map, POISON_FREE, obj->base.size)) {
+   pr_err("%s: Write via mmap did not land in backing store 
(GTT)\n",
+  obj->mm.region->name);
+   err = -EINVAL;
+   }
+   i915_vma_unpin_iomap(vma);
+
+out:
+   intel_gt_pm_put(vma->vm->gt);
+   return err;
+}
+
+static int wc_set(struct drm_i915_gem_object *obj)
+{
+   void *vaddr;
+
+   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   if (IS_ERR(vaddr))
+   return PTR_ERR(vaddr);
+
+   memset(vaddr, POISON_INUSE, obj->base.size);
i915_gem_object_flush_map(obj);
i915_gem_object_unpin_map(obj);
 
-   mmo = mmap_offset_attach(obj, type, NULL);
-   if (IS_ERR(mmo)) {
-   err = PTR_ERR(mmo);
-   goto out;
+   return 0;
+}
+
+static int wc_check(struct drm_i915_gem_object *obj)
+{
+   void *vaddr;
+   int err = 0;
+
+   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   if (IS_ERR(vaddr))
+   return PTR_ERR(vaddr);
+
+   if (memchr_inv(vaddr, POISON_FREE, obj->base.size)) {
+   pr_err("%s: Write via mmap did not land in backing store 
(WC)\n",
+  obj->mm.region->name);
+   err = -EINVAL;
}
+   i915_gem_object_unpin_map(obj);
+
+   return err;
+}
+
+static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
+{
+   if (type == I915_MMAP_TYPE_GTT &&
+   !i915_ggtt_has_aperture(_i915(obj->base.dev)->ggtt))
+   return false;
+
+   if (type != I915_MMAP_TYPE_GTT &&
+   !i915_gem_object_type_has(obj,
+ I915_GEM_OBJECT_HAS_STRUCT_PAGE |
+ I915_GEM_OBJECT_HAS_IOMEM))
+   return false;
+
+   return true;
+}
+
+#define expand32(x) (((x) << 0) | ((x) << 8) | ((x) << 16) | ((x) << 24))
+static int __igt_mmap(struct drm_i915_private *i915,
+ struct drm_i915_gem_object *obj,
+ enum i915_mmap_type type)
+{
+   struct i915_mmap_offset *mmo;
+   struct 

[Intel-gfx] [CI 3/3] drm/i915/selftests: Compare mmaps with GPU

[Chris Wilson]

Check that the user writes into their mmap are visible on the GPU.

Signed-off-by: Chris Wilson 
Cc: Abdiel Janulgue 
Cc: Matthew Auld 
---
 .../drm/i915/gem/selftests/i915_gem_mman.c| 123 ++
 1 file changed, 123 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index 2a31f51be8d6..df8cb559277f 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -953,6 +953,128 @@ static int igt_mmap(void *arg)
return 0;
 }
 
+static int __igt_mmap_gpu(struct drm_i915_private *i915,
+ struct drm_i915_gem_object *obj,
+ enum i915_mmap_type type)
+{
+   struct intel_engine_cs *engine;
+   struct i915_mmap_offset *mmo;
+   u32 __user *ux, bbe;
+   unsigned long addr;
+   int err;
+
+   if (!can_mmap(obj, type))
+   return 0;
+
+   err = wc_set(obj);
+   if (err == -ENXIO)
+   err = gtt_set(obj);
+   if (err)
+   return err;
+
+   mmo = mmap_offset_attach(obj, type, NULL);
+   if (IS_ERR(mmo))
+   return PTR_ERR(mmo);
+
+   addr = igt_mmap_node(i915, >vma_node, 0, PROT_WRITE, MAP_SHARED);
+   if (IS_ERR_VALUE(addr))
+   return addr;
+
+   ux = u64_to_user_ptr((u64)addr);
+   bbe = MI_BATCH_BUFFER_END;
+   if (put_user(bbe, ux)) {
+   pr_err("%s: Unable to write to mmap\n", obj->mm.region->name);
+   err = -EFAULT;
+   goto out_unmap;
+   }
+
+   if (type == I915_MMAP_TYPE_GTT)
+   intel_gt_flush_ggtt_writes(>gt);
+
+   for_each_uabi_engine(engine, i915) {
+   struct i915_request *rq;
+   struct i915_vma *vma;
+
+   vma = i915_vma_instance(obj, engine->kernel_context->vm, NULL);
+   if (IS_ERR(vma)) {
+   err = PTR_ERR(vma);
+   goto out_unmap;
+   }
+
+   err = i915_vma_pin(vma, 0, 0, PIN_USER);
+   if (err)
+   goto out_unmap;
+
+   rq = i915_request_create(engine->kernel_context);
+   if (IS_ERR(rq)) {
+   err = PTR_ERR(rq);
+   goto out_unpin;
+   }
+
+   i915_vma_lock(vma);
+   err = i915_request_await_object(rq, vma->obj, false);
+   if (err == 0)
+   err = i915_vma_move_to_active(vma, rq, 0);
+   i915_vma_unlock(vma);
+
+   err = engine->emit_bb_start(rq, vma->node.start, 0, 0);
+   i915_request_get(rq);
+   i915_request_add(rq);
+
+   if (i915_request_wait(rq, 0, HZ / 5) < 0) {
+   struct drm_printer p =
+   drm_info_printer(engine->i915->drm.dev);
+
+   pr_err("%s(%s, %s): Failed to execute batch\n",
+  __func__, engine->name, obj->mm.region->name);
+   intel_engine_dump(engine, ,
+ "%s\n", engine->name);
+
+   intel_gt_set_wedged(engine->gt);
+   err = -EIO;
+   }
+   i915_request_put(rq);
+
+out_unpin:
+   i915_vma_unpin(vma);
+   if (err)
+   goto out_unmap;
+   }
+
+out_unmap:
+   vm_munmap(addr, obj->base.size);
+   return err;
+}
+
+static int igt_mmap_gpu(void *arg)
+{
+   struct drm_i915_private *i915 = arg;
+   struct intel_memory_region *mr;
+   enum intel_region_id id;
+
+   for_each_memory_region(mr, i915, id) {
+   struct drm_i915_gem_object *obj;
+   int err;
+
+   obj = i915_gem_object_create_region(mr, PAGE_SIZE, 0);
+   if (obj == ERR_PTR(-ENODEV))
+   continue;
+
+   if (IS_ERR(obj))
+   return PTR_ERR(obj);
+
+   err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_GTT);
+   if (err == 0)
+   err = __igt_mmap_gpu(i915, obj, I915_MMAP_TYPE_WC);
+
+   i915_gem_object_put(obj);
+   if (err)
+   return err;
+   }
+
+   return 0;
+}
+
 static int check_present_pte(pte_t *pte, unsigned long addr, void *data)
 {
if (!pte_present(*pte) || pte_none(*pte)) {
@@ -1107,6 +1229,7 @@ int i915_gem_mman_live_selftests(struct drm_i915_private 
*i915)
SUBTEST(igt_mmap_offset_exhaustion),
SUBTEST(igt_mmap),
SUBTEST(igt_mmap_revoke),
+   SUBTEST(igt_mmap_gpu),
};
 
return i915_subtests(tests, i915);
-- 
2.25.0.rc0

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Re: [Intel-gfx] [PATCH 2/3] drm/i915/gtt: refactor the storage assumptions around paging structures

[Chris Wilson]

Quoting Matthew Auld (2020-01-03 20:00:29)
> We currently assume we have struct pages for the backing storage of our
> paging structures, however in the future we may also want to support
> allocating storage from non-page backed memory, while still being able
> to map it into the kernel address space for CPU access.

Please, let's not put a vfunc this deep / frequent. The next step was to
move this into gt/intel_gtt.c, gt/gen6_ppgtt.c, gt/gen8_ppgtt.c and
possibly gt/gen12_ppgtt.c for future directions.
-Chris
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Re: [Intel-gfx] [PATCH 1/3] drm/i915: make stolen more region centric

[Chris Wilson]

Quoting Matthew Auld (2020-01-03 20:00:28)
> From: CQ Tang 

Just throwing the kitchen sink into intel_memory_region is not very
appetizing. There seems to be no design behind this -- as foretold by
the lack of rationale.
-Chris
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: make stolen more region centric

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: make stolen more region centric
URL   : https://patchwork.freedesktop.org/series/71615/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
798fff7d1586 drm/i915: make stolen more region centric
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

-:329: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#329: FILE: drivers/gpu/drm/i915/gem/i915_gem_stolen.c:528:
+   sg_free_table(pages);$

-:330: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#330: FILE: drivers/gpu/drm/i915/gem/i915_gem_stolen.c:529:
+   kfree(pages);$

total: 0 errors, 3 warnings, 0 checks, 502 lines checked
bdef42f5a543 drm/i915/gtt: refactor the storage assumptions around paging 
structures
c3ed5865acfc drm/i915/lmem: stop mapping the aperture for fake LMEM
-:24: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#24: FILE: drivers/gpu/drm/i915/i915_params.c:186:
+i915_param_named_unsafe(fake_lmem_size, ulong, 0600,
+   "Fake LMEM size (default: 0)");

total: 0 errors, 0 warnings, 1 checks, 110 lines checked

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[Intel-gfx] [PATCH 1/3] drm/i915: make stolen more region centric

[Matthew Auld]

From: CQ Tang 

Signed-off-by: CQ Tang 
Signed-off-by: Matthew Auld 
Cc: Chris Wilson 
---
 drivers/gpu/drm/i915/display/intel_fbc.c  |  20 +--
 drivers/gpu/drm/i915/display/intel_fbdev.c|   4 +-
 .../gpu/drm/i915/gem/i915_gem_object_types.h  |   7 +-
 drivers/gpu/drm/i915/gem/i915_gem_stolen.c| 128 --
 drivers/gpu/drm/i915/gem/i915_gem_stolen.h|   7 +-
 drivers/gpu/drm/i915/gt/intel_rc6.c   |   4 +-
 drivers/gpu/drm/i915/gt/intel_ring.c  |   2 +-
 drivers/gpu/drm/i915/i915_debugfs.c   |   4 +-
 drivers/gpu/drm/i915/i915_drv.h   |   6 -
 drivers/gpu/drm/i915/intel_memory_region.h|   3 +
 10 files changed, 90 insertions(+), 95 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
b/drivers/gpu/drm/i915/display/intel_fbc.c
index a1048ece541e..3c4e70da717c 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -420,6 +420,7 @@ static int find_compression_threshold(struct 
drm_i915_private *dev_priv,
  unsigned int size,
  unsigned int fb_cpp)
 {
+   struct intel_memory_region *mem = 
dev_priv->mm.regions[INTEL_REGION_STOLEN];
int compression_threshold = 1;
int ret;
u64 end;
@@ -441,7 +442,7 @@ static int find_compression_threshold(struct 
drm_i915_private *dev_priv,
 */
 
/* Try to over-allocate to reduce reallocations and fragmentation. */
-   ret = i915_gem_stolen_insert_node_in_range(dev_priv, node, size <<= 1,
+   ret = i915_gem_stolen_insert_node_in_range(mem, node, size <<= 1,
   4096, 0, end);
if (ret == 0)
return compression_threshold;
@@ -452,7 +453,7 @@ static int find_compression_threshold(struct 
drm_i915_private *dev_priv,
(fb_cpp == 2 && compression_threshold == 2))
return 0;
 
-   ret = i915_gem_stolen_insert_node_in_range(dev_priv, node, size >>= 1,
+   ret = i915_gem_stolen_insert_node_in_range(mem, node, size >>= 1,
   4096, 0, end);
if (ret && INTEL_GEN(dev_priv) <= 4) {
return 0;
@@ -467,6 +468,7 @@ static int find_compression_threshold(struct 
drm_i915_private *dev_priv,
 static int intel_fbc_alloc_cfb(struct drm_i915_private *dev_priv,
   unsigned int size, unsigned int fb_cpp)
 {
+   struct intel_memory_region *mem = 
dev_priv->mm.regions[INTEL_REGION_STOLEN];
struct intel_fbc *fbc = _priv->fbc;
struct drm_mm_node *uninitialized_var(compressed_llb);
int ret;
@@ -493,7 +495,7 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private 
*dev_priv,
if (!compressed_llb)
goto err_fb;
 
-   ret = i915_gem_stolen_insert_node(dev_priv, compressed_llb,
+   ret = i915_gem_stolen_insert_node(mem, compressed_llb,
  4096, 4096);
if (ret)
goto err_fb;
@@ -519,22 +521,23 @@ static int intel_fbc_alloc_cfb(struct drm_i915_private 
*dev_priv,
 
 err_fb:
kfree(compressed_llb);
-   i915_gem_stolen_remove_node(dev_priv, >compressed_fb);
+   i915_gem_stolen_remove_node(mem, >compressed_fb);
 err_llb:
-   if (drm_mm_initialized(_priv->mm.stolen))
+   if (drm_mm_initialized(>stolen))
pr_info_once("drm: not enough stolen space for compressed 
buffer (need %d more bytes), disabling. Hint: you may be able to increase 
stolen memory size in the BIOS to avoid this.\n", size);
return -ENOSPC;
 }
 
 static void __intel_fbc_cleanup_cfb(struct drm_i915_private *dev_priv)
 {
+   struct intel_memory_region *mem = 
dev_priv->mm.regions[INTEL_REGION_STOLEN];
struct intel_fbc *fbc = _priv->fbc;
 
if (drm_mm_node_allocated(>compressed_fb))
-   i915_gem_stolen_remove_node(dev_priv, >compressed_fb);
+   i915_gem_stolen_remove_node(mem, >compressed_fb);
 
if (fbc->compressed_llb) {
-   i915_gem_stolen_remove_node(dev_priv, fbc->compressed_llb);
+   i915_gem_stolen_remove_node(mem, fbc->compressed_llb);
kfree(fbc->compressed_llb);
}
 }
@@ -1325,13 +1328,14 @@ static bool need_fbc_vtd_wa(struct drm_i915_private 
*dev_priv)
  */
 void intel_fbc_init(struct drm_i915_private *dev_priv)
 {
+   struct intel_memory_region *mem = 
dev_priv->mm.regions[INTEL_REGION_STOLEN];
struct intel_fbc *fbc = _priv->fbc;
 
INIT_WORK(>underrun_work, intel_fbc_underrun_work_fn);
mutex_init(>lock);
fbc->active = false;
 
-   if (!drm_mm_initialized(_priv->mm.stolen))
+   if (!drm_mm_initialized(>stolen))
mkwrite_device_info(dev_priv)->display.has_fbc = false;
 
if (need_fbc_vtd_wa(dev_priv))
diff --git 

[Intel-gfx] [PATCH 3/3] drm/i915/lmem: stop mapping the aperture for fake LMEM

[Matthew Auld]

Just map the region directly, otherwise we are just limiting ourselves
to the size of the mappable aperture. We still keep the same behaviour
with matching the size of the mappable_end, but that can now be
configured with its own modparam, such that we can configure larger
sizes.

Signed-off-by: Matthew Auld 
Cc: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_params.c |  2 +
 drivers/gpu/drm/i915/i915_params.h |  1 +
 drivers/gpu/drm/i915/intel_memory_region.h |  3 --
 drivers/gpu/drm/i915/intel_region_lmem.c   | 45 ++
 4 files changed, 14 insertions(+), 37 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c
index 1dd1f3652795..21be0f1ced82 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -182,6 +182,8 @@ i915_param_named(enable_gvt, bool, 0400,
 #if IS_ENABLED(CONFIG_DRM_I915_UNSTABLE_FAKE_LMEM)
 i915_param_named_unsafe(fake_lmem_start, ulong, 0600,
"Fake LMEM start offset (default: 0)");
+i915_param_named_unsafe(fake_lmem_size, ulong, 0600,
+   "Fake LMEM size (default: 0)");
 #endif
 
 static __always_inline void _print_param(struct drm_printer *p,
diff --git a/drivers/gpu/drm/i915/i915_params.h 
b/drivers/gpu/drm/i915/i915_params.h
index 31b88f297fbc..57078a45e6ba 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -67,6 +67,7 @@ struct drm_printer;
param(int, enable_dpcd_backlight, 0) \
param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE) \
param(unsigned long, fake_lmem_start, 0) \
+   param(unsigned long, fake_lmem_size, 0) \
/* leave bools at the end to not create holes */ \
param(bool, alpha_support, IS_ENABLED(CONFIG_DRM_I915_ALPHA_SUPPORT)) \
param(bool, enable_hangcheck, true) \
diff --git a/drivers/gpu/drm/i915/intel_memory_region.h 
b/drivers/gpu/drm/i915/intel_memory_region.h
index 0c8e35be76a3..6e0c0d4c100e 100644
--- a/drivers/gpu/drm/i915/intel_memory_region.h
+++ b/drivers/gpu/drm/i915/intel_memory_region.h
@@ -77,9 +77,6 @@ struct intel_memory_region {
struct io_mapping iomap;
struct resource region;
 
-   /* For fake LMEM */
-   struct drm_mm_node fake_mappable;
-
/* XXX: filthy midlayers */
struct drm_mm stolen;
struct i915_buddy_mm mm;
diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c 
b/drivers/gpu/drm/i915/intel_region_lmem.c
index e6a6b571dad4..aedffa2918c2 100644
--- a/drivers/gpu/drm/i915/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/intel_region_lmem.c
@@ -12,53 +12,29 @@
 static int init_fake_lmem_bar(struct intel_memory_region *mem)
 {
struct drm_i915_private *i915 = mem->i915;
-   struct i915_ggtt *ggtt = >ggtt;
-   unsigned long n;
-   int ret;
-
-   /* We want to 1:1 map the mappable aperture to our reserved region */
-
-   mem->fake_mappable.start = 0;
-   mem->fake_mappable.size = resource_size(>region);
-   mem->fake_mappable.color = I915_COLOR_UNEVICTABLE;
-
-   ret = drm_mm_reserve_node(>vm.mm, >fake_mappable);
-   if (ret)
-   return ret;
 
mem->remap_addr = dma_map_resource(>drm.pdev->dev,
   mem->region.start,
-  mem->fake_mappable.size,
+  resource_size(>region),
   PCI_DMA_BIDIRECTIONAL,
   DMA_ATTR_FORCE_CONTIGUOUS);
-   if (dma_mapping_error(>drm.pdev->dev, mem->remap_addr)) {
-   drm_mm_remove_node(>fake_mappable);
+   if (dma_mapping_error(>drm.pdev->dev, mem->remap_addr))
return -EINVAL;
-   }
-
-   for (n = 0; n < mem->fake_mappable.size >> PAGE_SHIFT; ++n) {
-   ggtt->vm.insert_page(>vm,
-mem->remap_addr + (n << PAGE_SHIFT),
-n << PAGE_SHIFT,
-I915_CACHE_NONE, 0);
-   }
 
mem->region = (struct resource)DEFINE_RES_MEM(mem->remap_addr,
- mem->fake_mappable.size);
+ 
resource_size(>region));
 
return 0;
 }
 
 static void release_fake_lmem_bar(struct intel_memory_region *mem)
 {
-   if (!drm_mm_node_allocated(>fake_mappable))
+   if (!i915_modparams.fake_lmem_start)
return;
 
-   drm_mm_remove_node(>fake_mappable);
-
dma_unmap_resource(>i915->drm.pdev->dev,
   mem->remap_addr,
-  mem->fake_mappable.size,
+  resource_size(>region),
   PCI_DMA_BIDIRECTIONAL,
   DMA_ATTR_FORCE_CONTIGUOUS);
 }
@@ -107,22 +83,23 @@ intel_setup_fake_lmem(struct drm_i915_private *i915)
struct pci_dev 

[Intel-gfx] [PATCH 2/3] drm/i915/gtt: refactor the storage assumptions around paging structures

[Matthew Auld]

We currently assume we have struct pages for the backing storage of our
paging structures, however in the future we may also want to support
allocating storage from non-page backed memory, while still being able
to map it into the kernel address space for CPU access.

Signed-off-by: Matthew Auld 
Cc: Chris Wilson 
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 109 +---
 drivers/gpu/drm/i915/i915_gem_gtt.h |   7 ++
 2 files changed, 88 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 1efe58ad0ce9..48b3b9e681c9 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -588,11 +588,20 @@ static void i915_address_space_init(struct 
i915_address_space *vm, int subclass)
INIT_LIST_HEAD(>bound_list);
 }
 
-static int __setup_page_dma(struct i915_address_space *vm,
-   struct i915_page_dma *p,
-   gfp_t gfp)
+static void *kmap_page_dma_system(const struct i915_page_dma *p)
+{
+   return kmap_atomic(p->page);
+}
+
+static void kunmap_page_dma_system(void *vaddr)
+{
+   kunmap_atomic(vaddr);
+}
+
+static int setup_page_dma_system(struct i915_address_space *vm,
+struct i915_page_dma *p)
 {
-   p->page = vm_alloc_page(vm, gfp | I915_GFP_ALLOW_FAIL);
+   p->page = vm_alloc_page(vm, __GFP_HIGHMEM | I915_GFP_ALLOW_FAIL);
if (unlikely(!p->page))
return -ENOMEM;
 
@@ -606,28 +615,54 @@ static int __setup_page_dma(struct i915_address_space *vm,
return -ENOMEM;
}
 
+   p->kmap = kmap_page_dma_system;
+   p->kunmap = kunmap_page_dma_system;
+
return 0;
 }
 
+static void cleanup_page_dma_system(struct i915_address_space *vm,
+   struct i915_page_dma *p)
+{
+   dma_unmap_page(vm->dma, p->daddr, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
+   vm_free_page(vm, p->page);
+}
+
+static int __setup_page_dma(struct i915_address_space *vm,
+   struct i915_page_dma *p)
+{
+   return vm->setup_page_dma(vm, p);
+}
+
 static int setup_page_dma(struct i915_address_space *vm,
  struct i915_page_dma *p)
 {
-   return __setup_page_dma(vm, p, __GFP_HIGHMEM);
+   return __setup_page_dma(vm, p);
 }
 
 static void cleanup_page_dma(struct i915_address_space *vm,
 struct i915_page_dma *p)
 {
-   dma_unmap_page(vm->dma, p->daddr, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
-   vm_free_page(vm, p->page);
+   vm->cleanup_page_dma(vm, p);
 }
 
-#define kmap_atomic_px(px) kmap_atomic(px_base(px)->page)
+static void kunmap_page_dma(const struct i915_page_dma *p, void *vaddr)
+{
+   p->kunmap(vaddr);
+}
+
+static void *kmap_page_dma(const struct i915_page_dma *p)
+{
+   return p->kmap(p);
+}
+
+#define kmap_atomic_px(px) kmap_page_dma(px_base(px))
+#define kunmap_atomic_px(px, vaddr) kunmap_page_dma(px_base(px), vaddr)
 
 static void
 fill_page_dma(const struct i915_page_dma *p, const u64 val, unsigned int count)
 {
-   kunmap_atomic(memset64(kmap_atomic(p->page), val, count));
+   kunmap_page_dma(p, memset64(kmap_page_dma(p), val, count));
 }
 
 #define fill_px(px, v) fill_page_dma(px_base(px), (v), PAGE_SIZE / sizeof(u64))
@@ -728,7 +763,7 @@ static struct i915_page_table *alloc_pt(struct 
i915_address_space *vm)
 {
struct i915_page_table *pt;
 
-   pt = kmalloc(sizeof(*pt), I915_GFP_ALLOW_FAIL);
+   pt = kzalloc(sizeof(*pt), I915_GFP_ALLOW_FAIL);
if (unlikely(!pt))
return ERR_PTR(-ENOMEM);
 
@@ -782,10 +817,10 @@ write_dma_entry(struct i915_page_dma * const pdma,
const unsigned short idx,
const u64 encoded_entry)
 {
-   u64 * const vaddr = kmap_atomic(pdma->page);
+   u64 * const vaddr = kmap_page_dma(pdma);
 
vaddr[idx] = encoded_entry;
-   kunmap_atomic(vaddr);
+   kunmap_page_dma(pdma, vaddr);
 }
 
 static inline void
@@ -1017,7 +1052,7 @@ static u64 __gen8_ppgtt_clear(struct i915_address_space * 
const vm,
memset64(vaddr + gen8_pd_index(start, 0),
 vm->scratch[0].encode,
 count);
-   kunmap_atomic(vaddr);
+   kunmap_atomic_px(pt, vaddr);
 
atomic_sub(count, >used);
start += count;
@@ -1184,10 +1219,12 @@ gen8_ppgtt_insert_pte(struct i915_ppgtt *ppgtt,
 {
struct i915_page_directory *pd;
const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level, flags);
+   struct i915_page_table *pt;
gen8_pte_t *vaddr;
 
pd = i915_pd_entry(pdp, gen8_pd_index(idx, 2));
-   vaddr = kmap_atomic_px(i915_pt_entry(pd, gen8_pd_index(idx, 1)));
+   pt = i915_pt_entry(pd, gen8_pd_index(idx, 1));
+   vaddr = kmap_atomic_px(pt);
 

Re: [Intel-gfx] [PATCH resend 2/2] drm/connector: Hookup the new drm_cmdline_mode panel_orientation member

[Rodrigo Vivi]

On Mon, Dec 16, 2019 at 12:51:58PM +0100, Hans de Goede wrote:
> If the new video=... panel_orientation option is set for a connector, honor
> it and setup a matching "panel orientation" property on the connector.
> 
> BugLink: https://gitlab.freedesktop.org/plymouth/plymouth/merge_requests/83
> Acked-by: Maxime Ripard 
> Signed-off-by: Hans de Goede 
> ---
>  drivers/gpu/drm/drm_connector.c | 7 +++
>  1 file changed, 7 insertions(+)
> 
> diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c
> index f4fa5c59717d..d9d7fef26275 100644
> --- a/drivers/gpu/drm/drm_connector.c
> +++ b/drivers/gpu/drm/drm_connector.c
> @@ -140,6 +140,13 @@ static void drm_connector_get_cmdline_mode(struct 
> drm_connector *connector)
>   connector->force = mode->force;
>   }
>  
> + if (mode->panel_orientation != DRM_MODE_PANEL_ORIENTATION_UNKNOWN) {
> + DRM_INFO("setting connector %s panel_orientation to %d\n",
> +  connector->name, mode->panel_orientation);

Since this overrides the standard behavior should this deserve a debug that
is a bit more clear that we are forcing the mode with the cmdline?

> + drm_connector_set_panel_orientation(connector,
> + mode->panel_orientation);
> + }
> +
>   DRM_DEBUG_KMS("cmdline mode for connector %s %s %dx%d@%dHz%s%s%s\n",
> connector->name, mode->name,
> mode->xres, mode->yres,
> -- 
> 2.23.0
> 
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Re: [Intel-gfx] [PATCH resend 1/2] drm/connector: Split out orientation quirk detection (v2)

[Rodrigo Vivi]

On Thu, Jan 02, 2020 at 10:35:28PM +0100, Hans de Goede wrote:
> Hi Rodrigo,
> 
> Thank you for the review.
> 
> On 02-01-2020 19:17, Rodrigo Vivi wrote:
> > On Mon, Dec 16, 2019 at 12:51:57PM +0100, Hans de Goede wrote:
> > > From: Derek Basehore 
> > > 
> > > Not every platform needs quirk detection for panel orientation, so
> > > split the drm_connector_init_panel_orientation_property into two
> > > functions. One for platforms without the need for quirks, and the
> > > other for platforms that need quirks.
> > > 
> > > Hans de Goede (changes in v2):
> > > 
> > > Rename the function from drm_connector_init_panel_orientation_property
> > > to drm_connector_set_panel_orientation[_with_quirk] and pass in the
> > > panel-orientation to set.
> > > 
> > > Beside the rename, also make the function set the passed in value
> > > only once, if the value was set before (to a value other then
> > > DRM_MODE_PANEL_ORIENTATION_UNKNOWN) make any further set calls a no-op.
> > > 
> > > This change is preparation for allowing the user to override the
> > > panel-orientation for any connector from the kernel commandline.
> > > When the panel-orientation is overridden this way, then we must ignore
> > > the panel-orientation detection done by the driver.
> > > 
> > > Signed-off-by: Derek Basehore 
> > > Signed-off-by: Hans de Goede 
> > > ---
> > >   drivers/gpu/drm/drm_connector.c | 74 ++---
> > >   drivers/gpu/drm/i915/display/icl_dsi.c  |  5 +-
> > >   drivers/gpu/drm/i915/display/intel_dp.c |  9 ++-
> > >   drivers/gpu/drm/i915/display/vlv_dsi.c  |  5 +-
> > >   include/drm/drm_connector.h |  9 ++-
> > >   5 files changed, 71 insertions(+), 31 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/drm_connector.c 
> > > b/drivers/gpu/drm/drm_connector.c
> > > index 0965632008a9..f4fa5c59717d 100644
> > > --- a/drivers/gpu/drm/drm_connector.c
> > > +++ b/drivers/gpu/drm/drm_connector.c
> > > @@ -1139,7 +1139,8 @@ static const struct drm_prop_enum_list 
> > > dp_colorspaces[] = {
> > >*  coordinates, so if userspace rotates the picture to adjust for
> > >*  the orientation it must also apply the same transformation to 
> > > the
> > >*  touchscreen input coordinates. This property is initialized by 
> > > calling
> > > - *   drm_connector_init_panel_orientation_property().
> > > + *   drm_connector_set_panel_orientation() or
> > > + *   drm_connector_set_panel_orientation_with_quirk()
> > 
> > do we have a better name than quirks for these dsi modes?
> 
> The difference between the 2 functions is that the second one calls
> drm_get_panel_orientation_quirk() and that if that returns a valid
> orientation it overwrites the passed orientation with the return value
> from drm_get_panel_orientation_quirk(), so the name seems correct.
> 
> As for drm_get_panel_orientation_quirk() itself that currently is only
> defined on x86 (it is a static inline no-op elsewhere) and it used
> DMI string matching to check for a model specific quirk. So again the
> name seems correct.
> 
> > >*
> > >* scaling mode:
> > >*  This property defines how a non-native mode is upscaled to the 
> > > native
> > > @@ -2046,38 +2047,41 @@ void drm_connector_set_vrr_capable_property(
> > >   EXPORT_SYMBOL(drm_connector_set_vrr_capable_property);
> > >   /**
> > > - * drm_connector_init_panel_orientation_property -
> > > - *   initialize the connecters panel_orientation property
> > > - * @connector: connector for which to init the panel-orientation 
> > > property.
> > > - * @width: width in pixels of the panel, used for panel quirk detection
> > > - * @height: height in pixels of the panel, used for panel quirk detection
> > > + * drm_connector_set_panel_orientation - sets the connecter's 
> > > panel_orientation
> > > + * @connector: connector for which to set the panel-orientation property.
> > > + * @panel_orientation: drm_panel_orientation value to set
> > > + *
> > > + * This function sets the connector's panel_orientation and attaches
> > > + * a "panel orientation" property to the connector.
> > >*
> > > - * This function should only be called for built-in panels, after setting
> > > - * connector->display_info.panel_orientation first (if known).
> > > + * Calling this function on a connector where the panel_orientation has
> > > + * already been set is a no-op (e.g. the orientation has been overridden 
> > > with
> > > + * a kernel commandline option).
> > >*
> > > - * This function will check for platform specific (e.g. DMI based) quirks
> > > - * overriding display_info.panel_orientation first, then if 
> > > panel_orientation
> > > - * is not DRM_MODE_PANEL_ORIENTATION_UNKNOWN it will attach the
> > > - * "panel orientation" property to the connector.
> > > + * It is allowed to call this function with a panel_orientation of
> > > + * DRM_MODE_PANEL_ORIENTATION_UNKNOWN, in which case it is a no-op.
> > >*
> > >* Returns:
> > >* 

[Intel-gfx] ✓ Fi.CI.BAT: success for Fixes coccicheck warnings

[Patchwork]

== Series Details ==

Series: Fixes coccicheck warnings
URL   : https://patchwork.freedesktop.org/series/71610/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7674 -> Patchwork_15990


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/index.html

Known issues


  Here are the changes found in Patchwork_15990 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live_execlists:
- fi-kbl-soraka:  [PASS][1] -> [DMESG-FAIL][2] ([i915#656])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/fi-kbl-soraka/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_gem_contexts:
- fi-cfl-guc: [PASS][3] -> [INCOMPLETE][4] ([fdo#106070] / 
[i915#424])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/fi-cfl-guc/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2:  [PASS][5] -> [FAIL][6] ([i915#217])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html
- fi-kbl-7500u:   [PASS][7] -> [FAIL][8] ([fdo#111407])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
 Possible fixes 

  * igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6700k2:  [INCOMPLETE][9] ([i915#671]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
- fi-kbl-7500u:   [INCOMPLETE][11] ([i915#879]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-7500u/igt@i915_module_l...@reload-with-fault-injection.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/fi-kbl-7500u/igt@i915_module_l...@reload-with-fault-injection.html

  * igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][13] ([i915#725]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/fi-hsw-4770/igt@i915_selftest@live_blt.html

  
  [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
  [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424
  [i915#656]: https://gitlab.freedesktop.org/drm/intel/issues/656
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879


Participating hosts (46 -> 39)
--

  Additional (3): fi-hsw-4770r fi-ilk-650 fi-elk-e7500 
  Missing(10): fi-ehl-1 fi-hsw-4200u fi-bwr-2160 fi-ctg-p8600 fi-gdg-551 
fi-skl-lmem fi-bdw-samus fi-tgl-y fi-byt-clapper fi-skl-6600u 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7674 -> Patchwork_15990

  CI-20190529: 20190529
  CI_DRM_7674: 6cdc2db5a5641dd00f47fcc80b83bb8adb97 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5357: a555a4b98f90dab655d24bb3d07e9291a8b8dac8 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15990: 046a316c510f924c9ec1aba9ea1e9d7df57c619e @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

046a316c510f drm/i915: use true, false for bool variable in intel_crt.c
ebe144f9e552 drm/i915/dp: use true, false for bool variable in intel_dp.c
cdee1810cd36 drm/i915: use true, false for bool variable in i915_debugfs.c

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15990/index.html
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Re: [Intel-gfx] [PATCH 2/2] drm/i915/selftests: Extend fault handler selftests to all memory regions

[Chris Wilson]

Quoting Chris Wilson (2020-01-03 12:15:05)
> From: Abdiel Janulgue 
> 
> Instead of testing individually our new fault handlers, iterate over all
> memory regions and test all from one interface.
> 
> Signed-off-by: Abdiel Janulgue 
> Cc: Matthew Auld 
> Cc: Chris Wilson 
> Cc: Joonas Lahtinen 
> ---
> We also need an igt_mmap_gpu to truly test lmem.

But not strictly necessary since we compare using discontguous pin_map()
which we have validated as being what the GPU sees.
-Chris
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[Intel-gfx] [PATCH 3/3] drm/i915: use true, false for bool variable in intel_crt.c

[Ma Feng]

Fixes coccicheck warning:

drivers/gpu/drm/i915/display/intel_crt.c:1066:1-28: WARNING: Assignment of 0/1 
to bool variable
drivers/gpu/drm/i915/display/intel_crt.c:928:2-29: WARNING: Assignment of 0/1 
to bool variable
drivers/gpu/drm/i915/display/intel_crt.c:443:2-29: WARNING: Assignment of 0/1 
to bool variable

Reported-by: Hulk Robot 
Signed-off-by: Ma Feng 
---
 drivers/gpu/drm/i915/display/intel_crt.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_crt.c 
b/drivers/gpu/drm/i915/display/intel_crt.c
index b2b1336..8596eef 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -440,7 +440,7 @@ static bool intel_ironlake_crt_detect_hotplug(struct 
drm_connector *connector)
bool turn_off_dac = HAS_PCH_SPLIT(dev_priv);
u32 save_adpa;

-   crt->force_hotplug_required = 0;
+   crt->force_hotplug_required = false;

save_adpa = adpa = I915_READ(crt->adpa_reg);
DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", 
adpa);
@@ -925,7 +925,7 @@ void intel_crt_reset(struct drm_encoder *encoder)
POSTING_READ(crt->adpa_reg);

DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa);
-   crt->force_hotplug_required = 1;
+   crt->force_hotplug_required = true;
}

 }
@@ -1063,7 +1063,7 @@ void intel_crt_init(struct drm_i915_private *dev_priv)
/*
 * Configure the automatic hotplug detection stuff
 */
-   crt->force_hotplug_required = 0;
+   crt->force_hotplug_required = false;

/*
 * TODO: find a proper way to discover whether we need to set the the
--
2.6.2

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[Intel-gfx] [PATCH 1/3] drm/i915: use true, false for bool variable in i915_debugfs.c

[Ma Feng]

Fixes coccicheck warning:

drivers/gpu/drm/i915/i915_debugfs.c:3078:4-36: WARNING: Assignment of 0/1 to 
bool variable
drivers/gpu/drm/i915/i915_debugfs.c:3078:4-36: WARNING: Assignment of 0/1 to 
bool variable
drivers/gpu/drm/i915/i915_debugfs.c:3080:4-36: WARNING: Assignment of 0/1 to 
bool variable
drivers/gpu/drm/i915/i915_debugfs.c:3080:4-36: WARNING: Assignment of 0/1 to 
bool variable

Reported-by: Hulk Robot 
Signed-off-by: Ma Feng 
---
 drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index d28468e..4ead86a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -3075,9 +3075,9 @@ static ssize_t i915_displayport_test_active_write(struct 
file *file,
 * testing code, only accept an actual value of 1 here
 */
if (val == 1)
-   intel_dp->compliance.test_active = 1;
+   intel_dp->compliance.test_active = true;
else
-   intel_dp->compliance.test_active = 0;
+   intel_dp->compliance.test_active = false;
}
}
drm_connector_list_iter_end(_iter);
--
2.6.2

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[Intel-gfx] [PATCH 2/3] drm/i915/dp: use true, false for bool variable in intel_dp.c

[Ma Feng]

Fixes coccicheck warning:

drivers/gpu/drm/i915/display/intel_dp.c:4950:1-33: WARNING: Assignment of 0/1 
to bool variable
drivers/gpu/drm/i915/display/intel_dp.c:4906:1-33: WARNING: Assignment of 0/1 
to bool variable

Reported-by: Hulk Robot 
Signed-off-by: Ma Feng 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 2f31d22..4fd0fcd 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4903,7 +4903,7 @@ static u8 intel_dp_autotest_video_pattern(struct intel_dp 
*intel_dp)
intel_dp->compliance.test_data.hdisplay = be16_to_cpu(h_width);
intel_dp->compliance.test_data.vdisplay = be16_to_cpu(v_height);
/* Set test active flag here so userspace doesn't interrupt things */
-   intel_dp->compliance.test_active = 1;
+   intel_dp->compliance.test_active = true;

return DP_TEST_ACK;
 }
@@ -4947,7 +4947,7 @@ static u8 intel_dp_autotest_edid(struct intel_dp 
*intel_dp)
}

/* Set test active flag here so userspace doesn't interrupt things */
-   intel_dp->compliance.test_active = 1;
+   intel_dp->compliance.test_active = true;

return test_result;
 }
--
2.6.2

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[Intel-gfx] [PATCH 0/3] Fixes coccicheck warnings

[Ma Feng]

Ma Feng (3):
  drm/i915: use true,false for bool variable in i915_debugfs.c
  drm/i915/dp: use true,false for bool variable in intel_dp.c
  drm/i915: use true,false for bool variable in intel_crt.c

 drivers/gpu/drm/i915/display/intel_crt.c | 6 +++---
 drivers/gpu/drm/i915/display/intel_dp.c  | 4 ++--
 drivers/gpu/drm/i915/i915_debugfs.c  | 4 ++--
 3 files changed, 7 insertions(+), 7 deletions(-)

--
2.6.2

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[Intel-gfx] USB Type-C monitor flashes once when play a video file after unplug and re-plug the monitor

[AJ_Cheng]

Hi Sirs,
Here is chromebook SW team from Compal.
As the mail title, we hit issue that the external monitor will flash once when 
play video after hot pluging.
We can reproduce not only on chromebook but also ubuntu 16.04.
There has higher failure rate with Dell Solomon dock and Dell S2718D monitor.

We found adding the delay in "sound/pci/hda/patch_hdmi.c " can fix this 
issue.(as the attachment)
May need your help to review and advice. Thanks.

Here is the issue number in gitlab for more detail.
https://gitlab.freedesktop.org/drm/intel/issues/318



AJ Cheng
NID/NID1
e-mail: aj_ch...@compal.com
Tel:  +886-2-8797-8599 ext. 17561
Mobile : +886-932827829
COMPAL Electronics, Inc.



flash_once.diff
Description: flash_once.diff
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[Intel-gfx] [PATCH i-g-t] i915/perf: Find the associated perf-type for a particular device

[Chris Wilson]

Since with multiple devices, we may have multiple different perf_pmu
each with their own type, we want to find the right one for the job.

The tests are run with a specific fd, from which we can extract the
appropriate bus-id and find the associated perf-type. The performance
monitoring tools are a little more general and not yet ready to probe
all device or bind to one in particular, so we just assume the default
igfx for the time being.

Signed-off-by: Chris Wilson 
Cc: "Robert M. Fosha" 
Cc: Tvrtko Ursulin 
Cc: Michal Wajdeczko 
---
 benchmarks/gem_wsim.c  |  4 +-
 lib/igt_perf.c | 66 +++---
 lib/igt_perf.h | 13 --
 overlay/gem-interrupts.c   |  2 +-
 overlay/gpu-freq.c |  4 +-
 overlay/gpu-top.c  | 12 ++---
 overlay/rc6.c  |  2 +-
 tests/i915/gem_ctx_freq.c  |  2 +-
 tests/i915/gem_ctx_sseu.c  |  2 +-
 tests/i915/gem_exec_balancer.c | 18 +---
 tests/perf_pmu.c   | 84 ++
 tools/intel_gpu_top.c  |  2 +-
 12 files changed, 141 insertions(+), 70 deletions(-)

diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index 6305e0d7a..9156fdc90 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -2268,8 +2268,8 @@ busy_init(const struct workload_balancer *balancer, 
struct workload *wrk)
for (d = [0]; d->id != VCS; d++) {
int pfd;
 
-   pfd = perf_i915_open_group(I915_PMU_ENGINE_BUSY(d->class,
-   d->inst),
+   pfd = perf_igfx_open_group(I915_PMU_ENGINE_BUSY(d->class,
+   d->inst),
   bb->fd);
if (pfd < 0) {
if (d->id != VCS2)
diff --git a/lib/igt_perf.c b/lib/igt_perf.c
index e3dec2cc2..4922a2df7 100644
--- a/lib/igt_perf.c
+++ b/lib/igt_perf.c
@@ -4,17 +4,59 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include "igt_perf.h"
 
-uint64_t i915_type_id(void)
+const char *i915_perf_device(int i915, char *buf, int buflen)
+{
+   drm_unique_t u = {
+   .unique = buf + 1,
+   .unique_len = buflen - 1,
+   };
+   drm_set_version_t sv = {
+   .drm_di_major = 1,
+   .drm_di_minor = 4,
+   .drm_dd_major = -1,/* Don't care */
+   .drm_dd_minor = -1,/* Don't care */
+   };
+
+   if (ioctl(i915, DRM_IOCTL_SET_VERSION, ))
+   return "i915";
+
+   memset(buf, 0, buflen);
+   ioctl(i915, DRM_IOCTL_GET_UNIQUE, );
+
+   if (u.unique_len >= buflen)
+   return NULL;
+
+   if (strncmp(buf + 1, "pci:", 4))
+   return NULL;
+
+   if (strcmp(buf + 1, "pci::00:02.0") == 0)
+   return "i915";
+
+   return memcpy(buf, "i915-", strlen("i915-"));
+}
+
+uint64_t i915_perf_type_id(int i915)
+{
+   char buf[80];
+
+   return igt_perf_type_id(i915_perf_device(i915, buf, sizeof(buf)));
+}
+
+uint64_t igt_perf_type_id(const char *device)
 {
char buf[64];
ssize_t ret;
int fd;
 
-   fd = open("/sys/bus/event_source/devices/i915/type", O_RDONLY);
+   snprintf(buf, sizeof(buf),
+"/sys/bus/event_source/devices/%s/type", device);
+
+   fd = open(buf, O_RDONLY);
if (fd < 0)
return 0;
 
@@ -52,15 +94,27 @@ _perf_open(uint64_t type, uint64_t config, int group, 
uint64_t format)
return ret;
 }
 
-int perf_i915_open(uint64_t config)
+int perf_igfx_open(uint64_t config)
+{
+   return _perf_open(igt_perf_type_id("i915"), config, -1,
+ PERF_FORMAT_TOTAL_TIME_ENABLED);
+}
+
+int perf_igfx_open_group(uint64_t config, int group)
+{
+   return _perf_open(igt_perf_type_id("i915"), config, group,
+ PERF_FORMAT_TOTAL_TIME_ENABLED | PERF_FORMAT_GROUP);
+}
+
+int perf_i915_open(int i915, uint64_t config)
 {
-   return _perf_open(i915_type_id(), config, -1,
+   return _perf_open(i915_perf_type_id(i915), config, -1,
  PERF_FORMAT_TOTAL_TIME_ENABLED);
 }
 
-int perf_i915_open_group(uint64_t config, int group)
+int perf_i915_open_group(int i915, uint64_t config, int group)
 {
-   return _perf_open(i915_type_id(), config, group,
+   return _perf_open(i915_perf_type_id(i915), config, group,
  PERF_FORMAT_TOTAL_TIME_ENABLED | PERF_FORMAT_GROUP);
 }
 
diff --git a/lib/igt_perf.h b/lib/igt_perf.h
index e00718f47..a8328c70c 100644
--- a/lib/igt_perf.h
+++ b/lib/igt_perf.h
@@ -51,10 +51,17 @@ perf_event_open(struct perf_event_attr *attr,
 return syscall(__NR_perf_event_open, attr, pid, cpu, group_fd, flags);
 }
 
-uint64_t i915_type_id(void);
-int perf_i915_open(uint64_t config);
-int perf_i915_open_group(uint64_t config, int group);

Re: [Intel-gfx] [PATCH] drm/i915: Remove nest annotation from intel_context_unpin

[Chris Wilson]

Quoting Maarten Lankhorst (2020-01-03 16:29:53)
> Lets see what breaks, round 3?

https://patchwork.freedesktop.org/patch/347285/?series=71568=1
-Chris
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Remove nest annotation from intel_context_unpin (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915: Remove nest annotation from intel_context_unpin (rev3)
URL   : https://patchwork.freedesktop.org/series/71157/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7674 -> Patchwork_15989


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_15989 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_15989, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_15989:

### IGT changes ###

 Possible regressions 

  * igt@gem_ctx_create@basic-files:
- fi-byt-n2820:   NOTRUN -> [DMESG-WARN][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-byt-n2820/igt@gem_ctx_cre...@basic-files.html
- fi-hsw-4770:[PASS][2] -> [DMESG-WARN][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-hsw-4770/igt@gem_ctx_cre...@basic-files.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-hsw-4770/igt@gem_ctx_cre...@basic-files.html
- fi-ivb-3770:[PASS][4] -> [DMESG-WARN][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-ivb-3770/igt@gem_ctx_cre...@basic-files.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-ivb-3770/igt@gem_ctx_cre...@basic-files.html
- fi-hsw-peppy:   [PASS][6] -> [DMESG-WARN][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-hsw-peppy/igt@gem_ctx_cre...@basic-files.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-hsw-peppy/igt@gem_ctx_cre...@basic-files.html
- fi-hsw-4770r:   NOTRUN -> [DMESG-WARN][8]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-hsw-4770r/igt@gem_ctx_cre...@basic-files.html
- fi-byt-j1900:   [PASS][9] -> [DMESG-WARN][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-byt-j1900/igt@gem_ctx_cre...@basic-files.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-byt-j1900/igt@gem_ctx_cre...@basic-files.html

  * igt@gem_exec_gttfill@basic:
- fi-kbl-x1275:   [PASS][11] -> [DMESG-WARN][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-x1275/igt@gem_exec_gttf...@basic.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-kbl-x1275/igt@gem_exec_gttf...@basic.html
- fi-icl-u3:  [PASS][13] -> [DMESG-WARN][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-icl-u3/igt@gem_exec_gttf...@basic.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-icl-u3/igt@gem_exec_gttf...@basic.html
- fi-kbl-8809g:   [PASS][15] -> [DMESG-WARN][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-8809g/igt@gem_exec_gttf...@basic.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-kbl-8809g/igt@gem_exec_gttf...@basic.html
- fi-icl-y:   [PASS][17] -> [DMESG-WARN][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-icl-y/igt@gem_exec_gttf...@basic.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-icl-y/igt@gem_exec_gttf...@basic.html
- fi-blb-e6850:   [PASS][19] -> [DMESG-WARN][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-blb-e6850/igt@gem_exec_gttf...@basic.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-blb-e6850/igt@gem_exec_gttf...@basic.html
- fi-kbl-7500u:   [PASS][21] -> [DMESG-WARN][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-7500u/igt@gem_exec_gttf...@basic.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-kbl-7500u/igt@gem_exec_gttf...@basic.html
- fi-kbl-guc: [PASS][23] -> [DMESG-WARN][24]
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-guc/igt@gem_exec_gttf...@basic.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-kbl-guc/igt@gem_exec_gttf...@basic.html
- fi-icl-dsi: [PASS][25] -> [DMESG-WARN][26]
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-icl-dsi/igt@gem_exec_gttf...@basic.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-icl-dsi/igt@gem_exec_gttf...@basic.html
- fi-cml-u2:  [PASS][27] -> [DMESG-WARN][28]
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-cml-u2/igt@gem_exec_gttf...@basic.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15989/fi-cml-u2/igt@gem_exec_gttf...@basic.html
- fi-skl-6600u:   [PASS][29] -> [DMESG-WARN][30]
   [29]: 

Re: [Intel-gfx] [PATCH] drm/i915/display: nuke skl workaround for pre-production hw

[Ruhl, Michael J]

>-Original Message-
>From: Intel-gfx  On Behalf Of Lucas
>De Marchi
>Sent: Friday, December 20, 2019 5:07 PM
>To: intel-gfx@lists.freedesktop.org
>Subject: [Intel-gfx] [PATCH] drm/i915/display: nuke skl workaround for pre-
>production hw
>
>According to intel_detect_preproduction_hw(), the SKL steeping D0 is

s/steeping/stepping/

?

M

>still pre-preproduction so we can nuke the additional workaround.
>
>While at it, nuke dangling new line.
>
>Signed-off-by: Lucas De Marchi 
>---
> drivers/gpu/drm/i915/display/intel_display.c | 9 +
> 1 file changed, 1 insertion(+), 8 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>b/drivers/gpu/drm/i915/display/intel_display.c
>index e6702b9b9117..4aa7dfa88c7c 100644
>--- a/drivers/gpu/drm/i915/display/intel_display.c
>+++ b/drivers/gpu/drm/i915/display/intel_display.c
>@@ -16018,14 +16018,8 @@ static void intel_setup_outputs(struct
>drm_i915_private *dev_priv)
>   if (intel_ddi_crt_present(dev_priv))
>   intel_crt_init(dev_priv);
>
>-  /*
>-   * Haswell uses DDI functions to detect digital outputs.
>-   * On SKL pre-D0 the strap isn't connected, so we assume
>-   * it's there.
>-   */
>   found = I915_READ(DDI_BUF_CTL(PORT_A)) &
>DDI_INIT_DISPLAY_DETECTED;
>-  /* WaIgnoreDDIAStrap: skl */
>-  if (found || IS_GEN9_BC(dev_priv))
>+  if (found)
>   intel_ddi_init(dev_priv, PORT_A);
>
>   /* DDI B, C, D, and F detection is indicated by the
>SFUSE_STRAP
>@@ -16046,7 +16040,6 @@ static void intel_setup_outputs(struct
>drm_i915_private *dev_priv)
>   if (IS_GEN9_BC(dev_priv) &&
>   intel_bios_is_port_present(dev_priv, PORT_E))
>   intel_ddi_init(dev_priv, PORT_E);
>-
>   } else if (HAS_PCH_SPLIT(dev_priv)) {
>   int found;
>
>--
>2.24.0
>
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[Intel-gfx] [PATCH] drm/i915: Remove nest annotation from intel_context_unpin

[Maarten Lankhorst]

Lets see what breaks, round 3?

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/intel_context.c   | 27 +--
 drivers/gpu/drm/i915/gt/intel_context_types.h |  1 +
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_context.c 
b/drivers/gpu/drm/i915/gt/intel_context.c
index fbaa9df6f436..671049695e6b 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -47,21 +47,30 @@ int __intel_context_do_pin(struct intel_context *ce)
 {
int err;
 
-   if (mutex_lock_interruptible(>pin_mutex))
-   return -EINTR;
-
-   if (likely(!atomic_read(>pin_count))) {
-   intel_wakeref_t wakeref;
+   if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, >flags))) {
+   err = mutex_lock_interruptible(>alloc_mutex);
+   if (err)
+   return err;
 
-   if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, >flags))) {
+   if (!test_bit(CONTEXT_ALLOC_BIT, >flags)) {
err = ce->ops->alloc(ce);
if (unlikely(err))
goto err;
 
+   smp_mb(); /* Make sure allocation is flushed to memory 
*/
+
__set_bit(CONTEXT_ALLOC_BIT, >flags);
}
+   mutex_unlock(>alloc_mutex);
+   }
+
+   err = mutex_lock_interruptible(>pin_mutex);
+   if (err)
+   return err;
+
+   if (likely(!atomic_read(>pin_count))) {
+   intel_wakeref_t wakeref;
 
-   err = 0;
with_intel_runtime_pm(ce->engine->uncore->rpm, wakeref)
err = ce->ops->pin(ce);
if (err)
@@ -91,7 +100,7 @@ void intel_context_unpin(struct intel_context *ce)
 
/* We may be called from inside intel_context_pin() to evict another */
intel_context_get(ce);
-   mutex_lock_nested(>pin_mutex, SINGLE_DEPTH_NESTING);
+   mutex_lock(>pin_mutex);
 
if (likely(atomic_dec_and_test(>pin_count))) {
CE_TRACE(ce, "retire\n");
@@ -228,6 +237,7 @@ intel_context_init(struct intel_context *ce,
INIT_LIST_HEAD(>signals);
 
mutex_init(>pin_mutex);
+   mutex_init(>alloc_mutex);
 
i915_active_init(>active,
 __intel_context_active, __intel_context_retire);
@@ -239,6 +249,7 @@ void intel_context_fini(struct intel_context *ce)
intel_timeline_put(ce->timeline);
i915_vm_put(ce->vm);
 
+   mutex_destroy(>alloc_mutex);
mutex_destroy(>pin_mutex);
i915_active_fini(>active);
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h 
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index ca1420fb8b53..abae296980fa 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -72,6 +72,7 @@ struct intel_context {
 
atomic_t pin_count;
struct mutex pin_mutex; /* guards pinning and associated on-gpuing */
+   struct mutex alloc_mutex; /* guards against concurrent contex 
allocation */
 
/**
 * active: Active tracker for the rq activity (inc. external) on this
-- 
2.24.1

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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dp: Fix incorrect test parameter for DP link layer compliance

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Fix incorrect test parameter for DP link layer compliance
URL   : https://patchwork.freedesktop.org/series/71587/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7671_full -> Patchwork_15984_full


Summary
---

  **SUCCESS**

  No regressions found.

  

New tests
-

  New tests have been introduced between CI_DRM_7671_full and 
Patchwork_15984_full:

### New Piglit tests (10) ###

  * spec@arb_draw_buffers@fbo-mrt-new-bind:
- Statuses : 1 fail(s)
- Exec time: [0.12] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-double_dmat4x2-float_vec3-position:
- Statuses : 1 fail(s)
- Exec time: [0.16] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-float_mat3x2_array3-double_dvec3_array2-position:
- Statuses : 1 fail(s)
- Exec time: [0.16] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_double-uint_uvec3:
- Statuses : 1 fail(s)
- Exec time: [0.15] s

  * spec@ext_framebuffer_object@fbo-copyteximage:
- Statuses : 1 fail(s)
- Exec time: [5.85] s

  * spec@ext_framebuffer_object@fbo-stencil-gl_stencil_index4-drawpixels:
- Statuses : 1 fail(s)
- Exec time: [0.09] s

  * spec@ext_framebuffer_object@fbo-stencil-gl_stencil_index8-drawpixels:
- Statuses : 1 fail(s)
- Exec time: [0.07] s

  * spec@ext_texture_compression_s3tc@s3tc-targeted:
- Statuses : 1 fail(s)
- Exec time: [0.09] s

  * spec@ext_transform_feedback@position-render-bufferbase:
- Statuses : 1 fail(s)
- Exec time: [0.09] s

  * spec@glsl-4.20@execution@vs_in@vs-input-double_dmat3-position-double_dvec2:
- Statuses : 1 fail(s)
- Exec time: [0.14] s

  

Known issues


  Here are the changes found in Patchwork_15984_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_busy@busy-vcs1:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +11 similar 
issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/shard-iclb1/igt@gem_b...@busy-vcs1.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/shard-iclb8/igt@gem_b...@busy-vcs1.html

  * igt@gem_ctx_isolation@vcs1-clean:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) 
+2 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/shard-iclb1/igt@gem_ctx_isolat...@vcs1-clean.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/shard-iclb8/igt@gem_ctx_isolat...@vcs1-clean.html

  * igt@gem_ctx_persistence@bcs0-mixed-process:
- shard-apl:  [PASS][5] -> [FAIL][6] ([i915#679])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/shard-apl7/igt@gem_ctx_persiste...@bcs0-mixed-process.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/shard-apl4/igt@gem_ctx_persiste...@bcs0-mixed-process.html

  * igt@gem_ctx_shared@q-smoketest-bsd:
- shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([i915#461])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/shard-tglb7/igt@gem_ctx_sha...@q-smoketest-bsd.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/shard-tglb9/igt@gem_ctx_sha...@q-smoketest-bsd.html

  * igt@gem_exec_create@forked:
- shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([fdo#108838] / 
[i915#435])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/shard-tglb1/igt@gem_exec_cre...@forked.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/shard-tglb3/igt@gem_exec_cre...@forked.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +10 similar 
issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/shard-iclb3/igt@gem_exec_sched...@preempt-other-chain-bsd.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/shard-iclb1/igt@gem_exec_sched...@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-chain-render:
- shard-tglb: [PASS][13] -> [INCOMPLETE][14] ([fdo#111606] / 
[fdo#111677])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/shard-tglb1/igt@gem_exec_sched...@preempt-queue-chain-render.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/shard-tglb2/igt@gem_exec_sched...@preempt-queue-chain-render.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrashing:
- shard-iclb: [PASS][15] -> [TIMEOUT][16] ([i915#530])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7671/shard-iclb6/igt@gem_persistent_rel...@forked-faulting-reloc-thrashing.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15984/shard-iclb4/igt@gem_persistent_rel...@forked-faulting-reloc-thrashing.html

  * igt@gem_persistent_relocs@forked-interruptible:
- shard-skl:  [PASS][17] -> [FAIL][18] ([i915#520])
   [17]: 

Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only

[Kai Vehmanen]

Hi,

On Thu, 2 Jan 2020, Rodrigo Vivi wrote:

> On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote:
>> Revert changes done in commit f6ec9483091f ("drm/i915: extend audio
>> CDCLK>=2*BCLK constraint to more platforms"). Audio drivers
[...]
>>  /* Force CDCLK to 2*BCLK as long as we need audio powered. */
>> -if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
>> +if (IS_GEMINILAKE(dev_priv))
> 
> I believe for correctness we should at least say this is for display_10 but
> since we don't have display gen defined probably the right thing to do here
> is to at least replace this per:
> 
> IS_GEN(dev_priv, 10) || IS_GEMINILAKE(dev_priv)

I checked the cdclk tables for CNL in intel_cdclk.c and minimum CDCLK
is 168kHz, so it is similar (>BCLK and close to 2*BCLK) as ICL and 
others and the workaround is not needed.

I do agree this still smells funny, but basicly my naive attempt to align 
with the spec failed in wider testing and it seems this original solution 
to have the WA for GLK only, is the least bad option at this point.

Possible longer term solutions for this: 
   (i) more clock configurations allowing to bump the freq without
   a mode change on all platforms
   (ii) avoid all HDA communication at probe time and only initialize
the HDA connection when a monitor is connected 
   (iii) guarantee min cdclk to be sufficient for HDA communication

Closing on feasibility of (i) and (iii) is going to be a longer 
discussion.

The (ii) option would be quite a big change on audio side and might
potentially require changes to drm_audio_component.h (and impact other
drivers). To me, this feels wrong, the HDA bus supports discovery of
codecs, so we should be able to use it as with any HDA codec, including
graphics. Unless we hit deadends with (i) and (iii), I'd rather 
not pursue this path.

Br, Kai
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[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/1] drm/i915/hdcp: restore hdcp state same as previous

[Patchwork]

== Series Details ==

Series: series starting with [1/1] drm/i915/hdcp: restore hdcp state same as 
previous
URL   : https://patchwork.freedesktop.org/series/71602/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7674 -> Patchwork_15987


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_15987 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_15987, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_15987:

### IGT changes ###

 Possible regressions 

  * igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275:   [PASS][1] -> [DMESG-WARN][2] +2 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/fi-kbl-x1275/igt@i915_pm_...@module-reload.html

  * igt@i915_selftest@live_gt_pm:
- fi-icl-dsi: [PASS][3] -> [DMESG-FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-icl-dsi/igt@i915_selftest@live_gt_pm.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/fi-icl-dsi/igt@i915_selftest@live_gt_pm.html

  * igt@i915_selftest@live_uncore:
- fi-kbl-x1275:   [PASS][5] -> [INCOMPLETE][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-x1275/igt@i915_selftest@live_uncore.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/fi-kbl-x1275/igt@i915_selftest@live_uncore.html

  
Known issues


  Here are the changes found in Patchwork_15987 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_module_load@reload-with-fault-injection:
- fi-bxt-dsi: [PASS][7] -> [INCOMPLETE][8] ([fdo#103927])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/fi-bxt-dsi/igt@i915_module_l...@reload-with-fault-injection.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [PASS][9] -> [FAIL][10] ([fdo#111096] / [i915#323])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
 Possible fixes 

  * igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6700k2:  [INCOMPLETE][11] ([i915#671]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/fi-skl-6700k2/igt@i915_module_l...@reload-with-fault-injection.html
- fi-skl-6770hq:  [INCOMPLETE][13] ([i915#671]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html
- fi-kbl-7500u:   [INCOMPLETE][15] ([i915#879]) -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-kbl-7500u/igt@i915_module_l...@reload-with-fault-injection.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/fi-kbl-7500u/igt@i915_module_l...@reload-with-fault-injection.html

  * igt@i915_selftest@live_blt:
- fi-hsw-4770:[DMESG-FAIL][17] ([i915#725]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7674/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15987/fi-hsw-4770/igt@i915_selftest@live_blt.html

  
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#879]: https://gitlab.freedesktop.org/drm/intel/issues/879


Participating hosts (46 -> 40)
--

  Additional (5): fi-hsw-4770r fi-bsw-n3050 fi-ilk-650 fi-elk-e7500 
fi-byt-n2820 
  Missing(11): fi-kbl-soraka fi-hsw-4200u fi-hsw-peppy fi-glk-dsi 
fi-ctg-p8600 fi-bsw-kefka fi-blb-e6850 fi-tgl-y fi-byt-clapper fi-bdw-samus 
fi-snb-2600 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7674 -> Patchwork_15987

  

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Remove nest annotation from intel_context_unpin (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Remove nest annotation from intel_context_unpin (rev2)
URL   : https://patchwork.freedesktop.org/series/71157/
State : failure

== Summary ==

Applying: drm/i915: Remove nest annotation from intel_context_unpin
Using index info to reconstruct a base tree...
M   drivers/gpu/drm/i915/gt/intel_context.c
M   drivers/gpu/drm/i915/gt/intel_context_types.h
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/gt/intel_context_types.h
Auto-merging drivers/gpu/drm/i915/gt/intel_context.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/gt/intel_context.c
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch' to see the failed patch
Patch failed at 0001 drm/i915: Remove nest annotation from intel_context_unpin
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gem: Extend mmap support for lmem

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/gem: Extend mmap support for lmem
URL   : https://patchwork.freedesktop.org/series/71601/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7673 -> Patchwork_15986


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_15986:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_fence@basic-busy-default:
- {fi-ehl-1}: NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/fi-ehl-1/igt@gem_exec_fe...@basic-busy-default.html

  
Known issues


  Here are the changes found in Patchwork_15986 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_close_race@basic-threads:
- fi-byt-j1900:   [PASS][2] -> [TIMEOUT][3] ([i915#816])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-byt-j1900/igt@gem_close_r...@basic-threads.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/fi-byt-j1900/igt@gem_close_r...@basic-threads.html

  * igt@i915_selftest@live_gem_contexts:
- fi-hsw-peppy:   [PASS][4] -> [DMESG-FAIL][5] ([i915#722])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/fi-hsw-peppy/igt@i915_selftest@live_gem_contexts.html

  
 Possible fixes 

  * igt@gem_exec_store@basic-all:
- fi-byt-n2820:   [FAIL][6] ([i915#894]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-byt-n2820/igt@gem_exec_st...@basic-all.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/fi-byt-n2820/igt@gem_exec_st...@basic-all.html

  * igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-guc: [INCOMPLETE][8] ([i915#505] / [i915#671]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html

  * igt@i915_pm_rpm@basic-pci-d3-state:
- fi-hsw-4770:[SKIP][10] ([fdo#109271]) -> [PASS][11] +1 similar 
issue
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-hsw-4770/igt@i915_pm_...@basic-pci-d3-state.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/fi-hsw-4770/igt@i915_pm_...@basic-pci-d3-state.html

  * igt@i915_selftest@live_execlists:
- fi-skl-6770hq:  [DMESG-FAIL][12] ([i915#841]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-skl-6770hq/igt@i915_selftest@live_execlists.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/fi-skl-6770hq/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_gem_contexts:
- fi-byt-n2820:   [DMESG-FAIL][14] ([i915#722]) -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u:   [FAIL][16] ([fdo#111407]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15986/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
  [i915#816]: https://gitlab.freedesktop.org/drm/intel/issues/816
  [i915#841]: https://gitlab.freedesktop.org/drm/intel/issues/841
  [i915#894]: https://gitlab.freedesktop.org/drm/intel/issues/894


Participating hosts (45 -> 44)
--

  Additional (8): fi-kbl-soraka fi-ehl-1 fi-bwr-2160 fi-snb-2520m fi-ilk-650 
fi-elk-e7500 fi-skl-lmem fi-blb-e6850 
  Missing(9): fi-ilk-m540 fi-bdw-5557u fi-byt-squawks fi-bsw-cyan 
fi-ctg-p8600 fi-ivb-3770 fi-bsw-kefka fi-byt-clapper fi-bdw-samus 


Build changes
-

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7673 -> 

[Intel-gfx] [CI] drm/i915: Remove nest annotation from intel_context_unpin

[Maarten Lankhorst]

Lets see what breaks? Round 2?

Signed-off-by: Maarten Lankhorst 
---
 drivers/gpu/drm/i915/gt/intel_context.c   | 28 +--
 drivers/gpu/drm/i915/gt/intel_context_types.h |  1 +
 2 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_context.c 
b/drivers/gpu/drm/i915/gt/intel_context.c
index 61c39e943f69..614258e268e4 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -48,21 +48,30 @@ int __intel_context_do_pin(struct intel_context *ce)
 {
int err;
 
-   if (mutex_lock_interruptible(>pin_mutex))
-   return -EINTR;
-
-   if (likely(!atomic_read(>pin_count))) {
-   intel_wakeref_t wakeref;
+   if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, >flags))) {
+   err = mutex_lock_interruptible(>alloc_mutex);
+   if (err)
+   return err;
 
-   if (unlikely(!test_bit(CONTEXT_ALLOC_BIT, >flags))) {
+   if (!test_bit(CONTEXT_ALLOC_BIT, >flags)) {
err = ce->ops->alloc(ce);
if (unlikely(err))
goto err;
 
+   smp_mb(); /* Make sure allocation is flushed to memory 
*/
+
__set_bit(CONTEXT_ALLOC_BIT, >flags);
}
+   mutex_unlock(>alloc_mutex);
+   }
+
+   err = mutex_lock_interruptible(>pin_mutex);
+   if (err)
+   return err;
+
+   if (likely(!atomic_read(>pin_count))) {
+   intel_wakeref_t wakeref;
 
-   err = 0;
with_intel_runtime_pm(ce->engine->uncore->rpm, wakeref)
err = ce->ops->pin(ce);
if (err)
@@ -95,14 +104,13 @@ void intel_context_unpin(struct intel_context *ce)
 
/* We may be called from inside intel_context_pin() to evict another */
intel_context_get(ce);
-   mutex_lock_nested(>pin_mutex, SINGLE_DEPTH_NESTING);
+   mutex_lock(>pin_mutex);
 
if (likely(atomic_dec_and_test(>pin_count))) {
GEM_TRACE("%s context:%llx retire\n",
  ce->engine->name, ce->timeline->fence_context);
 
ce->ops->unpin(ce);
-
i915_gem_context_put(ce->gem_context);
intel_context_active_release(ce);
}
@@ -246,6 +254,7 @@ intel_context_init(struct intel_context *ce,
INIT_LIST_HEAD(>signals);
 
mutex_init(>pin_mutex);
+   mutex_init(>alloc_mutex);
 
i915_active_init(>active,
 __intel_context_active, __intel_context_retire);
@@ -257,6 +266,7 @@ void intel_context_fini(struct intel_context *ce)
intel_timeline_put(ce->timeline);
i915_vm_put(ce->vm);
 
+   mutex_destroy(>alloc_mutex);
mutex_destroy(>pin_mutex);
i915_active_fini(>active);
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h 
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index d1204cc899a3..a987df89caaf 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -65,6 +65,7 @@ struct intel_context {
 
atomic_t pin_count;
struct mutex pin_mutex; /* guards pinning and associated on-gpuing */
+   struct mutex alloc_mutex; /* guards against concurrent contex 
allocation */
 
/**
 * active: Active tracker for the rq activity (inc. external) on this
-- 
2.24.1

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Re: [Intel-gfx] [PATCH 1/1] drm/i915/hdcp: restore hdcp state same as previous

[Ramalingam C]

On 2020-01-03 at 18:30:21 +0530, Anshuman Gupta wrote:
> When port is disabled due to modeset or DPMS off actually
> it disables the HDCP encryption keeping its state to
> CP_ENABLED this doesn't enable HDCP again while port
> gets enable again. HDCP state should set accordingly
> when port is disabled.
> 
> CC: Ramalingam C 
> Signed-off-by: Anshuman Gupta 
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 9 -
>  1 file changed, 8 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 07acd0daca25..b1b79073e3f9 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4137,7 +4137,14 @@ static void intel_disable_ddi(struct intel_encoder 
> *encoder,
> const struct intel_crtc_state *old_crtc_state,
> const struct drm_connector_state *old_conn_state)
>  {
> - intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
> + int ret;
> +
> + ret = intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
> +
> + if (old_conn_state->content_protection ==
> + DRM_MODE_CONTENT_PROTECTION_ENABLED && !ret)
while relooking at it, locking is missing. 

mutex_lock(>mutex);
hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
schedule_work(>prop_work);
mutex_unlock(>mutex);

-Ram

> + drm_hdcp_update_content_protection(old_conn_state->connector,
> +
> DRM_MODE_CONTENT_PROTECTION_DESIRED);
>  
>   if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
>   intel_disable_ddi_hdmi(encoder, old_crtc_state, old_conn_state);
> -- 
> 2.24.0
> 
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/gem: Extend mmap support for lmem

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/gem: Extend mmap support for lmem
URL   : https://patchwork.freedesktop.org/series/71601/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
b0a72df86a8d drm/i915/gem: Extend mmap support for lmem
e550fd5b9f6c drm/i915/selftests: Extend fault handler selftests to all memory 
regions
-:158: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'x' - possible side-effects?
#158: FILE: drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:834:
+#define expand32(x) (((x) << 0) | ((x) << 8) | ((x) << 16) | ((x) << 24))

total: 0 errors, 0 warnings, 1 checks, 412 lines checked

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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftest: Move igt_atomic_section[] out of the header

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/selftest: Move igt_atomic_section[] 
out of the header
URL   : https://patchwork.freedesktop.org/series/71599/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7673 -> Patchwork_15985


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/index.html

Known issues


  Here are the changes found in Patchwork_15985 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_sync@basic-store-each:
- fi-byt-n2820:   [PASS][1] -> [FAIL][2] ([i915#860])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-byt-n2820/igt@gem_s...@basic-store-each.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-byt-n2820/igt@gem_s...@basic-store-each.html

  * igt@i915_module_load@reload-with-fault-injection:
- fi-skl-6770hq:  [PASS][3] -> [INCOMPLETE][4] ([i915#671])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-skl-6770hq/igt@i915_module_l...@reload-with-fault-injection.html

  * igt@i915_selftest@live_active:
- fi-icl-y:   [PASS][5] -> [DMESG-FAIL][6] ([i915#765])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-icl-y/igt@i915_selftest@live_active.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-icl-y/igt@i915_selftest@live_active.html

  * igt@i915_selftest@live_blt:
- fi-byt-j1900:   [PASS][7] -> [DMESG-FAIL][8] ([i915#725])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-byt-j1900/igt@i915_selftest@live_blt.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-byt-j1900/igt@i915_selftest@live_blt.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-icl-dsi: [PASS][9] -> [INCOMPLETE][10] ([i915#140])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-icl-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-icl-dsi/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html

  
 Possible fixes 

  * igt@gem_exec_store@basic-all:
- fi-byt-n2820:   [FAIL][11] ([i915#894]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-byt-n2820/igt@gem_exec_st...@basic-all.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-byt-n2820/igt@gem_exec_st...@basic-all.html

  * igt@i915_module_load@reload-with-fault-injection:
- fi-cfl-guc: [INCOMPLETE][13] ([i915#505] / [i915#671]) -> 
[PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-cfl-guc/igt@i915_module_l...@reload-with-fault-injection.html

  * igt@i915_pm_rpm@basic-rte:
- fi-hsw-4770:[SKIP][15] ([fdo#109271]) -> [PASS][16] +1 similar 
issue
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-hsw-4770/igt@i915_pm_...@basic-rte.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-hsw-4770/igt@i915_pm_...@basic-rte.html

  * igt@i915_selftest@live_blt:
- fi-ivb-3770:[DMESG-FAIL][17] ([i915#725]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-ivb-3770/igt@i915_selftest@live_blt.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-ivb-3770/igt@i915_selftest@live_blt.html
- fi-hsw-4770:[DMESG-FAIL][19] ([i915#553] / [i915#725]) -> 
[PASS][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-hsw-4770/igt@i915_selftest@live_blt.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-hsw-4770/igt@i915_selftest@live_blt.html

  * igt@i915_selftest@live_gem_contexts:
- fi-byt-n2820:   [DMESG-FAIL][21] ([i915#722]) -> [PASS][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7673/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15985/fi-byt-n2820/igt@i915_selftest@live_gem_contexts.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#140]: https://gitlab.freedesktop.org/drm/intel/issues/140
  [i915#505]: https://gitlab.freedesktop.org/drm/intel/issues/505
  [i915#553]: https://gitlab.freedesktop.org/drm/intel/issues/553
  [i915#671]: https://gitlab.freedesktop.org/drm/intel/issues/671
  [i915#722]: https://gitlab.freedesktop.org/drm/intel/issues/722
  [i915#725]: https://gitlab.freedesktop.org/drm/intel/issues/725
  [i915#765]: https://gitlab.freedesktop.org/drm/intel/issues/765
  [i915#860]: https://gitlab.freedesktop.org/drm/intel/issues/860
  

Re: [Intel-gfx] [PATCH 2/2] drm/i915/selftests: Make headers self-contained

[Matthew Auld]

On Fri, 3 Jan 2020 at 10:45, Chris Wilson  wrote:
>
> Include the types used by the headers to they can be compiled
> standalone.
>
> Signed-off-by: Chris Wilson 
Reviewed-by: Matthew Auld 
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Re: [Intel-gfx] [PATCH 1/2] drm/i915/selftest: Move igt_atomic_section[] out of the header

[Matthew Auld]

On Fri, 3 Jan 2020 at 10:45, Chris Wilson  wrote:
>
> Move the definition of the igt_atomic_section[] into a C file, leaving
> the declaration in the header so as not to upset headertest!
>
> Signed-off-by: Chris Wilson 
Reviewed-by: Matthew Auld 
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[Intel-gfx] [PATCH 1/1] drm/i915/hdcp: restore hdcp state same as previous

[Anshuman Gupta]

When port is disabled due to modeset or DPMS off actually
it disables the HDCP encryption keeping its state to
CP_ENABLED this doesn't enable HDCP again while port
gets enable again. HDCP state should set accordingly
when port is disabled.

CC: Ramalingam C 
Signed-off-by: Anshuman Gupta 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 07acd0daca25..b1b79073e3f9 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4137,7 +4137,14 @@ static void intel_disable_ddi(struct intel_encoder 
*encoder,
  const struct intel_crtc_state *old_crtc_state,
  const struct drm_connector_state *old_conn_state)
 {
-   intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
+   int ret;
+
+   ret = intel_hdcp_disable(to_intel_connector(old_conn_state->connector));
+
+   if (old_conn_state->content_protection ==
+   DRM_MODE_CONTENT_PROTECTION_ENABLED && !ret)
+   drm_hdcp_update_content_protection(old_conn_state->connector,
+  
DRM_MODE_CONTENT_PROTECTION_DESIRED);
 
if (intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_HDMI))
intel_disable_ddi_hdmi(encoder, old_crtc_state, old_conn_state);
-- 
2.24.0

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[Intel-gfx] restore hdcp state same as previous

[Anshuman Gupta]

Test-with: <20200103081107.28144-1-ramalinga...@intel.com>

Anshuman Gupta (1):
  drm/i915/hdcp: restore hdcp state same as previous

 drivers/gpu/drm/i915/display/intel_ddi.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

-- 
2.24.0

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/selftest: Move igt_atomic_section[] out of the header

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/selftest: Move igt_atomic_section[] 
out of the header
URL   : https://patchwork.freedesktop.org/series/71599/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
aba7d1f5aa20 drm/i915/selftest: Move igt_atomic_section[] out of the header
-:25: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#25: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 106 lines checked
b72498a874fb drm/i915/selftests: Make headers self-contained

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Re: [Intel-gfx] [PATCH 1/2] drm/i915/gem: Extend mmap support for lmem

[Chris Wilson]

Quoting Chris Wilson (2020-01-03 12:15:04)
> From: Abdiel Janulgue 
> 
> Local memory objects are similar to our usual scatterlist, but instead
> of using the struct page stored therein, we need to use the
> sg->dma_address.
> 
> Signed-off-by: Abdiel Janulgue 
> Cc: Chris Wilson 
> Cc: Matthew Auld 
> ---
>  drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 ++-
>  drivers/gpu/drm/i915/i915_drv.h  |  6 ++---
>  drivers/gpu/drm/i915/i915_mm.c   | 34 +++-
>  3 files changed, 39 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
> b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> index ed0d9a2f0e7b..37efd95c086d 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
> @@ -217,6 +217,7 @@ static vm_fault_t i915_error_to_vmf_fault(int err)
>  
> case -ENOSPC: /* shmemfs allocation failure */
> case -ENOMEM: /* our allocation failure */
> +   case -ENXIO:

Why not SIGBUS?
-Chris
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[Intel-gfx] [PATCH 1/2] drm/i915/gem: Extend mmap support for lmem

[Chris Wilson]

From: Abdiel Janulgue 

Local memory objects are similar to our usual scatterlist, but instead
of using the struct page stored therein, we need to use the
sg->dma_address.

Signed-off-by: Abdiel Janulgue 
Cc: Chris Wilson 
Cc: Matthew Auld 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 ++-
 drivers/gpu/drm/i915/i915_drv.h  |  6 ++---
 drivers/gpu/drm/i915/i915_mm.c   | 34 +++-
 3 files changed, 39 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index ed0d9a2f0e7b..37efd95c086d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -217,6 +217,7 @@ static vm_fault_t i915_error_to_vmf_fault(int err)
 
case -ENOSPC: /* shmemfs allocation failure */
case -ENOMEM: /* our allocation failure */
+   case -ENXIO:
return VM_FAULT_OOM;
 
case 0:
@@ -237,11 +238,9 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
struct vm_area_struct *area = vmf->vma;
struct i915_mmap_offset *mmo = area->vm_private_data;
struct drm_i915_gem_object *obj = mmo->obj;
+   resource_size_t iomap;
int err;
 
-   if (unlikely(!i915_gem_object_has_struct_page(obj)))
-   return VM_FAULT_SIGBUS;
-
/* Sanity check that we allow writing into this object */
if (unlikely(i915_gem_object_is_readonly(obj) &&
 area->vm_flags & VM_WRITE))
@@ -251,10 +250,16 @@ static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
if (err)
goto out;
 
+   iomap = -1;
+   if (!i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_STRUCT_PAGE)) {
+   iomap = obj->mm.region->iomap.base;
+   iomap -= obj->mm.region->region.start;
+   }
+
/* PTEs are revoked in obj->ops->put_pages() */
-   err = remap_io_sg_page(area,
-  area->vm_start, area->vm_end - area->vm_start,
-  obj->mm.pages->sgl);
+   err = remap_io_sg(area,
+ area->vm_start, area->vm_end - area->vm_start,
+ obj->mm.pages->sgl, iomap);
 
if (area->vm_flags & VM_WRITE) {
GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
@@ -553,7 +558,9 @@ __assign_mmap_offset(struct drm_file *file,
}
 
if (mmap_type != I915_MMAP_TYPE_GTT &&
-   !i915_gem_object_has_struct_page(obj)) {
+   !i915_gem_object_type_has(obj,
+ I915_GEM_OBJECT_HAS_STRUCT_PAGE |
+ I915_GEM_OBJECT_HAS_IOMEM)) {
err = -ENODEV;
goto out;
}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2ee9f57d165d..50181113dd2b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2027,9 +2027,9 @@ int i915_reg_read_ioctl(struct drm_device *dev, void 
*data,
 int remap_io_mapping(struct vm_area_struct *vma,
 unsigned long addr, unsigned long pfn, unsigned long size,
 struct io_mapping *iomap);
-int remap_io_sg_page(struct vm_area_struct *vma,
-unsigned long addr, unsigned long size,
-struct scatterlist *sgl);
+int remap_io_sg(struct vm_area_struct *vma,
+   unsigned long addr, unsigned long size,
+   struct scatterlist *sgl, resource_size_t iobase);
 
 static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
 {
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 2998689e6d42..b6376b25ef63 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -35,6 +35,7 @@ struct remap_pfn {
pgprot_t prot;
 
struct sgt_iter sgt;
+   resource_size_t iobase;
 };
 
 static int remap_pfn(pte_t *pte, unsigned long addr, void *data)
@@ -48,12 +49,17 @@ static int remap_pfn(pte_t *pte, unsigned long addr, void 
*data)
return 0;
 }
 
-static inline unsigned long sgt_pfn(const struct sgt_iter *sgt)
+#define use_dma(io) ((io) != -1)
+
+static inline unsigned long sgt_pfn(const struct remap_pfn *r)
 {
-   return sgt->pfn + (sgt->curr >> PAGE_SHIFT);
+   if (use_dma(r->iobase))
+   return (r->sgt.dma + r->sgt.curr + r->iobase) >> PAGE_SHIFT;
+   else
+   return r->sgt.pfn + (r->sgt.curr >> PAGE_SHIFT);
 }
 
-static int remap_sg_page(pte_t *pte, unsigned long addr, void *data)
+static int remap_sg(pte_t *pte, unsigned long addr, void *data)
 {
struct remap_pfn *r = data;
 
@@ -62,12 +68,12 @@ static int remap_sg_page(pte_t *pte, unsigned long addr, 
void *data)
 
/* Special PTE are not associated with any struct page */
set_pte_at(r->mm, addr, pte,
-  pte_mkspecial(pfn_pte(sgt_pfn(>sgt), 

[Intel-gfx] [PATCH 2/2] drm/i915/selftests: Extend fault handler selftests to all memory regions

[Chris Wilson]

From: Abdiel Janulgue 

Instead of testing individually our new fault handlers, iterate over all
memory regions and test all from one interface.

Signed-off-by: Abdiel Janulgue 
Cc: Matthew Auld 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
---
We also need an igt_mmap_gpu to truly test lmem.
---
 .../drm/i915/gem/selftests/i915_gem_mman.c| 306 +-
 1 file changed, 218 insertions(+), 88 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
index cbf796da64e3..2a31f51be8d6 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
@@ -9,6 +9,7 @@
 #include "gt/intel_engine_pm.h"
 #include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
+#include "gem/i915_gem_region.h"
 #include "huge_gem_object.h"
 #include "i915_selftest.h"
 #include "selftests/i915_random.h"
@@ -725,114 +726,231 @@ static int igt_mmap_offset_exhaustion(void *arg)
goto out;
 }
 
-#define expand32(x) (((x) << 0) | ((x) << 8) | ((x) << 16) | ((x) << 24))
-static int igt_mmap(void *arg, enum i915_mmap_type type)
+static int gtt_set(struct drm_i915_gem_object *obj)
 {
-   struct drm_i915_private *i915 = arg;
-   struct drm_i915_gem_object *obj;
-   struct i915_mmap_offset *mmo;
-   struct vm_area_struct *area;
-   unsigned long addr;
-   void *vaddr;
-   int err = 0, i;
+   struct i915_vma *vma;
+   void __iomem *map;
+   int err = 0;
 
-   if (!i915_ggtt_has_aperture(>ggtt))
-   return 0;
+   vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
+   if (IS_ERR(vma))
+   return PTR_ERR(vma);
 
-   obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
-   if (IS_ERR(obj))
-   return PTR_ERR(obj);
+   intel_gt_pm_get(vma->vm->gt);
+   map = i915_vma_pin_iomap(vma);
+   i915_vma_unpin(vma);
+   if (IS_ERR(map)) {
+   err = PTR_ERR(map);
+   goto out;
+   }
+
+   memset_io(map, POISON_INUSE, obj->base.size);
+   i915_vma_unpin_iomap(vma);
+
+out:
+   intel_gt_pm_put(vma->vm->gt);
+   return err;
+}
+
+static int gtt_check(struct drm_i915_gem_object *obj)
+{
+   struct i915_vma *vma;
+   void __iomem *map;
+   int err = 0;
+
+   vma = i915_gem_object_ggtt_pin(obj, NULL, 0, 0, PIN_MAPPABLE);
+   if (IS_ERR(vma))
+   return PTR_ERR(vma);
 
-   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WB);
-   if (IS_ERR(vaddr)) {
-   err = PTR_ERR(vaddr);
+   intel_gt_pm_get(vma->vm->gt);
+   map = i915_vma_pin_iomap(vma);
+   i915_vma_unpin(vma);
+   if (IS_ERR(map)) {
+   err = PTR_ERR(map);
goto out;
}
-   memset(vaddr, POISON_INUSE, PAGE_SIZE);
+
+   if (memchr_inv((void __force *)map, POISON_FREE, obj->base.size)) {
+   pr_err("%s: Write via mmap did not land in backing store 
(GTT)\n",
+  obj->mm.region->name);
+   err = -EINVAL;
+   }
+   i915_vma_unpin_iomap(vma);
+
+out:
+   intel_gt_pm_put(vma->vm->gt);
+   return err;
+}
+
+static int wc_set(struct drm_i915_gem_object *obj)
+{
+   void *vaddr;
+
+   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   if (IS_ERR(vaddr))
+   return PTR_ERR(vaddr);
+
+   memset(vaddr, POISON_INUSE, obj->base.size);
i915_gem_object_flush_map(obj);
i915_gem_object_unpin_map(obj);
 
-   mmo = mmap_offset_attach(obj, type, NULL);
-   if (IS_ERR(mmo)) {
-   err = PTR_ERR(mmo);
-   goto out;
+   return 0;
+}
+
+static int wc_check(struct drm_i915_gem_object *obj)
+{
+   void *vaddr;
+   int err = 0;
+
+   vaddr = i915_gem_object_pin_map(obj, I915_MAP_WC);
+   if (IS_ERR(vaddr))
+   return PTR_ERR(vaddr);
+
+   if (memchr_inv(vaddr, POISON_FREE, obj->base.size)) {
+   pr_err("%s: Write via mmap did not land in backing store 
(WC)\n",
+  obj->mm.region->name);
+   err = -EINVAL;
}
+   i915_gem_object_unpin_map(obj);
+
+   return err;
+}
+
+static bool can_mmap(struct drm_i915_gem_object *obj, enum i915_mmap_type type)
+{
+   if (type == I915_MMAP_TYPE_GTT &&
+   !i915_ggtt_has_aperture(_i915(obj->base.dev)->ggtt))
+   return false;
+
+   if (type != I915_MMAP_TYPE_GTT &&
+   !i915_gem_object_type_has(obj,
+ I915_GEM_OBJECT_HAS_STRUCT_PAGE |
+ I915_GEM_OBJECT_HAS_IOMEM))
+   return false;
+
+   return true;
+}
+
+#define expand32(x) (((x) << 0) | ((x) << 8) | ((x) << 16) | ((x) << 24))
+static int __igt_mmap(struct drm_i915_private *i915,
+ struct drm_i915_gem_object *obj,
+ enum i915_mmap_type type)
+{
+

Re: [Intel-gfx] [PATCH 1/5] drm/i915/gt: Include a bunch more rcs image state

[Mika Kuoppala]

Chris Wilson  writes:

> Empirically the minimal context image we use for rcs is insufficient to
> state the engine. This is demonstrated if we poison the context image
> such that any uninitialised state is invalid, and so if the engine
> samples beyond our defined region, will fail to start.
>
> Signed-off-by: Chris Wilson 

Reviewed-by: Mika Kuoppala 

> ---
>  drivers/gpu/drm/i915/gt/intel_lrc.c| 88 +-
>  drivers/gpu/drm/i915/gt/selftest_lrc.c |  7 ++
>  2 files changed, 94 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
> b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index 00895f83f61e..029496d2dfb5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -492,7 +492,7 @@ static u32 *set_offsets(u32 *regs,
>   const u8 *data,
>   const struct intel_engine_cs *engine)
>  #define NOP(x) (BIT(7) | (x))
> -#define LRI(count, flags) ((flags) << 6 | (count))
> +#define LRI(count, flags) ((flags) << 6 | (count) | BUILD_BUG_ON_ZERO(count 
> >= BIT(6)))
>  #define POSTED BIT(0)
>  #define REG(x) (((x) >> 2) | BUILD_BUG_ON_ZERO(x >= 0x200))
>  #define REG16(x) \
> @@ -728,6 +728,90 @@ static const u8 gen8_rcs_offsets[] = {
>   END(),
>  };
>  
> +static const u8 gen9_rcs_offsets[] = {
> + NOP(1),
> + LRI(14, POSTED),
> + REG16(0x244),
> + REG(0x34),
> + REG(0x30),
> + REG(0x38),
> + REG(0x3c),
> + REG(0x168),
> + REG(0x140),
> + REG(0x110),
> + REG(0x11c),
> + REG(0x114),
> + REG(0x118),
> + REG(0x1c0),
> + REG(0x1c4),
> + REG(0x1c8),
> +
> + NOP(3),
> + LRI(9, POSTED),
> + REG16(0x3a8),
> + REG16(0x28c),
> + REG16(0x288),
> + REG16(0x284),
> + REG16(0x280),
> + REG16(0x27c),
> + REG16(0x278),
> + REG16(0x274),
> + REG16(0x270),
> +
> + NOP(13),
> + LRI(1, 0),
> + REG(0xc8),
> +
> + NOP(13),
> + LRI(44, POSTED),
> + REG(0x28),
> + REG(0x9c),
> + REG(0xc0),
> + REG(0x178),
> + REG(0x17c),
> + REG16(0x358),
> + REG(0x170),
> + REG(0x150),
> + REG(0x154),
> + REG(0x158),
> + REG16(0x41c),
> + REG16(0x600),
> + REG16(0x604),
> + REG16(0x608),
> + REG16(0x60c),
> + REG16(0x610),
> + REG16(0x614),
> + REG16(0x618),
> + REG16(0x61c),
> + REG16(0x620),
> + REG16(0x624),
> + REG16(0x628),
> + REG16(0x62c),
> + REG16(0x630),
> + REG16(0x634),
> + REG16(0x638),
> + REG16(0x63c),
> + REG16(0x640),
> + REG16(0x644),
> + REG16(0x648),
> + REG16(0x64c),
> + REG16(0x650),
> + REG16(0x654),
> + REG16(0x658),
> + REG16(0x65c),
> + REG16(0x660),
> + REG16(0x664),
> + REG16(0x668),
> + REG16(0x66c),
> + REG16(0x670),
> + REG16(0x674),
> + REG16(0x678),
> + REG16(0x67c),
> + REG(0x68),
> +
> + END()
> +};
> +
>  static const u8 gen11_rcs_offsets[] = {
>   NOP(1),
>   LRI(15, POSTED),
> @@ -832,6 +916,8 @@ static const u8 *reg_offsets(const struct intel_engine_cs 
> *engine)
>   return gen12_rcs_offsets;
>   else if (INTEL_GEN(engine->i915) >= 11)
>   return gen11_rcs_offsets;
> + else if (INTEL_GEN(engine->i915) >= 9)
> + return gen9_rcs_offsets;
>   else
>   return gen8_rcs_offsets;
>   } else {
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c 
> b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 9ec9833c9c7b..943b623f00e9 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -3406,6 +3406,13 @@ static int live_lrc_layout(void *arg)
>   continue;
>   }
>  
> + if (lrc[dw] == 0) {
> + pr_debug("%s: skipped instruction %x at dword 
> %d\n",
> +  engine->name, lri, dw);
> + dw++;
> + continue;
> + }
> +
>   if ((lri & GENMASK(31, 23)) != MI_INSTR(0x22, 0)) {
>   pr_err("%s: Expected LRI command at dword %d, 
> found %08x\n",
>  engine->name, dw, lri);
> -- 
> 2.25.0.rc0
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Re: [Intel-gfx] [PATCH] drm/i915/dsi: Parse the I2C element from the VBT MIPI sequence block

[Hans de Goede]

Hi Vivek,

On 03-01-2020 01:00, Vivek Kasireddy wrote:

Parsing the i2c element is mainly done to transfer the payload from the
MIPI sequence block to the relevant slave device. In some cases, the
commands that are part of the payload can be used to turn on the backlight.

This patch is actually a refactored version of this old patch:
https://lists.freedesktop.org/archives/intel-gfx/2014-December/056897.html

In addition to the refactoring, the old patch is augmented by looking up
the i2c bus from ACPI NS instead of relying on the bus number provided
in the VBT.

Cc: Deepak M 
Cc: Nabendu Maiti 
Cc: Matt Roper 
Cc: Bob Paauwe 
Signed-off-by: Vivek Kasireddy 


Thank you for this patch, I have been doing a lot of work to make
DSI panels on Bay Trail and Cherry Trail devices work better, as such
I've done a lot of testing of DSI panels. But I have never seen any
MIPI sequences actually use the i2c commands. May I ask how you have
tested this? Do you have a device which actually uses the i2c commands?

I also have some small review comments inline:


---
  drivers/gpu/drm/i915/display/intel_dsi.h |  3 +
  drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 93 
  2 files changed, 96 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dsi.h 
b/drivers/gpu/drm/i915/display/intel_dsi.h
index b15be5814599..5651bc8aa5c2 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi.h
+++ b/drivers/gpu/drm/i915/display/intel_dsi.h
@@ -68,6 +68,9 @@ struct intel_dsi {
/* number of DSI lanes */
unsigned int lane_count;
  
+	/* i2c bus associated with the slave device */

+   int i2c_bus_num;
+
/*
 * video mode pixel format
 *
diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c 
b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index f90946c912ee..60441a5a3dba 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -83,6 +83,12 @@ static struct gpio_map vlv_gpio_table[] = {
{ VLV_GPIO_NC_11_PANEL1_BKLTCTL },
  };
  
+struct i2c_adapter_lookup {

+   u16 slave_addr;
+   struct intel_dsi *intel_dsi;
+   acpi_handle dev_handle;
+};
+
  #define CHV_GPIO_IDX_START_N  0
  #define CHV_GPIO_IDX_START_E  73
  #define CHV_GPIO_IDX_START_SW 100
@@ -375,8 +381,93 @@ static const u8 *mipi_exec_gpio(struct intel_dsi 
*intel_dsi, const u8 *data)
return data;
  }
  
+static int i2c_adapter_lookup(struct acpi_resource *ares, void *data)

+{
+   struct i2c_adapter_lookup *lookup = data;
+   struct intel_dsi *intel_dsi = lookup->intel_dsi;
+   struct acpi_resource_i2c_serialbus *sb;
+   struct i2c_adapter *adapter;
+   acpi_handle adapter_handle;
+   acpi_status status;
+
+   if (intel_dsi->i2c_bus_num >= 0 ||
+   !i2c_acpi_get_i2c_resource(ares, ))
+   return 1;
+
+   if (lookup->slave_addr != sb->slave_address)
+   return 1;
+
+   status = acpi_get_handle(lookup->dev_handle,
+sb->resource_source.string_ptr,
+_handle);
+   if (ACPI_FAILURE(status))
+   return 1;
+
+   adapter = i2c_acpi_find_adapter_by_handle(adapter_handle);
+   if (adapter)
+   intel_dsi->i2c_bus_num = adapter->nr;
+
+   return 1;
+}
+
  static const u8 *mipi_exec_i2c(struct intel_dsi *intel_dsi, const u8 *data)
  {
+   struct drm_device *dev = intel_dsi->base.base.dev;
+   struct i2c_adapter *adapter;
+   struct acpi_device *acpi_dev;
+   struct list_head resource_list;
+   struct i2c_adapter_lookup lookup;
+   struct i2c_msg msg;
+   int ret;
+   u8 vbt_i2c_bus_num = *(data + 2);
+   u16 slave_addr = *(u16 *)(data + 3);
+   u8 reg_offset = *(data + 5);
+   u8 payload_size = *(data + 6);
+   u8 *payload_data;
+
+   if (intel_dsi->i2c_bus_num < 0) {
+   intel_dsi->i2c_bus_num = vbt_i2c_bus_num;
+
+   acpi_dev = ACPI_COMPANION(>pdev->dev);
+   if (acpi_dev) {
+   memset(, 0, sizeof(lookup));
+   lookup.slave_addr = slave_addr;
+   lookup.intel_dsi = intel_dsi;
+   lookup.dev_handle = acpi_device_handle(acpi_dev);
+
+   INIT_LIST_HEAD(_list);
+   acpi_dev_get_resources(acpi_dev, _list,
+  i2c_adapter_lookup,
+  );
+   acpi_dev_free_resource_list(_list);
+   }
+   }
+
+   adapter = i2c_get_adapter(intel_dsi->i2c_bus_num);
+   if (!adapter)
+   goto out;


This should never happen, so you should put a DRM_DEV_WARN here.


+
+   payload_data = kzalloc(payload_size + 1, GFP_KERNEL);
+   if (!payload_data)
+   goto out;
+
+   payload_data[0] = reg_offset;
+   

Re: [Intel-gfx] [PATCH v2] drm/i915/gem: Support discontiguous lmem object maps

[Matthew Auld]

On Thu, 2 Jan 2020 at 20:42, Chris Wilson  wrote:
>
> Create a vmap for discontinguous lmem objects to support
> i915_gem_object_pin_map().
>
> v2: Offset io address by region.start for fake-lmem
>
> Signed-off-by: Chris Wilson 
> Cc: Matthew Auld 
Reviewed-by: Matthew Auld 
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[Intel-gfx] [PATCH 2/2] drm/i915/selftests: Make headers self-contained

[Chris Wilson]

Include the types used by the headers to they can be compiled
standalone.

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/Makefile| 8 +---
 drivers/gpu/drm/i915/gem/selftests/huge_gem_object.h | 6 ++
 drivers/gpu/drm/i915/gem/selftests/mock_gem_object.h | 2 ++
 drivers/gpu/drm/i915/selftests/i915_live_selftests.h | 8 +++-
 drivers/gpu/drm/i915/selftests/i915_mock_selftests.h | 8 +++-
 drivers/gpu/drm/i915/selftests/i915_perf_selftests.h | 8 +++-
 drivers/gpu/drm/i915/selftests/igt_live_test.h   | 3 ++-
 7 files changed, 32 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 5992ef800534..0b1d8d36a50a 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -275,8 +275,6 @@ obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o
 # exclude some broken headers from the test coverage
 no-header-test := \
display/intel_vbt_defs.h \
-   gem/selftests/huge_gem_object.h \
-   gem/selftests/mock_gem_object.h \
gvt/execlist.h \
gvt/fb_decoder.h \
gvt/gtt.h \
@@ -284,11 +282,7 @@ no-header-test := \
gvt/interrupt.h \
gvt/mmio_context.h \
gvt/mpt.h \
-   gvt/scheduler.h \
-   selftests/i915_live_selftests.h \
-   selftests/i915_mock_selftests.h \
-   selftests/i915_perf_selftests.h \
-   selftests/igt_live_test.h
+   gvt/scheduler.h
 
 extra-$(CONFIG_DRM_I915_WERROR) += \
$(patsubst %.h,%.hdrtest, $(filter-out $(no-header-test), \
diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_gem_object.h 
b/drivers/gpu/drm/i915/gem/selftests/huge_gem_object.h
index 549c1394bcdc..b8cf31b7bf14 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_gem_object.h
@@ -7,6 +7,12 @@
 #ifndef __HUGE_GEM_OBJECT_H
 #define __HUGE_GEM_OBJECT_H
 
+#include 
+
+#include "gem/i915_gem_object_types.h"
+
+struct drm_i915_private;
+
 struct drm_i915_gem_object *
 huge_gem_object(struct drm_i915_private *i915,
phys_addr_t phys_size,
diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_gem_object.h 
b/drivers/gpu/drm/i915/gem/selftests/mock_gem_object.h
index 370360b4a148..688511afa883 100644
--- a/drivers/gpu/drm/i915/gem/selftests/mock_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/selftests/mock_gem_object.h
@@ -7,6 +7,8 @@
 #ifndef __MOCK_GEM_OBJECT_H__
 #define __MOCK_GEM_OBJECT_H__
 
+#include "gem/i915_gem_object_types.h"
+
 struct mock_object {
struct drm_i915_gem_object base;
 };
diff --git a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h 
b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
index 476fba2ed8bb..34138c7bdd15 100644
--- a/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_live_selftests.h
@@ -1,5 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-/* List each unit test as selftest(name, function)
+
+#ifndef selftest
+#define selftest(x, y)
+#endif
+
+/*
+ * List each unit test as selftest(name, function)
  *
  * The name is used as both an enum and expanded as subtest__name to create
  * a module parameter. It must be unique and legal for a C identifier.
diff --git a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h 
b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
index aa5a0e7f5d9e..5b39bab4da1d 100644
--- a/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_mock_selftests.h
@@ -1,5 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-/* List each unit test as selftest(name, function)
+
+#ifndef selftest
+#define selftest(x, y)
+#endif
+
+/*
+ * List each unit test as selftest(name, function)
  *
  * The name is used as both an enum and expanded as subtest__name to create
  * a module parameter. It must be unique and legal for a C identifier.
diff --git a/drivers/gpu/drm/i915/selftests/i915_perf_selftests.h 
b/drivers/gpu/drm/i915/selftests/i915_perf_selftests.h
index f7129a243daa..5a577a1332f5 100644
--- a/drivers/gpu/drm/i915/selftests/i915_perf_selftests.h
+++ b/drivers/gpu/drm/i915/selftests/i915_perf_selftests.h
@@ -1,5 +1,11 @@
 /* SPDX-License-Identifier: GPL-2.0 */
-/* List each unit test as selftest(name, function)
+
+#ifndef selftest
+#define selftest(x, y)
+#endif
+
+/*
+ * List each unit test as selftest(name, function)
  *
  * The name is used as both an enum and expanded as subtest__name to create
  * a module parameter. It must be unique and legal for a C identifier.
diff --git a/drivers/gpu/drm/i915/selftests/igt_live_test.h 
b/drivers/gpu/drm/i915/selftests/igt_live_test.h
index c0e9f99d50de..7567ea75643a 100644
--- a/drivers/gpu/drm/i915/selftests/igt_live_test.h
+++ b/drivers/gpu/drm/i915/selftests/igt_live_test.h
@@ -7,7 +7,8 @@
 #ifndef IGT_LIVE_TEST_H
 #define IGT_LIVE_TEST_H
 
-#include "../i915_gem.h"
+#include "gt/intel_engine.h"
+#include "i915_gem.h"
 
 struct drm_i915_private;
 
-- 

[Intel-gfx] [PATCH 1/2] drm/i915/selftest: Move igt_atomic_section[] out of the header

[Chris Wilson]

Move the definition of the igt_atomic_section[] into a C file, leaving
the declaration in the header so as not to upset headertest!

Signed-off-by: Chris Wilson 
---
 drivers/gpu/drm/i915/Makefile   |  1 +
 drivers/gpu/drm/i915/selftests/igt_atomic.c | 47 +
 drivers/gpu/drm/i915/selftests/igt_atomic.h | 41 +-
 3 files changed, 49 insertions(+), 40 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/selftests/igt_atomic.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 1a2fad832a4d..5992ef800534 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -252,6 +252,7 @@ i915-$(CONFIG_DRM_I915_SELFTEST) += \
gem/selftests/igt_gem_utils.o \
selftests/i915_random.o \
selftests/i915_selftest.o \
+   selftests/igt_atomic.o \
selftests/igt_flush_test.o \
selftests/igt_live_test.o \
selftests/igt_mmap.o \
diff --git a/drivers/gpu/drm/i915/selftests/igt_atomic.c 
b/drivers/gpu/drm/i915/selftests/igt_atomic.c
new file mode 100644
index ..fb506b699095
--- /dev/null
+++ b/drivers/gpu/drm/i915/selftests/igt_atomic.c
@@ -0,0 +1,47 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2018 Intel Corporation
+ */
+
+#include 
+#include 
+#include 
+
+#include "igt_atomic.h"
+
+static void __preempt_begin(void)
+{
+   preempt_disable();
+}
+
+static void __preempt_end(void)
+{
+   preempt_enable();
+}
+
+static void __softirq_begin(void)
+{
+   local_bh_disable();
+}
+
+static void __softirq_end(void)
+{
+   local_bh_enable();
+}
+
+static void __hardirq_begin(void)
+{
+   local_irq_disable();
+}
+
+static void __hardirq_end(void)
+{
+   local_irq_enable();
+}
+
+const struct igt_atomic_section igt_atomic_phases[] = {
+   { "preempt", __preempt_begin, __preempt_end },
+   { "softirq", __softirq_begin, __softirq_end },
+   { "hardirq", __hardirq_begin, __hardirq_end },
+   { }
+};
diff --git a/drivers/gpu/drm/i915/selftests/igt_atomic.h 
b/drivers/gpu/drm/i915/selftests/igt_atomic.h
index 93ec89f487ec..1991798abf4b 100644
--- a/drivers/gpu/drm/i915/selftests/igt_atomic.h
+++ b/drivers/gpu/drm/i915/selftests/igt_atomic.h
@@ -6,51 +6,12 @@
 #ifndef IGT_ATOMIC_H
 #define IGT_ATOMIC_H
 
-#include 
-#include 
-#include 
-
-static void __preempt_begin(void)
-{
-   preempt_disable();
-}
-
-static void __preempt_end(void)
-{
-   preempt_enable();
-}
-
-static void __softirq_begin(void)
-{
-   local_bh_disable();
-}
-
-static void __softirq_end(void)
-{
-   local_bh_enable();
-}
-
-static void __hardirq_begin(void)
-{
-   local_irq_disable();
-}
-
-static void __hardirq_end(void)
-{
-   local_irq_enable();
-}
-
 struct igt_atomic_section {
const char *name;
void (*critical_section_begin)(void);
void (*critical_section_end)(void);
 };
 
-static const struct igt_atomic_section igt_atomic_phases[] = {
-   { "preempt", __preempt_begin, __preempt_end },
-   { "softirq", __softirq_begin, __softirq_end },
-   { "hardirq", __hardirq_begin, __hardirq_end },
-   { }
-};
+extern const struct igt_atomic_section igt_atomic_phases[];
 
 #endif /* IGT_ATOMIC_H */
-- 
2.25.0.rc0

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Re: [Intel-gfx] [alsa-devel] USB Type-C monitor flashes once when play a video file after unplug and re-plug the monitor

[Takashi Iwai]

On Fri, 03 Jan 2020 02:57:03 +0100,
 wrote:
> 
> Hi Sirs,
> Here is chromebook SW team from Compal.
> As the mail title, we hit issue that the external monitor will flash once 
> when play video after hot pluging.
> We can reproduce not only on chromebook but also ubuntu 16.04.
> There has higher failure rate with Dell Solomon dock and Dell S2718D monitor.
> 
> We found adding the delay in "sound/pci/hda/patch_hdmi.c " can fix this 
> issue.(as the attachment)
> May need your help to review and advice. Thanks.
> 
> Here is the issue number in gitlab for more detail.
> https://gitlab.freedesktop.org/drm/intel/issues/318

Could you check whether it still happens with the latest upstream
kernel, at least 5.4.y, if it wasn't tested yet?

I don't want to put a long delay just because of random reason unless
it's really mandatory.  I'm wondering whether the recent write-sync
change improves the situation, so let's check the recent code.


thanks,

Takashi

> 
> 
> 
> AJ Cheng
> NID/NID1
> e-mail: aj_ch...@compal.com
> Tel:  +886-2-8797-8599 ext. 17561
> Mobile : +886-932827829
> COMPAL Electronics, Inc.
> 
> [2 flash_once.diff ]
> 
> ___
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Re: [Intel-gfx] [PATCH] drm/i915/dp: Fix incorrect test parameter for DP link layer compliance

[Jani Nikula]

On Fri, 03 Jan 2020, Lee Shawn C  wrote:
> Run intel_dp_compliance would failed at video pattern related
> test case sometimes. DP test applet read incorrect test type
> from kernel to cause this symptom. Add a "\n" (newline) in
> seq_printf() then DP test applet will get proper parameters.
>
> Cc: Manasi Navare 
> Cc: Jani Nikula 
> Cc: Daniel Vetter 
> Cc: Ville Syrjala 
> Cc: Cooper Chiou 
> Signed-off-by: Lee Shawn C 

Fixes: eb3394faeb97 ("drm/i915: Add debugfs test control files for Displayport 
compliance testing")
Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 0ac98e39eb75..74180158a909 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3167,7 +3167,7 @@ static int i915_displayport_test_data_show(struct 
> seq_file *m, void *data)
>   intel_dp = enc_to_intel_dp(>base);
>   if (intel_dp->compliance.test_type ==
>   DP_TEST_LINK_EDID_READ)
> - seq_printf(m, "%lx",
> + seq_printf(m, "%lx\n",
>  intel_dp->compliance.test_data.edid);
>   else if (intel_dp->compliance.test_type ==
>DP_TEST_LINK_VIDEO_PATTERN) {
> @@ -3209,7 +3209,7 @@ static int i915_displayport_test_type_show(struct 
> seq_file *m, void *data)
>  
>   if (encoder && connector->status == connector_status_connected) 
> {
>   intel_dp = enc_to_intel_dp(>base);
> - seq_printf(m, "%02lx", intel_dp->compliance.test_type);
> + seq_printf(m, "%02lx\n", 
> intel_dp->compliance.test_type);
>   } else
>   seq_puts(m, "0");
>   }

-- 
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Flush ongoing retires during wait_for_idle (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/gt: Flush ongoing retires during wait_for_idle (rev2)
URL   : https://patchwork.freedesktop.org/series/71575/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7668_full -> Patchwork_15982_full


Summary
---

  **SUCCESS**

  No regressions found.

  

New tests
-

  New tests have been introduced between CI_DRM_7668_full and 
Patchwork_15982_full:

### New Piglit tests (5) ###

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dmat3-double_dmat2x4_array2:
- Statuses : 1 fail(s)
- Exec time: [0.13] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dmat3-double_dvec4:
- Statuses : 1 fail(s)
- Exec time: [0.15] s

  * 
spec@arb_vertex_attrib_64bit@execution@vs_in@vs-input-position-double_dvec3-float_mat4x2_array3:
- Statuses : 1 fail(s)
- Exec time: [0.16] s

  * 
spec@glsl-4.20@execution@vs_in@vs-input-float_mat2x3_array3-double_dmat4-position:
- Statuses : 1 fail(s)
- Exec time: [0.13] s

  * 
spec@glsl-4.20@execution@vs_in@vs-input-position-double_dvec3_array5-float_mat3x4:
- Statuses : 1 fail(s)
- Exec time: [0.16] s

  

Known issues


  Here are the changes found in Patchwork_15982_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_isolation@bcs0-s3:
- shard-apl:  [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +1 similar 
issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-apl1/igt@gem_ctx_isolat...@bcs0-s3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-apl1/igt@gem_ctx_isolat...@bcs0-s3.html

  * igt@gem_ctx_persistence@vcs0-mixed-process:
- shard-skl:  [PASS][3] -> [FAIL][4] ([i915#679])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-skl5/igt@gem_ctx_persiste...@vcs0-mixed-process.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-skl1/igt@gem_ctx_persiste...@vcs0-mixed-process.html

  * igt@gem_ctx_persistence@vcs1-mixed-process:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) 
+3 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-iclb4/igt@gem_ctx_persiste...@vcs1-mixed-process.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-iclb6/igt@gem_ctx_persiste...@vcs1-mixed-process.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#110841])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-iclb8/igt@gem_ctx_sha...@exec-single-timeline-bsd.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-iclb1/igt@gem_ctx_sha...@exec-single-timeline-bsd.html

  * igt@gem_ctx_shared@q-smoketest-vebox:
- shard-tglb: [PASS][9] -> [INCOMPLETE][10] ([fdo#111735])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-tglb5/igt@gem_ctx_sha...@q-smoketest-vebox.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-tglb9/igt@gem_ctx_sha...@q-smoketest-vebox.html

  * igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][11] -> [INCOMPLETE][12] ([i915#469])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-tglb1/igt@gem_...@unwedge-stress.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-tglb1/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#110854])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-iclb2/igt@gem_exec_balan...@smoke.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-iclb3/igt@gem_exec_balan...@smoke.html

  * igt@gem_exec_create@madvise:
- shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#435]) +1 
similar issue
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-tglb7/igt@gem_exec_cre...@madvise.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-tglb6/igt@gem_exec_cre...@madvise.html

  * igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#112080]) +14 similar 
issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-iclb1/igt@gem_exec_paral...@vcs1-fds.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-iclb6/igt@gem_exec_paral...@vcs1-fds.html

  * igt@gem_exec_schedule@preempt-bsd:
- shard-iclb: [PASS][19] -> [SKIP][20] ([fdo#112146]) +2 similar 
issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7668/shard-iclb8/igt@gem_exec_sched...@preempt-bsd.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15982/shard-iclb1/igt@gem_exec_sched...@preempt-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd2:
- shard-iclb: [PASS][21] ->