[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/tgl: Add definitions for VRR registers and bits
== Series Details == Series: drm/i915/tgl: Add definitions for VRR registers and bits URL : https://patchwork.freedesktop.org/series/74410/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8088 -> Patchwork_16872 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16872 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16872, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16872: ### IGT changes ### Possible regressions * igt@i915_selftest@live@execlists: - fi-bdw-5557u: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-bdw-5557u/igt@i915_selftest@l...@execlists.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/fi-bdw-5557u/igt@i915_selftest@l...@execlists.html * igt@runner@aborted: - fi-bdw-5557u: NOTRUN -> [FAIL][3] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/fi-bdw-5557u/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_16872 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_suspend@basic-s4-devices: - fi-tgl-y: [PASS][4] -> [FAIL][5] ([CI#94]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html * igt@kms_flip@basic-flip-vs-dpms: - fi-skl-6770hq: [PASS][6] -> [SKIP][7] ([fdo#109271]) +24 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-skl-6770hq/igt@kms_f...@basic-flip-vs-dpms.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/fi-skl-6770hq/igt@kms_f...@basic-flip-vs-dpms.html * igt@vgem_basic@setversion: - fi-tgl-y: [PASS][8] -> [DMESG-WARN][9] ([CI#94] / [i915#402]) +1 similar issue [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@vgem_ba...@setversion.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/fi-tgl-y/igt@vgem_ba...@setversion.html Possible fixes * igt@i915_selftest@live@execlists: - fi-bsw-kefka: [DMESG-FAIL][10] ([i915#1314]) -> [PASS][11] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html * igt@kms_addfb_basic@bo-too-small-due-to-tiling: - fi-tgl-y: [DMESG-WARN][12] ([CI#94] / [i915#402]) -> [PASS][13] +1 similar issue [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html * igt@kms_chamelium@dp-crc-fast: - fi-kbl-7500u: [FAIL][14] ([fdo#109635] / [i915#217]) -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][16] ([fdo#111096] / [i915#323]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16872/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [i915#1314]: https://gitlab.freedesktop.org/drm/intel/issues/1314 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 Participating hosts (46 -> 44) -- Additional (2): fi-bwr-2160 fi-tgl-dsi Missing(4): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-hsw-4200u Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_8088 -> Patchwork_16872 CI-20190529: 20190529 CI_DRM_8088: 91dc8b179da374160a6bbdbd6987a512a10fbc02 @ git://anongit.freedesktop.org/gfx-ci/linux
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/tgl: Add definitions for VRR registers and bits
== Series Details == Series: drm/i915/tgl: Add definitions for VRR registers and bits URL : https://patchwork.freedesktop.org/series/74410/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dgfx: avoid opregion calls and messages
== Series Details == Series: drm/i915/dgfx: avoid opregion calls and messages URL : https://patchwork.freedesktop.org/series/74408/ State : success == Summary == CI Bug Log - changes from CI_DRM_8088 -> Patchwork_16871 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16871/index.html Known issues Here are the changes found in Patchwork_16871 that come from known issues: ### IGT changes ### Issues hit * igt@gem_flink_basic@double-flink: - fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([CI#94] / [i915#402]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@gem_flink_ba...@double-flink.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16871/fi-tgl-y/igt@gem_flink_ba...@double-flink.html Possible fixes * igt@kms_addfb_basic@bo-too-small-due-to-tiling: - fi-tgl-y: [DMESG-WARN][3] ([CI#94] / [i915#402]) -> [PASS][4] +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16871/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html * igt@kms_chamelium@dp-crc-fast: - fi-kbl-7500u: [FAIL][5] ([fdo#109635] / [i915#217]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16871/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html Warnings * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][7] ([fdo#111096] / [i915#323]) -> [FAIL][8] ([fdo#111407]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16871/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 Participating hosts (46 -> 38) -- Additional (2): fi-bwr-2160 fi-tgl-dsi Missing(10): fi-kbl-soraka fi-bdw-5557u fi-hsw-4200u fi-hsw-peppy fi-skl-6770hq fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-ivb-3770 fi-bsw-kefka Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_8088 -> Patchwork_16871 CI-20190529: 20190529 CI_DRM_8088: 91dc8b179da374160a6bbdbd6987a512a10fbc02 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5498: 1bb7a25a09fe3e653d310e8bdfbdde4a1934b326 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16871: 5812120aa654d89e3fbf4493221d5e7431c4d424 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 5812120aa654 drm/i915/dgfx: avoid opregion calls and messages == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16871/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3] drm/i915/tgl: Add definitions for VRR registers and bits
Add definitions for registers grouped under Transcoder VRR function
with necessary bitfields.
Bspec: 49268
v2: Use REG_GENMASK, correct tabs/space indentation and move the
definitions near the transcoder section.(Jani)
v3: Remove unnecessary prefix from bit/mask definitions.(Manasi)
Cc: Manasi Navare
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Matt Roper
Signed-off-by: Aditya Swarup
---
drivers/gpu/drm/i915/i915_reg.h | 90 +
1 file changed, 90 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 80cf02a6eec1..34bda79e8a62 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4321,6 +4321,96 @@ enum {
#define EXITLINE_MASKREG_GENMASK(12, 0)
#define EXITLINE_SHIFT 0
+/* VRR registers */
+#define _TRANS_VRR_CTL_A 0x60420
+#define _TRANS_VRR_CTL_B 0x61420
+#define _TRANS_VRR_CTL_C 0x62420
+#define _TRANS_VRR_CTL_D 0x63420
+#define TRANS_VRR_CTL(tran)_MMIO_TRANS2(tran, _TRANS_VRR_CTL_A)
+#define VRR_CTL_VRR_ENABLE REG_BIT(31)
+#define VRR_CTL_IGN_MAX_SHIFTREG_BIT(30)
+#define VRR_CTL_FLIP_LINE_EN REG_BIT(29)
+#define VRR_CTL_LINE_COUNT_MASK REG_GENMASK(10, 3)
+#define VRR_CTL_SW_FULLLINE_COUNTREG_BIT(0)
+
+#define _TRANS_VRR_VMAX_A 0x60424
+#define _TRANS_VRR_VMAX_B 0x61424
+#define _TRANS_VRR_VMAX_C 0x62424
+#define _TRANS_VRR_VMAX_D 0x63424
+#define TRANS_VRR_VMAX(tran) _MMIO_TRANS2(tran, _TRANS_VRR_VMAX_A)
+#define VRR_VMAX_MASKREG_GENMASK(19, 0)
+
+#define _TRANS_VRR_VMIN_A 0x60434
+#define _TRANS_VRR_VMIN_B 0x61434
+#define _TRANS_VRR_VMIN_C 0x62434
+#define _TRANS_VRR_VMIN_D 0x63434
+#define TRANS_VRR_VMIN(tran) _MMIO_TRANS2(tran, _TRANS_VRR_VMIN_A)
+#define VRR_VMIN_MASKREG_GENMASK(15, 0)
+
+#define _TRANS_VRR_VMAXSHIFT_A 0x60428
+#define _TRANS_VRR_VMAXSHIFT_B 0x61428
+#define _TRANS_VRR_VMAXSHIFT_C 0x62428
+#define _TRANS_VRR_VMAXSHIFT_D 0x63428
+#define TRANS_VRR_VMAXSHIFT(tran) _MMIO_TRANS2(tran, \
+ _TRANS_VRR_VMAXSHIFT_A)
+#define VRR_VMAXSHIFT_DEC_MASK REG_GENMASK(29, 16)
+#define VRR_VMAXSHIFT_DECREG_BIT(16)
+#define VRR_VMAXSHIFT_INC_MASK REG_GENMASK(12, 0)
+
+#define _TRANS_VRR_STATUS_A0x6042C
+#define _TRANS_VRR_STATUS_B0x6142C
+#define _TRANS_VRR_STATUS_C0x6242C
+#define _TRANS_VRR_STATUS_D0x6342C
+#define TRANS_VRR_STATUS(tran) _MMIO_TRANS2(tran, _TRANS_VRR_STATUS_A)
+#define VRR_STATUS_VMAX_REACHED REG_BIT(31)
+#define VRR_STATUS_NOFLIP_TILL_BNDR REG_BIT(30)
+#define VRR_STATUS_FLIP_BEF_BNDR REG_BIT(29)
+#define VRR_STATUS_NO_FLIP_FRAME REG_BIT(28)
+#define VRR_STATUS_VRR_EN_LIVE REG_BIT(27)
+#define VRR_STATUS_FLIPS_SERVICEDREG_BIT(26)
+#define VRR_STATUS_VBLANK_MASK REG_GENMASK(22, 20)
+#define STATUS_FSM_IDLE REG_FIELD_PREP(VRR_STATUS_VBLANK_MASK,
0)
+#define STATUS_FSM_WAIT_TILL_FDB REG_FIELD_PREP(VRR_STATUS_VBLANK_MASK,
1)
+#define STATUS_FSM_WAIT_TILL_FS REG_FIELD_PREP(VRR_STATUS_VBLANK_MASK,
2)
+#define STATUS_FSM_WAIT_TILL_FLIPREG_FIELD_PREP(VRR_STATUS_VBLANK_MASK,
3)
+#define STATUS_FSM_PIPELINE_FILL REG_FIELD_PREP(VRR_STATUS_VBLANK_MASK,
4)
+#define STATUS_FSM_ACTIVEREG_FIELD_PREP(VRR_STATUS_VBLANK_MASK,
5)
+#define STATUS_FSM_LEGACY_VBLANK REG_FIELD_PREP(VRR_STATUS_VBLANK_MASK,
6)
+
+#define _TRANS_VRR_VTOTAL_PREV_A 0x60480
+#define _TRANS_VRR_VTOTAL_PREV_B 0x61480
+#define _TRANS_VRR_VTOTAL_PREV_C 0x62480
+#define _TRANS_VRR_VTOTAL_PREV_D 0x63480
+#define TRANS_VRR_VTOTAL_PREV(tran)_MMIO_TRANS2(tran, \
+ _TRANS_VRR_VTOTAL_PREV_A)
+#define VRR_VTOTAL_FLIP_BEFR_BNDRREG_BIT(31)
+#define VRR_VTOTAL_FLIP_AFTER_BNDR REG_BIT(30)
+#define VRR_VTOTAL_FLIP_AFTER_DBLBUF REG_BIT(29)
+#define VRR_VTOTAL_PREV_FRAME_MASK REG_GENMASK(19, 0)
+
+#define _TRANS_VRR_FLIPLINE_A 0x60438
+#define _TRANS_VRR_FLIPLINE_B 0x61438
+#define _TRANS_VRR_FLIPLINE_C 0x62438
+#define _TRANS_VRR_FLIPLINE_D 0x63438
+#define TRANS_VRR_FLIPLINE(tran) _MMIO_TRANS2(tran, \
+ _TRANS_VRR_FLIPLINE_A)
+#define VRR_FLIPLINE_MASKREG_GENMASK(19, 0)
+
+#define _TRANS_VRR_STATUS2_A 0x6043C
+#define _TRANS_VRR_STATUS2_B 0x6143C
+#define _TRANS_VRR_STATUS2_C 0x6243C
+#define _TRANS_VRR_STATUS2_D 0x6343C
+#define TRANS_VRR_STATUS2(tran)_MMIO_TRANS2(tran,
_TRANS_VRR_STATUS2_A)
+#define
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/dgfx: avoid opregion calls and messages
== Series Details == Series: drm/i915/dgfx: avoid opregion calls and messages URL : https://patchwork.freedesktop.org/series/74408/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev5)
== Series Details == Series: drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev5) URL : https://patchwork.freedesktop.org/series/45968/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8088 -> Patchwork_16870 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16870 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16870, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16870: ### IGT changes ### Possible regressions * igt@kms_busy@basic@modeset: - fi-apl-guc: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-apl-guc/igt@kms_busy@ba...@modeset.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-apl-guc/igt@kms_busy@ba...@modeset.html - fi-icl-dsi: [PASS][3] -> [FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-icl-dsi/igt@kms_busy@ba...@modeset.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-icl-dsi/igt@kms_busy@ba...@modeset.html - fi-bxt-dsi: [PASS][5] -> [FAIL][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-bxt-dsi/igt@kms_busy@ba...@modeset.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-bxt-dsi/igt@kms_busy@ba...@modeset.html - fi-cfl-guc: [PASS][7] -> [FAIL][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-cfl-guc/igt@kms_busy@ba...@modeset.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-cfl-guc/igt@kms_busy@ba...@modeset.html - fi-skl-6770hq: [PASS][9] -> [FAIL][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-skl-6770hq/igt@kms_busy@ba...@modeset.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-skl-6770hq/igt@kms_busy@ba...@modeset.html - fi-cml-s: [PASS][11] -> [FAIL][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-cml-s/igt@kms_busy@ba...@modeset.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-cml-s/igt@kms_busy@ba...@modeset.html - fi-kbl-soraka: [PASS][13] -> [FAIL][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-soraka/igt@kms_busy@ba...@modeset.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-kbl-soraka/igt@kms_busy@ba...@modeset.html - fi-icl-guc: [PASS][15] -> [FAIL][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-icl-guc/igt@kms_busy@ba...@modeset.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-icl-guc/igt@kms_busy@ba...@modeset.html - fi-skl-6700k2: [PASS][17] -> [FAIL][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-skl-6700k2/igt@kms_busy@ba...@modeset.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-skl-6700k2/igt@kms_busy@ba...@modeset.html - fi-glk-dsi: [PASS][19] -> [FAIL][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-glk-dsi/igt@kms_busy@ba...@modeset.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-glk-dsi/igt@kms_busy@ba...@modeset.html - fi-bsw-kefka: [PASS][21] -> [FAIL][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-bsw-kefka/igt@kms_busy@ba...@modeset.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-bsw-kefka/igt@kms_busy@ba...@modeset.html - fi-skl-guc: [PASS][23] -> [FAIL][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-skl-guc/igt@kms_busy@ba...@modeset.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-skl-guc/igt@kms_busy@ba...@modeset.html - fi-kbl-x1275: [PASS][25] -> [FAIL][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-x1275/igt@kms_busy@ba...@modeset.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-kbl-x1275/igt@kms_busy@ba...@modeset.html - fi-kbl-7500u: [PASS][27] -> [FAIL][28] [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-7500u/igt@kms_busy@ba...@modeset.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-kbl-7500u/igt@kms_busy@ba...@modeset.html - fi-icl-y: [PASS][29] -> [FAIL][30] [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-icl-y/igt@kms_busy@ba...@modeset.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16870/fi-icl-y/igt@kms_busy@ba...@modeset.html - fi-cfl-8700k: [PASS][31] ->
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev5)
== Series Details == Series: drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev5) URL : https://patchwork.freedesktop.org/series/45968/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags
== Series Details == Series: series starting with [v4,1/2] drm/edid: Name the detailed monitor range flags URL : https://patchwork.freedesktop.org/series/74364/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8074_full -> Patchwork_16855_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16855_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16855_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16855_full: ### IGT changes ### Possible regressions * igt@gem_ctx_persistence@legacy-engines-mixed-process@vebox: - shard-iclb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@vebox.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@vebox.html Known issues Here are the changes found in Patchwork_16855_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@legacy-engines-mixed-process@blt: - shard-iclb: [PASS][3] -> [FAIL][4] ([i915#679]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@blt.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@blt.html * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#110854]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_exec_balan...@smoke.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@gem_exec_balan...@smoke.html * igt@gem_exec_schedule@independent-bsd2: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276]) +13 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb1/igt@gem_exec_sched...@independent-bsd2.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb5/igt@gem_exec_sched...@independent-bsd2.html * igt@gem_exec_schedule@pi-common-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([i915#677]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb6/igt@gem_exec_sched...@pi-common-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb1/igt@gem_exec_sched...@pi-common-bsd.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +5 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb8/igt@gem_exec_sched...@wide-bsd.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb4/igt@gem_exec_sched...@wide-bsd.html * igt@gem_exec_suspend@basic-s3: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-kbl6/igt@gem_exec_susp...@basic-s3.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-kbl2/igt@gem_exec_susp...@basic-s3.html * igt@gem_workarounds@suspend-resume-context: - shard-skl: [PASS][15] -> [INCOMPLETE][16] ([i915#69]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl6/igt@gem_workarou...@suspend-resume-context.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl8/igt@gem_workarou...@suspend-resume-context.html * igt@i915_pm_dc@dc5-dpms: - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#447]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb7/igt@i915_pm...@dc5-dpms.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-iclb3/igt@i915_pm...@dc5-dpms.html * igt@i915_selftest@mock@buddy: - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([i915#1310] / [i915#1360]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl2/igt@i915_selftest@m...@buddy.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-skl1/igt@i915_selftest@m...@buddy.html * igt@kms_frontbuffer_tracking@fbc-tilingchange: - shard-snb: [PASS][21] -> [SKIP][22] ([fdo#109271]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-snb2/igt@kms_frontbuffer_track...@fbc-tilingchange.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16855/shard-snb4/igt@kms_frontbuffer_track...@fbc-tilingchange.html *
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev5)
== Series Details == Series: drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev5) URL : https://patchwork.freedesktop.org/series/45968/ State : warning == Summary == $ dim checkpatch origin/drm-tip bca7a2e764c5 drm: avoid spurious EBUSY due to nonblocking atomic modesets -:35: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #35: References: https://lists.freedesktop.org/archives/dri-devel/2018-July/182281.html -:52: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #52: FILE: drivers/gpu/drm/drm_atomic.c:1365: + unsigned requested_crtc = 0; -:53: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #53: FILE: drivers/gpu/drm/drm_atomic.c:1366: + unsigned affected_crtc = 0; -:93: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Daniel Vetter ' total: 0 errors, 4 warnings, 0 checks, 46 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: allow setting generic data pointer (rev4)
== Series Details == Series: drm/i915/gt: allow setting generic data pointer (rev4) URL : https://patchwork.freedesktop.org/series/74360/ State : success == Summary == CI Bug Log - changes from CI_DRM_8088 -> Patchwork_16869 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16869/index.html Known issues Here are the changes found in Patchwork_16869 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live@gem_contexts: - fi-cml-s: [PASS][1] -> [DMESG-FAIL][2] ([i915#877]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-cml-s/igt@i915_selftest@live@gem_contexts.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16869/fi-cml-s/igt@i915_selftest@live@gem_contexts.html * igt@kms_chamelium@dp-crc-fast: - fi-cml-u2: [PASS][3] -> [FAIL][4] ([i915#262]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16869/fi-cml-u2/igt@kms_chamel...@dp-crc-fast.html * igt@vgem_basic@setversion: - fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([CI#94] / [i915#402]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@vgem_ba...@setversion.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16869/fi-tgl-y/igt@vgem_ba...@setversion.html Possible fixes * igt@i915_selftest@live@execlists: - fi-bsw-kefka: [DMESG-FAIL][7] ([i915#1314]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16869/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html * igt@kms_addfb_basic@bo-too-small-due-to-tiling: - fi-tgl-y: [DMESG-WARN][9] ([CI#94] / [i915#402]) -> [PASS][10] +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16869/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html * igt@kms_chamelium@dp-crc-fast: - fi-kbl-7500u: [FAIL][11] ([fdo#109635] / [i915#217]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16869/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][13] ([fdo#111096] / [i915#323]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16869/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [i915#1314]: https://gitlab.freedesktop.org/drm/intel/issues/1314 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262 [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877 Participating hosts (46 -> 43) -- Additional (1): fi-bwr-2160 Missing(4): fi-skl-6770hq fi-byt-squawks fi-bsw-cyan fi-hsw-4200u Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_8088 -> Patchwork_16869 CI-20190529: 20190529 CI_DRM_8088: 91dc8b179da374160a6bbdbd6987a512a10fbc02 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5498: 1bb7a25a09fe3e653d310e8bdfbdde4a1934b326 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16869: 5c203f8d2312d96d4fd0f912635ddfc455722866 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 5c203f8d2312 drm/i915/gt: allow setting generic data pointer == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16869/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/gt: allow setting generic data pointer (rev4)
== Series Details == Series: drm/i915/gt: allow setting generic data pointer (rev4) URL : https://patchwork.freedesktop.org/series/74360/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/display: Deactive FBC in fastsets when disabled by parameter
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/display: Deactive FBC in
fastsets when disabled by parameter
URL : https://patchwork.freedesktop.org/series/74401/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8088 -> Patchwork_16868
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16868/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16868:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@i915_selftest@live@ring_submission}:
- fi-snb-2520m: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-snb-2520m/igt@i915_selftest@live@ring_submission.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16868/fi-snb-2520m/igt@i915_selftest@live@ring_submission.html
Known issues
Here are the changes found in Patchwork_16868 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s4-devices:
- fi-tgl-y: [PASS][3] -> [FAIL][4] ([CI#94])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16868/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html
* igt@kms_addfb_basic@clobberred-modifier:
- fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([CI#94] / [i915#402])
+1 similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@kms_addfb_ba...@clobberred-modifier.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16868/fi-tgl-y/igt@kms_addfb_ba...@clobberred-modifier.html
Possible fixes
* igt@kms_addfb_basic@bo-too-small-due-to-tiling:
- fi-tgl-y: [DMESG-WARN][7] ([CI#94] / [i915#402]) -> [PASS][8]
+1 similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16868/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (46 -> 38)
--
Additional (1): fi-tgl-dsi
Missing(9): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7500u
fi-gdg-551 fi-skl-6600u fi-bsw-kefka fi-skl-6700k2 fi-kbl-r
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_8088 -> Patchwork_16868
CI-20190529: 20190529
CI_DRM_8088: 91dc8b179da374160a6bbdbd6987a512a10fbc02 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5498: 1bb7a25a09fe3e653d310e8bdfbdde4a1934b326 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16868: deed84b37356bf57b15b4c730465f4369bf0d55d @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
deed84b37356 drm/i915/display: Do not write in removed FBC fence registers
55685d37ef4e drm/i915/display: Deactive FBC in fastsets when disabled by
parameter
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16868/index.html
___
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [CI,1/2] drm/i915: Add mechanism to submit a context WA on ring submission
== Series Details == Series: series starting with [CI,1/2] drm/i915: Add mechanism to submit a context WA on ring submission URL : https://patchwork.freedesktop.org/series/74363/ State : success == Summary == CI Bug Log - changes from CI_DRM_8074_full -> Patchwork_16853_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16853_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd: - shard-skl: [PASS][1] -> [INCOMPLETE][2] ([i915#1197]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl5/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@bsd.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-skl8/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@bsd.html * igt@gem_ctx_persistence@legacy-engines-mixed-process@render: - shard-skl: [PASS][3] -> [FAIL][4] ([i915#679]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl5/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@render.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-skl8/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@render.html * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#110854]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_exec_balan...@smoke.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-iclb3/igt@gem_exec_balan...@smoke.html * igt@gem_exec_schedule@implicit-read-write-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([i915#677]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb5/igt@gem_exec_sched...@implicit-read-write-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-iclb1/igt@gem_exec_sched...@implicit-read-write-bsd.html * igt@gem_exec_schedule@independent-bsd2: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +13 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb1/igt@gem_exec_sched...@independent-bsd2.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-iclb7/igt@gem_exec_sched...@independent-bsd2.html * igt@gem_exec_schedule@preempt-other-chain-bsd: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +7 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb6/igt@gem_exec_sched...@preempt-other-chain-bsd.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-iclb1/igt@gem_exec_sched...@preempt-other-chain-bsd.html * igt@i915_pm_rps@reset: - shard-iclb: [PASS][13] -> [FAIL][14] ([i915#413]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb6/igt@i915_pm_...@reset.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-iclb2/igt@i915_pm_...@reset.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-kbl7/igt@kms_cursor_...@pipe-c-cursor-suspend.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-kbl2/igt@kms_cursor_...@pipe-c-cursor-suspend.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-apl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-apl2/igt@kms_fbcon_...@fbc-suspend.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-apl8/igt@kms_fbcon_...@fbc-suspend.html * igt@kms_fbcon_fbt@psr-suspend: - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([i915#69]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl9/igt@kms_fbcon_...@psr-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-skl9/igt@kms_fbcon_...@psr-suspend.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#49]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl7/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-skl1/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][23] -> [FAIL][24] ([i915#1188]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl1/igt@kms_...@bpc-switch-dpms.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16853/shard-skl5/igt@kms_...@bpc-switch-dpms.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][25] -> [FAIL][26] ([fdo#108145])
[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [v2,1/2] drm/i915/display: Deactive FBC in fastsets when disabled by parameter
== Series Details == Series: series starting with [v2,1/2] drm/i915/display: Deactive FBC in fastsets when disabled by parameter URL : https://patchwork.freedesktop.org/series/74401/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/display: Deactive FBC in fastsets when disabled by parameter
== Series Details == Series: series starting with [v2,1/2] drm/i915/display: Deactive FBC in fastsets when disabled by parameter URL : https://patchwork.freedesktop.org/series/74401/ State : warning == Summary == $ dim checkpatch origin/drm-tip 55685d37ef4e drm/i915/display: Deactive FBC in fastsets when disabled by parameter -:20: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #20: i915 :00:02.0: [drm:i915_edp_psr_debug_set [i915]] Setting PSR debug to f total: 0 errors, 1 warnings, 0 checks, 65 lines checked deed84b37356 drm/i915/display: Do not write in removed FBC fence registers ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/tgl: Don't treat unslice registers as masked (rev2)
== Series Details ==
Series: drm/i915/tgl: Don't treat unslice registers as masked (rev2)
URL : https://patchwork.freedesktop.org/series/74351/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8088 -> Patchwork_16867
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_16867 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16867, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16867:
### IGT changes ###
Possible regressions
* igt@runner@aborted:
- fi-hsw-peppy: NOTRUN -> [FAIL][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/fi-hsw-peppy/igt@run...@aborted.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@i915_selftest@live@ring_submission}:
- fi-byt-j1900: [PASS][2] -> [DMESG-FAIL][3]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-byt-j1900/igt@i915_selftest@live@ring_submission.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/fi-byt-j1900/igt@i915_selftest@live@ring_submission.html
- fi-hsw-peppy: [PASS][4] -> [INCOMPLETE][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-hsw-peppy/igt@i915_selftest@live@ring_submission.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/fi-hsw-peppy/igt@i915_selftest@live@ring_submission.html
Known issues
Here are the changes found in Patchwork_16867 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_pm_rpm@module-reload:
- fi-kbl-guc: [PASS][6] -> [SKIP][7] ([fdo#109271])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-guc/igt@i915_pm_...@module-reload.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/fi-kbl-guc/igt@i915_pm_...@module-reload.html
* igt@prime_vgem@basic-gtt:
- fi-tgl-y: [PASS][8] -> [DMESG-WARN][9] ([CI#94] / [i915#402])
+1 similar issue
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@prime_v...@basic-gtt.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/fi-tgl-y/igt@prime_v...@basic-gtt.html
Possible fixes
* igt@i915_selftest@live@execlists:
- fi-bsw-kefka: [DMESG-FAIL][10] ([i915#1314]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/fi-bsw-kefka/igt@i915_selftest@l...@execlists.html
* igt@kms_addfb_basic@bo-too-small-due-to-tiling:
- fi-tgl-y: [DMESG-WARN][12] ([CI#94] / [i915#402]) -> [PASS][13]
+1 similar issue
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/fi-tgl-y/igt@kms_addfb_ba...@bo-too-small-due-to-tiling.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [FAIL][14] ([fdo#109635] / [i915#217]) -> [PASS][15]
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][16] ([fdo#111096] / [i915#323]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8088/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16867/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[i915#1314]: https://gitlab.freedesktop.org/drm/intel/issues/1314
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (46 -> 37)
--
Additional (2): fi-bwr-2160 fi-tgl-dsi
Missing(11): fi-bdw-5557u fi-hsw-4200u fi-skl-6770hq
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/tgl: Don't treat unslice registers as masked (rev2)
== Series Details == Series: drm/i915/tgl: Don't treat unslice registers as masked (rev2) URL : https://patchwork.freedesktop.org/series/74351/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915/dgfx: avoid opregion calls and messages
This avoids the annoying message
"Failed to get panel details from OpRegion (-19)" while initializing.
On DGFX there is no access to OpRegion, so just avoid any calls related
to it.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_opregion.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c
b/drivers/gpu/drm/i915/display/intel_opregion.c
index cc6b00959586..daadad046810 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -1006,6 +1006,10 @@ intel_opregion_get_panel_type(struct drm_i915_private
*dev_priv)
u32 panel_details;
int ret;
+ /* No access to OpRegion */
+ if (IS_DGFX(dev_priv))
+ return -ENODEV;
+
ret = swsci(dev_priv, SWSCI_GBDA_PANEL_DETAILS, 0x0, _details);
if (ret) {
drm_dbg_kms(_priv->drm,
--
2.25.1
___
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Gamma cleanups (rev4)
== Series Details == Series: drm/i915: Gamma cleanups (rev4) URL : https://patchwork.freedesktop.org/series/69136/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8087 -> Patchwork_16866 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16866 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16866, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16866/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16866: ### IGT changes ### Possible regressions * igt@gem_exec_parallel@fds: - fi-cfl-8700k: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-cfl-8700k/igt@gem_exec_paral...@fds.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16866/fi-cfl-8700k/igt@gem_exec_paral...@fds.html Known issues Here are the changes found in Patchwork_16866 that come from known issues: ### IGT changes ### Issues hit * igt@i915_selftest@live@gem_contexts: - fi-cml-s: [PASS][3] -> [DMESG-FAIL][4] ([i915#877]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-cml-s/igt@i915_selftest@live@gem_contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16866/fi-cml-s/igt@i915_selftest@live@gem_contexts.html * igt@kms_chamelium@hdmi-crc-fast: - fi-icl-u2: [PASS][5] -> [FAIL][6] ([fdo#109635] / [i915#217]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16866/fi-icl-u2/igt@kms_chamel...@hdmi-crc-fast.html * igt@prime_vgem@basic-fence-flip: - fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([CI#94] / [i915#402]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-tgl-y/igt@prime_v...@basic-fence-flip.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16866/fi-tgl-y/igt@prime_v...@basic-fence-flip.html Possible fixes * igt@prime_vgem@basic-sync-default: - fi-tgl-y: [DMESG-WARN][9] ([CI#94] / [i915#402]) -> [PASS][10] +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-tgl-y/igt@prime_v...@basic-sync-default.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16866/fi-tgl-y/igt@prime_v...@basic-sync-default.html Warnings * igt@i915_pm_rpm@module-reload: - fi-icl-u2: [TIMEOUT][11] -> [DMESG-WARN][12] ([i915#289]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-icl-u2/igt@i915_pm_...@module-reload.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16866/fi-icl-u2/igt@i915_pm_...@module-reload.html [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#289]: https://gitlab.freedesktop.org/drm/intel/issues/289 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877 Participating hosts (49 -> 40) -- Additional (1): fi-icl-y Missing(10): fi-hsw-4200u fi-byt-j1900 fi-bsw-n3050 fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-ivb-3770 fi-byt-clapper fi-bdw-samus Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_8087 -> Patchwork_16866 CI-20190529: 20190529 CI_DRM_8087: 2eecd3619f1f227c890414a0730a723f1c5a3a60 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5498: 1bb7a25a09fe3e653d310e8bdfbdde4a1934b326 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16866: 3da0fd12387c4ea1e49870f9119bd70c9e1fceb2 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 3da0fd12387c drm/i915: Pass the crtc to the low level read_lut() funcs 406986ee9efc drm/i915: Fix readout of PIPEGCMAX 8973bf85659e drm/i915: Refactor LUT read functions ef770588c959 drm/i915: Clean up integer types in color code d4f1fa52704c drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/ 319ef1a13f77 drm/i915: s/blob_data/lut/ cce1fed1d2dd drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants 97e95a526dd1 drm/i915: Clean up i9xx_load_luts_internal() ca6d5d42a01b drm/i915: Polish CHV CGM CSC loading == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16866/index.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: allow setting generic data pointer
== Series Details == Series: drm/i915/gt: allow setting generic data pointer URL : https://patchwork.freedesktop.org/series/74360/ State : success == Summary == CI Bug Log - changes from CI_DRM_8074_full -> Patchwork_16852_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16852_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@rcs0-s3: - shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-kbl1/igt@gem_ctx_isolat...@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-kbl2/igt@gem_ctx_isolat...@rcs0-s3.html * igt@gem_exec_schedule@implicit-write-read-bsd2: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / [i915#677]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_exec_sched...@implicit-write-read-bsd2.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-iclb3/igt@gem_exec_sched...@implicit-write-read-bsd2.html * igt@gem_exec_schedule@pi-shared-iova-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb8/igt@gem_exec_sched...@pi-shared-iova-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-iclb4/igt@gem_exec_sched...@pi-shared-iova-bsd.html * igt@gem_exec_schedule@promotion-bsd1: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276]) +7 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_exec_sched...@promotion-bsd1.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-iclb3/igt@gem_exec_sched...@promotion-bsd1.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#112146]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb8/igt@gem_exec_sched...@reorder-wide-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-iclb2/igt@gem_exec_sched...@reorder-wide-bsd.html * igt@i915_pm_rps@min-max-config-loaded: - shard-iclb: [PASS][11] -> [FAIL][12] ([i915#370]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb8/igt@i915_pm_...@min-max-config-loaded.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-iclb2/igt@i915_pm_...@min-max-config-loaded.html * igt@i915_pm_rps@waitboost: - shard-iclb: [PASS][13] -> [FAIL][14] ([i915#413]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb6/igt@i915_pm_...@waitboost.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-iclb4/igt@i915_pm_...@waitboost.html * igt@i915_suspend@sysfs-reader: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-apl4/igt@i915_susp...@sysfs-reader.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-apl4/igt@i915_susp...@sysfs-reader.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#79]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl8/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-skl10/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#49]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl7/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-skl5/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl7/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-skl5/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@kms_psr@psr2_no_drrs.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16852/shard-iclb3/igt@kms_psr@psr2_no_drrs.html * igt@kms_setmode@basic: - shard-apl: [PASS][25] -> [FAIL][26] ([i915#31]) [25]:
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Gamma cleanups (rev4)
== Series Details == Series: drm/i915: Gamma cleanups (rev4) URL : https://patchwork.freedesktop.org/series/69136/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev4)
== Series Details ==
Series: drm/i915: Gamma cleanups (rev4)
URL : https://patchwork.freedesktop.org/series/69136/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ca6d5d42a01b drm/i915: Polish CHV CGM CSC loading
97e95a526dd1 drm/i915: Clean up i9xx_load_luts_internal()
cce1fed1d2dd drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants
-:58: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#58: FILE: drivers/gpu/drm/i915/display/intel_color.c:1845:
+ blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
-:60: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#60: FILE: drivers/gpu/drm/i915/display/intel_color.c:1847:
+ blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
-:62: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#62: FILE: drivers/gpu/drm/i915/display/intel_color.c:1849:
+ blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
total: 0 errors, 0 warnings, 3 checks, 65 lines checked
319ef1a13f77 drm/i915: s/blob_data/lut/
-:40: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#40: FILE: drivers/gpu/drm/i915/display/intel_color.c:1711:
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
-:43: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#43: FILE: drivers/gpu/drm/i915/display/intel_color.c:1713:
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
-:46: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#46: FILE: drivers/gpu/drm/i915/display/intel_color.c:1715:
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
-:83: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#83: FILE: drivers/gpu/drm/i915/display/intel_color.c:1762:
+ lut[i].red = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
intel_de_read(dev_priv,
PIPEGCMAX(pipe, 0)));
-:86: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#86: FILE: drivers/gpu/drm/i915/display/intel_color.c:1764:
+ lut[i].green = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
intel_de_read(dev_priv,
PIPEGCMAX(pipe, 1)));
-:89: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#89: FILE: drivers/gpu/drm/i915/display/intel_color.c:1766:
+ lut[i].blue = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
intel_de_read(dev_priv,
PIPEGCMAX(pipe, 2)));
-:111: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#111: FILE: drivers/gpu/drm/i915/display/intel_color.c:1803:
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
-:114: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#114: FILE: drivers/gpu/drm/i915/display/intel_color.c:1805:
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
-:119: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#119: FILE: drivers/gpu/drm/i915/display/intel_color.c:1809:
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
-:143: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#143: FILE: drivers/gpu/drm/i915/display/intel_color.c:1845:
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
-:146: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#146: FILE: drivers/gpu/drm/i915/display/intel_color.c:1847:
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
-:149: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#149: FILE: drivers/gpu/drm/i915/display/intel_color.c:1849:
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
-:173: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#173: FILE: drivers/gpu/drm/i915/display/intel_color.c:1878:
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
-:176: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#176: FILE: drivers/gpu/drm/i915/display/intel_color.c:1880:
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
-:179: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#179: FILE: drivers/gpu/drm/i915/display/intel_color.c:1882:
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
-:206: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#206: FILE: drivers/gpu/drm/i915/display/intel_color.c:1928:
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
-:209: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#209: FILE: drivers/gpu/drm/i915/display/intel_color.c:1930:
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
-:212: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#212: FILE: drivers/gpu/drm/i915/display/intel_color.c:1932:
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
total: 0 errors, 0 warnings, 18 checks, 183 lines checked
d4f1fa52704c drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/
ef770588c959 drm/i915: Clean up integer types in color code
8973bf85659e drm/i915: Refactor LUT read functions
406986ee9efc drm/i915: Fix readout of
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Close race between cacheline_retire and free
== Series Details ==
Series: drm/i915/gt: Close race between cacheline_retire and free
URL : https://patchwork.freedesktop.org/series/74397/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8087 -> Patchwork_16865
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16865/index.html
Known issues
Here are the changes found in Patchwork_16865 that come from known issues:
### IGT changes ###
Issues hit
* igt@prime_self_import@basic-llseek-bad:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([CI#94] / [i915#402])
+1 similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-tgl-y/igt@prime_self_imp...@basic-llseek-bad.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16865/fi-tgl-y/igt@prime_self_imp...@basic-llseek-bad.html
Possible fixes
* igt@gem_exec_suspend@basic-s4-devices:
- fi-tgl-y: [FAIL][3] ([CI#94]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16865/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html
* {igt@i915_selftest@live@ring_submission}:
- fi-hsw-peppy: [INCOMPLETE][5] -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-hsw-peppy/igt@i915_selftest@live@ring_submission.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16865/fi-hsw-peppy/igt@i915_selftest@live@ring_submission.html
* igt@prime_vgem@basic-sync-default:
- fi-tgl-y: [DMESG-WARN][7] ([CI#94] / [i915#402]) -> [PASS][8]
+1 similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-tgl-y/igt@prime_v...@basic-sync-default.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16865/fi-tgl-y/igt@prime_v...@basic-sync-default.html
Warnings
* igt@i915_pm_rpm@module-reload:
- fi-icl-u2: [TIMEOUT][9] -> [DMESG-WARN][10] ([i915#289])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8087/fi-icl-u2/igt@i915_pm_...@module-reload.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16865/fi-icl-u2/igt@i915_pm_...@module-reload.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[i915#289]: https://gitlab.freedesktop.org/drm/intel/issues/289
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
Participating hosts (49 -> 40)
--
Additional (1): fi-icl-y
Missing(10): fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-cfl-8109u
fi-bsw-kefka fi-skl-lmem fi-bdw-samus fi-byt-clapper fi-skl-6600u fi-snb-2600
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_8087 -> Patchwork_16865
CI-20190529: 20190529
CI_DRM_8087: 2eecd3619f1f227c890414a0730a723f1c5a3a60 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5498: 1bb7a25a09fe3e653d310e8bdfbdde4a1934b326 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16865: bdc6f49063104b1a5038deb2bc562c5bacdef941 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
bdc6f4906310 drm/i915/gt: Close race between cacheline_retire and free
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16865/index.html
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v4] drm/i915/gt: allow setting generic data pointer
From: Andi Shyti
When registering debugfs files the intel gt debugfs library
forces a 'struct *gt' private data on the caller.
To be open to different usages make the new
"intel_gt_debugfs_register_files()"[*] function more generic by
converting the 'struct *gt' pointer to a 'void *' type.
I take the chance to rename the functions by using "intel_gt_" as
prefix instead of "debugfs_", so that "debugfs_gt_register_files()"
becomes "intel_gt_debugfs_register_files()".
Signed-off-by: Andi Shyti
Reviewed-by: Daniele Ceraolo Spurio
---
Hi,
Thanks Daniele for the review.
Andi
Changelog:
v4:
- removed the wrapper which turns out it's not needed anymore.
v3:
- removed unused gt parameter from the
__intel_gt_debugfs_register_files()
v2:
- the eval function is made generic as suggested by Daniele.
drivers/gpu/drm/i915/gt/debugfs_engines.c | 2 +-
drivers/gpu/drm/i915/gt/debugfs_gt.c | 11 +--
drivers/gpu/drm/i915/gt/debugfs_gt.h | 9 -
drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 14 +-
4 files changed, 19 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c
b/drivers/gpu/drm/i915/gt/debugfs_engines.c
index 6a5e9ab20b94..5e3725e62241 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_engines.c
@@ -32,5 +32,5 @@ void debugfs_engines_register(struct intel_gt *gt, struct
dentry *root)
{ "engines", _fops },
};
- debugfs_gt_register_files(gt, root, files, ARRAY_SIZE(files));
+ intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
}
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c
b/drivers/gpu/drm/i915/gt/debugfs_gt.c
index 75255aaacaed..de73b63d6ba7 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.c
@@ -26,15 +26,14 @@ void debugfs_gt_register(struct intel_gt *gt)
debugfs_gt_pm_register(gt, root);
}
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count)
+void intel_gt_debugfs_register_files(struct dentry *root,
+const struct debugfs_gt_file *files,
+unsigned long count, void *data)
{
while (count--) {
- if (!files->eval || files->eval(gt))
+ if (!files->eval || files->eval(data))
debugfs_create_file(files->name,
- 0444, root, gt,
+ 0444, root, data,
files->fops);
files++;
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.h
b/drivers/gpu/drm/i915/gt/debugfs_gt.h
index 4ea0f06cda8f..f77540f727e9 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.h
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.h
@@ -28,12 +28,11 @@ void debugfs_gt_register(struct intel_gt *gt);
struct debugfs_gt_file {
const char *name;
const struct file_operations *fops;
- bool (*eval)(const struct intel_gt *gt);
+ bool (*eval)(void *data);
};
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count);
+void intel_gt_debugfs_register_files(struct dentry *root,
+const struct debugfs_gt_file *files,
+unsigned long count, void *data);
#endif /* DEBUGFS_GT_H */
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
index 059c9e5c002e..dc024944873a 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
@@ -506,9 +506,11 @@ static int llc_show(struct seq_file *m, void *data)
return 0;
}
-static bool llc_eval(const struct intel_gt *gt)
+static bool llc_eval(void *data)
{
- return HAS_LLC(gt->i915);
+ struct intel_gt *gt = data;
+
+ return gt && HAS_LLC(gt->i915);
}
DEFINE_GT_DEBUGFS_ATTRIBUTE(llc);
@@ -580,9 +582,11 @@ static int rps_boost_show(struct seq_file *m, void *data)
return 0;
}
-static bool rps_eval(const struct intel_gt *gt)
+static bool rps_eval(void *data)
{
- return HAS_RPS(gt->i915);
+ struct intel_gt *gt = data;
+
+ return gt && HAS_RPS(gt->i915);
}
DEFINE_GT_DEBUGFS_ATTRIBUTE(rps_boost);
@@ -597,5 +601,5 @@ void debugfs_gt_pm_register(struct intel_gt *gt, struct
dentry *root)
{ "rps_boost", _boost_fops, rps_eval },
};
- debugfs_gt_register_files(gt, root, files, ARRAY_SIZE(files));
+ intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
}
--
2.25.0
___
Re: [Intel-gfx] 5.6 DP-MST regression: 1 of 2 monitors on TB3 (DP-MST) dock no longer light up
On Wed, 2020-02-26 at 18:52 +0100, Hans de Goede wrote:
> Hi,
>
> On 2/26/20 5:05 PM, Alex Deucher wrote:
> > On Wed, Feb 26, 2020 at 10:43 AM Hans de Goede
> > wrote:
> > > Hi,
> > >
> > > On 2/26/20 4:29 PM, Alex Deucher wrote:
> > > > On Wed, Feb 26, 2020 at 10:16 AM Hans de Goede
> > > > wrote:
> > > > > Hi Lyude and everyone else,
> > > > >
> > > > > Lyude I'm mailing you about this because you have done a lot of
> > > > > work on DP MST, but if this rings a bell to anyone else feel
> > > > > free to weigh in on this.
> > > >
> > > > Might be a duplicate of:
> > > > https://gitlab.freedesktop.org/drm/amd/issues/1052
> > >
> > > Looks like you are right, reverting the commit which the bisect
> > > from that issue points to:
> > >
> > > cd82d82cbc04 ("drm/dp_mst: Add branch bandwidth validation to MST atomic
> > > check")
> > >
> > > Fixes the issue for me. I will add a comment to the issue.
> > >
> > > Note I'm using integrated Intel gfx, so that means that this issue
> > > definitely is not amdgpu specific.
> > >
> >
> > I'm not too familiar with the mst code, but I wonder if we were
> > exceeding the bandwidth limits in some setups and it just happened to
> > work, but now that we enforcing them, they don't which is correct, but
> > a regression from some users' perspective?
>
> I seriously doubt that is the case according to:
> https://support.lenovo.com/nl/en/solutions/pd029622
>
> The gen 2 tb3 dock can handle 2 external
> displays at 3840*2160@60Hz together with the internal
> panel being on and both my external displays run at
> 1920x1080@60 so I'm consuming less then half of the
> maximum bandwidth.
OK-so I wasn't actually able to reproduce this issue with my setup (I've got a
X1 Carbon 7th generation, but I don't have the 2nd generation dock - only the
first generation dock) but I'm certain I've actually fixed it now, since I
realized we did not have a very good understanding of how PBN limitations are
advertised with MST. I rewrote the bandwidth checks again, and in the process
also found a much more subtle regression that got introduced in 5.6, which
would sometimes cause MST probing to appear to just stop in it's tracks with
no messages.
I cc'd both patch series to you, so I'd recommend applying them both onto your
kernel and seeing if that fixes your issues. If it still doesn't, then get me
some kernel logs with:
drm.debug=0x116 log_buf_len=50M
And I'll take a closer look. I'm pretty confident this should fix everything
though :)
>
> There definitely is a bug somewhere in the
> cd82d82cbc04 ("drm/dp_mst: Add branch bandwidth validation to MST atomic
> check")
> commit (or somewhere else and triggered by that commit).
>
> Regards,
>
> Hans
>
>
>
>
>
>
>
> > Alex
> >
> >
> > > Regards,
> > >
> > > Hans
> > >
> > >
> > >
> > >
> > > > > I'm currently using a Lenovo X1 7th gen + a Lenovo TB3 gen 2 dock
> > > > > as my daily rider for testing purposes. When 5.6-rc1 came out I
> > > > > noticed that only 1 of the 2 1920x1080@60 monitors on the dock
> > > > > lights up.
> > > > >
> > > > > There are no kernel errors in the logs, but mutter/gnome-shell says:
> > > > >
> > > > > gnome-shell[1316]: Failed to post KMS update: Page flip of 93 failed
> > > > >
> > > > > With 93 being the crtc-id of the crtc used for the monitor which is
> > > > > displaying black. Since then I've waited for 5.6-rc3 hoping that a
> > > > > fix was already queued up, but 5.6-rc3 still has this problem.
> > > > >
> > > > > gnome-shell does behave as if all monitors are connected, so the
> > > > > monitor is seen, but we are failing to actually send any frames
> > > > > to it.
> > > > >
> > > > > I've put a log collected with drm.debug=0x104 here:
> > > > > https://fedorapeople.org/~jwrdegoede/drm-debug.log
> > > > >
> > > > > This message stands out as pointing to the likely cause of this
> > > > > problem:
> > > > >
> > > > > [3.309061] [drm:intel_dump_pipe_config [i915]] MST master
> > > > > transcoder:
> > > > >
> > > > > Regards,
> > > > >
> > > > > Hans
> > > > >
> > > > > ___
> > > > > dri-devel mailing list
> > > > > dri-de...@lists.freedesktop.org
> > > > > https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Cheers,
Lyude Paul (she/her)
Associate Software Engineer at Red Hat
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/gt: Close race between cacheline_retire and free
== Series Details == Series: drm/i915/gt: Close race between cacheline_retire and free URL : https://patchwork.freedesktop.org/series/74397/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/phys: unconditionally call release_memory_region
== Series Details == Series: drm/i915/phys: unconditionally call release_memory_region URL : https://patchwork.freedesktop.org/series/74354/ State : success == Summary == CI Bug Log - changes from CI_DRM_8074_full -> Patchwork_16849_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16849_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_exec_balan...@smoke.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-iclb6/igt@gem_exec_balan...@smoke.html * igt@gem_exec_schedule@implicit-read-write-bsd1: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / [i915#677]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb1/igt@gem_exec_sched...@implicit-read-write-bsd1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-iclb8/igt@gem_exec_sched...@implicit-read-write-bsd1.html * igt@gem_exec_schedule@independent-bsd2: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276]) +14 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb1/igt@gem_exec_sched...@independent-bsd2.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-iclb6/igt@gem_exec_sched...@independent-bsd2.html * igt@gem_exec_schedule@pi-common-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([i915#677]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb6/igt@gem_exec_sched...@pi-common-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-iclb1/igt@gem_exec_sched...@pi-common-bsd.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#112146]) +6 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb8/igt@gem_exec_sched...@wide-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-iclb1/igt@gem_exec_sched...@wide-bsd.html * igt@i915_pm_rps@waitboost: - shard-iclb: [PASS][11] -> [FAIL][12] ([i915#413]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb6/igt@i915_pm_...@waitboost.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-iclb1/igt@i915_pm_...@waitboost.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#49]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl7/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-skl10/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +2 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-apl7/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-b-planes.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-apl1/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-b-planes.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl7/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-skl10/igt@kms_plane_alpha_bl...@pipe-c-constant-alpha-min.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145] / [i915#265]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl8/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-skl5/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109441]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-iclb6/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@perf_pmu@busy-vcs1: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#112080]) +15 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb1/igt@perf_...@busy-vcs1.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16849/shard-iclb6/igt@perf_...@busy-vcs1.html Possible fixes * igt@gem_ctx_isolation@vcs1-dirty-create: -
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev4)
== Series Details == Series: drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev4) URL : https://patchwork.freedesktop.org/series/45968/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8086 -> Patchwork_16864 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16864 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16864, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16864: ### IGT changes ### Possible regressions * igt@kms_busy@basic@modeset: - fi-apl-guc: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-apl-guc/igt@kms_busy@ba...@modeset.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-apl-guc/igt@kms_busy@ba...@modeset.html - fi-icl-dsi: [PASS][3] -> [FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-icl-dsi/igt@kms_busy@ba...@modeset.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-icl-dsi/igt@kms_busy@ba...@modeset.html - fi-bxt-dsi: [PASS][5] -> [FAIL][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-bxt-dsi/igt@kms_busy@ba...@modeset.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-bxt-dsi/igt@kms_busy@ba...@modeset.html - fi-cfl-guc: [PASS][7] -> [FAIL][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-cfl-guc/igt@kms_busy@ba...@modeset.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-cfl-guc/igt@kms_busy@ba...@modeset.html - fi-skl-6600u: [PASS][9] -> [FAIL][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-skl-6600u/igt@kms_busy@ba...@modeset.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-skl-6600u/igt@kms_busy@ba...@modeset.html - fi-cml-s: [PASS][11] -> [FAIL][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-cml-s/igt@kms_busy@ba...@modeset.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-cml-s/igt@kms_busy@ba...@modeset.html - fi-kbl-soraka: [PASS][13] -> [FAIL][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-kbl-soraka/igt@kms_busy@ba...@modeset.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-kbl-soraka/igt@kms_busy@ba...@modeset.html - fi-bsw-n3050: [PASS][15] -> [FAIL][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-bsw-n3050/igt@kms_busy@ba...@modeset.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-bsw-n3050/igt@kms_busy@ba...@modeset.html - fi-icl-guc: [PASS][17] -> [FAIL][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-icl-guc/igt@kms_busy@ba...@modeset.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-icl-guc/igt@kms_busy@ba...@modeset.html - fi-skl-6700k2: [PASS][19] -> [FAIL][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-skl-6700k2/igt@kms_busy@ba...@modeset.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-skl-6700k2/igt@kms_busy@ba...@modeset.html - fi-glk-dsi: [PASS][21] -> [FAIL][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-glk-dsi/igt@kms_busy@ba...@modeset.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-glk-dsi/igt@kms_busy@ba...@modeset.html - fi-bsw-kefka: [PASS][23] -> [FAIL][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-bsw-kefka/igt@kms_busy@ba...@modeset.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-bsw-kefka/igt@kms_busy@ba...@modeset.html - fi-skl-guc: NOTRUN -> [FAIL][25] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-skl-guc/igt@kms_busy@ba...@modeset.html - fi-kbl-x1275: [PASS][26] -> [FAIL][27] [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-kbl-x1275/igt@kms_busy@ba...@modeset.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-kbl-x1275/igt@kms_busy@ba...@modeset.html - fi-kbl-7500u: [PASS][28] -> [FAIL][29] [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-kbl-7500u/igt@kms_busy@ba...@modeset.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16864/fi-kbl-7500u/igt@kms_busy@ba...@modeset.html - fi-cfl-8109u: [PASS][30] -> [FAIL][31] [30]:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: be more solid in checking the alignment
== Series Details == Series: drm/i915: be more solid in checking the alignment URL : https://patchwork.freedesktop.org/series/74353/ State : success == Summary == CI Bug Log - changes from CI_DRM_8074_full -> Patchwork_16848_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16848_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#110854]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_exec_balan...@smoke.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-iclb7/igt@gem_exec_balan...@smoke.html * igt@gem_exec_schedule@implicit-write-read-bsd2: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / [i915#677]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb2/igt@gem_exec_sched...@implicit-write-read-bsd2.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-iclb5/igt@gem_exec_sched...@implicit-write-read-bsd2.html * igt@gem_exec_schedule@independent-bsd2: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276]) +14 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb1/igt@gem_exec_sched...@independent-bsd2.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-iclb7/igt@gem_exec_sched...@independent-bsd2.html * igt@gem_exec_schedule@pi-shared-iova-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([i915#677]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb8/igt@gem_exec_sched...@pi-shared-iova-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-iclb4/igt@gem_exec_sched...@pi-shared-iova-bsd.html * igt@gem_exec_schedule@preempt-other-chain-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#112146]) +5 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb6/igt@gem_exec_sched...@preempt-other-chain-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-iclb4/igt@gem_exec_sched...@preempt-other-chain-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-kbl: [PASS][11] -> [FAIL][12] ([i915#644]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-kbl6/igt@gem_pp...@flink-and-close-vma-leak.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-kbl6/igt@gem_pp...@flink-and-close-vma-leak.html - shard-skl: [PASS][13] -> [FAIL][14] ([i915#644]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl5/igt@gem_pp...@flink-and-close-vma-leak.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-skl9/igt@gem_pp...@flink-and-close-vma-leak.html * igt@i915_pm_dc@dc6-dpms: - shard-iclb: [PASS][15] -> [FAIL][16] ([i915#454]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb6/igt@i915_pm...@dc6-dpms.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-iclb3/igt@i915_pm...@dc6-dpms.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-kbl2/igt@kms_cursor_...@pipe-b-cursor-suspend.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-kbl2/igt@kms_cursor_...@pipe-b-cursor-suspend.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [PASS][19] -> [FAIL][20] ([i915#72]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-glk6/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-glk2/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html * igt@kms_cursor_legacy@flip-vs-cursor-toggle: - shard-skl: [PASS][21] -> [FAIL][22] ([IGT#5] / [i915#697]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-skl9/igt@kms_cursor_leg...@flip-vs-cursor-toggle.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-skl2/igt@kms_cursor_leg...@flip-vs-cursor-toggle.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-iclb: [PASS][23] -> [FAIL][24] ([i915#79]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8074/shard-iclb8/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16848/shard-iclb1/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@plain-flip-ts-check: - shard-skl: [PASS][25] -> [FAIL][26] ([i915#34]) +1 similar issue [25]:
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev4)
== Series Details == Series: drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev4) URL : https://patchwork.freedesktop.org/series/45968/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v3] drm/i915/gt: allow setting generic data pointer
From: Andi Shyti
When registering debugfs files the intel gt debugfs library
forces a 'struct *gt' private data on the caller.
There might be different needs, therefore make it generic by
adding one more argument to the "debugfs_register_files()"
function which gets the generic void private data as argument.
Still keep it simple by defining a wrapper where struct *gt is
the chosen private data to be stored.
I take the chance to rename the functions by using "intel_gt_" as
prefix instead of "debugfs_".
Signed-off-by: Andi Shyti
---
Thanks Daniele for the review.
Andi
Changelog:
v3:
- removed unused gt parameter from the
__intel_gt_debugfs_register_files()
v2:
- the eval function is made generic as suggested by Daniele.
drivers/gpu/drm/i915/gt/debugfs_engines.c | 2 +-
drivers/gpu/drm/i915/gt/debugfs_gt.c | 11 +--
drivers/gpu/drm/i915/gt/debugfs_gt.h | 12 +++-
drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 14 +-
4 files changed, 22 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c
b/drivers/gpu/drm/i915/gt/debugfs_engines.c
index 6a5e9ab20b94..3434df10d58c 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_engines.c
@@ -32,5 +32,5 @@ void debugfs_engines_register(struct intel_gt *gt, struct
dentry *root)
{ "engines", _fops },
};
- debugfs_gt_register_files(gt, root, files, ARRAY_SIZE(files));
+ intel_gt_debugfs_register_file(gt, root, files, ARRAY_SIZE(files));
}
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c
b/drivers/gpu/drm/i915/gt/debugfs_gt.c
index 75255aaacaed..344f70e475c1 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.c
@@ -26,15 +26,14 @@ void debugfs_gt_register(struct intel_gt *gt)
debugfs_gt_pm_register(gt, root);
}
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count)
+void __intel_gt_debugfs_register_files(struct dentry *root,
+ const struct debugfs_gt_file *files,
+ unsigned long count, void *data)
{
while (count--) {
- if (!files->eval || files->eval(gt))
+ if (!files->eval || files->eval(data))
debugfs_create_file(files->name,
- 0444, root, gt,
+ 0444, root, data,
files->fops);
files++;
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.h
b/drivers/gpu/drm/i915/gt/debugfs_gt.h
index 4ea0f06cda8f..332ea1fc72f7 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.h
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.h
@@ -28,12 +28,14 @@ void debugfs_gt_register(struct intel_gt *gt);
struct debugfs_gt_file {
const char *name;
const struct file_operations *fops;
- bool (*eval)(const struct intel_gt *gt);
+ bool (*eval)(void *data);
};
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count);
+void __intel_gt_debugfs_register_files(struct dentry *root,
+ const struct debugfs_gt_file *files,
+ unsigned long count, void *data);
+
+#define intel_gt_debugfs_register_file(g, r, f, c) \
+ __intel_gt_debugfs_register_files(r, f, c, g)
#endif /* DEBUGFS_GT_H */
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
index 059c9e5c002e..e2249fb49404 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
@@ -506,9 +506,11 @@ static int llc_show(struct seq_file *m, void *data)
return 0;
}
-static bool llc_eval(const struct intel_gt *gt)
+static bool llc_eval(void *data)
{
- return HAS_LLC(gt->i915);
+ struct intel_gt *gt = data;
+
+ return gt && HAS_LLC(gt->i915);
}
DEFINE_GT_DEBUGFS_ATTRIBUTE(llc);
@@ -580,9 +582,11 @@ static int rps_boost_show(struct seq_file *m, void *data)
return 0;
}
-static bool rps_eval(const struct intel_gt *gt)
+static bool rps_eval(void *data)
{
- return HAS_RPS(gt->i915);
+ struct intel_gt *gt = data;
+
+ return gt && HAS_RPS(gt->i915);
}
DEFINE_GT_DEBUGFS_ATTRIBUTE(rps_boost);
@@ -597,5 +601,5 @@ void debugfs_gt_pm_register(struct intel_gt *gt, struct
dentry *root)
{ "rps_boost", _boost_fops, rps_eval },
};
- debugfs_gt_register_files(gt, root, files, ARRAY_SIZE(files));
+ intel_gt_debugfs_register_file(gt, root, files, ARRAY_SIZE(files));
}
--
2.25.0
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Make wa_1606700617 permanent (rev2)
On Fri, 2020-03-06 at 20:03 +, Patchwork wrote: > == Series Details == > > Series: drm/i915/tgl: Make wa_1606700617 permanent (rev2) > URL : https://patchwork.freedesktop.org/series/74240/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_8073_full -> Patchwork_16844_full > > > Summary > --- > > **SUCCESS** > > No regressions found. Pushed to dinq, thanks for the patch. > > > > Known issues > > > Here are the changes found in Patchwork_16844_full that come from > known issues: > > ### IGT changes ### > > Issues hit > > * igt@gem_ctx_isolation@rcs0-s3: > - shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) > +3 similar issues >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-kbl4/igt@gem_ctx_isolat...@rcs0-s3.html >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-kbl2/igt@gem_ctx_isolat...@rcs0-s3.html > > * igt@gem_exec_schedule@implicit-both-bsd1: > - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / > [i915#677]) +1 similar issue >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb1/igt@gem_exec_sched...@implicit-both-bsd1.html >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb6/igt@gem_exec_sched...@implicit-both-bsd1.html > > * igt@gem_exec_schedule@implicit-read-write-bsd: > - shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb5/igt@gem_exec_sched...@implicit-read-write-bsd.html >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb1/igt@gem_exec_sched...@implicit-read-write-bsd.html > > * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd: > - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +2 > similar issues >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb8/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb2/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html > > * igt@gem_exec_schedule@promotion-bsd1: > - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +7 > similar issues >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb2/igt@gem_exec_sched...@promotion-bsd1.html >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb5/igt@gem_exec_sched...@promotion-bsd1.html > > * igt@gem_ppgtt@flink-and-close-vma-leak: > - shard-skl: [PASS][11] -> [FAIL][12] ([i915#644]) >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl6/igt@gem_pp...@flink-and-close-vma-leak.html >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-skl6/igt@gem_pp...@flink-and-close-vma-leak.html > > * igt@i915_pm_rps@waitboost: > - shard-iclb: [PASS][13] -> [FAIL][14] ([i915#413]) >[13]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb3/igt@i915_pm_...@waitboost.html >[14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb6/igt@i915_pm_...@waitboost.html > > * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: > - shard-glk: [PASS][15] -> [FAIL][16] ([i915#72]) >[15]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-glk9/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html >[16]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-glk1/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html > > * igt@kms > _cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: > - shard-skl: [PASS][17] -> [FAIL][18] ([IGT#5] / > [i915#697]) >[17]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl6/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html >[18]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-skl6/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html > > * igt@kms_flip@flip-vs-suspend: > - shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) >[19]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-apl3/igt@kms_f...@flip-vs-suspend.html >[20]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-apl8/igt@kms_f...@flip-vs-suspend.html > > * igt@kms_flip_tiling@flip-yf-tiled: > - shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145]) >[21]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl7/igt@kms_flip_til...@flip-yf-tiled.html >[22]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-skl7/igt@kms_flip_til...@flip-yf-tiled.html > > * igt@kms_psr@psr2_no_drrs: > - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +2 > similar issues >[23]: >
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev4)
== Series Details == Series: drm: avoid spurious EBUSY due to nonblocking atomic modesets (rev4) URL : https://patchwork.freedesktop.org/series/45968/ State : warning == Summary == $ dim checkpatch origin/drm-tip 6cecc5b22da8 drm: avoid spurious EBUSY due to nonblocking atomic modesets -:35: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #35: References: https://lists.freedesktop.org/archives/dri-devel/2018-July/182281.html -:52: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #52: FILE: drivers/gpu/drm/drm_atomic.c:1365: + unsigned requested_crtc = 0; -:53: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned' #53: FILE: drivers/gpu/drm/drm_atomic.c:1366: + unsigned affected_crtc = 0; -:93: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Daniel Vetter ' total: 0 errors, 4 warnings, 0 checks, 46 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/hotplug: Use phy to get the hpd_pin instead of the port (rev6)
On Fri, 2020-03-06 at 03:01 +, Patchwork wrote: > == Series Details == > > Series: drm/i915/hotplug: Use phy to get the hpd_pin instead of the > port (rev6) > URL : https://patchwork.freedesktop.org/series/72747/ > State : success > > == Summary == > > CI Bug Log - changes from CI_DRM_8068_full -> Patchwork_16830_full > > > Summary > --- > > **SUCCESS** > > No regressions found. Pushed to dinq, thanks for the patch. > > > > Known issues > > > Here are the changes found in Patchwork_16830_full that come from > known issues: > > ### IGT changes ### > > Issues hit > > * igt@gem_busy@busy-vcs1: > - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#112080]) +10 > similar issues >[1]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-iclb4/igt@gem_b...@busy-vcs1.html >[2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-iclb6/igt@gem_b...@busy-vcs1.html > > * igt@gem_exec_schedule@implicit-both-bsd2: > - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / > [i915#677]) >[3]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-iclb2/igt@gem_exec_sched...@implicit-both-bsd2.html >[4]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-iclb6/igt@gem_exec_sched...@implicit-both-bsd2.html > > * igt@gem_exec_schedule@pi-shared-iova-bsd: > - shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) >[5]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-iclb8/igt@gem_exec_sched...@pi-shared-iova-bsd.html >[6]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-iclb1/igt@gem_exec_sched...@pi-shared-iova-bsd.html > > * igt@gem_exec_schedule@preemptive-hang-bsd: > - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +4 > similar issues >[7]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-iclb8/igt@gem_exec_sched...@preemptive-hang-bsd.html >[8]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-iclb1/igt@gem_exec_sched...@preemptive-hang-bsd.html > > * igt@i915_suspend@sysfs-reader: > - shard-apl: [PASS][9] -> [DMESG-WARN][10] ([i915#180]) >[9]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-apl8/igt@i915_susp...@sysfs-reader.html >[10]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-apl6/igt@i915_susp...@sysfs-reader.html > > * igt@kms_color@pipe-b-ctm-green-to-red: > - shard-skl: [PASS][11] -> [FAIL][12] ([i915#129]) >[11]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-skl1/igt@kms_co...@pipe-b-ctm-green-to-red.html >[12]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-skl8/igt@kms_co...@pipe-b-ctm-green-to-red.html > > * igt@kms_color@pipe-c-ctm-0-25: > - shard-skl: [PASS][13] -> [FAIL][14] ([i915#182]) >[13]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-skl7/igt@kms_co...@pipe-c-ctm-0-25.html >[14]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-skl10/igt@kms_co...@pipe-c-ctm-0-25.html > > * igt@kms_cursor_crc@pipe-b-cursor-256x85-offscreen: > - shard-skl: [PASS][15] -> [FAIL][16] ([i915#54]) >[15]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-skl1/igt@kms_cursor_...@pipe-b-cursor-256x85-offscreen.html >[16]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-skl8/igt@kms_cursor_...@pipe-b-cursor-256x85-offscreen.html > > * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: > - shard-glk: [PASS][17] -> [FAIL][18] ([i915#72]) >[17]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-glk6/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-legacy.html >[18]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-glk8/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-legacy.html > > * igt@kms_hdr@bpc-switch-suspend: > - shard-skl: [PASS][19] -> [FAIL][20] ([i915#1188]) >[19]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-skl9/igt@kms_...@bpc-switch-suspend.html >[20]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-skl9/igt@kms_...@bpc-switch-suspend.html > > * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: > - shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) > +2 similar issues >[21]: > https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8068/shard-kbl3/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html >[22]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16830/shard-kbl3/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-a.html > > * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: > - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145]) +1 > similar issue >[23]: >
Re: [Intel-gfx] [PATCH v3] drm/i915/gt: allow setting generic data pointer
On 3/6/20 2:14 PM, Andi Shyti wrote:
From: Andi Shyti
When registering debugfs files the intel gt debugfs library
forces a 'struct *gt' private data on the caller.
There might be different needs, therefore make it generic by
adding one more argument to the "debugfs_register_files()"
function which gets the generic void private data as argument.
Still keep it simple by defining a wrapper where struct *gt is
the chosen private data to be stored.
I take the chance to rename the functions by using "intel_gt_" as
prefix instead of "debugfs_".
Signed-off-by: Andi Shyti
---
Thanks Daniele for the review.
Andi
Changelog:
v3:
- removed unused gt parameter from the
__intel_gt_debugfs_register_files()
v2:
- the eval function is made generic as suggested by Daniele.
drivers/gpu/drm/i915/gt/debugfs_engines.c | 2 +-
drivers/gpu/drm/i915/gt/debugfs_gt.c | 11 +--
drivers/gpu/drm/i915/gt/debugfs_gt.h | 12 +++-
drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 14 +-
4 files changed, 22 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c
b/drivers/gpu/drm/i915/gt/debugfs_engines.c
index 6a5e9ab20b94..3434df10d58c 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_engines.c
@@ -32,5 +32,5 @@ void debugfs_engines_register(struct intel_gt *gt, struct
dentry *root)
{ "engines", _fops },
};
- debugfs_gt_register_files(gt, root, files, ARRAY_SIZE(files));
+ intel_gt_debugfs_register_file(gt, root, files, ARRAY_SIZE(files));
}
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c
b/drivers/gpu/drm/i915/gt/debugfs_gt.c
index 75255aaacaed..344f70e475c1 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.c
@@ -26,15 +26,14 @@ void debugfs_gt_register(struct intel_gt *gt)
debugfs_gt_pm_register(gt, root);
}
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count)
+void __intel_gt_debugfs_register_files(struct dentry *root,
+ const struct debugfs_gt_file *files,
+ unsigned long count, void *data)
{
while (count--) {
- if (!files->eval || files->eval(gt))
+ if (!files->eval || files->eval(data))
debugfs_create_file(files->name,
- 0444, root, gt,
+ 0444, root, data,
files->fops);
files++;
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.h
b/drivers/gpu/drm/i915/gt/debugfs_gt.h
index 4ea0f06cda8f..332ea1fc72f7 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.h
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.h
@@ -28,12 +28,14 @@ void debugfs_gt_register(struct intel_gt *gt);
struct debugfs_gt_file {
const char *name;
const struct file_operations *fops;
- bool (*eval)(const struct intel_gt *gt);
+ bool (*eval)(void *data);
};
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count);
+void __intel_gt_debugfs_register_files(struct dentry *root,
+ const struct debugfs_gt_file *files,
+ unsigned long count, void *data);
+
+#define intel_gt_debugfs_register_file(g, r, f, c) \
+ __intel_gt_debugfs_register_files(r, f, c, g)
This macro isn't really needed anymore, the base function is generic
enough to be used in all situation, just pass in the data you want.
With the macro dropped and using directly the
intel_gt_debugfs_register_files() function (removing the leading
underscores):
Reviewed-by: Daniele Ceraolo Spurio
Daniele
#endif /* DEBUGFS_GT_H */
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
index 059c9e5c002e..e2249fb49404 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
@@ -506,9 +506,11 @@ static int llc_show(struct seq_file *m, void *data)
return 0;
}
-static bool llc_eval(const struct intel_gt *gt)
+static bool llc_eval(void *data)
{
- return HAS_LLC(gt->i915);
+ struct intel_gt *gt = data;
+
+ return gt && HAS_LLC(gt->i915);
}
DEFINE_GT_DEBUGFS_ATTRIBUTE(llc);
@@ -580,9 +582,11 @@ static int rps_boost_show(struct seq_file *m, void *data)
return 0;
}
-static bool rps_eval(const struct intel_gt *gt)
+static bool rps_eval(void *data)
{
- return HAS_RPS(gt->i915);
+ struct intel_gt *gt = data;
+
+ return gt &&
Re: [Intel-gfx] [PATCH] drm/i915/tgl: Make wa_1606700617 permanent
On Thu, 2020-03-05 at 10:12 -0800, Swathi Dhanavanthri wrote:
> This workaround is to disable FF DOP Clock gating. The fix
> in B0 was backed out due to timing reasons and decided to
> be made permanent.
> Bspec: 52890
Reviewed-by: José Roberto de Souza
>
> Signed-off-by: Swathi Dhanavanthri
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index cb7d85c42f13..a9d1975b5245 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1337,11 +1337,6 @@ rcs_engine_wa_init(struct intel_engine_cs
> *engine, struct i915_wa_list *wal)
> struct drm_i915_private *i915 = engine->i915;
>
> if (IS_TGL_REVID(i915, TGL_REVID_A0, TGL_REVID_A0)) {
> - /* Wa_1606700617:tgl */
> - wa_masked_en(wal,
> - GEN9_CS_DEBUG_MODE1,
> - FF_DOP_CLOCK_GATE_DISABLE);
> -
> /*
>* Wa_1607138336:tgl
>* Wa_1607063988:tgl
> @@ -1393,6 +1388,11 @@ rcs_engine_wa_init(struct intel_engine_cs
> *engine, struct i915_wa_list *wal)
> /* Wa_1409804808:tgl */
> wa_masked_en(wal, GEN7_ROW_CHICKEN2,
>GEN12_PUSH_CONST_DEREF_HOLD_DIS);
> +
> + /* Wa_1606700617:tgl */
> + wa_masked_en(wal,
> + GEN9_CS_DEBUG_MODE1,
> + FF_DOP_CLOCK_GATE_DISABLE);
> }
>
> if (IS_GEN(i915, 11)) {
___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Do not poison i915_request.link on removal
== Series Details == Series: drm/i915: Do not poison i915_request.link on removal URL : https://patchwork.freedesktop.org/series/74393/ State : success == Summary == CI Bug Log - changes from CI_DRM_8086 -> Patchwork_16863 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/index.html Known issues Here are the changes found in Patchwork_16863 that come from known issues: ### IGT changes ### Issues hit * igt@i915_pm_rpm@module-reload: - fi-kbl-guc: [PASS][1] -> [FAIL][2] ([i915#579]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-kbl-guc/igt@i915_pm_...@module-reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/fi-kbl-guc/igt@i915_pm_...@module-reload.html * igt@i915_selftest@live@blt: - fi-bsw-n3050: [PASS][3] -> [INCOMPLETE][4] ([i915#392]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-bsw-n3050/igt@i915_selftest@l...@blt.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/fi-bsw-n3050/igt@i915_selftest@l...@blt.html * igt@i915_selftest@live@gem_contexts: - fi-cfl-8700k: [PASS][5] -> [INCOMPLETE][6] ([i915#424]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-cfl-8700k/igt@i915_selftest@live@gem_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/fi-cfl-8700k/igt@i915_selftest@live@gem_contexts.html * igt@kms_addfb_basic@addfb25-y-tiled: - fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([CI#94] / [i915#402]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-tgl-y/igt@kms_addfb_ba...@addfb25-y-tiled.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/fi-tgl-y/igt@kms_addfb_ba...@addfb25-y-tiled.html Possible fixes * igt@i915_selftest@live@dmabuf: - fi-ivb-3770:[DMESG-WARN][9] -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-ivb-3770/igt@i915_selftest@l...@dmabuf.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/fi-ivb-3770/igt@i915_selftest@l...@dmabuf.html * igt@i915_selftest@live@hangcheck: - fi-ivb-3770:[INCOMPLETE][11] -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-ivb-3770/igt@i915_selftest@l...@hangcheck.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/fi-ivb-3770/igt@i915_selftest@l...@hangcheck.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-icl-u2: [FAIL][13] ([i915#217]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html * igt@prime_vgem@basic-fence-flip: - fi-tgl-y: [DMESG-WARN][15] ([CI#94] / [i915#402]) -> [PASS][16] +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-tgl-y/igt@prime_v...@basic-fence-flip.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/fi-tgl-y/igt@prime_v...@basic-fence-flip.html Warnings * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][17] ([fdo#111096] / [i915#323]) -> [FAIL][18] ([fdo#111407]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16863/fi-kbl-7500u/igt@kms_chamel...@hdmi-hpd-fast.html [CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407 [i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217 [i915#323]: https://gitlab.freedesktop.org/drm/intel/issues/323 [i915#392]: https://gitlab.freedesktop.org/drm/intel/issues/392 [i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402 [i915#424]: https://gitlab.freedesktop.org/drm/intel/issues/424 [i915#579]: https://gitlab.freedesktop.org/drm/intel/issues/579 Participating hosts (50 -> 38) -- Additional (2): fi-skl-guc fi-skl-lmem Missing(14): fi-ilk-m540 fi-hsw-4200u fi-hsw-peppy fi-skl-6770hq fi-glk-dsi fi-byt-squawks fi-bsw-cyan fi-ilk-650 fi-elk-e7500 fi-bsw-kefka fi-kbl-7560u fi-byt-clapper fi-bdw-samus fi-snb-2600 Build changes - * CI: CI-20190529 -> None * Linux: CI_DRM_8086 -> Patchwork_16863 CI-20190529: 20190529 CI_DRM_8086: 3a1e69684036738b540510ffcc31964600bc0b3f @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5498: 1bb7a25a09fe3e653d310e8bdfbdde4a1934b326 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_16863: 6ead70f0c11098ff77d2e80ec1cf3f94c80a9878 @
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/17] drm/i915/selftests: Apply a heavy handed flush to i915_active
== Series Details == Series: series starting with [01/17] drm/i915/selftests: Apply a heavy handed flush to i915_active URL : https://patchwork.freedesktop.org/series/74392/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8086 -> Patchwork_16862 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16862 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16862, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16862: ### IGT changes ### Possible regressions * igt@i915_selftest@live@execlists: - fi-kbl-x1275: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-kbl-x1275/igt@i915_selftest@l...@execlists.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-kbl-x1275/igt@i915_selftest@l...@execlists.html - fi-skl-6770hq: [PASS][3] -> [DMESG-FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-skl-6770hq/igt@i915_selftest@l...@execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-skl-6770hq/igt@i915_selftest@l...@execlists.html New tests - New tests have been introduced between CI_DRM_8086 and Patchwork_16862: ### New IGT tests (2) ### * igt@dmabuf@all@dma_fence_chain: - Statuses : 42 pass(s) - Exec time: [7.38, 78.64] s * igt@dmabuf@all@dma_fence_proxy: - Statuses : 42 pass(s) - Exec time: [0.02, 0.19] s Known issues Here are the changes found in Patchwork_16862 that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_parallel@contexts: - fi-apl-guc: [PASS][5] -> [INCOMPLETE][6] ([fdo#103927]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-apl-guc/igt@gem_exec_paral...@contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-apl-guc/igt@gem_exec_paral...@contexts.html * igt@gem_mmap_gtt@basic: - fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([CI#94] / [i915#402]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-tgl-y/igt@gem_mmap_...@basic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-tgl-y/igt@gem_mmap_...@basic.html * igt@i915_module_load@reload: - fi-skl-6770hq: [PASS][9] -> [DMESG-WARN][10] ([i915#92]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-skl-6770hq/igt@i915_module_l...@reload.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-skl-6770hq/igt@i915_module_l...@reload.html * igt@kms_chamelium@dp-edid-read: - fi-icl-u2: [PASS][11] -> [FAIL][12] ([fdo#109635] / [i915#217]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-icl-u2/igt@kms_chamel...@dp-edid-read.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-icl-u2/igt@kms_chamel...@dp-edid-read.html * igt@kms_pipe_crc_basic@read-crc-pipe-a-frame-sequence: - fi-skl-6770hq: [PASS][13] -> [SKIP][14] ([fdo#109271]) +5 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-skl-6770hq/igt@kms_pipe_crc_ba...@read-crc-pipe-a-frame-sequence.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-skl-6770hq/igt@kms_pipe_crc_ba...@read-crc-pipe-a-frame-sequence.html * igt@kms_pipe_crc_basic@read-crc-pipe-b: - fi-skl-6770hq: [PASS][15] -> [DMESG-WARN][16] ([i915#106]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-skl-6770hq/igt@kms_pipe_crc_ba...@read-crc-pipe-b.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-skl-6770hq/igt@kms_pipe_crc_ba...@read-crc-pipe-b.html Possible fixes * igt@gem_exec_suspend@basic-s4-devices: - fi-tgl-y: [FAIL][17] ([CI#94]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html * igt@gem_mmap@basic: - fi-tgl-y: [DMESG-WARN][19] ([CI#94] / [i915#402]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-tgl-y/igt@gem_m...@basic.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16862/fi-tgl-y/igt@gem_m...@basic.html * igt@i915_selftest@live@dmabuf: - fi-ivb-3770:[DMESG-WARN][21] -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8086/fi-ivb-3770/igt@i915_selftest@l...@dmabuf.html
[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Do not poison i915_request.link on removal
== Series Details == Series: drm/i915: Do not poison i915_request.link on removal URL : https://patchwork.freedesktop.org/series/74393/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915/gt: allow setting generic data pointer
Hi Daniele,
> > diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c
> > b/drivers/gpu/drm/i915/gt/debugfs_gt.c
> > index 75255aaacaed..24099fb157be 100644
> > --- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
> > +++ b/drivers/gpu/drm/i915/gt/debugfs_gt.c
> > @@ -26,15 +26,14 @@ void debugfs_gt_register(struct intel_gt *gt)
> > debugfs_gt_pm_register(gt, root);
> > }
> > -void debugfs_gt_register_files(struct intel_gt *gt,
> > - struct dentry *root,
> > - const struct debugfs_gt_file *files,
> > - unsigned long count)
> > +void __intel_gt_debugfs_register_files(struct intel_gt *gt, struct dentry
> > *root,
>
> The gt variable is now unused in this function, so you can get rid of it,
> which means you can also drop the macro wrapper you have defined below.
uh, yes, right! I forgot to remove it :)
> > -static bool llc_eval(const struct intel_gt *gt)
> > +static bool llc_eval(void *data)
> > {
> > - return HAS_LLC(gt->i915);
> > + struct intel_gt *gt = data;
> > +
> > + return !gt ? false : HAS_LLC(gt->i915);
>
> Is there a case where gt can be NULL?
> BTW, you can also have this condition as:
>
> return gt && HAS_LLC(gt->i915);
Thanks,
Andi
___
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[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [01/17] drm/i915/selftests: Apply a heavy handed flush to i915_active
== Series Details == Series: series starting with [01/17] drm/i915/selftests: Apply a heavy handed flush to i915_active URL : https://patchwork.freedesktop.org/series/74392/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/17] drm/i915/selftests: Apply a heavy handed flush to i915_active
== Series Details ==
Series: series starting with [01/17] drm/i915/selftests: Apply a heavy handed
flush to i915_active
URL : https://patchwork.freedesktop.org/series/74392/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
982908c93abd drm/i915/selftests: Apply a heavy handed flush to i915_active
031f94155df6 drm/i915/execlists: Enable timeslice on partial virtual engine
dequeue
9b61d8749081 drm/i915: Improve the start alignment of bonded pairs
5d9fda3690f4 drm/i915: Tweak scheduler's kick_submission()
c0d1c65cb89a drm/i915: Wrap i915_active in a simple kreffed struct
3109c8f9d4d0 drm/i915: Extend i915_request_await_active to use all timelines
5ae4e5feccba drm/i915/perf: Schedule oa_config after modifying the contexts
d0db810d00b0 drm/i915/selftests: Add request throughput measurement to perf
-:90: WARNING:LINE_SPACING: Missing a blank line after declarations
#90: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:1515:
+ struct intel_context *ce;
+ IGT_TIMEOUT(end_time);
-:157: WARNING:LINE_SPACING: Missing a blank line after declarations
#157: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:1582:
+ struct intel_context *ce;
+ IGT_TIMEOUT(end_time);
-:213: WARNING:LINE_SPACING: Missing a blank line after declarations
#213: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:1638:
+ struct drm_i915_private *i915 = arg;
+ static int (* const func[])(void *arg) = {
-:220: WARNING:LINE_SPACING: Missing a blank line after declarations
#220: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:1645:
+ struct intel_engine_cs *engine;
+ int (* const *fn)(void *arg);
-:265: WARNING:YIELD: Using yield() is generally wrong. See yield() kernel-doc
(sched/core.c)
#265: FILE: drivers/gpu/drm/i915/selftests/i915_request.c:1690:
+ yield(); /* start all threads before we kthread_stop() */
total: 0 errors, 5 warnings, 0 checks, 306 lines checked
0a74ccdc875c dma-buf: Prettify typecasts for dma-fence-chain
3702ebf022c1 dma-buf: Report signaled links inside dma-fence-chain
e3df6c598dbd dma-buf: Exercise dma-fence-chain under selftests
-:33: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#33:
new file mode 100644
-:61: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#61: FILE: drivers/dma-buf/st-dma-fence-chain.c:24:
+ spinlock_t lock;
-:235: WARNING:EMBEDDED_FUNCTION_NAME: Prefer using '"%s...", __func__' to
using 'find_seqno', this function's name, in a string
#235: FILE: drivers/dma-buf/st-dma-fence-chain.c:198:
+ pr_err("Reported %d for find_seqno(0)!\n", err);
-:244: WARNING:EMBEDDED_FUNCTION_NAME: Prefer using '"%s...", __func__' to
using 'find_seqno', this function's name, in a string
#244: FILE: drivers/dma-buf/st-dma-fence-chain.c:207:
+ pr_err("Reported %d for find_seqno(%d:%d)!\n",
-:249: WARNING:EMBEDDED_FUNCTION_NAME: Prefer using '"%s...", __func__' to
using 'find_seqno', this function's name, in a string
#249: FILE: drivers/dma-buf/st-dma-fence-chain.c:212:
+ pr_err("Incorrect fence reported by
find_seqno(%d:%d)\n",
-:272: WARNING:EMBEDDED_FUNCTION_NAME: Prefer using '"%s...", __func__' to
using 'find_seqno', this function's name, in a string
#272: FILE: drivers/dma-buf/st-dma-fence-chain.c:235:
+ pr_err("Error not reported for future fence:
find_seqno(%d:%d)!\n",
-:286: WARNING:EMBEDDED_FUNCTION_NAME: Prefer using '"%s...", __func__' to
using 'find_seqno', this function's name, in a string
#286: FILE: drivers/dma-buf/st-dma-fence-chain.c:249:
+ pr_err("Incorrect fence reported by
find_seqno(%d:%d)\n",
-:737: WARNING:EMBEDDED_FUNCTION_NAME: Prefer using '"%s...", __func__' to
using 'dma_fence_chain', this function's name, in a string
#737: FILE: drivers/dma-buf/st-dma-fence-chain.c:700:
+ pr_info("sizeof(dma_fence_chain)=%zu\n",
total: 0 errors, 7 warnings, 1 checks, 725 lines checked
dfcab52a6de6 dma-buf: Proxy fence, an unsignaled fence placeholder
-:45: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#45:
new file mode 100644
-:93: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#93: FILE: drivers/dma-buf/dma-fence-proxy.c:18:
+ spinlock_t lock;
-:321: CHECK:UNCOMMENTED_DEFINITION: spinlock_t definition without comment
#321: FILE: drivers/dma-buf/st-dma-fence-proxy.c:20:
+ spinlock_t lock;
-:481: WARNING:MEMORY_BARRIER: memory barrier without comment
#481: FILE: drivers/dma-buf/st-dma-fence-proxy.c:180:
+ smp_store_mb(container_of(cb, struct simple_cb, cb)->seen, true);
total: 0 errors, 2 warnings, 2 checks, 852 lines checked
72c5da66b118 drm/syncobj: Allow use of dma-fence-proxy
2bf6c69d342d drm/i915/gem: Teach execbuf how to wait on future syncobj
e7ace1917afa drm/i915/gem: Allow combining submit-fences with syncobj
232c8948625d
Re: [Intel-gfx] [PATCH v2] drm/i915/gt: allow setting generic data pointer
On 3/6/20 12:06 PM, Andi Shyti wrote:
From: Andi Shyti
When registering debugfs files the intel gt debugfs library
forces a 'struct *gt' private data on the caller.
There might be different needs, therefore make it generic by
adding one more argument to the "debugfs_register_files()"
function which gets the generic void private data as argument.
Still keep it simple by defining a wrapper where struct *gt is
the chosen private data to be stored.
I take the chance to rename the functions by using "intel_gt_" as
prefix instead of "debugfs_".
Signed-off-by: Andi Shyti
---
Changelog:
v2:
- the eval function is made generic as suggested by Daniele.
drivers/gpu/drm/i915/gt/debugfs_engines.c | 2 +-
drivers/gpu/drm/i915/gt/debugfs_gt.c | 11 +--
drivers/gpu/drm/i915/gt/debugfs_gt.h | 12 +++-
drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 14 +-
4 files changed, 22 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c
b/drivers/gpu/drm/i915/gt/debugfs_engines.c
index 6a5e9ab20b94..3434df10d58c 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_engines.c
@@ -32,5 +32,5 @@ void debugfs_engines_register(struct intel_gt *gt, struct
dentry *root)
{ "engines", _fops },
};
- debugfs_gt_register_files(gt, root, files, ARRAY_SIZE(files));
+ intel_gt_debugfs_register_file(gt, root, files, ARRAY_SIZE(files));
}
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c
b/drivers/gpu/drm/i915/gt/debugfs_gt.c
index 75255aaacaed..24099fb157be 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.c
@@ -26,15 +26,14 @@ void debugfs_gt_register(struct intel_gt *gt)
debugfs_gt_pm_register(gt, root);
}
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count)
+void __intel_gt_debugfs_register_files(struct intel_gt *gt, struct dentry
*root,
The gt variable is now unused in this function, so you can get rid of
it, which means you can also drop the macro wrapper you have defined below.
+ const struct debugfs_gt_file *files,
+ unsigned long count, void *data)
{
while (count--) {
- if (!files->eval || files->eval(gt))
+ if (!files->eval || files->eval(data))
debugfs_create_file(files->name,
- 0444, root, gt,
+ 0444, root, data,
files->fops);
files++;
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.h
b/drivers/gpu/drm/i915/gt/debugfs_gt.h
index 4ea0f06cda8f..f498fe75c79a 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.h
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.h
@@ -28,12 +28,14 @@ void debugfs_gt_register(struct intel_gt *gt);
struct debugfs_gt_file {
const char *name;
const struct file_operations *fops;
- bool (*eval)(const struct intel_gt *gt);
+ bool (*eval)(void *data);
};
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count);
+void __intel_gt_debugfs_register_files(struct intel_gt *gt, struct dentry
*root,
+ const struct debugfs_gt_file *files,
+ unsigned long count, void *data);
+
+#define intel_gt_debugfs_register_file(g, r, f, c) \
+ __intel_gt_debugfs_register_files(g, r, f, c, g)
#endif /* DEBUGFS_GT_H */
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
index 059c9e5c002e..a233b97a9294 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
@@ -506,9 +506,11 @@ static int llc_show(struct seq_file *m, void *data)
return 0;
}
-static bool llc_eval(const struct intel_gt *gt)
+static bool llc_eval(void *data)
{
- return HAS_LLC(gt->i915);
+ struct intel_gt *gt = data;
+
+ return !gt ? false : HAS_LLC(gt->i915);
Is there a case where gt can be NULL?
BTW, you can also have this condition as:
return gt && HAS_LLC(gt->i915);
Daniele
}
DEFINE_GT_DEBUGFS_ATTRIBUTE(llc);
@@ -580,9 +582,11 @@ static int rps_boost_show(struct seq_file *m, void *data)
return 0;
}
-static bool rps_eval(const struct intel_gt *gt)
+static bool rps_eval(void *data)
{
- return HAS_RPS(gt->i915);
+ struct intel_gt *gt = data;
+
+ return !gt ? false : HAS_RPS(gt->i915);
}
DEFINE_GT_DEBUGFS_ATTRIBUTE(rps_boost);
@@ -597,5 +601,5 @@ void
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Add support for HDCP 1.4 over MST connectors (rev5)
== Series Details == Series: drm/i915: Add support for HDCP 1.4 over MST connectors (rev5) URL : https://patchwork.freedesktop.org/series/70393/ State : success == Summary == CI Bug Log - changes from CI_DRM_8073_full -> Patchwork_16845_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16845_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@rcs0-s3: - shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-kbl4/igt@gem_ctx_isolat...@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-kbl7/igt@gem_ctx_isolat...@rcs0-s3.html * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#110854]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb4/igt@gem_exec_balan...@smoke.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-iclb3/igt@gem_exec_balan...@smoke.html * igt@gem_exec_schedule@pi-common-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb7/igt@gem_exec_sched...@pi-common-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-iclb4/igt@gem_exec_sched...@pi-common-bsd.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +6 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb7/igt@gem_exec_sched...@wide-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-iclb4/igt@gem_exec_sched...@wide-bsd.html * igt@gem_exec_whisper@basic-queues: - shard-glk: [PASS][9] -> [DMESG-WARN][10] ([i915#118] / [i915#95]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-glk4/igt@gem_exec_whis...@basic-queues.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-glk5/igt@gem_exec_whis...@basic-queues.html * igt@i915_pm_rps@waitboost: - shard-iclb: [PASS][11] -> [FAIL][12] ([i915#413]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb3/igt@i915_pm_...@waitboost.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-iclb8/igt@i915_pm_...@waitboost.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-apl7/igt@kms_cursor_...@pipe-c-cursor-suspend.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-apl6/igt@kms_cursor_...@pipe-c-cursor-suspend.html * igt@kms_flip_tiling@flip-yf-tiled: - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#108145]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl7/igt@kms_flip_til...@flip-yf-tiled.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-skl9/igt@kms_flip_til...@flip-yf-tiled.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#49]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl2/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-skl6/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html * igt@kms_hdr@bpc-switch-dpms: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#1188]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl8/igt@kms_...@bpc-switch-dpms.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-skl1/igt@kms_...@bpc-switch-dpms.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - shard-skl: [PASS][21] -> [INCOMPLETE][22] ([i915#69]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl2/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-b.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-skl7/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-b.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145] / [i915#265]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl2/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16845/shard-skl6/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-glk: [PASS][25] -> [FAIL][26] ([i915#899]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-glk7/igt@kms_plane_low...@pipe-a-tiling-x.html [26]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [01/17] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2.
== Series Details == Series: series starting with [01/17] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2. URL : https://patchwork.freedesktop.org/series/74387/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8085 -> Patchwork_16861 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16861 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16861, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16861: ### IGT changes ### Possible regressions * igt@gem_close_race@basic-process: - fi-ivb-3770:[PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-ivb-3770/igt@gem_close_r...@basic-process.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-ivb-3770/igt@gem_close_r...@basic-process.html - fi-hsw-4770:[PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-hsw-4770/igt@gem_close_r...@basic-process.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-hsw-4770/igt@gem_close_r...@basic-process.html - fi-hsw-4770r: [PASS][5] -> [INCOMPLETE][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-hsw-4770r/igt@gem_close_r...@basic-process.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-hsw-4770r/igt@gem_close_r...@basic-process.html - fi-hsw-peppy: [PASS][7] -> [INCOMPLETE][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-hsw-peppy/igt@gem_close_r...@basic-process.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-hsw-peppy/igt@gem_close_r...@basic-process.html * igt@gem_exec_fence@basic-await@rcs0: - fi-blb-e6850: [PASS][9] -> [INCOMPLETE][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-blb-e6850/igt@gem_exec_fence@basic-aw...@rcs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-blb-e6850/igt@gem_exec_fence@basic-aw...@rcs0.html - fi-elk-e7500: [PASS][11] -> [DMESG-WARN][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-elk-e7500/igt@gem_exec_fence@basic-aw...@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-elk-e7500/igt@gem_exec_fence@basic-aw...@rcs0.html - fi-ilk-650: [PASS][13] -> [DMESG-WARN][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-ilk-650/igt@gem_exec_fence@basic-aw...@rcs0.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-ilk-650/igt@gem_exec_fence@basic-aw...@rcs0.html * igt@gem_exec_fence@basic-await@vcs0: - fi-ilk-650: [PASS][15] -> [INCOMPLETE][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-ilk-650/igt@gem_exec_fence@basic-aw...@vcs0.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-ilk-650/igt@gem_exec_fence@basic-aw...@vcs0.html * igt@i915_selftest@live@gt_lrc: - fi-snb-2520m: [PASS][17] -> [INCOMPLETE][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-snb-2520m/igt@i915_selftest@live@gt_lrc.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-snb-2520m/igt@i915_selftest@live@gt_lrc.html * igt@i915_selftest@live@requests: - fi-skl-6770hq: [PASS][19] -> [DMESG-WARN][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-skl-6770hq/igt@i915_selftest@l...@requests.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-skl-6770hq/igt@i915_selftest@l...@requests.html - fi-cfl-guc: [PASS][21] -> [DMESG-WARN][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-cfl-guc/igt@i915_selftest@l...@requests.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-cfl-guc/igt@i915_selftest@l...@requests.html - fi-kbl-soraka: [PASS][23] -> [DMESG-WARN][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-kbl-soraka/igt@i915_selftest@l...@requests.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-kbl-soraka/igt@i915_selftest@l...@requests.html - fi-skl-6600u: [PASS][25] -> [DMESG-WARN][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-skl-6600u/igt@i915_selftest@l...@requests.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16861/fi-skl-6600u/igt@i915_selftest@l...@requests.html - fi-cml-u2: [PASS][27] -> [DMESG-WARN][28] [27]:
Re: [Intel-gfx] [PATCH 20/51] drm: Handle dev->unique with drmm_
On Mon, Mar 02, 2020 at 11:26:00PM +0100, Daniel Vetter wrote:
> We need to add a drmm_kstrdup for this, but let's start somewhere.
>
> This is not exactly perfect onion unwinding, but it's jsut a kfree so
> doesn't really matter at all.
>
> Signed-off-by: Daniel Vetter
Reluctanlyt... But anyway
Reviewed-by: Sam Ravnborg
See below for a few comments.
> ---
> drivers/gpu/drm/drm_drv.c | 5 ++---
> drivers/gpu/drm/drm_managed.c | 16
> include/drm/drm_managed.h | 1 +
> 3 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> index 1a048325f30e..ef79c03e311c 100644
> --- a/drivers/gpu/drm/drm_drv.c
> +++ b/drivers/gpu/drm/drm_drv.c
> @@ -777,7 +777,6 @@ void drm_dev_fini(struct drm_device *dev)
> mutex_destroy(>filelist_mutex);
> mutex_destroy(>struct_mutex);
> drm_legacy_destroy_members(dev);
> - kfree(dev->unique);
> }
> EXPORT_SYMBOL(drm_dev_fini);
>
> @@ -1068,8 +1067,8 @@ EXPORT_SYMBOL(drm_dev_unregister);
> */
> int drm_dev_set_unique(struct drm_device *dev, const char *name)
> {
> - kfree(dev->unique);
> - dev->unique = kstrdup(name, GFP_KERNEL);
> + drmm_kfree(dev, dev->unique);
> + dev->unique = drmm_kstrdup(dev, name, GFP_KERNEL);
>
> return dev->unique ? 0 : -ENOMEM;
> }
> diff --git a/drivers/gpu/drm/drm_managed.c b/drivers/gpu/drm/drm_managed.c
> index 57dc79fa90af..514d5bd42446 100644
> --- a/drivers/gpu/drm/drm_managed.c
> +++ b/drivers/gpu/drm/drm_managed.c
> @@ -160,6 +160,22 @@ void *drmm_kmalloc(struct drm_device *dev, size_t size,
> gfp_t gfp)
> }
> EXPORT_SYMBOL(drmm_kmalloc);
>
> +char *drmm_kstrdup(struct drm_device *dev, const char *s, gfp_t gfp)
So we need this gfp for all users - just because i915 is special and
uses "GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN" in to places -
sigh.
> +{
> + size_t size;
> + char *buf;
> +
> + if (!s)
> + return NULL;
> +
> + size = strlen(s) + 1;
> + buf = drmm_kmalloc(dev, size, gfp);
> + if (buf)
> + memcpy(buf, s, size);
> + return buf;
> +}
> +EXPORT_SYMBOL_GPL(drmm_kstrdup);
> +
> void drmm_kfree(struct drm_device *dev, void *data)
> {
> struct drmres *dr_match = NULL, *dr;
> diff --git a/include/drm/drm_managed.h b/include/drm/drm_managed.h
> index 7b5df7d09b19..89e6fce9f689 100644
> --- a/include/drm/drm_managed.h
> +++ b/include/drm/drm_managed.h
> @@ -24,6 +24,7 @@ static inline void *drmm_kzalloc(struct drm_device *dev,
> size_t size, gfp_t gfp)
> {
> return drmm_kmalloc(dev, size, gfp | __GFP_ZERO);
> }
> +char *drmm_kstrdup(struct drm_device *dev, const char *s, gfp_t gfp);
Missing empty line above. But it is fixed later IIRC
>
> void drmm_kfree(struct drm_device *dev, void *data);
>
> --
> 2.24.1
>
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[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [01/17] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2.
== Series Details == Series: series starting with [01/17] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2. URL : https://patchwork.freedesktop.org/series/74387/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: Cleanups after drmm_add_final_kfree rollout
On Tue, Mar 03, 2020 at 09:45:20AM +0100, Daniel Vetter wrote:
> A few things:
> - Update the example driver in the documentation.
> - We can drop the old kfree in drm_dev_release.
> - Add a WARN_ON check in drm_dev_register to make sure everyone calls
> drmm_add_final_kfree and there's no leaks.
>
> v2: Restore the full cleanup, I accidentally left some moved code
> behind when fixing the bisectability of the series.
Missed that when reading first version.
Good to see this code-snippet be dropped again.
>
> Cc: Sam Ravnborg
> Cc: Dan Carpenter
> Signed-off-by: Daniel Vetter
Acked-by: Sam Ravnborg
> ---
> drivers/gpu/drm/drm_drv.c | 12 +---
> 1 file changed, 5 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> index 80cfd0f14475..1ee606b4a4f9 100644
> --- a/drivers/gpu/drm/drm_drv.c
> +++ b/drivers/gpu/drm/drm_drv.c
> @@ -297,8 +297,6 @@ void drm_minor_release(struct drm_minor *minor)
> *
> * drm_mode_config_cleanup(drm);
> * drm_dev_fini(drm);
> - * kfree(priv->userspace_facing);
> - * kfree(priv);
> * }
> *
> * static struct drm_driver driver_drm_driver = {
> @@ -326,10 +324,11 @@ void drm_minor_release(struct drm_minor *minor)
> * kfree(drm);
> * return ret;
> * }
> + * drmm_add_final_kfree(drm, priv);
> *
> * drm_mode_config_init(drm);
> *
> - * priv->userspace_facing = kzalloc(..., GFP_KERNEL);
> + * priv->userspace_facing = drmm_kzalloc(..., GFP_KERNEL);
> * if (!priv->userspace_facing)
> * return -ENOMEM;
> *
> @@ -838,10 +837,7 @@ static void drm_dev_release(struct kref *ref)
>
> drm_managed_release(dev);
>
> - if (!dev->driver->release && !dev->managed.final_kfree) {
> - WARN_ON(!list_empty(>managed.resources));
> - kfree(dev);
> - } else if (dev->managed.final_kfree)
Good to see this go again.
> + if (dev->managed.final_kfree)
> kfree(dev->managed.final_kfree);
> }
>
> @@ -959,6 +955,8 @@ int drm_dev_register(struct drm_device *dev, unsigned
> long flags)
> struct drm_driver *driver = dev->driver;
> int ret;
>
> + WARN_ON(!dev->managed.final_kfree);
> +
> if (drm_dev_needs_global_mutex(dev))
> mutex_lock(_global_mutex);
>
> --
> 2.24.1
>
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Re: [Intel-gfx] [PATCH 19/51] drm: Cleanups after drmm_add_final_kfree rollout
On Mon, Mar 02, 2020 at 11:25:59PM +0100, Daniel Vetter wrote:
> A few things:
> - Update the example driver in the documentation.
> - We can drop the old kfree in drm_dev_release.
> - Add a WARN_ON check in drm_dev_register to make sure everyone calls
> drmm_add_final_kfree and there's no leaks.
>
> Signed-off-by: Daniel Vetter
Acked-by: Sam Ravnborg
> ---
> drivers/gpu/drm/drm_drv.c | 7 ---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> index 7b84ee8a5eb5..1a048325f30e 100644
> --- a/drivers/gpu/drm/drm_drv.c
> +++ b/drivers/gpu/drm/drm_drv.c
> @@ -297,8 +297,6 @@ void drm_minor_release(struct drm_minor *minor)
> *
> * drm_mode_config_cleanup(drm);
> * drm_dev_fini(drm);
> - * kfree(priv->userspace_facing);
> - * kfree(priv);
> * }
> *
> * static struct drm_driver driver_drm_driver = {
> @@ -326,10 +324,11 @@ void drm_minor_release(struct drm_minor *minor)
> * kfree(drm);
> * return ret;
> * }
> + * drmm_add_final_kfree(drm, priv);
> *
> * drm_mode_config_init(drm);
> *
> - * priv->userspace_facing = kzalloc(..., GFP_KERNEL);
> + * priv->userspace_facing = drmm_kzalloc(..., GFP_KERNEL);
> * if (!priv->userspace_facing)
> * return -ENOMEM;
> *
> @@ -961,6 +960,8 @@ int drm_dev_register(struct drm_device *dev, unsigned
> long flags)
> struct drm_driver *driver = dev->driver;
> int ret;
>
> + WARN_ON(!dev->managed.final_kfree);
> +
> if (drm_dev_needs_global_mutex(dev))
> mutex_lock(_global_mutex);
>
> --
> 2.24.1
>
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Re: [Intel-gfx] [PATCH 18/51] drm/: Use drmm_add_final_kfree
On Mon, Mar 02, 2020 at 11:25:58PM +0100, Daniel Vetter wrote: > These are the leftover drivers that didn't have a ->release hook that > needed to be updated. > > Acked-by: Liviu Dudau > Signed-off-by: Daniel Vetter > Cc: "James (Qian) Wang" > Cc: Liviu Dudau > Cc: Mihail Atanassov > Cc: Russell King > Cc: Hans de Goede Acked-by: Sam Ravnborg > --- > drivers/gpu/drm/arm/display/komeda/komeda_kms.c | 2 ++ > drivers/gpu/drm/armada/armada_drv.c | 2 ++ > drivers/gpu/drm/vboxvideo/vbox_drv.c| 2 ++ > 3 files changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > index 442d4656150a..16dfd5cdb66c 100644 > --- a/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > +++ b/drivers/gpu/drm/arm/display/komeda/komeda_kms.c > @@ -14,6 +14,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -271,6 +272,7 @@ struct komeda_kms_dev *komeda_kms_attach(struct > komeda_dev *mdev) > err = drm_dev_init(drm, _kms_driver, mdev->dev); > if (err) > goto free_kms; > + drmm_add_final_kfree(drm, kms); > > drm->dev_private = mdev; > > diff --git a/drivers/gpu/drm/armada/armada_drv.c > b/drivers/gpu/drm/armada/armada_drv.c > index 197dca3fc84c..dd9ed71ed942 100644 > --- a/drivers/gpu/drm/armada/armada_drv.c > +++ b/drivers/gpu/drm/armada/armada_drv.c > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -103,6 +104,7 @@ static int armada_drm_bind(struct device *dev) > kfree(priv); > return ret; > } > + drmm_add_final_kfree(>drm, priv); > > /* Remove early framebuffers */ > ret = drm_fb_helper_remove_conflicting_framebuffers(NULL, > diff --git a/drivers/gpu/drm/vboxvideo/vbox_drv.c > b/drivers/gpu/drm/vboxvideo/vbox_drv.c > index 8512d970a09f..13eaae7921f5 100644 > --- a/drivers/gpu/drm/vboxvideo/vbox_drv.c > +++ b/drivers/gpu/drm/vboxvideo/vbox_drv.c > @@ -17,6 +17,7 @@ > #include > #include > #include > +#include > > #include "vbox_drv.h" > > @@ -54,6 +55,7 @@ static int vbox_pci_probe(struct pci_dev *pdev, const > struct pci_device_id *ent) > vbox->ddev.pdev = pdev; > vbox->ddev.dev_private = vbox; > pci_set_drvdata(pdev, vbox); > + drmm_add_final_kfree(>ddev, vbox); > mutex_init(>hw_mutex); > > ret = pci_enable_device(pdev); > -- > 2.24.1 > > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 17/51] drm/gm12u320: Use drmm_add_final_kfree
On Mon, Mar 02, 2020 at 11:25:57PM +0100, Daniel Vetter wrote: > With this we can drop the final kfree from the release function. > > Reviewed-by: Hans de Goede > Signed-off-by: Daniel Vetter > Cc: Hans de Goede Acked-by: Sam Ravnborg > --- > drivers/gpu/drm/tiny/gm12u320.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/tiny/gm12u320.c b/drivers/gpu/drm/tiny/gm12u320.c > index a48173441ae0..524ca0941cf9 100644 > --- a/drivers/gpu/drm/tiny/gm12u320.c > +++ b/drivers/gpu/drm/tiny/gm12u320.c > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -637,7 +638,6 @@ static void gm12u320_driver_release(struct drm_device > *dev) > gm12u320_usb_free(gm12u320); > drm_mode_config_cleanup(dev); > drm_dev_fini(dev); > - kfree(gm12u320); > } > > DEFINE_DRM_GEM_FOPS(gm12u320_fops); > @@ -692,6 +692,7 @@ static int gm12u320_usb_probe(struct usb_interface > *interface, > return ret; > } > dev->dev_private = gm12u320; > + drmm_add_final_kfree(dev, gm12u320); > > drm_mode_config_init(dev); > dev->mode_config.min_width = GM12U320_USER_WIDTH; > -- > 2.24.1 > > ___ > dri-devel mailing list > dri-de...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 16/51] drm/ingenic: Use drmm_add_final_kfree
On Mon, Mar 02, 2020 at 11:25:56PM +0100, Daniel Vetter wrote:
> With this we can drop the final kfree from the release function.
>
> Reviewed-by: Paul Cercueil
> Signed-off-by: Daniel Vetter
> Cc: Paul Cercueil
Acked-by: Sam Ravnborg
> ---
> drivers/gpu/drm/ingenic/ingenic-drm.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c
> b/drivers/gpu/drm/ingenic/ingenic-drm.c
> index 9dfe7cb530e1..e2c832eb4e9a 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-drm.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-drm.c
> @@ -23,6 +23,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -490,11 +491,8 @@ static irqreturn_t ingenic_drm_irq_handler(int irq, void
> *arg)
>
> static void ingenic_drm_release(struct drm_device *drm)
> {
> - struct ingenic_drm *priv = drm_device_get_priv(drm);
> -
> drm_mode_config_cleanup(drm);
> drm_dev_fini(drm);
> - kfree(priv);
> }
>
> static int ingenic_drm_enable_vblank(struct drm_crtc *crtc)
> @@ -639,6 +637,7 @@ static int ingenic_drm_probe(struct platform_device *pdev)
> kfree(priv);
> return ret;
> }
> + drmm_add_final_kfree(drm, priv);
>
> drm_mode_config_init(drm);
> drm->mode_config.min_width = 0;
> --
> 2.24.1
>
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Re: [Intel-gfx] [PATCH 15/51] drm/repaper: Use drmm_add_final_kfree
On Mon, Mar 02, 2020 at 11:25:55PM +0100, Daniel Vetter wrote:
> With this we can drop the final kfree from the release function.
>
> Reviewed-by: Noralf Trønnes
> Signed-off-by: Daniel Vetter
> Cc: "Noralf Trønnes"
Acked-by: Sam Ravnborg
> ---
> drivers/gpu/drm/tiny/repaper.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/tiny/repaper.c b/drivers/gpu/drm/tiny/repaper.c
> index f5ebcaf7ee3a..df5654ef53ee 100644
> --- a/drivers/gpu/drm/tiny/repaper.c
> +++ b/drivers/gpu/drm/tiny/repaper.c
> @@ -31,6 +31,7 @@
> #include
> #include
> #include
> +#include
> #include
> #include
> #include
> @@ -910,13 +911,10 @@ static const struct drm_mode_config_funcs
> repaper_mode_config_funcs = {
>
> static void repaper_release(struct drm_device *drm)
> {
> - struct repaper_epd *epd = drm_to_epd(drm);
> -
> DRM_DEBUG_DRIVER("\n");
>
> drm_mode_config_cleanup(drm);
> drm_dev_fini(drm);
> - kfree(epd);
> }
>
> static const uint32_t repaper_formats[] = {
> @@ -1024,6 +1022,7 @@ static int repaper_probe(struct spi_device *spi)
> kfree(epd);
> return ret;
> }
> + drmm_add_final_kfree(drm, epd);
>
> drm_mode_config_init(drm);
> drm->mode_config.funcs = _mode_config_funcs;
> --
> 2.24.1
>
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[Intel-gfx] [PATCH v2] drm/i915/gt: allow setting generic data pointer
From: Andi Shyti
When registering debugfs files the intel gt debugfs library
forces a 'struct *gt' private data on the caller.
There might be different needs, therefore make it generic by
adding one more argument to the "debugfs_register_files()"
function which gets the generic void private data as argument.
Still keep it simple by defining a wrapper where struct *gt is
the chosen private data to be stored.
I take the chance to rename the functions by using "intel_gt_" as
prefix instead of "debugfs_".
Signed-off-by: Andi Shyti
---
Changelog:
v2:
- the eval function is made generic as suggested by Daniele.
drivers/gpu/drm/i915/gt/debugfs_engines.c | 2 +-
drivers/gpu/drm/i915/gt/debugfs_gt.c | 11 +--
drivers/gpu/drm/i915/gt/debugfs_gt.h | 12 +++-
drivers/gpu/drm/i915/gt/debugfs_gt_pm.c | 14 +-
4 files changed, 22 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/debugfs_engines.c
b/drivers/gpu/drm/i915/gt/debugfs_engines.c
index 6a5e9ab20b94..3434df10d58c 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_engines.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_engines.c
@@ -32,5 +32,5 @@ void debugfs_engines_register(struct intel_gt *gt, struct
dentry *root)
{ "engines", _fops },
};
- debugfs_gt_register_files(gt, root, files, ARRAY_SIZE(files));
+ intel_gt_debugfs_register_file(gt, root, files, ARRAY_SIZE(files));
}
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.c
b/drivers/gpu/drm/i915/gt/debugfs_gt.c
index 75255aaacaed..24099fb157be 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.c
@@ -26,15 +26,14 @@ void debugfs_gt_register(struct intel_gt *gt)
debugfs_gt_pm_register(gt, root);
}
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count)
+void __intel_gt_debugfs_register_files(struct intel_gt *gt, struct dentry
*root,
+ const struct debugfs_gt_file *files,
+ unsigned long count, void *data)
{
while (count--) {
- if (!files->eval || files->eval(gt))
+ if (!files->eval || files->eval(data))
debugfs_create_file(files->name,
- 0444, root, gt,
+ 0444, root, data,
files->fops);
files++;
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt.h
b/drivers/gpu/drm/i915/gt/debugfs_gt.h
index 4ea0f06cda8f..f498fe75c79a 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt.h
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt.h
@@ -28,12 +28,14 @@ void debugfs_gt_register(struct intel_gt *gt);
struct debugfs_gt_file {
const char *name;
const struct file_operations *fops;
- bool (*eval)(const struct intel_gt *gt);
+ bool (*eval)(void *data);
};
-void debugfs_gt_register_files(struct intel_gt *gt,
- struct dentry *root,
- const struct debugfs_gt_file *files,
- unsigned long count);
+void __intel_gt_debugfs_register_files(struct intel_gt *gt, struct dentry
*root,
+ const struct debugfs_gt_file *files,
+ unsigned long count, void *data);
+
+#define intel_gt_debugfs_register_file(g, r, f, c) \
+ __intel_gt_debugfs_register_files(g, r, f, c, g)
#endif /* DEBUGFS_GT_H */
diff --git a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
index 059c9e5c002e..a233b97a9294 100644
--- a/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/debugfs_gt_pm.c
@@ -506,9 +506,11 @@ static int llc_show(struct seq_file *m, void *data)
return 0;
}
-static bool llc_eval(const struct intel_gt *gt)
+static bool llc_eval(void *data)
{
- return HAS_LLC(gt->i915);
+ struct intel_gt *gt = data;
+
+ return !gt ? false : HAS_LLC(gt->i915);
}
DEFINE_GT_DEBUGFS_ATTRIBUTE(llc);
@@ -580,9 +582,11 @@ static int rps_boost_show(struct seq_file *m, void *data)
return 0;
}
-static bool rps_eval(const struct intel_gt *gt)
+static bool rps_eval(void *data)
{
- return HAS_RPS(gt->i915);
+ struct intel_gt *gt = data;
+
+ return !gt ? false : HAS_RPS(gt->i915);
}
DEFINE_GT_DEBUGFS_ATTRIBUTE(rps_boost);
@@ -597,5 +601,5 @@ void debugfs_gt_pm_register(struct intel_gt *gt, struct
dentry *root)
{ "rps_boost", _boost_fops, rps_eval },
};
- debugfs_gt_register_files(gt, root, files, ARRAY_SIZE(files));
+ intel_gt_debugfs_register_file(gt, root, files, ARRAY_SIZE(files));
}
--
2.25.0
___
Re: [Intel-gfx] [PATCH 32/51] drm/mcde: Drop explicit drm_mode_config_cleanup call
On Mon, Mar 02, 2020 at 11:26:12PM +0100, Daniel Vetter wrote:
> Allows us to drop the drm_driver.release callback.
>
> This is made possible by a preceeding patch which added a drmm_
> cleanup action to drm_mode_config_init(), hence all we need to do to
> ensure that drm_mode_config_cleanup() is run on final drm_device
> cleanup is check the new error code for _init().
>
> v2: Explain why this cleanup is possible (Laurent).
>
> v3: Use drmm_mode_config_init() for more clarity (Sam, Thomas)
>
> Cc: Sam Ravnborg
> Cc: Thomas Zimmermann
> Reviewed-by: Linus Walleij (v2)
> Cc: Laurent Pinchart
> Signed-off-by: Daniel Vetter
> Cc: Linus Walleij
Acked-by: Sam Ravnborg
> ---
> drivers/gpu/drm/mcde/mcde_drv.c | 22 ++
> 1 file changed, 6 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/mcde/mcde_drv.c b/drivers/gpu/drm/mcde/mcde_drv.c
> index a543ebf3d541..03d2e1a00810 100644
> --- a/drivers/gpu/drm/mcde/mcde_drv.c
> +++ b/drivers/gpu/drm/mcde/mcde_drv.c
> @@ -184,13 +184,13 @@ static int mcde_modeset_init(struct drm_device *drm)
> ret = drm_vblank_init(drm, 1);
> if (ret) {
> dev_err(drm->dev, "failed to init vblank\n");
> - goto out_config;
> + return ret;
> }
>
> ret = mcde_display_init(drm);
> if (ret) {
> dev_err(drm->dev, "failed to init display\n");
> - goto out_config;
> + return ret;
> }
>
> /*
> @@ -204,7 +204,7 @@ static int mcde_modeset_init(struct drm_device *drm)
> mcde->bridge);
> if (ret) {
> dev_err(drm->dev, "failed to attach display output bridge\n");
> - goto out_config;
> + return ret;
> }
>
> drm_mode_config_reset(drm);
> @@ -212,17 +212,6 @@ static int mcde_modeset_init(struct drm_device *drm)
> drm_fbdev_generic_setup(drm, 32);
>
> return 0;
> -
> -out_config:
> - drm_mode_config_cleanup(drm);
> - return ret;
> -}
> -
> -static void mcde_release(struct drm_device *drm)
> -{
> - struct mcde *mcde = drm->dev_private;
> -
> - drm_mode_config_cleanup(drm);
> }
>
> DEFINE_DRM_GEM_CMA_FOPS(drm_fops);
> @@ -230,7 +219,6 @@ DEFINE_DRM_GEM_CMA_FOPS(drm_fops);
> static struct drm_driver mcde_drm_driver = {
> .driver_features =
> DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
> - .release = mcde_release,
> .lastclose = drm_fb_helper_lastclose,
> .ioctls = NULL,
> .fops = _fops,
> @@ -258,7 +246,9 @@ static int mcde_drm_bind(struct device *dev)
> struct drm_device *drm = dev_get_drvdata(dev);
> int ret;
>
> - drm_mode_config_init(drm);
> + ret = drmm_mode_config_init(drm);
> + if (ret)
> + return ret;
>
> ret = component_bind_all(drm->dev, drm);
> if (ret) {
> --
> 2.24.1
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Re: [Intel-gfx] [PATCH 31/51] drm/ingenic: Drop explicit drm_mode_config_cleanup call
On Mon, Mar 02, 2020 at 11:26:11PM +0100, Daniel Vetter wrote:
> Allows us to drop the drm_driver.release callback.
>
> This is made possible by a preceeding patch which added a drmm_
> cleanup action to drm_mode_config_init(), hence all we need to do to
> ensure that drm_mode_config_cleanup() is run on final drm_device
> cleanup is check the new error code for _init().
>
> v2: Explain why this cleanup is possible (Laurent).
>
> v3: Use drmm_mode_config_init() for more clarity (Sam, Thomas)
>
> Cc: Sam Ravnborg
> Cc: Thomas Zimmermann
> Reviewed-by: Paul Cercueil (v2)
> Cc: Laurent Pinchart
> Signed-off-by: Daniel Vetter
> Cc: Paul Cercueil
Acked-by: Sam Ravnborg
> ---
> drivers/gpu/drm/ingenic/ingenic-drm.c | 11 ---
> 1 file changed, 4 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/ingenic/ingenic-drm.c
> b/drivers/gpu/drm/ingenic/ingenic-drm.c
> index 192aaa4421a3..a9bc6623b488 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-drm.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-drm.c
> @@ -489,11 +489,6 @@ static irqreturn_t ingenic_drm_irq_handler(int irq, void
> *arg)
> return IRQ_HANDLED;
> }
>
> -static void ingenic_drm_release(struct drm_device *drm)
> -{
> - drm_mode_config_cleanup(drm);
> -}
> -
> static int ingenic_drm_enable_vblank(struct drm_crtc *crtc)
> {
> struct ingenic_drm *priv = drm_crtc_get_priv(crtc);
> @@ -537,7 +532,6 @@ static struct drm_driver ingenic_drm_driver_data = {
> .gem_prime_mmap = drm_gem_cma_prime_mmap,
>
> .irq_handler= ingenic_drm_irq_handler,
> - .release= ingenic_drm_release,
> };
>
> static const struct drm_plane_funcs ingenic_drm_primary_plane_funcs = {
> @@ -638,7 +632,10 @@ static int ingenic_drm_probe(struct platform_device
> *pdev)
> }
> drmm_add_final_kfree(drm, priv);
>
> - drm_mode_config_init(drm);
> + ret = drmm_mode_config_init(drm);
> + if (ret)
> + return ret;
> +
> drm->mode_config.min_width = 0;
> drm->mode_config.min_height = 0;
> drm->mode_config.max_width = soc_info->max_width;
> --
> 2.24.1
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Re: [Intel-gfx] [PATCH 28/51] drm/bochs: Drop explicit drm_mode_config_cleanup
On Mon, Mar 02, 2020 at 11:26:08PM +0100, Daniel Vetter wrote:
> Instead rely on the automatic clean, for which we just need to check
> that drm_mode_config_init succeeded. To avoid an inversion in the
> cleanup we also have to move the dev_private allocation over to
> drmm_kzalloc.
>
> This is made possible by a preceeding patch which added a drmm_
> cleanup action to drm_mode_config_init(), hence all we need to do to
> ensure that drm_mode_config_cleanup() is run on final drm_device
> cleanup is check the new error code for _init().
>
> v2: Explain why this cleanup is possible (Laurent).
>
> v3: Use drmm_mode_config_init() for more clarity (Sam, Thomas)
>
> Cc: Sam Ravnborg
> Cc: Thomas Zimmermann
> Cc: Laurent Pinchart
> Signed-off-by: Daniel Vetter
> Cc: Gerd Hoffmann
> Cc: virtualizat...@lists.linux-foundation.org
Acked-by: Sam Ravnborg
> ---
> drivers/gpu/drm/bochs/bochs.h | 1 -
> drivers/gpu/drm/bochs/bochs_drv.c | 6 ++
> drivers/gpu/drm/bochs/bochs_kms.c | 14 +-
> 3 files changed, 7 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/bochs/bochs.h b/drivers/gpu/drm/bochs/bochs.h
> index 917767173ee6..e5bd1d517a18 100644
> --- a/drivers/gpu/drm/bochs/bochs.h
> +++ b/drivers/gpu/drm/bochs/bochs.h
> @@ -92,7 +92,6 @@ void bochs_mm_fini(struct bochs_device *bochs);
>
> /* bochs_kms.c */
> int bochs_kms_init(struct bochs_device *bochs);
> -void bochs_kms_fini(struct bochs_device *bochs);
>
> /* bochs_fbdev.c */
> extern const struct drm_mode_config_funcs bochs_mode_funcs;
> diff --git a/drivers/gpu/drm/bochs/bochs_drv.c
> b/drivers/gpu/drm/bochs/bochs_drv.c
> index addb0568c1af..e18c51de1196 100644
> --- a/drivers/gpu/drm/bochs/bochs_drv.c
> +++ b/drivers/gpu/drm/bochs/bochs_drv.c
> @@ -7,6 +7,7 @@
>
> #include
> #include
> +#include
>
> #include "bochs.h"
>
> @@ -21,10 +22,7 @@ static void bochs_unload(struct drm_device *dev)
> {
> struct bochs_device *bochs = dev->dev_private;
>
> - bochs_kms_fini(bochs);
> bochs_mm_fini(bochs);
> - kfree(bochs);
> - dev->dev_private = NULL;
> }
>
> static int bochs_load(struct drm_device *dev)
> @@ -32,7 +30,7 @@ static int bochs_load(struct drm_device *dev)
> struct bochs_device *bochs;
> int ret;
>
> - bochs = kzalloc(sizeof(*bochs), GFP_KERNEL);
> + bochs = drmm_kzalloc(dev, sizeof(*bochs), GFP_KERNEL);
> if (bochs == NULL)
> return -ENOMEM;
> dev->dev_private = bochs;
> diff --git a/drivers/gpu/drm/bochs/bochs_kms.c
> b/drivers/gpu/drm/bochs/bochs_kms.c
> index e8cc8156d773..7f4bcfad87e9 100644
> --- a/drivers/gpu/drm/bochs/bochs_kms.c
> +++ b/drivers/gpu/drm/bochs/bochs_kms.c
> @@ -134,7 +134,11 @@ const struct drm_mode_config_funcs bochs_mode_funcs = {
>
> int bochs_kms_init(struct bochs_device *bochs)
> {
> - drm_mode_config_init(bochs->dev);
> + int ret;
> +
> + ret = drmm_mode_config_init(bochs->dev);
> + if (ret)
> + return ret;
>
> bochs->dev->mode_config.max_width = 8192;
> bochs->dev->mode_config.max_height = 8192;
> @@ -160,11 +164,3 @@ int bochs_kms_init(struct bochs_device *bochs)
>
> return 0;
> }
> -
> -void bochs_kms_fini(struct bochs_device *bochs)
> -{
> - if (!bochs->dev->mode_config.num_connector)
> - return;
> -
> - drm_mode_config_cleanup(bochs->dev);
> -}
> --
> 2.24.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/17] drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2.
== Series Details ==
Series: series starting with [01/17] drm/i915: Add an implementation for
i915_gem_ww_ctx locking, v2.
URL : https://patchwork.freedesktop.org/series/74387/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
eb9b1e99590c drm/i915: Add an implementation for i915_gem_ww_ctx locking, v2.
-:506: WARNING:LONG_LINE: line over 100 characters
#506: FILE: drivers/gpu/drm/i915/i915_gem.c:1339:
+ while ((obj = list_first_entry_or_null(>obj_list, struct
drm_i915_gem_object, obj_link))) {
total: 0 errors, 1 warnings, 0 checks, 481 lines checked
25c12f5343fc drm/i915: Remove locking from i915_gem_object_prepare_read/write
70a46e25ba91 drm/i915: Parse command buffer earlier in eb_relocate(slow)
b456e7ce4ec6 drm/i915: Use per object locking in execbuf, v5.
28a1ce0b43d8 drm/i915: Use ww locking in intel_renderstate.
-:10: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description
(prefer a maximum 75 chars per line)
#10:
Convert to using ww-waiting, and make sure we always pin intel_context_state,
total: 0 errors, 1 warnings, 0 checks, 202 lines checked
bfc213d5a176 drm/i915: Add ww context handling to context_barrier_task
-:19: WARNING:LONG_LINE: line over 100 characters
#19: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:1064:
+ int (*pin)(struct intel_context *ce, struct
i915_gem_ww_ctx *ww, void *data),
total: 0 errors, 1 warnings, 0 checks, 146 lines checked
af2dc1130f6d drm/i915: Nuke arguments to eb_pin_engine
9d697baac762 drm/i915: Pin engine before pinning all objects, v3.
205d4811461d drm/i915: Rework intel_context pinning to do everything outside of
pin_mutex
-:120: CHECK:LINE_SPACING: Please don't use multiple blank lines
#120: FILE: drivers/gpu/drm/i915/gt/intel_context.c:176:
+
+
-:330: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#330: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:3019:
+ *vaddr = i915_gem_object_pin_map(ce->state->obj,
+
i915_coherent_map_type(ce->engine->i915) |
total: 0 errors, 0 warnings, 2 checks, 435 lines checked
0259f9dcf820 drm/i915: Make sure execbuffer always passes ww state to
i915_vma_pin.
-:80: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#80: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:573:
+ err = i915_vma_pin_ww(vma, >ww,
entry->pad_to_size, entry->alignment,
-:188: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a
separate line
#188: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:2169:
+* hsw should have this fixed, but bdw mucks it up again. */
total: 0 errors, 1 warnings, 1 checks, 812 lines checked
020d4e2030bb drm/i915: Convert i915_gem_object/client_blt.c to use ww locking
as well, v2.
8545beb049f5 drm/i915: Kill last user of intel_context_create_request outside
of selftests
2c054c20d39b drm/i915: Convert i915_perf to ww locking as well
5ea034e6c8df drm/i915: Dirty hack to fix selftests locking inversion
7c001d1427b9 drm/i915/selftests: Fix locking inversion in lrc selftest.
0bca9be4412a drm/i915: Use ww pinning for intel_context_create_request()
92c3b116266e drm/i915: Move i915_vma_lock in the live selftest to avoid lock
inversion
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 27 lines checked
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for Asynchronous flip implementation for i915
== Series Details ==
Series: Asynchronous flip implementation for i915
URL : https://patchwork.freedesktop.org/series/74386/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8085 -> Patchwork_16860
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_16860 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16860, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16860:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@gt_lrc:
- fi-snb-2520m: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-snb-2520m/igt@i915_selftest@live@gt_lrc.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/fi-snb-2520m/igt@i915_selftest@live@gt_lrc.html
* igt@kms_busy@basic@flip:
- fi-skl-6770hq: [PASS][3] -> [INCOMPLETE][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-skl-6770hq/igt@kms_busy@ba...@flip.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/fi-skl-6770hq/igt@kms_busy@ba...@flip.html
* igt@runner@aborted:
- fi-snb-2520m: NOTRUN -> [FAIL][5]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/fi-snb-2520m/igt@run...@aborted.html
- fi-byt-j1900: NOTRUN -> [FAIL][6]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/fi-byt-j1900/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_16860 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_addfb_basic@invalid-get-prop:
- fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([CI#94] / [i915#402])
+1 similar issue
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-tgl-y/igt@kms_addfb_ba...@invalid-get-prop.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/fi-tgl-y/igt@kms_addfb_ba...@invalid-get-prop.html
Possible fixes
* igt@gem_exec_suspend@basic-s4-devices:
- fi-tgl-y: [FAIL][9] ([CI#94]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/fi-tgl-y/igt@gem_exec_susp...@basic-s4-devices.html
* igt@i915_selftest@live@gt_contexts:
- fi-snb-2520m: [DMESG-WARN][11] -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-snb-2520m/igt@i915_selftest@live@gt_contexts.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/fi-snb-2520m/igt@i915_selftest@live@gt_contexts.html
* igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u: [FAIL][13] ([fdo#109635] / [i915#262]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
* igt@prime_self_import@basic-with_two_bos:
- fi-tgl-y: [DMESG-WARN][15] ([CI#94] / [i915#402]) -> [PASS][16]
+1 similar issue
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8085/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16860/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[fdo#109635]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
[i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
Participating hosts (51 -> 42)
--
Additional (1): fi-tgl-dsi
Missing(10): fi-ilk-m540 fi-hsw-4200u fi-hsw-peppy fi-byt-squawks
fi-bsw-cyan fi-gdg-551 fi-bsw-kefka fi-bdw-samus fi-byt-clapper fi-skl-6600u
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_8085 -> Patchwork_16860
CI-20190529: 20190529
CI_DRM_8085: f731492964aa6510672f43292d4b2216b73eddeb @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5496: 00a8e400876f2c27f62ed7d418be6b55738a4ea6 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16860: 2eafb08e7a1274550eaa97d29851803cdda31162 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
2eafb08e7a12 drm/i915:
Re: [Intel-gfx] [PATCH 26/51] drm: Manage drm_mode_config_init with drmm_
Hi Daniel.
On Mon, Mar 02, 2020 at 11:26:06PM +0100, Daniel Vetter wrote:
> drm_mode_config_cleanup is idempotent, so no harm in calling this
> twice. This allows us to gradually switch drivers over by removing
> explicit drm_mode_config_cleanup calls.
>
> With this step it's now also possible that (at least for simple
> drivers) automatic resource cleanup can be done correctly without a
> drm_driver->release hook. Therefore allow this now in
> devm_drm_dev_init().
>
> Also with drmm_ explicit drm_driver->release hooks are kinda not the
> best option: Drivers can always just register their current release
> hook with drmm_add_action, but even better they could split them up to
> simplify the unwinding for the driver load failure case. So deprecate
> that hook to discourage future users.
>
> v2: Fixup the example in the kerneldoc too.
>
> v3:
> - For paranoia, double check that minor->dev == dev in the release
> hook, because I botched the pointer math in the drmm library.
> - Call drm_mode_config_cleanup when drmm_add_action fails, we'd be
> missing some mutex_destroy and ida_cleanup otherwise (Laurent)
>
> v4: Add a drmm_add_action_or_reset (like devm_ has) to encapsulate this
> pattern (Noralf).
>
> v5: Fix oversight in the new drmm_add_action_or_reset macro (Noralf)
>
> v4: Review from Sam:
> - drmm_mode_config_init wrapper (also suggested by Thomas)
> - improve commit message, explain better why ->relase is deprecated
The idea was to rename drm_mode_config_init() to
drmm_mode_config_init().
And then provide a wrapper for backward compatibility.
- So the kernel-doc documented function in drm_mode_config.c is the
recommened choice
- And the wrapper in drm_mode_config.h was only for backward
compatibility
In other words - the wrapper should be an undocumented:
static inline int drm_mode_config_init(struct drm_device *dev)
{
return drmm_mode_config_init(dev);
}
When all users have transitioned to drmm_mode_config_init()
then the wrapper could be dropped.
With this fixed, or a good reason not to do so:
Reviewed-by: Sam Ravnborg
Sam
>
> Cc: Laurent Pinchart
> Cc: "Noralf Trønnes"
> Cc: Sam Ravnborg
> Cc: Thomas Zimmermann
> Acked-by: Noralf Trønnes
> Signed-off-by: Daniel Vetter
> ---
> drivers/gpu/drm/drm_drv.c | 23 +++
> drivers/gpu/drm/drm_managed.c | 14 ++
> drivers/gpu/drm/drm_mode_config.c | 13 -
> include/drm/drm_managed.h | 7 +++
> include/drm/drm_mode_config.h | 19 ++-
> 5 files changed, 58 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> index c709a0ce018c..a82702d0c2fb 100644
> --- a/drivers/gpu/drm/drm_drv.c
> +++ b/drivers/gpu/drm/drm_drv.c
> @@ -98,6 +98,8 @@ static void drm_minor_alloc_release(struct drm_device *dev,
> void *data)
> struct drm_minor *minor = data;
> unsigned long flags;
>
> + WARN_ON(dev != minor->dev);
> +
> put_device(minor->kdev);
>
> spin_lock_irqsave(_minor_lock, flags);
> @@ -267,8 +269,7 @@ void drm_minor_release(struct drm_minor *minor)
> *
> * The following example shows a typical structure of a DRM display driver.
> * The example focus on the probe() function and the other functions that is
> - * almost always present and serves as a demonstration of devm_drm_dev_init()
> - * usage with its accompanying drm_driver->release callback.
> + * almost always present and serves as a demonstration of
> devm_drm_dev_init().
> *
> * .. code-block:: c
> *
> @@ -278,16 +279,8 @@ void drm_minor_release(struct drm_minor *minor)
> * struct clk *pclk;
> * };
> *
> - * static void driver_drm_release(struct drm_device *drm)
> - * {
> - * struct driver_device *priv = container_of(...);
> - *
> - * drm_mode_config_cleanup(drm);
> - * }
> - *
> * static struct drm_driver driver_drm_driver = {
> * [...]
> - * .release = driver_drm_release,
> * };
> *
> * static int driver_probe(struct platform_device *pdev)
> @@ -312,7 +305,9 @@ void drm_minor_release(struct drm_minor *minor)
> * }
> * drmm_add_final_kfree(drm, priv);
> *
> - * drm_mode_config_init(drm);
> + * ret = drm_mode_config_init(drm);
> + * if (ret)
> + * return ret;
> *
> * priv->userspace_facing = drmm_kzalloc(..., GFP_KERNEL);
> * if (!priv->userspace_facing)
> @@ -710,8 +705,7 @@ static void devm_drm_dev_init_release(void *data)
> * @driver: DRM driver
> *
> * Managed drm_dev_init(). The DRM device initialized with this function is
> - * automatically put on driver detach using drm_dev_put(). You must supply a
> - * _driver.release callback to control the finalization explicitly.
> + * automatically put on driver detach using drm_dev_put().
> *
> * RETURNS:
> * 0 on success, or error code on
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tgl: Make wa_1606700617 permanent (rev2)
== Series Details == Series: drm/i915/tgl: Make wa_1606700617 permanent (rev2) URL : https://patchwork.freedesktop.org/series/74240/ State : success == Summary == CI Bug Log - changes from CI_DRM_8073_full -> Patchwork_16844_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16844_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@rcs0-s3: - shard-kbl: [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-kbl4/igt@gem_ctx_isolat...@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-kbl2/igt@gem_ctx_isolat...@rcs0-s3.html * igt@gem_exec_schedule@implicit-both-bsd1: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / [i915#677]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb1/igt@gem_exec_sched...@implicit-both-bsd1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb6/igt@gem_exec_sched...@implicit-both-bsd1.html * igt@gem_exec_schedule@implicit-read-write-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([i915#677]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb5/igt@gem_exec_sched...@implicit-read-write-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb1/igt@gem_exec_sched...@implicit-read-write-bsd.html * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb8/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb2/igt@gem_exec_sched...@preempt-queue-contexts-chain-bsd.html * igt@gem_exec_schedule@promotion-bsd1: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +7 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb2/igt@gem_exec_sched...@promotion-bsd1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb5/igt@gem_exec_sched...@promotion-bsd1.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-skl: [PASS][11] -> [FAIL][12] ([i915#644]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl6/igt@gem_pp...@flink-and-close-vma-leak.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-skl6/igt@gem_pp...@flink-and-close-vma-leak.html * igt@i915_pm_rps@waitboost: - shard-iclb: [PASS][13] -> [FAIL][14] ([i915#413]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb3/igt@i915_pm_...@waitboost.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb6/igt@i915_pm_...@waitboost.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic: - shard-glk: [PASS][15] -> [FAIL][16] ([i915#72]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-glk9/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-glk1/igt@kms_cursor_leg...@2x-long-flip-vs-cursor-atomic.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [PASS][17] -> [FAIL][18] ([IGT#5] / [i915#697]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl6/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-skl6/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_flip@flip-vs-suspend: - shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-apl3/igt@kms_f...@flip-vs-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-apl8/igt@kms_f...@flip-vs-suspend.html * igt@kms_flip_tiling@flip-yf-tiled: - shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl7/igt@kms_flip_til...@flip-yf-tiled.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-skl7/igt@kms_flip_til...@flip-yf-tiled.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +2 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb2/igt@kms_psr@psr2_no_drrs.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16844/shard-iclb5/igt@kms_psr@psr2_no_drrs.html * igt@perf_pmu@busy-vcs1: - shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#112080]) +10 similar issues [25]:
[Intel-gfx] ✗ Fi.CI.DOCS: warning for Asynchronous flip implementation for i915
== Series Details == Series: Asynchronous flip implementation for i915 URL : https://patchwork.freedesktop.org/series/74386/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Asynchronous flip implementation for i915
== Series Details == Series: Asynchronous flip implementation for i915 URL : https://patchwork.freedesktop.org/series/74386/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.6.0 Commit: drm/i915: Define flip done functions and enable IER Okay! Commit: drm/i915: Add support for async flips in I915 Okay! Commit: drm/i915: Make commit call blocking in case of async flips Okay! Commit: drm/i915: Add checks specific to async flips Okay! ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Asynchronous flip implementation for i915
== Series Details == Series: Asynchronous flip implementation for i915 URL : https://patchwork.freedesktop.org/series/74386/ State : warning == Summary == $ dim checkpatch origin/drm-tip acc147186833 drm/i915: Define flip done functions and enable IER -:41: CHECK:BRACES: Blank lines aren't necessary before a close brace '}' #41: FILE: drivers/gpu/drm/i915/i915_irq.c:2658: + +} -:50: CHECK:LINE_SPACING: Please don't use multiple blank lines #50: FILE: drivers/gpu/drm/i915/i915_irq.c:2720: + total: 0 errors, 0 warnings, 2 checks, 68 lines checked e1403132835c drm/i915: Add support for async flips in I915 95f6839ee4fc drm/i915: Make commit call blocking in case of async flips ea0c09f4b01b drm/i915: Add checks specific to async flips 6d21dd58995a drm/i915: Add flip_done_handler definition de25734fbcdc drm/i915: Enable and handle flip done interrupt 2eafb08e7a12 drm/i915: Do not call drm_crtc_arm_vblank_event in async flips ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm: add managed resources tied to drm_device
Hi Daniel.
> v2: Do all the kerneldoc at the end, to avoid lots of fairly pointless
> shuffling while getting everything into shape.
>
> v3: Add static to add/del_dr (Neil)
> Move typo fix to the right patch (Neil)
>
> v4: Enforce contract for drmm_add_final_kfree:
>
> Use ksize() to check that the drm_device is indeed contained somewhere
> in the final kfree(). Because we need that or the entire managed
> release logic blows up in a pile of use-after-frees. Motivated by a
> discussion with Laurent.
>
> v5: Review from Laurent:
> - %zu instead of casting size_t
> - header guards
> - sorting of includes
> - guarding of data assignment if we didn't allocate it for a NULL
> pointer
> - delete spurious newline
> - cast void* data parameter correctly in ->release call, no idea how
> this even worked before
>
> v3: Review from Sam
> - Add the kerneldoc for the managed sub-struct back in, even if it
> doesn't show up in the generated html somehow.
> - Explain why __always_inline.
> - Fix bisectability around the final kfree() in drm_dev_relase(). This
> is just interim code which will disappear again.
> - Some whitespace polish.
> - Add debug output when drmm_add_action or drmm_kmalloc fail.
>
> v4: My bisectability fix wasn't up to par as noticed by smatch.
Counting is a difficult, let's restart from v3 :-)
>
> Cc: Dan Carpenter
> Cc: Sam Ravnborg
> Cc: Laurent Pinchart
> Cc: Neil Armstrong Cc: Greg Kroah-Hartman
> Cc: "Rafael J. Wysocki"
> Signed-off-by: Daniel Vetter
Looks good now.
Reviewed-by: Sam Ravnborg
> ---
> Documentation/gpu/drm-internals.rst | 6 +
> drivers/gpu/drm/Makefile| 3 +-
> drivers/gpu/drm/drm_drv.c | 12 +-
> drivers/gpu/drm/drm_internal.h | 3 +
> drivers/gpu/drm/drm_managed.c | 186
> include/drm/drm_device.h| 15 +++
> include/drm/drm_managed.h | 30 +
> include/drm/drm_print.h | 6 +
> 8 files changed, 259 insertions(+), 2 deletions(-)
> create mode 100644 drivers/gpu/drm/drm_managed.c
> create mode 100644 include/drm/drm_managed.h
>
> diff --git a/Documentation/gpu/drm-internals.rst
> b/Documentation/gpu/drm-internals.rst
> index a73320576ca9..a6b6145fda78 100644
> --- a/Documentation/gpu/drm-internals.rst
> +++ b/Documentation/gpu/drm-internals.rst
> @@ -132,6 +132,12 @@ be unmapped; on many devices, the ROM address decoder is
> shared with
> other BARs, so leaving it mapped could cause undesired behaviour like
> hangs or memory corruption.
>
> +Managed Resources
> +-
> +
> +.. kernel-doc:: drivers/gpu/drm/drm_managed.c
> + :doc: managed resources
> +
> Bus-specific Device Registration and PCI Support
>
>
> diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
> index 7f72ef5e7811..183c60048307 100644
> --- a/drivers/gpu/drm/Makefile
> +++ b/drivers/gpu/drm/Makefile
> @@ -17,7 +17,8 @@ drm-y := drm_auth.o drm_cache.o \
> drm_plane.o drm_color_mgmt.o drm_print.o \
> drm_dumb_buffers.o drm_mode_config.o drm_vblank.o \
> drm_syncobj.o drm_lease.o drm_writeback.o drm_client.o \
> - drm_client_modeset.o drm_atomic_uapi.o drm_hdcp.o
> + drm_client_modeset.o drm_atomic_uapi.o drm_hdcp.o \
> + drm_managed.o
>
> drm-$(CONFIG_DRM_LEGACY) += drm_legacy_misc.o drm_bufs.o drm_context.o
> drm_dma.o drm_scatter.o drm_lock.o
> drm-$(CONFIG_DRM_LIB_RANDOM) += lib/drm_random.o
> diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
> index 9fcd6ab3c154..d36e3812bedc 100644
> --- a/drivers/gpu/drm/drm_drv.c
> +++ b/drivers/gpu/drm/drm_drv.c
> @@ -629,6 +629,9 @@ int drm_dev_init(struct drm_device *dev,
> dev->dev = get_device(parent);
> dev->driver = driver;
>
> + INIT_LIST_HEAD(>managed.resources);
> + spin_lock_init(>managed.lock);
> +
> /* no per-device feature limits by default */
> dev->driver_features = ~0u;
>
> @@ -828,8 +831,15 @@ static void drm_dev_release(struct kref *ref)
> dev->driver->release(dev);
> } else {
> drm_dev_fini(dev);
> - kfree(dev);
> }
> +
> + drm_managed_release(dev);
> +
> + if (!dev->driver->release && !dev->managed.final_kfree) {
> + WARN_ON(!list_empty(>managed.resources));
> + kfree(dev);
> + } else if (dev->managed.final_kfree)
> + kfree(dev->managed.final_kfree);
> }
>
> /**
> diff --git a/drivers/gpu/drm/drm_internal.h b/drivers/gpu/drm/drm_internal.h
> index aeec2e68d772..8c2628dfc6c7 100644
> --- a/drivers/gpu/drm/drm_internal.h
> +++ b/drivers/gpu/drm/drm_internal.h
> @@ -89,6 +89,9 @@ void drm_prime_remove_buf_handle_locked(struct
> drm_prime_file_private *prime_fpr
> struct drm_minor *drm_minor_acquire(unsigned int minor_id);
> void drm_minor_release(struct drm_minor *minor);
>
> +/*
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix crtc nv12 etc. plane bitmasks for DPMS off
== Series Details == Series: drm/i915: Fix crtc nv12 etc. plane bitmasks for DPMS off URL : https://patchwork.freedesktop.org/series/74346/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8073_full -> Patchwork_16843_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16843_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16843_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16843_full: ### IGT changes ### Possible regressions * igt@gem_ctx_persistence@legacy-engines-mixed-process@render: - shard-skl: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl5/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@render.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-skl8/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@render.html Known issues Here are the changes found in Patchwork_16843_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@legacy-engines-mixed-process@default: - shard-skl: [PASS][3] -> [FAIL][4] ([i915#679]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl5/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@default.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-skl8/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@default.html * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#110854]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb4/igt@gem_exec_balan...@smoke.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-iclb6/igt@gem_exec_balan...@smoke.html * igt@gem_exec_schedule@implicit-both-bsd1: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276] / [i915#677]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb1/igt@gem_exec_sched...@implicit-both-bsd1.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-iclb8/igt@gem_exec_sched...@implicit-both-bsd1.html * igt@gem_exec_schedule@pi-distinct-iova-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([i915#677]) +2 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb8/igt@gem_exec_sched...@pi-distinct-iova-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-iclb2/igt@gem_exec_sched...@pi-distinct-iova-bsd.html * igt@gem_exec_schedule@preempt-queue-bsd1: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#109276]) +21 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb2/igt@gem_exec_sched...@preempt-queue-bsd1.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-iclb5/igt@gem_exec_sched...@preempt-queue-bsd1.html * igt@gem_exec_schedule@reorder-wide-bsd: - shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#112146]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb8/igt@gem_exec_sched...@reorder-wide-bsd.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-iclb2/igt@gem_exec_sched...@reorder-wide-bsd.html * igt@gem_workarounds@suspend-resume: - shard-skl: [PASS][15] -> [INCOMPLETE][16] ([i915#69]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-skl7/igt@gem_workarou...@suspend-resume.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-skl5/igt@gem_workarou...@suspend-resume.html - shard-apl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-apl2/igt@gem_workarou...@suspend-resume.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-apl4/igt@gem_workarou...@suspend-resume.html * igt@i915_pm_rps@min-max-config-loaded: - shard-iclb: [PASS][19] -> [FAIL][20] ([i915#370]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-iclb8/igt@i915_pm_...@min-max-config-loaded.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-iclb2/igt@i915_pm_...@min-max-config-loaded.html * igt@i915_suspend@debugfs-reader: - shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8073/shard-kbl2/igt@i915_susp...@debugfs-reader.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16843/shard-kbl7/igt@i915_susp...@debugfs-reader.html
[Intel-gfx] [PATCH v2 1/2] drm/i915/display: Deactive FBC in fastsets when disabled by parameter
Most of the kms_frontbuffer_tracking tests disables the feature being tested, draw, get the CRC then enable the feature, draw again, get the CRC and check if it matches. Some times it is able to do that with a fastset, so intel_pre_plane_update() is executed but intel_fbc_can_flip_nuke() was not checking if FBC is now enabled in this CRTC leaving FBC active and causing the warning bellow in __intel_fbc_disable() [IGT] kms_frontbuffer_tracking: starting subtest fbc-1p-pri-indfb-multidraw Setting dangerous option enable_fbc - tainting kernel i915 :00:02.0: [drm:i915_edp_psr_debug_set [i915]] Setting PSR debug to f i915 :00:02.0: [drm:intel_psr_debug_set [i915]] Invalid debug mask f i915 :00:02.0: [drm:i915_edp_psr_debug_set [i915]] Setting PSR debug to 1 i915 :00:02.0: [drm:intel_atomic_check [i915]] [CONNECTOR:215:eDP-1] Limiting display bpp to 24 instead of EDID bpp 24, requested bpp 36, max platform bpp 36 [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 2 max rate 27 max bpp 24 pixel clock 138120KHz [drm:intel_dp_compute_config [i915]] Force DSC en = 0 [drm:intel_dp_compute_config [i915]] DP lane count 2 clock 27 bpp 24 [drm:intel_dp_compute_config [i915]] DP link rate required 414360 available 54 i915 :00:02.0: [drm:intel_atomic_check [i915]] hw max bpp: 24, pipe bpp: 24, dithering: 0 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] [CRTC:91:pipe A] enable: yes [fastset] i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] active: yes, output_types: EDP (0x100), output format: RGB i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP, pipe bpp: 24, dithering: 0 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] dp m_n: lanes: 2; gmch_m: 6436858, gmch_n: 8388608, link_m: 268202, link_n: 524288, tu: 64 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0, infoframes enabled: 0x0 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] requested mode: [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 138120 1920 1968 2018 2052 1080 1084 1086 1122 0x48 0xa i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] adjusted mode: [drm:drm_mode_debug_printmodeline] Modeline "1920x1080": 60 138120 1920 1968 2018 2052 1080 1084 1086 1122 0x48 0xa [drm:intel_dump_pipe_config [i915]] crtc timings: 138120 1920 1968 2018 2052 1080 1084 1086 1122, type: 0x48 flags: 0xa i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] port clock: 27, pipe src size: 1920x1080, pixel rate 138120 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] linetime: 119, ips linetime: 0 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x, size: 0x, disabled, force thru: no i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] ips: 0, double wide: 0 [drm:icl_dump_hw_state [i915]] dpll_hw_state: cfgcr0: 0x1c001a5, cfgcr1: 0x8b, mg_refclkin_ctl: 0x0, hg_clktop2_coreclkctl1: 0x0, mg_clktop2_hsclkctl: 0x0, mg_pll_div0: 0x0, mg_pll_div2: 0x0, mg_pll_lf: 0x0, mg_pll_frac_lock: 0x0, mg_pll_ssc: 0x0, mg_pll_bias: 0x0, mg_pll_tdc_coldst_bias: 0x0 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] csc_mode: 0x0 gamma_mode: 0x0 gamma_enable: 0 csc_enable: 0 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] MST master transcoder: i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 1A] fb: [FB:262] 1920x1080 format = XR24 little-endian (0x34325258), visible: yes i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] rotation: 0x1, scaler: -1 i915 :00:02.0: [drm:intel_dump_pipe_config [i915]] src: 1920.00x1080.00+0.00+0.00 dst: 1920x1080+0+0 i915 :00:02.0: [drm:intel_psr_disable_locked [i915]] Disabling PSR1 i915 :00:02.0: [drm:intel_ddi_update_pipe [i915]] Panel doesn't support DRRS [ cut here ] i915 :00:02.0: drm_WARN_ON(fbc->active) WARNING: CPU: 4 PID: 1175 at drivers/gpu/drm/i915/display/intel_fbc.c:973 __intel_fbc_disable+0xa5/0x130 [i915] Modules linked in: snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic i915 mei_hdcp x86_pkg_temp_thermal coretemp crct10dif_pclmul snd_hda_intel crc32_pclmul snd_intel_dspcfg snd_hda_codec ghash_clmulni_intel snd_hwdep snd_hda_core cdc_ether e1000e usbnet mii snd_pcm ptp mei_me pps_core mei thunderbolt intel_lpss_pci prime_numbers CPU: 4 PID: 1175 Comm: kms_frontbuffer Tainted: G U 5.5.0-CI-Trybot_5651+ #1 Hardware name: Intel Corporation Ice Lake Client Platform/IceLake U DDR4 SODIMM PD RVP TLC, BIOS ICLSFWR1.R00.3234.A01.1906141750 06/14/2019 RIP: 0010:__intel_fbc_disable+0xa5/0x130 [i915] Code: 8b 67 50 4d 85 e4 0f 84 8f 00 00 00 e8 44 33 30 e1 48 c7 c1 72 f6 4c a0 4c 89 e2 48 89 c6 48 c7 c7 42 f6 4c a0 e8 0b 9d ce e0 <0f> 0b eb 90 48 8b 7b 18 4c 8b 67 50 4d 85 e4 74 6d e8 15 33 30 e1 RSP:
[Intel-gfx] [PATCH v2 2/2] drm/i915/display: Do not write in removed FBC fence registers
From: Radhakrishna Sripada
Platforms without fences don't have FBC host tracking and those
registers are marked as reserved in those platforms.
v2: checking num_fences to write to FBC fence registers (Ville)
Cc: Rodrigo Vivi
Cc: Matt Roper
Cc: Dhinakaran Pandiyan
Cc: Ville Syrjälä
Reviewed-by: Ville Syrjälä
Signed-off-by: Radhakrishna Sripada
Signed-off-by: Lucas De Marchi
Signed-off-by: José Roberto de Souza
---
drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 010b1107671f..2e5d835a9eaa 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -321,7 +321,7 @@ static void gen7_fbc_activate(struct drm_i915_private
*dev_priv)
SNB_CPU_FENCE_ENABLE | params->fence_id);
intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET,
params->crtc.fence_y_offset);
- } else {
+ } else if (dev_priv->ggtt.num_fences) {
intel_de_write(dev_priv, SNB_DPFC_CTL_SA, 0);
intel_de_write(dev_priv, DPFC_CPU_FENCE_OFFSET, 0);
}
--
2.25.1
___
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Re: [Intel-gfx] [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
Just as a comment, u8 for max_vfreq in struct drm_adaptive_sync_info
might be not very future proof?
I just read that ASUS announced a "TUF Gaming VG259QM" monitor which
seems to have an adaptive sync range of 48 Hz to 280 Hz, exceeding the
max 255 Hz of u8?
-mario
On Fri, Mar 6, 2020 at 4:02 PM Kazlauskas, Nicholas
wrote:
>
> On 2020-03-05 8:42 p.m., Manasi Navare wrote:
> > Adaptive Sync is a VESA feature so add a DRM core helper to parse
> > the EDID's detailed descritors to obtain the adaptive sync monitor range.
> > Store this info as part fo drm_display_info so it can be used
> > across all drivers.
> > This part of the code is stripped out of amdgpu's function
> > amdgpu_dm_update_freesync_caps() to make it generic and be used
> > across all DRM drivers
> >
> > v4:
> > * Use is_display_descriptor() (Ville)
> > * Name the monitor range flags (Ville)
> > v3:
> > * Remove the edid parsing restriction for just DP (Nicholas)
> > * Use drm_for_each_detailed_block (Ville)
> > * Make the drm_get_adaptive_sync_range function static (Harry, Jani)
> > v2:
> > * Change vmin and vmax to use u8 (Ville)
> > * Dont store pixel clock since that is just a max dotclock
> > and not related to VRR mode (Manasi)
> >
> > Cc: Ville Syrjälä
> > Cc: Harry Wentland
> > Cc: Clinton A Taylor
> > Cc: Kazlauskas Nicholas
> > Signed-off-by: Manasi Navare
>
> Looks good to me now. I'm fine with whether we want to rename the flags
> or not, I don't have much of a preference either way.
>
> Series is:
>
> Reviewed-by: Nicholas Kazlauskas
>
> Regards,
> Nicholas Kazlauskas
>
> > ---
> > drivers/gpu/drm/drm_edid.c | 44 +
> > include/drm/drm_connector.h | 22 +++
> > 2 files changed, 66 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index ad41764a4ebe..61ed544d9535 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector
> > *connector,
> > }
> > }
> >
> > +static
> > +void get_adaptive_sync_range(struct detailed_timing *timing,
> > + void *info_adaptive_sync)
> > +{
> > + struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync;
> > + const struct detailed_non_pixel *data = >data.other_data;
> > + const struct detailed_data_monitor_range *range = >data.range;
> > +
> > + if (!is_display_descriptor((const u8 *)timing,
> > EDID_DETAIL_MONITOR_RANGE))
> > + return;
> > +
> > + /*
> > + * Check for flag range limits only. If flag == 1 then
> > + * no additional timing information provided.
> > + * Default GTF, GTF Secondary curve and CVT are not
> > + * supported
> > + */
> > + if (range->flags != EDID_RANGE_LIMITS_ONLY_FLAG)
> > + return;
> > +
> > + adaptive_sync->min_vfreq = range->min_vfreq;
> > + adaptive_sync->max_vfreq = range->max_vfreq;
> > +}
> > +
> > +static
> > +void drm_get_adaptive_sync_range(struct drm_connector *connector,
> > + const struct edid *edid)
> > +{
> > + struct drm_display_info *info = >display_info;
> > +
> > + if (!version_greater(edid, 1, 1))
> > + return;
> > +
> > + drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range,
> > + >adaptive_sync);
> > +
> > + DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n",
> > + info->adaptive_sync.min_vfreq,
> > + info->adaptive_sync.max_vfreq);
> > +}
> > +
> > /* A connector has no EDID information, so we've got no EDID to compute
> > quirks from. Reset
> >* all of the values which would have been set from EDID
> >*/
> > @@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector
> > *connector)
> > memset(>hdmi, 0, sizeof(info->hdmi));
> >
> > info->non_desktop = 0;
> > + memset(>adaptive_sync, 0, sizeof(info->adaptive_sync));
> > }
> >
> > u32 drm_add_display_info(struct drm_connector *connector, const struct
> > edid *edid)
> > @@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector
> > *connector, const struct edid *edi
> >
> > info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
> >
> > + drm_get_adaptive_sync_range(connector, edid);
> > +
> > DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
> >
> > if (edid->revision < 3)
> > diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
> > index 0df7a95ca5d9..2b22c0fa42c4 100644
> > --- a/include/drm/drm_connector.h
> > +++ b/include/drm/drm_connector.h
> > @@ -254,6 +254,23 @@ enum drm_panel_orientation {
> > DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
> > };
> >
> > +/**
> > + * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
> > + * _display_info
> > + *
> > + * This struct is used to store a Panel's
Re: [Intel-gfx] [PATCH v4 1/2] drm/edid: Name the detailed monitor range flags
On Fri, Mar 06, 2020 at 12:30:46PM +0200, Jani Nikula wrote:
> On Thu, 05 Mar 2020, Manasi Navare wrote:
> > This patch adds defines for the detailed monitor
> > range flags as per the EDID specification.
> >
> > Suggested-by: Ville Syrjälä
> > Cc: Ville Syrjälä
> > Cc: Harry Wentland
> > Cc: Clinton A Taylor
> > Cc: Kazlauskas Nicholas
> > Signed-off-by: Manasi Navare
> > ---
> > include/drm/drm_edid.h | 5 +
> > 1 file changed, 5 insertions(+)
> >
> > diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
> > index f0b03d401c27..f89c97623845 100644
> > --- a/include/drm/drm_edid.h
> > +++ b/include/drm/drm_edid.h
> > @@ -91,6 +91,11 @@ struct detailed_data_string {
> > u8 str[13];
> > } __attribute__((packed));
> >
> > +#define EDID_DEFAULT_GTF_SUPPORT_FLAG 0x00
> > +#define EDID_RANGE_LIMITS_ONLY_FLAG 0x01
> > +#define EDID_SECONDARY_GTF_SUPPORT_FLAG 0x02
> > +#define EDID_CVT_SUPPORT_FLAG 0x04
>
> Bikeshed for consideration:
>
> drm_edid.h has some macros with DRM_EDID_ prefix, some with EDID_
> prefix, and then some with no prefix at all really. Should we start
> consolidating on something when we add more?
>
Yes Jani I did notice the same thing and didnt know which convention
to continue to follow but I noticed that majority of the defines were
just EDID_ so just used that for these new defines.
Is there a particular way you wish to consolidate this and use a specific
convention for #defines?
I can atleast change these new defines based on a preferred convention and then
separate patches to change the rest in .h and corresponding usages in .c files.
Regards
Manasi
> BR,
> Jani.
>
>
> > +
> > struct detailed_data_monitor_range {
> > u8 min_vfreq;
> > u8 max_vfreq;
>
> --
> Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH v6 i-g-t 2/2] tests/kms_getfb: Add getfb2 tests
On Fri, Mar 06, 2020 at 05:46:45PM +, Li, Juston wrote: > On Tue, 2020-02-11 at 13:22 -0800, Juston Li wrote: > > From: Daniel Stone > > > > Mirroring addfb2, add tests for the new ioctl which will return us > > information about framebuffers containing multiple buffers, as well > > as > > modifiers. > > > > Changes since v5: > > - Add documentation > > > > Changes since v4: > > - Remove unnecessary bo creation for getfb2-handle-closed subtest > > > > Changes since v3: > > - Add subtests to ensure handles aren't returned for non-root and > > non-master callers > > > > Changes since v1: > > - Add test that uses getfb2 output to call addfb2 as suggested by > > Ville > > > > Signed-off-by: Daniel Stone > > Signed-off-by: Juston Li > > Reviewed-by: Ville Syrjälä > > Friendly nudge, can this be merged now? > Added documentation, passing BAT now. Pushed to master. Thanks. -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v6 i-g-t 2/2] tests/kms_getfb: Add getfb2 tests
On Tue, 2020-02-11 at 13:22 -0800, Juston Li wrote:
> From: Daniel Stone
>
> Mirroring addfb2, add tests for the new ioctl which will return us
> information about framebuffers containing multiple buffers, as well
> as
> modifiers.
>
> Changes since v5:
> - Add documentation
>
> Changes since v4:
> - Remove unnecessary bo creation for getfb2-handle-closed subtest
>
> Changes since v3:
> - Add subtests to ensure handles aren't returned for non-root and
> non-master callers
>
> Changes since v1:
> - Add test that uses getfb2 output to call addfb2 as suggested by
> Ville
>
> Signed-off-by: Daniel Stone
> Signed-off-by: Juston Li
> Reviewed-by: Ville Syrjälä
Friendly nudge, can this be merged now?
Added documentation, passing BAT now.
Thanks
Juston
> ---
> tests/kms_getfb.c | 171
> ++
> 1 file changed, 171 insertions(+)
>
> diff --git a/tests/kms_getfb.c b/tests/kms_getfb.c
> index 292679ad3eb9..c3d3c93070cd 100644
> --- a/tests/kms_getfb.c
> +++ b/tests/kms_getfb.c
> @@ -40,6 +40,10 @@
> #include "drm.h"
> #include "drm_fourcc.h"
>
> +#include "igt_device.h"
> +
> +IGT_TEST_DESCRIPTION("Tests GETFB and GETFB2 ioctls.");
> +
> static bool has_getfb_iface(int fd)
> {
> struct drm_mode_fb_cmd arg = { };
> @@ -252,6 +256,167 @@ static void test_duplicate_handles(int fd)
> }
> }
>
> +static void test_getfb2(int fd)
> +{
> + struct drm_mode_fb_cmd2 add_basic = {};
> +
> + igt_fixture {
> + struct drm_mode_fb_cmd2 get = {};
> +
> + add_basic.width = 1024;
> + add_basic.height = 1024;
> + add_basic.pixel_format = DRM_FORMAT_XRGB;
> + add_basic.pitches[0] = 1024*4;
> + add_basic.handles[0] =
> igt_create_bo_with_dimensions(fd, 1024, 1024,
> + DRM_FORMAT_XRGB, 0, 0, NULL, NULL, NULL);
> + igt_assert(add_basic.handles[0]);
> + do_ioctl(fd, DRM_IOCTL_MODE_ADDFB2, _basic);
> +
> + get.fb_id = add_basic.fb_id;
> + do_ioctl(fd, DRM_IOCTL_MODE_GETFB2, );
> + igt_assert_neq_u32(get.handles[0], 0);
> + gem_close(fd, get.handles[0]);
> + }
> +
> + igt_describe("Tests error handling for a zero'd input.");
> + igt_subtest("getfb2-handle-zero") {
> + struct drm_mode_fb_cmd2 get = {};
> + do_ioctl_err(fd, DRM_IOCTL_MODE_GETFB2, , ENOENT);
> + }
> +
> + igt_describe("Tests error handling when passing a handle that "
> + "has been closed.");
> + igt_subtest("getfb2-handle-closed") {
> + struct drm_mode_fb_cmd2 add = add_basic;
> + struct drm_mode_fb_cmd2 get = { };
> +
> + do_ioctl(fd, DRM_IOCTL_MODE_ADDFB2, );
> + do_ioctl(fd, DRM_IOCTL_MODE_RMFB, _id);
> +
> + get.fb_id = add.fb_id;
> + do_ioctl_err(fd, DRM_IOCTL_MODE_GETFB2, , ENOENT);
> + }
> +
> + igt_describe("Tests error handling when passing an invalid "
> + "handle.");
> + igt_subtest("getfb2-handle-not-fb") {
> + struct drm_mode_fb_cmd2 get = { .fb_id =
> get_any_prop_id(fd) };
> + igt_require(get.fb_id > 0);
> + do_ioctl_err(fd, DRM_IOCTL_MODE_GETFB2, , ENOENT);
> + }
> +
> + igt_describe("Tests outputs are correct when retrieving a "
> + "CCS framebuffer.");
> + igt_subtest("getfb2-accept-ccs") {
> + struct drm_mode_fb_cmd2 add_ccs = { };
> + struct drm_mode_fb_cmd2 get = { };
> + int i;
> +
> + get_ccs_fb(fd, _ccs);
> + igt_require(add_ccs.fb_id != 0);
> + get.fb_id = add_ccs.fb_id;
> + do_ioctl(fd, DRM_IOCTL_MODE_GETFB2, );
> +
> + igt_assert_eq_u32(get.width, add_ccs.width);
> + igt_assert_eq_u32(get.height, add_ccs.height);
> + igt_assert(get.flags & DRM_MODE_FB_MODIFIERS);
> +
> + for (i = 0; i < ARRAY_SIZE(get.handles); i++) {
> + igt_assert_eq_u32(get.pitches[i],
> add_ccs.pitches[i]);
> + igt_assert_eq_u32(get.offsets[i],
> add_ccs.offsets[i]);
> + if (add_ccs.handles[i] != 0) {
> + igt_assert_neq_u32(get.handles[i], 0);
> + igt_assert_neq_u32(get.handles[i],
> +add_ccs.handles[i]);
> + igt_assert_eq_u64(get.modifier[i],
> + add_ccs.modifier[i]);
> + } else {
> + igt_assert_eq_u32(get.handles[i], 0);
> + igt_assert_eq_u64(get.modifier[i], 0);
> + }
> + }
> + igt_assert_eq_u32(get.handles[0], get.handles[1]);
> +
> + do_ioctl(fd, DRM_IOCTL_MODE_RMFB, _id);
> + gem_close(fd,
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue
== Series Details ==
Series: series starting with [1/3] drm/i915/execlists: Enable timeslice on
partial virtual engine dequeue
URL : https://patchwork.freedesktop.org/series/74384/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8084 -> Patchwork_16859
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_16859 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16859, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16859/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16859:
### IGT changes ###
Possible regressions
* igt@i915_selftest@live@gtt:
- fi-kbl-soraka: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-kbl-soraka/igt@i915_selftest@l...@gtt.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16859/fi-kbl-soraka/igt@i915_selftest@l...@gtt.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@i915_selftest@live@ring_submission}:
- fi-hsw-peppy: [PASS][3] -> [DMESG-FAIL][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-hsw-peppy/igt@i915_selftest@live@ring_submission.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16859/fi-hsw-peppy/igt@i915_selftest@live@ring_submission.html
Known issues
Here are the changes found in Patchwork_16859 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_mmap_gtt@basic:
- fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([CI#94] / [i915#402])
+1 similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-tgl-y/igt@gem_mmap_...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16859/fi-tgl-y/igt@gem_mmap_...@basic.html
* igt@kms_chamelium@dp-edid-read:
- fi-cml-u2: [PASS][7] -> [FAIL][8] ([i915#217])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16859/fi-cml-u2/igt@kms_chamel...@dp-edid-read.html
Possible fixes
* igt@i915_selftest@live@gem_contexts:
- fi-cml-s: [DMESG-FAIL][9] ([i915#877]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-cml-s/igt@i915_selftest@live@gem_contexts.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16859/fi-cml-s/igt@i915_selftest@live@gem_contexts.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [FAIL][11] ([i915#217]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16859/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html
* igt@vgem_basic@setversion:
- fi-tgl-y: [DMESG-WARN][13] ([CI#94] / [i915#402]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-tgl-y/igt@vgem_ba...@setversion.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16859/fi-tgl-y/igt@vgem_ba...@setversion.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#877]: https://gitlab.freedesktop.org/drm/intel/issues/877
Participating hosts (41 -> 41)
--
Additional (7): fi-bsw-n3050 fi-skl-6770hq fi-glk-dsi fi-elk-e7500
fi-skl-6700k2 fi-blb-e6850 fi-skl-6600u
Missing(7): fi-bdw-5557u fi-byt-squawks fi-bsw-cyan fi-ctg-p8600
fi-ivb-3770 fi-cfl-8109u fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_8084 -> Patchwork_16859
CI-20190529: 20190529
CI_DRM_8084: 36d1d55dd2ae3d50a3ff1899e576b567be7b7530 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5496: 00a8e400876f2c27f62ed7d418be6b55738a4ea6 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16859: 9f74623d824db4a846d4c3bfd0c14910110e0613 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9f74623d824d drm/i915: Tweak scheduler's kick_submission()
d6fd89fdd21b drm/i915: Improve the start alignment of bonded pairs
fef8e6f63836 drm/i915/execlists: Enable timeslice on partial virtual engine
dequeue
== Logs ==
For more
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [v4,1/3] drm/i915/perf: remove generated code
== Series Details ==
Series: series starting with [v4,1/3] drm/i915/perf: remove generated code
URL : https://patchwork.freedesktop.org/series/74379/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_8084 -> Patchwork_16858
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_16858 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_16858, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16858/index.html
Possible new issues
---
Here are the unknown changes that may have been introduced in Patchwork_16858:
### IGT changes ###
Possible regressions
* igt@gem_exec_parallel@fds:
- fi-cfl-8700k: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-cfl-8700k/igt@gem_exec_paral...@fds.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16858/fi-cfl-8700k/igt@gem_exec_paral...@fds.html
* igt@runner@aborted:
- fi-byt-j1900: NOTRUN -> [FAIL][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16858/fi-byt-j1900/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_16858 that come from known issues:
### IGT changes ###
Issues hit
* igt@kms_addfb_basic@addfb25-bad-modifier:
- fi-tgl-y: [PASS][4] -> [DMESG-WARN][5] ([CI#94] / [i915#402])
+1 similar issue
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-tgl-y/igt@kms_addfb_ba...@addfb25-bad-modifier.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16858/fi-tgl-y/igt@kms_addfb_ba...@addfb25-bad-modifier.html
Possible fixes
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-icl-u2: [FAIL][6] ([i915#217]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16858/fi-icl-u2/igt@kms_chamel...@common-hpd-after-suspend.html
* igt@vgem_basic@setversion:
- fi-tgl-y: [DMESG-WARN][8] ([CI#94] / [i915#402]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8084/fi-tgl-y/igt@vgem_ba...@setversion.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16858/fi-tgl-y/igt@vgem_ba...@setversion.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[CI#94]: https://gitlab.freedesktop.org/gfx-ci/i915-infra/issues/94
[i915#217]: https://gitlab.freedesktop.org/drm/intel/issues/217
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#45]: https://gitlab.freedesktop.org/drm/intel/issues/45
Participating hosts (41 -> 39)
--
Additional (5): fi-skl-6770hq fi-glk-dsi fi-elk-e7500 fi-bsw-kefka
fi-skl-6700k2
Missing(7): fi-hsw-peppy fi-byt-squawks fi-bsw-cyan fi-ilk-650
fi-ctg-p8600 fi-gdg-551 fi-bdw-samus
Build changes
-
* CI: CI-20190529 -> None
* Linux: CI_DRM_8084 -> Patchwork_16858
CI-20190529: 20190529
CI_DRM_8084: 36d1d55dd2ae3d50a3ff1899e576b567be7b7530 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_5496: 00a8e400876f2c27f62ed7d418be6b55738a4ea6 @
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_16858: a2d1de8ada3c78af0f68229616894812fe683157 @
git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
a2d1de8ada3c drm/i915/perf: introduce global sseu pinning
3a6512ad9340 drm/i915/perf: remove redundant power configuration register
override
d4ffbb0b3484 drm/i915/perf: remove generated code
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16858/index.html
___
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[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/3] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue
== Series Details == Series: series starting with [1/3] drm/i915/execlists: Enable timeslice on partial virtual engine dequeue URL : https://patchwork.freedesktop.org/series/74384/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915/tgl: Don't treat unslice registers as masked
The UNSLICE_UNIT_LEVEL_CLKGATE and UNSLICE_UNIT_LEVEL_CLKGATE2 registers
that we update in a few engine workarounds are not masked registers
(i.e., we don't have to write a mask bit in the top 16 bits when
updating one of the lower 16 bits). As such, these workarounds should
be applied via wa_write_or() rather than wa_masked_en()
v2:
- Rebase
Reported-by: Nick Desaulniers
Reported-by: kernelci.org bot
References: https://github.com/ClangBuiltLinux/linux/issues/918
Fixes: 50148a25f841 ("drm/i915/tgl: Move and restrict Wa_1408615072")
Fixes: 3551ff928744 ("drm/i915/gen11: Moving WAs to rcs_engine_wa_init()")
Cc: José Roberto de Souza
Signed-off-by: Matt Roper
Tested-by: Nick Desaulniers
Reviewed-by: José Roberto de Souza
---
drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 7be71a1a5719..03dd17ca39a7 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1387,8 +1387,8 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct
i915_wa_list *wal)
wa_masked_en(wal, GEN9_ROW_CHICKEN4, GEN12_DISABLE_TDL_PUSH);
/* Wa_1408615072:tgl */
- wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
-VSUNIT_CLKGATE_DIS_TGL);
+ wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
+ VSUNIT_CLKGATE_DIS_TGL);
}
if (IS_TIGERLAKE(i915)) {
@@ -1472,12 +1472,12 @@ rcs_engine_wa_init(struct intel_engine_cs *engine,
struct i915_wa_list *wal)
* Wa_1408615072:icl,ehl (vsunit)
* Wa_1407596294:icl,ehl (hsunit)
*/
- wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE,
-VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
+ wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE,
+ VSUNIT_CLKGATE_DIS | HSUNIT_CLKGATE_DIS);
/* Wa_1407352427:icl,ehl */
- wa_masked_en(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
-PSDUNIT_CLKGATE_DIS);
+ wa_write_or(wal, UNSLICE_UNIT_LEVEL_CLKGATE2,
+ PSDUNIT_CLKGATE_DIS);
}
if (IS_GEN_RANGE(i915, 9, 12)) {
--
2.24.1
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[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [v4,1/3] drm/i915/perf: remove generated code
== Series Details == Series: series starting with [v4,1/3] drm/i915/perf: remove generated code URL : https://patchwork.freedesktop.org/series/74379/ State : warning == Summary == $ make htmldocs 2>&1 > /dev/null | grep i915 ./drivers/gpu/drm/i915/display/intel_dpll_mgr.h:285: warning: Function parameter or member 'get_freq' not described in 'intel_shared_dpll_funcs' ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only
Hi folks,
[+Takashi from ALSA]
On Mon, 6 Jan 2020, Matt Roper wrote:
>>> On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote:
Revert changes done in commit f6ec9483091f ("drm/i915: extend audio
CDCLK>=2*BCLK constraint to more platforms"). Audio drivers
>
> Agreed; GLK's minimum cdclk goes down to 79.2 mhz so it makes sense that
> it needs to be handled differently than CNL (and beyond). I.e., this
> isn't a pure revert of the original patch.
unfortunately it seems this fix that was done is not holding up in wider
testing. It now looks we need to enforce the constraint in one form or
another for newer platforms as well. We can't revert the revert as that
will bring the boot flicker back, so we'll need something else.
Now as we've gone back-and-forth multiple times, I want to get some early
feedback before opting for one path or another.
To recap in short:
- audio driver calls i915 acomp get_power() multiple times during boot
-> this can cause annoying flicker at boot on platforms where
each get_power() leads to a modeset change
- example: https://gitlab.freedesktop.org/drm/intel/issues/913
- systems with more complex audio subsystems (DSP enabled) will be
calling get_power() many more times (as i915 iDisp link is needed in
multiple phases of audio controller, DSP and codecs initialization),
making the flicker worse
I've gone through (once more) possible options, and it starts to seem that
trying to minimize # of get_power() cycles is not going to work well in
the long run. We could certainly reduce number of distinct get_power
calls e.g. during boot by refactoring the audio DSP setup, but there would
still be more than a few, and it's not just the boot. We now need to call
get_power() when the audio controller comes out from runtime suspend
(otherwise the HDA link is not ok between i915 and audio). This can be pretty
annoying if there are visible artifacts to the end-user in such a case
where potentially no HDMI/DP monitors are even connected).
Similarly on i915 side, it would seem pretty unlikely that we are going
to get smooth changes of CDCLK. It might work better on some platforms,
but generally (depending on the available dividers provided), it's not
going to be guaranteed to be flicker-free.
So how about: We move the glk_force_audio_cdclk() logic from
intel_audio.c:i915_audio_component_get_power() to acomp init.
This has some notable implications:
- audio driver can safely call get_power without worrying
about creating display artifacts,
- on some platforms, with specific HDA link params in BIOS,
this will mean some lower CDCLK frequencies, will not be used
at all
- e.g. on ICL system with 96Mhz BCLK for iDisp, 172800 and
18 are blocked out, and 192000 is the practical minimum
unless you unload the audio driver
- if BCLK is 48Mhz, no impact to CDCLK selection on ICL
Any chance to get this through? I understand this effectively removes the
lower clocks from some systems, so this needs to be evaluated carefully.
I don't really have other options on the table now. We could maybe use
idle-timers to delay powering off the audio domain until certain amount of
inactivity, but this is both ugly and won't solve the full thing. Or we
just keep reducing get_power() calls on audio side, and just mitigate the
the severity of the flicker -- again not fully solving the problem.
Thoughts and feedback is welcome.
Br, Kai
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/3] drm/i915/perf: remove generated code
== Series Details ==
Series: series starting with [v4,1/3] drm/i915/perf: remove generated code
URL : https://patchwork.freedesktop.org/series/74379/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d4ffbb0b3484 drm/i915/perf: remove generated code
-:24: WARNING:UNKNOWN_COMMIT_ID: Unknown commit id '53f8f541ca', maybe rebased
or not pulled?
#24:
commit 53f8f541ca ("lib: Add i915_perf library"), previously this was
-:201: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does
MAINTAINERS need updating?
#201:
deleted file mode 100644
-:2095: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#2095: FILE: drivers/gpu/drm/i915/selftests/i915_perf.c:69:
+
+}
-:2117: CHECK:LINE_SPACING: Please don't use multiple blank lines
#2117: FILE: drivers/gpu/drm/i915/selftests/i915_perf.c:91:
+
+
total: 0 errors, 2 warnings, 2 checks, 279 lines checked
3a6512ad9340 drm/i915/perf: remove redundant power configuration register
override
a2d1de8ada3c drm/i915/perf: introduce global sseu pinning
-:203: CHECK:OPEN_ENDED_LINE: Lines should not end with a '('
#203: FILE: drivers/gpu/drm/i915/i915_perf.c:2760:
+ user_engine = intel_engine_lookup_user(
total: 0 errors, 0 warnings, 1 checks, 263 lines checked
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Re: [Intel-gfx] [PATCH] drm/i915/gt: Close race between cacheline_retire and free
Chris Wilson writes:
> If the cacheline may still be busy, atomically mark it for future
> release, and only if we can determine that it will never be used again,
> immediately free it.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/issues/1392
> Signed-off-by: Chris Wilson
> Cc: Tvrtko Ursulin
> Cc: Mika Kuoppala
> Cc: Matthew Auld
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gt/intel_timeline.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c
> b/drivers/gpu/drm/i915/gt/intel_timeline.c
> index 54e1e55f3c81..91debbc97c9a 100644
> --- a/drivers/gpu/drm/i915/gt/intel_timeline.c
> +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
> @@ -192,11 +192,15 @@ static void cacheline_release(struct
> intel_timeline_cacheline *cl)
>
> static void cacheline_free(struct intel_timeline_cacheline *cl)
> {
> + if (!i915_active_acquire_if_busy(>active)) {
> + __idle_cacheline_free(cl);
> + return;
> + }
> +
> GEM_BUG_ON(ptr_test_bit(cl->vaddr, CACHELINE_FREE));
> cl->vaddr = ptr_set_bit(cl->vaddr, CACHELINE_FREE);
>
> - if (i915_active_is_idle(>active))
> - __idle_cacheline_free(cl);
> + i915_active_release(>active);
> }
>
> int intel_timeline_init(struct intel_timeline *timeline,
> --
> 2.25.1
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/execlists: Show the "switch priority hint" in dumps
== Series Details == Series: drm/i915/execlists: Show the "switch priority hint" in dumps URL : https://patchwork.freedesktop.org/series/74340/ State : success == Summary == CI Bug Log - changes from CI_DRM_8070_full -> Patchwork_16841_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16841_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@legacy-engines-mixed-process@blt: - shard-apl: [PASS][1] -> [INCOMPLETE][2] ([fdo#103927] / [i915#1197]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl2/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@blt.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-apl2/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@blt.html * igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd1: - shard-apl: [PASS][3] -> [FAIL][4] ([i915#679]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl2/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@bsd1.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-apl2/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@bsd1.html * igt@gem_exec_capture@capture-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#112146]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb3/igt@gem_exec_capt...@capture-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-iclb1/igt@gem_exec_capt...@capture-bsd.html * igt@gem_exec_capture@capture-bsd2: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276]) +6 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@gem_exec_capt...@capture-bsd2.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-iclb6/igt@gem_exec_capt...@capture-bsd2.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-kbl: [PASS][9] -> [FAIL][10] ([i915#644]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-kbl1/igt@gem_pp...@flink-and-close-vma-leak.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-kbl6/igt@gem_pp...@flink-and-close-vma-leak.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-skl: [PASS][11] -> [FAIL][12] ([i915#79]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl2/igt@kms_f...@flip-vs-expired-vblank-interruptible.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-skl8/igt@kms_f...@flip-vs-expired-vblank-interruptible.html * igt@kms_flip_tiling@flip-yf-tiled: - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#108145]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl8/igt@kms_flip_til...@flip-yf-tiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-skl1/igt@kms_flip_til...@flip-yf-tiled.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +3 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-kbl4/igt@kms_frontbuffer_track...@fbc-suspend.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-kbl7/igt@kms_frontbuffer_track...@fbc-suspend.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#49]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl10/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-skl10/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b: - shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl8/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-b.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-apl6/igt@kms_pipe_crc_ba...@suspend-read-crc-pipe-b.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-glk: [PASS][21] -> [FAIL][22] ([i915#899]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-glk8/igt@kms_plane_low...@pipe-a-tiling-x.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-glk3/igt@kms_plane_low...@pipe-a-tiling-x.html * igt@kms_psr2_su@page_flip: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109642] / [fdo#111068]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@kms_psr2_su@page_flip.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16841/shard-iclb6/igt@kms_psr2_su@page_flip.html * igt@kms_psr@no_drrs: - shard-iclb:
[Intel-gfx] [PATCH] drm/i915/gt: Close race between cacheline_retire and free
If the cacheline may still be busy, atomically mark it for future
release, and only if we can determine that it will never be used again,
immediately free it.
Closes: https://gitlab.freedesktop.org/drm/intel/issues/1392
Signed-off-by: Chris Wilson
Cc: Tvrtko Ursulin
Cc: Mika Kuoppala
Cc: Matthew Auld
---
drivers/gpu/drm/i915/gt/intel_timeline.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c
b/drivers/gpu/drm/i915/gt/intel_timeline.c
index 54e1e55f3c81..91debbc97c9a 100644
--- a/drivers/gpu/drm/i915/gt/intel_timeline.c
+++ b/drivers/gpu/drm/i915/gt/intel_timeline.c
@@ -192,11 +192,15 @@ static void cacheline_release(struct
intel_timeline_cacheline *cl)
static void cacheline_free(struct intel_timeline_cacheline *cl)
{
+ if (!i915_active_acquire_if_busy(>active)) {
+ __idle_cacheline_free(cl);
+ return;
+ }
+
GEM_BUG_ON(ptr_test_bit(cl->vaddr, CACHELINE_FREE));
cl->vaddr = ptr_set_bit(cl->vaddr, CACHELINE_FREE);
- if (i915_active_is_idle(>active))
- __idle_cacheline_free(cl);
+ i915_active_release(>active);
}
int intel_timeline_init(struct intel_timeline *timeline,
--
2.25.1
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Re: [Intel-gfx] [PATCH v2 0/9] drm/i915: Gamma cleanups
On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Remainder of my earlier gamma cleanups, rebased due to
hw vs. uapi split and intel_de_{read,write}().
I didn't get patch#8. Everything looks good to me.
There is BAT failure https://patchwork.freedesktop.org/series/69136/
Please check that.
Reviewed-by: Swati Sharma
Ville Syrjälä (9):
drm/i915: Polish CHV CGM CSC loading
drm/i915: Clean up i9xx_load_luts_internal()
drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants
drm/i915: s/blob_data/lut/
drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/
drm/i915: Clean up integer types in color code
drm/i915: Refactor LUT read functions
drm/i915: Fix readout of PIPEGCMAX
drm/i915: Pass the crtc to the low level read_lut() funcs
drivers/gpu/drm/i915/display/intel_color.c | 407 -
drivers/gpu/drm/i915/i915_reg.h| 1 -
2 files changed, 225 insertions(+), 183 deletions(-)
--
~Swati Sharma
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Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Pass the crtc to the low level read_lut() funcs
On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
From: Ville Syrjälä
The low level read_lut() functions don't need the entire crtc state
as they know exactly what they're reading. Just need to pass in the
crtc to get at the pipe. This now neatly mirrors the load_lut()
direction.
Signed-off-by: Ville Syrjälä
Reviewed-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 51 +++---
1 file changed, 25 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index ed9996aacafd..c1cce93a1c25 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1722,10 +1722,8 @@ bool intel_color_lut_equal(struct drm_property_blob
*blob1,
return true;
}
-static struct drm_property_blob *
-i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
+static struct drm_property_blob *i9xx_read_lut_8(struct intel_crtc *crtc)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
@@ -1751,16 +1749,16 @@ i9xx_read_lut_8(const struct intel_crtc_state
*crtc_state)
static void i9xx_read_luts(struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+
if (!crtc_state->gamma_enable)
return;
- crtc_state->hw.gamma_lut = i9xx_read_lut_8(crtc_state);
+ crtc_state->hw.gamma_lut = i9xx_read_lut_8(crtc);
}
-static struct drm_property_blob *
-i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
+static struct drm_property_blob *i965_read_lut_10p6(struct intel_crtc *crtc)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
@@ -1791,19 +1789,19 @@ i965_read_lut_10p6(const struct intel_crtc_state
*crtc_state)
static void i965_read_luts(struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+
if (!crtc_state->gamma_enable)
return;
if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
- crtc_state->hw.gamma_lut = i9xx_read_lut_8(crtc_state);
+ crtc_state->hw.gamma_lut = i9xx_read_lut_8(crtc);
else
- crtc_state->hw.gamma_lut = i965_read_lut_10p6(crtc_state);
+ crtc_state->hw.gamma_lut = i965_read_lut_10p6(crtc);
}
-static struct drm_property_blob *
-chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
+static struct drm_property_blob *chv_read_cgm_gamma(struct intel_crtc *crtc)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
@@ -1830,16 +1828,16 @@ chv_read_cgm_gamma(const struct intel_crtc_state
*crtc_state)
static void chv_read_luts(struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+
if (crtc_state->cgm_mode & CGM_PIPE_MODE_GAMMA)
- crtc_state->hw.gamma_lut = chv_read_cgm_gamma(crtc_state);
+ crtc_state->hw.gamma_lut = chv_read_cgm_gamma(crtc);
else
i965_read_luts(crtc_state);
}
-static struct drm_property_blob *
-ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
+static struct drm_property_blob *ilk_read_lut_8(struct intel_crtc *crtc)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
@@ -1863,10 +1861,8 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
return blob;
}
-static struct drm_property_blob *
-ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
+static struct drm_property_blob *ilk_read_lut_10(struct intel_crtc *crtc)
{
- struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
@@ -1892,6 +1888,8 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
static void ilk_read_luts(struct intel_crtc_state *crtc_state)
{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+
if (!crtc_state->gamma_enable)
return;
@@ -1899,15 +1897,14 @@ static void ilk_read_luts(struct intel_crtc_state *crtc_state)
return;
if
Re: [Intel-gfx] [PATCH v2 5/9] drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/
On Fri, Mar 06, 2020 at 08:48:42PM +0530, Sharma, Swati2 wrote:
>
>
> On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > chv_read_cgm_lut() specifically reads the CGM _gamma_ LUT so
> > let's rename it to reflect that fact. This also mirrors
> > the other direction's chv_load_cgm_gamma().
>
> At present, since all the readouts are only gamma luts so should we
> rename all the readouts like chv_read_gamma_lut()?
No, the names are chosen based on the HW LUT we read not the SW LUT.
>
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/i915/display/intel_color.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_color.c
> > b/drivers/gpu/drm/i915/display/intel_color.c
> > index f90f113355bc..ab23b24e7be3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_color.c
> > +++ b/drivers/gpu/drm/i915/display/intel_color.c
> > @@ -1780,7 +1780,7 @@ static void i965_read_luts(struct intel_crtc_state
> > *crtc_state)
> > }
> >
> > static struct drm_property_blob *
> > -chv_read_cgm_lut(const struct intel_crtc_state *crtc_state)
> > +chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > @@ -1816,7 +1816,7 @@ chv_read_cgm_lut(const struct intel_crtc_state
> > *crtc_state)
> > static void chv_read_luts(struct intel_crtc_state *crtc_state)
> > {
> > if (crtc_state->cgm_mode & CGM_PIPE_MODE_GAMMA)
> > - crtc_state->hw.gamma_lut = chv_read_cgm_lut(crtc_state);
> > + crtc_state->hw.gamma_lut = chv_read_cgm_gamma(crtc_state);
> > else
> > i965_read_luts(crtc_state);
> > }
> >
>
> --
> ~Swati Sharma
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH v2 7/9] drm/i915: Refactor LUT read functions
On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
From: Ville Syrjälä
Extract all the 'hw value -> LUT entry' stuff into small helpers
to make the main 'read out the entire LUT' loop less bogged down
by such mundane details.
Wow!
Signed-off-by: Ville Syrjälä
Reviewed-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 122 +++--
1 file changed, 62 insertions(+), 60 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 934f00817c5c..8796f04e23a8 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -387,6 +387,19 @@ static void chv_load_cgm_csc(struct intel_crtc *crtc,
coeffs[8]);
}
+/* convert hw value with given bit_precision to lut property val */
+static u32 intel_color_lut_pack(u32 val, int bit_precision)
+{
+ u32 max = 0x >> (16 - bit_precision);
+
+ val = clamp_val(val, 0, max);
+
+ if (bit_precision < 16)
+ val <<= 16 - bit_precision;
+
+ return val;
+}
+
static u32 i9xx_lut_8(const struct drm_color_lut *color)
{
return drm_color_lut_extract(color->red, 8) << 16 |
@@ -394,6 +407,13 @@ static u32 i9xx_lut_8(const struct drm_color_lut *color)
drm_color_lut_extract(color->blue, 8);
}
+static void i9xx_lut_8_pack(struct drm_color_lut *entry, u32 val)
+{
+ entry->red = intel_color_lut_pack(REG_FIELD_GET(LGC_PALETTE_RED_MASK,
val), 8);
+ entry->green =
intel_color_lut_pack(REG_FIELD_GET(LGC_PALETTE_GREEN_MASK, val), 8);
+ entry->blue = intel_color_lut_pack(REG_FIELD_GET(LGC_PALETTE_BLUE_MASK,
val), 8);
+}
+
/* i965+ "10.6" bit interpolated format "even DW" (low 8 bits) */
static u32 i965_lut_10p6_ldw(const struct drm_color_lut *color)
{
@@ -410,6 +430,21 @@ static u32 i965_lut_10p6_udw(const struct drm_color_lut
*color)
(color->blue >> 8);
}
+static void i965_lut_10p6_pack(struct drm_color_lut *entry, u32 ldw, u32 udw)
+{
+ entry->red = REG_FIELD_GET(PALETTE_RED_MASK, udw) << 8 |
+ REG_FIELD_GET(PALETTE_RED_MASK, ldw);
+ entry->green = REG_FIELD_GET(PALETTE_GREEN_MASK, udw) << 8 |
+ REG_FIELD_GET(PALETTE_GREEN_MASK, ldw);
+ entry->blue = REG_FIELD_GET(PALETTE_BLUE_MASK, udw) << 8 |
+ REG_FIELD_GET(PALETTE_BLUE_MASK, ldw);
+}
+
+static u16 i965_lut_11p6_max_pack(u32 val)
+{
+ return REG_FIELD_GET(PIPEGCMAX_RGB_MASK, val);
+}
+
static u32 ilk_lut_10(const struct drm_color_lut *color)
{
return drm_color_lut_extract(color->red, 10) << 20 |
@@ -417,6 +452,13 @@ static u32 ilk_lut_10(const struct drm_color_lut *color)
drm_color_lut_extract(color->blue, 10);
}
+static void ilk_lut_10_pack(struct drm_color_lut *entry, u32 val)
+{
+ entry->red = intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_RED_MASK,
val), 10);
+ entry->green =
intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_GREEN_MASK, val), 10);
+ entry->blue =
intel_color_lut_pack(REG_FIELD_GET(PREC_PALETTE_BLUE_MASK, val), 10);
+}
+
static void i9xx_color_commit(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -983,6 +1025,13 @@ static u32 chv_cgm_degamma_udw(const struct drm_color_lut
*color)
return drm_color_lut_extract(color->red, 14);
}
+static void chv_cgm_gamma_pack(struct drm_color_lut *entry, u32 ldw, u32 udw)
+{
+ entry->green =
intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_GAMMA_GREEN_MASK, ldw), 10);
+ entry->blue =
intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_GAMMA_BLUE_MASK, ldw), 10);
+ entry->red =
intel_color_lut_pack(REG_FIELD_GET(CGM_PIPE_GAMMA_RED_MASK, udw), 10);
+}
+
static void chv_load_cgm_degamma(struct intel_crtc *crtc,
const struct drm_property_blob *blob)
{
@@ -1672,19 +1721,6 @@ bool intel_color_lut_equal(struct drm_property_blob
*blob1,
return true;
}
-/* convert hw value with given bit_precision to lut property val */
-static u32 intel_color_lut_pack(u32 val, int bit_precision)
-{
- u32 max = 0x >> (16 - bit_precision);
-
- val = clamp_val(val, 0, max);
-
- if (bit_precision < 16)
- val <<= 16 - bit_precision;
-
- return val;
-}
-
static struct drm_property_blob *
i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
{
@@ -1706,12 +1742,7 @@ i9xx_read_lut_8(const struct intel_crtc_state
*crtc_state)
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
u32 val = intel_de_read(dev_priv, PALETTE(pipe, i));
- lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
- LGC_PALETTE_RED_MASK,
val), 8);
- lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
-
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: HDCP: fix Ri prime and R0 checks during auth (rev2)
== Series Details == Series: drm/i915: HDCP: fix Ri prime and R0 checks during auth (rev2) URL : https://patchwork.freedesktop.org/series/74271/ State : success == Summary == CI Bug Log - changes from CI_DRM_8070_full -> Patchwork_16840_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_16840_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_isolation@rcs0-s3: - shard-skl: [PASS][1] -> [INCOMPLETE][2] ([i915#69]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl9/igt@gem_ctx_isolat...@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-skl8/igt@gem_ctx_isolat...@rcs0-s3.html * igt@gem_exec_schedule@implicit-read-write-bsd: - shard-iclb: [PASS][3] -> [SKIP][4] ([i915#677]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb7/igt@gem_exec_sched...@implicit-read-write-bsd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-iclb1/igt@gem_exec_sched...@implicit-read-write-bsd.html * igt@gem_exec_schedule@pi-common-bsd1: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276]) +13 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@gem_exec_sched...@pi-common-bsd1.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-iclb7/igt@gem_exec_sched...@pi-common-bsd1.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#112146]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb8/igt@gem_exec_sched...@wide-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-iclb1/igt@gem_exec_sched...@wide-bsd.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-apl: [PASS][9] -> [FAIL][10] ([i915#644]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl7/igt@gem_pp...@flink-and-close-vma-leak.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-apl4/igt@gem_pp...@flink-and-close-vma-leak.html - shard-kbl: [PASS][11] -> [FAIL][12] ([i915#644]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-kbl1/igt@gem_pp...@flink-and-close-vma-leak.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-kbl1/igt@gem_pp...@flink-and-close-vma-leak.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-kbl3/igt@i915_susp...@fence-restore-tiled2untiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-kbl4/igt@i915_susp...@fence-restore-tiled2untiled.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl2/igt@kms_fbcon_...@fbc-suspend.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-apl6/igt@kms_fbcon_...@fbc-suspend.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move: - shard-skl: [PASS][17] -> [FAIL][18] ([i915#49]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl10/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-skl9/igt@kms_frontbuffer_track...@psr-1p-primscrn-cur-indfb-move.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145] / [i915#265]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-skl7/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-skl9/igt@kms_plane_alpha_bl...@pipe-b-coverage-7efc.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-glk: [PASS][21] -> [FAIL][22] ([i915#899]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-glk8/igt@kms_plane_low...@pipe-a-tiling-x.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-glk9/igt@kms_plane_low...@pipe-a-tiling-x.html * igt@kms_psr2_su@page_flip: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109642] / [fdo#111068]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@kms_psr2_su@page_flip.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16840/shard-iclb5/igt@kms_psr2_su@page_flip.html * igt@kms_psr@psr2_cursor_plane_move: - shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109441]) +2 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
Re: [Intel-gfx] [PATCH v2 6/9] drm/i915: Clean up integer types in color code
On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
From: Ville Syrjälä
A variable called 'i' having an unsigned type is just looking for
trouble, and using a sized type generally makes no sense either.
Change all of them to just plain old int. And do the same for some
'lut_size' variables which generally provide the loop end codition
for 'i'.
Signed-off-by: Ville Syrjälä
Reviewed-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 43 ++
1 file changed, 19 insertions(+), 24 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index ab23b24e7be3..934f00817c5c 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -740,9 +740,8 @@ static void glk_load_degamma_lut(const struct
intel_crtc_state *crtc_state)
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
const struct drm_color_lut *lut = crtc_state->hw.degamma_lut->data;
- u32 i;
/*
* When setting the auto-increment bit, the hardware seems to
@@ -781,8 +780,7 @@ static void glk_load_degamma_lut_linear(const struct
intel_crtc_state *crtc_stat
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
- u32 i;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
/*
* When setting the auto-increment bit, the hardware seems to
@@ -867,7 +865,7 @@ icl_program_gamma_superfine_segment(const struct
intel_crtc_state *crtc_state)
const struct drm_color_lut *lut = blob->data;
struct intel_dsb *dsb = intel_dsb_get(crtc);
enum pipe pipe = crtc->pipe;
- u32 i;
+ int i;
/*
* Program Super Fine segment (let's call it seg1)...
@@ -900,7 +898,7 @@ icl_program_gamma_multi_segment(const struct
intel_crtc_state *crtc_state)
const struct drm_color_lut *entry;
struct intel_dsb *dsb = intel_dsb_get(crtc);
enum pipe pipe = crtc->pipe;
- u32 i;
+ int i;
/*
* Program Fine segment (let's call it seg2)...
@@ -1675,7 +1673,7 @@ bool intel_color_lut_equal(struct drm_property_blob
*blob1,
}
/* convert hw value with given bit_precision to lut property val */
-static u32 intel_color_lut_pack(u32 val, u32 bit_precision)
+static u32 intel_color_lut_pack(u32 val, int bit_precision)
{
u32 max = 0x >> (16 - bit_precision);
@@ -1695,7 +1693,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
+ int i;
blob = drm_property_create_blob(_priv->drm,
sizeof(struct drm_color_lut) *
LEGACY_LUT_LENGTH,
@@ -1706,7 +1704,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
- val = intel_de_read(dev_priv, PALETTE(pipe, i));
+ u32 val = intel_de_read(dev_priv, PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK,
val), 8);
@@ -1732,11 +1730,10 @@ i965_read_lut_10p6(const struct intel_crtc_state
*crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val1, val2;
blob = drm_property_create_blob(_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1747,8 +1744,8 @@ i965_read_lut_10p6(const struct intel_crtc_state
*crtc_state)
lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
- val1 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 0));
- val2 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 1));
+ u32 val1 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 0));
+ u32 val2 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 1));
lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_RED_MASK, val1);
@@ -1784,11 +1781,10 @@
Re: [Intel-gfx] [PATCH v2 5/9] drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/
On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
From: Ville Syrjälä
chv_read_cgm_lut() specifically reads the CGM _gamma_ LUT so
let's rename it to reflect that fact. This also mirrors
the other direction's chv_load_cgm_gamma().
At present, since all the readouts are only gamma luts so should we
rename all the readouts like chv_read_gamma_lut()?
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_color.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index f90f113355bc..ab23b24e7be3 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1780,7 +1780,7 @@ static void i965_read_luts(struct intel_crtc_state
*crtc_state)
}
static struct drm_property_blob *
-chv_read_cgm_lut(const struct intel_crtc_state *crtc_state)
+chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1816,7 +1816,7 @@ chv_read_cgm_lut(const struct intel_crtc_state
*crtc_state)
static void chv_read_luts(struct intel_crtc_state *crtc_state)
{
if (crtc_state->cgm_mode & CGM_PIPE_MODE_GAMMA)
- crtc_state->hw.gamma_lut = chv_read_cgm_lut(crtc_state);
+ crtc_state->hw.gamma_lut = chv_read_cgm_gamma(crtc_state);
else
i965_read_luts(crtc_state);
}
--
~Swati Sharma
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Re: [Intel-gfx] [PATCH] drm/i915: Do not poison i915_request.link on removal
Chris Wilson writes: > Do not poison the timeline link on the i915_request to allow both > forward/backward list traversal under RCU. > > [ 9759.139229] RIP: 0010:active_request+0x2a/0x90 [i915] > [ 9759.139240] Code: 41 56 41 55 41 54 55 48 89 fd 53 48 89 f3 48 83 c5 60 e8 > 49 de dc e0 48 8b 83 e8 01 00 00 48 39 c5 74 12 48 8d 90 20 fe ff ff <48> 8b > 80 50 fe ff ff a8 01 74 11 e8 66 20 dd e0 48 89 d8 5b 5d 41 > [ 9759.139251] RSP: 0018:c914ce80 EFLAGS: 00010012 > [ 9759.139260] RAX: dead0122 RBX: 17cac040 RCX: > 00022000 > [ 9759.139267] RDX: deacff42 RSI: 17cac040 RDI: > 51fee900 > [ 9759.139275] RBP: 51fee960 R08: 001a R09: > a04702e0 > [ 9759.139282] R10: 82187ea0 R11: 0002 R12: > 0004 > [ 9759.139289] R13: a04d5179 R14: 8887f994ae40 R15: > 57b9a068 > [ 9759.139296] FS: () GS:5ed8() > knlGS: > [ 9759.139304] CS: 0010 DS: ES: CR0: 80050033 > [ 9759.139311] CR2: 7fff5bdec000 CR3: 0008534fe001 CR4: > 001606e0 > [ 9759.139318] Call Trace: > [ 9759.139325] > [ 9759.139389] execlists_reset+0x14d/0x310 [i915] > [ 9759.139400] ? _raw_spin_unlock_irqrestore+0xf/0x30 > [ 9759.139445] ? fwtable_read32+0x90/0x230 [i915] > [ 9759.139499] execlists_submission_tasklet+0xf6/0x150 [i915] > [ 9759.139508] tasklet_action_common.isra.17+0x32/0xa0 > [ 9759.139516] __do_softirq+0x114/0x3dc > [ 9759.139525] ? handle_irq_event_percpu+0x59/0x70 > [ 9759.139533] irq_exit+0xa1/0xc0 > [ 9759.139540] do_IRQ+0x76/0x150 > [ 9759.139547] common_interrupt+0xf/0xf > [ 9759.139554] > > Signed-off-by: Chris Wilson > Cc: Mika Kuoppala Reviewed-by: Mika Kuoppala > --- > drivers/gpu/drm/i915/i915_request.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_request.c > b/drivers/gpu/drm/i915/i915_request.c > index 66efd16c4850..5de3989b6c4f 100644 > --- a/drivers/gpu/drm/i915/i915_request.c > +++ b/drivers/gpu/drm/i915/i915_request.c > @@ -290,7 +290,7 @@ bool i915_request_retire(struct i915_request *rq) > spin_unlock_irq(>lock); > > remove_from_client(rq); > - list_del_rcu(>link); > + __list_del_entry(>link); /* poison neither prev/next (RCU walks) */ > > intel_context_exit(rq->context); > intel_context_unpin(rq->context); > -- > 2.25.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH v2 4/9] drm/i915: s/blob_data/lut/
On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
From: Ville Syrjälä
We're talking about LUT contents here so let's call the thing
'lut' rather than 'blob_data'. This is the name the load_lut()
code used before already.
Signed-off-by: Ville Syrjälä
Reviewed-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 66 +++---
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index e3abaa1908a9..f90f113355bc 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1694,7 +1694,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(_priv->drm,
@@ -1703,16 +1703,16 @@ i9xx_read_lut_8(const struct intel_crtc_state
*crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
val = intel_de_read(dev_priv, PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK,
val), 8);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_GREEN_MASK, val), 8);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_BLUE_MASK,
val), 8);
}
@@ -1735,7 +1735,7 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val1, val2;
blob = drm_property_create_blob(_priv->drm,
@@ -1744,25 +1744,25 @@ i965_read_lut_10p6(const struct intel_crtc_state
*crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
val1 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 0));
val2 = intel_de_read(dev_priv, PALETTE(pipe, 2 * i + 1));
- blob_data[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
+ lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_RED_MASK, val1);
- blob_data[i].green = REG_FIELD_GET(PALETTE_GREEN_MASK, val2) <<
8 |
+ lut[i].green = REG_FIELD_GET(PALETTE_GREEN_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_GREEN_MASK, val1);
- blob_data[i].blue = REG_FIELD_GET(PALETTE_BLUE_MASK, val2) << 8
|
+ lut[i].blue = REG_FIELD_GET(PALETTE_BLUE_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_BLUE_MASK, val1);
}
- blob_data[i].red = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].red = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
intel_de_read(dev_priv,
PIPEGCMAX(pipe, 0)));
- blob_data[i].green = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].green = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
intel_de_read(dev_priv,
PIPEGCMAX(pipe, 1)));
- blob_data[i].blue = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].blue = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
intel_de_read(dev_priv,
PIPEGCMAX(pipe, 2)));
return blob;
@@ -1787,7 +1787,7 @@ chv_read_cgm_lut(const struct intel_crtc_state
*crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(_priv->drm,
@@ -1796,17 +1796,17 @@ chv_read_cgm_lut(const struct intel_crtc_state
*crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size; i++) {
val = intel_de_read(dev_priv, CGM_PIPE_GAMMA(pipe, i, 0));
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green =
Re: [Intel-gfx] [PATCH v4 2/2] drm/dp: Add function to parse EDID descriptors for adaptive sync limits
On 2020-03-05 8:42 p.m., Manasi Navare wrote:
Adaptive Sync is a VESA feature so add a DRM core helper to parse
the EDID's detailed descritors to obtain the adaptive sync monitor range.
Store this info as part fo drm_display_info so it can be used
across all drivers.
This part of the code is stripped out of amdgpu's function
amdgpu_dm_update_freesync_caps() to make it generic and be used
across all DRM drivers
v4:
* Use is_display_descriptor() (Ville)
* Name the monitor range flags (Ville)
v3:
* Remove the edid parsing restriction for just DP (Nicholas)
* Use drm_for_each_detailed_block (Ville)
* Make the drm_get_adaptive_sync_range function static (Harry, Jani)
v2:
* Change vmin and vmax to use u8 (Ville)
* Dont store pixel clock since that is just a max dotclock
and not related to VRR mode (Manasi)
Cc: Ville Syrjälä
Cc: Harry Wentland
Cc: Clinton A Taylor
Cc: Kazlauskas Nicholas
Signed-off-by: Manasi Navare
Looks good to me now. I'm fine with whether we want to rename the flags
or not, I don't have much of a preference either way.
Series is:
Reviewed-by: Nicholas Kazlauskas
Regards,
Nicholas Kazlauskas
---
drivers/gpu/drm/drm_edid.c | 44 +
include/drm/drm_connector.h | 22 +++
2 files changed, 66 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index ad41764a4ebe..61ed544d9535 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4938,6 +4938,47 @@ static void drm_parse_cea_ext(struct drm_connector
*connector,
}
}
+static
+void get_adaptive_sync_range(struct detailed_timing *timing,
+void *info_adaptive_sync)
+{
+ struct drm_adaptive_sync_info *adaptive_sync = info_adaptive_sync;
+ const struct detailed_non_pixel *data = >data.other_data;
+ const struct detailed_data_monitor_range *range = >data.range;
+
+ if (!is_display_descriptor((const u8 *)timing,
EDID_DETAIL_MONITOR_RANGE))
+ return;
+
+ /*
+* Check for flag range limits only. If flag == 1 then
+* no additional timing information provided.
+* Default GTF, GTF Secondary curve and CVT are not
+* supported
+*/
+ if (range->flags != EDID_RANGE_LIMITS_ONLY_FLAG)
+ return;
+
+ adaptive_sync->min_vfreq = range->min_vfreq;
+ adaptive_sync->max_vfreq = range->max_vfreq;
+}
+
+static
+void drm_get_adaptive_sync_range(struct drm_connector *connector,
+const struct edid *edid)
+{
+ struct drm_display_info *info = >display_info;
+
+ if (!version_greater(edid, 1, 1))
+ return;
+
+ drm_for_each_detailed_block((u8 *)edid, get_adaptive_sync_range,
+ >adaptive_sync);
+
+ DRM_DEBUG_KMS("Adaptive Sync refresh rate range is %d Hz - %d Hz\n",
+ info->adaptive_sync.min_vfreq,
+ info->adaptive_sync.max_vfreq);
+}
+
/* A connector has no EDID information, so we've got no EDID to compute
quirks from. Reset
* all of the values which would have been set from EDID
*/
@@ -4960,6 +5001,7 @@ drm_reset_display_info(struct drm_connector *connector)
memset(>hdmi, 0, sizeof(info->hdmi));
info->non_desktop = 0;
+ memset(>adaptive_sync, 0, sizeof(info->adaptive_sync));
}
u32 drm_add_display_info(struct drm_connector *connector, const struct edid *edid)
@@ -4975,6 +5017,8 @@ u32 drm_add_display_info(struct drm_connector *connector,
const struct edid *edi
info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
+ drm_get_adaptive_sync_range(connector, edid);
+
DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
if (edid->revision < 3)
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 0df7a95ca5d9..2b22c0fa42c4 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -254,6 +254,23 @@ enum drm_panel_orientation {
DRM_MODE_PANEL_ORIENTATION_RIGHT_UP,
};
+/**
+ * struct drm_adaptive_sync_info - Panel's Adaptive Sync capabilities for
+ * _display_info
+ *
+ * This struct is used to store a Panel's Adaptive Sync capabilities
+ * as parsed from EDID's detailed monitor range descriptor block.
+ *
+ * @min_vfreq: This is the min supported refresh rate in Hz from
+ * EDID's detailed monitor range.
+ * @max_vfreq: This is the max supported refresh rate in Hz from
+ * EDID's detailed monitor range
+ */
+struct drm_adaptive_sync_info {
+ u8 min_vfreq;
+ u8 max_vfreq;
+};
+
/*
* This is a consolidated colorimetry list supported by HDMI and
* DP protocol standard. The respective connectors will register
@@ -473,6 +490,11 @@ struct drm_display_info {
* @non_desktop: Non desktop display (HMD).
*/
bool non_desktop;
+
+ /**
+* @adaptive_sync: Adaptive Sync
Re: [Intel-gfx] [PATCH v2 3/9] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants
On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
From: Ville Syrjälä
To mirror the load_luts path let's clone an ilk+ version
from i9xx_read_lut_8(). I guess the extra branch isn't a huge
issue but feels better to make a clean split.
Signed-off-by: Ville Syrjälä
Reviewed-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 41 ++
1 file changed, 35 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index cf8ed4e2ae13..e3abaa1908a9 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1706,10 +1706,7 @@ i9xx_read_lut_8(const struct intel_crtc_state
*crtc_state)
blob_data = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
- if (HAS_GMCH(dev_priv))
- val = intel_de_read(dev_priv, PALETTE(pipe, i));
- else
- val = intel_de_read(dev_priv, LGC_PALETTE(pipe, i));
+ val = intel_de_read(dev_priv, PALETTE(pipe, i));
blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK,
val), 8);
@@ -1824,6 +1821,38 @@ static void chv_read_luts(struct intel_crtc_state
*crtc_state)
i965_read_luts(crtc_state);
}
+static struct drm_property_blob *
+ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ enum pipe pipe = crtc->pipe;
+ struct drm_property_blob *blob;
+ struct drm_color_lut *blob_data;
+ u32 i, val;
+
+ blob = drm_property_create_blob(_priv->drm,
+ sizeof(struct drm_color_lut) *
LEGACY_LUT_LENGTH,
+ NULL);
+ if (IS_ERR(blob))
+ return NULL;
+
+ blob_data = blob->data;
+
+ for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
+ val = intel_de_read(dev_priv, LGC_PALETTE(pipe, i));
+
+ blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ LGC_PALETTE_RED_MASK,
val), 8);
+ blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+
LGC_PALETTE_GREEN_MASK, val), 8);
+ blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+LGC_PALETTE_BLUE_MASK,
val), 8);
+ }
+
+ return blob;
+}
+
static struct drm_property_blob *
ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
{
@@ -1866,7 +1895,7 @@ static void ilk_read_luts(struct intel_crtc_state
*crtc_state)
return;
if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
- crtc_state->hw.gamma_lut = i9xx_read_lut_8(crtc_state);
+ crtc_state->hw.gamma_lut = ilk_read_lut_8(crtc_state);
else
crtc_state->hw.gamma_lut = ilk_read_lut_10(crtc_state);
}
@@ -1915,7 +1944,7 @@ static void glk_read_luts(struct intel_crtc_state
*crtc_state)
return;
if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
- crtc_state->hw.gamma_lut = i9xx_read_lut_8(crtc_state);
+ crtc_state->hw.gamma_lut = ilk_read_lut_8(crtc_state);
else
crtc_state->hw.gamma_lut = glk_read_lut_10(crtc_state,
PAL_PREC_INDEX_VALUE(0));
}
--
~Swati Sharma
___
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[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Return early for await_start on same timeline
== Series Details == Series: drm/i915: Return early for await_start on same timeline URL : https://patchwork.freedesktop.org/series/74338/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8070_full -> Patchwork_16839_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_16839_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_16839_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_16839_full: ### IGT changes ### Possible regressions * igt@i915_pm_rpm@gem-mmap-type@wb: - shard-iclb: [PASS][1] -> [INCOMPLETE][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb2/igt@i915_pm_rpm@gem-mmap-t...@wb.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-iclb2/igt@i915_pm_rpm@gem-mmap-t...@wb.html Known issues Here are the changes found in Patchwork_16839_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_balancer@smoke: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#110854]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb1/igt@gem_exec_balan...@smoke.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-iclb8/igt@gem_exec_balan...@smoke.html * igt@gem_exec_schedule@implicit-read-write-bsd1: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276] / [i915#677]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb4/igt@gem_exec_sched...@implicit-read-write-bsd1.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-iclb7/igt@gem_exec_sched...@implicit-read-write-bsd1.html * igt@gem_exec_schedule@independent-bsd2: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276]) +16 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb4/igt@gem_exec_sched...@independent-bsd2.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-iclb8/igt@gem_exec_sched...@independent-bsd2.html * igt@gem_exec_schedule@pi-common-bsd: - shard-iclb: [PASS][9] -> [SKIP][10] ([i915#677]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb8/igt@gem_exec_sched...@pi-common-bsd.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-iclb1/igt@gem_exec_sched...@pi-common-bsd.html * igt@gem_exec_schedule@wide-bsd: - shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#112146]) +5 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb8/igt@gem_exec_sched...@wide-bsd.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-iclb1/igt@gem_exec_sched...@wide-bsd.html * igt@gem_exec_whisper@basic-queues-forked-all: - shard-glk: [PASS][13] -> [DMESG-WARN][14] ([i915#118] / [i915#95]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-glk6/igt@gem_exec_whis...@basic-queues-forked-all.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-glk3/igt@gem_exec_whis...@basic-queues-forked-all.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-apl: [PASS][15] -> [FAIL][16] ([i915#644]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl7/igt@gem_pp...@flink-and-close-vma-leak.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-apl3/igt@gem_pp...@flink-and-close-vma-leak.html * igt@i915_pm_rps@min-max-config-loaded: - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#370]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-iclb1/igt@i915_pm_...@min-max-config-loaded.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-iclb6/igt@i915_pm_...@min-max-config-loaded.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#180]) +3 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-apl3/igt@i915_susp...@fence-restore-tiled2untiled.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-apl1/igt@i915_susp...@fence-restore-tiled2untiled.html * igt@i915_suspend@sysfs-reader: - shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8070/shard-kbl6/igt@i915_susp...@sysfs-reader.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_16839/shard-kbl7/igt@i915_susp...@sysfs-reader.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: -
Re: [Intel-gfx] [PATCH v2 2/9] drm/i915: Clean up i9xx_load_luts_internal()
On Fri, Mar 06, 2020 at 08:12:22PM +0530, Sharma, Swati2 wrote:
>
>
> On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
> > +static void i9xx_load_luts(const struct intel_crtc_state *crtc_state)
> > +{
> > + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > + const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut;
> > +
> > + assert_pll_enabled(dev_priv, crtc->pipe);
> Just a query:
> Why won't we have following condition here?
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
> assert_dsi_pll_enabled(dev_priv);
> or is it applicable only for i965_load_luts() and not for i9xx_load_luts()?
No DSI on these platforms. Only VLV/CHV can have it, and they use
i965_load_luts().
>
> > +
> > + i9xx_load_lut_8(crtc, gamma_lut);
> > +}
> > +
> The patch looks good to me.
>
> Reviewed-by: Swati Sharma
>
> --
> ~Swati Sharma
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 05/17] drm/i915: Wrap i915_active in a simple kreffed struct
Chris Wilson writes:
> For conveniences of callers that just want to use an i915_active to
> track a wide array of concurrent timelines, wrap the base i915_active
> struct inside a kref. This i915_active will self-destruct after use.
>
Found the user,
Reviewed-by: Mika Kuoppala
> Signed-off-by: Chris Wilson
> ---
> drivers/gpu/drm/i915/i915_active.c | 53 ++
> drivers/gpu/drm/i915/i915_active.h | 4 +++
> 2 files changed, 57 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_active.c
> b/drivers/gpu/drm/i915/i915_active.c
> index 7b3d6c12ad61..1826de14d2da 100644
> --- a/drivers/gpu/drm/i915/i915_active.c
> +++ b/drivers/gpu/drm/i915/i915_active.c
> @@ -881,6 +881,59 @@ void i915_active_noop(struct dma_fence *fence, struct
> dma_fence_cb *cb)
> active_fence_cb(fence, cb);
> }
>
> +struct auto_active {
> + struct i915_active base;
> + struct kref ref;
> +};
> +
> +struct i915_active *i915_active_get(struct i915_active *ref)
> +{
> + struct auto_active *aa = container_of(ref, typeof(*aa), base);
> +
> + kref_get(>ref);
> + return >base;
> +}
> +
> +static void auto_release(struct kref *ref)
> +{
> + struct auto_active *aa = container_of(ref, typeof(*aa), ref);
> +
> + i915_active_fini(>base);
> + kfree(aa);
> +}
> +
> +void i915_active_put(struct i915_active *ref)
> +{
> + struct auto_active *aa = container_of(ref, typeof(*aa), base);
> +
> + kref_put(>ref, auto_release);
> +}
> +
> +static int auto_active(struct i915_active *ref)
> +{
> + i915_active_get(ref);
> + return 0;
> +}
> +
> +static void auto_retire(struct i915_active *ref)
> +{
> + i915_active_put(ref);
> +}
> +
> +struct i915_active *i915_active_create(void)
> +{
> + struct auto_active *aa;
> +
> + aa = kmalloc(sizeof(*aa), GFP_KERNEL);
> + if (!aa)
> + return NULL;
> +
> + kref_init(>ref);
> + i915_active_init(>base, auto_active, auto_retire);
> +
> + return >base;
> +}
> +
> #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
> #include "selftests/i915_active.c"
> #endif
> diff --git a/drivers/gpu/drm/i915/i915_active.h
> b/drivers/gpu/drm/i915/i915_active.h
> index 973ff0447c6c..7e438501333e 100644
> --- a/drivers/gpu/drm/i915/i915_active.h
> +++ b/drivers/gpu/drm/i915/i915_active.h
> @@ -215,4 +215,8 @@ void i915_request_add_active_barriers(struct i915_request
> *rq);
> void i915_active_print(struct i915_active *ref, struct drm_printer *m);
> void i915_active_unlock_wait(struct i915_active *ref);
>
> +struct i915_active *i915_active_create(void);
> +struct i915_active *i915_active_get(struct i915_active *ref);
> +void i915_active_put(struct i915_active *ref);
> +
> #endif /* _I915_ACTIVE_H_ */
> --
> 2.25.1
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Re: [Intel-gfx] [PATCH v2 2/9] drm/i915: Clean up i9xx_load_luts_internal()
On 03-Mar-20 11:03 PM, Ville Syrjala wrote:
+static void i9xx_load_luts(const struct intel_crtc_state *crtc_state)
+{
+ struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+ struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+ const struct drm_property_blob *gamma_lut = crtc_state->hw.gamma_lut;
+
+ assert_pll_enabled(dev_priv, crtc->pipe);
Just a query:
Why won't we have following condition here?
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
assert_dsi_pll_enabled(dev_priv);
or is it applicable only for i965_load_luts() and not for i9xx_load_luts()?
+
+ i9xx_load_lut_8(crtc, gamma_lut);
+}
+
The patch looks good to me.
Reviewed-by: Swati Sharma
--
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[Intel-gfx] [PATCH i-g-t 2/2] gem_wsim: Mark contexts as non-persistent
From: Tvrtko Ursulin
We want to mark workload contexts as non-persistent if possible so that we
do not have to worry about leaving long (or infinite!) batches running
post exit.
Signed-off-by: Tvrtko Ursulin
---
benchmarks/gem_wsim.c | 50 ---
1 file changed, 42 insertions(+), 8 deletions(-)
diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index c196b25317ce..7cb8ea5b18ba 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -1431,16 +1431,48 @@ alloc_step_batch(struct workload *wrk, struct w_step
*w, unsigned int flags)
#endif
}
-static void __ctx_set_prio(uint32_t ctx_id, unsigned int prio)
+static bool has_persistence(int i915)
{
- struct drm_i915_gem_context_param param = {
- .ctx_id = ctx_id,
- .param = I915_CONTEXT_PARAM_PRIORITY,
- .value = prio,
+ struct drm_i915_gem_context_param p = {
+ .param = I915_CONTEXT_PARAM_PERSISTENCE,
};
+ uint64_t saved;
+
+ if (__gem_context_get_param(i915, ))
+ return false;
+
+ saved = p.value;
+ p.value = 0;
+ if (__gem_context_set_param(i915, ))
+ return false;
+
+ p.value = saved;
+ return __gem_context_set_param(i915, ) == 0;
+}
+
+static bool __has_persistence;
+
+static void __configure_context(uint32_t ctx_id, unsigned int prio)
+{
+ if (prio) {
+ struct drm_i915_gem_context_param param = {
+ .ctx_id = ctx_id,
+ .param = I915_CONTEXT_PARAM_PRIORITY,
+ .value = prio,
+ };
- if (prio)
gem_context_set_param(fd, );
+ }
+
+ /* Mark as non-persistent if supported. */
+ if (__has_persistence) {
+ struct drm_i915_gem_context_param param = {
+ .ctx_id = ctx_id,
+ .param = I915_CONTEXT_PARAM_PERSISTENCE,
+ };
+
+ gem_context_set_param(fd, );
+ }
}
static int __vm_destroy(int i915, uint32_t vm_id)
@@ -1743,7 +1775,7 @@ prepare_workload(unsigned int id, struct workload *wrk,
unsigned int flags)
ctx_vcs ^= 1;
}
- __ctx_set_prio(ctx_id, wrk->prio);
+ __configure_context(ctx_id, wrk->prio);
/*
* Do we need a separate context to satisfy this workloads which
@@ -1772,7 +1804,7 @@ prepare_workload(unsigned int id, struct workload *wrk,
unsigned int flags)
ctx_id = args.ctx_id;
wrk->ctx_list[i + 1].id = args.ctx_id;
- __ctx_set_prio(ctx_id, wrk->prio);
+ __configure_context(ctx_id, wrk->prio);
}
if (ctx->engine_map) {
@@ -3280,6 +3312,8 @@ int main(int argc, char **argv)
fd = __drm_open_driver(DRIVER_INTEL);
igt_require(fd);
+ __has_persistence = has_persistence(fd);
+
intel_register_access_init(_data, intel_get_pci_device(), false,
fd);
init_clocks();
--
2.20.1
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[Intel-gfx] [PATCH i-g-t 1/2] gem_wsim: Fix calibration for special VCS engine name
From: Tvrtko Ursulin
VCS is a special (non-physical) engine id/name which means load-balancing
in legacy workloads. As such when i915 balancing is not enabled it needs
to have a calibration as well.
Signed-off-by: Tvrtko Ursulin
---
benchmarks/gem_wsim.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/benchmarks/gem_wsim.c b/benchmarks/gem_wsim.c
index a1bbcef031bb..c196b25317ce 100644
--- a/benchmarks/gem_wsim.c
+++ b/benchmarks/gem_wsim.c
@@ -3353,6 +3353,8 @@ int main(int argc, char **argv)
engine_calib_map[eng] =
calib_val;
if (eng == RCS)
engine_calib_map[DEFAULT] = calib_val;
+ else if (eng == VCS1 || eng ==
VCS2)
+ engine_calib_map[VCS] =
calib_val;
has_nop_calibration = true;
}
} else {
--
2.20.1
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Re: [Intel-gfx] [PATCH 01/17] drm/i915/selftests: Apply a heavy handed flush to i915_active
Chris Wilson writes:
> Due to the ordering of cmpxchg()/dma_fence_signal() inside node_retire(),
> we must also use the xchg() as our primary memory barrier to flush the
> outstanding callbacks after expected completion of the i915_active.
>
> Signed-off-by: Chris Wilson
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/selftests/i915_active.c | 29 ++--
> 1 file changed, 21 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c
> b/drivers/gpu/drm/i915/selftests/i915_active.c
> index 3a37c67ab6c4..68bbb1580162 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_active.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_active.c
> @@ -311,20 +311,33 @@ static void spin_unlock_wait(spinlock_t *lock)
> spin_unlock_irq(lock);
> }
>
> +static void active_flush(struct i915_active *ref,
> + struct i915_active_fence *active)
> +{
> + struct dma_fence *fence;
> +
> + fence = xchg(__active_fence_slot(active), NULL);
> + if (!fence)
> + return;
> +
> + spin_lock_irq(fence->lock);
> + __list_del_entry(>cb.node);
> + spin_unlock_irq(fence->lock); /* serialise with fence->cb_list */
> + atomic_dec(>count);
> +
> + GEM_BUG_ON(!test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, >flags));
> +}
> +
> void i915_active_unlock_wait(struct i915_active *ref)
> {
> if (i915_active_acquire_if_busy(ref)) {
> struct active_node *it, *n;
>
> + /* Wait for all active callbacks */
> rcu_read_lock();
> - rbtree_postorder_for_each_entry_safe(it, n, >tree, node) {
> - struct dma_fence *f;
> -
> - /* Wait for all active callbacks */
> - f = rcu_dereference(it->base.fence);
> - if (f)
> - spin_unlock_wait(f->lock);
> - }
> + active_flush(ref, >excl);
> + rbtree_postorder_for_each_entry_safe(it, n, >tree, node)
> + active_flush(ref, >base);
> rcu_read_unlock();
>
> i915_active_release(ref);
> --
> 2.25.1
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