Re: [Intel-gfx] [PATCH v2] drm/i915/gvt: Prevent NULL pointer dereference in intel_vgpu_reg_rw_edid()
On 2020.09.08 20:11:21 +0200, Alejandro Sior wrote:
> In the function intel_vgpu_reg_rw_edid of kvmgt.c, pos can be equal
> to NULL for GPUs that do not properly support EDID. In those cases, when
> pos gets passed to the handle_edid functions, it gets added a short offset
> then it's dereferenced in memcpy's, leading to NULL pointer
> dereference kernel oops.
>
> More concretely, that kernel oops renders some Broadwell GPUs users
> unable to set up virtual machines with virtual GPU passthrough (virtual
> machines hang indefinitely when trying to make use of the virtual GPU),
> and make them unable to remove the virtual GPUs once the kernel oops has
> happened (it hangs indefinitely, and notably too when the kernel tries to
> shutdown). The issues that this causes and steps to reproduce are
> discussed in more details in this github issue post:
> https://github.com/intel/gvt-linux/issues/170#issuecomment-685806160
>
> Check if pos is equal to NULL, and if it is, set ret to a negative
> value, making the module simply indicate that the access to EDID region
> has failed, without any fatal repercussion.
>
> Signed-off-by: Alejandro Sior
>
> ---
> Changes in v2:
> - removed middle name of author to comply with git name
> - rephrased the patch description with imperative phrasing
> - removed useless paragraph
> - made a paragraph more concise
> - fixed typos
> - made individual lines shorter than 75 chars
>
> drivers/gpu/drm/i915/gvt/kvmgt.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/kvmgt.c
> b/drivers/gpu/drm/i915/gvt/kvmgt.c
> index ad8a9df49f29..49163363ba4a 100644
> --- a/drivers/gpu/drm/i915/gvt/kvmgt.c
> +++ b/drivers/gpu/drm/i915/gvt/kvmgt.c
> @@ -557,7 +557,9 @@ static size_t intel_vgpu_reg_rw_edid(struct intel_vgpu
> *vgpu, char *buf,
> (struct vfio_edid_region *)kvmgt_vdev(vgpu)->region[i].data;
> loff_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
>
> - if (pos < region->vfio_edid_regs.edid_offset) {
> + if (pos == NULL) {
> + ret = -EINVAL;
> + } else if (pos < region->vfio_edid_regs.edid_offset) {
> ret = handle_edid_regs(vgpu, region, buf, count, pos, iswrite);
> } else {
> pos -= EDID_BLOB_OFFSET;
Thanks for reporting this! Sorry that we failed to do sanity validation on older
platform when enabling vfio edid function for all platform.
Could you try below one to see if it fixes your problem? Instead of refusing
possible read of edid, this fixes port number for BDW.
From d5d9304b6bfdc31356fd2feb1ddbbf28073fe3d4 Mon Sep 17 00:00:00 2001
From: Zhenyu Wang
Date: Fri, 11 Sep 2020 13:50:20 +0800
Subject: [PATCH] drm/i915/gvt: Fix port number for BDW on EDID region setup
Current BDW virtual display port is initialized as PORT_B, so need
to use same port for VFIO EDID region, otherwise invalid EDID blob
pointer is assigned.
Fixes: 0178f4ce3c3b ("drm/i915/gvt: Enable vfio edid for all GVT supported
platform")
Signed-off-by: Zhenyu Wang
---
drivers/gpu/drm/i915/gvt/vgpu.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gvt/vgpu.c b/drivers/gpu/drm/i915/gvt/vgpu.c
index 8fa9b31a2484..f6d7e33c7099 100644
--- a/drivers/gpu/drm/i915/gvt/vgpu.c
+++ b/drivers/gpu/drm/i915/gvt/vgpu.c
@@ -368,6 +368,7 @@ void intel_gvt_destroy_idle_vgpu(struct intel_vgpu *vgpu)
static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt,
struct intel_vgpu_creation_params *param)
{
+ struct drm_i915_private *dev_priv = gvt->gt->i915;
struct intel_vgpu *vgpu;
int ret;
@@ -436,7 +437,10 @@ static struct intel_vgpu *__intel_gvt_create_vgpu(struct
intel_gvt *gvt,
if (ret)
goto out_clean_sched_policy;
- ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_D);
+ if (IS_BROADWELL(dev_priv))
+ ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_B);
+ else
+ ret = intel_gvt_hypervisor_set_edid(vgpu, PORT_D);
if (ret)
goto out_clean_sched_policy;
--
2.28.0
--
$gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
signature.asc
Description: PGP signature
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[Intel-gfx] dg1 flag for userspace to allocate contig resources
I've just been looking at the current DG1 uapi, and I can't see any flag to allow userspace to upfront say it was a contiguous vram BO. I think you'd really want this for scanout, since otherwise you'll have to migrate any non-contig to contig when it transitions to scanout, and cause an extra set of copies. Dave. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
On Thu, 2020-09-10 at 15:21 +0100, Robin Murphy wrote:
> On 2020-09-09 21:06, Joe Perches wrote:
> > fallthrough to a separate case/default label break; isn't very readable.
> >
> > Convert pseudo-keyword fallthrough; statements to a simple break; when
> > the next label is case or default and the only statement in the next
> > label block is break;
> >
> > Found using:
> >
> > $ grep-2.5.4 -rP --include=*.[ch] -n
> > "fallthrough;(\s*(case\s+\w+|default)\s*:\s*){1,7}break;" *
> >
> > Miscellanea:
> >
> > o Move or coalesce a couple label blocks above a default: block.
> >
> > Signed-off-by: Joe Perches
> > ---
> >
> > Compiled allyesconfig x86-64 only.
> > A few files for other arches were not compiled.
> >
>
> [...]
> > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > index c192544e874b..743db1abec40 100644
> > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> > @@ -3777,7 +3777,7 @@ static int arm_smmu_device_hw_probe(struct
> > arm_smmu_device *smmu)
> > switch (FIELD_GET(IDR0_TTF, reg)) {
> > case IDR0_TTF_AARCH32_64:
> > smmu->ias = 40;
> > - fallthrough;
> > + break;
> > case IDR0_TTF_AARCH64:
> > break;
> > default:
>
> I have to say I don't really agree with the readability argument for
> this one - a fallthrough is semantically correct here, since the first
> case is a superset of the second. It just happens that anything we would
> do for the common subset is implicitly assumed (there are other
> potential cases we simply haven't added support for at the moment), thus
> the second case is currently empty.
> This change actively obfuscates that distinction.
Then perhaps comments should be added to usefully
describe the mechanisms.
case IDR0_TTF_AARCH32_64:
smmu->ias = 40;
fallthrough;/* and still do the 64 bit processing */
case IDR0_TTF_AARCH64:
/* Nothing specific yet */
break;
> Robin.
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[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pll: Centralize PLL_ENABLE register lookup (rev4)
== Series Details == Series: drm/i915/pll: Centralize PLL_ENABLE register lookup (rev4) URL : https://patchwork.freedesktop.org/series/81150/ State : success == Summary == CI Bug Log - changes from CI_DRM_8996_full -> Patchwork_18479_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18479_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@legacy-engines-mixed-process@bsd1: - shard-kbl: [PASS][1] -> [FAIL][2] ([i915#2374]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-kbl7/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@bsd1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-kbl1/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@bsd1.html * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-apl: [PASS][3] -> [FAIL][4] ([i915#1635] / [i915#2389]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-apl7/igt@gem_exec_reloc@basic-many-act...@rcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-apl8/igt@gem_exec_reloc@basic-many-act...@rcs0.html * igt@gem_partial_pwrite_pread@writes-after-reads-display: - shard-apl: [PASS][5] -> [FAIL][6] ([i915#1635]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-apl3/igt@gem_partial_pwrite_pr...@writes-after-reads-display.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-apl4/igt@gem_partial_pwrite_pr...@writes-after-reads-display.html * igt@gem_userptr_blits@sync-unmap-cycles: - shard-skl: [PASS][7] -> [TIMEOUT][8] ([i915#1958] / [i915#2424]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-skl10/igt@gem_userptr_bl...@sync-unmap-cycles.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-skl4/igt@gem_userptr_bl...@sync-unmap-cycles.html * igt@gen9_exec_parse@allowed-all: - shard-skl: [PASS][9] -> [DMESG-WARN][10] ([i915#1436] / [i915#716]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-skl8/igt@gen9_exec_pa...@allowed-all.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-skl7/igt@gen9_exec_pa...@allowed-all.html * igt@i915_pm_dc@dc5-psr: - shard-tglb: [PASS][11] -> [DMESG-WARN][12] ([i915#2411]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-tglb1/igt@i915_pm...@dc5-psr.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-tglb8/igt@i915_pm...@dc5-psr.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#2346]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-skl4/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-skl1/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions-varying-size.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-dp1: - shard-apl: [PASS][15] -> [FAIL][16] ([i915#1635] / [i915#79]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-apl7/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-dp1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-apl8/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-dp1.html * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1: - shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#180]) +3 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-kbl6/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-kbl4/igt@kms_flip@flip-vs-suspend-interrupti...@a-dp1.html * igt@kms_flip@flip-vs-suspend-interruptible@c-edp1: - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([i915#198]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-skl1/igt@kms_flip@flip-vs-suspend-interrupti...@c-edp1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-skl7/igt@kms_flip@flip-vs-suspend-interrupti...@c-edp1.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff: - shard-tglb: [PASS][21] -> [DMESG-WARN][22] ([i915#1982]) +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/shard-tglb8/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-onoff.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/shard-tglb2/igt@kms_frontbuffer_track...@fbc-1p-primscrn-spr-indfb-onoff.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-render: - shard-iclb: [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) [23]:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pll: Centralize PLL_ENABLE register lookup (rev4)
== Series Details ==
Series: drm/i915/pll: Centralize PLL_ENABLE register lookup (rev4)
URL : https://patchwork.freedesktop.org/series/81150/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8996 -> Patchwork_18479
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/index.html
Known issues
Here are the changes found in Patchwork_18479 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_flink_basic@basic:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-tgl-y/igt@gem_flink_ba...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-tgl-y/igt@gem_flink_ba...@basic.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-bsw-kefka/igt@i915_pm_...@basic-pci-d3-state.html
* igt@i915_selftest@live@gem_contexts:
- fi-tgl-u2: [PASS][5] -> [INCOMPLETE][6] ([i915#2045])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-kbl-r: [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-kbl-r/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-kbl-r/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- fi-icl-u2: [PASS][9] -> [DMESG-WARN][10] ([i915#1982])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
Possible fixes
* igt@gem_flink_basic@double-flink:
- fi-tgl-y: [DMESG-WARN][11] ([i915#402]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-tgl-y/igt@gem_flink_ba...@double-flink.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-tgl-y/igt@gem_flink_ba...@double-flink.html
* igt@i915_module_load@reload:
- {fi-tgl-dsi}: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14] +1
similar issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-tgl-dsi/igt@i915_module_l...@reload.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-tgl-dsi/igt@i915_module_l...@reload.html
- fi-bxt-dsi: [DMESG-WARN][15] ([i915#1635] / [i915#1982]) ->
[PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-bxt-dsi/igt@i915_module_l...@reload.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-bxt-dsi/igt@i915_module_l...@reload.html
* igt@kms_busy@basic@flip:
- fi-tgl-y: [DMESG-WARN][17] ([i915#1982]) -> [PASS][18] +1
similar issue
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-tgl-y/igt@kms_busy@ba...@flip.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-tgl-y/igt@kms_busy@ba...@flip.html
* igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1:
- fi-icl-u2: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html
Warnings
* igt@gem_exec_suspend@basic-s0:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92]) ->
[DMESG-WARN][22] ([i915#1982] / [i915#62] / [i915#92])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][23] ([i915#62]) -> [DMESG-FAIL][24]
([i915#62] / [i915#95])
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8996/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18479/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- fi-kbl-x1275: [DMESG-WARN][25] ([i915#62] / [i915#92]) ->
[DMESG-WARN][26] ([i915#62] / [i915#92] /
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Remove the old global state stuff (rev2)
== Series Details == Series: drm/i915: Remove the old global state stuff (rev2) URL : https://patchwork.freedesktop.org/series/81265/ State : success == Summary == CI Bug Log - changes from CI_DRM_8995_full -> Patchwork_18478_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18478_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@legacy-engines-mixed-process@render: - shard-glk: [PASS][1] -> [FAIL][2] ([i915#2374]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk5/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@render.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-glk4/igt@gem_ctx_persistence@legacy-engines-mixed-proc...@render.html * igt@gem_exec_whisper@basic-queues-priority: - shard-glk: [PASS][3] -> [DMESG-WARN][4] ([i915#118] / [i915#95]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk2/igt@gem_exec_whis...@basic-queues-priority.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-glk3/igt@gem_exec_whis...@basic-queues-priority.html * igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size: - shard-tglb: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-tglb5/igt@kms_cursor_leg...@basic-flip-before-cursor-varying-size.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-tglb5/igt@kms_cursor_leg...@basic-flip-before-cursor-varying-size.html * igt@kms_cursor_legacy@flip-vs-cursor-legacy: - shard-skl: [PASS][7] -> [FAIL][8] ([i915#2346]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl8/igt@kms_cursor_leg...@flip-vs-cursor-legacy.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-skl3/igt@kms_cursor_leg...@flip-vs-cursor-legacy.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions: - shard-apl: [PASS][9] -> [DMESG-WARN][10] ([i915#1635] / [i915#1982]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-apl2/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-apl3/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html - shard-glk: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk5/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-glk4/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html * igt@kms_draw_crc@draw-method-xrgb-render-ytiled: - shard-skl: [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl2/igt@kms_draw_...@draw-method-xrgb-render-ytiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-skl10/igt@kms_draw_...@draw-method-xrgb-render-ytiled.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1: - shard-glk: [PASS][15] -> [FAIL][16] ([i915#2122]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interrupti...@a-hdmi-a1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-glk1/igt@kms_flip@flip-vs-expired-vblank-interrupti...@a-hdmi-a1.html * igt@kms_flip@flip-vs-suspend-interruptible@b-vga1: - shard-snb: [PASS][17] -> [DMESG-WARN][18] ([i915#42]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-snb6/igt@kms_flip@flip-vs-suspend-interrupti...@b-vga1.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-snb6/igt@kms_flip@flip-vs-suspend-interrupti...@b-vga1.html * igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1: - shard-skl: [PASS][19] -> [FAIL][20] ([i915#2122]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl8/igt@kms_flip@plain-flip-fb-recreate-interrupti...@c-edp1.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interrupti...@c-edp1.html * igt@kms_flip_tiling@flip-to-x-tiled: - shard-skl: [PASS][21] -> [FAIL][22] ([i915#167]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl8/igt@kms_flip_til...@flip-to-x-tiled.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/shard-skl3/igt@kms_flip_til...@flip-to-x-tiled.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt: - shard-iclb: [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) [23]:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/pll: Centralize PLL_ENABLE register lookup (rev4)
== Series Details ==
Series: drm/i915/pll: Centralize PLL_ENABLE register lookup (rev4)
URL : https://patchwork.freedesktop.org/series/81150/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
dac234339c17 drm/i915/pll: Centralize PLL_ENABLE register lookup
-:38: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#38: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:154:
+{
+
-:39: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around
'pll->info->id == DPLL_ID_EHL_DPLL4'
#39: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:155:
+ if (IS_ELKHARTLAKE(i915) && (pll->info->id == DPLL_ID_EHL_DPLL4))
-:44: CHECK:LINE_SPACING: Please don't use multiple blank lines
#44: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:160:
+
+
-:45: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#45: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:161:
+
+}
total: 0 errors, 0 warnings, 4 checks, 66 lines checked
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[Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE register lookup
We currenty check for platform at multiple parts in the driver
to grab the correct PLL. Let us begin to centralize it through a
helper function.
v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
v3: Clean up combo_pll_disable() (Rodrigo)
v4: s/dev_priv/i915 (Jani)
Move static and return type to the same line( Ville, Jxani)
Suggested-by: Matt Roper
Cc: Ville Syrjälä
Cc: Matt Roper
Signed-off-by: Anusha Srivatsa
Reviewed-by: Rodrigo Vivi
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 35 ++-
1 file changed, 18 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index c9013f8f766f..e08684e34078 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -147,6 +147,18 @@ void assert_shared_dpll(struct drm_i915_private *dev_priv,
pll->info->name, onoff(state), onoff(cur_state));
}
+static i915_reg_t
+intel_combo_pll_enable_reg(struct drm_i915_private *i915,
+ struct intel_shared_dpll *pll)
+{
+
+ if (IS_ELKHARTLAKE(i915) && (pll->info->id == DPLL_ID_EHL_DPLL4))
+ return MG_PLL_ENABLE(0);
+
+ return CNL_DPLL_ENABLE(pll->info->id);
+
+
+}
/**
* intel_prepare_shared_dpll - call a dpll's prepare hook
* @crtc_state: CRTC, and its state, which has a shared dpll
@@ -3842,12 +3854,7 @@ static bool combo_pll_get_hw_state(struct
drm_i915_private *dev_priv,
struct intel_shared_dpll *pll,
struct intel_dpll_hw_state *hw_state)
{
- i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id);
-
- if (IS_ELKHARTLAKE(dev_priv) &&
- pll->info->id == DPLL_ID_EHL_DPLL4) {
- enable_reg = MG_PLL_ENABLE(0);
- }
+ i915_reg_t enable_reg = intel_combo_pll_enable_reg(dev_priv, pll);
return icl_pll_get_hw_state(dev_priv, pll, hw_state, enable_reg);
}
@@ -4045,11 +4052,10 @@ static void icl_pll_enable(struct drm_i915_private
*dev_priv,
static void combo_pll_enable(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll)
{
- i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id);
+ i915_reg_t enable_reg = intel_combo_pll_enable_reg(dev_priv, pll);
if (IS_ELKHARTLAKE(dev_priv) &&
pll->info->id == DPLL_ID_EHL_DPLL4) {
- enable_reg = MG_PLL_ENABLE(0);
/*
* We need to disable DC states when this DPLL is enabled.
@@ -4157,19 +4163,14 @@ static void icl_pll_disable(struct drm_i915_private
*dev_priv,
static void combo_pll_disable(struct drm_i915_private *dev_priv,
struct intel_shared_dpll *pll)
{
- i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id);
+ i915_reg_t enable_reg = intel_combo_pll_enable_reg(dev_priv, pll);
- if (IS_ELKHARTLAKE(dev_priv) &&
- pll->info->id == DPLL_ID_EHL_DPLL4) {
- enable_reg = MG_PLL_ENABLE(0);
- icl_pll_disable(dev_priv, pll, enable_reg);
+ icl_pll_disable(dev_priv, pll, enable_reg);
+ if (IS_ELKHARTLAKE(dev_priv) &&
+ pll->info->id == DPLL_ID_EHL_DPLL4)
intel_display_power_put(dev_priv, POWER_DOMAIN_DPLL_DC_OFF,
pll->wakeref);
- return;
- }
-
- icl_pll_disable(dev_priv, pll, enable_reg);
}
static void tbt_pll_disable(struct drm_i915_private *dev_priv,
--
2.25.0
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Remove the old global state stuff (rev2)
== Series Details ==
Series: drm/i915: Remove the old global state stuff (rev2)
URL : https://patchwork.freedesktop.org/series/81265/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8995 -> Patchwork_18478
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/index.html
Known issues
Here are the changes found in Patchwork_18478 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_flink_basic@flink-lifetime:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +1 similar
issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@gem_flink_ba...@flink-lifetime.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-tgl-y/igt@gem_flink_ba...@flink-lifetime.html
* igt@i915_selftest@live@execlists:
- fi-icl-y: [PASS][3] -> [INCOMPLETE][4] ([i915#2276])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-y/igt@i915_selftest@l...@execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-icl-y/igt@i915_selftest@l...@execlists.html
* igt@i915_selftest@live@objects:
- fi-apl-guc: [PASS][5] -> [INCOMPLETE][6] ([i915#1635] /
[i915#337])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-apl-guc/igt@i915_selftest@l...@objects.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-apl-guc/igt@i915_selftest@l...@objects.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1:
- fi-icl-u2: [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-a:
- fi-tgl-y: [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) +1
similar issue
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-a.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-tgl-y/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-a.html
Possible fixes
* igt@debugfs_test@read_all_entries:
- {fi-kbl-7560u}: [INCOMPLETE][11] ([i915#2417]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
* igt@gem_flink_basic@bad-flink:
- fi-tgl-y: [DMESG-WARN][13] ([i915#402]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html
* igt@i915_module_load@reload:
- fi-bxt-dsi: [DMESG-WARN][15] ([i915#1635] / [i915#1982]) ->
[PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bxt-dsi/igt@i915_module_l...@reload.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-bxt-dsi/igt@i915_module_l...@reload.html
* igt@kms_busy@basic@flip:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20] +1
similar issue
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-bsw-kefka: [DMESG-WARN][21] ([i915#1982]) -> [PASS][22] +1
similar issue
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
- fi-skl-guc: [DMESG-WARN][23] ([i915#2203]) -> [PASS][24]
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18478/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
* igt@kms_force_connector_basic@force-connector-state:
-
Re: [Intel-gfx] [PATCH] drm/i915: Fix an error code i915_gem_object_copy_blt()
Dan Carpenter writes:
> This code should use "vma[1]" instead of "vma". The "vma" is a variable
> is a valid pointer.
Not quite getting the last sentence with my non native english parser.
"vma" is array would make sense.
>
> Fixes: 6b05030496f7 ("drm/i915: Convert i915_gem_object/client_blt.c to use
> ww locking as well, v2.")
> Signed-off-by: Dan Carpenter
Reviewed-by: Mika Kuoppala
> ---
> drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> index d93eb36160c9..aee7ad3cc3c6 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> @@ -364,7 +364,7 @@ int i915_gem_object_copy_blt(struct drm_i915_gem_object
> *src,
>
> vma[1] = i915_vma_instance(dst, vm, NULL);
> if (IS_ERR(vma[1]))
> - return PTR_ERR(vma);
> + return PTR_ERR(vma[1]);
>
> i915_gem_ww_ctx_init(, true);
> intel_engine_pm_get(ce->engine);
> --
> 2.28.0
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Re: [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock()
On Thu, 2020-09-10 at 16:55 +0300, Ville Syrjälä wrote:
> On Tue, Sep 08, 2020 at 02:08:17PM -0400, Lyude Paul wrote:
> > On Fri, 2020-09-04 at 14:53 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Add helpers to get the TMDS clock limits for HDMI/DVI downstream
> > > facing ports.
> > >
> > > Signed-off-by: Ville Syrjälä
> > > ---
> > > drivers/gpu/drm/drm_dp_helper.c | 116
> > > include/drm/drm_dp_helper.h | 6 ++
> > > 2 files changed, 122 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > > b/drivers/gpu/drm/drm_dp_helper.c
> > > index 822a30e609ef..f567428f2aef 100644
> > > --- a/drivers/gpu/drm/drm_dp_helper.c
> > > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > > @@ -643,6 +643,114 @@ int drm_dp_downstream_max_dotclock(const u8
> > > dpcd[DP_RECEIVER_CAP_SIZE],
> > > }
> > > EXPORT_SYMBOL(drm_dp_downstream_max_dotclock);
> > >
> > > +/**
> > > + * drm_dp_downstream_max_tmds_clock() - extract downstream facing port
> > > max
> > > TMDS clock
> > > + * @dpcd: DisplayPort configuration data
> > > + * @port_cap: port capabilities
> > > + * @edid: EDID
> > > + *
> > > + * Returns HDMI/DVI downstream facing port max TMDS clock in kHz on
> > > success,
> > > + * or 0 if max TMDS clock not defined
> > > + */
> > > +int drm_dp_downstream_max_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
> > > + const u8 port_cap[4],
> > > + const struct edid *edid)
> > > +{
> > > + if (!drm_dp_is_branch(dpcd))
> > > + return 0;
> > > +
> > > + if (dpcd[DP_DPCD_REV] < 0x11) {
> > > + switch (dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > > DP_DWN_STRM_PORT_TYPE_MASK) {
> > > + case DP_DWN_STRM_PORT_TYPE_TMDS:
> > > + return 165000;
> > > + default:
> > > + return 0;
> > > + }
> > > + }
> > > +
> > > + switch (port_cap[0] & DP_DS_PORT_TYPE_MASK) {
> > > + case DP_DS_PORT_TYPE_DP_DUALMODE:
> > > + if (is_edid_digital_input_dp(edid))
> > > + return 0;
> > > + /*
> > > + * It's left up to the driver to check the
> > > + * DP dual mode adapter's max TMDS clock.
> > > + *
> > > + * Unfortunatley it looks like branch devices
> > > + * may not fordward that the DP dual mode i2c
> > > + * access so we just usually get i2c nak :(
> > > + */
> > > + fallthrough;
> > > + case DP_DS_PORT_TYPE_HDMI:
> > > + /*
> > > + * We should perhaps assume 165 MHz when detailed cap
> > > + * info is not available. But looks like many typical
> > > + * branch devices fall into that category and so we'd
> > > + * probably end up with users complaining that they can't
> > > + * get high resolution modes with their favorite dongle.
> > > + *
> > > + * So let's limit to 300 MHz instead since DPCD 1.4
> > > + * HDMI 2.0 DFPs are required to have the detailed cap
> > > + * info. So it's more likely we're dealing with a HDMI 1.4
> > > + * compatible* device here.
> >
> > Forgot to mention - not directly related to this series, there's some hidden
> > i2c bits that I think can also be probed for this sort of information on
> > passive adapters, I know amdgpu actually supports this. I wonder how many of
> > them also apply to older active adapters...
>
> Something other than the normal DP dual mode stuff?
Actually that -may- have been what I was thinking of but I'm not sure, I'd
probably need to look through DAL to find out
>
--
Sincerely,
Lyude Paul (she/her)
Software Engineer at Red Hat
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Re: [Intel-gfx] [PATCH v2 07/18] drm/dp: Pimp drm_dp_downstream_max_bpc()
On Thu, 2020-09-10 at 17:46 +0300, Ville Syrjälä wrote:
> On Tue, Sep 08, 2020 at 01:51:56PM -0400, Lyude Paul wrote:
> > On Fri, 2020-09-04 at 14:53 +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä
> > >
> > > Deal with more cases in drm_dp_downstream_max_bpc():
> > > - DPCD 1.0 -> assume 8bpc for non-DP
> > > - DPCD 1.1+ DP (or DP++ with DP sink) -> allow anything
> > > - DPCD 1.1+ TMDS -> check the caps, assume 8bpc if the value is crap
> > > - anything else -> assume 8bpc
> > >
> > > Signed-off-by: Ville Syrjälä
> > > ---
> > > drivers/gpu/drm/drm_dp_helper.c | 69 +++
> > > .../drm/i915/display/intel_display_debugfs.c | 3 +-
> > > drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> > > include/drm/drm_dp_helper.h | 10 ++-
> > > 4 files changed, 51 insertions(+), 33 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > > b/drivers/gpu/drm/drm_dp_helper.c
> > > index 0fcb94f7dbe5..ab87209c25d8 100644
> > > --- a/drivers/gpu/drm/drm_dp_helper.c
> > > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > > @@ -653,36 +653,44 @@ int drm_dp_downstream_max_clock(const u8
> > > dpcd[DP_RECEIVER_CAP_SIZE],
> > > EXPORT_SYMBOL(drm_dp_downstream_max_clock);
> > >
> > > /**
> > > - * drm_dp_downstream_max_bpc() - extract branch device max
> > > - * bits per component
> > > - * @dpcd: DisplayPort configuration data
> > > - * @port_cap: port capabilities
> > > - *
> > > - * See also:
> > > - * drm_dp_read_downstream_info()
> > > - * drm_dp_downstream_max_clock()
> > > - *
> > > - * Returns: Max bpc on success or 0 if max bpc not defined
> > > - */
> > > + * drm_dp_downstream_max_bpc() - extract downstream facing port max
> > > + * bits per component
> > > + * @dpcd: DisplayPort configuration data
> > > + * @port_cap: downstream facing port capabilities
> > > + * @edid: EDID
> > > + *
> > > + * Returns max bpc on success or 0 if max bpc not defined
> > > + */
> > > int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
> > > - const u8 port_cap[4])
> > > + const u8 port_cap[4],
> > > + const struct edid *edid)
> > > {
> > > - int type = port_cap[0] & DP_DS_PORT_TYPE_MASK;
> > > - bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > > - DP_DETAILED_CAP_INFO_AVAILABLE;
> > > - int bpc;
> > > -
> > > - if (!detailed_cap_info)
> >
> > I don't think we can drop this check. There's a somewhat surprising blurb
> > about downstream port caps in the DP 2.0 spec (section 5.3.3.1):
> >
> >In addition, the adapter shall set the Detailed Capabilities Info
> > registers
> >(DPCD Addresses 00080h through 0008Fh) to show all the downstream types,
> >including DFP 0. Either one or four bytes are used, per DFP type
> >indication. Therefore, up to 16 (with 1-byte descriptor) or four (with 4-
> >byte descriptor) DFP capabilities can be stored.
> >
> > I've never once actually seen a sink do this, but this does mean it's
> > technically possible tthat if we don't check the detailed caps bit then we
> > might end up reading another port's DFP type instead of max_bpc info. Note
> > though that we can make the assumption the four byte version of the field is
> > used for DP 1.4+
>
> The check is now ...
>
>
> > > + if (!drm_dp_is_branch(dpcd))
> > > return 0;
> > >
> > > - switch (type) {
> > > - case DP_DS_PORT_TYPE_VGA:
> > > - case DP_DS_PORT_TYPE_DVI:
> > > - case DP_DS_PORT_TYPE_HDMI:
> > > + if (dpcd[DP_DPCD_REV] < 0x11) {
> > > + switch (dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > > DP_DWN_STRM_PORT_TYPE_MASK) {
> > > + case DP_DWN_STRM_PORT_TYPE_DP:
> > > + return 0;
> > > + default:
> > > + return 8;
> > > + }
> > > + }
> > > +
> > > + switch (port_cap[0] & DP_DS_PORT_TYPE_MASK) {
> > > + case DP_DS_PORT_TYPE_DP:
> > > + return 0;
> > > case DP_DS_PORT_TYPE_DP_DUALMODE:
> > > - bpc = port_cap[2] & DP_DS_MAX_BPC_MASK;
> > > + if (is_edid_digital_input_dp(edid))
> > > + return 0;
> > > + fallthrough;
> > > + case DP_DS_PORT_TYPE_HDMI:
> > > + case DP_DS_PORT_TYPE_DVI:
> > > + case DP_DS_PORT_TYPE_VGA:
> > > + if ((dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > > DP_DETAILED_CAP_INFO_AVAILABLE) == 0)
> > > + return 8;
>
> ... here
Ah-missed that! R-b'd by me then :)
>
>
> > >
> > > - switch (bpc) {
> > > + switch (port_cap[2] & DP_DS_MAX_BPC_MASK) {
> > > case DP_DS_8BPC:
> > > return 8;
> > > case DP_DS_10BPC:
> > > @@ -691,10 +699,12 @@ int drm_dp_downstream_max_bpc(const u8
> > > dpcd[DP_RECEIVER_CAP_SIZE],
> > > return 12;
> > > case DP_DS_16BPC:
> > > return 16;
> > > + default:
> > > +
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Reduce INTEL_DISPLAY_ENABLED to just removing the outputs (rev3)
== Series Details == Series: series starting with [1/2] drm/i915: Reduce INTEL_DISPLAY_ENABLED to just removing the outputs (rev3) URL : https://patchwork.freedesktop.org/series/81507/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8995_full -> Patchwork_18476_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_18476_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18476_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_18476_full: ### IGT changes ### Possible regressions * igt@i915_selftest@live@hangcheck: - shard-skl: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-skl5/igt@i915_selftest@l...@hangcheck.html Known issues Here are the changes found in Patchwork_18476_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_gttfill@all: - shard-tglb: [PASS][2] -> [INCOMPLETE][3] ([i915#2045]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-tglb7/igt@gem_exec_gttf...@all.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-tglb3/igt@gem_exec_gttf...@all.html * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-glk: [PASS][4] -> [FAIL][5] ([i915#2389]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk7/igt@gem_exec_reloc@basic-many-act...@rcs0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-glk8/igt@gem_exec_reloc@basic-many-act...@rcs0.html * igt@gem_exec_whisper@basic-contexts: - shard-glk: [PASS][6] -> [DMESG-WARN][7] ([i915#118] / [i915#95]) +1 similar issue [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk5/igt@gem_exec_whis...@basic-contexts.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-glk7/igt@gem_exec_whis...@basic-contexts.html * igt@i915_selftest@mock@contexts: - shard-skl: [PASS][8] -> [INCOMPLETE][9] ([i915#198] / [i915#2278]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl2/igt@i915_selftest@m...@contexts.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-skl7/igt@i915_selftest@m...@contexts.html - shard-apl: [PASS][10] -> [INCOMPLETE][11] ([i915#1635] / [i915#2278]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-apl2/igt@i915_selftest@m...@contexts.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-apl6/igt@i915_selftest@m...@contexts.html * igt@kms_big_fb@x-tiled-8bpp-rotate-180: - shard-apl: [PASS][12] -> [DMESG-WARN][13] ([i915#1635] / [i915#1982]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-apl1/igt@kms_big...@x-tiled-8bpp-rotate-180.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-apl1/igt@kms_big...@x-tiled-8bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-270: - shard-skl: [PASS][14] -> [DMESG-WARN][15] ([i915#1982]) +4 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl5/igt@kms_big...@yf-tiled-32bpp-rotate-270.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-skl3/igt@kms_big...@yf-tiled-32bpp-rotate-270.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-skl: [PASS][16] -> [INCOMPLETE][17] ([i915#300]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl2/igt@kms_cursor_...@pipe-c-cursor-suspend.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-skl6/igt@kms_cursor_...@pipe-c-cursor-suspend.html * igt@kms_flip@plain-flip-ts-check@a-edp1: - shard-skl: [PASS][18] -> [FAIL][19] ([i915#2122]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl9/igt@kms_flip@plain-flip-ts-ch...@a-edp1.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-skl2/igt@kms_flip@plain-flip-ts-ch...@a-edp1.html * igt@kms_hdr@bpc-switch-suspend: - shard-kbl: [PASS][20] -> [FAIL][21] ([i915#1188]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-kbl6/igt@kms_...@bpc-switch-suspend.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/shard-kbl7/igt@kms_...@bpc-switch-suspend.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-kbl: [PASS][22] -> [DMESG-WARN][23] ([i915#180]) +2 similar issues [22]:
[Intel-gfx] ✗ Fi.CI.BUILD: failure for Return head pages from find_*_entry
== Series Details == Series: Return head pages from find_*_entry URL : https://patchwork.freedesktop.org/series/81557/ State : failure == Summary == Applying: mm: Factor find_get_incore_page out of mincore_page Applying: mm: Use find_get_incore_page in memcontrol Applying: mm: Optimise madvise WILLNEED Applying: proc: Optimise smaps for shmem entries Applying: i915: Use find_lock_page instead of find_lock_entry error: sha1 information is lacking or useless (include/linux/pagemap.h). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0005 i915: Use find_lock_page instead of find_lock_entry When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 2/8] mm: Use find_get_incore_page in memcontrol
The current code does not protect against swapoff of the underlying
swap device, so this is a bug fix as well as a worthwhile reduction in
code complexity.
Signed-off-by: Matthew Wilcox (Oracle)
---
mm/memcontrol.c | 24 ++--
1 file changed, 2 insertions(+), 22 deletions(-)
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index b807952b4d43..2f02eaee7115 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -5539,35 +5539,15 @@ static struct page *mc_handle_swap_pte(struct
vm_area_struct *vma,
static struct page *mc_handle_file_pte(struct vm_area_struct *vma,
unsigned long addr, pte_t ptent, swp_entry_t *entry)
{
- struct page *page = NULL;
- struct address_space *mapping;
- pgoff_t pgoff;
-
if (!vma->vm_file) /* anonymous vma */
return NULL;
if (!(mc.flags & MOVE_FILE))
return NULL;
- mapping = vma->vm_file->f_mapping;
- pgoff = linear_page_index(vma, addr);
-
/* page is moved even if it's not RSS of this task(page-faulted). */
-#ifdef CONFIG_SWAP
/* shmem/tmpfs may report page out on swap: account for that too. */
- if (shmem_mapping(mapping)) {
- page = find_get_entry(mapping, pgoff);
- if (xa_is_value(page)) {
- swp_entry_t swp = radix_to_swp_entry(page);
- *entry = swp;
- page = find_get_page(swap_address_space(swp),
-swp_offset(swp));
- }
- } else
- page = find_get_page(mapping, pgoff);
-#else
- page = find_get_page(mapping, pgoff);
-#endif
- return page;
+ return find_get_incore_page(vma->vm_file->f_mapping,
+ linear_page_index(vma, addr));
}
/**
--
2.28.0
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[Intel-gfx] [PATCH v2 3/8] mm: Optimise madvise WILLNEED
Instead of calling find_get_entry() for every page index, use an XArray
iterator to skip over NULL entries, and avoid calling get_page(),
because we only want the swap entries.
Signed-off-by: Matthew Wilcox (Oracle)
Acked-by: Johannes Weiner
---
mm/madvise.c | 21 -
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/mm/madvise.c b/mm/madvise.c
index dd1d43cf026d..96189acd6969 100644
--- a/mm/madvise.c
+++ b/mm/madvise.c
@@ -224,25 +224,28 @@ static void force_shm_swapin_readahead(struct
vm_area_struct *vma,
unsigned long start, unsigned long end,
struct address_space *mapping)
{
- pgoff_t index;
+ XA_STATE(xas, >i_pages, linear_page_index(vma, start));
+ pgoff_t end_index = end / PAGE_SIZE;
struct page *page;
- swp_entry_t swap;
- for (; start < end; start += PAGE_SIZE) {
- index = ((start - vma->vm_start) >> PAGE_SHIFT) + vma->vm_pgoff;
+ rcu_read_lock();
+ xas_for_each(, page, end_index) {
+ swp_entry_t swap;
- page = find_get_entry(mapping, index);
- if (!xa_is_value(page)) {
- if (page)
- put_page(page);
+ if (!xa_is_value(page))
continue;
- }
+ rcu_read_unlock();
+
swap = radix_to_swp_entry(page);
page = read_swap_cache_async(swap, GFP_HIGHUSER_MOVABLE,
NULL, 0, false);
if (page)
put_page(page);
+
+ rcu_read_lock();
+ xas_reset();
}
+ rcu_read_unlock();
lru_add_drain();/* Push any new pages onto the LRU now */
}
--
2.28.0
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[Intel-gfx] [PATCH v2 6/8] mm: Convert find_get_entry to return the head page
There are only four callers remaining of find_get_entry().
get_shadow_from_swap_cache() only wants to see shadow entries and doesn't
care about which page is returned. Push the find_subpage() call into
find_lock_entry(), find_get_incore_page() and pagecache_get_page().
Signed-off-by: Matthew Wilcox (Oracle)
---
mm/filemap.c| 13 +++--
mm/swap_state.c | 2 +-
2 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/mm/filemap.c b/mm/filemap.c
index d64f6f76bc0b..2f134383b0ae 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -1567,19 +1567,19 @@ EXPORT_SYMBOL(page_cache_prev_miss);
/**
* find_get_entry - find and get a page cache entry
* @mapping: the address_space to search
- * @offset: the page cache index
+ * @index: The page cache index.
*
* Looks up the page cache slot at @mapping & @offset. If there is a
- * page cache page, it is returned with an increased refcount.
+ * page cache page, the head page is returned with an increased refcount.
*
* If the slot holds a shadow entry of a previously evicted page, or a
* swap entry from shmem/tmpfs, it is returned.
*
- * Return: the found page or shadow entry, %NULL if nothing is found.
+ * Return: The head page or shadow entry, %NULL if nothing is found.
*/
-struct page *find_get_entry(struct address_space *mapping, pgoff_t offset)
+struct page *find_get_entry(struct address_space *mapping, pgoff_t index)
{
- XA_STATE(xas, >i_pages, offset);
+ XA_STATE(xas, >i_pages, index);
struct page *page;
rcu_read_lock();
@@ -1607,7 +1607,6 @@ struct page *find_get_entry(struct address_space
*mapping, pgoff_t offset)
put_page(page);
goto repeat;
}
- page = find_subpage(page, offset);
out:
rcu_read_unlock();
@@ -1644,6 +1643,7 @@ struct page *find_lock_entry(struct address_space
*mapping, pgoff_t offset)
put_page(page);
goto repeat;
}
+ page = find_subpage(page, offset);
VM_BUG_ON_PAGE(page_to_pgoff(page) != offset, page);
}
return page;
@@ -1690,6 +1690,7 @@ struct page *pagecache_get_page(struct address_space
*mapping, pgoff_t index,
page = NULL;
if (!page)
goto no_page;
+ page = find_subpage(page, index);
if (fgp_flags & FGP_LOCK) {
if (fgp_flags & FGP_NOWAIT) {
diff --git a/mm/swap_state.c b/mm/swap_state.c
index c79e2242dd04..c8cf1757ca06 100644
--- a/mm/swap_state.c
+++ b/mm/swap_state.c
@@ -432,7 +432,7 @@ struct page *find_get_incore_page(struct address_space
*mapping, pgoff_t index)
struct page *page = find_get_entry(mapping, index);
if (!xa_is_value(page))
- return page;
+ return find_subpage(page, index);
if (!shmem_mapping(mapping))
return NULL;
--
2.28.0
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[Intel-gfx] [PATCH v2 4/8] proc: Optimise smaps for shmem entries
Avoid bumping the refcount on pages when we're only interested in the
swap entries.
Signed-off-by: Matthew Wilcox (Oracle)
Acked-by: Johannes Weiner
---
fs/proc/task_mmu.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c
index 5066b0251ed8..e42d9e5e9a3c 100644
--- a/fs/proc/task_mmu.c
+++ b/fs/proc/task_mmu.c
@@ -520,16 +520,10 @@ static void smaps_pte_entry(pte_t *pte, unsigned long
addr,
page = device_private_entry_to_page(swpent);
} else if (unlikely(IS_ENABLED(CONFIG_SHMEM) && mss->check_shmem_swap
&& pte_none(*pte))) {
- page = find_get_entry(vma->vm_file->f_mapping,
+ page = xa_load(>vm_file->f_mapping->i_pages,
linear_page_index(vma, addr));
- if (!page)
- return;
-
if (xa_is_value(page))
mss->swap += PAGE_SIZE;
- else
- put_page(page);
-
return;
}
--
2.28.0
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[Intel-gfx] [PATCH v2 7/8] mm/shmem: Return head page from find_lock_entry
Convert shmem_getpage_gfp() (the only remaining caller of
find_lock_entry()) to cope with a head page being returned instead of
the subpage for the index.
Signed-off-by: Matthew Wilcox (Oracle)
---
include/linux/pagemap.h | 9 +
mm/filemap.c| 25 +++--
mm/shmem.c | 20 +---
3 files changed, 29 insertions(+), 25 deletions(-)
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 905a64030647..f374618b2c93 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -371,6 +371,15 @@ static inline struct page *grab_cache_page_nowait(struct
address_space *mapping,
mapping_gfp_mask(mapping));
}
+/* Does this page contain this index? */
+static inline bool thp_contains(struct page *head, pgoff_t index)
+{
+ /* HugeTLBfs indexes the page cache in units of hpage_size */
+ if (PageHuge(head))
+ return head->index == index;
+ return page_index(head) == (index & ~(thp_nr_pages(head) - 1UL));
+}
+
/*
* Given the page we found in the page cache, return the page corresponding
* to this index in the file
diff --git a/mm/filemap.c b/mm/filemap.c
index 2f134383b0ae..453535170b8d 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -1614,37 +1614,34 @@ struct page *find_get_entry(struct address_space
*mapping, pgoff_t index)
}
/**
- * find_lock_entry - locate, pin and lock a page cache entry
- * @mapping: the address_space to search
- * @offset: the page cache index
+ * find_lock_entry - Locate and lock a page cache entry.
+ * @mapping: The address_space to search.
+ * @index: The page cache index.
*
- * Looks up the page cache slot at @mapping & @offset. If there is a
- * page cache page, it is returned locked and with an increased
- * refcount.
+ * Looks up the page at @mapping & @index. If there is a page in the
+ * cache, the head page is returned locked and with an increased refcount.
*
* If the slot holds a shadow entry of a previously evicted page, or a
* swap entry from shmem/tmpfs, it is returned.
*
- * find_lock_entry() may sleep.
- *
- * Return: the found page or shadow entry, %NULL if nothing is found.
+ * Context: May sleep.
+ * Return: The head page or shadow entry, %NULL if nothing is found.
*/
-struct page *find_lock_entry(struct address_space *mapping, pgoff_t offset)
+struct page *find_lock_entry(struct address_space *mapping, pgoff_t index)
{
struct page *page;
repeat:
- page = find_get_entry(mapping, offset);
+ page = find_get_entry(mapping, index);
if (page && !xa_is_value(page)) {
lock_page(page);
/* Has the page been truncated? */
- if (unlikely(page_mapping(page) != mapping)) {
+ if (unlikely(page->mapping != mapping)) {
unlock_page(page);
put_page(page);
goto repeat;
}
- page = find_subpage(page, offset);
- VM_BUG_ON_PAGE(page_to_pgoff(page) != offset, page);
+ VM_BUG_ON_PAGE(!thp_contains(page, index), page);
}
return page;
}
diff --git a/mm/shmem.c b/mm/shmem.c
index 271548ca20f3..d2a46ef7df43 100644
--- a/mm/shmem.c
+++ b/mm/shmem.c
@@ -1793,7 +1793,7 @@ static int shmem_getpage_gfp(struct inode *inode, pgoff_t
index,
struct mm_struct *charge_mm;
struct page *page;
enum sgp_type sgp_huge = sgp;
- pgoff_t hindex = index;
+ pgoff_t hindex;
int error;
int once = 0;
int alloced = 0;
@@ -1833,10 +1833,8 @@ static int shmem_getpage_gfp(struct inode *inode,
pgoff_t index,
put_page(page);
page = NULL;
}
- if (page || sgp == SGP_READ) {
- *pagep = page;
- return 0;
- }
+ if (page || sgp == SGP_READ)
+ goto out;
/*
* Fast cache lookup did not find it:
@@ -1961,14 +1959,13 @@ static int shmem_getpage_gfp(struct inode *inode,
pgoff_t index,
* it now, lest undo on failure cancel our earlier guarantee.
*/
if (sgp != SGP_WRITE && !PageUptodate(page)) {
- struct page *head = compound_head(page);
int i;
- for (i = 0; i < compound_nr(head); i++) {
- clear_highpage(head + i);
- flush_dcache_page(head + i);
+ for (i = 0; i < compound_nr(page); i++) {
+ clear_highpage(page + i);
+ flush_dcache_page(page + i);
}
- SetPageUptodate(head);
+ SetPageUptodate(page);
}
/* Perhaps the file has been truncated since we checked */
@@ -1984,7 +1981,8 @@ static int shmem_getpage_gfp(struct inode *inode, pgoff_t
index,
error = -EINVAL;
goto unlock;
}
- *pagep = page
[Intel-gfx] [PATCH v2 5/8] i915: Use find_lock_page instead of find_lock_entry
i915 does not want to see value entries. Switch it to use
find_lock_page() instead, and remove the export of find_lock_entry().
Move find_lock_entry() and find_get_entry() to mm/internal.h to discourage
any future use.
Signed-off-by: Matthew Wilcox (Oracle)
Acked-by: Johannes Weiner
---
drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 4 ++--
include/linux/pagemap.h | 2 --
mm/filemap.c | 1 -
mm/internal.h | 3 +++
4 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
index 38113d3c0138..75e8b71c18b9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c
@@ -258,8 +258,8 @@ shmem_writeback(struct drm_i915_gem_object *obj)
for (i = 0; i < obj->base.size >> PAGE_SHIFT; i++) {
struct page *page;
- page = find_lock_entry(mapping, i);
- if (!page || xa_is_value(page))
+ page = find_lock_page(mapping, i);
+ if (!page)
continue;
if (!page_mapped(page) && clear_page_dirty_for_io(page)) {
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index 12ab56c3a86f..905a64030647 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -384,8 +384,6 @@ static inline struct page *find_subpage(struct page *head,
pgoff_t index)
return head + (index & (thp_nr_pages(head) - 1));
}
-struct page *find_get_entry(struct address_space *mapping, pgoff_t offset);
-struct page *find_lock_entry(struct address_space *mapping, pgoff_t offset);
unsigned find_get_entries(struct address_space *mapping, pgoff_t start,
unsigned int nr_entries, struct page **entries,
pgoff_t *indices);
diff --git a/mm/filemap.c b/mm/filemap.c
index 78d07a712112..d64f6f76bc0b 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -1648,7 +1648,6 @@ struct page *find_lock_entry(struct address_space
*mapping, pgoff_t offset)
}
return page;
}
-EXPORT_SYMBOL(find_lock_entry);
/**
* pagecache_get_page - Find and get a reference to a page.
diff --git a/mm/internal.h b/mm/internal.h
index ab4beb7c5cd2..6345b08ce86c 100644
--- a/mm/internal.h
+++ b/mm/internal.h
@@ -60,6 +60,9 @@ static inline void force_page_cache_readahead(struct
address_space *mapping,
force_page_cache_ra(, >f_ra, nr_to_read);
}
+struct page *find_get_entry(struct address_space *mapping, pgoff_t index);
+struct page *find_lock_entry(struct address_space *mapping, pgoff_t index);
+
/**
* page_evictable - test whether a page is evictable
* @page: the page to test
--
2.28.0
___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 1/8] mm: Factor find_get_incore_page out of mincore_page
Provide this functionality from the swap cache. It's useful for
more than just mincore().
Signed-off-by: Matthew Wilcox (Oracle)
---
include/linux/swap.h | 7 +++
mm/mincore.c | 28 ++--
mm/swap_state.c | 32
3 files changed, 41 insertions(+), 26 deletions(-)
diff --git a/include/linux/swap.h b/include/linux/swap.h
index 661046994db4..df87de38dca5 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -427,6 +427,7 @@ extern void free_pages_and_swap_cache(struct page **, int);
extern struct page *lookup_swap_cache(swp_entry_t entry,
struct vm_area_struct *vma,
unsigned long addr);
+struct page *find_get_incore_page(struct address_space *mapping, pgoff_t
index);
extern struct page *read_swap_cache_async(swp_entry_t, gfp_t,
struct vm_area_struct *vma, unsigned long addr,
bool do_poll);
@@ -569,6 +570,12 @@ static inline struct page *lookup_swap_cache(swp_entry_t
swp,
return NULL;
}
+static inline
+struct page *find_get_incore_page(struct address_space *mapping, pgoff_t index)
+{
+ return find_get_page(mapping, index);
+}
+
static inline int add_to_swap(struct page *page)
{
return 0;
diff --git a/mm/mincore.c b/mm/mincore.c
index 453ff112470f..02db1a834021 100644
--- a/mm/mincore.c
+++ b/mm/mincore.c
@@ -48,7 +48,7 @@ static int mincore_hugetlb(pte_t *pte, unsigned long hmask,
unsigned long addr,
* and is up to date; i.e. that no page-in operation would be required
* at this time if an application were to map and access this page.
*/
-static unsigned char mincore_page(struct address_space *mapping, pgoff_t pgoff)
+static unsigned char mincore_page(struct address_space *mapping, pgoff_t index)
{
unsigned char present = 0;
struct page *page;
@@ -59,31 +59,7 @@ static unsigned char mincore_page(struct address_space
*mapping, pgoff_t pgoff)
* any other file mapping (ie. marked !present and faulted in with
* tmpfs's .fault). So swapped out tmpfs mappings are tested here.
*/
-#ifdef CONFIG_SWAP
- if (shmem_mapping(mapping)) {
- page = find_get_entry(mapping, pgoff);
- /*
-* shmem/tmpfs may return swap: account for swapcache
-* page too.
-*/
- if (xa_is_value(page)) {
- swp_entry_t swp = radix_to_swp_entry(page);
- struct swap_info_struct *si;
-
- /* Prevent swap device to being swapoff under us */
- si = get_swap_device(swp);
- if (si) {
- page = find_get_page(swap_address_space(swp),
-swp_offset(swp));
- put_swap_device(si);
- } else
- page = NULL;
- }
- } else
- page = find_get_page(mapping, pgoff);
-#else
- page = find_get_page(mapping, pgoff);
-#endif
+ page = find_get_incore_page(mapping, index);
if (page) {
present = PageUptodate(page);
put_page(page);
diff --git a/mm/swap_state.c b/mm/swap_state.c
index c16eebb81d8b..c79e2242dd04 100644
--- a/mm/swap_state.c
+++ b/mm/swap_state.c
@@ -21,6 +21,7 @@
#include
#include
#include
+#include
#include "internal.h"
/*
@@ -414,6 +415,37 @@ struct page *lookup_swap_cache(swp_entry_t entry, struct
vm_area_struct *vma,
return page;
}
+/**
+ * find_get_incore_page - Find and get a page from the page or swap caches.
+ * @mapping: The address_space to search.
+ * @index: The page cache index.
+ *
+ * This differs from find_get_page() in that it will also look for the
+ * page in the swap cache.
+ *
+ * Return: The found page or %NULL.
+ */
+struct page *find_get_incore_page(struct address_space *mapping, pgoff_t index)
+{
+ swp_entry_t swp;
+ struct swap_info_struct *si;
+ struct page *page = find_get_entry(mapping, index);
+
+ if (!xa_is_value(page))
+ return page;
+ if (!shmem_mapping(mapping))
+ return NULL;
+
+ swp = radix_to_swp_entry(page);
+ /* Prevent swapoff from happening to us */
+ si = get_swap_device(swp);
+ if (!si)
+ return NULL;
+ page = find_get_page(swap_address_space(swp), swp_offset(swp));
+ put_swap_device(si);
+ return page;
+}
+
struct page *__read_swap_cache_async(swp_entry_t entry, gfp_t gfp_mask,
struct vm_area_struct *vma, unsigned long addr,
bool *new_page_allocated)
--
2.28.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
[Intel-gfx] [PATCH v2 0/8] Return head pages from find_*_entry
This patch series started out as part of the THP patch set, but it has some nice effects along the way and it seems worth splitting it out and submitting separately. Currently find_get_entry() and find_lock_entry() return the page corresponding to the requested index, but the first thing most callers do is find the head page, which we just threw away. As part of auditing all the callers, I found some misuses of the APIs and some plain inefficiencies that I've fixed. The diffstat is unflattering, but I added more kernel-doc and a new wrapper. v2: - Rework how shmem_getpage_gfp() handles getting a head page back from find_lock_entry() - Renamed find_get_swap_page() to find_get_incore_page() - Make sure find_get_incore_page() doesn't return a head page - Fix the missing include of linux/shmem_fs.h - Move find_get_entry and find_lock_entry prototypes to mm/internal.h - Rename thp_valid_index() to thp_contains() - Fix thp_contains() for hugetlbfs and swapcache - Add find_lock_head() wrapper around pagecache_get_page() Matthew Wilcox (Oracle) (8): mm: Factor find_get_incore_page out of mincore_page mm: Use find_get_incore_page in memcontrol mm: Optimise madvise WILLNEED proc: Optimise smaps for shmem entries i915: Use find_lock_page instead of find_lock_entry mm: Convert find_get_entry to return the head page mm/shmem: Return head page from find_lock_entry mm: Add find_lock_head drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 4 +-- fs/proc/task_mmu.c| 8 + include/linux/pagemap.h | 43 +- include/linux/swap.h | 7 mm/filemap.c | 44 +++ mm/internal.h | 3 ++ mm/madvise.c | 21 ++- mm/memcontrol.c | 24 ++--- mm/mincore.c | 28 ++- mm/shmem.c| 20 +-- mm/swap_state.c | 32 + 11 files changed, 127 insertions(+), 107 deletions(-) -- 2.28.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2 8/8] mm: Add find_lock_head
Add a new FGP_HEAD flag which avoids calling find_subpage() and add a
convenience wrapper for it.
Signed-off-by: Matthew Wilcox (Oracle)
---
include/linux/pagemap.h | 32 ++--
mm/filemap.c| 9 ++---
2 files changed, 32 insertions(+), 9 deletions(-)
diff --git a/include/linux/pagemap.h b/include/linux/pagemap.h
index f374618b2c93..4e52a3ff92fb 100644
--- a/include/linux/pagemap.h
+++ b/include/linux/pagemap.h
@@ -278,6 +278,7 @@ pgoff_t page_cache_prev_miss(struct address_space *mapping,
#define FGP_NOFS 0x0010
#define FGP_NOWAIT 0x0020
#define FGP_FOR_MMAP 0x0040
+#define FGP_HEAD 0x0080
struct page *pagecache_get_page(struct address_space *mapping, pgoff_t offset,
int fgp_flags, gfp_t cache_gfp_mask);
@@ -309,18 +310,37 @@ static inline struct page *find_get_page_flags(struct
address_space *mapping,
* @mapping: the address_space to search
* @offset: the page index
*
- * Looks up the page cache slot at @mapping & @offset. If there is a
+ * Looks up the page cache entry at @mapping & @offset. If there is a
* page cache page, it is returned locked and with an increased
* refcount.
*
- * Otherwise, %NULL is returned.
- *
- * find_lock_page() may sleep.
+ * Context: May sleep.
+ * Return: A struct page or %NULL if there is no page in the cache for this
+ * index.
*/
static inline struct page *find_lock_page(struct address_space *mapping,
- pgoff_t offset)
+ pgoff_t index)
+{
+ return pagecache_get_page(mapping, index, FGP_LOCK, 0);
+}
+
+/**
+ * find_lock_head - Locate, pin and lock a pagecache page.
+ * @mapping: The address_space to search.
+ * @offset: The page index.
+ *
+ * Looks up the page cache entry at @mapping & @offset. If there is a
+ * page cache page, its head page is returned locked and with an increased
+ * refcount.
+ *
+ * Context: May sleep.
+ * Return: A struct page which is !PageTail, or %NULL if there is no page
+ * in the cache for this index.
+ */
+static inline struct page *find_lock_head(struct address_space *mapping,
+ pgoff_t index)
{
- return pagecache_get_page(mapping, offset, FGP_LOCK, 0);
+ return pagecache_get_page(mapping, index, FGP_LOCK | FGP_HEAD, 0);
}
/**
diff --git a/mm/filemap.c b/mm/filemap.c
index 453535170b8d..e429e02317ef 100644
--- a/mm/filemap.c
+++ b/mm/filemap.c
@@ -1659,6 +1659,8 @@ struct page *find_lock_entry(struct address_space
*mapping, pgoff_t index)
*
* * %FGP_ACCESSED - The page will be marked accessed.
* * %FGP_LOCK - The page is returned locked.
+ * * %FGP_HEAD - If the page is present and a THP, return the head page
+ * rather than the exact page specified by the index.
* * %FGP_CREAT - If no page is present then a new page is allocated using
* @gfp_mask and added to the page cache and the VM's LRU list.
* The page is returned locked and with an increased refcount.
@@ -1687,7 +1689,6 @@ struct page *pagecache_get_page(struct address_space
*mapping, pgoff_t index,
page = NULL;
if (!page)
goto no_page;
- page = find_subpage(page, index);
if (fgp_flags & FGP_LOCK) {
if (fgp_flags & FGP_NOWAIT) {
@@ -1700,12 +1701,12 @@ struct page *pagecache_get_page(struct address_space
*mapping, pgoff_t index,
}
/* Has the page been truncated? */
- if (unlikely(compound_head(page)->mapping != mapping)) {
+ if (unlikely(page->mapping != mapping)) {
unlock_page(page);
put_page(page);
goto repeat;
}
- VM_BUG_ON_PAGE(page->index != index, page);
+ VM_BUG_ON_PAGE(!thp_contains(page, index), page);
}
if (fgp_flags & FGP_ACCESSED)
@@ -1715,6 +1716,8 @@ struct page *pagecache_get_page(struct address_space
*mapping, pgoff_t index,
if (page_is_idle(page))
clear_page_idle(page);
}
+ if (!(fgp_flags & FGP_HEAD))
+ page = find_subpage(page, index);
no_page:
if (!page && (fgp_flags & FGP_CREAT)) {
--
2.28.0
___
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for Fixes for incoming smarter IOMMU (rev2)
== Series Details == Series: Fixes for incoming smarter IOMMU (rev2) URL : https://patchwork.freedesktop.org/series/81552/ State : success == Summary == CI Bug Log - changes from CI_DRM_8995_full -> Patchwork_18475_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18475_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_ctx_persistence@engines-mixed-process@vcs0: - shard-iclb: [PASS][1] -> [FAIL][2] ([i915#2374]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-iclb8/igt@gem_ctx_persistence@engines-mixed-proc...@vcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-iclb7/igt@gem_ctx_persistence@engines-mixed-proc...@vcs0.html * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-glk: [PASS][3] -> [FAIL][4] ([i915#2389]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk7/igt@gem_exec_reloc@basic-many-act...@rcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-glk6/igt@gem_exec_reloc@basic-many-act...@rcs0.html * igt@kms_big_fb@x-tiled-8bpp-rotate-180: - shard-apl: [PASS][5] -> [DMESG-WARN][6] ([i915#1635] / [i915#1982]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-apl1/igt@kms_big...@x-tiled-8bpp-rotate-180.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-apl7/igt@kms_big...@x-tiled-8bpp-rotate-180.html * igt@kms_cursor_crc@pipe-a-cursor-suspend: - shard-kbl: [PASS][7] -> [DMESG-WARN][8] ([i915#180]) +4 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-kbl1/igt@kms_cursor_...@pipe-a-cursor-suspend.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-kbl4/igt@kms_cursor_...@pipe-a-cursor-suspend.html * igt@kms_cursor_crc@pipe-c-cursor-128x128-sliding: - shard-skl: [PASS][9] -> [FAIL][10] ([i915#54]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl6/igt@kms_cursor_...@pipe-c-cursor-128x128-sliding.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-skl8/igt@kms_cursor_...@pipe-c-cursor-128x128-sliding.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions: - shard-glk: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk5/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-glk8/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html * igt@kms_flip_tiling@flip-to-x-tiled: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#167]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl8/igt@kms_flip_til...@flip-to-x-tiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-skl3/igt@kms_flip_til...@flip-to-x-tiled.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-tglb: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) +2 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-tglb5/igt@kms_frontbuffer_track...@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-tglb7/igt@kms_frontbuffer_track...@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_plane@plane-panning-bottom-right-pipe-b-planes: - shard-skl: [PASS][17] -> [DMESG-WARN][18] ([i915#1982]) +6 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl5/igt@kms_pl...@plane-panning-bottom-right-pipe-b-planes.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-skl9/igt@kms_pl...@plane-panning-bottom-right-pipe-b-planes.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145] / [i915#265]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl3/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-skl2/igt@kms_plane_alpha_bl...@pipe-a-constant-alpha-min.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109441]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-iclb2/igt@kms_psr@psr2_cursor_render.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/shard-iclb1/igt@kms_psr@psr2_cursor_render.html Possible fixes * igt@gem_ctx_persistence@legacy-engines-mixed-process@render: - shard-skl: [FAIL][23] ([i915#2374]) -> [PASS][24] [23]:
Re: [Intel-gfx] [PATCH v3 6/7] drm: Validate encoder->possible_crtcs
[AMD Public Use]
> -Original Message-
> From: amd-gfx On Behalf Of
> Daniel Vetter
> Sent: Monday, September 7, 2020 3:15 AM
> To: Jan Kiszka ; amd-gfx list g...@lists.freedesktop.org>; Wentland, Harry ;
> Kazlauskas, Nicholas
> Cc: dri-devel ; intel-gfx g...@lists.freedesktop.org>; Thomas Zimmermann
> ; Ville Syrjala
> Subject: Re: [PATCH v3 6/7] drm: Validate encoder->possible_crtcs
>
> On Sun, Sep 6, 2020 at 1:19 PM Jan Kiszka wrote:
> >
> > On 11.02.20 18:04, Daniel Vetter wrote:
> > > On Tue, Feb 11, 2020 at 06:22:07PM +0200, Ville Syrjala wrote:
> > >> From: Ville Syrjälä
> > >>
> > >> WARN if the encoder possible_crtcs is effectively empty or contains
> > >> bits for non-existing crtcs.
> > >>
> > >> v2: Move to drm_mode_config_validate() (Daniel)
> > >> Make the docs say we WARN when this is wrong (Daniel)
> > >> Extract full_crtc_mask()
> > >>
> > >> Cc: Thomas Zimmermann
> > >> Cc: Daniel Vetter
> > >> Signed-off-by: Ville Syrjälä
> > >
> > > When pushing the fixup needs to be applied before the validation
> > > patch here, because we don't want to anger the bisect gods.
> > >
> > > Reviewed-by: Daniel Vetter
> > >
> > > I think with the fixup we should be good enough with the existing
> > > nonsense in drivers. Fingers crossed.
> > > -Daniel
> > >
> > >
> > >> ---
> > >> drivers/gpu/drm/drm_mode_config.c | 27
> ++-
> > >> include/drm/drm_encoder.h | 2 +-
> > >> 2 files changed, 27 insertions(+), 2 deletions(-)
> > >>
> > >> diff --git a/drivers/gpu/drm/drm_mode_config.c
> > >> b/drivers/gpu/drm/drm_mode_config.c
> > >> index afc91447293a..4c1b350ddb95 100644
> > >> --- a/drivers/gpu/drm/drm_mode_config.c
> > >> +++ b/drivers/gpu/drm/drm_mode_config.c
> > >> @@ -581,6 +581,29 @@ static void
> validate_encoder_possible_clones(struct drm_encoder *encoder)
> > >> encoder->possible_clones, encoder_mask); }
> > >>
> > >> +static u32 full_crtc_mask(struct drm_device *dev) {
> > >> +struct drm_crtc *crtc;
> > >> +u32 crtc_mask = 0;
> > >> +
> > >> +drm_for_each_crtc(crtc, dev)
> > >> +crtc_mask |= drm_crtc_mask(crtc);
> > >> +
> > >> +return crtc_mask;
> > >> +}
> > >> +
> > >> +static void validate_encoder_possible_crtcs(struct drm_encoder
> > >> +*encoder) {
> > >> +u32 crtc_mask = full_crtc_mask(encoder->dev);
> > >> +
> > >> +WARN((encoder->possible_crtcs & crtc_mask) == 0 ||
> > >> + (encoder->possible_crtcs & ~crtc_mask) != 0,
> > >> + "Bogus possible_crtcs: "
> > >> + "[ENCODER:%d:%s] possible_crtcs=0x%x (full crtc mask=0x%x)\n",
> > >> + encoder->base.id, encoder->name,
> > >> + encoder->possible_crtcs, crtc_mask); }
> > >> +
> > >> void drm_mode_config_validate(struct drm_device *dev) {
> > >> struct drm_encoder *encoder;
> > >> @@ -588,6 +611,8 @@ void drm_mode_config_validate(struct
> drm_device *dev)
> > >> drm_for_each_encoder(encoder, dev)
> > >> fixup_encoder_possible_clones(encoder);
> > >>
> > >> -drm_for_each_encoder(encoder, dev)
> > >> +drm_for_each_encoder(encoder, dev) {
> > >> validate_encoder_possible_clones(encoder);
> > >> +validate_encoder_possible_crtcs(encoder);
> > >> +}
> > >> }
> > >> diff --git a/include/drm/drm_encoder.h b/include/drm/drm_encoder.h
> > >> index 3741963b9587..b236269f41ac 100644
> > >> --- a/include/drm/drm_encoder.h
> > >> +++ b/include/drm/drm_encoder.h
> > >> @@ -142,7 +142,7 @@ struct drm_encoder {
> > >> * the bits for all _crtc objects this encoder can be connected
> > >> to
> > >> * before calling drm_dev_register().
> > >> *
> > >> - * In reality almost every driver gets this wrong.
> > >> + * You will get a WARN if you get this wrong in the driver.
> > >> *
> > >> * Note that since CRTC objects can't be hotplugged the assigned
> indices
> > >> * are stable and hence known before registering all objects.
> > >> --
> > >> 2.24.1
> > >>
> > >
> >
> > Triggers on an Advantech AIMB-228 (R1505G, 3 DP outputs):
>
> Adding amdgpu display folks.
I took a quick look at this and it looks like we limit the number of crtcs
later in the mode init process if the number of physical displays can't
actually use more crtcs. E.g., the physical board configuration would only
allow for 3 active displays even if the hardware technically supports 4 crtcs.
I presume that way we can just leave the additional hardware power gated all
the time.
Alex
> -Daniel
>
> >
> > [ 14.033246] [ cut here ]
> > [ 14.033248] Bogus possible_crtcs: [ENCODER:65:TMDS-65]
> possible_crtcs=0xf (full crtc mask=0x7)
> > [ 14.033279] WARNING: CPU: 0 PID: 282 at
> ../drivers/gpu/drm/drm_mode_config.c:622
> drm_mode_config_validate+0x17d/0x200 [drm]
> > [ 14.033279] Modules linked in: amdgpu(E+) mfd_core(E)
> snd_hda_codec_realtek(E) kvm_amd(E) gpu_sched(E) i2c_algo_bit(E) ttm(E)
>
Re: [Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
Joe, Please drop this chunk: it's a successive controller version number which are all backward compatible with "fallthrough" on each case so removing from this last one makes it inconsistent. In sort: NACK for atmel-mci. Best regards, Nicolas On 09/09/2020 at 22:06, Joe Perches wrote: > diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c > index 444bd3a0a922..8324312e4f42 100644 > --- a/drivers/mmc/host/atmel-mci.c > +++ b/drivers/mmc/host/atmel-mci.c > @@ -2435,7 +2435,7 @@ static void atmci_get_cap(struct atmel_mci *host) > case 0x100: > host->caps.has_bad_data_ordering = 0; > host->caps.need_reset_after_xfer = 0; > - fallthrough; > + break; > case 0x0: > break; > default: -- Nicolas Ferre ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix inconsistent IS_ERR and PTR_ERR
== Series Details == Series: drm/i915: Fix inconsistent IS_ERR and PTR_ERR URL : https://patchwork.freedesktop.org/series/81554/ State : success == Summary == CI Bug Log - changes from CI_DRM_8995_full -> Patchwork_18474_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18474_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_eio@unwedge-stress: - shard-skl: [PASS][1] -> [DMESG-WARN][2] ([i915#1982]) +5 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl6/igt@gem_...@unwedge-stress.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-skl8/igt@gem_...@unwedge-stress.html * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-glk: [PASS][3] -> [FAIL][4] ([i915#2389]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk7/igt@gem_exec_reloc@basic-many-act...@rcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-glk2/igt@gem_exec_reloc@basic-many-act...@rcs0.html * igt@gem_exec_whisper@basic-queues-priority: - shard-glk: [PASS][5] -> [DMESG-WARN][6] ([i915#118] / [i915#95]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk2/igt@gem_exec_whis...@basic-queues-priority.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-glk3/igt@gem_exec_whis...@basic-queues-priority.html * igt@i915_selftest@mock@requests: - shard-skl: [PASS][7] -> [INCOMPLETE][8] ([i915#198] / [i915#2278]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl2/igt@i915_selftest@m...@requests.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-skl7/igt@i915_selftest@m...@requests.html * igt@kms_big_fb@x-tiled-8bpp-rotate-180: - shard-apl: [PASS][9] -> [DMESG-WARN][10] ([i915#1635] / [i915#1982]) +2 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-apl1/igt@kms_big...@x-tiled-8bpp-rotate-180.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-apl2/igt@kms_big...@x-tiled-8bpp-rotate-180.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions: - shard-glk: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk5/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-glk1/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html * igt@kms_draw_crc@draw-method-xrgb-render-untiled: - shard-iclb: [PASS][13] -> [FAIL][14] ([i915#52] / [i915#54]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-iclb5/igt@kms_draw_...@draw-method-xrgb-render-untiled.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-iclb4/igt@kms_draw_...@draw-method-xrgb-render-untiled.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1: - shard-skl: [PASS][15] -> [FAIL][16] ([i915#79]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-edp1.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-edp1.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu: - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#49]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-iclb5/igt@kms_frontbuffer_track...@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-iclb4/igt@kms_frontbuffer_track...@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-tglb: [PASS][19] -> [DMESG-WARN][20] ([i915#1982]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-tglb5/igt@kms_frontbuffer_track...@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-tglb5/igt@kms_frontbuffer_track...@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-kbl7/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-b-planes.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/shard-kbl3/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-b-planes.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-apl: [PASS][23]
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Reduce INTEL_DISPLAY_ENABLED to just removing the outputs (rev3)
== Series Details == Series: series starting with [1/2] drm/i915: Reduce INTEL_DISPLAY_ENABLED to just removing the outputs (rev3) URL : https://patchwork.freedesktop.org/series/81507/ State : success == Summary == CI Bug Log - changes from CI_DRM_8995 -> Patchwork_18476 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/index.html Known issues Here are the changes found in Patchwork_18476 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap_gtt@basic: - fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@gem_mmap_...@basic.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-tgl-y/igt@gem_mmap_...@basic.html * igt@i915_module_load@reload: - fi-tgl-u2: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-u2/igt@i915_module_l...@reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-tgl-u2/igt@i915_module_l...@reload.html * igt@i915_pm_rpm@basic-pci-d3-state: - fi-byt-j1900: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html * igt@i915_selftest@live@active: - fi-bsw-n3050: [PASS][7] -> [DMESG-FAIL][8] ([i915#541]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bsw-n3050/igt@i915_selftest@l...@active.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-bsw-n3050/igt@i915_selftest@l...@active.html * igt@i915_selftest@live@dmabuf: - fi-icl-u2: [PASS][9] -> [DMESG-WARN][10] ([i915#289]) +31 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@i915_selftest@l...@dmabuf.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-icl-u2/igt@i915_selftest@l...@dmabuf.html Possible fixes * igt@gem_flink_basic@bad-flink: - fi-tgl-y: [DMESG-WARN][11] ([i915#402]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html * igt@i915_module_load@reload: - fi-bxt-dsi: [DMESG-WARN][13] ([i915#1635] / [i915#1982]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bxt-dsi/igt@i915_module_l...@reload.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-bxt-dsi/igt@i915_module_l...@reload.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-icl-u2: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16] +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html - fi-bsw-kefka: [DMESG-WARN][17] ([i915#1982]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2: - fi-skl-guc: [DMESG-WARN][19] ([i915#2203]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html * igt@kms_force_connector_basic@force-connector-state: - fi-tgl-y: [DMESG-WARN][21] ([i915#1982]) -> [PASS][22] +1 similar issue [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@kms_force_connector_ba...@force-connector-state.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-tgl-y/igt@kms_force_connector_ba...@force-connector-state.html Warnings * igt@gem_exec_suspend@basic-s0: - fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][24] ([i915#62] / [i915#92]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18476/fi-kbl-x1275/igt@gem_exec_susp...@basic-s0.html * igt@gem_exec_suspend@basic-s3: -
Re: [Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE register lookup
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, September 10, 2020 6:31 AM
> To: Srivatsa, Anusha ; intel-
> g...@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE register
> lookup
>
> On Tue, 08 Sep 2020, Anusha Srivatsa wrote:
> > We currenty check for platform at multiple parts in the driver to grab
> > the correct PLL. Let us begin to centralize it through a helper
> > function.
> >
> > v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
> >
> > v3: Clean up combo_pll_disable() (Rodrigo)
> >
> > Suggested-by: Matt Roper
> > Cc: Ville Syrjälä
> > Cc: Matt Roper
> > Signed-off-by: Anusha Srivatsa
> > Reviewed-by: Rodrigo Vivi
> > ---
> > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 29
> > +++
> > 1 file changed, 17 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > index c9013f8f766f..441b6f52e808 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > @@ -147,6 +147,18 @@ void assert_shared_dpll(struct drm_i915_private
> *dev_priv,
> > pll->info->name, onoff(state), onoff(cur_state)); }
> >
> > +static
> > +i915_reg_t intel_combo_pll_enable_reg(struct drm_i915_private
> > +*dev_priv,
>
> Please keep the static keyword and the return type on the same line with
> each other.
>
> And since you're touching this, please rename dev_priv to i915 in all new
> code adding it.
Sure. Thanks for the feedback Jani.
Anusha
> BR,
> Jani.
>
>
> > + struct intel_shared_dpll *pll) {
> > +
> > + if (IS_ELKHARTLAKE(dev_priv) && (pll->info->id ==
> DPLL_ID_EHL_DPLL4))
> > + return MG_PLL_ENABLE(0);
> > +
> > + return CNL_DPLL_ENABLE(pll->info->id);
> > +
> > +
> > +}
> > /**
> > * intel_prepare_shared_dpll - call a dpll's prepare hook
> > * @crtc_state: CRTC, and its state, which has a shared dpll @@
> > -3842,12 +3854,7 @@ static bool combo_pll_get_hw_state(struct
> drm_i915_private *dev_priv,
> >struct intel_shared_dpll *pll,
> >struct intel_dpll_hw_state *hw_state) {
> > - i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id);
> > -
> > - if (IS_ELKHARTLAKE(dev_priv) &&
> > - pll->info->id == DPLL_ID_EHL_DPLL4) {
> > - enable_reg = MG_PLL_ENABLE(0);
> > - }
> > + i915_reg_t enable_reg = intel_combo_pll_enable_reg(dev_priv, pll);
> >
> > return icl_pll_get_hw_state(dev_priv, pll, hw_state, enable_reg); }
> > @@ -4045,11 +4052,10 @@ static void icl_pll_enable(struct
> > drm_i915_private *dev_priv, static void combo_pll_enable(struct
> drm_i915_private *dev_priv,
> > struct intel_shared_dpll *pll) {
> > - i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id);
> > + i915_reg_t enable_reg = intel_combo_pll_enable_reg(dev_priv, pll);
> >
> > if (IS_ELKHARTLAKE(dev_priv) &&
> > pll->info->id == DPLL_ID_EHL_DPLL4) {
> > - enable_reg = MG_PLL_ENABLE(0);
> >
> > /*
> > * We need to disable DC states when this DPLL is enabled.
> > @@ -4157,19 +4163,18 @@ static void icl_pll_disable(struct
> > drm_i915_private *dev_priv, static void combo_pll_disable(struct
> drm_i915_private *dev_priv,
> > struct intel_shared_dpll *pll) {
> > - i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id);
> > + i915_reg_t enable_reg = intel_combo_pll_enable_reg(dev_priv, pll);
> > +
> > + icl_pll_disable(dev_priv, pll, enable_reg);
> >
> > if (IS_ELKHARTLAKE(dev_priv) &&
> > pll->info->id == DPLL_ID_EHL_DPLL4) {
> > - enable_reg = MG_PLL_ENABLE(0);
> > - icl_pll_disable(dev_priv, pll, enable_reg);
> >
> > intel_display_power_put(dev_priv,
> POWER_DOMAIN_DPLL_DC_OFF,
> > pll->wakeref);
> > return;
> > }
> >
> > - icl_pll_disable(dev_priv, pll, enable_reg);
> > }
> >
> > static void tbt_pll_disable(struct drm_i915_private *dev_priv,
>
> --
> Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: disable all display features when no display (rev2)
== Series Details == Series: series starting with [1/3] drm/i915: disable all display features when no display (rev2) URL : https://patchwork.freedesktop.org/series/81541/ State : success == Summary == CI Bug Log - changes from CI_DRM_8995_full -> Patchwork_18472_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18472_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_reloc@basic-many-active@rcs0: - shard-glk: [PASS][1] -> [FAIL][2] ([i915#2389]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk7/igt@gem_exec_reloc@basic-many-act...@rcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-glk5/igt@gem_exec_reloc@basic-many-act...@rcs0.html * igt@gem_exec_whisper@basic-contexts: - shard-glk: [PASS][3] -> [DMESG-WARN][4] ([i915#118] / [i915#95]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk5/igt@gem_exec_whis...@basic-contexts.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-glk1/igt@gem_exec_whis...@basic-contexts.html * igt@i915_selftest@mock@contexts: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([i915#198] / [i915#2278]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl2/igt@i915_selftest@m...@contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-skl6/igt@i915_selftest@m...@contexts.html * igt@i915_suspend@fence-restore-untiled: - shard-skl: [PASS][7] -> [INCOMPLETE][8] ([i915#198]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl3/igt@i915_susp...@fence-restore-untiled.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-skl3/igt@i915_susp...@fence-restore-untiled.html * igt@kms_big_fb@x-tiled-32bpp-rotate-180: - shard-kbl: [PASS][9] -> [DMESG-FAIL][10] ([i915#95]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-kbl2/igt@kms_big...@x-tiled-32bpp-rotate-180.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-kbl6/igt@kms_big...@x-tiled-32bpp-rotate-180.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-0: - shard-skl: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) +4 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-skl1/igt@kms_big...@yf-tiled-32bpp-rotate-0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-skl2/igt@kms_big...@yf-tiled-32bpp-rotate-0.html * igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size: - shard-tglb: [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-tglb5/igt@kms_cursor_leg...@basic-flip-before-cursor-varying-size.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-tglb6/igt@kms_cursor_leg...@basic-flip-before-cursor-varying-size.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions: - shard-glk: [PASS][15] -> [DMESG-WARN][16] ([i915#1982]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-glk5/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-glk8/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html * igt@kms_draw_crc@draw-method-xrgb-render-untiled: - shard-iclb: [PASS][17] -> [FAIL][18] ([i915#52] / [i915#54]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-iclb5/igt@kms_draw_...@draw-method-xrgb-render-untiled.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-iclb2/igt@kms_draw_...@draw-method-xrgb-render-untiled.html * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-mmap-cpu: - shard-iclb: [PASS][19] -> [FAIL][20] ([i915#49]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-iclb5/igt@kms_frontbuffer_track...@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-iclb2/igt@kms_frontbuffer_track...@psr-1p-offscren-pri-shrfb-draw-mmap-cpu.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes: - shard-kbl: [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/shard-kbl6/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-a-planes.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/shard-kbl4/igt@kms_pl...@plane-panning-bottom-right-suspend-pipe-a-planes.html - shard-skl: [PASS][23] -> [INCOMPLETE][24] ([i915#648]) [23]:
[Intel-gfx] ✓ Fi.CI.BAT: success for Fixes for incoming smarter IOMMU (rev2)
== Series Details ==
Series: Fixes for incoming smarter IOMMU (rev2)
URL : https://patchwork.freedesktop.org/series/81552/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8995 -> Patchwork_18475
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/index.html
Known issues
Here are the changes found in Patchwork_18475 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_flink_basic@basic:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402]) +1 similar
issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@gem_flink_ba...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-tgl-y/igt@gem_flink_ba...@basic.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-byt-j1900: [PASS][3] -> [DMESG-WARN][4] ([i915#1982])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
* igt@i915_selftest@live@gem_contexts:
- fi-tgl-u2: [PASS][5] -> [INCOMPLETE][6] ([i915#2045])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
Possible fixes
* igt@gem_flink_basic@bad-flink:
- fi-tgl-y: [DMESG-WARN][7] ([i915#402]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html
* igt@i915_module_load@reload:
- fi-bxt-dsi: [DMESG-WARN][9] ([i915#1635] / [i915#1982]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bxt-dsi/igt@i915_module_l...@reload.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-bxt-dsi/igt@i915_module_l...@reload.html
* igt@kms_busy@basic@flip:
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14] +1
similar issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-bsw-kefka: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16] +1
similar issue
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
- fi-skl-guc: [DMESG-WARN][17] ([i915#2203]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
* {igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b}:
- fi-tgl-y: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-tgl-y/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
Warnings
* igt@i915_pm_rpm@module-reload:
- fi-kbl-guc: [DMESG-WARN][21] ([i915#2203]) -> [DMESG-FAIL][22]
([i915#2203])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-guc/igt@i915_pm_...@module-reload.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-kbl-guc/igt@i915_pm_...@module-reload.html
* igt@kms_flip@basic-plain-flip@a-dp1:
- fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][24] ([i915#62] / [i915#92])
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@kms_flip@basic-plain-f...@a-dp1.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18475/fi-kbl-x1275/igt@kms_flip@basic-plain-f...@a-dp1.html
*
[Intel-gfx] [PATCH v2 2/2] drm/i915: Reduce INTEL_DISPLAY_ENABLED to just treat outputs as disconnected
From: Ville Syrjälä
Since the display hardware is all there even when INTEL_DISPLAY_ENABLED
return false we have to be capable of shutting it down cleanly so
as to not anger the hw. To that end let's reduce the effect of
!INTEL_DISPLAY_ENABLE to just treating all outputs as disconnected.
Should prevent anyone from automagically enabling any of them, while
still allowing us to cleanly shut them down.
v2: Put the check into the right place for CRT
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/icl_dsi.c | 1 +
drivers/gpu/drm/i915/display/intel_crt.c | 3 +++
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
drivers/gpu/drm/i915/display/intel_dp_mst.c | 4
drivers/gpu/drm/i915/display/intel_dvo.c | 6 ++
drivers/gpu/drm/i915/display/intel_hdmi.c| 3 +++
drivers/gpu/drm/i915/display/intel_lvds.c| 8 +---
drivers/gpu/drm/i915/display/intel_panel.c | 11 +++
drivers/gpu/drm/i915/display/intel_panel.h | 2 ++
drivers/gpu/drm/i915/display/intel_sdvo.c| 6 +-
drivers/gpu/drm/i915/display/intel_tv.c | 3 +++
drivers/gpu/drm/i915/display/vlv_dsi.c | 1 +
13 files changed, 44 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index f4053dd6bde9..520715b7d5b5 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1646,6 +1646,7 @@ static const struct drm_encoder_funcs
gen11_dsi_encoder_funcs = {
};
static const struct drm_connector_funcs gen11_dsi_connector_funcs = {
+ .detect = intel_panel_detect,
.late_register = intel_connector_register,
.early_unregister = intel_connector_unregister,
.destroy = intel_connector_destroy,
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
b/drivers/gpu/drm/i915/display/intel_crt.c
index 5b4510ce5693..4934edd51cb0 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -833,6 +833,9 @@ intel_crt_detect(struct drm_connector *connector,
connector->base.id, connector->name,
force);
+ if (!INTEL_DISPLAY_ENABLED(dev_priv))
+ return connector_status_disconnected;
+
if (dev_priv->params.load_detect_test) {
wakeref = intel_display_power_get(dev_priv,
intel_encoder->power_domain);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index bacaf713eed4..5611a3d95594 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16893,7 +16893,7 @@ static void intel_setup_outputs(struct drm_i915_private
*dev_priv)
intel_pps_init(dev_priv);
- if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
+ if (!HAS_DISPLAY(dev_priv))
return;
if (IS_ROCKETLAKE(dev_priv)) {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 8a673d0d7051..1a8185f8fb8e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6103,6 +6103,9 @@ intel_dp_detect(struct drm_connector *connector,
drm_WARN_ON(_priv->drm,
!drm_modeset_is_locked(_priv->drm.mode_config.connection_mutex));
+ if (!INTEL_DISPLAY_ENABLED(dev_priv))
+ return connector_status_disconnected;
+
/* Can't disconnect eDP */
if (intel_dp_is_edp(intel_dp))
status = edp_detect(intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index b6424bf5d544..64d885539e94 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -719,9 +719,13 @@ static int
intel_dp_mst_detect(struct drm_connector *connector,
struct drm_modeset_acquire_ctx *ctx, bool force)
{
+ struct drm_i915_private *i915 = to_i915(connector->dev);
struct intel_connector *intel_connector = to_intel_connector(connector);
struct intel_dp *intel_dp = intel_connector->mst_port;
+ if (!INTEL_DISPLAY_ENABLED(i915))
+ return connector_status_disconnected;
+
if (drm_connector_is_unregistered(connector))
return connector_status_disconnected;
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c
b/drivers/gpu/drm/i915/display/intel_dvo.c
index 307ed8ae9a19..237dbb1ba0ee 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo.c
+++ b/drivers/gpu/drm/i915/display/intel_dvo.c
@@ -313,9 +313,15 @@ static void intel_dvo_pre_enable(struct intel_atomic_state
*state,
static enum drm_connector_status
intel_dvo_detect(struct drm_connector *connector, bool force)
{
+
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix inconsistent IS_ERR and PTR_ERR
== Series Details ==
Series: drm/i915: Fix inconsistent IS_ERR and PTR_ERR
URL : https://patchwork.freedesktop.org/series/81554/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8995 -> Patchwork_18474
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/index.html
Known issues
Here are the changes found in Patchwork_18474 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-byt-j1900: [PASS][1] -> [DMESG-WARN][2] ([i915#1982])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
* igt@i915_selftest@live@gem_contexts:
- fi-tgl-u2: [PASS][3] -> [INCOMPLETE][4] ([i915#2045])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:
- fi-icl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) +1 similar
issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-icl-u2/igt@kms_cursor_leg...@basic-flip-before-cursor-atomic.html
* igt@prime_vgem@basic-read:
- fi-tgl-y: [PASS][7] -> [DMESG-WARN][8] ([i915#402])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@prime_v...@basic-read.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-tgl-y/igt@prime_v...@basic-read.html
Possible fixes
* igt@i915_module_load@reload:
- fi-bxt-dsi: [DMESG-WARN][9] ([i915#1635] / [i915#1982]) ->
[PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bxt-dsi/igt@i915_module_l...@reload.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-bxt-dsi/igt@i915_module_l...@reload.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14] +1
similar issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-bsw-kefka: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
- fi-skl-guc: [DMESG-WARN][17] ([i915#2203]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
* igt@kms_force_connector_basic@force-connector-state:
- fi-tgl-y: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20] +1
similar issue
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@kms_force_connector_ba...@force-connector-state.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-tgl-y/igt@kms_force_connector_ba...@force-connector-state.html
Warnings
* igt@kms_flip@basic-plain-flip@a-dp1:
- fi-kbl-x1275: [DMESG-WARN][21] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][22] ([i915#62] / [i915#92])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@kms_flip@basic-plain-f...@a-dp1.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18474/fi-kbl-x1275/igt@kms_flip@basic-plain-f...@a-dp1.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92]) ->
[DMESG-WARN][24] ([i915#62] / [i915#92] / [i915#95]) +2 similar issues
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
[24]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Reduce INTEL_DISPLAY_ENABLED to just removing the outputs (rev2)
== Series Details == Series: series starting with [1/2] drm/i915: Reduce INTEL_DISPLAY_ENABLED to just removing the outputs (rev2) URL : https://patchwork.freedesktop.org/series/81507/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8995 -> Patchwork_18473 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_18473 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18473, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/index.html Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_18473: ### IGT changes ### Possible regressions * igt@i915_pm_rpm@module-reload: - fi-byt-j1900: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-byt-j1900/igt@i915_pm_...@module-reload.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-byt-j1900/igt@i915_pm_...@module-reload.html * igt@i915_selftest@live@gem: - fi-ivb-3770:[PASS][3] -> [INCOMPLETE][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-ivb-3770/igt@i915_selftest@l...@gem.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-ivb-3770/igt@i915_selftest@l...@gem.html * igt@i915_selftest@live@gtt: - fi-ilk-650: [PASS][5] -> [INCOMPLETE][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-ilk-650/igt@i915_selftest@l...@gtt.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-ilk-650/igt@i915_selftest@l...@gtt.html * igt@i915_selftest@live@workarounds: - fi-blb-e6850: [PASS][7] -> [INCOMPLETE][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-blb-e6850/igt@i915_selftest@l...@workarounds.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-blb-e6850/igt@i915_selftest@l...@workarounds.html Known issues Here are the changes found in Patchwork_18473 that come from known issues: ### IGT changes ### Issues hit * igt@gem_flink_basic@flink-lifetime: - fi-tgl-y: [PASS][9] -> [DMESG-WARN][10] ([i915#402]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@gem_flink_ba...@flink-lifetime.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-tgl-y/igt@gem_flink_ba...@flink-lifetime.html * igt@i915_pm_rpm@module-reload: - fi-hsw-4770:[PASS][11] -> [FAIL][12] ([i915#579]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-hsw-4770/igt@i915_pm_...@module-reload.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-hsw-4770/igt@i915_pm_...@module-reload.html * igt@i915_selftest@live@dmabuf: - fi-icl-u2: [PASS][13] -> [DMESG-WARN][14] ([i915#289]) +31 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@i915_selftest@l...@dmabuf.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-icl-u2/igt@i915_selftest@l...@dmabuf.html * igt@i915_selftest@live@gem_contexts: - fi-tgl-u2: [PASS][15] -> [INCOMPLETE][16] ([i915#2045]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html * igt@i915_selftest@live@gtt: - fi-elk-e7500: [PASS][17] -> [INCOMPLETE][18] ([i915#66]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-elk-e7500/igt@i915_selftest@l...@gtt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-elk-e7500/igt@i915_selftest@l...@gtt.html * igt@i915_selftest@live@workarounds: - fi-pnv-d510:[PASS][19] -> [INCOMPLETE][20] ([i915#299]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-pnv-d510/igt@i915_selftest@l...@workarounds.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-pnv-d510/igt@i915_selftest@l...@workarounds.html - fi-gdg-551: [PASS][21] -> [INCOMPLETE][22] ([i915#172]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-gdg-551/igt@i915_selftest@l...@workarounds.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18473/fi-gdg-551/igt@i915_selftest@l...@workarounds.html * igt@kms_flip@basic-flip-vs-wf_vblank@c-edp1: - fi-icl-u2: [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@c-edp1.html [24]:
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/display: Add a vblank wait for FBC activation within same frame
== Series Details == Series: drm/i915/display: Add a vblank wait for FBC activation within same frame URL : https://patchwork.freedesktop.org/series/81550/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8994_full -> Patchwork_18470_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_18470_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18470_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_18470_full: ### IGT changes ### Possible regressions * igt@gem_exec_fence@syncobj-export: - shard-skl: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl4/igt@gem_exec_fe...@syncobj-export.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-skl10/igt@gem_exec_fe...@syncobj-export.html Known issues Here are the changes found in Patchwork_18470_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_reloc@basic-concurrent16: - shard-glk: [PASS][3] -> [INCOMPLETE][4] ([i915#1958] / [i915#2439]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk9/igt@gem_exec_re...@basic-concurrent16.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-glk6/igt@gem_exec_re...@basic-concurrent16.html * igt@gem_exec_reloc@basic-cpu-gtt-active: - shard-snb: [PASS][5] -> [INCOMPLETE][6] ([i915#2439] / [i915#82]) +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-snb2/igt@gem_exec_re...@basic-cpu-gtt-active.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-snb7/igt@gem_exec_re...@basic-cpu-gtt-active.html * igt@gem_exec_reloc@basic-wc-read-active: - shard-tglb: [PASS][7] -> [INCOMPLETE][8] ([i915#2439]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-tglb2/igt@gem_exec_re...@basic-wc-read-active.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-tglb2/igt@gem_exec_re...@basic-wc-read-active.html - shard-kbl: [PASS][9] -> [INCOMPLETE][10] ([i915#2439]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-kbl7/igt@gem_exec_re...@basic-wc-read-active.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-kbl2/igt@gem_exec_re...@basic-wc-read-active.html - shard-apl: [PASS][11] -> [INCOMPLETE][12] ([i915#1635] / [i915#2439]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-apl2/igt@gem_exec_re...@basic-wc-read-active.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-apl1/igt@gem_exec_re...@basic-wc-read-active.html * igt@gem_exec_reloc@basic-write-gtt-active: - shard-iclb: [PASS][13] -> [INCOMPLETE][14] ([i915#2439]) +1 similar issue [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-iclb5/igt@gem_exec_re...@basic-write-gtt-active.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-iclb1/igt@gem_exec_re...@basic-write-gtt-active.html - shard-glk: [PASS][15] -> [INCOMPLETE][16] ([i915#2439]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk8/igt@gem_exec_re...@basic-write-gtt-active.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-glk7/igt@gem_exec_re...@basic-write-gtt-active.html * igt@gem_exec_whisper@basic-queues-forked-all: - shard-skl: [PASS][17] -> [INCOMPLETE][18] ([i915#2439]) +5 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl1/igt@gem_exec_whis...@basic-queues-forked-all.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-skl6/igt@gem_exec_whis...@basic-queues-forked-all.html * igt@kms_big_fb@x-tiled-8bpp-rotate-180: - shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#1635] / [i915#1982]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-apl2/igt@kms_big...@x-tiled-8bpp-rotate-180.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/shard-apl2/igt@kms_big...@x-tiled-8bpp-rotate-180.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions: - shard-glk: [PASS][21] -> [DMESG-WARN][22] ([i915#1982]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk5/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [22]:
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: disable all display features when no display (rev2)
== Series Details ==
Series: series starting with [1/3] drm/i915: disable all display features when
no display (rev2)
URL : https://patchwork.freedesktop.org/series/81541/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8995 -> Patchwork_18472
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/index.html
Known issues
Here are the changes found in Patchwork_18472 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2: [PASS][1] -> [FAIL][2] ([i915#1888])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html
* igt@i915_selftest@live@execlists:
- fi-icl-y: [PASS][3] -> [INCOMPLETE][4] ([i915#2276])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-y/igt@i915_selftest@l...@execlists.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-icl-y/igt@i915_selftest@l...@execlists.html
* igt@i915_selftest@live@gem_contexts:
- fi-tgl-u2: [PASS][5] -> [INCOMPLETE][6] ([i915#2045])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-tgl-u2/igt@i915_selftest@live@gem_contexts.html
Possible fixes
* igt@i915_module_load@reload:
- fi-bxt-dsi: [DMESG-WARN][7] ([i915#1635] / [i915#1982]) ->
[PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bxt-dsi/igt@i915_module_l...@reload.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-bxt-dsi/igt@i915_module_l...@reload.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][9] ([i915#1982]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
- fi-kbl-x1275: [DMESG-WARN][11] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14] +1
similar issue
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_flip@basic-flip-vs-wf_vblank@c-hdmi-a2:
- fi-skl-guc: [DMESG-WARN][15] ([i915#2203]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-skl-guc/igt@kms_flip@basic-flip-vs-wf_vbl...@c-hdmi-a2.html
Warnings
* igt@kms_flip@basic-plain-flip@a-dp1:
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92] / [i915#95])
-> [DMESG-WARN][18] ([i915#62] / [i915#92])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@kms_flip@basic-plain-f...@a-dp1.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-kbl-x1275/igt@kms_flip@basic-plain-f...@a-dp1.html
* igt@kms_force_connector_basic@prune-stale-modes:
- fi-kbl-x1275: [DMESG-WARN][19] ([i915#62] / [i915#92]) ->
[DMESG-WARN][20] ([i915#62] / [i915#92] / [i915#95]) +5 similar issues
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18472/fi-kbl-x1275/igt@kms_force_connector_ba...@prune-stale-modes.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2045]: https://gitlab.freedesktop.org/drm/intel/issues/2045
[i915#2203]: https://gitlab.freedesktop.org/drm/intel/issues/2203
[i915#2276]: https://gitlab.freedesktop.org/drm/intel/issues/2276
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: disable all display features when no display (rev2)
== Series Details == Series: series starting with [1/3] drm/i915: disable all display features when no display (rev2) URL : https://patchwork.freedesktop.org/series/81541/ State : warning == Summary == $ dim checkpatch origin/drm-tip 744b4488a267 drm/i915: disable all display features when no display c82e72fb6cfc drm/i915: move gen4 GCDGMBUS save/restore to display save/restore -:35: CHECK:CAMELCASE: Avoid CamelCase: #35: FILE: drivers/gpu/drm/i915/i915_suspend.c:49: +_priv->regfile.saveGCDGMBUS); total: 0 errors, 0 warnings, 1 checks, 55 lines checked 14c7ebe95647 drm/i915: move gmbus restore to i915_restore_display ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915: Fix DMA mapped scatterlist lookup
From: Tvrtko Ursulin
As the previous patch fixed the places where we walk the whole scatterlist
for DMA addresses, this patch fixes the random lookup functionality.
To achieve this we have to add a second lookup iterator and add a
i915_gem_object_get_sg_dma helper, to be used analoguous to existing
i915_gem_object_get_sg_dma. Therefore two lookup caches are maintained per
object and they are flushed at the same point for simplicity. (Strictly
speaking the DMA cache should be flushed from i915_gem_gtt_finish_pages,
but today this conincides with unsetting of the pages in general.)
Partial VMA view is then fixed to use the new DMA lookup and properly
query sg length.
v2:
* Checkpatch.
Signed-off-by: Tvrtko Ursulin
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Matthew Auld
Cc: Lu Baolu
Cc: Tom Murphy
Cc: Logan Gunthorpe
---
drivers/gpu/drm/i915/gem/i915_gem_object.c| 2 ++
drivers/gpu/drm/i915/gem/i915_gem_object.h| 20 +-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 17 ---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 21 ---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 4 ++--
drivers/gpu/drm/i915/i915_scatterlist.h | 5 +
6 files changed, 51 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index c8421fd9d2dc..ffeaf1b9b1bb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -73,6 +73,8 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
obj->mm.madv = I915_MADV_WILLNEED;
INIT_RADIX_TREE(>mm.get_page.radix, GFP_KERNEL | __GFP_NOWARN);
mutex_init(>mm.get_page.lock);
+ INIT_RADIX_TREE(>mm.get_dma_page.radix, GFP_KERNEL | __GFP_NOWARN);
+ mutex_init(>mm.get_dma_page.lock);
if (IS_ENABLED(CONFIG_LOCKDEP) && i915_gem_object_is_shrinkable(obj))
i915_gem_shrinker_taints_mutex(to_i915(obj->base.dev),
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index d46db8d8f38e..44c6910e2669 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -275,8 +275,26 @@ int i915_gem_object_set_tiling(struct drm_i915_gem_object
*obj,
unsigned int tiling, unsigned int stride);
struct scatterlist *
+__i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
+struct i915_gem_object_page_iter *iter,
+unsigned int n,
+unsigned int *offset);
+
+static inline struct scatterlist *
i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
- unsigned int n, unsigned int *offset);
+ unsigned int n,
+ unsigned int *offset)
+{
+ return __i915_gem_object_get_sg(obj, >mm.get_page, n, offset);
+}
+
+static inline struct scatterlist *
+i915_gem_object_get_sg_dma(struct drm_i915_gem_object *obj,
+ unsigned int n,
+ unsigned int *offset)
+{
+ return __i915_gem_object_get_sg(obj, >mm.get_dma_page, n, offset);
+}
struct page *
i915_gem_object_get_page(struct drm_i915_gem_object *obj,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index b5c15557cc87..fedfebf13344 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -80,6 +80,14 @@ struct i915_mmap_offset {
struct rb_node offset;
};
+struct i915_gem_object_page_iter {
+ struct scatterlist *sg_pos;
+ unsigned int sg_idx; /* in pages, but 32bit eek! */
+
+ struct radix_tree_root radix;
+ struct mutex lock; /* protects this cache */
+};
+
struct drm_i915_gem_object {
struct drm_gem_object base;
@@ -246,13 +254,8 @@ struct drm_i915_gem_object {
I915_SELFTEST_DECLARE(unsigned int page_mask);
- struct i915_gem_object_page_iter {
- struct scatterlist *sg_pos;
- unsigned int sg_idx; /* in pages, but 32bit eek! */
-
- struct radix_tree_root radix;
- struct mutex lock; /* protects this cache */
- } get_page;
+ struct i915_gem_object_page_iter get_page;
+ struct i915_gem_object_page_iter get_dma_page;
/**
* Element within i915->mm.unbound_list or i915->mm.bound_list,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index e8a083743e09..04a3c1233f80 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -33,6 +33,8 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object
*obj,
obj->mm.get_page.sg_pos =
[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG (rev2)
== Series Details == Series: series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG (rev2) URL : https://patchwork.freedesktop.org/series/81461/ State : success == Summary == CI Bug Log - changes from CI_DRM_8994_full -> Patchwork_18469_full Summary --- **SUCCESS** No regressions found. Known issues Here are the changes found in Patchwork_18469_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_reloc@basic-concurrent16: - shard-glk: [PASS][1] -> [INCOMPLETE][2] ([i915#1958] / [i915#2439]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk9/igt@gem_exec_re...@basic-concurrent16.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-glk1/igt@gem_exec_re...@basic-concurrent16.html * igt@gem_exec_reloc@basic-cpu-active: - shard-apl: [PASS][3] -> [INCOMPLETE][4] ([i915#1635] / [i915#2439]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-apl8/igt@gem_exec_re...@basic-cpu-active.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-apl7/igt@gem_exec_re...@basic-cpu-active.html * igt@gem_exec_reloc@basic-cpu-gtt-active: - shard-skl: [PASS][5] -> [INCOMPLETE][6] ([i915#2439]) +6 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl7/igt@gem_exec_re...@basic-cpu-gtt-active.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-skl3/igt@gem_exec_re...@basic-cpu-gtt-active.html - shard-snb: [PASS][7] -> [INCOMPLETE][8] ([i915#2439] / [i915#82]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-snb2/igt@gem_exec_re...@basic-cpu-gtt-active.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-snb2/igt@gem_exec_re...@basic-cpu-gtt-active.html * igt@gem_exec_reloc@basic-write-read-active: - shard-glk: [PASS][9] -> [INCOMPLETE][10] ([i915#2439]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk6/igt@gem_exec_re...@basic-write-read-active.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-glk1/igt@gem_exec_re...@basic-write-read-active.html * igt@gem_exec_schedule@deep@rcs0: - shard-tglb: [PASS][11] -> [INCOMPLETE][12] ([i915#2439]) +4 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-tglb3/igt@gem_exec_schedule@d...@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-tglb6/igt@gem_exec_schedule@d...@rcs0.html * igt@gem_exec_whisper@basic-forked: - shard-kbl: [PASS][13] -> [INCOMPLETE][14] ([i915#2439]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-kbl1/igt@gem_exec_whis...@basic-forked.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-kbl4/igt@gem_exec_whis...@basic-forked.html * igt@gem_exec_whisper@basic-queues-all: - shard-iclb: [PASS][15] -> [INCOMPLETE][16] ([i915#2439]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-iclb5/igt@gem_exec_whis...@basic-queues-all.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-iclb6/igt@gem_exec_whis...@basic-queues-all.html * igt@gem_userptr_blits@unsync-unmap-cycles: - shard-skl: [PASS][17] -> [TIMEOUT][18] ([i915#1958]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl9/igt@gem_userptr_bl...@unsync-unmap-cycles.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-skl4/igt@gem_userptr_bl...@unsync-unmap-cycles.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions: - shard-tglb: [PASS][19] -> [DMESG-WARN][20] ([i915#1982]) +1 similar issue [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-tglb1/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-tglb2/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html - shard-glk: [PASS][21] -> [DMESG-WARN][22] ([i915#1982]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk5/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-glk8/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html * igt@kms_flip@flip-vs-suspend-interruptible@b-edp1: - shard-skl: [PASS][23] -> [INCOMPLETE][24] ([i915#198]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl10/igt@kms_flip@flip-vs-suspend-interrupti...@b-edp1.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/shard-skl9/igt@kms_flip@flip-vs-suspend-interrupti...@b-edp1.html *
[Intel-gfx] ✓ Fi.CI.BAT: success for Fixes for incoming smarter IOMMU
== Series Details ==
Series: Fixes for incoming smarter IOMMU
URL : https://patchwork.freedesktop.org/series/81552/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8995 -> Patchwork_18471
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/index.html
Known issues
Here are the changes found in Patchwork_18471 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_tiled_blits@basic:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@gem_tiled_bl...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-tgl-y/igt@gem_tiled_bl...@basic.html
* igt@i915_module_load@reload:
- fi-apl-guc: [PASS][3] -> [DMESG-WARN][4] ([i915#1635] /
[i915#1982])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-apl-guc/igt@i915_module_l...@reload.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-apl-guc/igt@i915_module_l...@reload.html
- fi-tgl-y: [PASS][5] -> [DMESG-WARN][6] ([i915#1982])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@i915_module_l...@reload.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-tgl-y/igt@i915_module_l...@reload.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-byt-j1900: [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
* igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1:
- fi-icl-u2: [PASS][9] -> [DMESG-WARN][10] ([i915#1982])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vbl...@b-edp1.html
Possible fixes
* igt@gem_flink_basic@bad-flink:
- fi-tgl-y: [DMESG-WARN][11] ([i915#402]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-tgl-y/igt@gem_flink_ba...@bad-flink.html
* igt@i915_module_load@reload:
- fi-bxt-dsi: [DMESG-WARN][13] ([i915#1635] / [i915#1982]) ->
[PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bxt-dsi/igt@i915_module_l...@reload.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-bxt-dsi/igt@i915_module_l...@reload.html
* igt@kms_busy@basic@flip:
- {fi-tgl-dsi}: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-tgl-dsi/igt@kms_busy@ba...@flip.html
- fi-kbl-x1275: [DMESG-WARN][17] ([i915#62] / [i915#92] / [i915#95])
-> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-kbl-x1275/igt@kms_busy@ba...@flip.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-icl-u2: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20] +1
similar issue
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-bsw-kefka: [DMESG-WARN][21] ([i915#1982]) -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-bsw-kefka/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_force_connector_basic@force-connector-state:
- fi-tgl-y: [DMESG-WARN][23] ([i915#1982]) -> [PASS][24] +1
similar issue
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-tgl-y/igt@kms_force_connector_ba...@force-connector-state.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18471/fi-tgl-y/igt@kms_force_connector_ba...@force-connector-state.html
Warnings
* igt@i915_pm_rpm@module-reload:
- fi-kbl-x1275: [DMESG-FAIL][25] ([i915#62]) -> [DMESG-FAIL][26]
([i915#62] / [i915#95])
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8995/fi-kbl-x1275/igt@i915_pm_...@module-reload.html
[26]:
Re: [Intel-gfx] [PATCH v2 07/18] drm/dp: Pimp drm_dp_downstream_max_bpc()
On Tue, Sep 08, 2020 at 01:51:56PM -0400, Lyude Paul wrote:
> On Fri, 2020-09-04 at 14:53 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Deal with more cases in drm_dp_downstream_max_bpc():
> > - DPCD 1.0 -> assume 8bpc for non-DP
> > - DPCD 1.1+ DP (or DP++ with DP sink) -> allow anything
> > - DPCD 1.1+ TMDS -> check the caps, assume 8bpc if the value is crap
> > - anything else -> assume 8bpc
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/drm_dp_helper.c | 69 +++
> > .../drm/i915/display/intel_display_debugfs.c | 3 +-
> > drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> > include/drm/drm_dp_helper.h | 10 ++-
> > 4 files changed, 51 insertions(+), 33 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > b/drivers/gpu/drm/drm_dp_helper.c
> > index 0fcb94f7dbe5..ab87209c25d8 100644
> > --- a/drivers/gpu/drm/drm_dp_helper.c
> > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > @@ -653,36 +653,44 @@ int drm_dp_downstream_max_clock(const u8
> > dpcd[DP_RECEIVER_CAP_SIZE],
> > EXPORT_SYMBOL(drm_dp_downstream_max_clock);
> >
> > /**
> > - * drm_dp_downstream_max_bpc() - extract branch device max
> > - * bits per component
> > - * @dpcd: DisplayPort configuration data
> > - * @port_cap: port capabilities
> > - *
> > - * See also:
> > - * drm_dp_read_downstream_info()
> > - * drm_dp_downstream_max_clock()
> > - *
> > - * Returns: Max bpc on success or 0 if max bpc not defined
> > - */
> > + * drm_dp_downstream_max_bpc() - extract downstream facing port max
> > + * bits per component
> > + * @dpcd: DisplayPort configuration data
> > + * @port_cap: downstream facing port capabilities
> > + * @edid: EDID
> > + *
> > + * Returns max bpc on success or 0 if max bpc not defined
> > + */
> > int drm_dp_downstream_max_bpc(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
> > - const u8 port_cap[4])
> > + const u8 port_cap[4],
> > + const struct edid *edid)
> > {
> > - int type = port_cap[0] & DP_DS_PORT_TYPE_MASK;
> > - bool detailed_cap_info = dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > - DP_DETAILED_CAP_INFO_AVAILABLE;
> > - int bpc;
> > -
> > - if (!detailed_cap_info)
>
> I don't think we can drop this check. There's a somewhat surprising blurb
> about downstream port caps in the DP 2.0 spec (section 5.3.3.1):
>
>In addition, the adapter shall set the Detailed Capabilities Info registers
>(DPCD Addresses 00080h through 0008Fh) to show all the downstream types,
>including DFP 0. Either one or four bytes are used, per DFP type
>indication. Therefore, up to 16 (with 1-byte descriptor) or four (with 4-
>byte descriptor) DFP capabilities can be stored.
>
> I've never once actually seen a sink do this, but this does mean it's
> technically possible tthat if we don't check the detailed caps bit then we
> might end up reading another port's DFP type instead of max_bpc info. Note
> though that we can make the assumption the four byte version of the field is
> used for DP 1.4+
The check is now ...
>
> > + if (!drm_dp_is_branch(dpcd))
> > return 0;
> >
> > - switch (type) {
> > - case DP_DS_PORT_TYPE_VGA:
> > - case DP_DS_PORT_TYPE_DVI:
> > - case DP_DS_PORT_TYPE_HDMI:
> > + if (dpcd[DP_DPCD_REV] < 0x11) {
> > + switch (dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > DP_DWN_STRM_PORT_TYPE_MASK) {
> > + case DP_DWN_STRM_PORT_TYPE_DP:
> > + return 0;
> > + default:
> > + return 8;
> > + }
> > + }
> > +
> > + switch (port_cap[0] & DP_DS_PORT_TYPE_MASK) {
> > + case DP_DS_PORT_TYPE_DP:
> > + return 0;
> > case DP_DS_PORT_TYPE_DP_DUALMODE:
> > - bpc = port_cap[2] & DP_DS_MAX_BPC_MASK;
> > + if (is_edid_digital_input_dp(edid))
> > + return 0;
> > + fallthrough;
> > + case DP_DS_PORT_TYPE_HDMI:
> > + case DP_DS_PORT_TYPE_DVI:
> > + case DP_DS_PORT_TYPE_VGA:
> > + if ((dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > DP_DETAILED_CAP_INFO_AVAILABLE) == 0)
> > + return 8;
... here
> >
> > - switch (bpc) {
> > + switch (port_cap[2] & DP_DS_MAX_BPC_MASK) {
> > case DP_DS_8BPC:
> > return 8;
> > case DP_DS_10BPC:
> > @@ -691,10 +699,12 @@ int drm_dp_downstream_max_bpc(const u8
> > dpcd[DP_RECEIVER_CAP_SIZE],
> > return 12;
> > case DP_DS_16BPC:
> > return 16;
> > + default:
> > + return 8;
> > }
> > - fallthrough;
> > + break;
> > default:
> > - return 0;
> > + return 8;
> > }
> > }
> > EXPORT_SYMBOL(drm_dp_downstream_max_bpc);
> > @@ -717,12 +727,15 @@
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fixes for incoming smarter IOMMU
== Series Details == Series: Fixes for incoming smarter IOMMU URL : https://patchwork.freedesktop.org/series/81552/ State : warning == Summary == $ dim checkpatch origin/drm-tip 47b38f77a065 drm/i915: Fix DMA mapped scatterlist walks 1f4eba21c445 drm/i915: Fix DMA mapped scatterlist lookup -:64: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #64: FILE: drivers/gpu/drm/i915/gem/i915_gem_object.h:293: +i915_gem_object_get_sg_dma(struct drm_i915_gem_object *obj, + unsigned int n, total: 0 errors, 0 warnings, 1 checks, 155 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix slightly botched merge in __reloc_entry_gpu
== Series Details == Series: drm/i915: Fix slightly botched merge in __reloc_entry_gpu URL : https://patchwork.freedesktop.org/series/81549/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8994_full -> Patchwork_18468_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_18468_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18468_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_18468_full: ### IGT changes ### Possible regressions * igt@i915_selftest@live@perf: - shard-skl: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-skl8/igt@i915_selftest@l...@perf.html Known issues Here are the changes found in Patchwork_18468_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_userptr_blits@unsync-unmap-cycles: - shard-skl: [PASS][2] -> [TIMEOUT][3] ([i915#1958]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl9/igt@gem_userptr_bl...@unsync-unmap-cycles.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-skl2/igt@gem_userptr_bl...@unsync-unmap-cycles.html * igt@i915_selftest@mock@contexts: - shard-apl: [PASS][4] -> [INCOMPLETE][5] ([i915#1635] / [i915#2278]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-apl3/igt@i915_selftest@m...@contexts.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-apl6/igt@i915_selftest@m...@contexts.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions: - shard-glk: [PASS][6] -> [DMESG-WARN][7] ([i915#1982]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk5/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-glk8/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-dp1: - shard-kbl: [PASS][8] -> [FAIL][9] ([i915#79]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-kbl7/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-dp1.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-kbl7/igt@kms_flip@flip-vs-expired-vblank-interrupti...@b-dp1.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2: - shard-glk: [PASS][10] -> [FAIL][11] ([i915#79]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-hdmi-a2.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interrupti...@c-hdmi-a2.html * igt@kms_flip@flip-vs-expired-vblank@b-edp1: - shard-skl: [PASS][12] -> [FAIL][13] ([i915#79]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl6/igt@kms_flip@flip-vs-expired-vbl...@b-edp1.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-skl1/igt@kms_flip@flip-vs-expired-vbl...@b-edp1.html * igt@kms_flip@flip-vs-suspend-interruptible@b-edp1: - shard-skl: [PASS][14] -> [INCOMPLETE][15] ([i915#198]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl10/igt@kms_flip@flip-vs-suspend-interrupti...@b-edp1.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-skl6/igt@kms_flip@flip-vs-suspend-interrupti...@b-edp1.html * igt@kms_flip@plain-flip-ts-check@b-hdmi-a2: - shard-glk: [PASS][16] -> [FAIL][17] ([i915#2122]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk3/igt@kms_flip@plain-flip-ts-ch...@b-hdmi-a2.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-glk6/igt@kms_flip@plain-flip-ts-ch...@b-hdmi-a2.html * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-blt: - shard-skl: [PASS][18] -> [DMESG-WARN][19] ([i915#1982]) +4 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl9/igt@kms_frontbuffer_track...@psr-rgb101010-draw-blt.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/shard-skl2/igt@kms_frontbuffer_track...@psr-rgb101010-draw-blt.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][20] -> [FAIL][21] ([fdo#108145] / [i915#265]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl2/igt@kms_plane_alpha_bl...@pipe-c-coverage-7efc.html [21]:
Re: [Intel-gfx] [PATCH] drm/i915/display: Add a vblank wait for FBC activation within same frame
> -Original Message-
> From: Ville Syrjälä
> Sent: Thursday, September 10, 2020 7:22 PM
> To: Shankar, Uma
> Cc: Jani Nikula ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Add a vblank wait for FBC
> activation within same frame
>
> On Thu, Sep 10, 2020 at 01:42:23PM +, Shankar, Uma wrote:
> >
> >
> > > -Original Message-
> > > From: Jani Nikula
> > > Sent: Thursday, September 10, 2020 7:04 PM
> > > To: Shankar, Uma ;
> > > intel-gfx@lists.freedesktop.org
> > > Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Add a vblank wait
> > > for FBC activation within same frame
> > >
> > > On Thu, 10 Sep 2020, Uma Shankar wrote:
> > > > Add a vblank wait when fbc activation request comes for the same
> > > > frame on TGL. This helps fix underrun related to fbc.
> > > >
> > > > Signed-off-by: Uma Shankar
> > > > ---
> > > > drivers/gpu/drm/i915/display/intel_fbc.c | 13 +++--
> > > > 1 file changed, 11 insertions(+), 2 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > > index 135f5e8a4d70..3e1d715e4a4e 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > > @@ -1055,6 +1055,7 @@ static void __intel_fbc_post_update(struct
> > > > intel_crtc *crtc) {
> > > > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > > struct intel_fbc *fbc = _priv->fbc;
> > > > + static u32 old_frame_cnt, new_frame_cnt;
> > >
> > > In the strongest terms, do not add static data. These would be
> > > shared across devices, which is certainly a bug.
> >
> > Oh ok, yeah will remove this. I guess adding them to intel_fbc should be ok
> right ?
>
> I didn't think we found what's really going on here. So this still seems like
> random duct tape which just changs some timings.
Yeah Ville, this still is a WA to avoid multiple FBC activation within frame.
Adding the frame counter checks
to avoid waits on all updates.
More analysis still ongoing and issue is raised with hw team as well for
further analysis.
My idea was to get the health of this WA on CI and general feedback if this can
be considered as a
fallback option.
Regards,
Uma Shankar
> > >
> > > > drm_WARN_ON(_priv->drm, !mutex_is_locked(>lock));
> > > >
> > > > @@ -1075,10 +1076,18 @@ static void __intel_fbc_post_update(struct
> > > intel_crtc *crtc)
> > > > if (!intel_fbc_can_activate(crtc))
> > > > return;
> > > >
> > > > - if (!fbc->busy_bits)
> > > > + old_frame_cnt = new_frame_cnt;
> > > > + new_frame_cnt = intel_crtc_get_vblank_counter(crtc);
> > > > + if (!fbc->busy_bits) {
> > > > + if (IS_TIGERLAKE(dev_priv) &&
> > > > + old_frame_cnt == new_frame_cnt) {
> > > > + drm_dbg_kms(_priv->drm, "Wait for vblank
> > > > before
> > > Activating FBC");
> > > > + intel_wait_for_vblank_if_active(dev_priv,
> > > > crtc->pipe);
> > > > + }
> > > > intel_fbc_hw_activate(dev_priv);
> > > > - else
> > > > + } else {
> > > > intel_fbc_deactivate(dev_priv, "frontbuffer write");
> > > > + }
> > > > }
> > > >
> > > > void intel_fbc_post_update(struct intel_atomic_state *state,
> > >
> > > --
> > > Jani Nikula, Intel Open Source Graphics Center
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
> --
> Ville Syrjälä
> Intel
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Re: [Intel-gfx] [PATCH v2 10/18] drm/dp: Add drm_dp_downstream_{min, max}_tmds_clock()
On Tue, Sep 08, 2020 at 02:08:17PM -0400, Lyude Paul wrote:
> On Fri, 2020-09-04 at 14:53 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Add helpers to get the TMDS clock limits for HDMI/DVI downstream
> > facing ports.
> >
> > Signed-off-by: Ville Syrjälä
> > ---
> > drivers/gpu/drm/drm_dp_helper.c | 116
> > include/drm/drm_dp_helper.h | 6 ++
> > 2 files changed, 122 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > b/drivers/gpu/drm/drm_dp_helper.c
> > index 822a30e609ef..f567428f2aef 100644
> > --- a/drivers/gpu/drm/drm_dp_helper.c
> > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > @@ -643,6 +643,114 @@ int drm_dp_downstream_max_dotclock(const u8
> > dpcd[DP_RECEIVER_CAP_SIZE],
> > }
> > EXPORT_SYMBOL(drm_dp_downstream_max_dotclock);
> >
> > +/**
> > + * drm_dp_downstream_max_tmds_clock() - extract downstream facing port max
> > TMDS clock
> > + * @dpcd: DisplayPort configuration data
> > + * @port_cap: port capabilities
> > + * @edid: EDID
> > + *
> > + * Returns HDMI/DVI downstream facing port max TMDS clock in kHz on
> > success,
> > + * or 0 if max TMDS clock not defined
> > + */
> > +int drm_dp_downstream_max_tmds_clock(const u8 dpcd[DP_RECEIVER_CAP_SIZE],
> > +const u8 port_cap[4],
> > +const struct edid *edid)
> > +{
> > + if (!drm_dp_is_branch(dpcd))
> > + return 0;
> > +
> > + if (dpcd[DP_DPCD_REV] < 0x11) {
> > + switch (dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > DP_DWN_STRM_PORT_TYPE_MASK) {
> > + case DP_DWN_STRM_PORT_TYPE_TMDS:
> > + return 165000;
> > + default:
> > + return 0;
> > + }
> > + }
> > +
> > + switch (port_cap[0] & DP_DS_PORT_TYPE_MASK) {
> > + case DP_DS_PORT_TYPE_DP_DUALMODE:
> > + if (is_edid_digital_input_dp(edid))
> > + return 0;
> > + /*
> > +* It's left up to the driver to check the
> > +* DP dual mode adapter's max TMDS clock.
> > +*
> > +* Unfortunatley it looks like branch devices
> > +* may not fordward that the DP dual mode i2c
> > +* access so we just usually get i2c nak :(
> > +*/
> > + fallthrough;
> > + case DP_DS_PORT_TYPE_HDMI:
> > +/*
> > + * We should perhaps assume 165 MHz when detailed cap
> > + * info is not available. But looks like many typical
> > + * branch devices fall into that category and so we'd
> > + * probably end up with users complaining that they can't
> > + * get high resolution modes with their favorite dongle.
> > + *
> > + * So let's limit to 300 MHz instead since DPCD 1.4
> > + * HDMI 2.0 DFPs are required to have the detailed cap
> > + * info. So it's more likely we're dealing with a HDMI 1.4
> > + * compatible* device here.
>
> Forgot to mention - not directly related to this series, there's some hidden
> i2c bits that I think can also be probed for this sort of information on
> passive adapters, I know amdgpu actually supports this. I wonder how many of
> them also apply to older active adapters...
Something other than the normal DP dual mode stuff?
--
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Re: [Intel-gfx] [PATCH] drm/i915/display: Add a vblank wait for FBC activation within same frame
On Thu, Sep 10, 2020 at 01:42:23PM +, Shankar, Uma wrote:
>
>
> > -Original Message-
> > From: Jani Nikula
> > Sent: Thursday, September 10, 2020 7:04 PM
> > To: Shankar, Uma ; intel-gfx@lists.freedesktop.org
> > Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Add a vblank wait for FBC
> > activation within same frame
> >
> > On Thu, 10 Sep 2020, Uma Shankar wrote:
> > > Add a vblank wait when fbc activation request comes for the same frame
> > > on TGL. This helps fix underrun related to fbc.
> > >
> > > Signed-off-by: Uma Shankar
> > > ---
> > > drivers/gpu/drm/i915/display/intel_fbc.c | 13 +++--
> > > 1 file changed, 11 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > index 135f5e8a4d70..3e1d715e4a4e 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > > @@ -1055,6 +1055,7 @@ static void __intel_fbc_post_update(struct
> > > intel_crtc *crtc) {
> > > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > > struct intel_fbc *fbc = _priv->fbc;
> > > + static u32 old_frame_cnt, new_frame_cnt;
> >
> > In the strongest terms, do not add static data. These would be shared across
> > devices, which is certainly a bug.
>
> Oh ok, yeah will remove this. I guess adding them to intel_fbc should be ok
> right ?
I didn't think we found what's really going on here. So this still
seems like random duct tape which just changs some timings.
>
> Thanks & Regards,
> Uma Shankar
>
> > BR,
> > Jani.
> >
> > >
> > > drm_WARN_ON(_priv->drm, !mutex_is_locked(>lock));
> > >
> > > @@ -1075,10 +1076,18 @@ static void __intel_fbc_post_update(struct
> > intel_crtc *crtc)
> > > if (!intel_fbc_can_activate(crtc))
> > > return;
> > >
> > > - if (!fbc->busy_bits)
> > > + old_frame_cnt = new_frame_cnt;
> > > + new_frame_cnt = intel_crtc_get_vblank_counter(crtc);
> > > + if (!fbc->busy_bits) {
> > > + if (IS_TIGERLAKE(dev_priv) &&
> > > + old_frame_cnt == new_frame_cnt) {
> > > + drm_dbg_kms(_priv->drm, "Wait for vblank before
> > Activating FBC");
> > > + intel_wait_for_vblank_if_active(dev_priv, crtc->pipe);
> > > + }
> > > intel_fbc_hw_activate(dev_priv);
> > > - else
> > > + } else {
> > > intel_fbc_deactivate(dev_priv, "frontbuffer write");
> > > + }
> > > }
> > >
> > > void intel_fbc_post_update(struct intel_atomic_state *state,
> >
> > --
> > Jani Nikula, Intel Open Source Graphics Center
> ___
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> Intel-gfx@lists.freedesktop.org
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--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
> diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c > index e32ef3f01fe8..b13b1cbcac29 100644 > --- a/drivers/i2c/busses/i2c-i801.c > +++ b/drivers/i2c/busses/i2c-i801.c > @@ -1785,7 +1785,7 @@ static int i801_probe(struct pci_dev *dev, const struct > pci_device_id *id) > fallthrough; > case PCI_DEVICE_ID_INTEL_82801CA_3: > priv->features |= FEATURE_HOST_NOTIFY; > - fallthrough; > + break; > case PCI_DEVICE_ID_INTEL_82801BA_2: > case PCI_DEVICE_ID_INTEL_82801AB_3: > case PCI_DEVICE_ID_INTEL_82801AA_3: I am not the maintainer (Jean is) but I suggest to drop this hunk. The code is more complex with multiple 'fallthrough', so this change alone actually makes the code inconsistent. A rework would need a seperate patch. signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
On Wed, Sep 09, 2020 at 01:06:39PM -0700, Joe Perches wrote:
> diff --git a/crypto/tcrypt.c b/crypto/tcrypt.c
> index eea0f453cfb6..8aac5bc60f4c 100644
> --- a/crypto/tcrypt.c
> +++ b/crypto/tcrypt.c
> @@ -2464,7 +2464,7 @@ static int do_test(const char *alg, u32 type, u32 mask,
> int m, u32 num_mb)
> test_hash_speed("streebog512", sec,
> generic_hash_speed_template);
> if (mode > 300 && mode < 400) break;
> - fallthrough;
> + break;
> case 399:
> break;
Just imho, this change makes the preceding 'if' look even more
pointless. Maybe the fallthrough was a deliberate choice? Not that my
opinion matters here as I don't know this module, but it looked a bit
odd to me.
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Re: [Intel-gfx] [PATCH 2/2] drm/i915: Fix DMA mapped scatterlist lookup
This patch series fixes the issue I was having. I tested it with my
patch set ("[PATCH V2 0/5] Convert the intel iommu driver to the
dma-iommu api") applied, excluding the last patch in that series which
disables the coalescing.
So once your patch set is merged we should be good to convert the
intel iommu driver to the dma-iommu api
On Thu, 10 Sep 2020 at 12:59, Tvrtko Ursulin
wrote:
>
> From: Tvrtko Ursulin
>
> As the previous patch fixed the places where we walk the whole scatterlist
> for DMA addresses, this patch fixes the random lookup functionality.
>
> To achieve this we have to add a second lookup iterator and add a
> i915_gem_object_get_sg_dma helper, to be used analoguous to existing
> i915_gem_object_get_sg_dma. Therefore two lookup caches are maintained per
> object and they are flushed at the same point for simplicity. (Strictly
> speaking the DMA cache should be flushed from i915_gem_gtt_finish_pages,
> but today this conincides with unsetting of the pages in general.)
>
> Partial VMA view is then fixed to use the new DMA lookup and properly
> query sg length.
>
> Signed-off-by: Tvrtko Ursulin
> Cc: Joonas Lahtinen
> Cc: Chris Wilson
> Cc: Matthew Auld
> Cc: Lu Baolu
> Cc: Tom Murphy
> Cc: Logan Gunthorpe
> ---
> drivers/gpu/drm/i915/gem/i915_gem_object.c| 2 ++
> drivers/gpu/drm/i915/gem/i915_gem_object.h| 20 +-
> .../gpu/drm/i915/gem/i915_gem_object_types.h | 17 ---
> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 21 ---
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 4 ++--
> drivers/gpu/drm/i915/i915_scatterlist.h | 5 +
> 6 files changed, 51 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
> b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> index c8421fd9d2dc..ffeaf1b9b1bb 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
> @@ -73,6 +73,8 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
> obj->mm.madv = I915_MADV_WILLNEED;
> INIT_RADIX_TREE(>mm.get_page.radix, GFP_KERNEL | __GFP_NOWARN);
> mutex_init(>mm.get_page.lock);
> + INIT_RADIX_TREE(>mm.get_dma_page.radix, GFP_KERNEL |
> __GFP_NOWARN);
> + mutex_init(>mm.get_dma_page.lock);
>
> if (IS_ENABLED(CONFIG_LOCKDEP) && i915_gem_object_is_shrinkable(obj))
> i915_gem_shrinker_taints_mutex(to_i915(obj->base.dev),
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h
> b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> index d46db8d8f38e..7ba5e958a3d0 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
> @@ -275,8 +275,26 @@ int i915_gem_object_set_tiling(struct
> drm_i915_gem_object *obj,
>unsigned int tiling, unsigned int stride);
>
> struct scatterlist *
> +__i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
> +struct i915_gem_object_page_iter *iter,
> +unsigned int n,
> +unsigned int *offset);
> +
> +static inline struct scatterlist *
> i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
> - unsigned int n, unsigned int *offset);
> + unsigned int n,
> + unsigned int *offset)
> +{
> + return __i915_gem_object_get_sg(obj, >mm.get_page, n, offset);
> +}
> +
> +static inline struct scatterlist *
> +i915_gem_object_get_sg_dma(struct drm_i915_gem_object *obj,
> + unsigned int n,
> + unsigned int *offset)
> +{
> + return __i915_gem_object_get_sg(obj, >mm.get_dma_page, n,
> offset);
> +}
>
> struct page *
> i915_gem_object_get_page(struct drm_i915_gem_object *obj,
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> index b5c15557cc87..fedfebf13344 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
> @@ -80,6 +80,14 @@ struct i915_mmap_offset {
> struct rb_node offset;
> };
>
> +struct i915_gem_object_page_iter {
> + struct scatterlist *sg_pos;
> + unsigned int sg_idx; /* in pages, but 32bit eek! */
> +
> + struct radix_tree_root radix;
> + struct mutex lock; /* protects this cache */
> +};
> +
> struct drm_i915_gem_object {
> struct drm_gem_object base;
>
> @@ -246,13 +254,8 @@ struct drm_i915_gem_object {
>
> I915_SELFTEST_DECLARE(unsigned int page_mask);
>
> - struct i915_gem_object_page_iter {
> - struct scatterlist *sg_pos;
> - unsigned int sg_idx; /* in pages, but 32bit eek! */
> -
> - struct radix_tree_root radix;
> - struct mutex lock; /* protects this cache */
> - } get_page;
> +
Re: [Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
Em Wed, 09 Sep 2020 13:06:39 -0700
Joe Perches escreveu:
> fallthrough to a separate case/default label break; isn't very readable.
>
> Convert pseudo-keyword fallthrough; statements to a simple break; when
> the next label is case or default and the only statement in the next
> label block is break;
>
> Found using:
>
> $ grep-2.5.4 -rP --include=*.[ch] -n
> "fallthrough;(\s*(case\s+\w+|default)\s*:\s*){1,7}break;" *
>
> Miscellanea:
>
> o Move or coalesce a couple label blocks above a default: block.
>
> Signed-off-by: Joe Perches
> ---
>
> Compiled allyesconfig x86-64 only.
> A few files for other arches were not compiled.
>
> drivers/media/dvb-frontends/drxd_hard.c | 2 +-
> drivers/media/i2c/ov5640.c| 2 +-
> drivers/media/i2c/ov6650.c| 5 ++---
> drivers/media/i2c/smiapp/smiapp-core.c| 2 +-
> drivers/media/i2c/tvp5150.c | 2 +-
> drivers/media/pci/ddbridge/ddbridge-core.c| 2 +-
> drivers/media/usb/cpia2/cpia2_core.c | 2 +-
For media drivers:
Reviewed-by: Mauro Carvalho Chehab
Thanks,
Mauro
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Re: [Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
On Wed, Sep 9, 2020 at 10:10 PM Joe Perches wrote:
>
> fallthrough to a separate case/default label break; isn't very readable.
>
> Convert pseudo-keyword fallthrough; statements to a simple break; when
> the next label is case or default and the only statement in the next
> label block is break;
>
> Found using:
>
> $ grep-2.5.4 -rP --include=*.[ch] -n
> "fallthrough;(\s*(case\s+\w+|default)\s*:\s*){1,7}break;" *
>
> Miscellanea:
>
> o Move or coalesce a couple label blocks above a default: block.
>
> Signed-off-by: Joe Perches
> ---
>
> Compiled allyesconfig x86-64 only.
> A few files for other arches were not compiled.
>
> arch/arm/mach-mmp/pm-pxa910.c | 2 +-
> arch/arm64/kvm/handle_exit.c | 2 +-
> arch/mips/kernel/cpu-probe.c | 2 +-
> arch/mips/math-emu/cp1emu.c | 2 +-
> arch/s390/pci/pci.c | 2 +-
> crypto/tcrypt.c | 4 ++--
> drivers/ata/sata_mv.c | 2 +-
> drivers/atm/lanai.c | 2 +-
> drivers/gpu/drm/i915/display/intel_sprite.c | 2 +-
> drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmi.c | 2 +-
> drivers/hid/wacom_wac.c | 2 +-
> drivers/i2c/busses/i2c-i801.c | 2 +-
> drivers/infiniband/ulp/rtrs/rtrs-clt.c| 14 +++---
> drivers/infiniband/ulp/rtrs/rtrs-srv.c| 6 +++---
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 2 +-
> drivers/irqchip/irq-vic.c | 4 ++--
> drivers/md/dm.c | 2 +-
> drivers/media/dvb-frontends/drxd_hard.c | 2 +-
> drivers/media/i2c/ov5640.c| 2 +-
> drivers/media/i2c/ov6650.c| 5 ++---
> drivers/media/i2c/smiapp/smiapp-core.c| 2 +-
> drivers/media/i2c/tvp5150.c | 2 +-
> drivers/media/pci/ddbridge/ddbridge-core.c| 2 +-
> drivers/media/usb/cpia2/cpia2_core.c | 2 +-
> drivers/mfd/iqs62x.c | 3 +--
> drivers/mmc/host/atmel-mci.c | 2 +-
> drivers/mtd/nand/raw/nandsim.c| 2 +-
> drivers/net/ethernet/intel/e1000e/phy.c | 2 +-
> drivers/net/ethernet/intel/fm10k/fm10k_pf.c | 2 +-
> drivers/net/ethernet/intel/i40e/i40e_adminq.c | 2 +-
> drivers/net/ethernet/intel/i40e/i40e_txrx.c | 2 +-
> drivers/net/ethernet/intel/iavf/iavf_txrx.c | 2 +-
> drivers/net/ethernet/intel/igb/e1000_phy.c| 2 +-
> drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c| 2 +-
> drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 2 +-
> drivers/net/ethernet/intel/ixgbe/ixgbe_sriov.c| 2 +-
> drivers/net/ethernet/intel/ixgbevf/vf.c | 2 +-
> drivers/net/ethernet/netronome/nfp/nfpcore/nfp6000_pcie.c | 2 +-
> drivers/net/ethernet/qlogic/qed/qed_mcp.c | 2 +-
> drivers/net/ethernet/sfc/falcon/farch.c | 2 +-
> drivers/net/ethernet/sfc/farch.c | 2 +-
> drivers/net/phy/adin.c| 3 +--
> drivers/net/usb/pegasus.c | 4 ++--
> drivers/net/usb/usbnet.c | 2 +-
> drivers/net/wireless/ath/ath5k/eeprom.c | 2 +-
> drivers/net/wireless/mediatek/mt7601u/dma.c | 8
> drivers/nvme/host/core.c | 12 ++--
> drivers/pcmcia/db1xxx_ss.c| 4 ++--
> drivers/power/supply/abx500_chargalg.c| 2 +-
> drivers/power/supply/charger-manager.c| 2 +-
> drivers/rtc/rtc-pcf85063.c| 2 +-
> drivers/s390/scsi/zfcp_fsf.c | 2 +-
> drivers/scsi/aic7xxx/aic79xx_core.c | 4 ++--
> drivers/scsi/aic94xx/aic94xx_tmf.c| 2 +-
> drivers/scsi/lpfc/lpfc_sli.c | 2 +-
> drivers/scsi/smartpqi/smartpqi_init.c | 2 +-
> drivers/scsi/sr.c | 2 +-
> drivers/tty/serial/sunsu.c| 2 +-
> drivers/tty/serial/sunzilog.c | 2 +-
> drivers/tty/vt/vt_ioctl.c | 2 +-
> drivers/usb/dwc3/core.c | 2 +-
> drivers/usb/gadget/legacy/inode.c | 2 +-
> drivers/usb/gadget/udc/pxa25x_udc.c
Re: [Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
On 9/9/20 10:06 PM, Joe Perches wrote:
fallthrough to a separate case/default label break; isn't very readable.
Convert pseudo-keyword fallthrough; statements to a simple break; when
the next label is case or default and the only statement in the next
label block is break;
Found using:
$ grep-2.5.4 -rP --include=*.[ch] -n
"fallthrough;(\s*(case\s+\w+|default)\s*:\s*){1,7}break;" *
Miscellanea:
o Move or coalesce a couple label blocks above a default: block.
Signed-off-by: Joe Perches
---
Compiled allyesconfig x86-64 only.
A few files for other arches were not compiled.
drivers/s390/scsi/zfcp_fsf.c | 2 +-
82 files changed, 109 insertions(+), 112 deletions(-)
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index 140186fe1d1e..2741a07df692 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -2105,7 +2105,7 @@ static void zfcp_fsf_open_lun_handler(struct zfcp_fsf_req
*req)
case FSF_PORT_HANDLE_NOT_VALID:
zfcp_erp_adapter_reopen(adapter, 0, "fsouh_1");
- fallthrough;
+ break;
case FSF_LUN_ALREADY_OPEN:
break;
case FSF_PORT_BOXED:
Acked-by: Steffen Maier # for zfcp
--
Mit freundlichen Gruessen / Kind regards
Steffen Maier
Linux on IBM Z Development
https://www.ibm.com/privacy/us/en/
IBM Deutschland Research & Development GmbH
Vorsitzender des Aufsichtsrats: Matthias Hartmann
Geschaeftsfuehrung: Dirk Wittkopp
Sitz der Gesellschaft: Boeblingen
Registergericht: Amtsgericht Stuttgart, HRB 243294
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Re: [Intel-gfx] [PATCH 0/8] Convert the intel iommu driver to the dma-iommu api
On Thu, 10 Sep 2020 at 14:33, Tom Murphy wrote:
>
> On Wed, 9 Sep 2020 at 13:56, Tvrtko Ursulin
> wrote:
> >
> >
> > On 09/09/2020 10:16, Tvrtko Ursulin wrote:
> > > On 08/09/2020 23:43, Tom Murphy wrote:
> > >> On Tue, 8 Sep 2020 at 16:56, Tvrtko Ursulin
> > >> wrote:
> > >>> On 08/09/2020 16:44, Logan Gunthorpe wrote:
> > On 2020-09-08 9:28 a.m., Tvrtko Ursulin wrote:
> > >>
> > >> diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h
> > >> b/drivers/gpu/drm/i915/i915
> > >> index b7b59328cb76..9367ac801f0c 100644
> > >> --- a/drivers/gpu/drm/i915/i915_scatterlist.h
> > >> +++ b/drivers/gpu/drm/i915/i915_scatterlist.h
> > >> @@ -27,13 +27,19 @@ static __always_inline struct sgt_iter {
> > >> } __sgt_iter(struct scatterlist *sgl, bool dma) {
> > >>struct sgt_iter s = { .sgp = sgl };
> > >>
> > >> + if (sgl && !sg_dma_len(s.sgp))
> > >
> > > I'd extend the condition to be, just to be safe:
> > > if (dma && sgl && !sg_dma_len(s.sgp))
> > >
> >
> > Right, good catch, that's definitely necessary.
> >
> > >> + s.sgp = NULL;
> > >> +
> > >>if (s.sgp) {
> > >>s.max = s.curr = s.sgp->offset;
> > >> - s.max += s.sgp->length;
> > >> - if (dma)
> > >> +
> > >> + if (dma) {
> > >> + s.max += sg_dma_len(s.sgp);
> > >>s.dma = sg_dma_address(s.sgp);
> > >> - else
> > >> + } else {
> > >> + s.max += s.sgp->length;
> > >>s.pfn = page_to_pfn(sg_page(s.sgp));
> > >> + }
> > >
> > > Otherwise has this been tested or alternatively how to test it?
> > > (How to
> > > repro the issue.)
> >
> > It has not been tested. To test it, you need Tom's patch set without
> > the
> > last "DO NOT MERGE" patch:
> >
> > https://lkml.kernel.org/lkml/20200907070035.ga25...@infradead.org/T/
> > >>>
> > >>> Tom, do you have a branch somewhere I could pull from? (Just being lazy
> > >>> about downloading a bunch of messages from the archives.)
> > >>
> > >> I don't unfortunately. I'm working locally with poor internet.
> > >>
> > >>>
> > >>> What GPU is in your Lenovo x1 carbon 5th generation and what
> > >>> graphical/desktop setup I need to repro?
> > >>
> > >>
> > >> Is this enough info?:
> > >>
> > >> $ lspci -vnn | grep VGA -A 12
> > >> 00:02.0 VGA compatible controller [0300]: Intel Corporation HD
> > >> Graphics 620 [8086:5916] (rev 02) (prog-if 00 [VGA controller])
> > >> Subsystem: Lenovo ThinkPad X1 Carbon 5th Gen [17aa:224f]
> > >> Flags: bus master, fast devsel, latency 0, IRQ 148
> > >> Memory at eb00 (64-bit, non-prefetchable) [size=16M]
> > >> Memory at 6000 (64-bit, prefetchable) [size=256M]
> > >> I/O ports at e000 [size=64]
> > >> [virtual] Expansion ROM at 000c [disabled] [size=128K]
> > >> Capabilities: [40] Vendor Specific Information: Len=0c
> > >> Capabilities: [70] Express Root Complex Integrated Endpoint, MSI 00
> > >> Capabilities: [ac] MSI: Enable+ Count=1/1 Maskable- 64bit-
> > >> Capabilities: [d0] Power Management version 2
> > >> Capabilities: [100] Process Address Space ID (PASID)
> > >> Capabilities: [200] Address Translation Service (ATS)
> > >
> > > Works for a start. What about the steps to repro? Any desktop
> > > environment and it is just visual corruption, no hangs/stalls or such?
> > >
> > > I've submitted a series consisting of what I understood are the patches
> > > needed to repro the issue to our automated CI here:
> > >
> > > https://patchwork.freedesktop.org/series/81489/
> > >
> > > So will see if it will catch something, or more targeted testing will be
> > > required. Hopefully it does trip over in which case I can add the patch
> > > suggested by Logan on top and see if that fixes it. Or I'll need to
> > > write a new test case.
> > >
> > > If you could glance over my series to check I identified the patches
> > > correctly it would be appreciated.
> >
> > Our CI was more than capable at catching the breakage so I've copied you
> > on a patch (https://patchwork.freedesktop.org/series/81497/) which has a
> > good potential to fix this. (Or improve the robustness of our sg walks,
> > depends how you look at it.)
> >
> > Would you be able to test it in your environment by any chance? If it
> > works I understand it unblocks your IOMMU work, right?
And yes this does unblock the iommu work
>
> I tested your latest patch set ([PATCH 1/2] drm/i915: Fix DMA mapped
> scatterlist walks) and it fixes the issue. great work!
>
> >
> > Regards,
> >
> > Tvrtko
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Re: [Intel-gfx] [PATCH 0/8] Convert the intel iommu driver to the dma-iommu api
On Wed, 9 Sep 2020 at 13:56, Tvrtko Ursulin
wrote:
>
>
> On 09/09/2020 10:16, Tvrtko Ursulin wrote:
> > On 08/09/2020 23:43, Tom Murphy wrote:
> >> On Tue, 8 Sep 2020 at 16:56, Tvrtko Ursulin
> >> wrote:
> >>> On 08/09/2020 16:44, Logan Gunthorpe wrote:
> On 2020-09-08 9:28 a.m., Tvrtko Ursulin wrote:
> >>
> >> diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h
> >> b/drivers/gpu/drm/i915/i915
> >> index b7b59328cb76..9367ac801f0c 100644
> >> --- a/drivers/gpu/drm/i915/i915_scatterlist.h
> >> +++ b/drivers/gpu/drm/i915/i915_scatterlist.h
> >> @@ -27,13 +27,19 @@ static __always_inline struct sgt_iter {
> >> } __sgt_iter(struct scatterlist *sgl, bool dma) {
> >>struct sgt_iter s = { .sgp = sgl };
> >>
> >> + if (sgl && !sg_dma_len(s.sgp))
> >
> > I'd extend the condition to be, just to be safe:
> > if (dma && sgl && !sg_dma_len(s.sgp))
> >
>
> Right, good catch, that's definitely necessary.
>
> >> + s.sgp = NULL;
> >> +
> >>if (s.sgp) {
> >>s.max = s.curr = s.sgp->offset;
> >> - s.max += s.sgp->length;
> >> - if (dma)
> >> +
> >> + if (dma) {
> >> + s.max += sg_dma_len(s.sgp);
> >>s.dma = sg_dma_address(s.sgp);
> >> - else
> >> + } else {
> >> + s.max += s.sgp->length;
> >>s.pfn = page_to_pfn(sg_page(s.sgp));
> >> + }
> >
> > Otherwise has this been tested or alternatively how to test it?
> > (How to
> > repro the issue.)
>
> It has not been tested. To test it, you need Tom's patch set without
> the
> last "DO NOT MERGE" patch:
>
> https://lkml.kernel.org/lkml/20200907070035.ga25...@infradead.org/T/
> >>>
> >>> Tom, do you have a branch somewhere I could pull from? (Just being lazy
> >>> about downloading a bunch of messages from the archives.)
> >>
> >> I don't unfortunately. I'm working locally with poor internet.
> >>
> >>>
> >>> What GPU is in your Lenovo x1 carbon 5th generation and what
> >>> graphical/desktop setup I need to repro?
> >>
> >>
> >> Is this enough info?:
> >>
> >> $ lspci -vnn | grep VGA -A 12
> >> 00:02.0 VGA compatible controller [0300]: Intel Corporation HD
> >> Graphics 620 [8086:5916] (rev 02) (prog-if 00 [VGA controller])
> >> Subsystem: Lenovo ThinkPad X1 Carbon 5th Gen [17aa:224f]
> >> Flags: bus master, fast devsel, latency 0, IRQ 148
> >> Memory at eb00 (64-bit, non-prefetchable) [size=16M]
> >> Memory at 6000 (64-bit, prefetchable) [size=256M]
> >> I/O ports at e000 [size=64]
> >> [virtual] Expansion ROM at 000c [disabled] [size=128K]
> >> Capabilities: [40] Vendor Specific Information: Len=0c
> >> Capabilities: [70] Express Root Complex Integrated Endpoint, MSI 00
> >> Capabilities: [ac] MSI: Enable+ Count=1/1 Maskable- 64bit-
> >> Capabilities: [d0] Power Management version 2
> >> Capabilities: [100] Process Address Space ID (PASID)
> >> Capabilities: [200] Address Translation Service (ATS)
> >
> > Works for a start. What about the steps to repro? Any desktop
> > environment and it is just visual corruption, no hangs/stalls or such?
> >
> > I've submitted a series consisting of what I understood are the patches
> > needed to repro the issue to our automated CI here:
> >
> > https://patchwork.freedesktop.org/series/81489/
> >
> > So will see if it will catch something, or more targeted testing will be
> > required. Hopefully it does trip over in which case I can add the patch
> > suggested by Logan on top and see if that fixes it. Or I'll need to
> > write a new test case.
> >
> > If you could glance over my series to check I identified the patches
> > correctly it would be appreciated.
>
> Our CI was more than capable at catching the breakage so I've copied you
> on a patch (https://patchwork.freedesktop.org/series/81497/) which has a
> good potential to fix this. (Or improve the robustness of our sg walks,
> depends how you look at it.)
>
> Would you be able to test it in your environment by any chance? If it
> works I understand it unblocks your IOMMU work, right?
I tested your latest patch set ([PATCH 1/2] drm/i915: Fix DMA mapped
scatterlist walks) and it fixes the issue. great work!
>
> Regards,
>
> Tvrtko
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[Intel-gfx] [PATCH][next] drm/i915: Fix inconsistent IS_ERR and PTR_ERR
Fix inconsistent IS_ERR and PTR_ERR in i915_gem_object_copy_blt().
The proper pointer to be passed as argument to PTR_ERR() is vma[1].
This bug was detected with the help of Coccinelle.
Fixes: 6b05030496f7 ("drm/i915: Convert i915_gem_object/client_blt.c to use ww
locking as well, v2.")
Signed-off-by: Gustavo A. R. Silva
---
drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
index d93eb36160c9..aee7ad3cc3c6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
@@ -364,7 +364,7 @@ int i915_gem_object_copy_blt(struct drm_i915_gem_object
*src,
vma[1] = i915_vma_instance(dst, vm, NULL);
if (IS_ERR(vma[1]))
- return PTR_ERR(vma);
+ return PTR_ERR(vma[1]);
i915_gem_ww_ctx_init(, true);
intel_engine_pm_get(ce->engine);
--
2.27.0
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Re: [Intel-gfx] [PATCH] drm/i915/display: Add a vblank wait for FBC activation within same frame
> -Original Message-
> From: Jani Nikula
> Sent: Thursday, September 10, 2020 7:04 PM
> To: Shankar, Uma ; intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/display: Add a vblank wait for FBC
> activation within same frame
>
> On Thu, 10 Sep 2020, Uma Shankar wrote:
> > Add a vblank wait when fbc activation request comes for the same frame
> > on TGL. This helps fix underrun related to fbc.
> >
> > Signed-off-by: Uma Shankar
> > ---
> > drivers/gpu/drm/i915/display/intel_fbc.c | 13 +++--
> > 1 file changed, 11 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> > b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 135f5e8a4d70..3e1d715e4a4e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -1055,6 +1055,7 @@ static void __intel_fbc_post_update(struct
> > intel_crtc *crtc) {
> > struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> > struct intel_fbc *fbc = _priv->fbc;
> > + static u32 old_frame_cnt, new_frame_cnt;
>
> In the strongest terms, do not add static data. These would be shared across
> devices, which is certainly a bug.
Oh ok, yeah will remove this. I guess adding them to intel_fbc should be ok
right ?
Thanks & Regards,
Uma Shankar
> BR,
> Jani.
>
> >
> > drm_WARN_ON(_priv->drm, !mutex_is_locked(>lock));
> >
> > @@ -1075,10 +1076,18 @@ static void __intel_fbc_post_update(struct
> intel_crtc *crtc)
> > if (!intel_fbc_can_activate(crtc))
> > return;
> >
> > - if (!fbc->busy_bits)
> > + old_frame_cnt = new_frame_cnt;
> > + new_frame_cnt = intel_crtc_get_vblank_counter(crtc);
> > + if (!fbc->busy_bits) {
> > + if (IS_TIGERLAKE(dev_priv) &&
> > + old_frame_cnt == new_frame_cnt) {
> > + drm_dbg_kms(_priv->drm, "Wait for vblank before
> Activating FBC");
> > + intel_wait_for_vblank_if_active(dev_priv, crtc->pipe);
> > + }
> > intel_fbc_hw_activate(dev_priv);
> > - else
> > + } else {
> > intel_fbc_deactivate(dev_priv, "frontbuffer write");
> > + }
> > }
> >
> > void intel_fbc_post_update(struct intel_atomic_state *state,
>
> --
> Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] i915: boot/load regression since Linux v5.7-rc1 on Iris Pro (Crystal Well)
On Wed, 02 Sep 2020, Peter Vollmer wrote: > Hi, > > since kernel v5.7-rc1 my graphical output hangs on boot or if the i915 > module is blacklisted on modprobe. > I've already found and extended a bugzilla > https://bugzilla.kernel.org/show_bug.cgi?id=208737 > > But sadly there has been little reaction so I would appreciate any > help in further debugging or better yet resolving this issue. Sorry, nobody in the team looks at kernel.org bugzilla except once in a blue moon to close bugs and tell people to report bugs at fdo gitlab [1]. BR, Jani. [1] https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs -- Jani Nikula, Intel Open Source Graphics Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915/display: Add a vblank wait for FBC activation within same frame
On Thu, 10 Sep 2020, Uma Shankar wrote:
> Add a vblank wait when fbc activation request comes for the
> same frame on TGL. This helps fix underrun related to fbc.
>
> Signed-off-by: Uma Shankar
> ---
> drivers/gpu/drm/i915/display/intel_fbc.c | 13 +++--
> 1 file changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 135f5e8a4d70..3e1d715e4a4e 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1055,6 +1055,7 @@ static void __intel_fbc_post_update(struct intel_crtc
> *crtc)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> struct intel_fbc *fbc = _priv->fbc;
> + static u32 old_frame_cnt, new_frame_cnt;
In the strongest terms, do not add static data. These would be shared
across devices, which is certainly a bug.
BR,
Jani.
>
> drm_WARN_ON(_priv->drm, !mutex_is_locked(>lock));
>
> @@ -1075,10 +1076,18 @@ static void __intel_fbc_post_update(struct intel_crtc
> *crtc)
> if (!intel_fbc_can_activate(crtc))
> return;
>
> - if (!fbc->busy_bits)
> + old_frame_cnt = new_frame_cnt;
> + new_frame_cnt = intel_crtc_get_vblank_counter(crtc);
> + if (!fbc->busy_bits) {
> + if (IS_TIGERLAKE(dev_priv) &&
> + old_frame_cnt == new_frame_cnt) {
> + drm_dbg_kms(_priv->drm, "Wait for vblank before
> Activating FBC");
> + intel_wait_for_vblank_if_active(dev_priv, crtc->pipe);
> + }
> intel_fbc_hw_activate(dev_priv);
> - else
> + } else {
> intel_fbc_deactivate(dev_priv, "frontbuffer write");
> + }
> }
>
> void intel_fbc_post_update(struct intel_atomic_state *state,
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH] drm/i915/pll: Centralize PLL_ENABLE register lookup
On Tue, 08 Sep 2020, Anusha Srivatsa wrote:
> We currenty check for platform at multiple parts in the driver
> to grab the correct PLL. Let us begin to centralize it through a
> helper function.
>
> v2: s/intel_get_pll_enable_reg()/intel_combo_pll_enable_reg() (Ville)
>
> v3: Clean up combo_pll_disable() (Rodrigo)
>
> Suggested-by: Matt Roper
> Cc: Ville Syrjälä
> Cc: Matt Roper
> Signed-off-by: Anusha Srivatsa
> Reviewed-by: Rodrigo Vivi
> ---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 29 +++
> 1 file changed, 17 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index c9013f8f766f..441b6f52e808 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -147,6 +147,18 @@ void assert_shared_dpll(struct drm_i915_private
> *dev_priv,
> pll->info->name, onoff(state), onoff(cur_state));
> }
>
> +static
> +i915_reg_t intel_combo_pll_enable_reg(struct drm_i915_private *dev_priv,
Please keep the static keyword and the return type on the same line with
each other.
And since you're touching this, please rename dev_priv to i915 in all
new code adding it.
BR,
Jani.
> + struct intel_shared_dpll *pll)
> +{
> +
> + if (IS_ELKHARTLAKE(dev_priv) && (pll->info->id == DPLL_ID_EHL_DPLL4))
> + return MG_PLL_ENABLE(0);
> +
> + return CNL_DPLL_ENABLE(pll->info->id);
> +
> +
> +}
> /**
> * intel_prepare_shared_dpll - call a dpll's prepare hook
> * @crtc_state: CRTC, and its state, which has a shared dpll
> @@ -3842,12 +3854,7 @@ static bool combo_pll_get_hw_state(struct
> drm_i915_private *dev_priv,
> struct intel_shared_dpll *pll,
> struct intel_dpll_hw_state *hw_state)
> {
> - i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id);
> -
> - if (IS_ELKHARTLAKE(dev_priv) &&
> - pll->info->id == DPLL_ID_EHL_DPLL4) {
> - enable_reg = MG_PLL_ENABLE(0);
> - }
> + i915_reg_t enable_reg = intel_combo_pll_enable_reg(dev_priv, pll);
>
> return icl_pll_get_hw_state(dev_priv, pll, hw_state, enable_reg);
> }
> @@ -4045,11 +4052,10 @@ static void icl_pll_enable(struct drm_i915_private
> *dev_priv,
> static void combo_pll_enable(struct drm_i915_private *dev_priv,
>struct intel_shared_dpll *pll)
> {
> - i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id);
> + i915_reg_t enable_reg = intel_combo_pll_enable_reg(dev_priv, pll);
>
> if (IS_ELKHARTLAKE(dev_priv) &&
> pll->info->id == DPLL_ID_EHL_DPLL4) {
> - enable_reg = MG_PLL_ENABLE(0);
>
> /*
>* We need to disable DC states when this DPLL is enabled.
> @@ -4157,19 +4163,18 @@ static void icl_pll_disable(struct drm_i915_private
> *dev_priv,
> static void combo_pll_disable(struct drm_i915_private *dev_priv,
> struct intel_shared_dpll *pll)
> {
> - i915_reg_t enable_reg = CNL_DPLL_ENABLE(pll->info->id);
> + i915_reg_t enable_reg = intel_combo_pll_enable_reg(dev_priv, pll);
> +
> + icl_pll_disable(dev_priv, pll, enable_reg);
>
> if (IS_ELKHARTLAKE(dev_priv) &&
> pll->info->id == DPLL_ID_EHL_DPLL4) {
> - enable_reg = MG_PLL_ENABLE(0);
> - icl_pll_disable(dev_priv, pll, enable_reg);
>
> intel_display_power_put(dev_priv, POWER_DOMAIN_DPLL_DC_OFF,
> pll->wakeref);
> return;
> }
>
> - icl_pll_disable(dev_priv, pll, enable_reg);
> }
>
> static void tbt_pll_disable(struct drm_i915_private *dev_priv,
--
Jani Nikula, Intel Open Source Graphics Center
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Add a vblank wait for FBC activation within same frame
== Series Details ==
Series: drm/i915/display: Add a vblank wait for FBC activation within same frame
URL : https://patchwork.freedesktop.org/series/81550/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8994 -> Patchwork_18470
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/index.html
Known issues
Here are the changes found in Patchwork_18470 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_gttfill@basic:
- fi-kbl-7500u: [PASS][1] -> [INCOMPLETE][2] ([i915#2439])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-7500u/igt@gem_exec_gttf...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-kbl-7500u/igt@gem_exec_gttf...@basic.html
- fi-skl-6600u: [PASS][3] -> [INCOMPLETE][4] ([i915#2439])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-skl-6600u/igt@gem_exec_gttf...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-skl-6600u/igt@gem_exec_gttf...@basic.html
- fi-skl-lmem:[PASS][5] -> [INCOMPLETE][6] ([i915#2439])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-skl-lmem/igt@gem_exec_gttf...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-skl-lmem/igt@gem_exec_gttf...@basic.html
- fi-apl-guc: [PASS][7] -> [INCOMPLETE][8] ([i915#1635] /
[i915#2439])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-apl-guc/igt@gem_exec_gttf...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-apl-guc/igt@gem_exec_gttf...@basic.html
- fi-ilk-650: [PASS][9] -> [INCOMPLETE][10] ([i915#2439])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-ilk-650/igt@gem_exec_gttf...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-ilk-650/igt@gem_exec_gttf...@basic.html
* igt@gem_exec_parallel@engines@basic:
- fi-bsw-kefka: [PASS][11] -> [INCOMPLETE][12] ([i915#2439])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-bsw-kefka/igt@gem_exec_parallel@engi...@basic.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-bsw-kefka/igt@gem_exec_parallel@engi...@basic.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-byt-j1900: [PASS][13] -> [DMESG-WARN][14] ([i915#1982])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-byt-j1900/igt@i915_pm_...@basic-pci-d3-state.html
* igt@i915_selftest@live@gem_execbuf:
- fi-byt-j1900: [PASS][15] -> [INCOMPLETE][16] ([i915#2440])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-byt-j1900/igt@i915_selftest@live@gem_execbuf.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-byt-j1900/igt@i915_selftest@live@gem_execbuf.html
- fi-snb-2520m: [PASS][17] -> [INCOMPLETE][18] ([i915#2440])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-snb-2520m/igt@i915_selftest@live@gem_execbuf.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-snb-2520m/igt@i915_selftest@live@gem_execbuf.html
Possible fixes
* igt@gem_exec_gttfill@basic:
- fi-kbl-r: [INCOMPLETE][19] ([i915#2439]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-r/igt@gem_exec_gttf...@basic.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-kbl-r/igt@gem_exec_gttf...@basic.html
- {fi-ehl-1}: [INCOMPLETE][21] ([CI#80] / [i915#2439]) -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-ehl-1/igt@gem_exec_gttf...@basic.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-ehl-1/igt@gem_exec_gttf...@basic.html
* igt@gem_exec_parallel@engines@contexts:
- fi-kbl-soraka: [INCOMPLETE][23] ([i915#2439]) -> [PASS][24]
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-soraka/igt@gem_exec_parallel@engi...@contexts.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-kbl-soraka/igt@gem_exec_parallel@engi...@contexts.html
* igt@gem_tiled_fence_blits@basic:
- fi-gdg-551: [INCOMPLETE][25] ([i915#172] / [i915#2439]) ->
[PASS][26]
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-gdg-551/igt@gem_tiled_fence_bl...@basic.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18470/fi-gdg-551/igt@gem_tiled_fence_bl...@basic.html
* igt@i915_selftest@live@gem_execbuf:
- fi-bsw-nick:[INCOMPLETE][27] ([i915#2439]) -> [PASS][28]
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-bsw-nick/igt@i915_selftest@live@gem_execbuf.html
Re: [Intel-gfx] [PATCH] drm/i915: Disable frontbuffer tracking
On Tue, 08 Sep 2020, Animesh Manna wrote:
> From: Maarten Lankhorst
>
The "why" would go here.
> Signed-off-by: Maarten Lankhorst
Please add your own Signed-off-by when you send someone else's patches.
BR,
Jani.
> ---
> drivers/gpu/drm/i915/display/intel_frontbuffer.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
> b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
> index d898b370d7a4..0f1d7a34dcf7 100644
> --- a/drivers/gpu/drm/i915/display/intel_frontbuffer.c
> +++ b/drivers/gpu/drm/i915/display/intel_frontbuffer.c
> @@ -166,6 +166,9 @@ void __intel_fb_invalidate(struct intel_frontbuffer
> *front,
> {
> struct drm_i915_private *i915 = to_i915(front->obj->base.dev);
>
> + if (origin != ORIGIN_FLIP)
> + return;
> +
> if (origin == ORIGIN_CS) {
> spin_lock(>fb_tracking.lock);
> i915->fb_tracking.busy_bits |= frontbuffer_bits;
> @@ -185,6 +188,9 @@ void __intel_fb_flush(struct intel_frontbuffer *front,
> {
> struct drm_i915_private *i915 = to_i915(front->obj->base.dev);
>
> + if (origin != ORIGIN_FLIP)
> + return;
> +
> if (origin == ORIGIN_CS) {
> spin_lock(>fb_tracking.lock);
> /* Filter out new bits since rendering started. */
--
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH] drm/i915: Nuke dpio_phy_iosf_port[]
On Mon, 07 Sep 2020, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> There's no real reason to stash away the DPIO PHY IOSF sideband port
> numbers for VLV/CHV. Just compute them at runtime in the sideband code.
>
> Gets rid of the oddball intel_init_dpio() function from the high level
> init flow.
>
> Signed-off-by: Ville Syrjälä
Yes, please!
Reviewed-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_display.h | 2 --
> drivers/gpu/drm/i915/i915_drv.c | 16
> drivers/gpu/drm/i915/i915_drv.h | 2 --
> drivers/gpu/drm/i915/i915_reg.h | 1 -
> drivers/gpu/drm/i915/intel_sideband.c| 16 ++--
> 5 files changed, 14 insertions(+), 23 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index 3670cabeb3cd..003b68dda944 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -272,8 +272,6 @@ enum dpio_phy {
> DPIO_PHY2,
> };
>
> -#define I915_NUM_PHYS_VLV 2
> -
> enum aux_ch {
> AUX_CH_A,
> AUX_CH_B,
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index d66fe09d337e..94e00e450683 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -215,21 +215,6 @@ intel_teardown_mchbar(struct drm_i915_private *dev_priv)
> release_resource(_priv->mch_res);
> }
>
> -static void intel_init_dpio(struct drm_i915_private *dev_priv)
> -{
> - /*
> - * IOSF_PORT_DPIO is used for VLV x2 PHY (DP/HDMI B and C),
> - * CHV x1 PHY (DP/HDMI D)
> - * IOSF_PORT_DPIO_2 is used for CHV x2 PHY (DP/HDMI B and C)
> - */
> - if (IS_CHERRYVIEW(dev_priv)) {
> - DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO_2;
> - DPIO_PHY_IOSF_PORT(DPIO_PHY1) = IOSF_PORT_DPIO;
> - } else if (IS_VALLEYVIEW(dev_priv)) {
> - DPIO_PHY_IOSF_PORT(DPIO_PHY0) = IOSF_PORT_DPIO;
> - }
> -}
> -
> static int i915_workqueues_init(struct drm_i915_private *dev_priv)
> {
> /*
> @@ -358,7 +343,6 @@ static int i915_driver_early_probe(struct
> drm_i915_private *dev_priv)
> intel_detect_pch(dev_priv);
>
> intel_pm_setup(dev_priv);
> - intel_init_dpio(dev_priv);
> ret = intel_power_domains_init(dev_priv);
> if (ret < 0)
> goto err_gem;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a455752221cc..ef75acda9bff 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1020,8 +1020,6 @@ struct drm_i915_private {
>*/
> u8 active_pipes;
>
> - int dpio_phy_iosf_port[I915_NUM_PHYS_VLV];
> -
> struct i915_wa_list gt_wa_list;
>
> struct i915_frontbuffer_tracking fb_tracking;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ab4b1abd4364..90a05e37ba2f 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1382,7 +1382,6 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
> #define DPIO_CMNRST (1 << 0)
>
> #define DPIO_PHY(pipe) ((pipe) >> 1)
> -#define DPIO_PHY_IOSF_PORT(phy)
> (dev_priv->dpio_phy_iosf_port[phy])
>
> /*
> * Per pipe/PLL DPIO regs
> diff --git a/drivers/gpu/drm/i915/intel_sideband.c
> b/drivers/gpu/drm/i915/intel_sideband.c
> index 916ccd1c0e96..5b3279262123 100644
> --- a/drivers/gpu/drm/i915/intel_sideband.c
> +++ b/drivers/gpu/drm/i915/intel_sideband.c
> @@ -231,9 +231,21 @@ void vlv_ccu_write(struct drm_i915_private *i915, u32
> reg, u32 val)
> SB_CRWRDA_NP, reg, );
> }
>
> +static u32 vlv_dpio_phy_iosf_port(struct drm_i915_private *i915, enum
> dpio_phy phy)
> +{
> + /*
> + * IOSF_PORT_DPIO: VLV x2 PHY (DP/HDMI B and C), CHV x1 PHY (DP/HDMI D)
> + * IOSF_PORT_DPIO_2: CHV x2 PHY (DP/HDMI B and C)
> + */
> + if (IS_CHERRYVIEW(i915))
> + return phy == DPIO_PHY0 ? IOSF_PORT_DPIO_2 : IOSF_PORT_DPIO;
> + else
> + return IOSF_PORT_DPIO;
> +}
> +
> u32 vlv_dpio_read(struct drm_i915_private *i915, enum pipe pipe, int reg)
> {
> - int port = i915->dpio_phy_iosf_port[DPIO_PHY(pipe)];
> + u32 port = vlv_dpio_phy_iosf_port(i915, DPIO_PHY(pipe));
> u32 val = 0;
>
> vlv_sideband_rw(i915, DPIO_DEVFN, port, SB_MRD_NP, reg, );
> @@ -252,7 +264,7 @@ u32 vlv_dpio_read(struct drm_i915_private *i915, enum
> pipe pipe, int reg)
> void vlv_dpio_write(struct drm_i915_private *i915,
> enum pipe pipe, int reg, u32 val)
> {
> - int port = i915->dpio_phy_iosf_port[DPIO_PHY(pipe)];
> + u32 port = vlv_dpio_phy_iosf_port(i915, DPIO_PHY(pipe));
>
> vlv_sideband_rw(i915, DPIO_DEVFN, port, SB_MWR_NP, reg, );
> }
--
Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Fix an error code i915_gem_object_copy_blt()
== Series Details == Series: drm/i915: Fix an error code i915_gem_object_copy_blt() URL : https://patchwork.freedesktop.org/series/81545/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8994_full -> Patchwork_18467_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_18467_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18467_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_18467_full: ### Piglit changes ### Possible regressions * spec@glsl-1.50@execution@built-in-functions@gs-op-selection-bool-uint-uint (NEW): - pig-snb-2600: NOTRUN -> [FAIL][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/pig-snb-2600/spec@glsl-1.50@execution@built-in-functi...@gs-op-selection-bool-uint-uint.html New tests - New tests have been introduced between CI_DRM_8994_full and Patchwork_18467_full: ### New Piglit tests (1) ### * spec@glsl-1.50@execution@built-in-functions@gs-op-selection-bool-uint-uint: - Statuses : 1 fail(s) - Exec time: [0.16] s Known issues Here are the changes found in Patchwork_18467_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_reloc@basic-concurrent16: - shard-glk: [PASS][2] -> [INCOMPLETE][3] ([i915#1958] / [i915#2439]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk9/igt@gem_exec_re...@basic-concurrent16.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/shard-glk3/igt@gem_exec_re...@basic-concurrent16.html * igt@gem_exec_reloc@basic-cpu-gtt-active: - shard-skl: [PASS][4] -> [INCOMPLETE][5] ([i915#2439]) +4 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-skl7/igt@gem_exec_re...@basic-cpu-gtt-active.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/shard-skl1/igt@gem_exec_re...@basic-cpu-gtt-active.html - shard-snb: [PASS][6] -> [INCOMPLETE][7] ([i915#2439] / [i915#82]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-snb2/igt@gem_exec_re...@basic-cpu-gtt-active.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/shard-snb5/igt@gem_exec_re...@basic-cpu-gtt-active.html - shard-glk: [PASS][8] -> [INCOMPLETE][9] ([i915#2439]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk8/igt@gem_exec_re...@basic-cpu-gtt-active.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/shard-glk7/igt@gem_exec_re...@basic-cpu-gtt-active.html * igt@gem_exec_reloc@basic-cpu-wc-active: - shard-apl: [PASS][10] -> [INCOMPLETE][11] ([i915#1635] / [i915#2439]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-apl3/igt@gem_exec_re...@basic-cpu-wc-active.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/shard-apl1/igt@gem_exec_re...@basic-cpu-wc-active.html * igt@gem_exec_reloc@basic-wc-read-active: - shard-tglb: [PASS][12] -> [INCOMPLETE][13] ([i915#2439]) +2 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-tglb2/igt@gem_exec_re...@basic-wc-read-active.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/shard-tglb8/igt@gem_exec_re...@basic-wc-read-active.html - shard-kbl: [PASS][14] -> [INCOMPLETE][15] ([i915#2439]) +1 similar issue [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-kbl7/igt@gem_exec_re...@basic-wc-read-active.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/shard-kbl1/igt@gem_exec_re...@basic-wc-read-active.html * igt@gem_exec_whisper@basic-queues-all: - shard-iclb: [PASS][16] -> [INCOMPLETE][17] ([i915#2439]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-iclb5/igt@gem_exec_whis...@basic-queues-all.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/shard-iclb5/igt@gem_exec_whis...@basic-queues-all.html * igt@kms_flip@flip-vs-expired-vblank@c-hdmi-a1: - shard-glk: [PASS][18] -> [FAIL][19] ([i915#79]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/shard-glk2/igt@kms_flip@flip-vs-expired-vbl...@c-hdmi-a1.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/shard-glk9/igt@kms_flip@flip-vs-expired-vbl...@c-hdmi-a1.html * igt@kms_flip@flip-vs-suspend-interruptible@c-edp1: - shard-skl: [PASS][20] -> [INCOMPLETE][21] ([i915#198]) [20]:
Re: [Intel-gfx] [PATCH v1 03/12] drm/i915: vgpu pv command buffer transport protocol
On Sat, 05 Sep 2020, Xiaolin Zhang wrote:
> based on the common shared memory, vgpu pv command transport buffer (CTB)
> protocol is implemented which is a simple pv command buffer ring with pv
> command descriptor used to perform guest-2-gvt single direction commucation
> between guest and host GVTg.
>
> with this CTB, guest can send PV command with PV data to host to perform PV
> commands in host side.
>
> Signed-off-by: Xiaolin Zhang
> ---
> drivers/gpu/drm/i915/i915_pvinfo.h | 1 +
> drivers/gpu/drm/i915/i915_vgpu.c | 195
> -
> drivers/gpu/drm/i915/i915_vgpu.h | 53 ++
> 3 files changed, 247 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h
> b/drivers/gpu/drm/i915/i915_pvinfo.h
> index 1d44876..ded93c5 100644
> --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> @@ -49,6 +49,7 @@ enum vgt_g2v_type {
> VGT_G2V_EXECLIST_CONTEXT_CREATE,
> VGT_G2V_EXECLIST_CONTEXT_DESTROY,
> VGT_G2V_SHARED_PAGE_REGISTER,
> + VGT_G2V_PV_SEND_TRIGGER,
> VGT_G2V_MAX,
> };
>
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.c
> b/drivers/gpu/drm/i915/i915_vgpu.c
> index 8b2b451..e856eff 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.c
> +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> @@ -370,6 +370,183 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt)
> * i915 vgpu PV support for Linux
> */
>
> +/**
> + * wait_for_desc_update - Wait for the command buffer descriptor update.
> + * @desc:buffer descriptor
> + * @fence: response fence
> + * @status: placeholder for status
> + *
> + * GVTg will update command buffer descriptor with new fence and status
> + * after processing the command identified by the fence. Wait for
> + * specified fence and then read from the descriptor status of the
> + * command.
> + *
> + * Return:
> + * * 0 response received (status is valid)
> + * * -ETIMEDOUT no response within hardcoded timeout
> + */
> +static int wait_for_desc_update(struct vgpu_pv_ct_buffer_desc *desc,
> + u32 fence, u32 *status)
> +{
> + int err;
> +
> +#define done (READ_ONCE(desc->fence) == fence)
> + err = wait_for_us(done, 5);
> + if (err)
> + err = wait_for(done, 10);
> +#undef done
> +
> + if (unlikely(err)) {
> + DRM_ERROR("CT: fence %u failed; reported fence=%u\n",
> + fence, desc->fence);
drm_err() please.
> + }
> +
> + *status = desc->status;
Please have a blank line before the return. Recommended throughout the
series.
> + return err;
> +}
> +
> +/**
> + * CTB Guest to GVT request
> + *
> + * Format of the CTB Guest to GVT request message is as follows::
> + *
> + * ++-+-+-+-+
> + * | msg[0] | [1] | [2] | ... | [n-1] |
> + * ++-+-+-+-+
> + * | MESSAGE | MESSAGE PAYLOAD |
> + * + HEADER +-+-+-+-+
> + * ||0|1| ... |n|
> + * ++=+=+=+=+
> + * | len >= 1 | FENCE | request specific data |
> + * +--+-+-+-+-+-+
> + *
> + * ^-len---^
> + */
> +static int pv_command_buffer_write(struct i915_virtual_gpu_pv *pv,
> + const u32 *action, u32 len /* in dwords */, u32 fence)
> +{
> + struct vgpu_pv_ct_buffer_desc *desc = pv->ctb.desc;
> + u32 head = desc->head / 4; /* in dwords */
> + u32 tail = desc->tail / 4; /* in dwords */
> + u32 size = desc->size / 4; /* in dwords */
> + u32 used; /* in dwords */
> + u32 header;
> + u32 *cmds = pv->ctb.cmds;
> + unsigned int i;
> +
> + GEM_BUG_ON(desc->size % 4);
> + GEM_BUG_ON(desc->head % 4);
> + GEM_BUG_ON(desc->tail % 4);
> + GEM_BUG_ON(tail >= size);
> +
> + /* tail == head condition indicates empty */
> + if (tail < head)
> + used = (size - head) + tail;
> + else
> + used = tail - head;
> +
> + /* make sure there is a space including extra dw for the fence */
> + if (unlikely(used + len + 1 >= size))
> + return -ENOSPC;
> +
> + /*
> + * Write the message. The format is the following:
> + * DW0: header (including action code)
> + * DW1: fence
> + * DW2+: action data
> + */
> + header = (len << PV_CT_MSG_LEN_SHIFT) |
> + (PV_CT_MSG_WRITE_FENCE_TO_DESC) |
> + (action[0] << PV_CT_MSG_ACTION_SHIFT);
> +
> + cmds[tail] = header;
> + tail = (tail + 1) % size;
> +
> + cmds[tail] = fence;
> + tail = (tail + 1) % size;
> +
> + for (i = 1; i < len; i++) {
> + cmds[tail] = action[i];
> + tail = (tail + 1) % size;
> +
Re: [Intel-gfx] [PATCH v1 02/12] drm/i915: vgpu shared memory setup for pv support
On Sat, 05 Sep 2020, Xiaolin Zhang wrote:
> To support vgpu pv features, a common shared memory is setup used for
> communication and data exchange between guest and host GVTg to reduce
> data access overhead and trap cost.
>
> guest i915 will allocate this common memory (1 page size) and then pass
> it's physical address to host GVTg through PVINFO register so that host
> GVTg can access this shared guest page meory without trap cost with
> hyperviser's facility.
>
> guest i915 will send VGT_G2V_SHARED_PAGE_SETUP notification to host GVTg
> once shared memory setup succcessfully finished.
>
> the layout of the shared_page also defined as well, the first part is the
> PV vervsion information used for compabilty support.
>
> Signed-off-by: Xiaolin Zhang
> ---
> drivers/gpu/drm/i915/i915_drv.c| 2 +
> drivers/gpu/drm/i915/i915_drv.h| 4 +-
> drivers/gpu/drm/i915/i915_pvinfo.h | 5 +-
> drivers/gpu/drm/i915/i915_vgpu.c | 94
> ++
> drivers/gpu/drm/i915/i915_vgpu.h | 14 ++
> 5 files changed, 117 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 00292a8..5fbb4ab 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1071,6 +1071,8 @@ static void i915_driver_release(struct drm_device *dev)
>
> disable_rpm_wakeref_asserts(rpm);
>
> + intel_vgpu_destroy(dev_priv);
> +
> i915_gem_driver_release(dev_priv);
>
> intel_memory_regions_driver_release(dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 16d1b51..3cde2c5f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -809,7 +809,9 @@ struct i915_virtual_gpu {
> bool active;
> u32 caps;
> u32 pv_caps;
> -};
> +
> + struct i915_virtual_gpu_pv *pv;
> +} __packed;
I'm unsure why this struct should be packed.
>
> struct intel_cdclk_config {
> unsigned int cdclk, vco, ref, bypass;
> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h
> b/drivers/gpu/drm/i915/i915_pvinfo.h
> index 8b0dc25..1d44876 100644
> --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> @@ -48,6 +48,7 @@ enum vgt_g2v_type {
> VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY,
> VGT_G2V_EXECLIST_CONTEXT_CREATE,
> VGT_G2V_EXECLIST_CONTEXT_DESTROY,
> + VGT_G2V_SHARED_PAGE_REGISTER,
> VGT_G2V_MAX,
> };
>
> @@ -112,7 +113,9 @@ struct vgt_if {
>
> u32 pv_caps;
>
> - u32 rsv7[0x200 - 25];/* pad to one page */
> + u64 shared_page_gpa;
> +
> + u32 rsv7[0x200 - 27];/* pad to one page */
> } __packed;
>
> #define vgtif_offset(x) (offsetof(struct vgt_if, x))
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.c
> b/drivers/gpu/drm/i915/i915_vgpu.c
> index 10960125..8b2b451 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.c
> +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> @@ -110,6 +110,17 @@ void intel_vgpu_detect(struct drm_i915_private *dev_priv)
> pci_iounmap(pdev, shared_area);
> }
>
> +void intel_vgpu_destroy(struct drm_i915_private *i915)
> +{
> + struct i915_virtual_gpu_pv *pv = i915->vgpu.pv;
> +
> + if (!intel_vgpu_active(i915) || !pv)
> + return;
> +
> + __free_page(virt_to_page(pv->shared_page));
> + kfree(pv);
> +}
> +
> void intel_vgpu_register(struct drm_i915_private *i915)
> {
> /*
> @@ -360,6 +371,83 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt)
> */
>
> /*
> + * shared_page setup for VGPU PV features
> + */
> +static int intel_vgpu_setup_shared_page(struct drm_i915_private *i915,
> + void __iomem *shared_area)
> +{
> + void __iomem *addr;
> + struct i915_virtual_gpu_pv *pv;
> + struct gvt_shared_page *base;
> + u64 gpa;
> + u16 ver_maj, ver_min;
> + int ret = 0;
> +
> + /* We allocate 1 page shared between guest and GVT for data exchange.
> + * ___
> + * |version|
> + * |___PAGE/8
> + * | |
> + * |___PAGE/4
> + * | |
> + * | |
> + * | |
> + * |___PAGE/2
> + * | |
> + * | |
> + * | |
> + * | |
> + * | |
> + * | |
> + * | |
> + * |___|
> + *
> + * 0 offset: PV version area
> + */
> +
> + base = (struct gvt_shared_page *)get_zeroed_page(GFP_KERNEL);
> +
Re: [Intel-gfx] [PATCH v1 01/12] drm/i915: introduced vgpu pv capability
On Sat, 05 Sep 2020, Xiaolin Zhang wrote:
> to enable vgpu pv feature, pv capability is introduced for guest by
> new pv_caps member in struct i915_virtual_gpu and for host GVT by
> new pv_caps register in struct vgt_if.
>
> both of them are used to control different pv feature support in each
> domain and the final pv caps runtime negotiated between guest and host.
>
> it also adds VGT_CAPS_PV capability BIT useb by guest to query host GVTg
> whether support any PV feature or not.
>
> Signed-off-by: Xiaolin Zhang
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 3 ++
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_pvinfo.h | 5 ++-
> drivers/gpu/drm/i915/i915_vgpu.c| 63
> -
> drivers/gpu/drm/i915/i915_vgpu.h| 10 ++
> 5 files changed, 80 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 7842199..fd1e0fc 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -48,6 +48,7 @@
> #include "i915_trace.h"
> #include "intel_pm.h"
> #include "intel_sideband.h"
> +#include "i915_vgpu.h"
Please keep includes sorted.
>
> static inline struct drm_i915_private *node_to_i915(struct drm_info_node
> *node)
> {
> @@ -60,6 +61,8 @@ static int i915_capabilities(struct seq_file *m, void *data)
> struct drm_printer p = drm_seq_file_printer(m);
>
> seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(i915));
> + if (intel_vgpu_active(i915))
> + seq_printf(m, "vgpu pv_caps: 0x%x\n", i915->vgpu.pv_caps);
>
> intel_device_info_print_static(INTEL_INFO(i915), );
> intel_device_info_print_runtime(RUNTIME_INFO(i915), );
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a455752..16d1b51 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -808,6 +808,7 @@ struct i915_virtual_gpu {
> struct mutex lock; /* serialises sending of g2v_notify command pkts */
> bool active;
> u32 caps;
> + u32 pv_caps;
> };
>
> struct intel_cdclk_config {
> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h
> b/drivers/gpu/drm/i915/i915_pvinfo.h
> index 683e97a..8b0dc25 100644
> --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> @@ -57,6 +57,7 @@ enum vgt_g2v_type {
> #define VGT_CAPS_FULL_PPGTT BIT(2)
> #define VGT_CAPS_HWSP_EMULATION BIT(3)
> #define VGT_CAPS_HUGE_GTTBIT(4)
> +#define VGT_CAPS_PV BIT(5)
>
> struct vgt_if {
> u64 magic; /* VGT_MAGIC */
> @@ -109,7 +110,9 @@ struct vgt_if {
> u32 execlist_context_descriptor_lo;
> u32 execlist_context_descriptor_hi;
>
> - u32 rsv7[0x200 - 24];/* pad to one page */
> + u32 pv_caps;
> +
> + u32 rsv7[0x200 - 25];/* pad to one page */
> } __packed;
>
> #define vgtif_offset(x) (offsetof(struct vgt_if, x))
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.c
> b/drivers/gpu/drm/i915/i915_vgpu.c
> index 70fca72..10960125 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.c
> +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> @@ -98,7 +98,13 @@ void intel_vgpu_detect(struct drm_i915_private *dev_priv)
>
> dev_priv->vgpu.active = true;
> mutex_init(_priv->vgpu.lock);
> - drm_info(_priv->drm, "Virtual GPU for Intel GVT-g detected.\n");
> +
> + if (!intel_vgpu_detect_pv_caps(dev_priv, shared_area)) {
> + DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
> + goto out;
> + }
> +
> + DRM_INFO("Virtual GPU for Intel GVT-g detected with PV Optimized.\n");
>
> out:
> pci_iounmap(pdev, shared_area);
> @@ -134,6 +140,18 @@ bool intel_vgpu_has_huge_gtt(struct drm_i915_private
> *dev_priv)
> return dev_priv->vgpu.caps & VGT_CAPS_HUGE_GTT;
> }
>
> +static bool intel_vgpu_check_pv_cap(struct drm_i915_private *dev_priv,
> + enum pv_caps cap)
> +{
> + return (dev_priv->vgpu.active && (dev_priv->vgpu.caps & VGT_CAPS_PV)
> + && (dev_priv->vgpu.pv_caps & cap));
> +}
> +
> +static bool intel_vgpu_has_pv_caps(struct drm_i915_private *dev_priv)
> +{
> + return dev_priv->vgpu.caps & VGT_CAPS_PV;
> +}
> +
> struct _balloon_info_ {
> /*
>* There are up to 2 regions per mappable/unmappable graphic
> @@ -336,3 +354,46 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt)
> drm_err(_priv->drm, "VGT balloon fail\n");
> return ret;
> }
> +
> +/*
> + * i915 vgpu PV support for Linux
> + */
> +
> +/*
> + * Config vgpu PV ops for different PV capabilities
> + */
> +void intel_vgpu_config_pv_caps(struct drm_i915_private *i915,
> + enum pv_caps cap, void *data)
> +{
> +
> + if (!intel_vgpu_check_pv_cap(i915, cap))
> + return;
> +}
> +
> +/**
> + * intel_vgpu_detect_pv_caps - detect virtual GPU PV capabilities
> + *
Re: [Intel-gfx] [PATCH v1 01/12] drm/i915: introduced vgpu pv capability
On Sat, 05 Sep 2020, Xiaolin Zhang wrote:
> to enable vgpu pv feature, pv capability is introduced for guest by
> new pv_caps member in struct i915_virtual_gpu and for host GVT by
> new pv_caps register in struct vgt_if.
>
> both of them are used to control different pv feature support in each
> domain and the final pv caps runtime negotiated between guest and host.
>
> it also adds VGT_CAPS_PV capability BIT useb by guest to query host GVTg
> whether support any PV feature or not.
>
> Signed-off-by: Xiaolin Zhang
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 3 ++
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_pvinfo.h | 5 ++-
> drivers/gpu/drm/i915/i915_vgpu.c| 63
> -
> drivers/gpu/drm/i915/i915_vgpu.h| 10 ++
> 5 files changed, 80 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 7842199..fd1e0fc 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -48,6 +48,7 @@
> #include "i915_trace.h"
> #include "intel_pm.h"
> #include "intel_sideband.h"
> +#include "i915_vgpu.h"
>
> static inline struct drm_i915_private *node_to_i915(struct drm_info_node
> *node)
> {
> @@ -60,6 +61,8 @@ static int i915_capabilities(struct seq_file *m, void *data)
> struct drm_printer p = drm_seq_file_printer(m);
>
> seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(i915));
> + if (intel_vgpu_active(i915))
> + seq_printf(m, "vgpu pv_caps: 0x%x\n", i915->vgpu.pv_caps);
I think the placement here over-emphasizes the importance of the
caps. Maybe you also want to print something if vgpu isn't active?
>
> intel_device_info_print_static(INTEL_INFO(i915), );
> intel_device_info_print_runtime(RUNTIME_INFO(i915), );
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a455752..16d1b51 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -808,6 +808,7 @@ struct i915_virtual_gpu {
> struct mutex lock; /* serialises sending of g2v_notify command pkts */
> bool active;
> u32 caps;
> + u32 pv_caps;
> };
>
> struct intel_cdclk_config {
> diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h
> b/drivers/gpu/drm/i915/i915_pvinfo.h
> index 683e97a..8b0dc25 100644
> --- a/drivers/gpu/drm/i915/i915_pvinfo.h
> +++ b/drivers/gpu/drm/i915/i915_pvinfo.h
> @@ -57,6 +57,7 @@ enum vgt_g2v_type {
> #define VGT_CAPS_FULL_PPGTT BIT(2)
> #define VGT_CAPS_HWSP_EMULATION BIT(3)
> #define VGT_CAPS_HUGE_GTTBIT(4)
> +#define VGT_CAPS_PV BIT(5)
>
> struct vgt_if {
> u64 magic; /* VGT_MAGIC */
> @@ -109,7 +110,9 @@ struct vgt_if {
> u32 execlist_context_descriptor_lo;
> u32 execlist_context_descriptor_hi;
>
> - u32 rsv7[0x200 - 24];/* pad to one page */
> + u32 pv_caps;
> +
> + u32 rsv7[0x200 - 25];/* pad to one page */
> } __packed;
>
> #define vgtif_offset(x) (offsetof(struct vgt_if, x))
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.c
> b/drivers/gpu/drm/i915/i915_vgpu.c
> index 70fca72..10960125 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.c
> +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> @@ -98,7 +98,13 @@ void intel_vgpu_detect(struct drm_i915_private *dev_priv)
>
> dev_priv->vgpu.active = true;
> mutex_init(_priv->vgpu.lock);
> - drm_info(_priv->drm, "Virtual GPU for Intel GVT-g detected.\n");
> +
> + if (!intel_vgpu_detect_pv_caps(dev_priv, shared_area)) {
> + DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
> + goto out;
Seems clearer without the goto. It's not like one is an error path,
right?
> + }
> +
> + DRM_INFO("Virtual GPU for Intel GVT-g detected with PV Optimized.\n");
Please retain use of drm_info().
>
> out:
> pci_iounmap(pdev, shared_area);
> @@ -134,6 +140,18 @@ bool intel_vgpu_has_huge_gtt(struct drm_i915_private
> *dev_priv)
> return dev_priv->vgpu.caps & VGT_CAPS_HUGE_GTT;
> }
>
> +static bool intel_vgpu_check_pv_cap(struct drm_i915_private *dev_priv,
> + enum pv_caps cap)
The indentation is off here, and all over the place, as reported by
checkpatch. Please address them everywhere.
> +{
> + return (dev_priv->vgpu.active && (dev_priv->vgpu.caps & VGT_CAPS_PV)
> + && (dev_priv->vgpu.pv_caps & cap));
> +}
> +
> +static bool intel_vgpu_has_pv_caps(struct drm_i915_private *dev_priv)
> +{
> + return dev_priv->vgpu.caps & VGT_CAPS_PV;
> +}
> +
> struct _balloon_info_ {
> /*
>* There are up to 2 regions per mappable/unmappable graphic
> @@ -336,3 +354,46 @@ int intel_vgt_balloon(struct i915_ggtt *ggtt)
> drm_err(_priv->drm, "VGT balloon fail\n");
> return ret;
> }
> +
> +/*
> + * i915 vgpu PV support for Linux
> + */
> +
> +/*
> + * Config vgpu
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG (rev2)
== Series Details ==
Series: series starting with [1/4] drm/i915: Kill unused savePCH_PORT_HOTPLUG
(rev2)
URL : https://patchwork.freedesktop.org/series/81461/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8994 -> Patchwork_18469
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/index.html
Known issues
Here are the changes found in Patchwork_18469 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_gttfill@basic:
- fi-elk-e7500: [PASS][1] -> [INCOMPLETE][2] ([i915#2439] / [i915#66])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-elk-e7500/igt@gem_exec_gttf...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-elk-e7500/igt@gem_exec_gttf...@basic.html
- fi-skl-lmem:[PASS][3] -> [INCOMPLETE][4] ([i915#2439])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-skl-lmem/igt@gem_exec_gttf...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-skl-lmem/igt@gem_exec_gttf...@basic.html
- fi-apl-guc: [PASS][5] -> [INCOMPLETE][6] ([i915#1635] /
[i915#2439])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-apl-guc/igt@gem_exec_gttf...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-apl-guc/igt@gem_exec_gttf...@basic.html
* igt@gem_exec_parallel@engines@basic:
- fi-bsw-kefka: [PASS][7] -> [INCOMPLETE][8] ([i915#2439])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-bsw-kefka/igt@gem_exec_parallel@engi...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-bsw-kefka/igt@gem_exec_parallel@engi...@basic.html
* igt@gem_exec_parallel@engines@contexts:
- fi-byt-j1900: [PASS][9] -> [INCOMPLETE][10] ([i915#2439])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-byt-j1900/igt@gem_exec_parallel@engi...@contexts.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-byt-j1900/igt@gem_exec_parallel@engi...@contexts.html
* igt@i915_selftest@live@gem_execbuf:
- fi-blb-e6850: [PASS][11] -> [INCOMPLETE][12] ([i915#2439])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-blb-e6850/igt@i915_selftest@live@gem_execbuf.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-blb-e6850/igt@i915_selftest@live@gem_execbuf.html
- fi-ilk-650: [PASS][13] -> [INCOMPLETE][14] ([i915#2439])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-ilk-650/igt@i915_selftest@live@gem_execbuf.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-ilk-650/igt@i915_selftest@live@gem_execbuf.html
Possible fixes
* igt@debugfs_test@read_all_entries:
- {fi-kbl-7560u}: [INCOMPLETE][15] ([i915#2417]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
* igt@gem_exec_gttfill@basic:
- fi-tgl-y: [INCOMPLETE][17] ([i915#2439]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-tgl-y/igt@gem_exec_gttf...@basic.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-tgl-y/igt@gem_exec_gttf...@basic.html
- fi-cfl-8109u: [INCOMPLETE][19] ([i915#2439]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-cfl-8109u/igt@gem_exec_gttf...@basic.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-cfl-8109u/igt@gem_exec_gttf...@basic.html
- fi-bdw-5557u: [INCOMPLETE][21] ([i915#2439]) -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-bdw-5557u/igt@gem_exec_gttf...@basic.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-bdw-5557u/igt@gem_exec_gttf...@basic.html
- {fi-ehl-1}: [INCOMPLETE][23] ([CI#80] / [i915#2439]) -> [PASS][24]
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-ehl-1/igt@gem_exec_gttf...@basic.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-ehl-1/igt@gem_exec_gttf...@basic.html
* igt@gem_exec_parallel@engines@contexts:
- fi-kbl-soraka: [INCOMPLETE][25] ([i915#2439]) -> [PASS][26]
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-soraka/igt@gem_exec_parallel@engi...@contexts.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18469/fi-kbl-soraka/igt@gem_exec_parallel@engi...@contexts.html
* igt@i915_selftest@live@gem_execbuf:
- fi-bsw-nick:[INCOMPLETE][27] ([i915#2439]) -> [PASS][28]
[27]:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix slightly botched merge in __reloc_entry_gpu
== Series Details ==
Series: drm/i915: Fix slightly botched merge in __reloc_entry_gpu
URL : https://patchwork.freedesktop.org/series/81549/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8994 -> Patchwork_18468
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/index.html
Known issues
Here are the changes found in Patchwork_18468 that come from known issues:
### IGT changes ###
Possible fixes
* igt@debugfs_test@read_all_entries:
- {fi-kbl-7560u}: [INCOMPLETE][1] ([i915#2417]) -> [PASS][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
* igt@gem_exec_gttfill@basic:
- fi-kbl-x1275: [INCOMPLETE][3] ([i915#2439]) -> [PASS][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-x1275/igt@gem_exec_gttf...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-kbl-x1275/igt@gem_exec_gttf...@basic.html
- fi-tgl-y: [INCOMPLETE][5] ([i915#2439]) -> [PASS][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-tgl-y/igt@gem_exec_gttf...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-tgl-y/igt@gem_exec_gttf...@basic.html
- fi-cfl-8109u: [INCOMPLETE][7] ([i915#2439]) -> [PASS][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-cfl-8109u/igt@gem_exec_gttf...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-cfl-8109u/igt@gem_exec_gttf...@basic.html
- fi-icl-y: [INCOMPLETE][9] ([i915#2439]) -> [PASS][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-icl-y/igt@gem_exec_gttf...@basic.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-icl-y/igt@gem_exec_gttf...@basic.html
- fi-kbl-r: [INCOMPLETE][11] ([i915#2439]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-r/igt@gem_exec_gttf...@basic.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-kbl-r/igt@gem_exec_gttf...@basic.html
- fi-bdw-5557u: [INCOMPLETE][13] ([i915#2439]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-bdw-5557u/igt@gem_exec_gttf...@basic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-bdw-5557u/igt@gem_exec_gttf...@basic.html
- fi-skl-guc: [INCOMPLETE][15] ([i915#2439]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-skl-guc/igt@gem_exec_gttf...@basic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-skl-guc/igt@gem_exec_gttf...@basic.html
- fi-hsw-4770:[INCOMPLETE][17] ([i915#2439]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-hsw-4770/igt@gem_exec_gttf...@basic.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-hsw-4770/igt@gem_exec_gttf...@basic.html
- fi-kbl-guc: [INCOMPLETE][19] ([i915#2439]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-guc/igt@gem_exec_gttf...@basic.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-kbl-guc/igt@gem_exec_gttf...@basic.html
- fi-cml-u2: [INCOMPLETE][21] ([i915#2439]) -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-cml-u2/igt@gem_exec_gttf...@basic.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-cml-u2/igt@gem_exec_gttf...@basic.html
- fi-cfl-8700k: [INCOMPLETE][23] ([i915#2439]) -> [PASS][24]
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-cfl-8700k/igt@gem_exec_gttf...@basic.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-cfl-8700k/igt@gem_exec_gttf...@basic.html
- fi-ivb-3770:[INCOMPLETE][25] ([i915#2439]) -> [PASS][26]
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-ivb-3770/igt@gem_exec_gttf...@basic.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-ivb-3770/igt@gem_exec_gttf...@basic.html
- fi-icl-u2: [INCOMPLETE][27] ([i915#2439]) -> [PASS][28]
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-icl-u2/igt@gem_exec_gttf...@basic.html
[28]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-icl-u2/igt@gem_exec_gttf...@basic.html
- fi-cml-s: [INCOMPLETE][29] ([i915#2439]) -> [PASS][30]
[29]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-cml-s/igt@gem_exec_gttf...@basic.html
[30]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18468/fi-cml-s/igt@gem_exec_gttf...@basic.html
- fi-cfl-guc:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix slightly botched merge in __reloc_entry_gpu
== Series Details == Series: drm/i915: Fix slightly botched merge in __reloc_entry_gpu URL : https://patchwork.freedesktop.org/series/81549/ State : warning == Summary == $ dim checkpatch origin/drm-tip 3920ee5ddfb9 drm/i915: Fix slightly botched merge in __reloc_entry_gpu -:27: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #27: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1441: +static int __reloc_entry_gpu(struct i915_execbuffer *eb, struct i915_vma *vma, total: 0 errors, 0 warnings, 1 checks, 16 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix an error code i915_gem_object_copy_blt()
== Series Details ==
Series: drm/i915: Fix an error code i915_gem_object_copy_blt()
URL : https://patchwork.freedesktop.org/series/81545/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8994 -> Patchwork_18467
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/index.html
Known issues
Here are the changes found in Patchwork_18467 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_gttfill@basic:
- fi-kbl-7500u: [PASS][1] -> [INCOMPLETE][2] ([i915#2439])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-7500u/igt@gem_exec_gttf...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-kbl-7500u/igt@gem_exec_gttf...@basic.html
- fi-skl-6600u: [PASS][3] -> [INCOMPLETE][4] ([i915#2439])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-skl-6600u/igt@gem_exec_gttf...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-skl-6600u/igt@gem_exec_gttf...@basic.html
- fi-elk-e7500: [PASS][5] -> [INCOMPLETE][6] ([i915#2439] / [i915#66])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-elk-e7500/igt@gem_exec_gttf...@basic.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-elk-e7500/igt@gem_exec_gttf...@basic.html
- fi-skl-lmem:[PASS][7] -> [INCOMPLETE][8] ([i915#2439])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-skl-lmem/igt@gem_exec_gttf...@basic.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-skl-lmem/igt@gem_exec_gttf...@basic.html
* igt@i915_selftest@live@gem_execbuf:
- fi-snb-2520m: [PASS][9] -> [INCOMPLETE][10] ([i915#2439])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-snb-2520m/igt@i915_selftest@live@gem_execbuf.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-snb-2520m/igt@i915_selftest@live@gem_execbuf.html
Possible fixes
* igt@gem_exec_gttfill@basic:
- fi-tgl-y: [INCOMPLETE][11] ([i915#2439]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-tgl-y/igt@gem_exec_gttf...@basic.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-tgl-y/igt@gem_exec_gttf...@basic.html
- fi-bdw-5557u: [INCOMPLETE][13] ([i915#2439]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-bdw-5557u/igt@gem_exec_gttf...@basic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-bdw-5557u/igt@gem_exec_gttf...@basic.html
- fi-cml-u2: [INCOMPLETE][15] ([i915#2439]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-cml-u2/igt@gem_exec_gttf...@basic.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-cml-u2/igt@gem_exec_gttf...@basic.html
- {fi-ehl-1}: [INCOMPLETE][17] ([CI#80] / [i915#2439]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-ehl-1/igt@gem_exec_gttf...@basic.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-ehl-1/igt@gem_exec_gttf...@basic.html
* igt@gem_exec_parallel@engines@basic:
- fi-bdw-gvtdvm: [INCOMPLETE][19] ([i915#2439]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-bdw-gvtdvm/igt@gem_exec_parallel@engi...@basic.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-bdw-gvtdvm/igt@gem_exec_parallel@engi...@basic.html
* igt@gem_exec_parallel@engines@contexts:
- fi-kbl-soraka: [INCOMPLETE][21] ([i915#2439]) -> [PASS][22]
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-kbl-soraka/igt@gem_exec_parallel@engi...@contexts.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-kbl-soraka/igt@gem_exec_parallel@engi...@contexts.html
* igt@gem_tiled_fence_blits@basic:
- fi-gdg-551: [INCOMPLETE][23] ([i915#172] / [i915#2439]) ->
[PASS][24]
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-gdg-551/igt@gem_tiled_fence_bl...@basic.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-gdg-551/igt@gem_tiled_fence_bl...@basic.html
* igt@i915_selftest@live@gem_execbuf:
- fi-bsw-nick:[INCOMPLETE][25] ([i915#2439]) -> [PASS][26]
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-bsw-nick/igt@i915_selftest@live@gem_execbuf.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18467/fi-bsw-nick/igt@i915_selftest@live@gem_execbuf.html
- fi-bsw-n3050: [INCOMPLETE][27] ([i915#2439]) -> [PASS][28]
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8994/fi-bsw-n3050/igt@i915_selftest@live@gem_execbuf.html
[28]:
[Intel-gfx] [PATCH 1/2] drm/i915: Fix DMA mapped scatterlist walks
From: Tvrtko Ursulin
When walking DMA mapped scatterlists sg_dma_len has to be used since it
can be different (coalesced) from the backing store entry.
This also means we have to end the walk when encountering a zero length
DMA entry and cannot rely on the normal sg list end marker.
Both issues were there in theory for some time but were hidden by the fact
Intel IOMMU driver was never coalescing entries. As there are ongoing
efforts to change this we need to start handling it.
v2:
* Use unsigned int for local storing sg_dma_len. (Logan)
Signed-off-by: Tvrtko Ursulin
References: 85d1225ec066 ("drm/i915: Introduce & use new lightweight SGL
iterators")
References: b31144c0daa8 ("drm/i915: Micro-optimise
gen6_ppgtt_insert_entries()")
Reported-by: Tom Murphy
Suggested-by: Tom Murphy # __sgt_iter
Suggested-by: Logan Gunthorpe # __sgt_iter
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Matthew Auld
Cc: Lu Baolu
Reviewed-by: Logan Gunthorpe
---
drivers/gpu/drm/i915/gt/gen6_ppgtt.c| 6 +++---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c| 17 ++---
drivers/gpu/drm/i915/gt/intel_gtt.h | 2 +-
drivers/gpu/drm/i915/i915_scatterlist.h | 12
4 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
index fd0d24d28763..c0d17f87b00f 100644
--- a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
@@ -131,17 +131,17 @@ static void gen6_ppgtt_insert_entries(struct
i915_address_space *vm,
vaddr = kmap_atomic_px(i915_pt_entry(pd, act_pt));
do {
- GEM_BUG_ON(iter.sg->length < I915_GTT_PAGE_SIZE);
+ GEM_BUG_ON(sg_dma_len(iter.sg) < I915_GTT_PAGE_SIZE);
vaddr[act_pte] = pte_encode | GEN6_PTE_ADDR_ENCODE(iter.dma);
iter.dma += I915_GTT_PAGE_SIZE;
if (iter.dma == iter.max) {
iter.sg = __sg_next(iter.sg);
- if (!iter.sg)
+ if (!iter.sg || sg_dma_len(iter.sg) == 0)
break;
iter.dma = sg_dma_address(iter.sg);
- iter.max = iter.dma + iter.sg->length;
+ iter.max = iter.dma + sg_dma_len(iter.sg);
}
if (++act_pte == GEN6_PTES) {
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index eb64f474a78c..b236aa046f91 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -372,19 +372,19 @@ gen8_ppgtt_insert_pte(struct i915_ppgtt *ppgtt,
pd = i915_pd_entry(pdp, gen8_pd_index(idx, 2));
vaddr = kmap_atomic_px(i915_pt_entry(pd, gen8_pd_index(idx, 1)));
do {
- GEM_BUG_ON(iter->sg->length < I915_GTT_PAGE_SIZE);
+ GEM_BUG_ON(sg_dma_len(iter->sg) < I915_GTT_PAGE_SIZE);
vaddr[gen8_pd_index(idx, 0)] = pte_encode | iter->dma;
iter->dma += I915_GTT_PAGE_SIZE;
if (iter->dma >= iter->max) {
iter->sg = __sg_next(iter->sg);
- if (!iter->sg) {
+ if (!iter->sg || sg_dma_len(iter->sg) == 0) {
idx = 0;
break;
}
iter->dma = sg_dma_address(iter->sg);
- iter->max = iter->dma + iter->sg->length;
+ iter->max = iter->dma + sg_dma_len(iter->sg);
}
if (gen8_pd_index(++idx, 0) == 0) {
@@ -413,8 +413,8 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,
u32 flags)
{
const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level, flags);
+ unsigned int rem = sg_dma_len(iter->sg);
u64 start = vma->node.start;
- dma_addr_t rem = iter->sg->length;
GEM_BUG_ON(!i915_vm_is_4lvl(vma->vm));
@@ -456,7 +456,7 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,
}
do {
- GEM_BUG_ON(iter->sg->length < page_size);
+ GEM_BUG_ON(sg_dma_len(iter->sg) < page_size);
vaddr[index++] = encode | iter->dma;
start += page_size;
@@ -467,7 +467,10 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,
if (!iter->sg)
break;
- rem = iter->sg->length;
+ rem = sg_dma_len(iter->sg);
+ if (!rem)
+ break;
+
iter->dma = sg_dma_address(iter->sg);
iter->max = iter->dma + rem;
@@ -525,7 +528,7 @@ static void gen8_ppgtt_insert_huge(struct i915_vma
[Intel-gfx] [PATCH 0/2] Fixes for incoming smarter IOMMU
From: Tvrtko Ursulin There are incoming improvements to Intel IOMMU code to allow sg table coalescing on map operations. We do not handle that well (we assume 1:1 between backing store and DMA mapped entries) so this series is an attempt to improve this area and get ready for those changes. Tvrtko Ursulin (2): drm/i915: Fix DMA mapped scatterlist walks drm/i915: Fix DMA mapped scatterlist lookup drivers/gpu/drm/i915/gem/i915_gem_object.c| 2 ++ drivers/gpu/drm/i915/gem/i915_gem_object.h| 20 +- .../gpu/drm/i915/gem/i915_gem_object_types.h | 17 --- drivers/gpu/drm/i915/gem/i915_gem_pages.c | 21 --- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 6 +++--- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 17 --- drivers/gpu/drm/i915/gt/intel_ggtt.c | 4 ++-- drivers/gpu/drm/i915/gt/intel_gtt.h | 2 +- drivers/gpu/drm/i915/i915_scatterlist.h | 17 +++ 9 files changed, 73 insertions(+), 33 deletions(-) -- 2.25.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915: Fix DMA mapped scatterlist lookup
From: Tvrtko Ursulin
As the previous patch fixed the places where we walk the whole scatterlist
for DMA addresses, this patch fixes the random lookup functionality.
To achieve this we have to add a second lookup iterator and add a
i915_gem_object_get_sg_dma helper, to be used analoguous to existing
i915_gem_object_get_sg_dma. Therefore two lookup caches are maintained per
object and they are flushed at the same point for simplicity. (Strictly
speaking the DMA cache should be flushed from i915_gem_gtt_finish_pages,
but today this conincides with unsetting of the pages in general.)
Partial VMA view is then fixed to use the new DMA lookup and properly
query sg length.
Signed-off-by: Tvrtko Ursulin
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Matthew Auld
Cc: Lu Baolu
Cc: Tom Murphy
Cc: Logan Gunthorpe
---
drivers/gpu/drm/i915/gem/i915_gem_object.c| 2 ++
drivers/gpu/drm/i915/gem/i915_gem_object.h| 20 +-
.../gpu/drm/i915/gem/i915_gem_object_types.h | 17 ---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 21 ---
drivers/gpu/drm/i915/gt/intel_ggtt.c | 4 ++--
drivers/gpu/drm/i915/i915_scatterlist.h | 5 +
6 files changed, 51 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index c8421fd9d2dc..ffeaf1b9b1bb 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -73,6 +73,8 @@ void i915_gem_object_init(struct drm_i915_gem_object *obj,
obj->mm.madv = I915_MADV_WILLNEED;
INIT_RADIX_TREE(>mm.get_page.radix, GFP_KERNEL | __GFP_NOWARN);
mutex_init(>mm.get_page.lock);
+ INIT_RADIX_TREE(>mm.get_dma_page.radix, GFP_KERNEL | __GFP_NOWARN);
+ mutex_init(>mm.get_dma_page.lock);
if (IS_ENABLED(CONFIG_LOCKDEP) && i915_gem_object_is_shrinkable(obj))
i915_gem_shrinker_taints_mutex(to_i915(obj->base.dev),
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h
b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index d46db8d8f38e..7ba5e958a3d0 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -275,8 +275,26 @@ int i915_gem_object_set_tiling(struct drm_i915_gem_object
*obj,
unsigned int tiling, unsigned int stride);
struct scatterlist *
+__i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
+struct i915_gem_object_page_iter *iter,
+unsigned int n,
+unsigned int *offset);
+
+static inline struct scatterlist *
i915_gem_object_get_sg(struct drm_i915_gem_object *obj,
- unsigned int n, unsigned int *offset);
+ unsigned int n,
+ unsigned int *offset)
+{
+ return __i915_gem_object_get_sg(obj, >mm.get_page, n, offset);
+}
+
+static inline struct scatterlist *
+i915_gem_object_get_sg_dma(struct drm_i915_gem_object *obj,
+ unsigned int n,
+ unsigned int *offset)
+{
+ return __i915_gem_object_get_sg(obj, >mm.get_dma_page, n, offset);
+}
struct page *
i915_gem_object_get_page(struct drm_i915_gem_object *obj,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
index b5c15557cc87..fedfebf13344 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_types.h
@@ -80,6 +80,14 @@ struct i915_mmap_offset {
struct rb_node offset;
};
+struct i915_gem_object_page_iter {
+ struct scatterlist *sg_pos;
+ unsigned int sg_idx; /* in pages, but 32bit eek! */
+
+ struct radix_tree_root radix;
+ struct mutex lock; /* protects this cache */
+};
+
struct drm_i915_gem_object {
struct drm_gem_object base;
@@ -246,13 +254,8 @@ struct drm_i915_gem_object {
I915_SELFTEST_DECLARE(unsigned int page_mask);
- struct i915_gem_object_page_iter {
- struct scatterlist *sg_pos;
- unsigned int sg_idx; /* in pages, but 32bit eek! */
-
- struct radix_tree_root radix;
- struct mutex lock; /* protects this cache */
- } get_page;
+ struct i915_gem_object_page_iter get_page;
+ struct i915_gem_object_page_iter get_dma_page;
/**
* Element within i915->mm.unbound_list or i915->mm.bound_list,
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index e8a083743e09..04a3c1233f80 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -33,6 +33,8 @@ void __i915_gem_object_set_pages(struct drm_i915_gem_object
*obj,
obj->mm.get_page.sg_pos = pages->sgl;
[Intel-gfx] [PATCH] drm/i915/display: Add a vblank wait for FBC activation within same frame
Add a vblank wait when fbc activation request comes for the
same frame on TGL. This helps fix underrun related to fbc.
Signed-off-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_fbc.c | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 135f5e8a4d70..3e1d715e4a4e 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1055,6 +1055,7 @@ static void __intel_fbc_post_update(struct intel_crtc
*crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
struct intel_fbc *fbc = _priv->fbc;
+ static u32 old_frame_cnt, new_frame_cnt;
drm_WARN_ON(_priv->drm, !mutex_is_locked(>lock));
@@ -1075,10 +1076,18 @@ static void __intel_fbc_post_update(struct intel_crtc
*crtc)
if (!intel_fbc_can_activate(crtc))
return;
- if (!fbc->busy_bits)
+ old_frame_cnt = new_frame_cnt;
+ new_frame_cnt = intel_crtc_get_vblank_counter(crtc);
+ if (!fbc->busy_bits) {
+ if (IS_TIGERLAKE(dev_priv) &&
+ old_frame_cnt == new_frame_cnt) {
+ drm_dbg_kms(_priv->drm, "Wait for vblank before
Activating FBC");
+ intel_wait_for_vblank_if_active(dev_priv, crtc->pipe);
+ }
intel_fbc_hw_activate(dev_priv);
- else
+ } else {
intel_fbc_deactivate(dev_priv, "frontbuffer write");
+ }
}
void intel_fbc_post_update(struct intel_atomic_state *state,
--
2.26.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH] drm/i915: Fix slightly botched merge in __reloc_entry_gpu
On Thu, Sep 10, 2020 at 01:12:25PM +0200, Maarten Lankhorst wrote: > This function should be an int, not a bool. > > Presumably because we had the same 2 reverts in a slightly different > way, git got confused. > > Thanks to Dan for reporting. :) > > Signed-off-by: Maarten Lankhorst > Reported-by: Dan Carpenter > Cc: Dave Airlie > --- > drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c > b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c > index 804339255df1..5509946f1a1d 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c > @@ -1437,7 +1437,7 @@ static unsigned long vma_phys_addr(struct i915_vma > *vma, u32 offset) > return addr + offset_in_page(offset); > } > > -static bool __reloc_entry_gpu(struct i915_execbuffer *eb, > +static int __reloc_entry_gpu(struct i915_execbuffer *eb, > struct i915_vma *vma, > u64 offset, > u64 target_addr) > @@ -1456,7 +1456,7 @@ static bool __reloc_entry_gpu(struct i915_execbuffer > *eb, > > batch = reloc_gpu(eb, vma, len); > if (batch == ERR_PTR(-EDEADLK)) > - return (s64)-EDEADLK; > + return -EDEADLK; > else if (IS_ERR(batch)) > return false; If it's an int now why is there a 'false' still here? > > > base-commit: 877d8c074302c20ac0759d1a4f689c14aada420d > -- > 2.28.0 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/3] drm/i915: disable all display features when no display
== Series Details == Series: series starting with [1/3] drm/i915: disable all display features when no display URL : https://patchwork.freedesktop.org/series/81541/ State : failure == Summary == CI Bug Log - changes from CI_DRM_8992_full -> Patchwork_18466_full Summary --- **FAILURE** Serious unknown changes coming with Patchwork_18466_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_18466_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_18466_full: ### IGT changes ### Possible regressions * igt@kms_atomic_transition@1x-modeset-transitions-nonblocking: - shard-kbl: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-kbl6/igt@kms_atomic_transit...@1x-modeset-transitions-nonblocking.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/shard-kbl4/igt@kms_atomic_transit...@1x-modeset-transitions-nonblocking.html Known issues Here are the changes found in Patchwork_18466_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_reloc@basic-gtt-read-active: - shard-apl: [PASS][3] -> [INCOMPLETE][4] ([i915#1635] / [i915#2439]) +3 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-apl7/igt@gem_exec_re...@basic-gtt-read-active.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/shard-apl8/igt@gem_exec_re...@basic-gtt-read-active.html * igt@gem_exec_reloc@basic-wc-active: - shard-snb: [PASS][5] -> [INCOMPLETE][6] ([i915#2439] / [i915#82]) +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-snb5/igt@gem_exec_re...@basic-wc-active.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/shard-snb7/igt@gem_exec_re...@basic-wc-active.html * igt@gem_exec_reloc@basic-wc-read-active: - shard-kbl: [PASS][7] -> [INCOMPLETE][8] ([i915#2439]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-kbl7/igt@gem_exec_re...@basic-wc-read-active.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/shard-kbl6/igt@gem_exec_re...@basic-wc-read-active.html * igt@gem_exec_reloc@basic-write-gtt-active: - shard-iclb: [PASS][9] -> [INCOMPLETE][10] ([i915#2439]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-iclb3/igt@gem_exec_re...@basic-write-gtt-active.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/shard-iclb1/igt@gem_exec_re...@basic-write-gtt-active.html * igt@gem_exec_schedule@deep@rcs0: - shard-glk: [PASS][11] -> [INCOMPLETE][12] ([i915#2439]) +5 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-glk6/igt@gem_exec_schedule@d...@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/shard-glk2/igt@gem_exec_schedule@d...@rcs0.html * igt@gem_exec_whisper@basic-contexts-forked-all: - shard-skl: [PASS][13] -> [INCOMPLETE][14] ([i915#2439]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-skl4/igt@gem_exec_whis...@basic-contexts-forked-all.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/shard-skl5/igt@gem_exec_whis...@basic-contexts-forked-all.html * igt@gem_exec_whisper@basic-queues-forked: - shard-tglb: [PASS][15] -> [INCOMPLETE][16] ([i915#2439]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-tglb2/igt@gem_exec_whis...@basic-queues-forked.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/shard-tglb6/igt@gem_exec_whis...@basic-queues-forked.html * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size: - shard-skl: [PASS][17] -> [DMESG-WARN][18] ([i915#1982]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-skl7/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions-varying-size.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/shard-skl9/igt@kms_cursor_leg...@cursor-vs-flip-atomic-transitions-varying-size.html * igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions: - shard-apl: [PASS][19] -> [DMESG-WARN][20] ([i915#1635] / [i915#1982]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/shard-apl2/igt@kms_cursor_leg...@short-flip-before-cursor-atomic-transitions.html [20]:
[Intel-gfx] [PATCH] drm/i915: Fix slightly botched merge in __reloc_entry_gpu
This function should be an int, not a bool. Presumably because we had the same 2 reverts in a slightly different way, git got confused. Thanks to Dan for reporting. :) Signed-off-by: Maarten Lankhorst Reported-by: Dan Carpenter Cc: Dave Airlie --- drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index 804339255df1..5509946f1a1d 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -1437,7 +1437,7 @@ static unsigned long vma_phys_addr(struct i915_vma *vma, u32 offset) return addr + offset_in_page(offset); } -static bool __reloc_entry_gpu(struct i915_execbuffer *eb, +static int __reloc_entry_gpu(struct i915_execbuffer *eb, struct i915_vma *vma, u64 offset, u64 target_addr) @@ -1456,7 +1456,7 @@ static bool __reloc_entry_gpu(struct i915_execbuffer *eb, batch = reloc_gpu(eb, vma, len); if (batch == ERR_PTR(-EDEADLK)) - return (s64)-EDEADLK; + return -EDEADLK; else if (IS_ERR(batch)) return false; base-commit: 877d8c074302c20ac0759d1a4f689c14aada420d -- 2.28.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/3] drm/i915: move gmbus restore to i915_restore_display
On Thu, Sep 10, 2020 at 12:52:27PM +0300, Jani Nikula wrote:
> Logically part of the display restore.
>
> Note: This has been in place since the introduction of gmbus
> support. The gmbus code also does the resets before transfers. Is this
> really needed, or a historical accident?
I suspect we could just remove this one.
Either way, this is display stuff so the move makes sense.
Reviewed-by: Ville Syrjälä
>
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_suspend.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c
> b/drivers/gpu/drm/i915/i915_suspend.c
> index 4a93247942b7..09026c4db7d0 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -69,6 +69,8 @@ static void i915_restore_display(struct drm_i915_private
> *dev_priv)
> I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);
>
> intel_vga_redisable(dev_priv);
> +
> + intel_gmbus_reset(dev_priv);
> }
>
> int i915_save_state(struct drm_i915_private *dev_priv)
> @@ -141,7 +143,5 @@ int i915_restore_state(struct drm_i915_private *dev_priv)
> I915_WRITE(SWF3(i), dev_priv->regfile.saveSWF3[i]);
> }
Sidenote: I think the ^ scratch registers are also part of the display
block, so could probably move those too. The other option would be to
try to nuke that stuff entirely since I don't think anyone knows
whether it actually does something useful.
If we do move/nuke this then I think afte my earlier
MI_ARB_STATE/CACHE_MODE_0 nuke patches i915_{save,restore}_state() actually
just become pointless wrappers for i915_{save,restore}_display().
>
> - intel_gmbus_reset(dev_priv);
> -
> return 0;
> }
> --
> 2.20.1
--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 2/3] drm/i915: move gen4 GCDGMBUS save/restore to display save/restore
On Thu, Sep 10, 2020 at 12:52:26PM +0300, Jani Nikula wrote:
> Logically part of the display save/restore. No functional changes.
>
Somewhat tempted to move this into the gmbus code proper.
But we don't have a gmbus resume hook atm so would need to
add one.
In the meantime:
Reviewed-by: Ville Syrjälä
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_suspend.c | 21 -
> 1 file changed, 12 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_suspend.c
> b/drivers/gpu/drm/i915/i915_suspend.c
> index ed2be3489f8e..4a93247942b7 100644
> --- a/drivers/gpu/drm/i915/i915_suspend.c
> +++ b/drivers/gpu/drm/i915/i915_suspend.c
> @@ -34,6 +34,8 @@
>
> static void i915_save_display(struct drm_i915_private *dev_priv)
> {
> + struct pci_dev *pdev = dev_priv->drm.pdev;
> +
> /* Display arbitration control */
> if (INTEL_GEN(dev_priv) <= 4)
> dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);
> @@ -41,10 +43,20 @@ static void i915_save_display(struct drm_i915_private
> *dev_priv)
> /* save FBC interval */
> if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
> dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);
> +
> + if (IS_GEN(dev_priv, 4))
> + pci_read_config_word(pdev, GCDGMBUS,
> + _priv->regfile.saveGCDGMBUS);
> }
>
> static void i915_restore_display(struct drm_i915_private *dev_priv)
> {
> + struct pci_dev *pdev = dev_priv->drm.pdev;
> +
> + if (IS_GEN(dev_priv, 4))
> + pci_write_config_word(pdev, GCDGMBUS,
> + dev_priv->regfile.saveGCDGMBUS);
> +
> /* Display arbitration */
> if (INTEL_GEN(dev_priv) <= 4)
> I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);
> @@ -61,15 +73,10 @@ static void i915_restore_display(struct drm_i915_private
> *dev_priv)
>
> int i915_save_state(struct drm_i915_private *dev_priv)
> {
> - struct pci_dev *pdev = dev_priv->drm.pdev;
> int i;
>
> i915_save_display(dev_priv);
>
> - if (IS_GEN(dev_priv, 4))
> - pci_read_config_word(pdev, GCDGMBUS,
> - _priv->regfile.saveGCDGMBUS);
> -
> /* Cache mode state */
> if (INTEL_GEN(dev_priv) < 7)
> dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
> @@ -102,12 +109,8 @@ int i915_save_state(struct drm_i915_private *dev_priv)
>
> int i915_restore_state(struct drm_i915_private *dev_priv)
> {
> - struct pci_dev *pdev = dev_priv->drm.pdev;
> int i;
>
> - if (IS_GEN(dev_priv, 4))
> - pci_write_config_word(pdev, GCDGMBUS,
> - dev_priv->regfile.saveGCDGMBUS);
> i915_restore_display(dev_priv);
>
> /* Cache mode state */
> --
> 2.20.1
>
> ___
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
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Re: [Intel-gfx] [PATCH 1/3] drm/i915: disable all display features when no display
On Thu, Sep 10, 2020 at 12:52:25PM +0300, Jani Nikula wrote:
> Disable all display feature flags when there are no pipes i.e. there is
> no display. This should help with not having to additionally check for
> HAS_DISPLAY() when a feature flag check would suffice.
>
> Also disable modeset and atomic driver features.
While bspec is rather vague whether this is actually entirely consistent
with how th hw works, it seems rather silly if any display hw blocks
would get initialized by the BIOS/whatever when there are no usable
pipes.
Reviewed-by: Ville Syrjälä
>
> Cc: Ville Syrjälä
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/intel_device_info.c | 8
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c
> b/drivers/gpu/drm/i915/intel_device_info.c
> index e2aa5bc3a6e0..adc836f15fde 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -516,6 +516,14 @@ void intel_device_info_runtime_init(struct
> drm_i915_private *dev_priv)
> S32_MAX),
> USEC_PER_SEC));
> }
> +
> + if (!HAS_DISPLAY(dev_priv)) {
> + dev_priv->drm.driver_features &= ~(DRIVER_MODESET |
> +DRIVER_ATOMIC);
> + memset(>display, 0, sizeof(info->display));
> + memset(runtime->num_sprites, 0, sizeof(runtime->num_sprites));
> + memset(runtime->num_scalers, 0, sizeof(runtime->num_scalers));
Side note: No idea why the num_scalers/sprites is stored under the
runtime info. I think those could just live in the normal PCI ID
based device info.
> + }
> }
>
> void intel_driver_caps_print(const struct intel_driver_caps *caps,
> --
> 2.20.1
--
Ville Syrjälä
Intel
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[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: disable all display features when no display
== Series Details ==
Series: series starting with [1/3] drm/i915: disable all display features when
no display
URL : https://patchwork.freedesktop.org/series/81541/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8992 -> Patchwork_18466
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/index.html
Known issues
Here are the changes found in Patchwork_18466 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_gttfill@basic:
- fi-kbl-7500u: [PASS][1] -> [INCOMPLETE][2] ([i915#2439])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-kbl-7500u/igt@gem_exec_gttf...@basic.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-kbl-7500u/igt@gem_exec_gttf...@basic.html
* igt@gem_tiled_fence_blits@basic:
- fi-pnv-d510:[PASS][3] -> [INCOMPLETE][4] ([i915#2439] /
[i915#299])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-pnv-d510/igt@gem_tiled_fence_bl...@basic.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-pnv-d510/igt@gem_tiled_fence_bl...@basic.html
* igt@i915_selftest@live@gem_execbuf:
- fi-blb-e6850: [PASS][5] -> [INCOMPLETE][6] ([i915#2440])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-blb-e6850/igt@i915_selftest@live@gem_execbuf.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-blb-e6850/igt@i915_selftest@live@gem_execbuf.html
- fi-snb-2600:[PASS][7] -> [INCOMPLETE][8] ([i915#2440] / [i915#82])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-snb-2600/igt@i915_selftest@live@gem_execbuf.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-snb-2600/igt@i915_selftest@live@gem_execbuf.html
- fi-ilk-650: [PASS][9] -> [INCOMPLETE][10] ([i915#2439])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-ilk-650/igt@i915_selftest@live@gem_execbuf.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-ilk-650/igt@i915_selftest@live@gem_execbuf.html
Possible fixes
* igt@debugfs_test@read_all_entries:
- {fi-kbl-7560u}: [INCOMPLETE][11] ([i915#2417]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-kbl-7560u/igt@debugfs_test@read_all_entries.html
* igt@gem_exec_gttfill@basic:
- fi-cfl-guc: [INCOMPLETE][13] ([i915#2439]) -> [PASS][14]
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-cfl-guc/igt@gem_exec_gttf...@basic.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-cfl-guc/igt@gem_exec_gttf...@basic.html
* igt@i915_module_load@reload:
- fi-kbl-soraka: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-kbl-soraka/igt@i915_module_l...@reload.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-kbl-soraka/igt@i915_module_l...@reload.html
* igt@i915_selftest@live@gem_execbuf:
- fi-bsw-nick:[INCOMPLETE][17] ([i915#2439]) -> [PASS][18]
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-bsw-nick/igt@i915_selftest@live@gem_execbuf.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-bsw-nick/igt@i915_selftest@live@gem_execbuf.html
- {fi-tgl-dsi}: [INCOMPLETE][19] ([i915#2439]) -> [PASS][20]
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-tgl-dsi/igt@i915_selftest@live@gem_execbuf.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-tgl-dsi/igt@i915_selftest@live@gem_execbuf.html
Warnings
* igt@runner@aborted:
- fi-kbl-r: [FAIL][21] ([i915#1186] / [i915#2439]) -> [FAIL][22]
([i915#1186] / [i915#1784] / [i915#2439])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-kbl-r/igt@run...@aborted.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-kbl-r/igt@run...@aborted.html
- fi-kbl-7500u: [FAIL][23] ([i915#1784] / [i915#2398] / [i915#2439])
-> [FAIL][24] ([i915#1186] / [i915#2439])
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-kbl-7500u/igt@run...@aborted.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-kbl-7500u/igt@run...@aborted.html
- fi-kbl-guc: [FAIL][25] ([i915#1186] / [i915#1784] / [i915#2439])
-> [FAIL][26] ([i915#1186] / [i915#2439])
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8992/fi-kbl-guc/igt@run...@aborted.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18466/fi-kbl-guc/igt@run...@aborted.html
- fi-cml-s: [FAIL][27] ([i915#1186] / [i915#2082] / [i915#2439])
->
Re: [Intel-gfx] [PATCH] drm/i915: Fix DMA mapped scatterlist walks
On 09/09/2020 20:29, Logan Gunthorpe wrote:
On 2020-09-09 6:44 a.m., Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
When walking DMA mapped scatterlists sg_dma_len has to be used since it
can be different (coalesced) from the backing store entry.
This also means we have to end the walk when encountering a zero length
DMA entry and cannot rely on the normal sg list end marker.
Both issues were there in theory for some time but were hidden by the fact
Intel IOMMU driver was never coalescing entries. As there are ongoing
efforts to change this we need to start handling it.
Signed-off-by: Tvrtko Ursulin
References: 85d1225ec066 ("drm/i915: Introduce & use new lightweight SGL
iterators")
References: b31144c0daa8 ("drm/i915: Micro-optimise
gen6_ppgtt_insert_entries()")
Reported-by: Tom Murphy
Suggested-by: Tom Murphy # __sgt_iter
Suggested-by: Logan Gunthorpe # __sgt_iter
Cc: Joonas Lahtinen
Cc: Chris Wilson
Cc: Matthew Auld
Cc: Lu Baolu
---
drivers/gpu/drm/i915/gt/gen6_ppgtt.c| 6 +++---
drivers/gpu/drm/i915/gt/gen8_ppgtt.c| 17 ++---
drivers/gpu/drm/i915/gt/intel_gtt.h | 2 +-
drivers/gpu/drm/i915/i915_scatterlist.h | 12
4 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
index fd0d24d28763..c0d17f87b00f 100644
--- a/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen6_ppgtt.c
@@ -131,17 +131,17 @@ static void gen6_ppgtt_insert_entries(struct
i915_address_space *vm,
vaddr = kmap_atomic_px(i915_pt_entry(pd, act_pt));
do {
- GEM_BUG_ON(iter.sg->length < I915_GTT_PAGE_SIZE);
+ GEM_BUG_ON(sg_dma_len(iter.sg) < I915_GTT_PAGE_SIZE);
vaddr[act_pte] = pte_encode | GEN6_PTE_ADDR_ENCODE(iter.dma);
iter.dma += I915_GTT_PAGE_SIZE;
if (iter.dma == iter.max) {
iter.sg = __sg_next(iter.sg);
- if (!iter.sg)
+ if (!iter.sg || sg_dma_len(iter.sg) == 0)
break;
iter.dma = sg_dma_address(iter.sg);
- iter.max = iter.dma + iter.sg->length;
+ iter.max = iter.dma + sg_dma_len(iter.sg);
}
if (++act_pte == GEN6_PTES) {
diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index eb64f474a78c..0361b3dfdc72 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -372,19 +372,19 @@ gen8_ppgtt_insert_pte(struct i915_ppgtt *ppgtt,
pd = i915_pd_entry(pdp, gen8_pd_index(idx, 2));
vaddr = kmap_atomic_px(i915_pt_entry(pd, gen8_pd_index(idx, 1)));
do {
- GEM_BUG_ON(iter->sg->length < I915_GTT_PAGE_SIZE);
+ GEM_BUG_ON(sg_dma_len(iter->sg) < I915_GTT_PAGE_SIZE);
vaddr[gen8_pd_index(idx, 0)] = pte_encode | iter->dma;
iter->dma += I915_GTT_PAGE_SIZE;
if (iter->dma >= iter->max) {
iter->sg = __sg_next(iter->sg);
- if (!iter->sg) {
+ if (!iter->sg || sg_dma_len(iter->sg) == 0) {
idx = 0;
break;
}
iter->dma = sg_dma_address(iter->sg);
- iter->max = iter->dma + iter->sg->length;
+ iter->max = iter->dma + sg_dma_len(iter->sg);
}
if (gen8_pd_index(++idx, 0) == 0) {
@@ -414,7 +414,7 @@ static void gen8_ppgtt_insert_huge(struct i915_vma *vma,
{
const gen8_pte_t pte_encode = gen8_pte_encode(0, cache_level, flags);
u64 start = vma->node.start;
- dma_addr_t rem = iter->sg->length;
+ dma_addr_t rem = sg_dma_len(iter->sg);
Seems a little odd to me to be storing a length in a dma_addr_t. But
besides that small nit, this all makes sense to me.
Reviewed-by: Logan Gunthorpe
I did not spot that, thanks. I'll improve that in v2 since I need to add
a 2nd patch to completely prepare i915 for this.
Regards,
Tvrtko
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Re: [Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
On 09/09/2020 22:06, Joe Perches wrote: diff --git a/drivers/net/wireless/mediatek/mt7601u/dma.c b/drivers/net/wireless/mediatek/mt7601u/dma.c index 09f931d4598c..778be26d329f 100644 --- a/drivers/net/wireless/mediatek/mt7601u/dma.c +++ b/drivers/net/wireless/mediatek/mt7601u/dma.c @@ -193,11 +193,11 @@ static void mt7601u_complete_rx(struct urb *urb) case -ESHUTDOWN: case -ENOENT: return; + case 0: + break; default: dev_err_ratelimited(dev->dev, "rx urb failed: %d\n", urb->status); - fallthrough; - case 0: break; } @@ -238,11 +238,11 @@ static void mt7601u_complete_tx(struct urb *urb) case -ESHUTDOWN: case -ENOENT: return; + case 0: + break; default: dev_err_ratelimited(dev->dev, "tx urb failed: %d\n", urb->status); - fallthrough; - case 0: break; } Reviewed-by: Matthias Brugger ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Fix an error code i915_gem_object_copy_blt()
This code should use "vma[1]" instead of "vma". The "vma" is a variable
is a valid pointer.
Fixes: 6b05030496f7 ("drm/i915: Convert i915_gem_object/client_blt.c to use ww
locking as well, v2.")
Signed-off-by: Dan Carpenter
---
drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
index d93eb36160c9..aee7ad3cc3c6 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
@@ -364,7 +364,7 @@ int i915_gem_object_copy_blt(struct drm_i915_gem_object
*src,
vma[1] = i915_vma_instance(dst, vm, NULL);
if (IS_ERR(vma[1]))
- return PTR_ERR(vma);
+ return PTR_ERR(vma[1]);
i915_gem_ww_ctx_init(, true);
intel_engine_pm_get(ce->engine);
--
2.28.0
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: disable all display features when no display
== Series Details == Series: series starting with [1/3] drm/i915: disable all display features when no display URL : https://patchwork.freedesktop.org/series/81541/ State : warning == Summary == $ dim checkpatch origin/drm-tip e7ece370fe10 drm/i915: disable all display features when no display 7e59438fed88 drm/i915: move gen4 GCDGMBUS save/restore to display save/restore -:31: CHECK:CAMELCASE: Avoid CamelCase: #31: FILE: drivers/gpu/drm/i915/i915_suspend.c:49: +_priv->regfile.saveGCDGMBUS); total: 0 errors, 0 warnings, 1 checks, 55 lines checked 765a8a2ae5c1 drm/i915: move gmbus restore to i915_restore_display ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 1/2] drm/i915: Reduce INTEL_DISPLAY_ENABLED to just removing the outputs
On Thu, 10 Sep 2020, Jani Nikula wrote:
> On Thu, 10 Sep 2020, Ville Syrjala wrote:
>> From: Ville Syrjälä
>>
>> Having a mode where the display hardware is present but we try
>> to pretend it isn't just leads to massive headaches when trying
>> to reason what the fallout might be from skipping some random
>> bits of programming.
>>
>> Let's just neuter INTEL_DISPLAY_ENABLED so that we treat the
>> hardware as fully present, except we just don't register any
>> outputs. That's still rather sketchy if the outputs are already
>> enabled when the driver is loaded. I think the simplest solution
>> would be to probe everything as normal and just return
>> disconnected" from all .detect() hooks. That would avoid anything
>> automagically enabling those outputs, but the driver could then
>> shut things down using the normal codepaths.
>>
>> Signed-off-by: Ville Syrjälä
>
> I agree with the reasoning and the patches. It will probably conflict
> with someone else's unspecified notion of what "display disable" should
> actually mean. But at least this approach is internally consistent.
>
> Would be great if we could hide the outputs from userspace afterwards,
> but that's probably not trivial.
>
> Both patches,
>
> Reviewed-by: Jani Nikula
Patch 1 in [1] is follow-up to this, patches 2-3 should probably have
been sent separately as related but independent.
BR,
Jani.
[1] https://patchwork.freedesktop.org/series/81541/
>
>
>> ---
>> drivers/gpu/drm/i915/display/intel_bios.c| 2 +-
>> drivers/gpu/drm/i915/display/intel_display.c | 8
>> drivers/gpu/drm/i915/display/intel_fbdev.c | 3 +--
>> drivers/gpu/drm/i915/display/intel_gmbus.c | 2 +-
>> drivers/gpu/drm/i915/i915_drv.c | 4 ++--
>> 5 files changed, 9 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
>> b/drivers/gpu/drm/i915/display/intel_bios.c
>> index a0a41ec5c341..c110cd9e8a73 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> @@ -2133,7 +2133,7 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
>>
>> INIT_LIST_HEAD(_priv->vbt.display_devices);
>>
>> -if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
>> +if (!HAS_DISPLAY(dev_priv)) {
>> drm_dbg_kms(_priv->drm,
>> "Skipping VBT init due to disabled display.\n");
>> return;
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
>> b/drivers/gpu/drm/i915/display/intel_display.c
>> index ec148a8da2c2..bacaf713eed4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>> @@ -17882,7 +17882,7 @@ int intel_modeset_init_noirq(struct drm_i915_private
>> *i915)
>> if (i915_inject_probe_failure(i915))
>> return -ENODEV;
>>
>> -if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
>> +if (HAS_DISPLAY(i915)) {
>> ret = drm_vblank_init(>drm,
>>INTEL_NUM_PIPES(i915));
>> if (ret)
>> @@ -17956,7 +17956,7 @@ int intel_modeset_init_nogem(struct drm_i915_private
>> *i915)
>> INTEL_NUM_PIPES(i915),
>> INTEL_NUM_PIPES(i915) > 1 ? "s" : "");
>>
>> -if (HAS_DISPLAY(i915) && INTEL_DISPLAY_ENABLED(i915)) {
>> +if (HAS_DISPLAY(i915)) {
>> for_each_pipe(i915, pipe) {
>> ret = intel_crtc_init(i915, pipe);
>> if (ret) {
>> @@ -18045,7 +18045,7 @@ int intel_modeset_init(struct drm_i915_private *i915)
>>
>> intel_overlay_setup(i915);
>>
>> -if (!HAS_DISPLAY(i915) || !INTEL_DISPLAY_ENABLED(i915))
>> +if (!HAS_DISPLAY(i915))
>> return 0;
>>
>> ret = intel_fbdev_init(>drm);
>> @@ -19018,7 +19018,7 @@ intel_display_capture_error_state(struct
>> drm_i915_private *dev_priv)
>>
>> BUILD_BUG_ON(ARRAY_SIZE(transcoders) != ARRAY_SIZE(error->transcoder));
>>
>> -if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv))
>> +if (!HAS_DISPLAY(dev_priv))
>> return NULL;
>>
>> error = kzalloc(sizeof(*error), GFP_ATOMIC);
>> diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c
>> b/drivers/gpu/drm/i915/display/intel_fbdev.c
>> index bd39eb6a21b8..842c04e63214 100644
>> --- a/drivers/gpu/drm/i915/display/intel_fbdev.c
>> +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c
>> @@ -451,8 +451,7 @@ int intel_fbdev_init(struct drm_device *dev)
>> struct intel_fbdev *ifbdev;
>> int ret;
>>
>> -if (drm_WARN_ON(dev, !HAS_DISPLAY(dev_priv) ||
>> -!INTEL_DISPLAY_ENABLED(dev_priv)))
>> +if (drm_WARN_ON(dev, !HAS_DISPLAY(dev_priv)))
>> return -ENODEV;
>>
>> ifbdev = kzalloc(sizeof(struct intel_fbdev), GFP_KERNEL);
>> diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c
>> b/drivers/gpu/drm/i915/display/intel_gmbus.c
>> index
[Intel-gfx] [PATCH 3/3] drm/i915: move gmbus restore to i915_restore_display
Logically part of the display restore. Note: This has been in place since the introduction of gmbus support. The gmbus code also does the resets before transfers. Is this really needed, or a historical accident? Cc: Ville Syrjälä Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_suspend.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 4a93247942b7..09026c4db7d0 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c @@ -69,6 +69,8 @@ static void i915_restore_display(struct drm_i915_private *dev_priv) I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL); intel_vga_redisable(dev_priv); + + intel_gmbus_reset(dev_priv); } int i915_save_state(struct drm_i915_private *dev_priv) @@ -141,7 +143,5 @@ int i915_restore_state(struct drm_i915_private *dev_priv) I915_WRITE(SWF3(i), dev_priv->regfile.saveSWF3[i]); } - intel_gmbus_reset(dev_priv); - return 0; } -- 2.20.1 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/3] drm/i915: disable all display features when no display
Disable all display feature flags when there are no pipes i.e. there is
no display. This should help with not having to additionally check for
HAS_DISPLAY() when a feature flag check would suffice.
Also disable modeset and atomic driver features.
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/intel_device_info.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index e2aa5bc3a6e0..adc836f15fde 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -516,6 +516,14 @@ void intel_device_info_runtime_init(struct
drm_i915_private *dev_priv)
S32_MAX),
USEC_PER_SEC));
}
+
+ if (!HAS_DISPLAY(dev_priv)) {
+ dev_priv->drm.driver_features &= ~(DRIVER_MODESET |
+ DRIVER_ATOMIC);
+ memset(>display, 0, sizeof(info->display));
+ memset(runtime->num_sprites, 0, sizeof(runtime->num_sprites));
+ memset(runtime->num_scalers, 0, sizeof(runtime->num_scalers));
+ }
}
void intel_driver_caps_print(const struct intel_driver_caps *caps,
--
2.20.1
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[Intel-gfx] [PATCH 2/3] drm/i915: move gen4 GCDGMBUS save/restore to display save/restore
Logically part of the display save/restore. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_suspend.c | 21 -
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c
b/drivers/gpu/drm/i915/i915_suspend.c
index ed2be3489f8e..4a93247942b7 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -34,6 +34,8 @@
static void i915_save_display(struct drm_i915_private *dev_priv)
{
+ struct pci_dev *pdev = dev_priv->drm.pdev;
+
/* Display arbitration control */
if (INTEL_GEN(dev_priv) <= 4)
dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);
@@ -41,10 +43,20 @@ static void i915_save_display(struct drm_i915_private
*dev_priv)
/* save FBC interval */
if (HAS_FBC(dev_priv) && INTEL_GEN(dev_priv) <= 4 && !IS_G4X(dev_priv))
dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);
+
+ if (IS_GEN(dev_priv, 4))
+ pci_read_config_word(pdev, GCDGMBUS,
+_priv->regfile.saveGCDGMBUS);
}
static void i915_restore_display(struct drm_i915_private *dev_priv)
{
+ struct pci_dev *pdev = dev_priv->drm.pdev;
+
+ if (IS_GEN(dev_priv, 4))
+ pci_write_config_word(pdev, GCDGMBUS,
+ dev_priv->regfile.saveGCDGMBUS);
+
/* Display arbitration */
if (INTEL_GEN(dev_priv) <= 4)
I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);
@@ -61,15 +73,10 @@ static void i915_restore_display(struct drm_i915_private
*dev_priv)
int i915_save_state(struct drm_i915_private *dev_priv)
{
- struct pci_dev *pdev = dev_priv->drm.pdev;
int i;
i915_save_display(dev_priv);
- if (IS_GEN(dev_priv, 4))
- pci_read_config_word(pdev, GCDGMBUS,
-_priv->regfile.saveGCDGMBUS);
-
/* Cache mode state */
if (INTEL_GEN(dev_priv) < 7)
dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);
@@ -102,12 +109,8 @@ int i915_save_state(struct drm_i915_private *dev_priv)
int i915_restore_state(struct drm_i915_private *dev_priv)
{
- struct pci_dev *pdev = dev_priv->drm.pdev;
int i;
- if (IS_GEN(dev_priv, 4))
- pci_write_config_word(pdev, GCDGMBUS,
- dev_priv->regfile.saveGCDGMBUS);
i915_restore_display(dev_priv);
/* Cache mode state */
--
2.20.1
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Re: [Intel-gfx] [RFC 0/6] HDCP 2.2 DP MST Support
On 2020-09-10 at 14:42:46 +0530, Ramalingam C wrote: > On 2020-09-10 at 13:47:21 +0530, Anshuman Gupta wrote: > > This is RFC proposal to support HDCP 2.2 on DP MST. > > This series is built on below series using the > > common functionality of HDCP stream encryption. > > Before I get into the series, what is the plan for CI coverage for > HDCP DP MST, w.r.t igt and hw. Hi Ram, We have ordered a benq DP MST panel which supports HDCP 2.2 https://www.benq.com/en-in/monitor/designer/pd2700u.html once we will recevie the panel, i will test my patches. Subsequently we will request CI team to procure similar panel. Thanks, Anshuman Gupta. > > Ram > > > > Anshuman Gupta (6): > > drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port > > drm/i915/hdcp: mst streams support in hdcp port_data > > drm/i915/hdcp: Pass connector to check_2_2_link > > drm/i915/hdcp: Add HDCP 2.2 stream register > > drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks > > drm/i915/hdcp: Enable HDCP 2.2 MST support > > > > .../drm/i915/display/intel_display_types.h| 9 +- > > drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 84 +++-- > > drivers/gpu/drm/i915/display/intel_hdcp.c | 114 +- > > drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +- > > drivers/gpu/drm/i915/i915_reg.h | 30 + > > drivers/misc/mei/hdcp/mei_hdcp.c | 2 +- > > include/drm/drm_hdcp.h| 8 +- > > 7 files changed, 204 insertions(+), 46 deletions(-) > > > > -- > > 2.26.2 > > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [RFC 0/6] HDCP 2.2 DP MST Support
On 2020-09-10 at 13:47:21 +0530, Anshuman Gupta wrote: > This is RFC proposal to support HDCP 2.2 on DP MST. > This series is built on below series using the > common functionality of HDCP stream encryption. Before I get into the series, what is the plan for CI coverage for HDCP DP MST, w.r.t igt and hw. Ram > > Anshuman Gupta (6): > drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port > drm/i915/hdcp: mst streams support in hdcp port_data > drm/i915/hdcp: Pass connector to check_2_2_link > drm/i915/hdcp: Add HDCP 2.2 stream register > drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks > drm/i915/hdcp: Enable HDCP 2.2 MST support > > .../drm/i915/display/intel_display_types.h| 9 +- > drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 84 +++-- > drivers/gpu/drm/i915/display/intel_hdcp.c | 114 +- > drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +- > drivers/gpu/drm/i915/i915_reg.h | 30 + > drivers/misc/mei/hdcp/mei_hdcp.c | 2 +- > include/drm/drm_hdcp.h| 8 +- > 7 files changed, 204 insertions(+), 46 deletions(-) > > -- > 2.26.2 > ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BUILD: failure for HDCP 2.2 DP MST Support
== Series Details == Series: HDCP 2.2 DP MST Support URL : https://patchwork.freedesktop.org/series/81538/ State : failure == Summary == Applying: drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Using index info to reconstruct a base tree... M drivers/gpu/drm/i915/display/intel_display_types.h M drivers/gpu/drm/i915/display/intel_hdcp.c Falling back to patching base and 3-way merge... Auto-merging drivers/gpu/drm/i915/display/intel_hdcp.c CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/display/intel_hdcp.c Auto-merging drivers/gpu/drm/i915/display/intel_display_types.h error: Failed to merge in the changes. hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0001 drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort". ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [trivial PATCH] treewide: Convert switch/case fallthrough; to break;
Hi, Joe Perches writes: > drivers/usb/dwc3/core.c | 2 +- > drivers/usb/gadget/legacy/inode.c | 2 +- > drivers/usb/gadget/udc/pxa25x_udc.c | 4 ++-- > drivers/usb/phy/phy-fsl-usb.c | 2 +- for the drivers above: Acked-by: Felipe Balbi -- balbi signature.asc Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [bug report] drm/i915: Use ww pinning for intel_context_create_request()
Hello Maarten Lankhorst,
The patch 8a929c9eb1c2: "drm/i915: Use ww pinning for
intel_context_create_request()" from Aug 19, 2020, leads to the
following static checker warning:
drivers/gpu/drm/i915/gt/intel_context.c:481
intel_context_create_request()
error: uninitialized symbol 'rq'.
drivers/gpu/drm/i915/gt/intel_context.c
459 struct i915_request *intel_context_create_request(struct intel_context
*ce)
460 {
461 struct i915_gem_ww_ctx ww;
462 struct i915_request *rq;
463 int err;
464
465 i915_gem_ww_ctx_init(, true);
466 retry:
467 err = intel_context_pin_ww(ce, );
468 if (!err) {
469 rq = i915_request_create(ce);
470 intel_context_unpin(ce);
471 } else if (err == -EDEADLK) {
472 err = i915_gem_ww_ctx_backoff();
473 if (!err)
474 goto retry;
"rq" not initialized on the -EDEADLK path.
475 } else {
476 rq = ERR_PTR(err);
477 }
478
479 i915_gem_ww_ctx_fini();
480
481 if (IS_ERR(rq))
^^
482 return rq;
483
regards,
dan carpenter
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[Intel-gfx] [bug report] drm/i915: Use per object locking in execbuf, v12.
Hey Dave,
I think this is a bad merge:
The patch c43ce12328df: "drm/i915: Use per object locking in execbuf,
v12." from Aug 19, 2020, leads to the following static checker
warning:
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:1459 __reloc_entry_gpu()
warn: signedness bug returning '(-35)'
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
1440 static bool __reloc_entry_gpu(struct i915_execbuffer *eb,
This should be int.
1441struct i915_vma *vma,
1442u64 offset,
1443u64 target_addr)
1444 {
1445 const unsigned int gen = eb->reloc_cache.gen;
1446 unsigned int len;
1447 u32 *batch;
1448 u64 addr;
1449
1450 if (gen >= 8)
1451 len = offset & 7 ? 8 : 5;
1452 else if (gen >= 4)
1453 len = 4;
1454 else
1455 len = 3;
1456
1457 batch = reloc_gpu(eb, vma, len);
1458 if (batch == ERR_PTR(-EDEADLK))
1459 return (s64)-EDEADLK;
No need for this cast, btw.
1460 else if (IS_ERR(batch))
1461 return false;
1462
1463 addr = gen8_canonical_addr(vma->node.start + offset);
1464 if (gen >= 8) {
1465 if (offset & 7) {
1466 *batch++ = MI_STORE_DWORD_IMM_GEN4;
1467 *batch++ = lower_32_bits(addr);
1468 *batch++ = upper_32_bits(addr);
1469 *batch++ = lower_32_bits(target_addr);
1470
1471 addr = gen8_canonical_addr(addr + 4);
1472
1473 *batch++ = MI_STORE_DWORD_IMM_GEN4;
1474 *batch++ = lower_32_bits(addr);
1475 *batch++ = upper_32_bits(addr);
regards,
dan carpenter
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[Intel-gfx] [RFC 5/6] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks
Add support for HDCP 2.2 DP MST shim callback.
This adds existing DP HDCP shim callback for Link Authentication
and Encryption and HDCP 2.2 stream encryption
callback.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
.../drm/i915/display/intel_display_types.h| 4 +
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 81 +--
2 files changed, 77 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index ccb2d3ef4cea..a168e5c32773 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -352,6 +352,10 @@ struct intel_hdcp_shim {
int (*config_stream_type)(struct intel_digital_port *dig_port,
bool is_repeater, u8 type);
+ /* Enable/Disable HDCP 2.2 stream encryption on DP MST Transport Link */
+ int (*stream_2_2_encryption)(struct intel_digital_port *dig_port,
+bool enable);
+
/* HDCP2.2 Link Integrity Check */
int (*check_2_2_link)(struct intel_digital_port *dig_port,
struct intel_connector *connector);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index d0fd02c37f75..4453228a6568 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -698,18 +698,14 @@ intel_dp_mst_hdcp_strem_encryption(struct
intel_digital_port *dig_port,
return 0;
}
-static
-bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
- struct intel_connector *connector)
+static bool intel_dp_mst_get_qses_status(struct intel_digital_port *dig_port,
+struct intel_connector *connector)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
- struct intel_dp *intel_dp = _port->dp;
struct drm_dp_query_stream_enc_status_ack_reply reply;
+ struct intel_dp *intel_dp = _port->dp;
int ret;
- if (!intel_dp_hdcp_check_link(dig_port, connector))
- return false;
-
ret = drm_dp_send_query_stream_enc_status(_dp->mst_mgr,
connector->port, );
if (ret) {
@@ -722,6 +718,70 @@ bool intel_dp_mst_hdcp_check_link(struct
intel_digital_port *dig_port,
return reply.auth_completed && reply.encryption_enabled;
}
+static
+bool intel_dp_mst_hdcp_check_link(struct intel_digital_port *dig_port,
+ struct intel_connector *connector)
+{
+ if (!intel_dp_hdcp_check_link(dig_port, connector))
+ return false;
+
+ return intel_dp_mst_get_qses_status(dig_port, connector);
+}
+
+static int
+intel_dp_mst_hdcp2_strem_encryption(struct intel_digital_port *dig_port,
+ bool enable)
+{
+ struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct intel_dp *dp = _port->dp;
+ struct intel_hdcp *hdcp = >attached_connector->hdcp;
+ enum port port = dig_port->base.port;
+ /* HDCP2.x register uses stream transcoder */
+ enum transcoder cpu_transcoder = hdcp->stream_transcoder;
+ int ret;
+
+ if (enable && (intel_de_read(i915, HDCP2_AUTH_STREAM(i915,
cpu_transcoder, port)) &
+ AUTH_STREAM_TYPE) != hdcp->content_type) {
+ drm_err(>drm, "Seurity f/w didn't set correct auth
strem_type\n");
+ return -EINVAL;
+ }
+
+ ret = intel_dp_mst_toggle_select_hdcp_stream(dig_port, enable);
+ if (ret)
+ return ret;
+
+ /* Wait for encryption confirmation */
+ if (intel_de_wait_for_register(i915,
+ HDCP2_STREAM_STATUS(i915,
cpu_transcoder, port),
+ STREAM_ENCRYPTION_STATUS,
+ enable ? STREAM_ENCRYPTION_STATUS : 0,
+ HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
+ drm_err(>drm, "Timed out waiting for stream encryption
%s\n",
+ enable ? "enabled" : "disabled");
+ return -ETIMEDOUT;
+ }
+
+ return 0;
+}
+
+/*
+ * DP v2.0 I.3.3 ignore the stream signature L' is QSES reply msg reply.
+ * I.3.5 MST source device may use a QSES msg to query downstream status
+ * for a particular stream.
+ */
+static
+int intel_dp_mst_hdcp2_check_link(struct intel_digital_port *dig_port,
+ struct intel_connector *connector)
+{
+ int ret;
+
+ ret = intel_dp_hdcp2_check_link(dig_port, connector);
+ if (ret)
+ return ret;
+
+ return intel_dp_mst_get_qses_status(dig_port, connector) ? 0 : -EINVAL;
+}
+
static const struct intel_hdcp_shim
[Intel-gfx] [RFC 4/6] drm/i915/hdcp: Add HDCP 2.2 stream register
Add HDCP 2.2 DP MST HDCP2_STREAM_STATUS
and HDCP2_AUTH_STREAM register in i915_reg header.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/i915_reg.h | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1a027b1ec5aa..d4995389cecd 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9857,6 +9857,7 @@ enum skl_power_gate {
_PORTD_HDCP2_BASE, \
_PORTE_HDCP2_BASE, \
_PORTF_HDCP2_BASE) + (x))
+
#define PORT_HDCP2_AUTH(port) _PORT_HDCP2_BASE(port, 0x98)
#define _TRANSA_HDCP2_AUTH 0x66498
#define _TRANSB_HDCP2_AUTH 0x66598
@@ -9896,6 +9897,35 @@ enum skl_power_gate {
TRANS_HDCP2_STATUS(trans) : \
PORT_HDCP2_STATUS(port))
+#define PORT_HDCP2_STREAM_STATUS(port) _PORT_HDCP2_BASE(port, 0xC0)
+#define _TRANSA_HDCP2_STREAM_STATUS0x664C0
+#define _TRANSB_HDCP2_STREAM_STATUS0x665C0
+#define TRANS_HDCP2_STREAM_STATUS(trans) _MMIO_TRANS(trans, \
+
_TRANSA_HDCP2_STREAM_STATUS, \
+ _TRANSB_HDCP2_STREAM_STATUS)
+#define STREAM_ENCRYPTION_STATUS BIT(31)
+#define STREAM_TYPE_STATUS BIT(30)
+#define HDCP2_STREAM_STATUS(dev_priv, trans, port) \
+ (INTEL_GEN(dev_priv) >= 12 ? \
+TRANS_HDCP2_STREAM_STATUS(trans) : \
+PORT_HDCP2_STREAM_STATUS(port))
+
+#define _PORTA_HDCP2_AUTH_STREAM 0x66F00
+#define _PORTB_HDCP2_AUTH_STREAM 0x66F04
+#define PORT_HDCP2_AUTH_STREAM(port) _MMIO_PORT(port, \
+ _PORTA_HDCP2_AUTH_STREAM, \
+ _PORTB_HDCP2_AUTH_STREAM)
+#define _TRANSA_HDCP2_AUTH_STREAM 0x66F00
+#define _TRANSB_HDCP2_AUTH_STREAM 0x66F04
+#define TRANS_HDCP2_AUTH_STREAM(trans) _MMIO_TRANS(trans, \
+ _TRANSA_HDCP2_AUTH_STREAM, \
+ _TRANSB_HDCP2_AUTH_STREAM)
+#define AUTH_STREAM_TYPE BIT(31)
+#define HDCP2_AUTH_STREAM(dev_priv, trans, port) \
+ (INTEL_GEN(dev_priv) >= 12 ? \
+TRANS_HDCP2_AUTH_STREAM(trans) : \
+PORT_HDCP2_AUTH_STREAM(port))
+
/* Per-pipe DDI Function Control */
#define _TRANS_DDI_FUNC_CTL_A 0x60400
#define _TRANS_DDI_FUNC_CTL_B 0x61400
--
2.26.2
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[Intel-gfx] [RFC 3/6] drm/i915/hdcp: Pass connector to check_2_2_link
This requires for HDCP 2.2 MST check link.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_display_types.h | 3 ++-
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 3 ++-
drivers/gpu/drm/i915/display/intel_hdcp.c | 2 +-
drivers/gpu/drm/i915/display/intel_hdmi.c | 3 ++-
4 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 2239ab6bd823..ccb2d3ef4cea 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -353,7 +353,8 @@ struct intel_hdcp_shim {
bool is_repeater, u8 type);
/* HDCP2.2 Link Integrity Check */
- int (*check_2_2_link)(struct intel_digital_port *dig_port);
+ int (*check_2_2_link)(struct intel_digital_port *dig_port,
+ struct intel_connector *connector);
};
struct intel_hdcp {
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 652d4645f255..d0fd02c37f75 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -585,7 +585,8 @@ int intel_dp_hdcp2_config_stream_type(struct
intel_digital_port *dig_port,
}
static
-int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port)
+int intel_dp_hdcp2_check_link(struct intel_digital_port *dig_port,
+ struct intel_connector *connector)
{
u8 rx_status;
int ret;
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index ed455fbb4c71..f7ca9dfad825 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1860,7 +1860,7 @@ static int intel_hdcp2_check_link(struct intel_connector
*connector)
goto out;
}
- ret = hdcp->shim->check_2_2_link(dig_port);
+ ret = hdcp->shim->check_2_2_link(dig_port, connector);
if (ret == HDCP_LINK_PROTECTED) {
if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) {
intel_hdcp_update_value(connector,
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 39845d14691b..78940934601d 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1734,7 +1734,8 @@ int intel_hdmi_hdcp2_read_msg(struct intel_digital_port
*dig_port,
}
static
-int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port)
+int intel_hdmi_hdcp2_check_link(struct intel_digital_port *dig_port,
+ struct intel_connector *connector)
{
u8 rx_status[HDCP_2_2_HDMI_RXSTATUS_LEN];
int ret;
--
2.26.2
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[Intel-gfx] [RFC 6/6] drm/i915/hdcp: Enable HDCP 2.2 MST support
Enable HDCP 2.2 over DP MST.
Cc: Ramalingam C
Signed-off-by: Anshuman Gupta
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index f7ca9dfad825..2498c2c7c245 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1698,6 +1698,14 @@ static int hdcp2_enable_encryption(struct
intel_connector *connector)
LINK_ENCRYPTION_STATUS,
HDCP_ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
+ if (hdcp->shim->stream_2_2_encryption) {
+ ret = hdcp->shim->stream_2_2_encryption(dig_port, true);
+ if (ret) {
+ drm_err(_priv->drm, "Failed to enable HDCP 2.2
stream enc\n");
+ return ret;
+ }
+ }
+
return ret;
}
@@ -1810,6 +1818,7 @@ static int _intel_hdcp2_disable(struct intel_connector
*connector)
struct intel_digital_port *dig_port =
intel_attached_dig_port(connector);
struct drm_i915_private *i915 = to_i915(connector->base.dev);
struct hdcp_port_data *data = _port->port_data;
+ struct intel_hdcp *hdcp = >hdcp;
int ret;
drm_dbg_kms(>drm, "[%s:%d] HDCP2.2 is being Disabled\n",
@@ -1818,6 +1827,14 @@ static int _intel_hdcp2_disable(struct intel_connector
*connector)
if (drm_WARN_ON(>drm, data->k < 0))
return -EINVAL;
+ if (dig_port->num_hdcp_streams > 0 &&
hdcp->shim->stream_2_2_encryption) {
+ ret = hdcp->shim->stream_2_2_encryption(dig_port, false);
+ if (ret) {
+ drm_err(>drm, "Failed to disable HDCP 2.2 stream
enc\n");
+ return ret;
+ }
+ }
+
ret = hdcp2_disable_encryption(connector);
if (hdcp2_deauthenticate_port(connector) < 0)
@@ -2097,7 +2114,7 @@ int intel_hdcp_init(struct intel_connector *connector,
if (!shim)
return -EINVAL;
- if (is_hdcp2_supported(dev_priv) && !connector->mst_port)
+ if (is_hdcp2_supported(dev_priv))
intel_hdcp2_init(connector, port, shim);
ret =
--
2.26.2
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