Re: [Intel-gfx] [PATCH v3 5/9] drm/i915/reg: add stream splitter configuration definitions
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Thursday, February 11, 2021 8:22 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Varide, Nischal
>
> Subject: [Intel-gfx] [PATCH v3 5/9] drm/i915/reg: add stream splitter
> configuration
> definitions
>
> The splitter configuration is required for eDP MSO.
Looks Good to me.
Reviewed-by: Uma Shankar
> Bspec: 50174
> Cc: Nischal Varide
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 224ad897af34..e5dd0203991b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -11448,6 +11448,9 @@ enum skl_power_gate {
> #define BIG_JOINER_ENABLE (1 << 29)
> #define MASTER_BIG_JOINER_ENABLE(1 << 28)
> #define VGA_CENTERING_ENABLE(1 << 27)
> +#define SPLITTER_CONFIGURATION_MASK REG_GENMASK(26, 25)
> +#define SPLITTER_CONFIGURATION_2_SEGMENT
> REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 0)
> +#define SPLITTER_CONFIGURATION_4_SEGMENT
> REG_FIELD_PREP(SPLITTER_CONFIGURATION_MASK, 1)
>
> #define _ICL_PIPE_DSS_CTL2_PB0x78204
> #define _ICL_PIPE_DSS_CTL2_PC0x78404
> --
> 2.20.1
>
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Re: [Intel-gfx] [PATCH v3 4/9] drm/i915/edp: read sink MSO configuration for eDP 1.4+
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Thursday, February 11, 2021 8:22 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Varide, Nischal
>
> Subject: [Intel-gfx] [PATCH v3 4/9] drm/i915/edp: read sink MSO configuration
> for
> eDP 1.4+
>
> Read and debug log the eDP sink MSO configuration. Do not actually do anything
> with the information yet besides logging.
>
> FIXME: The pixel overlap is present in DisplayID 2.0, but we don't have
> parsing for
> that. Assume zero for now. We could also add quirks for non-zero pixel overlap
> before DisplayID 2.0 parsing.
>
> v3: Add placeholder for pixel overlap.
>
> v2: Rename intel_dp_mso_init -> intel_edp_mso_init
Looks Good to me.
Reviewed-by: Uma Shankar
> Cc: Nischal Varide
> Signed-off-by: Jani Nikula
> ---
> .../drm/i915/display/intel_display_types.h| 2 ++
> drivers/gpu/drm/i915/display/intel_dp.c | 33 +++
> 2 files changed, 35 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index ebaa9d0ed376..71611b596c88 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1487,6 +1487,8 @@ struct intel_dp {
> int max_link_lane_count;
> /* Max rate for the current link */
> int max_link_rate;
> + int mso_link_count;
> + int mso_pixel_overlap;
> /* sink or branch descriptor */
> struct drm_dp_desc desc;
> struct drm_dp_aux aux;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 8d7ca03453e5..48e65b9a967a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3516,6 +3516,37 @@ static void intel_dp_get_dsc_sink_cap(struct intel_dp
> *intel_dp)
> }
> }
>
> +static void intel_edp_mso_init(struct intel_dp *intel_dp) {
> + struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> + u8 mso;
> +
> + if (intel_dp->edp_dpcd[0] < DP_EDP_14)
> + return;
> +
> + if (drm_dp_dpcd_readb(&intel_dp->aux, DP_EDP_MSO_LINK_CAPABILITIES,
> &mso) != 1) {
> + drm_err(&i915->drm, "Failed to read MSO cap\n");
> + return;
> + }
> +
> + /* Valid configurations are SST or MSO 2x1, 2x2, 4x1 */
> + mso &= DP_EDP_MSO_NUMBER_OF_LINKS_MASK;
> + if (mso % 2 || mso > drm_dp_max_lane_count(intel_dp->dpcd)) {
> + drm_err(&i915->drm, "Invalid MSO link count cap %u\n", mso);
> + mso = 0;
> + }
> +
> + if (mso) {
> + drm_dbg_kms(&i915->drm, "Sink MSO %ux%u configuration\n",
> + mso, drm_dp_max_lane_count(intel_dp->dpcd) / mso);
> + drm_err(&i915->drm, "No source MSO support, disabling\n");
> + mso = 0;
> + }
> +
> + intel_dp->mso_link_count = mso;
> + intel_dp->mso_pixel_overlap = 0; /* FIXME: read from DisplayID v2.0 */
> +}
> +
> static bool
> intel_edp_init_dpcd(struct intel_dp *intel_dp) { @@ -3599,6 +3630,8 @@
> intel_edp_init_dpcd(struct intel_dp *intel_dp)
>*/
> intel_edp_init_source_oui(intel_dp, true);
>
> + intel_edp_mso_init(intel_dp);
> +
> return true;
> }
>
> --
> 2.20.1
>
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Re: [Intel-gfx] [PATCH v3 3/9] drm/i915/edp: always add fixed mode to probed modes in ->get_modes()
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Thursday, February 11, 2021 8:22 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Varide, Nischal
>
> Subject: [Intel-gfx] [PATCH v3 3/9] drm/i915/edp: always add fixed mode to
> probed
> modes in ->get_modes()
>
> Unconditionally add fixed mode to probed modes even if EDID is present and has
> modes. Prepare for cases where the fixed mode is not present in EDID (such as
> eDP
> MSO).
Looks Good to me.
Reviewed-by: Uma Shankar
> Cc: Nischal Varide
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 16 +---
> 1 file changed, 9 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 169b44c8ebbc..8d7ca03453e5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5547,19 +5547,18 @@ static int intel_dp_get_modes(struct drm_connector
> *connector) {
> struct intel_connector *intel_connector = to_intel_connector(connector);
> struct edid *edid;
> + int num_modes = 0;
>
> edid = intel_connector->detect_edid;
> if (edid) {
> - int ret = intel_connector_update_modes(connector, edid);
> + num_modes = intel_connector_update_modes(connector, edid);
>
> if (intel_vrr_is_capable(connector))
> drm_connector_set_vrr_capable_property(connector,
> true);
> - if (ret)
> - return ret;
> }
>
> - /* if eDP has no EDID, fall back to fixed mode */
> + /* Also add fixed mode, which may or may not be present in EDID */
> if (intel_dp_is_edp(intel_attached_dp(intel_connector)) &&
> intel_connector->panel.fixed_mode) {
> struct drm_display_mode *mode;
> @@ -5568,10 +5567,13 @@ static int intel_dp_get_modes(struct drm_connector
> *connector)
> intel_connector->panel.fixed_mode);
> if (mode) {
> drm_mode_probed_add(connector, mode);
> - return 1;
> + num_modes++;
> }
> }
>
> + if (num_modes)
> + return num_modes;
> +
> if (!edid) {
> struct intel_dp *intel_dp = intel_attached_dp(intel_connector);
> struct drm_display_mode *mode;
> @@ -5581,11 +5583,11 @@ static int intel_dp_get_modes(struct drm_connector
> *connector)
> intel_dp->downstream_ports);
> if (mode) {
> drm_mode_probed_add(connector, mode);
> - return 1;
> + num_modes++;
> }
> }
>
> - return 0;
> + return num_modes;
> }
>
> static int
> --
> 2.20.1
>
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Re: [Intel-gfx] [PATCH v3 2/9] drm/i915/edp: reject modes with dimensions other than fixed mode
> -Original Message-
> From: Intel-gfx On Behalf Of Jani
> Nikula
> Sent: Thursday, February 11, 2021 8:22 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani ; Varide, Nischal
>
> Subject: [Intel-gfx] [PATCH v3 2/9] drm/i915/edp: reject modes with dimensions
> other than fixed mode
>
> Be more strict about filtering modes for eDP.
>
> Cc: Nischal Varide
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4f89e0de5dde..169b44c8ebbc 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -789,10 +789,10 @@ intel_dp_mode_valid(struct drm_connector *connector,
> return MODE_H_ILLEGAL;
>
> if (intel_dp_is_edp(intel_dp) && fixed_mode) {
> - if (mode->hdisplay > fixed_mode->hdisplay)
> + if (mode->hdisplay != fixed_mode->hdisplay)
> return MODE_PANEL;
Looks fine as we practically will not have panels with multiple resolutions
except maybe mode with varying
refresh rate incase of DRRS panels. But hdisplay and vdisplay will still remain
same.
Reviewed-by: Uma Shankar
> - if (mode->vdisplay > fixed_mode->vdisplay)
> + if (mode->vdisplay != fixed_mode->vdisplay)
> return MODE_PANEL;
>
> target_clock = fixed_mode->clock;
> --
> 2.20.1
>
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Re: [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers
> -Original Message- > From: Intel-gfx On Behalf Of Jani > Nikula > Sent: Thursday, February 11, 2021 8:22 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani ; Varide, Nischal > ; dri-de...@lists.freedesktop.org > Subject: [Intel-gfx] [PATCH v3 1/9] drm/dp: add MSO related DPCD registers > > Add DPCD register definitions for eDP 1.4 Multi-SST Operation. Looks Good to me. Reviewed-by: Uma Shankar > Cc: Nischal Varide > Cc: dri-de...@lists.freedesktop.org > Signed-off-by: Jani Nikula > --- > include/drm/drm_dp_helper.h | 5 + > 1 file changed, 5 insertions(+) > > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index > edffd1dcca3e..632ad7faa006 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -1016,6 +1016,11 @@ struct drm_device; > #define DP_EDP_REGIONAL_BACKLIGHT_BASE 0x740/* eDP 1.4 */ > #define DP_EDP_REGIONAL_BACKLIGHT_0 0x741/* eDP 1.4 */ > > +#define DP_EDP_MSO_LINK_CAPABILITIES0x7a4/* eDP 1.4 */ > +# define DP_EDP_MSO_NUMBER_OF_LINKS_MASK(7 << 0) > +# define DP_EDP_MSO_NUMBER_OF_LINKS_SHIFT 0 > +# define DP_EDP_MSO_INDEPENDENT_LINK_BIT(1 << 3) > + > /* Sideband MSG Buffers */ > #define DP_SIDEBAND_MSG_DOWN_REQ_BASE0x1000 /* 1.2 MST */ > #define DP_SIDEBAND_MSG_UP_REP_BASE 0x1200 /* 1.2 MST */ > -- > 2.20.1 > > ___ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 20/30] drm/dp: Pass drm_dp_aux to drm_dp*_link_train_channel_eq_delay()
Hi Lyude,
Thank you for the patch.
On Fri, Feb 19, 2021 at 04:53:16PM -0500, Lyude Paul wrote:
> So that we can start using drm_dbg_*() for
> drm_dp_link_train_channel_eq_delay() and
> drm_dp_lttpr_link_train_channel_eq_delay().
>
> Signed-off-by: Lyude Paul
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 2 +-
> drivers/gpu/drm/drm_dp_helper.c| 14 +-
> .../gpu/drm/i915/display/intel_dp_link_training.c | 4 ++--
> drivers/gpu/drm/msm/dp/dp_ctrl.c | 4 ++--
> drivers/gpu/drm/msm/edp/edp_ctrl.c | 4 ++--
> drivers/gpu/drm/radeon/atombios_dp.c | 2 +-
> drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +-
> include/drm/drm_dp_helper.h| 6 --
> 8 files changed, 22 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> index 4468f9d6b4dd..59ce6f620fdc 100644
> --- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> @@ -676,7 +676,7 @@ amdgpu_atombios_dp_link_train_ce(struct
> amdgpu_atombios_dp_link_train_info *dp_i
> dp_info->tries = 0;
> channel_eq = false;
> while (1) {
> - drm_dp_link_train_channel_eq_delay(dp_info->dpcd);
> + drm_dp_link_train_channel_eq_delay(dp_info->aux, dp_info->dpcd);
>
> if (drm_dp_dpcd_read_link_status(dp_info->aux,
>dp_info->link_status) <= 0) {
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index ce08eb3bface..a9316c1ecb52 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -151,7 +151,8 @@ void drm_dp_link_train_clock_recovery_delay(const struct
> drm_dp_aux *aux,
> }
> EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
>
> -static void __drm_dp_link_train_channel_eq_delay(unsigned long rd_interval)
> +static void __drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux
> *aux,
> + unsigned long rd_interval)
> {
> if (rd_interval > 4)
> DRM_DEBUG_KMS("AUX interval %lu, out of range (max 4)\n",
> @@ -165,9 +166,11 @@ static void
> __drm_dp_link_train_channel_eq_delay(unsigned long rd_interval)
> usleep_range(rd_interval, rd_interval * 2);
> }
>
> -void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
> +void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux,
> + const u8 dpcd[DP_RECEIVER_CAP_SIZE])
> {
> - __drm_dp_link_train_channel_eq_delay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
> + __drm_dp_link_train_channel_eq_delay(aux,
> + dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
>DP_TRAINING_AUX_RD_MASK);
> }
> EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
> @@ -183,13 +186,14 @@ static u8 dp_lttpr_phy_cap(const u8
> phy_cap[DP_LTTPR_PHY_CAP_SIZE], int r)
> return phy_cap[r - DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1];
> }
>
> -void drm_dp_lttpr_link_train_channel_eq_delay(const u8
> phy_cap[DP_LTTPR_PHY_CAP_SIZE])
> +void drm_dp_lttpr_link_train_channel_eq_delay(const struct drm_dp_aux *aux,
> + const u8
> phy_cap[DP_LTTPR_PHY_CAP_SIZE])
> {
> u8 interval = dp_lttpr_phy_cap(phy_cap,
>
> DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1) &
> DP_TRAINING_AUX_RD_MASK;
>
> - __drm_dp_link_train_channel_eq_delay(interval);
> + __drm_dp_link_train_channel_eq_delay(aux, interval);
> }
> EXPORT_SYMBOL(drm_dp_lttpr_link_train_channel_eq_delay);
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 222073d46bdb..fe8b5a5d9d1a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -593,11 +593,11 @@
> intel_dp_link_training_channel_equalization_delay(struct intel_dp *intel_dp,
> enum drm_dp_phy dp_phy)
> {
> if (dp_phy == DP_PHY_DPRX) {
> - drm_dp_link_train_channel_eq_delay(intel_dp->dpcd);
> + drm_dp_link_train_channel_eq_delay(&intel_dp->aux,
> intel_dp->dpcd);
> } else {
> const u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy);
>
> - drm_dp_lttpr_link_train_channel_eq_delay(phy_caps);
> + drm_dp_lttpr_link_train_channel_eq_delay(&intel_dp->aux,
> phy_caps);
> }
> }
>
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> index 2501a6b326a3..33df288dd4eb 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> +++ b/drive
Re: [Intel-gfx] [PATCH 19/30] drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()
Hi Lyude,
Thank you for the patch.
On Fri, Feb 19, 2021 at 04:53:15PM -0500, Lyude Paul wrote:
> So that we can start using drm_dbg_*() in
> drm_dp_link_train_clock_recovery_delay().
>
> Signed-off-by: Lyude Paul
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 2 +-
> drivers/gpu/drm/drm_dp_helper.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
> drivers/gpu/drm/msm/dp/dp_ctrl.c | 2 +-
> drivers/gpu/drm/msm/edp/edp_ctrl.c| 2 +-
> drivers/gpu/drm/radeon/atombios_dp.c | 2 +-
> drivers/gpu/drm/xlnx/zynqmp_dp.c | 2 +-
> include/drm/drm_dp_helper.h | 4 +++-
> 8 files changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> index 6d35da65e09f..4468f9d6b4dd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> @@ -611,7 +611,7 @@ amdgpu_atombios_dp_link_train_cr(struct
> amdgpu_atombios_dp_link_train_info *dp_i
> dp_info->tries = 0;
> voltage = 0xff;
> while (1) {
> - drm_dp_link_train_clock_recovery_delay(dp_info->dpcd);
> + drm_dp_link_train_clock_recovery_delay(dp_info->aux,
> dp_info->dpcd);
>
> if (drm_dp_dpcd_read_link_status(dp_info->aux,
>dp_info->link_status) <= 0) {
> diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
> index 194e0c273809..ce08eb3bface 100644
> --- a/drivers/gpu/drm/drm_dp_helper.c
> +++ b/drivers/gpu/drm/drm_dp_helper.c
> @@ -132,7 +132,8 @@ u8 drm_dp_get_adjust_request_post_cursor(const u8
> link_status[DP_LINK_STATUS_SIZ
> }
> EXPORT_SYMBOL(drm_dp_get_adjust_request_post_cursor);
>
> -void drm_dp_link_train_clock_recovery_delay(const u8
> dpcd[DP_RECEIVER_CAP_SIZE])
> +void drm_dp_link_train_clock_recovery_delay(const struct drm_dp_aux *aux,
> + const u8 dpcd[DP_RECEIVER_CAP_SIZE])
> {
> unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
>DP_TRAINING_AUX_RD_MASK;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 892d7db7d94f..222073d46bdb 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -441,7 +441,7 @@ static void
> intel_dp_link_training_clock_recovery_delay(struct intel_dp *intel_d
> enum drm_dp_phy dp_phy)
> {
> if (dp_phy == DP_PHY_DPRX)
> - drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd);
> + drm_dp_link_train_clock_recovery_delay(&intel_dp->aux,
> intel_dp->dpcd);
> else
> drm_dp_lttpr_link_train_clock_recovery_delay();
> }
> diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> index 36b39c381b3f..2501a6b326a3 100644
> --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
> +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
> @@ -1103,7 +1103,7 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private
> *ctrl,
> tries = 0;
> old_v_level = ctrl->link->phy_params.v_level;
> for (tries = 0; tries < maximum_retries; tries++) {
> - drm_dp_link_train_clock_recovery_delay(ctrl->panel->dpcd);
> + drm_dp_link_train_clock_recovery_delay(ctrl->aux,
> ctrl->panel->dpcd);
>
> ret = dp_ctrl_read_link_status(ctrl, link_status);
> if (ret)
> diff --git a/drivers/gpu/drm/msm/edp/edp_ctrl.c
> b/drivers/gpu/drm/msm/edp/edp_ctrl.c
> index 57af3d8b6699..6501598448b4 100644
> --- a/drivers/gpu/drm/msm/edp/edp_ctrl.c
> +++ b/drivers/gpu/drm/msm/edp/edp_ctrl.c
> @@ -608,7 +608,7 @@ static int edp_start_link_train_1(struct edp_ctrl *ctrl)
> tries = 0;
> old_v_level = ctrl->v_level;
> while (1) {
> - drm_dp_link_train_clock_recovery_delay(ctrl->dpcd);
> + drm_dp_link_train_clock_recovery_delay(ctrl->drm_aux,
> ctrl->dpcd);
>
> rlen = drm_dp_dpcd_read_link_status(ctrl->drm_aux, link_status);
> if (rlen < DP_LINK_STATUS_SIZE) {
> diff --git a/drivers/gpu/drm/radeon/atombios_dp.c
> b/drivers/gpu/drm/radeon/atombios_dp.c
> index c50c504bad50..299b9d8da376 100644
> --- a/drivers/gpu/drm/radeon/atombios_dp.c
> +++ b/drivers/gpu/drm/radeon/atombios_dp.c
> @@ -680,7 +680,7 @@ static int radeon_dp_link_train_cr(struct
> radeon_dp_link_train_info *dp_info)
> dp_info->tries = 0;
> voltage = 0xff;
> while (1) {
> - drm_dp_link_train_clock_recovery_delay(dp_info->dpcd);
> + drm_dp_link_train_clock_recovery_delay(dp_info->aux,
> dp_info->dpcd);
>
>
Re: [Intel-gfx] [PATCH 15/30] drm/dp: Add backpointer to drm_device in drm_dp_aux
Hi Lyude,
Thank you for the patch.
On Fri, Feb 19, 2021 at 04:53:11PM -0500, Lyude Paul wrote:
> This is something that we've wanted for a while now: the ability to
> actually look up the respective drm_device for a given drm_dp_aux struct.
> This will also allow us to transition over to using the drm_dbg_*() helpers
> for debug message printing, as we'll finally have a drm_device to reference
> for doing so.
Isn't it better to use the existing dev field ? If you have multiple DP
outputs for one DRM device, using the DRM device name in debug messages
won't tell which output the message corresponds to.
> Note that there is one limitation with this - because some DP AUX adapters
> exist as platform devices which are initialized independently of their
> respective DRM devices, one cannot rely on drm_dp_aux->drm_dev to always be
> non-NULL until drm_dp_aux_register() has been called. We make sure to point
> this out in the documentation for struct drm_dp_aux.
>
> Signed-off-by: Lyude Paul
> ---
> drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 1 +
> .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 1 +
> drivers/gpu/drm/bridge/analogix/analogix-anx6345.c | 1 +
> drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c | 1 +
> drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 1 +
> drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 1 +
> drivers/gpu/drm/bridge/tc358767.c| 1 +
> drivers/gpu/drm/bridge/ti-sn65dsi86.c| 1 +
> drivers/gpu/drm/drm_dp_aux_dev.c | 6 ++
> drivers/gpu/drm/drm_dp_mst_topology.c| 1 +
> drivers/gpu/drm/i915/display/intel_dp_aux.c | 1 +
> drivers/gpu/drm/msm/edp/edp.h| 3 +--
> drivers/gpu/drm/msm/edp/edp_aux.c| 5 +++--
> drivers/gpu/drm/msm/edp/edp_ctrl.c | 2 +-
> drivers/gpu/drm/nouveau/nouveau_connector.c | 1 +
> drivers/gpu/drm/radeon/atombios_dp.c | 1 +
> drivers/gpu/drm/tegra/dpaux.c| 1 +
> drivers/gpu/drm/xlnx/zynqmp_dp.c | 1 +
> include/drm/drm_dp_helper.h | 9 -
> 19 files changed, 33 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> index a3ba9ca11e98..6d35da65e09f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
> @@ -188,6 +188,7 @@ void amdgpu_atombios_dp_aux_init(struct amdgpu_connector
> *amdgpu_connector)
> {
> amdgpu_connector->ddc_bus->rec.hpd = amdgpu_connector->hpd.hpd;
> amdgpu_connector->ddc_bus->aux.transfer =
> amdgpu_atombios_dp_aux_transfer;
> + amdgpu_connector->ddc_bus->aux.drm_dev = amdgpu_connector->base.dev;
> drm_dp_aux_init(&amdgpu_connector->ddc_bus->aux);
> amdgpu_connector->ddc_bus->has_aux = true;
> }
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> index 41b09ab22233..163641b44339 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
> @@ -431,6 +431,7 @@ void amdgpu_dm_initialize_dp_connector(struct
> amdgpu_display_manager *dm,
> link_index);
> aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
> aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
> + aconnector->dm_dp_aux.aux.drm_dev = dm->ddev;
>
> drm_dp_aux_init(&aconnector->dm_dp_aux.aux);
> drm_dp_cec_register_connector(&aconnector->dm_dp_aux.aux,
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> index aa6cda458eb9..e33cd077595a 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
> @@ -537,6 +537,7 @@ static int anx6345_bridge_attach(struct drm_bridge
> *bridge,
> /* Register aux channel */
> anx6345->aux.name = "DP-AUX";
> anx6345->aux.dev = &anx6345->client->dev;
> + anx6345->aux.drm_dev = bridge->dev;
> anx6345->aux.transfer = anx6345_aux_transfer;
>
> err = drm_dp_aux_register(&anx6345->aux);
> diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
> b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
> index f20558618220..5e6a0ed39199 100644
> --- a/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
> +++ b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
> @@ -905,6 +905,7 @@ static int anx78xx_bridge_attach(struct drm_bridge
> *bridge,
> /* Register aux channel */
> anx78xx->aux.name = "DP-AUX";
> anx78xx->aux.dev = &anx78xx->client->dev;
> + anx78xx->aux.drm_dev = bridge->dev;
> anx78xx
Re: [Intel-gfx] [PATCH 06/30] drm/bridge/ti-sn65dsi86: (Un)register aux device on bridge attach/detach
Hi Lyude,
Thank you for the patch.
On Fri, Feb 19, 2021 at 04:53:02PM -0500, Lyude Paul wrote:
> Since we're about to add a back-pointer to drm_dev in drm_dp_aux, let's
> move the AUX adapter registration to the first point where we know which
> DRM device we'll be working with - when the drm_bridge is attached.
> Likewise, we unregister the AUX adapter on bridge detachment by adding a
> ti_sn_bridge_detach() callback.
>
> Signed-off-by: Lyude Paul
Reviewed-by: Laurent Pinchart
> ---
> drivers/gpu/drm/bridge/ti-sn65dsi86.c | 18 --
> 1 file changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> index f27306c51e4d..88df4dd0f39d 100644
> --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
> @@ -362,12 +362,18 @@ static int ti_sn_bridge_attach(struct drm_bridge
> *bridge,
> return -EINVAL;
> }
>
> + ret = drm_dp_aux_register(&pdata->aux);
> + if (ret < 0) {
> + drm_err(bridge->dev, "Failed to register DP AUX channel: %d\n",
> ret);
> + return ret;
> + }
> +
> ret = drm_connector_init(bridge->dev, &pdata->connector,
>&ti_sn_bridge_connector_funcs,
>DRM_MODE_CONNECTOR_eDP);
> if (ret) {
> DRM_ERROR("Failed to initialize connector with drm\n");
> - return ret;
> + goto err_conn_init;
> }
>
> drm_connector_helper_add(&pdata->connector,
> @@ -424,9 +430,16 @@ static int ti_sn_bridge_attach(struct drm_bridge *bridge,
> mipi_dsi_device_unregister(dsi);
> err_dsi_host:
> drm_connector_cleanup(&pdata->connector);
> +err_conn_init:
> + drm_dp_aux_unregister(&pdata->aux);
> return ret;
> }
>
> +static void ti_sn_bridge_detach(struct drm_bridge *bridge)
> +{
> + drm_dp_aux_unregister(&bridge_to_ti_sn_bridge(bridge)->aux);
> +}
> +
> static void ti_sn_bridge_disable(struct drm_bridge *bridge)
> {
> struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
> @@ -863,6 +876,7 @@ static void ti_sn_bridge_post_disable(struct drm_bridge
> *bridge)
>
> static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
> .attach = ti_sn_bridge_attach,
> + .detach = ti_sn_bridge_detach,
> .pre_enable = ti_sn_bridge_pre_enable,
> .enable = ti_sn_bridge_enable,
> .disable = ti_sn_bridge_disable,
> @@ -1287,7 +1301,7 @@ static int ti_sn_bridge_probe(struct i2c_client *client,
> pdata->aux.name = "ti-sn65dsi86-aux";
> pdata->aux.dev = pdata->dev;
> pdata->aux.transfer = ti_sn_aux_transfer;
> - drm_dp_aux_register(&pdata->aux);
> + drm_dp_aux_init(&pdata->aux);
>
> pdata->bridge.funcs = &ti_sn_bridge_funcs;
> pdata->bridge.of_node = client->dev.of_node;
--
Regards,
Laurent Pinchart
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