Re: [Intel-gfx] [PATCH 16/21] drm/i915/gem: Delay context creation

[kernel test robot]

Hi Jason,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-intel/for-linux-next]
[also build test WARNING on drm-tip/drm-tip drm-exynos/exynos-drm-next 
next-20210423]
[cannot apply to tegra-drm/drm/tegra/for-next drm/drm-next v5.12-rc8]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Jason-Ekstrand/drm-i915-gem-ioctl-clean-ups/20210424-063511
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-rhel-8.3 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# 
https://github.com/0day-ci/linux/commit/e00622bd8a3f3eccbb22721c2f8857bdfb7d5d9d
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Jason-Ekstrand/drm-i915-gem-ioctl-clean-ups/20210424-063511
git checkout e00622bd8a3f3eccbb22721c2f8857bdfb7d5d9d
# save the attached .config to linux build tree
make W=1 W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/gem/i915_gem_context.c:2439:1: warning: no previous 
>> prototype for 'lazy_create_context_locked' [-Wmissing-prototypes]
2439 | lazy_create_context_locked(struct drm_i915_file_private *file_priv,
 | ^~


vim +/lazy_create_context_locked +2439 
drivers/gpu/drm/i915/gem/i915_gem_context.c

  2437  
  2438  struct i915_gem_context *
> 2439  lazy_create_context_locked(struct drm_i915_file_private *file_priv,
  2440 struct i915_gem_proto_context *pc, u32 id)
  2441  {
  2442  struct i915_gem_context *ctx;
  2443  void *old;
  2444  
  2445  ctx = i915_gem_create_context(file_priv->dev_priv, pc);
  2446  if (IS_ERR(ctx))
  2447  return ctx;
  2448  
  2449  gem_context_register(ctx, file_priv, id);
  2450  
  2451  old = xa_erase(_priv->proto_context_xa, id);
  2452  GEM_BUG_ON(old != pc);
  2453  proto_context_close(pc);
  2454  
  2455  /* One for the xarray and one for the caller */
  2456  return i915_gem_context_get(ctx);
  2457  }
  2458  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


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Re: [Intel-gfx] [PATCH 16/21] drm/i915/gem: Delay context creation

[kernel test robot]

Hi Jason,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip drm-exynos/exynos-drm-next 
next-20210423]
[cannot apply to tegra-drm/drm/tegra/for-next drm/drm-next v5.12-rc8]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Jason-Ekstrand/drm-i915-gem-ioctl-clean-ups/20210424-063511
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a001-20210423 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# 
https://github.com/0day-ci/linux/commit/e00622bd8a3f3eccbb22721c2f8857bdfb7d5d9d
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Jason-Ekstrand/drm-i915-gem-ioctl-clean-ups/20210424-063511
git checkout e00622bd8a3f3eccbb22721c2f8857bdfb7d5d9d
# save the attached .config to linux build tree
make W=1 W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

>> drivers/gpu/drm/i915/gem/i915_gem_context.c:2439:1: error: no previous 
>> prototype for 'lazy_create_context_locked' [-Werror=missing-prototypes]
2439 | lazy_create_context_locked(struct drm_i915_file_private *file_priv,
 | ^~
   cc1: all warnings being treated as errors


vim +/lazy_create_context_locked +2439 
drivers/gpu/drm/i915/gem/i915_gem_context.c

  2437  
  2438  struct i915_gem_context *
> 2439  lazy_create_context_locked(struct drm_i915_file_private *file_priv,
  2440 struct i915_gem_proto_context *pc, u32 id)
  2441  {
  2442  struct i915_gem_context *ctx;
  2443  void *old;
  2444  
  2445  ctx = i915_gem_create_context(file_priv->dev_priv, pc);
  2446  if (IS_ERR(ctx))
  2447  return ctx;
  2448  
  2449  gem_context_register(ctx, file_priv, id);
  2450  
  2451  old = xa_erase(_priv->proto_context_xa, id);
  2452  GEM_BUG_ON(old != pc);
  2453  proto_context_close(pc);
  2454  
  2455  /* One for the xarray and one for the caller */
  2456  return i915_gem_context_get(ctx);
  2457  }
  2458  

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-...@lists.01.org


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[Intel-gfx] ✓ Fi.CI.IGT: success for drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev8)

[Patchwork]

== Series Details ==

Series: drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev8)
URL   : https://patchwork.freedesktop.org/series/87242/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10005_full -> Patchwork_19985_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_19985_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
- shard-kbl:  [PASS][1] -> [DMESG-WARN][2] ([i915#180]) +4 similar 
issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-kbl7/igt@gem_ctx_isolation@preservation...@vcs0.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-kbl2/igt@gem_ctx_isolation@preservation...@vcs0.html

  * igt@gem_ctx_persistence@legacy-engines-persistence:
- shard-snb:  NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-snb7/igt@gem_ctx_persiste...@legacy-engines-persistence.html

  * igt@gem_eio@unwedge-stress:
- shard-skl:  [PASS][4] -> [TIMEOUT][5] ([i915#2369] / [i915#3063])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-skl8/igt@gem_...@unwedge-stress.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-skl1/igt@gem_...@unwedge-stress.html
- shard-iclb: [PASS][6] -> [TIMEOUT][7] ([i915#2369] / [i915#2481] 
/ [i915#3070])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-iclb1/igt@gem_...@unwedge-stress.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-iclb4/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) +2 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-tglb5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-tglb5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
- shard-kbl:  [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar 
issue
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-kbl6/igt@gem_exec_fair@basic-p...@vcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-kbl2/igt@gem_exec_fair@basic-p...@vcs0.html

  * igt@gem_exec_fair@basic-sync@rcs0:
- shard-kbl:  [PASS][12] -> [SKIP][13] ([fdo#109271])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-kbl4/igt@gem_exec_fair@basic-s...@rcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-kbl6/igt@gem_exec_fair@basic-s...@rcs0.html

  * igt@gem_mmap_gtt@cpuset-big-copy:
- shard-glk:  [PASS][14] -> [FAIL][15] ([i915#307])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-glk4/igt@gem_mmap_...@cpuset-big-copy.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-glk5/igt@gem_mmap_...@cpuset-big-copy.html

  * igt@gem_userptr_blits@vma-merge:
- shard-apl:  NOTRUN -> [FAIL][16] ([i915#3318])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-apl7/igt@gem_userptr_bl...@vma-merge.html

  * igt@gen9_exec_parse@batch-invalid-length:
- shard-snb:  NOTRUN -> [SKIP][17] ([fdo#109271]) +129 similar 
issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-snb7/igt@gen9_exec_pa...@batch-invalid-length.html

  * igt@i915_pm_dc@dc6-psr:
- shard-skl:  NOTRUN -> [FAIL][18] ([i915#454])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-skl7/igt@i915_pm...@dc6-psr.html

  * igt@i915_pm_rpm@i2c:
- shard-glk:  [PASS][19] -> [FAIL][20] ([i915#68])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-glk2/igt@i915_pm_...@i2c.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-glk6/igt@i915_pm_...@i2c.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
- shard-apl:  [PASS][21] -> [DMESG-WARN][22] ([i915#180]) +1 
similar issue
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-apl8/igt@i915_susp...@fence-restore-tiled2untiled.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-apl6/igt@i915_susp...@fence-restore-tiled2untiled.html

  * igt@kms_big_joiner@basic:
- shard-skl:  NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#2705])
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/shard-skl7/igt@kms_big_joi...@basic.html

  * igt@kms_chamelium@dp-crc-multiple:
- shard-skl:  NOTRUN -> [SKIP][24] ([fdo#109271] / [fdo#111827]) +3 
similar issues
   [24]: 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gem: ioctl clean-ups

[Patchwork]

== Series Details ==

Series: drm/i915/gem: ioctl clean-ups
URL   : https://patchwork.freedesktop.org/series/89443/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10005_full -> Patchwork_19984_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_19984_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_19984_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_19984_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_balancer@bonded-slice:
- shard-kbl:  [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-kbl1/igt@gem_exec_balan...@bonded-slice.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-kbl4/igt@gem_exec_balan...@bonded-slice.html
- shard-tglb: [PASS][3] -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-tglb3/igt@gem_exec_balan...@bonded-slice.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-tglb3/igt@gem_exec_balan...@bonded-slice.html

  * igt@gem_exec_schedule@u-submit-golden-slice@rcs0:
- shard-skl:  [PASS][5] -> [INCOMPLETE][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-skl7/igt@gem_exec_schedule@u-submit-golden-sl...@rcs0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-skl2/igt@gem_exec_schedule@u-submit-golden-sl...@rcs0.html

  
 Warnings 

  * igt@runner@aborted:
- shard-skl:  ([FAIL][7], [FAIL][8], [FAIL][9]) ([i915#1436] / 
[i915#2369] / [i915#3002]) -> ([FAIL][10], [FAIL][11], [FAIL][12], [FAIL][13]) 
([i915#1814] / [i915#2029] / [i915#3002])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-skl2/igt@run...@aborted.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-skl1/igt@run...@aborted.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-skl10/igt@run...@aborted.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-skl2/igt@run...@aborted.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-skl8/igt@run...@aborted.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-skl2/igt@run...@aborted.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-skl2/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_19984_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_create@create-massive:
- shard-iclb: NOTRUN -> [DMESG-WARN][14] ([i915#3002])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-iclb6/igt@gem_cre...@create-massive.html
- shard-snb:  NOTRUN -> [DMESG-WARN][15] ([i915#3002])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-snb7/igt@gem_cre...@create-massive.html
- shard-kbl:  NOTRUN -> [DMESG-WARN][16] ([i915#3002])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-kbl1/igt@gem_cre...@create-massive.html
- shard-tglb: NOTRUN -> [DMESG-WARN][17] ([i915#3002])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-tglb2/igt@gem_cre...@create-massive.html
- shard-glk:  NOTRUN -> [DMESG-WARN][18] ([i915#3002])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-glk1/igt@gem_cre...@create-massive.html
- shard-apl:  NOTRUN -> [DMESG-WARN][19] ([i915#3002])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-apl2/igt@gem_cre...@create-massive.html

  * igt@gem_ctx_persistence@legacy-engines-queued:
- shard-snb:  NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#1099]) +6 
similar issues
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-snb5/igt@gem_ctx_persiste...@legacy-engines-queued.html

  * igt@gem_exec_fair@basic-deadline:
- shard-skl:  NOTRUN -> [FAIL][21] ([i915#2846])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-skl1/igt@gem_exec_f...@basic-deadline.html
- shard-glk:  [PASS][22] -> [FAIL][23] ([i915#2846])
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-glk1/igt@gem_exec_f...@basic-deadline.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/shard-glk2/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][24] -> [FAIL][25] ([i915#2842]) +2 similar 
issues
   [24]: 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/dp_mst: Use the correct DPCD space in Synaptics quirk

[Patchwork]

== Series Details ==

Series: drm/dp_mst: Use the correct DPCD space in Synaptics quirk
URL   : https://patchwork.freedesktop.org/series/89431/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10005_full -> Patchwork_19983_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_19983_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_19983_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_19983_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_psr@psr2_cursor_render:
- shard-tglb: [PASS][1] -> [DMESG-WARN][2] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-tglb3/igt@kms_psr@psr2_cursor_render.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-tglb6/igt@kms_psr@psr2_cursor_render.html

  * igt@syncobj_timeline@wait-for-submit-snapshot:
- shard-skl:  [PASS][3] -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-skl7/igt@syncobj_timel...@wait-for-submit-snapshot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-skl7/igt@syncobj_timel...@wait-for-submit-snapshot.html

  
Known issues


  Here are the changes found in Patchwork_19983_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
- shard-snb:  NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#1099]) +3 
similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-snb6/igt@gem_ctx_persiste...@legacy-engines-hostile-preempt.html

  * igt@gem_exec_fair@basic-deadline:
- shard-glk:  [PASS][6] -> [FAIL][7] ([i915#2846])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-glk1/igt@gem_exec_f...@basic-deadline.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-glk4/igt@gem_exec_f...@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842]) +4 similar issues
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl:  [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar 
issue
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-kbl7/igt@gem_exec_fair@basic-n...@vcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-kbl3/igt@gem_exec_fair@basic-n...@vcs0.html
- shard-glk:  [PASS][12] -> [FAIL][13] ([i915#2842]) +1 similar 
issue
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-glk7/igt@gem_exec_fair@basic-n...@vcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-glk2/igt@gem_exec_fair@basic-n...@vcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
- shard-iclb: [PASS][14] -> [FAIL][15] ([i915#2842])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-iclb7/igt@gem_exec_fair@basic-p...@vcs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-iclb8/igt@gem_exec_fair@basic-p...@vcs0.html

  * igt@gem_exec_suspend@basic-s3:
- shard-apl:  [PASS][16] -> [DMESG-WARN][17] ([i915#180])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-apl2/igt@gem_exec_susp...@basic-s3.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-apl1/igt@gem_exec_susp...@basic-s3.html

  * igt@gem_huc_copy@huc-copy:
- shard-apl:  NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#2190])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-apl1/igt@gem_huc_c...@huc-copy.html

  * igt@gem_pwrite@basic-exhaustion:
- shard-apl:  NOTRUN -> [WARN][19] ([i915#2658])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-apl1/igt@gem_pwr...@basic-exhaustion.html

  * igt@gem_userptr_blits@vma-merge:
- shard-apl:  NOTRUN -> [FAIL][20] ([i915#3318])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-apl3/igt@gem_userptr_bl...@vma-merge.html

  * igt@i915_pm_dc@dc6-psr:
- shard-skl:  NOTRUN -> [FAIL][21] ([i915#454])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/shard-skl10/igt@i915_pm...@dc6-psr.html

  * igt@kms_big_joiner@basic:
- shard-skl:  NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#2705])
   [22]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev8)

[Patchwork]

== Series Details ==

Series: drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev8)
URL   : https://patchwork.freedesktop.org/series/87242/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10005 -> Patchwork_19985


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/index.html

Known issues


  Here are the changes found in Patchwork_19985 that come from known issues:

### IGT changes ###

  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3276]: https://gitlab.freedesktop.org/drm/intel/issues/3276
  [i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Participating hosts (43 -> 38)
--

  Additional (1): fi-rkl-11500t 
  Missing(6): fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050 fi-bdw-gvtdvm 
fi-bsw-cyan fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_10005 -> Patchwork_19985

  CI-20190529: 20190529
  CI_DRM_10005: 7a27cb7ac19a95d801c391044cea5274677e7744 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6074: 3f43ae9fd22dc5a517786b984dc3aa717997664f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19985: 18086bb86f43e015c1ff45266995fee4c2034b35 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

18086bb86f43 drm/dp_mst: Convert drm_dp_mst_topology.c to drm_err()/drm_dbg*()
0e8fa6d106da drm/dp_dual_mode: Convert drm_dp_dual_mode_helper.c to using 
drm_err/drm_dbg_kms()
119b6434fa27 drm/dp: Convert drm_dp_helper.c to using drm_err/drm_dbg_*()
924d34615f12 drm/print: Handle potentially NULL drm_devices in drm_dbg_*
c32bf6ea1150 drm/dp_mst: Pass drm_dp_mst_topology_mgr to 
drm_dp_get_vc_payload_bw()
e322360fb7e0 drm/dp_dual_mode: Pass drm_device to drm_lspcon_(get|set)_mode()
00efde3156e4 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_get_tmds_output()
2cc459bf0450 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_max_tmds_clock()
ef2e8dc38bf1 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_set_tmds_output()
88bfc3241a28 drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_detect()
2175cbb92c1e drm/dp: Always print aux channel name in logs
cffbd1f6e43b drm/dp: Pass drm_dp_aux to drm_dp*_link_train_channel_eq_delay()
40f235bd28c2 drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()
bfe721a5548a drm/dp: Clarify DP AUX registration time
52f1071aa1f8 drm/dp: Add backpointer to drm_device in drm_dp_aux
1f891e39631b drm/nouveau/kms/nv50-: Move AUX adapter reg to connector late 
register/early unregister
f6110c1805b3 drm/bridge/cdns-mhdp8546: Register DP aux channel with userspace

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19985/index.html
___
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev8)

[Patchwork]

== Series Details ==

Series: drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev8)
URL   : https://patchwork.freedesktop.org/series/87242/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
f6110c1805b3 drm/bridge/cdns-mhdp8546: Register DP aux channel with userspace
1f891e39631b drm/nouveau/kms/nv50-: Move AUX adapter reg to connector late 
register/early unregister
52f1071aa1f8 drm/dp: Add backpointer to drm_device in drm_dp_aux
bfe721a5548a drm/dp: Clarify DP AUX registration time
40f235bd28c2 drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()
cffbd1f6e43b drm/dp: Pass drm_dp_aux to drm_dp*_link_train_channel_eq_delay()
2175cbb92c1e drm/dp: Always print aux channel name in logs
88bfc3241a28 drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_detect()
ef2e8dc38bf1 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_set_tmds_output()
2cc459bf0450 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_max_tmds_clock()
00efde3156e4 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_get_tmds_output()
e322360fb7e0 drm/dp_dual_mode: Pass drm_device to drm_lspcon_(get|set)_mode()
c32bf6ea1150 drm/dp_mst: Pass drm_dp_mst_topology_mgr to 
drm_dp_get_vc_payload_bw()
-:56: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#56: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:74:
+  
crtc_state->port_clock,

total: 0 errors, 1 warnings, 0 checks, 43 lines checked
924d34615f12 drm/print: Handle potentially NULL drm_devices in drm_dbg_*
119b6434fa27 drm/dp: Convert drm_dp_helper.c to using drm_err/drm_dbg_*()
0e8fa6d106da drm/dp_dual_mode: Convert drm_dp_dual_mode_helper.c to using 
drm_err/drm_dbg_kms()
18086bb86f43 drm/dp_mst: Convert drm_dp_mst_topology.c to drm_err()/drm_dbg*()


___
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev7)

[Patchwork]

== Series Details ==

Series: drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev7)
URL   : https://patchwork.freedesktop.org/series/87242/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10005_full -> Patchwork_19982_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_19982_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_19982_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_19982_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_eio@in-flight-immediate:
- shard-skl:  [PASS][1] -> [TIMEOUT][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-skl8/igt@gem_...@in-flight-immediate.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-skl7/igt@gem_...@in-flight-immediate.html

  
Known issues


  Here are the changes found in Patchwork_19982_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@drm_import_export@prime:
- shard-glk:  [PASS][3] -> [INCOMPLETE][4] ([i915#2055] / 
[i915#2944])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-glk3/igt@drm_import_exp...@prime.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-glk6/igt@drm_import_exp...@prime.html

  * igt@gem_create@create-clear:
- shard-glk:  [PASS][5] -> [FAIL][6] ([i915#1888] / [i915#3160])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-glk8/igt@gem_cre...@create-clear.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-glk9/igt@gem_cre...@create-clear.html

  * igt@gem_ctx_persistence@legacy-engines-hostile-preempt:
- shard-snb:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) +3 
similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-snb2/igt@gem_ctx_persiste...@legacy-engines-hostile-preempt.html

  * igt@gem_ctx_shared@q-smoketest-all:
- shard-glk:  [PASS][8] -> [DMESG-WARN][9] ([i915#118] / [i915#95])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-glk6/igt@gem_ctx_sha...@q-smoketest-all.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-glk1/igt@gem_ctx_sha...@q-smoketest-all.html

  * igt@gem_eio@unwedge-stress:
- shard-iclb: [PASS][10] -> [TIMEOUT][11] ([i915#2369] / 
[i915#2481] / [i915#3070])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-iclb1/igt@gem_...@unwedge-stress.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-iclb8/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][12] -> [FAIL][13] ([i915#2842]) +2 similar 
issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-tglb5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-tglb2/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
- shard-iclb: [PASS][14] -> [FAIL][15] ([i915#2842])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-iclb7/igt@gem_exec_fair@basic-p...@vcs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-iclb7/igt@gem_exec_fair@basic-p...@vcs0.html

  * igt@gem_mmap_offset@clear:
- shard-skl:  [PASS][16] -> [FAIL][17] ([i915#3160]) +1 similar 
issue
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-skl7/igt@gem_mmap_off...@clear.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-skl8/igt@gem_mmap_off...@clear.html

  * igt@gem_userptr_blits@vma-merge:
- shard-apl:  NOTRUN -> [FAIL][18] ([i915#3318])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-apl3/igt@gem_userptr_bl...@vma-merge.html

  * igt@i915_module_load@reload:
- shard-iclb: [PASS][19] -> [DMESG-WARN][20] ([i915#1982])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/shard-iclb8/igt@i915_module_l...@reload.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-iclb6/igt@i915_module_l...@reload.html

  * igt@i915_pm_dc@dc6-psr:
- shard-skl:  NOTRUN -> [FAIL][21] ([i915#454])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-skl7/igt@i915_pm...@dc6-psr.html

  * igt@kms_big_joiner@basic:
- shard-skl:  NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#2705])
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/shard-skl7/igt@kms_big_joi...@basic.html

  * 

Re: [Intel-gfx] [PATCH 01/12] vfio/mdev: Remove CONFIG_VFIO_MDEV_DEVICE

[Randy Dunlap]

On 4/23/21 4:02 PM, Jason Gunthorpe wrote:
> @@ -171,7 +171,7 @@ config SAMPLE_VFIO_MDEV_MDPY_FB
>  
>  config SAMPLE_VFIO_MDEV_MBOCHS
>   tristate "Build VFIO mdpy example mediated device sample code -- 
> loadable modules only"

You can drop the ending of the prompt string.

> - depends on VFIO_MDEV_DEVICE && m
> + depends on VFIO_MDEV
>   select DMA_SHARED_BUFFER
>   help
> Build a virtual display sample driver for use as a VFIO


-- 
~Randy

___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: ioctl clean-ups

[Patchwork]

== Series Details ==

Series: drm/i915/gem: ioctl clean-ups
URL   : https://patchwork.freedesktop.org/series/89443/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10005 -> Patchwork_19984


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/index.html

Known issues


  Here are the changes found in Patchwork_19984 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2:  [PASS][2] -> [FAIL][3] ([i915#1888])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html

  
 Possible fixes 

  * igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[INCOMPLETE][4] ([i915#2782]) -> [PASS][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2782]: https://gitlab.freedesktop.org/drm/intel/issues/2782
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3276]: https://gitlab.freedesktop.org/drm/intel/issues/3276
  [i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Participating hosts (43 -> 40)
--

  Additional (1): fi-rkl-11500t 
  Missing(4): fi-ilk-m540 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u 


Build changes
-

  * IGT: IGT_6074 -> IGTPW_5761
  * Linux: CI_DRM_10005 -> Patchwork_19984

  CI-20190529: 20190529
  CI_DRM_10005: 7a27cb7ac19a95d801c391044cea5274677e7744 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_5761: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_5761/index.html
  IGT_6074: 3f43ae9fd22dc5a517786b984dc3aa717997664f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19984: 0c4562693de593aacfbe5dd6b27e69bd89403c15 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0c4562693de5 drm/i915/gem: Roll all of context creation together
e1c0a99c4bc6 i915/gem/selftests: Assign the VM at context creation in 
igt_shared_ctx_exec
1694fd69838b drm/i915/selftests: Take a VM in kernel_context()
9bd5fd34f557 drm/i915/gem: Don't allow changing the engine set on running 
contexts
40c7b0f86bc0 drm/i915/gem: Don't allow changing the VM on running contexts
6fce8cf246ee drm/i915/gem: Delay context creation
d0f063d4604e drm/i915/gt: Drop i915_address_space::file
70451a1734a2 drm/i915/gem: Return an error ptr from context_lookup
c50f4dd9ee3f drm/i915/gem: Add an intermediate proto_context struct
fa138a73374c drm/i915/gem: Add a separate validate_priority helper
ab3620b9adb5 drm/i915: Stop manually RCU banging in reset_stats_ioctl
b6ef4a4c6f47 drm/i915/request: Remove the hook from await_execution
21cb51520e4b drm/i915/gem: Disallow creating contexts with too many engines
d3ad59ed0a22 drm/i915/gem: Disallow bonding of virtual engines
65796fb10e50 drm/i915: Drop getparam support for I915_CONTEXT_PARAM_ENGINES
ebe52e477467 drm/i915: Implement SINGLE_TIMELINE with a syncobj (v3)
4b9a8e315c1c drm/i915: Drop the CONTEXT_CLONE API
53f030af52d4 drm/i915/gem: Return void from context_apply_all
31e3478abfe0 drm/i915/gem: Set the watchdog timeout directly in 
intel_context_set_gem
79a91e982ff7 drm/i915: Drop I915_CONTEXT_PARAM_NO_ZEROMAP
468456983a83 drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19984/index.html

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gem: ioctl clean-ups

[Patchwork]

== Series Details ==

Series: drm/i915/gem: ioctl clean-ups
URL   : https://patchwork.freedesktop.org/series/89443/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1270:17: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1270:17:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1270:17:struct 
i915_address_space [noderef] __rcu *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1488:14: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1488:14:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1488:14:struct 
i915_address_space [noderef] __rcu *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:1811:25: warning: symbol 
'lazy_create_context_locked' was not declared. Should it be static?
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2014:21: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2014:21:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2014:21:struct 
i915_address_space [noderef] __rcu *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2015:39: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2015:39:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:2015:39:struct 
i915_address_space [noderef] __rcu *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:698:9: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.c:698:9:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:698:9:struct 
i915_address_space [noderef] __rcu *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:707:22: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.c:707:22:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:707:22:struct 
i915_address_space [noderef] __rcu *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:726:27: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.c:726:27:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:726:27:struct 
i915_address_space [noderef] __rcu *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:742:13: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.c:742:13:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.c:742:13:struct 
i915_address_space [noderef] __rcu *
+drivers/gpu/drm/i915/gem/i915_gem_context.h:154:16: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.h:154:16: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.h:154:16:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.h:154:16:struct 
i915_address_space *
+drivers/gpu/drm/i915/gem/i915_gem_context.h:154:16:struct 
i915_address_space [noderef] __rcu *
+drivers/gpu/drm/i915/gem/i915_gem_context.h:154:16:struct 
i915_address_space [noderef] __rcu *
+./drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14: error: incompatible 
types in comparison expression (different address spaces):
+./drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14: error: incompatible 
types in comparison expression (different address spaces):
+./drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14: error: incompatible 
types in comparison expression (different address spaces):
+./drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14: error: incompatible 
types in comparison expression (different address spaces):
+./drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14: error: incompatible 
types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14: error: incompatible types 
in comparison expression (different address spaces):
+drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14: error: incompatible types 
in comparison expression (different address spaces):
+./drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14:struct 
i915_address_space *
+./drivers/gpu/drm/i915/gem/i915_gem_context.h:163:14:struct 
i915_address_space *

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: ioctl clean-ups

[Patchwork]

== Series Details ==

Series: drm/i915/gem: ioctl clean-ups
URL   : https://patchwork.freedesktop.org/series/89443/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
468456983a83 drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE
-:176: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#176: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 159 lines checked
79a91e982ff7 drm/i915: Drop I915_CONTEXT_PARAM_NO_ZEROMAP
31e3478abfe0 drm/i915/gem: Set the watchdog timeout directly in 
intel_context_set_gem
-:25: WARNING:LINE_SPACING: Missing a blank line after declarations
#25: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:239:
+   unsigned int timeout_ms = ctx->i915->params.request_timeout_ms;
+   intel_context_set_watchdog_us(ce, (u64)timeout_ms * 1000);

total: 0 errors, 1 warnings, 0 checks, 83 lines checked
53f030af52d4 drm/i915/gem: Return void from context_apply_all
4b9a8e315c1c drm/i915: Drop the CONTEXT_CLONE API
ebe52e477467 drm/i915: Implement SINGLE_TIMELINE with a syncobj (v3)
65796fb10e50 drm/i915: Drop getparam support for I915_CONTEXT_PARAM_ENGINES
d3ad59ed0a22 drm/i915/gem: Disallow bonding of virtual engines
21cb51520e4b drm/i915/gem: Disallow creating contexts with too many engines
b6ef4a4c6f47 drm/i915/request: Remove the hook from await_execution
ab3620b9adb5 drm/i915: Stop manually RCU banging in reset_stats_ioctl
fa138a73374c drm/i915/gem: Add a separate validate_priority helper
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 56 lines checked
c50f4dd9ee3f drm/i915/gem: Add an intermediate proto_context struct
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 268 lines checked
70451a1734a2 drm/i915/gem: Return an error ptr from context_lookup
-:59: WARNING:LIKELY_MISUSE: nested (un)?likely() calls, IS_ERR already uses 
unlikely() internally
#59: FILE: drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c:742:
+   if (unlikely(IS_ERR(ctx)))

total: 0 errors, 1 warnings, 0 checks, 60 lines checked
d0f063d4604e drm/i915/gt: Drop i915_address_space::file
6fce8cf246ee drm/i915/gem: Delay context creation
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

-:106: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#106: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:358:
+   unsigned num_engines;

-:287: ERROR:CODE_INDENT: code indent should use tabs where possible
#287: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:539:
+^I^I^I struct i915_gem_proto_context *pc,$

-:287: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#287: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:539:
+static int set_proto_ctx_engines(struct drm_i915_file_private *fpriv,
+struct i915_gem_proto_context *pc,

-:288: ERROR:CODE_INDENT: code indent should use tabs where possible
#288: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:540:
+^I^I^I const struct drm_i915_gem_context_param *args)$

-:412: WARNING:ENOTSUPP: ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP
#412: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:664:
+   ret = -ENOTSUPP;

-:807: WARNING:ENOTSUPP: ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP
#807: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:2719:
+   if (ret == -ENOTSUPP) {

-:925: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#925: FILE: drivers/gpu/drm/i915/i915_drv.h:203:
+   struct mutex proto_context_lock;

total: 2 errors, 4 warnings, 2 checks, 901 lines checked
40c7b0f86bc0 drm/i915/gem: Don't allow changing the VM on running contexts
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 424 lines checked
9bd5fd34f557 drm/i915/gem: Don't allow changing the engine set on running 
contexts
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 313 lines checked
1694fd69838b drm/i915/selftests: Take a VM in kernel_context()
-:7: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 131 lines checked
e1c0a99c4bc6 i915/gem/selftests: Assign the VM at context creation in 
igt_shared_ctx_exec
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

total: 0 errors, 1 warnings, 0 checks, 17 lines checked
0c4562693de5 drm/i915/gem: Roll all of context creation together
-:176: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a 
separate line
#176: FILE: drivers/gpu/drm/i915/gem/i915_gem_context.c:1291:
+* is no remap info, it will be a NOP. */

total: 0 errors, 1 warnings, 0 checks, 246 lines checked

[Intel-gfx] [PATCH 21/21] drm/i915/gem: Roll all of context creation together

[Jason Ekstrand]

Now that we have the whole engine set and VM at context creation time,
we can just assign those fields instead of creating first and handling
the VM and engines later.  This lets us avoid creating useless VMs and
engine sets and lets us git rid of the complex VM setting code.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 159 ++
 .../gpu/drm/i915/gem/selftests/mock_context.c |  33 ++--
 2 files changed, 64 insertions(+), 128 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index ef23ab4260c24..829730d402e8a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1201,56 +1201,6 @@ static int __context_set_persistence(struct 
i915_gem_context *ctx, bool state)
return 0;
 }
 
-static struct i915_gem_context *
-__create_context(struct drm_i915_private *i915,
-const struct i915_gem_proto_context *pc)
-{
-   struct i915_gem_context *ctx;
-   struct i915_gem_engines *e;
-   int err;
-   int i;
-
-   ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
-   if (!ctx)
-   return ERR_PTR(-ENOMEM);
-
-   kref_init(>ref);
-   ctx->i915 = i915;
-   ctx->sched = pc->sched;
-   mutex_init(>mutex);
-   INIT_LIST_HEAD(>link);
-
-   spin_lock_init(>stale.lock);
-   INIT_LIST_HEAD(>stale.engines);
-
-   mutex_init(>engines_mutex);
-   e = default_engines(ctx);
-   if (IS_ERR(e)) {
-   err = PTR_ERR(e);
-   goto err_free;
-   }
-   RCU_INIT_POINTER(ctx->engines, e);
-
-   INIT_RADIX_TREE(>handles_vma, GFP_KERNEL);
-   mutex_init(>lut_mutex);
-
-   /* NB: Mark all slices as needing a remap so that when the context first
-* loads it will restore whatever remap state already exists. If there
-* is no remap info, it will be a NOP. */
-   ctx->remap_slice = ALL_L3_SLICES(i915);
-
-   ctx->user_flags = pc->user_flags;
-
-   for (i = 0; i < ARRAY_SIZE(ctx->hang_timestamp); i++)
-   ctx->hang_timestamp[i] = jiffies - CONTEXT_FAST_HANG_JIFFIES;
-
-   return ctx;
-
-err_free:
-   kfree(ctx);
-   return ERR_PTR(err);
-}
-
 static inline struct i915_gem_engines *
 __context_engines_await(const struct i915_gem_context *ctx,
bool *user_engines)
@@ -1294,86 +1244,77 @@ context_apply_all(struct i915_gem_context *ctx,
i915_sw_fence_complete(>fence);
 }
 
-static void __apply_ppgtt(struct intel_context *ce, void *vm)
-{
-   i915_vm_put(ce->vm);
-   ce->vm = i915_vm_get(vm);
-}
-
-static struct i915_address_space *
-__set_ppgtt(struct i915_gem_context *ctx, struct i915_address_space *vm)
-{
-   struct i915_address_space *old;
-
-   old = rcu_replace_pointer(ctx->vm,
- i915_vm_open(vm),
- lockdep_is_held(>mutex));
-   GEM_BUG_ON(old && i915_vm_is_4lvl(vm) != i915_vm_is_4lvl(old));
-
-   context_apply_all(ctx, __apply_ppgtt, vm);
-
-   return old;
-}
-
-static void __assign_ppgtt(struct i915_gem_context *ctx,
-  struct i915_address_space *vm)
-{
-   if (vm == rcu_access_pointer(ctx->vm))
-   return;
-
-   vm = __set_ppgtt(ctx, vm);
-   if (vm)
-   i915_vm_close(vm);
-}
-
 static struct i915_gem_context *
 i915_gem_create_context(struct drm_i915_private *i915,
const struct i915_gem_proto_context *pc)
 {
struct i915_gem_context *ctx;
-   int ret;
+   struct i915_gem_engines *e;
+   int err;
+   int i;
 
-   ctx = __create_context(i915, pc);
-   if (IS_ERR(ctx))
-   return ctx;
+   ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
+   if (!ctx)
+   return ERR_PTR(-ENOMEM);
 
-   if (pc->vm) {
-   mutex_lock(>mutex);
-   __assign_ppgtt(ctx, pc->vm);
-   mutex_unlock(>mutex);
-   }
+   kref_init(>ref);
+   ctx->i915 = i915;
+   ctx->sched = pc->sched;
+   mutex_init(>mutex);
+   INIT_LIST_HEAD(>link);
 
-   if (pc->num_user_engines >= 0) {
-   struct i915_gem_engines *engines;
+   spin_lock_init(>stale.lock);
+   INIT_LIST_HEAD(>stale.engines);
 
-   engines = user_engines(ctx, pc->num_user_engines,
-  pc->user_engines);
-   if (IS_ERR(engines)) {
-   context_close(ctx);
-   return ERR_CAST(engines);
-   }
+   if (pc->vm)
+   RCU_INIT_POINTER(ctx->vm, i915_vm_open(pc->vm));
 
-   mutex_lock(>engines_mutex);
+   mutex_init(>engines_mutex);
+   if (pc->num_user_engines >= 0) {
i915_gem_context_set_user_engines(ctx);
-   engines = rcu_replace_pointer(ctx->engines, engines, 1);
-

[Intel-gfx] [PATCH 20/21] i915/gem/selftests: Assign the VM at context creation in igt_shared_ctx_exec

[Jason Ekstrand]

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 76029d7143f6c..76dd5cfe11b3c 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -813,16 +813,12 @@ static int igt_shared_ctx_exec(void *arg)
struct i915_gem_context *ctx;
struct intel_context *ce;
 
-   ctx = kernel_context(i915, NULL);
+   ctx = kernel_context(i915, ctx_vm(parent));
if (IS_ERR(ctx)) {
err = PTR_ERR(ctx);
goto out_test;
}
 
-   mutex_lock(>mutex);
-   __assign_ppgtt(ctx, ctx_vm(parent));
-   mutex_unlock(>mutex);
-
ce = i915_gem_context_get_engine(ctx, 
engine->legacy_idx);
GEM_BUG_ON(IS_ERR(ce));
 
-- 
2.31.1

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[Intel-gfx] [PATCH 15/21] drm/i915/gt: Drop i915_address_space::file

[Jason Ekstrand]

There's a big comment saying how useful it is but no one is using this
for anything.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c |  9 -
 drivers/gpu/drm/i915/gt/intel_gtt.h | 10 --
 drivers/gpu/drm/i915/selftests/mock_gtt.c   |  1 -
 3 files changed, 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 7929d5a8be449..db9153e0f85a7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -921,17 +921,10 @@ static int gem_context_register(struct i915_gem_context 
*ctx,
u32 *id)
 {
struct drm_i915_private *i915 = ctx->i915;
-   struct i915_address_space *vm;
int ret;
 
ctx->file_priv = fpriv;
 
-   mutex_lock(>mutex);
-   vm = i915_gem_context_vm(ctx);
-   if (vm)
-   WRITE_ONCE(vm->file, fpriv); /* XXX */
-   mutex_unlock(>mutex);
-
ctx->pid = get_task_pid(current, PIDTYPE_PID);
snprintf(ctx->name, sizeof(ctx->name), "%s[%d]",
 current->comm, pid_nr(ctx->pid));
@@ -1030,8 +1023,6 @@ int i915_gem_vm_create_ioctl(struct drm_device *dev, void 
*data,
if (IS_ERR(ppgtt))
return PTR_ERR(ppgtt);
 
-   ppgtt->vm.file = file_priv;
-
if (args->extensions) {
err = i915_user_extensions(u64_to_user_ptr(args->extensions),
   NULL, 0,
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.h 
b/drivers/gpu/drm/i915/gt/intel_gtt.h
index e67e34e179131..4c46068e63c9d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.h
@@ -217,16 +217,6 @@ struct i915_address_space {
struct intel_gt *gt;
struct drm_i915_private *i915;
struct device *dma;
-   /*
-* Every address space belongs to a struct file - except for the global
-* GTT that is owned by the driver (and so @file is set to NULL). In
-* principle, no information should leak from one context to another
-* (or between files/processes etc) unless explicitly shared by the
-* owner. Tracking the owner is important in order to free up per-file
-* objects along with the file, to aide resource tracking, and to
-* assign blame.
-*/
-   struct drm_i915_file_private *file;
u64 total;  /* size addr space maps (ex. 2GB for ggtt) */
u64 reserved;   /* size addr space reserved */
 
diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c 
b/drivers/gpu/drm/i915/selftests/mock_gtt.c
index 5c7ae40bba634..cc047ec594f93 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c
@@ -73,7 +73,6 @@ struct i915_ppgtt *mock_ppgtt(struct drm_i915_private *i915, 
const char *name)
ppgtt->vm.gt = >gt;
ppgtt->vm.i915 = i915;
ppgtt->vm.total = round_down(U64_MAX, PAGE_SIZE);
-   ppgtt->vm.file = ERR_PTR(-ENODEV);
ppgtt->vm.dma = i915->drm.dev;
 
i915_address_space_init(>vm, VM_CLASS_PPGTT);
-- 
2.31.1

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[Intel-gfx] [PATCH 18/21] drm/i915/gem: Don't allow changing the engine set on running contexts

[Jason Ekstrand]

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 301 
 1 file changed, 301 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 3238260cffa31..ef23ab4260c24 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1722,303 +1722,6 @@ static int set_sseu(struct i915_gem_context *ctx,
return ret;
 }
 
-struct set_engines {
-   struct i915_gem_context *ctx;
-   struct i915_gem_engines *engines;
-};
-
-static int
-set_engines__load_balance(struct i915_user_extension __user *base, void *data)
-{
-   struct i915_context_engines_load_balance __user *ext =
-   container_of_user(base, typeof(*ext), base);
-   const struct set_engines *set = data;
-   struct drm_i915_private *i915 = set->ctx->i915;
-   struct intel_engine_cs *stack[16];
-   struct intel_engine_cs **siblings;
-   struct intel_context *ce;
-   u16 num_siblings, idx;
-   unsigned int n;
-   int err;
-
-   if (!HAS_EXECLISTS(i915))
-   return -ENODEV;
-
-   if (intel_uc_uses_guc_submission(>gt.uc))
-   return -ENODEV; /* not implement yet */
-
-   if (get_user(idx, >engine_index))
-   return -EFAULT;
-
-   if (idx >= set->engines->num_engines) {
-   drm_dbg(>drm, "Invalid placement value, %d >= %d\n",
-   idx, set->engines->num_engines);
-   return -EINVAL;
-   }
-
-   idx = array_index_nospec(idx, set->engines->num_engines);
-   if (set->engines->engines[idx]) {
-   drm_dbg(>drm,
-   "Invalid placement[%d], already occupied\n", idx);
-   return -EEXIST;
-   }
-
-   if (get_user(num_siblings, >num_siblings))
-   return -EFAULT;
-
-   err = check_user_mbz(>flags);
-   if (err)
-   return err;
-
-   err = check_user_mbz(>mbz64);
-   if (err)
-   return err;
-
-   siblings = stack;
-   if (num_siblings > ARRAY_SIZE(stack)) {
-   siblings = kmalloc_array(num_siblings,
-sizeof(*siblings),
-GFP_KERNEL);
-   if (!siblings)
-   return -ENOMEM;
-   }
-
-   for (n = 0; n < num_siblings; n++) {
-   struct i915_engine_class_instance ci;
-
-   if (copy_from_user(, >engines[n], sizeof(ci))) {
-   err = -EFAULT;
-   goto out_siblings;
-   }
-
-   siblings[n] = intel_engine_lookup_user(i915,
-  ci.engine_class,
-  ci.engine_instance);
-   if (!siblings[n]) {
-   drm_dbg(>drm,
-   "Invalid sibling[%d]: { class:%d, inst:%d }\n",
-   n, ci.engine_class, ci.engine_instance);
-   err = -EINVAL;
-   goto out_siblings;
-   }
-   }
-
-   ce = intel_execlists_create_virtual(siblings, n);
-   if (IS_ERR(ce)) {
-   err = PTR_ERR(ce);
-   goto out_siblings;
-   }
-
-   intel_context_set_gem(ce, set->ctx);
-
-   if (cmpxchg(>engines->engines[idx], NULL, ce)) {
-   intel_context_put(ce);
-   err = -EEXIST;
-   goto out_siblings;
-   }
-
-out_siblings:
-   if (siblings != stack)
-   kfree(siblings);
-
-   return err;
-}
-
-static int
-set_engines__bond(struct i915_user_extension __user *base, void *data)
-{
-   struct i915_context_engines_bond __user *ext =
-   container_of_user(base, typeof(*ext), base);
-   const struct set_engines *set = data;
-   struct drm_i915_private *i915 = set->ctx->i915;
-   struct i915_engine_class_instance ci;
-   struct intel_engine_cs *virtual;
-   struct intel_engine_cs *master;
-   u16 idx, num_bonds;
-   int err, n;
-
-   if (get_user(idx, >virtual_index))
-   return -EFAULT;
-
-   if (idx >= set->engines->num_engines) {
-   drm_dbg(>drm,
-   "Invalid index for virtual engine: %d >= %d\n",
-   idx, set->engines->num_engines);
-   return -EINVAL;
-   }
-
-   idx = array_index_nospec(idx, set->engines->num_engines);
-   if (!set->engines->engines[idx]) {
-   drm_dbg(>drm, "Invalid engine at %d\n", idx);
-   return -EINVAL;
-   }
-   virtual = set->engines->engines[idx]->engine;
-
-   if (intel_engine_is_virtual(virtual)) {
-   drm_dbg(>drm,
-   "Bonding with virtual engines not allowed\n");
-   return -EINVAL;
-   }
-

[Intel-gfx] [PATCH 19/21] drm/i915/selftests: Take a VM in kernel_context()

[Jason Ekstrand]

Signed-off-by: Jason Ekstrand 
---
 .../drm/i915/gem/selftests/i915_gem_context.c |  4 ++--
 .../gpu/drm/i915/gem/selftests/mock_context.c |  8 +++-
 .../gpu/drm/i915/gem/selftests/mock_context.h |  4 +++-
 drivers/gpu/drm/i915/gt/selftest_execlists.c  | 20 +--
 drivers/gpu/drm/i915/gt/selftest_hangcheck.c  |  2 +-
 5 files changed, 23 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 16ff64ab34a1b..76029d7143f6c 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -680,7 +680,7 @@ static int igt_ctx_exec(void *arg)
struct i915_gem_context *ctx;
struct intel_context *ce;
 
-   ctx = kernel_context(i915);
+   ctx = kernel_context(i915, NULL);
if (IS_ERR(ctx)) {
err = PTR_ERR(ctx);
goto out_file;
@@ -813,7 +813,7 @@ static int igt_shared_ctx_exec(void *arg)
struct i915_gem_context *ctx;
struct intel_context *ce;
 
-   ctx = kernel_context(i915);
+   ctx = kernel_context(i915, NULL);
if (IS_ERR(ctx)) {
err = PTR_ERR(ctx);
goto out_test;
diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_context.c 
b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
index 32cf2103828f9..e4aced7eabb72 100644
--- a/drivers/gpu/drm/i915/gem/selftests/mock_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
@@ -148,7 +148,8 @@ live_context_for_engine(struct intel_engine_cs *engine, 
struct file *file)
 }
 
 struct i915_gem_context *
-kernel_context(struct drm_i915_private *i915)
+kernel_context(struct drm_i915_private *i915,
+  struct i915_address_space *vm)
 {
struct i915_gem_context *ctx;
struct i915_gem_proto_context *pc;
@@ -157,6 +158,11 @@ kernel_context(struct drm_i915_private *i915)
if (IS_ERR(pc))
return ERR_CAST(pc);
 
+   if (vm) {
+   i915_vm_put(pc->vm);
+   pc->vm = i915_vm_get(vm);
+   }
+
ctx = i915_gem_create_context(i915, pc);
proto_context_close(pc);
if (IS_ERR(ctx))
diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_context.h 
b/drivers/gpu/drm/i915/gem/selftests/mock_context.h
index 2a6121d33352d..7a02fd9b5866a 100644
--- a/drivers/gpu/drm/i915/gem/selftests/mock_context.h
+++ b/drivers/gpu/drm/i915/gem/selftests/mock_context.h
@@ -10,6 +10,7 @@
 struct file;
 struct drm_i915_private;
 struct intel_engine_cs;
+struct i915_address_space;
 
 void mock_init_contexts(struct drm_i915_private *i915);
 
@@ -25,7 +26,8 @@ live_context(struct drm_i915_private *i915, struct file 
*file);
 struct i915_gem_context *
 live_context_for_engine(struct intel_engine_cs *engine, struct file *file);
 
-struct i915_gem_context *kernel_context(struct drm_i915_private *i915);
+struct i915_gem_context *kernel_context(struct drm_i915_private *i915,
+   struct i915_address_space *vm);
 void kernel_context_close(struct i915_gem_context *ctx);
 
 #endif /* !__MOCK_CONTEXT_H */
diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c 
b/drivers/gpu/drm/i915/gt/selftest_execlists.c
index f03446d587160..0bb35c29ea193 100644
--- a/drivers/gpu/drm/i915/gt/selftest_execlists.c
+++ b/drivers/gpu/drm/i915/gt/selftest_execlists.c
@@ -1522,12 +1522,12 @@ static int live_busywait_preempt(void *arg)
 * preempt the busywaits used to synchronise between rings.
 */
 
-   ctx_hi = kernel_context(gt->i915);
+   ctx_hi = kernel_context(gt->i915, NULL);
if (!ctx_hi)
return -ENOMEM;
ctx_hi->sched.priority = I915_CONTEXT_MAX_USER_PRIORITY;
 
-   ctx_lo = kernel_context(gt->i915);
+   ctx_lo = kernel_context(gt->i915, NULL);
if (!ctx_lo)
goto err_ctx_hi;
ctx_lo->sched.priority = I915_CONTEXT_MIN_USER_PRIORITY;
@@ -1724,12 +1724,12 @@ static int live_preempt(void *arg)
if (igt_spinner_init(_lo, gt))
goto err_spin_hi;
 
-   ctx_hi = kernel_context(gt->i915);
+   ctx_hi = kernel_context(gt->i915, NULL);
if (!ctx_hi)
goto err_spin_lo;
ctx_hi->sched.priority = I915_CONTEXT_MAX_USER_PRIORITY;
 
-   ctx_lo = kernel_context(gt->i915);
+   ctx_lo = kernel_context(gt->i915, NULL);
if (!ctx_lo)
goto err_ctx_hi;
ctx_lo->sched.priority = I915_CONTEXT_MIN_USER_PRIORITY;
@@ -1816,11 +1816,11 @@ static int live_late_preempt(void *arg)
if (igt_spinner_init(_lo, gt))
goto err_spin_hi;
 
-   ctx_hi = kernel_context(gt->i915);
+   ctx_hi = 

[Intel-gfx] [PATCH 17/21] drm/i915/gem: Don't allow changing the VM on running contexts

[Jason Ekstrand]

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 267 --
 .../gpu/drm/i915/gem/i915_gem_context_types.h |   2 +-
 .../drm/i915/gem/selftests/i915_gem_context.c | 119 
 .../drm/i915/selftests/i915_mock_selftests.h  |   1 -
 4 files changed, 1 insertion(+), 388 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index aa8e61211924f..3238260cffa31 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1536,121 +1536,6 @@ int i915_gem_vm_destroy_ioctl(struct drm_device *dev, 
void *data,
return 0;
 }
 
-struct context_barrier_task {
-   struct i915_active base;
-   void (*task)(void *data);
-   void *data;
-};
-
-__i915_active_call
-static void cb_retire(struct i915_active *base)
-{
-   struct context_barrier_task *cb = container_of(base, typeof(*cb), base);
-
-   if (cb->task)
-   cb->task(cb->data);
-
-   i915_active_fini(>base);
-   kfree(cb);
-}
-
-I915_SELFTEST_DECLARE(static intel_engine_mask_t context_barrier_inject_fault);
-static int context_barrier_task(struct i915_gem_context *ctx,
-   intel_engine_mask_t engines,
-   bool (*skip)(struct intel_context *ce, void 
*data),
-   int (*pin)(struct intel_context *ce, struct 
i915_gem_ww_ctx *ww, void *data),
-   int (*emit)(struct i915_request *rq, void 
*data),
-   void (*task)(void *data),
-   void *data)
-{
-   struct context_barrier_task *cb;
-   struct i915_gem_engines_iter it;
-   struct i915_gem_engines *e;
-   struct i915_gem_ww_ctx ww;
-   struct intel_context *ce;
-   int err = 0;
-
-   GEM_BUG_ON(!task);
-
-   cb = kmalloc(sizeof(*cb), GFP_KERNEL);
-   if (!cb)
-   return -ENOMEM;
-
-   i915_active_init(>base, NULL, cb_retire);
-   err = i915_active_acquire(>base);
-   if (err) {
-   kfree(cb);
-   return err;
-   }
-
-   e = __context_engines_await(ctx, NULL);
-   if (!e) {
-   i915_active_release(>base);
-   return -ENOENT;
-   }
-
-   for_each_gem_engine(ce, e, it) {
-   struct i915_request *rq;
-
-   if (I915_SELFTEST_ONLY(context_barrier_inject_fault &
-  ce->engine->mask)) {
-   err = -ENXIO;
-   break;
-   }
-
-   if (!(ce->engine->mask & engines))
-   continue;
-
-   if (skip && skip(ce, data))
-   continue;
-
-   i915_gem_ww_ctx_init(, true);
-retry:
-   err = intel_context_pin_ww(ce, );
-   if (err)
-   goto err;
-
-   if (pin)
-   err = pin(ce, , data);
-   if (err)
-   goto err_unpin;
-
-   rq = i915_request_create(ce);
-   if (IS_ERR(rq)) {
-   err = PTR_ERR(rq);
-   goto err_unpin;
-   }
-
-   err = 0;
-   if (emit)
-   err = emit(rq, data);
-   if (err == 0)
-   err = i915_active_add_request(>base, rq);
-
-   i915_request_add(rq);
-err_unpin:
-   intel_context_unpin(ce);
-err:
-   if (err == -EDEADLK) {
-   err = i915_gem_ww_ctx_backoff();
-   if (!err)
-   goto retry;
-   }
-   i915_gem_ww_ctx_fini();
-
-   if (err)
-   break;
-   }
-   i915_sw_fence_complete(>fence);
-
-   cb->task = err ? NULL : task; /* caller needs to unwind instead */
-   cb->data = data;
-
-   i915_active_release(>base);
-
-   return err;
-}
-
 static int get_ppgtt(struct drm_i915_file_private *file_priv,
 struct i915_gem_context *ctx,
 struct drm_i915_gem_context_param *args)
@@ -1683,154 +1568,6 @@ static int get_ppgtt(struct drm_i915_file_private 
*file_priv,
return err;
 }
 
-static void set_ppgtt_barrier(void *data)
-{
-   struct i915_address_space *old = data;
-
-   if (INTEL_GEN(old->i915) < 8)
-   gen6_ppgtt_unpin_all(i915_vm_to_ppgtt(old));
-
-   i915_vm_close(old);
-}
-
-static int pin_ppgtt_update(struct intel_context *ce, struct i915_gem_ww_ctx 
*ww, void *data)
-{
-   struct i915_address_space *vm = ce->vm;
-
-   if (!HAS_LOGICAL_RING_CONTEXTS(vm->i915))
-   /* ppGTT is not part of the legacy context image */
-   return gen6_ppgtt_pin(i915_vm_to_ppgtt(vm), ww);
-
-   return 0;
-}
-
-static int 

[Intel-gfx] [PATCH 14/21] drm/i915/gem: Return an error ptr from context_lookup

[Jason Ekstrand]

We're about to start doing lazy context creation which means contexts
get created in i915_gem_context_lookup and we may start having more
errors than -ENOENT.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c| 12 ++--
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c |  4 ++--
 drivers/gpu/drm/i915/i915_drv.h|  2 +-
 drivers/gpu/drm/i915/i915_perf.c   |  4 ++--
 4 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 3e883daab93bf..7929d5a8be449 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -2105,8 +2105,8 @@ int i915_gem_context_getparam_ioctl(struct drm_device 
*dev, void *data,
int ret = 0;
 
ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
-   if (!ctx)
-   return -ENOENT;
+   if (IS_ERR(ctx))
+   return PTR_ERR(ctx);
 
switch (args->param) {
case I915_CONTEXT_PARAM_GTT_SIZE:
@@ -2174,8 +2174,8 @@ int i915_gem_context_setparam_ioctl(struct drm_device 
*dev, void *data,
int ret;
 
ctx = i915_gem_context_lookup(file_priv, args->ctx_id);
-   if (!ctx)
-   return -ENOENT;
+   if (IS_ERR(ctx))
+   return PTR_ERR(ctx);
 
ret = ctx_setparam(file_priv, ctx, args);
 
@@ -2194,8 +2194,8 @@ int i915_gem_context_reset_stats_ioctl(struct drm_device 
*dev,
return -EINVAL;
 
ctx = i915_gem_context_lookup(file->driver_priv, args->ctx_id);
-   if (!ctx)
-   return -ENOENT;
+   if (IS_ERR(ctx))
+   return PTR_ERR(ctx);
 
/*
 * We opt for unserialised reads here. This may result in tearing
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 7024adcd5cf15..de14b26f3b2d5 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -739,8 +739,8 @@ static int eb_select_context(struct i915_execbuffer *eb)
struct i915_gem_context *ctx;
 
ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1);
-   if (unlikely(!ctx))
-   return -ENOENT;
+   if (unlikely(IS_ERR(ctx)))
+   return PTR_ERR(ctx);
 
eb->gem_context = ctx;
if (rcu_access_pointer(ctx->vm))
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8571c5c1509a7..004ed0e59c999 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1851,7 +1851,7 @@ i915_gem_context_lookup(struct drm_i915_file_private 
*file_priv, u32 id)
ctx = NULL;
rcu_read_unlock();
 
-   return ctx;
+   return ctx ? ctx : ERR_PTR(-ENOENT);
 }
 
 /* i915_gem_evict.c */
diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index 85ad62dbabfab..b86ed03f6a705 100644
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -3414,10 +3414,10 @@ i915_perf_open_ioctl_locked(struct i915_perf *perf,
struct drm_i915_file_private *file_priv = file->driver_priv;
 
specific_ctx = i915_gem_context_lookup(file_priv, ctx_handle);
-   if (!specific_ctx) {
+   if (IS_ERR(specific_ctx)) {
DRM_DEBUG("Failed to look up context with ID %u for 
opening perf stream\n",
  ctx_handle);
-   ret = -ENOENT;
+   ret = PTR_ERR(specific_ctx);
goto err;
}
}
-- 
2.31.1

___
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[Intel-gfx] [PATCH 12/21] drm/i915/gem: Add a separate validate_priority helper

[Jason Ekstrand]

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 42 +
 1 file changed, 27 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 941fbf78267b4..e5efd22c89ba2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -169,6 +169,28 @@ lookup_user_engine(struct i915_gem_context *ctx,
return i915_gem_context_get_engine(ctx, idx);
 }
 
+static int validate_priority(struct drm_i915_private *i915,
+const struct drm_i915_gem_context_param *args)
+{
+   s64 priority = args->value;
+
+   if (args->size)
+   return -EINVAL;
+
+   if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
+   return -ENODEV;
+
+   if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
+   priority < I915_CONTEXT_MIN_USER_PRIORITY)
+   return -EINVAL;
+
+   if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
+   !capable(CAP_SYS_NICE))
+   return -EPERM;
+
+   return 0;
+}
+
 static struct i915_address_space *
 context_get_vm_rcu(struct i915_gem_context *ctx)
 {
@@ -1744,23 +1766,13 @@ static void __apply_priority(struct intel_context *ce, 
void *arg)
 static int set_priority(struct i915_gem_context *ctx,
const struct drm_i915_gem_context_param *args)
 {
-   s64 priority = args->value;
-
-   if (args->size)
-   return -EINVAL;
-
-   if (!(ctx->i915->caps.scheduler & I915_SCHEDULER_CAP_PRIORITY))
-   return -ENODEV;
-
-   if (priority > I915_CONTEXT_MAX_USER_PRIORITY ||
-   priority < I915_CONTEXT_MIN_USER_PRIORITY)
-   return -EINVAL;
+   int err;
 
-   if (priority > I915_CONTEXT_DEFAULT_PRIORITY &&
-   !capable(CAP_SYS_NICE))
-   return -EPERM;
+   err = validate_priority(ctx->i915, args);
+   if (err)
+   return err;
 
-   ctx->sched.priority = priority;
+   ctx->sched.priority = args->value;
context_apply_all(ctx, __apply_priority, ctx);
 
return 0;
-- 
2.31.1

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[Intel-gfx] [PATCH 16/21] drm/i915/gem: Delay context creation

[Jason Ekstrand]

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 657 --
 drivers/gpu/drm/i915/gem/i915_gem_context.h   |   3 +
 .../gpu/drm/i915/gem/i915_gem_context_types.h |  26 +
 .../gpu/drm/i915/gem/selftests/mock_context.c |   5 +-
 drivers/gpu/drm/i915/i915_drv.h   |  17 +-
 5 files changed, 648 insertions(+), 60 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index db9153e0f85a7..aa8e61211924f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -193,8 +193,15 @@ static int validate_priority(struct drm_i915_private *i915,
 
 static void proto_context_close(struct i915_gem_proto_context *pc)
 {
+   int i;
+
if (pc->vm)
i915_vm_put(pc->vm);
+   if (pc->user_engines) {
+   for (i = 0; i < pc->num_user_engines; i++)
+   kfree(pc->user_engines[i].siblings);
+   kfree(pc->user_engines);
+   }
kfree(pc);
 }
 
@@ -274,12 +281,417 @@ proto_context_create(struct drm_i915_private *i915, 
unsigned int flags)
proto_context_set_persistence(i915, pc, true);
pc->sched.priority = I915_PRIORITY_NORMAL;
 
+   pc->num_user_engines = -1;
+   pc->user_engines = NULL;
+
if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE)
pc->single_timeline = true;
 
return pc;
 }
 
+static int proto_context_register_locked(struct drm_i915_file_private *fpriv,
+struct i915_gem_proto_context *pc,
+u32 *id)
+{
+   int ret;
+   void *old;
+
+   ret = xa_alloc(>context_xa, id, NULL, xa_limit_32b, GFP_KERNEL);
+   if (ret)
+   return ret;
+
+   old = xa_store(>proto_context_xa, *id, pc, GFP_KERNEL);
+   if (xa_is_err(old)) {
+   xa_erase(>context_xa, *id);
+   return xa_err(old);
+   }
+   GEM_BUG_ON(old);
+
+   return 0;
+}
+
+static int proto_context_register(struct drm_i915_file_private *fpriv,
+ struct i915_gem_proto_context *pc,
+ u32 *id)
+{
+   int ret;
+
+   mutex_lock(>proto_context_lock);
+   ret = proto_context_register_locked(fpriv, pc, id);
+   mutex_unlock(>proto_context_lock);
+
+   return ret;
+}
+
+static int set_proto_ctx_vm(struct drm_i915_file_private *fpriv,
+   struct i915_gem_proto_context *pc,
+   const struct drm_i915_gem_context_param *args)
+{
+   struct i915_address_space *vm;
+
+   if (args->size)
+   return -EINVAL;
+
+   if (!pc->vm)
+   return -ENODEV;
+
+   if (upper_32_bits(args->value))
+   return -ENOENT;
+
+   rcu_read_lock();
+   vm = xa_load(>vm_xa, args->value);
+   if (vm && !kref_get_unless_zero(>ref))
+   vm = NULL;
+   rcu_read_unlock();
+   if (!vm)
+   return -ENOENT;
+
+   i915_vm_put(pc->vm);
+   pc->vm = vm;
+
+   return 0;
+}
+
+struct set_proto_ctx_engines {
+   struct drm_i915_private *i915;
+   unsigned num_engines;
+   struct i915_gem_proto_engine *engines;
+};
+
+static int
+set_proto_ctx_engines_balance(struct i915_user_extension __user *base,
+ void *data)
+{
+   struct i915_context_engines_load_balance __user *ext =
+   container_of_user(base, typeof(*ext), base);
+   const struct set_proto_ctx_engines *set = data;
+   struct drm_i915_private *i915 = set->i915;
+   struct intel_engine_cs **siblings;
+   u16 num_siblings, idx;
+   unsigned int n;
+   int err;
+
+   if (!HAS_EXECLISTS(i915))
+   return -ENODEV;
+
+   if (intel_uc_uses_guc_submission(>gt.uc))
+   return -ENODEV; /* not implement yet */
+
+   if (get_user(idx, >engine_index))
+   return -EFAULT;
+
+   if (idx >= set->num_engines) {
+   drm_dbg(>drm, "Invalid placement value, %d >= %d\n",
+   idx, set->num_engines);
+   return -EINVAL;
+   }
+
+   idx = array_index_nospec(idx, set->num_engines);
+   if (set->engines[idx].type != I915_GEM_ENGINE_TYPE_INVALID) {
+   drm_dbg(>drm,
+   "Invalid placement[%d], already occupied\n", idx);
+   return -EEXIST;
+   }
+
+   if (get_user(num_siblings, >num_siblings))
+   return -EFAULT;
+
+   err = check_user_mbz(>flags);
+   if (err)
+   return err;
+
+   err = check_user_mbz(>mbz64);
+   if (err)
+   return err;
+
+   if (num_siblings == 0)
+   return 0;
+
+   siblings = kmalloc_array(num_siblings, sizeof(*siblings), GFP_KERNEL);
+   if (!siblings)
+   return 

[Intel-gfx] [PATCH 11/21] drm/i915: Stop manually RCU banging in reset_stats_ioctl

[Jason Ekstrand]

As far as I can tell, the only real reason for this is to avoid taking a
reference to the i915_gem_context.  The cost of those two atomics
probably pales in comparison to the cost of the ioctl itself so we're
really not buying ourselves anything here.  We're about to make context
lookup a tiny bit more complicated, so let's get rid of the one hand-
rolled case.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 13 -
 drivers/gpu/drm/i915/i915_drv.h |  8 +---
 2 files changed, 5 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index ecb3bf5369857..941fbf78267b4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -2090,16 +2090,13 @@ int i915_gem_context_reset_stats_ioctl(struct 
drm_device *dev,
struct drm_i915_private *i915 = to_i915(dev);
struct drm_i915_reset_stats *args = data;
struct i915_gem_context *ctx;
-   int ret;
 
if (args->flags || args->pad)
return -EINVAL;
 
-   ret = -ENOENT;
-   rcu_read_lock();
-   ctx = __i915_gem_context_lookup_rcu(file->driver_priv, args->ctx_id);
+   ctx = i915_gem_context_lookup(file->driver_priv, args->ctx_id);
if (!ctx)
-   goto out;
+   return -ENOENT;
 
/*
 * We opt for unserialised reads here. This may result in tearing
@@ -2116,10 +2113,8 @@ int i915_gem_context_reset_stats_ioctl(struct drm_device 
*dev,
args->batch_active = atomic_read(>guilty_count);
args->batch_pending = atomic_read(>active_count);
 
-   ret = 0;
-out:
-   rcu_read_unlock();
-   return ret;
+   i915_gem_context_put(ctx);
+   return 0;
 }
 
 /* GEM context-engines iterator: for_each_gem_engine() */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0b44333eb7033..8571c5c1509a7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1840,19 +1840,13 @@ struct drm_gem_object *i915_gem_prime_import(struct 
drm_device *dev,
 
 struct dma_buf *i915_gem_prime_export(struct drm_gem_object *gem_obj, int 
flags);
 
-static inline struct i915_gem_context *
-__i915_gem_context_lookup_rcu(struct drm_i915_file_private *file_priv, u32 id)
-{
-   return xa_load(_priv->context_xa, id);
-}
-
 static inline struct i915_gem_context *
 i915_gem_context_lookup(struct drm_i915_file_private *file_priv, u32 id)
 {
struct i915_gem_context *ctx;
 
rcu_read_lock();
-   ctx = __i915_gem_context_lookup_rcu(file_priv, id);
+   ctx = xa_load(_priv->context_xa, id);
if (ctx && !kref_get_unless_zero(>ref))
ctx = NULL;
rcu_read_unlock();
-- 
2.31.1

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[Intel-gfx] [PATCH 13/21] drm/i915/gem: Add an intermediate proto_context struct

[Jason Ekstrand]

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 143 ++
 .../gpu/drm/i915/gem/i915_gem_context_types.h |  21 +++
 .../gpu/drm/i915/gem/selftests/mock_context.c |  16 +-
 3 files changed, 150 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index e5efd22c89ba2..3e883daab93bf 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -191,6 +191,95 @@ static int validate_priority(struct drm_i915_private *i915,
return 0;
 }
 
+static void proto_context_close(struct i915_gem_proto_context *pc)
+{
+   if (pc->vm)
+   i915_vm_put(pc->vm);
+   kfree(pc);
+}
+
+static int proto_context_set_persistence(struct drm_i915_private *i915,
+struct i915_gem_proto_context *pc,
+bool persist)
+{
+   if (test_bit(UCONTEXT_PERSISTENCE, >user_flags) == persist)
+   return 0;
+
+   if (persist) {
+   /*
+* Only contexts that are short-lived [that will expire or be
+* reset] are allowed to survive past termination. We require
+* hangcheck to ensure that the persistent requests are healthy.
+*/
+   if (!i915->params.enable_hangcheck)
+   return -EINVAL;
+
+   set_bit(UCONTEXT_PERSISTENCE, >user_flags);
+   } else {
+   /* To cancel a context we use "preempt-to-idle" */
+   if (!(i915->caps.scheduler & I915_SCHEDULER_CAP_PREEMPTION))
+   return -ENODEV;
+
+   /*
+* If the cancel fails, we then need to reset, cleanly!
+*
+* If the per-engine reset fails, all hope is lost! We resort
+* to a full GPU reset in that unlikely case, but realistically
+* if the engine could not reset, the full reset does not fare
+* much better. The damage has been done.
+*
+* However, if we cannot reset an engine by itself, we cannot
+* cleanup a hanging persistent context without causing
+* colateral damage, and we should not pretend we can by
+* exposing the interface.
+*/
+   if (!intel_has_reset_engine(>gt))
+   return -ENODEV;
+
+   clear_bit(UCONTEXT_PERSISTENCE, >user_flags);
+   }
+
+   return 0;
+}
+
+static struct i915_gem_proto_context *
+proto_context_create(struct drm_i915_private *i915, unsigned int flags)
+{
+   struct i915_gem_proto_context *pc;
+
+   if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE &&
+   !HAS_EXECLISTS(i915))
+   return ERR_PTR(-EINVAL);
+
+   pc = kzalloc(sizeof(*pc), GFP_KERNEL);
+   if (!pc)
+   return ERR_PTR(-ENOMEM);
+
+   if (HAS_FULL_PPGTT(i915)) {
+   struct i915_ppgtt *ppgtt;
+
+   ppgtt = i915_ppgtt_create(>gt);
+   if (IS_ERR(ppgtt)) {
+   drm_dbg(>drm, "PPGTT setup failed (%ld)\n",
+   PTR_ERR(ppgtt));
+   proto_context_close(pc);
+   return ERR_CAST(ppgtt);
+   }
+   pc->vm = >vm;
+   }
+
+   pc->user_flags = 0;
+   set_bit(UCONTEXT_BANNABLE, >user_flags);
+   set_bit(UCONTEXT_RECOVERABLE, >user_flags);
+   proto_context_set_persistence(i915, pc, true);
+   pc->sched.priority = I915_PRIORITY_NORMAL;
+
+   if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE)
+   pc->single_timeline = true;
+
+   return pc;
+}
+
 static struct i915_address_space *
 context_get_vm_rcu(struct i915_gem_context *ctx)
 {
@@ -660,7 +749,8 @@ static int __context_set_persistence(struct 
i915_gem_context *ctx, bool state)
 }
 
 static struct i915_gem_context *
-__create_context(struct drm_i915_private *i915)
+__create_context(struct drm_i915_private *i915,
+const struct i915_gem_proto_context *pc)
 {
struct i915_gem_context *ctx;
struct i915_gem_engines *e;
@@ -673,7 +763,7 @@ __create_context(struct drm_i915_private *i915)
 
kref_init(>ref);
ctx->i915 = i915;
-   ctx->sched.priority = I915_PRIORITY_NORMAL;
+   ctx->sched = pc->sched;
mutex_init(>mutex);
INIT_LIST_HEAD(>link);
 
@@ -696,9 +786,7 @@ __create_context(struct drm_i915_private *i915)
 * is no remap info, it will be a NOP. */
ctx->remap_slice = ALL_L3_SLICES(i915);
 
-   i915_gem_context_set_bannable(ctx);
-   i915_gem_context_set_recoverable(ctx);
-   __context_set_persistence(ctx, true /* cgroup hook? */);
+   ctx->user_flags = pc->user_flags;
 
for (i = 0; i < 

[Intel-gfx] [PATCH 10/21] drm/i915/request: Remove the hook from await_execution

[Jason Ekstrand]

This was only ever used for bonded virtual engine execution.  Since
that's no longer allowed, this is dead code.

Signed-off-by: Jason Ekstrand 
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|  3 +-
 drivers/gpu/drm/i915/i915_request.c   | 42 ---
 drivers/gpu/drm/i915/i915_request.h   |  4 +-
 3 files changed, 9 insertions(+), 40 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index efb2fa3522a42..7024adcd5cf15 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -3473,8 +3473,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
if (in_fence) {
if (args->flags & I915_EXEC_FENCE_SUBMIT)
err = i915_request_await_execution(eb.request,
-  in_fence,
-  NULL);
+  in_fence);
else
err = i915_request_await_dma_fence(eb.request,
   in_fence);
diff --git a/drivers/gpu/drm/i915/i915_request.c 
b/drivers/gpu/drm/i915/i915_request.c
index bec9c3652188b..7e00218b8c105 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -49,7 +49,6 @@
 struct execute_cb {
struct irq_work work;
struct i915_sw_fence *fence;
-   void (*hook)(struct i915_request *rq, struct dma_fence *signal);
struct i915_request *signal;
 };
 
@@ -180,17 +179,6 @@ static void irq_execute_cb(struct irq_work *wrk)
kmem_cache_free(global.slab_execute_cbs, cb);
 }
 
-static void irq_execute_cb_hook(struct irq_work *wrk)
-{
-   struct execute_cb *cb = container_of(wrk, typeof(*cb), work);
-
-   cb->hook(container_of(cb->fence, struct i915_request, submit),
->signal->fence);
-   i915_request_put(cb->signal);
-
-   irq_execute_cb(wrk);
-}
-
 static __always_inline void
 __notify_execute_cb(struct i915_request *rq, bool (*fn)(struct irq_work *wrk))
 {
@@ -517,17 +505,12 @@ static bool __request_in_flight(const struct i915_request 
*signal)
 static int
 __await_execution(struct i915_request *rq,
  struct i915_request *signal,
- void (*hook)(struct i915_request *rq,
-  struct dma_fence *signal),
  gfp_t gfp)
 {
struct execute_cb *cb;
 
-   if (i915_request_is_active(signal)) {
-   if (hook)
-   hook(rq, >fence);
+   if (i915_request_is_active(signal))
return 0;
-   }
 
cb = kmem_cache_alloc(global.slab_execute_cbs, gfp);
if (!cb)
@@ -537,12 +520,6 @@ __await_execution(struct i915_request *rq,
i915_sw_fence_await(cb->fence);
init_irq_work(>work, irq_execute_cb);
 
-   if (hook) {
-   cb->hook = hook;
-   cb->signal = i915_request_get(signal);
-   cb->work.func = irq_execute_cb_hook;
-   }
-
/*
 * Register the callback first, then see if the signaler is already
 * active. This ensures that if we race with the
@@ -1253,7 +1230,7 @@ emit_semaphore_wait(struct i915_request *to,
goto await_fence;
 
/* Only submit our spinner after the signaler is running! */
-   if (__await_execution(to, from, NULL, gfp))
+   if (__await_execution(to, from, gfp))
goto await_fence;
 
if (__emit_semaphore_wait(to, from, from->fence.seqno))
@@ -1284,16 +1261,14 @@ static int intel_timeline_sync_set_start(struct 
intel_timeline *tl,
 
 static int
 __i915_request_await_execution(struct i915_request *to,
-  struct i915_request *from,
-  void (*hook)(struct i915_request *rq,
-   struct dma_fence *signal))
+  struct i915_request *from)
 {
int err;
 
GEM_BUG_ON(intel_context_is_barrier(from->context));
 
/* Submit both requests at the same time */
-   err = __await_execution(to, from, hook, I915_FENCE_GFP);
+   err = __await_execution(to, from, I915_FENCE_GFP);
if (err)
return err;
 
@@ -1406,9 +1381,7 @@ i915_request_await_external(struct i915_request *rq, 
struct dma_fence *fence)
 
 int
 i915_request_await_execution(struct i915_request *rq,
-struct dma_fence *fence,
-void (*hook)(struct i915_request *rq,
- struct dma_fence *signal))
+struct dma_fence *fence)
 {
struct dma_fence **child = 
unsigned int nchild = 1;
@@ -1441,8 +1414,7 @@ i915_request_await_execution(struct i915_request *rq,
 
 

[Intel-gfx] [PATCH 09/21] drm/i915/gem: Disallow creating contexts with too many engines

[Jason Ekstrand]

There's no sense in allowing userspace to create more engines than it
can possibly access via execbuf.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 5f8d0faf783aa..ecb3bf5369857 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1640,11 +1640,10 @@ set_engines(struct i915_gem_context *ctx,
return -EINVAL;
}
 
-   /*
-* Note that I915_EXEC_RING_MASK limits execbuf to only using the
-* first 64 engines defined here.
-*/
num_engines = (args->size - sizeof(*user)) / sizeof(*user->engines);
+   if (num_engines > I915_EXEC_RING_MASK + 1)
+   return -EINVAL;
+
set.engines = alloc_engines(num_engines);
if (!set.engines)
return -ENOMEM;
-- 
2.31.1

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[Intel-gfx] [PATCH 08/21] drm/i915/gem: Disallow bonding of virtual engines

[Jason Ekstrand]

This adds a bunch of complexity which the media driver has never
actually used.  The media driver does technically bond a balanced engine
to another engine but the balanced engine only has one engine in the
sibling set.  This doesn't actually result in a virtual engine.

Unless some userspace badly wants it, there's no good reason to support
this case.  This makes I915_CONTEXT_ENGINES_EXT_BOND a total no-op.  We
leave the validation code in place in case we ever decide we want to do
something interesting with the bonding information.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   |  18 +-
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c|   2 +-
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |   7 -
 .../drm/i915/gt/intel_execlists_submission.c  | 100 
 .../drm/i915/gt/intel_execlists_submission.h  |   4 -
 drivers/gpu/drm/i915/gt/selftest_execlists.c  | 229 --
 6 files changed, 7 insertions(+), 353 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index e8179918fa306..5f8d0faf783aa 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1553,6 +1553,12 @@ set_engines__bond(struct i915_user_extension __user 
*base, void *data)
}
virtual = set->engines->engines[idx]->engine;
 
+   if (intel_engine_is_virtual(virtual)) {
+   drm_dbg(>drm,
+   "Bonding with virtual engines not allowed\n");
+   return -EINVAL;
+   }
+
err = check_user_mbz(>flags);
if (err)
return err;
@@ -1593,18 +1599,6 @@ set_engines__bond(struct i915_user_extension __user 
*base, void *data)
n, ci.engine_class, ci.engine_instance);
return -EINVAL;
}
-
-   /*
-* A non-virtual engine has no siblings to choose between; and
-* a submit fence will always be directed to the one engine.
-*/
-   if (intel_engine_is_virtual(virtual)) {
-   err = intel_virtual_engine_attach_bond(virtual,
-  master,
-  bond);
-   if (err)
-   return err;
-   }
}
 
return 0;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index d640bba6ad9ab..efb2fa3522a42 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -3474,7 +3474,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
if (args->flags & I915_EXEC_FENCE_SUBMIT)
err = i915_request_await_execution(eb.request,
   in_fence,
-  
eb.engine->bond_execute);
+  NULL);
else
err = i915_request_await_dma_fence(eb.request,
   in_fence);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h 
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 883bafc449024..68cfe5080325c 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -446,13 +446,6 @@ struct intel_engine_cs {
 */
void(*submit_request)(struct i915_request *rq);
 
-   /*
-* Called on signaling of a SUBMIT_FENCE, passing along the signaling
-* request down to the bonded pairs.
-*/
-   void(*bond_execute)(struct i915_request *rq,
-   struct dma_fence *signal);
-
/*
 * Call when the priority on a request has changed and it and its
 * dependencies may need rescheduling. Note the request itself may
diff --git a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c 
b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
index de124870af44d..b6e2b59f133b7 100644
--- a/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
+++ b/drivers/gpu/drm/i915/gt/intel_execlists_submission.c
@@ -181,18 +181,6 @@ struct virtual_engine {
int prio;
} nodes[I915_NUM_ENGINES];
 
-   /*
-* Keep track of bonded pairs -- restrictions upon on our selection
-* of physical engines any particular request may be submitted to.
-* If we receive a submit-fence from a master engine, we will only
-* use one of sibling_mask physical engines.
-*/
-   struct ve_bond {
-   const struct intel_engine_cs *master;
-   intel_engine_mask_t sibling_mask;
-   } *bonds;
-   unsigned 

[Intel-gfx] [PATCH 07/21] drm/i915: Drop getparam support for I915_CONTEXT_PARAM_ENGINES

[Jason Ekstrand]

This has never been used by any userspace except IGT and provides no
real functionality beyond parroting back parameters userspace passed in
as part of context creation or via setparam.  If the context is in
legacy mode (where you use I915_EXEC_RENDER and friends), it returns
success with zero data so it's not useful for discovering what engines
are in the context.  It's also not a replacement for the recently
removed I915_CONTEXT_CLONE_ENGINES because it doesn't return any of the
balancing or bonding information.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 77 +
 1 file changed, 1 insertion(+), 76 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index a72c9b256723b..e8179918fa306 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1725,78 +1725,6 @@ set_engines(struct i915_gem_context *ctx,
return 0;
 }
 
-static int
-get_engines(struct i915_gem_context *ctx,
-   struct drm_i915_gem_context_param *args)
-{
-   struct i915_context_param_engines __user *user;
-   struct i915_gem_engines *e;
-   size_t n, count, size;
-   bool user_engines;
-   int err = 0;
-
-   e = __context_engines_await(ctx, _engines);
-   if (!e)
-   return -ENOENT;
-
-   if (!user_engines) {
-   i915_sw_fence_complete(>fence);
-   args->size = 0;
-   return 0;
-   }
-
-   count = e->num_engines;
-
-   /* Be paranoid in case we have an impedance mismatch */
-   if (!check_struct_size(user, engines, count, )) {
-   err = -EINVAL;
-   goto err_free;
-   }
-   if (overflows_type(size, args->size)) {
-   err = -EINVAL;
-   goto err_free;
-   }
-
-   if (!args->size) {
-   args->size = size;
-   goto err_free;
-   }
-
-   if (args->size < size) {
-   err = -EINVAL;
-   goto err_free;
-   }
-
-   user = u64_to_user_ptr(args->value);
-   if (put_user(0, >extensions)) {
-   err = -EFAULT;
-   goto err_free;
-   }
-
-   for (n = 0; n < count; n++) {
-   struct i915_engine_class_instance ci = {
-   .engine_class = I915_ENGINE_CLASS_INVALID,
-   .engine_instance = I915_ENGINE_CLASS_INVALID_NONE,
-   };
-
-   if (e->engines[n]) {
-   ci.engine_class = e->engines[n]->engine->uabi_class;
-   ci.engine_instance = 
e->engines[n]->engine->uabi_instance;
-   }
-
-   if (copy_to_user(>engines[n], , sizeof(ci))) {
-   err = -EFAULT;
-   goto err_free;
-   }
-   }
-
-   args->size = size;
-
-err_free:
-   i915_sw_fence_complete(>fence);
-   return err;
-}
-
 static int
 set_persistence(struct i915_gem_context *ctx,
const struct drm_i915_gem_context_param *args)
@@ -2127,10 +2055,6 @@ int i915_gem_context_getparam_ioctl(struct drm_device 
*dev, void *data,
ret = get_ppgtt(file_priv, ctx, args);
break;
 
-   case I915_CONTEXT_PARAM_ENGINES:
-   ret = get_engines(ctx, args);
-   break;
-
case I915_CONTEXT_PARAM_PERSISTENCE:
args->size = 0;
args->value = i915_gem_context_is_persistent(ctx);
@@ -2138,6 +2062,7 @@ int i915_gem_context_getparam_ioctl(struct drm_device 
*dev, void *data,
 
case I915_CONTEXT_PARAM_NO_ZEROMAP:
case I915_CONTEXT_PARAM_BAN_PERIOD:
+   case I915_CONTEXT_PARAM_ENGINES:
case I915_CONTEXT_PARAM_RINGSIZE:
default:
ret = -EINVAL;
-- 
2.31.1

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[Intel-gfx] [PATCH 06/21] drm/i915: Implement SINGLE_TIMELINE with a syncobj (v3)

[Jason Ekstrand]

This API is entirely unnecessary and I'd love to get rid of it.  If
userspace wants a single timeline across multiple contexts, they can
either use implicit synchronization or a syncobj, both of which existed
at the time this feature landed.  The justification given at the time
was that it would help GL drivers which are inherently single-timeline.
However, neither of our GL drivers actually wanted the feature.  i965
was already in maintenance mode at the time and iris uses syncobj for
everything.

Unfortunately, as much as I'd love to get rid of it, it is used by the
media driver so we can't do that.  We can, however, do the next-best
thing which is to embed a syncobj in the context and do exactly what
we'd expect from userspace internally.  This isn't an entirely identical
implementation because it's no longer atomic if userspace races with
itself by calling execbuffer2 twice simultaneously from different
threads.  It won't crash in that case; it just doesn't guarantee any
ordering between those two submits.

Moving SINGLE_TIMELINE to a syncobj emulation has a couple of technical
advantages beyond mere annoyance.  One is that intel_timeline is no
longer an api-visible object and can remain entirely an implementation
detail.  This may be advantageous as we make scheduler changes going
forward.  Second is that, together with deleting the CLONE_CONTEXT API,
we should now have a 1:1 mapping between intel_context and
intel_timeline which may help us reduce locking.

v2 (Jason Ekstrand):
 - Update the comment on i915_gem_context::syncobj to mention that it's
   an emulation and the possible race if userspace calls execbuffer2
   twice on the same context concurrently.
 - Wrap the checks for eb.gem_context->syncobj in unlikely()
 - Drop the dma_fence reference
 - Improved commit message

v3 (Jason Ekstrand):
 - Move the dma_fence_put() to before the error exit

Signed-off-by: Jason Ekstrand 
Cc: Maarten Lankhorst 
Cc: Matthew Brost 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 49 +--
 .../gpu/drm/i915/gem/i915_gem_context_types.h | 14 +-
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 16 ++
 3 files changed, 40 insertions(+), 39 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 2c2fefa912805..a72c9b256723b 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -67,6 +67,8 @@
 #include 
 #include 
 
+#include 
+
 #include "gt/gen6_ppgtt.h"
 #include "gt/intel_context.h"
 #include "gt/intel_context_param.h"
@@ -225,10 +227,6 @@ static void intel_context_set_gem(struct intel_context *ce,
ce->vm = vm;
}
 
-   GEM_BUG_ON(ce->timeline);
-   if (ctx->timeline)
-   ce->timeline = intel_timeline_get(ctx->timeline);
-
if (ctx->sched.priority >= I915_PRIORITY_NORMAL &&
intel_engine_has_timeslices(ce->engine))
__set_bit(CONTEXT_USE_SEMAPHORES, >flags);
@@ -351,9 +349,6 @@ void i915_gem_context_release(struct kref *ref)
mutex_destroy(>engines_mutex);
mutex_destroy(>lut_mutex);
 
-   if (ctx->timeline)
-   intel_timeline_put(ctx->timeline);
-
put_pid(ctx->pid);
mutex_destroy(>mutex);
 
@@ -570,6 +565,9 @@ static void context_close(struct i915_gem_context *ctx)
if (vm)
i915_vm_close(vm);
 
+   if (ctx->syncobj)
+   drm_syncobj_put(ctx->syncobj);
+
ctx->file_priv = ERR_PTR(-EBADF);
 
/*
@@ -765,33 +763,11 @@ static void __assign_ppgtt(struct i915_gem_context *ctx,
i915_vm_close(vm);
 }
 
-static void __set_timeline(struct intel_timeline **dst,
-  struct intel_timeline *src)
-{
-   struct intel_timeline *old = *dst;
-
-   *dst = src ? intel_timeline_get(src) : NULL;
-
-   if (old)
-   intel_timeline_put(old);
-}
-
-static void __apply_timeline(struct intel_context *ce, void *timeline)
-{
-   __set_timeline(>timeline, timeline);
-}
-
-static void __assign_timeline(struct i915_gem_context *ctx,
- struct intel_timeline *timeline)
-{
-   __set_timeline(>timeline, timeline);
-   context_apply_all(ctx, __apply_timeline, timeline);
-}
-
 static struct i915_gem_context *
 i915_gem_create_context(struct drm_i915_private *i915, unsigned int flags)
 {
struct i915_gem_context *ctx;
+   int ret;
 
if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE &&
!HAS_EXECLISTS(i915))
@@ -820,16 +796,13 @@ i915_gem_create_context(struct drm_i915_private *i915, 
unsigned int flags)
}
 
if (flags & I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE) {
-   struct intel_timeline *timeline;
-
-   timeline = intel_timeline_create(>gt);
-   if (IS_ERR(timeline)) {
+   ret = drm_syncobj_create(>syncobj,
+   

[Intel-gfx] [PATCH 03/21] drm/i915/gem: Set the watchdog timeout directly in intel_context_set_gem

[Jason Ekstrand]

Instead of handling it like a context param, unconditionally set it when
intel_contexts are created.  This doesn't fix anything but does simplify
the code a bit.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 43 +++
 .../gpu/drm/i915/gem/i915_gem_context_types.h |  4 --
 drivers/gpu/drm/i915/gt/intel_context_param.h |  3 +-
 3 files changed, 6 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 35bcdeddfbf3f..1091cc04a242a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -233,7 +233,11 @@ static void intel_context_set_gem(struct intel_context *ce,
intel_engine_has_timeslices(ce->engine))
__set_bit(CONTEXT_USE_SEMAPHORES, >flags);
 
-   intel_context_set_watchdog_us(ce, ctx->watchdog.timeout_us);
+   if (IS_ACTIVE(CONFIG_DRM_I915_REQUEST_TIMEOUT) &&
+   ctx->i915->params.request_timeout_ms) {
+   unsigned int timeout_ms = ctx->i915->params.request_timeout_ms;
+   intel_context_set_watchdog_us(ce, (u64)timeout_ms * 1000);
+   }
 }
 
 static void __free_engines(struct i915_gem_engines *e, unsigned int count)
@@ -792,41 +796,6 @@ static void __assign_timeline(struct i915_gem_context *ctx,
context_apply_all(ctx, __apply_timeline, timeline);
 }
 
-static int __apply_watchdog(struct intel_context *ce, void *timeout_us)
-{
-   return intel_context_set_watchdog_us(ce, (uintptr_t)timeout_us);
-}
-
-static int
-__set_watchdog(struct i915_gem_context *ctx, unsigned long timeout_us)
-{
-   int ret;
-
-   ret = context_apply_all(ctx, __apply_watchdog,
-   (void *)(uintptr_t)timeout_us);
-   if (!ret)
-   ctx->watchdog.timeout_us = timeout_us;
-
-   return ret;
-}
-
-static void __set_default_fence_expiry(struct i915_gem_context *ctx)
-{
-   struct drm_i915_private *i915 = ctx->i915;
-   int ret;
-
-   if (!IS_ACTIVE(CONFIG_DRM_I915_REQUEST_TIMEOUT) ||
-   !i915->params.request_timeout_ms)
-   return;
-
-   /* Default expiry for user fences. */
-   ret = __set_watchdog(ctx, i915->params.request_timeout_ms * 1000);
-   if (ret)
-   drm_notice(>drm,
-  "Failed to configure default fence expiry! (%d)",
-  ret);
-}
-
 static struct i915_gem_context *
 i915_gem_create_context(struct drm_i915_private *i915, unsigned int flags)
 {
@@ -871,8 +840,6 @@ i915_gem_create_context(struct drm_i915_private *i915, 
unsigned int flags)
intel_timeline_put(timeline);
}
 
-   __set_default_fence_expiry(ctx);
-
trace_i915_context_create(ctx);
 
return ctx;
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h 
b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index 5ae71ec936f7c..676592e27e7d2 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -153,10 +153,6 @@ struct i915_gem_context {
 */
atomic_t active_count;
 
-   struct {
-   u64 timeout_us;
-   } watchdog;
-
/**
 * @hang_timestamp: The last time(s) this context caused a GPU hang
 */
diff --git a/drivers/gpu/drm/i915/gt/intel_context_param.h 
b/drivers/gpu/drm/i915/gt/intel_context_param.h
index dffedd983693d..0c69cb42d075c 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_param.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_param.h
@@ -10,11 +10,10 @@
 
 #include "intel_context.h"
 
-static inline int
+static inline void
 intel_context_set_watchdog_us(struct intel_context *ce, u64 timeout_us)
 {
ce->watchdog.timeout_us = timeout_us;
-   return 0;
 }
 
 #endif /* INTEL_CONTEXT_PARAM_H */
-- 
2.31.1

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[Intel-gfx] [PATCH 05/21] drm/i915: Drop the CONTEXT_CLONE API

[Jason Ekstrand]

This API allows one context to grab bits out of another context upon
creation.  It can be used as a short-cut for setparam(getparam()) for
things like I915_CONTEXT_PARAM_VM.  However, it's never been used by any
real userspace.  It's used by a few IGT tests and that's it.  Since it
doesn't add any real value (most of the stuff you can CLONE you can copy
in other ways), drop it.

There is one thing that this API allows you to clone which you cannot
clone via getparam/setparam: timelines.  However, timelines are an
implementation detail of i915 and not really something that needs to be
exposed to userspace.  Also, sharing timelines between contexts isn't
obviously useful and supporting it has the potential to complicate i915
internally.  It also doesn't add any functionality that the client can't
get in other ways.  If a client really wants a shared timeline, they can
use a syncobj and set it as an in and out fence on every submit.

Signed-off-by: Jason Ekstrand 
Cc: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 199 +---
 include/uapi/drm/i915_drm.h |  16 +-
 2 files changed, 6 insertions(+), 209 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 8a77855123cec..2c2fefa912805 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1958,207 +1958,14 @@ static int create_setparam(struct i915_user_extension 
__user *ext, void *data)
return ctx_setparam(arg->fpriv, arg->ctx, );
 }
 
-static int clone_engines(struct i915_gem_context *dst,
-struct i915_gem_context *src)
+static int invalid_ext(struct i915_user_extension __user *ext, void *data)
 {
-   struct i915_gem_engines *clone, *e;
-   bool user_engines;
-   unsigned long n;
-
-   e = __context_engines_await(src, _engines);
-   if (!e)
-   return -ENOENT;
-
-   clone = alloc_engines(e->num_engines);
-   if (!clone)
-   goto err_unlock;
-
-   for (n = 0; n < e->num_engines; n++) {
-   struct intel_engine_cs *engine;
-
-   if (!e->engines[n]) {
-   clone->engines[n] = NULL;
-   continue;
-   }
-   engine = e->engines[n]->engine;
-
-   /*
-* Virtual engines are singletons; they can only exist
-* inside a single context, because they embed their
-* HW context... As each virtual context implies a single
-* timeline (each engine can only dequeue a single request
-* at any time), it would be surprising for two contexts
-* to use the same engine. So let's create a copy of
-* the virtual engine instead.
-*/
-   if (intel_engine_is_virtual(engine))
-   clone->engines[n] =
-   intel_execlists_clone_virtual(engine);
-   else
-   clone->engines[n] = intel_context_create(engine);
-   if (IS_ERR_OR_NULL(clone->engines[n])) {
-   __free_engines(clone, n);
-   goto err_unlock;
-   }
-
-   intel_context_set_gem(clone->engines[n], dst);
-   }
-   clone->num_engines = n;
-   i915_sw_fence_complete(>fence);
-
-   /* Serialised by constructor */
-   engines_idle_release(dst, rcu_replace_pointer(dst->engines, clone, 1));
-   if (user_engines)
-   i915_gem_context_set_user_engines(dst);
-   else
-   i915_gem_context_clear_user_engines(dst);
-   return 0;
-
-err_unlock:
-   i915_sw_fence_complete(>fence);
-   return -ENOMEM;
-}
-
-static int clone_flags(struct i915_gem_context *dst,
-  struct i915_gem_context *src)
-{
-   dst->user_flags = src->user_flags;
-   return 0;
-}
-
-static int clone_schedattr(struct i915_gem_context *dst,
-  struct i915_gem_context *src)
-{
-   dst->sched = src->sched;
-   return 0;
-}
-
-static int clone_sseu(struct i915_gem_context *dst,
- struct i915_gem_context *src)
-{
-   struct i915_gem_engines *e = i915_gem_context_lock_engines(src);
-   struct i915_gem_engines *clone;
-   unsigned long n;
-   int err;
-
-   /* no locking required; sole access under constructor*/
-   clone = __context_engines_static(dst);
-   if (e->num_engines != clone->num_engines) {
-   err = -EINVAL;
-   goto unlock;
-   }
-
-   for (n = 0; n < e->num_engines; n++) {
-   struct intel_context *ce = e->engines[n];
-
-   if (clone->engines[n]->engine->class != ce->engine->class) {
-   /* Must have compatible engine maps! */
-   err = -EINVAL;
-   

[Intel-gfx] [PATCH 04/21] drm/i915/gem: Return void from context_apply_all

[Jason Ekstrand]

None of the callbacks we use with it return an error code anymore; they
all return 0 unconditionally.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c | 26 +++--
 1 file changed, 8 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index 1091cc04a242a..8a77855123cec 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -718,32 +718,25 @@ __context_engines_await(const struct i915_gem_context 
*ctx,
return engines;
 }
 
-static int
+static void
 context_apply_all(struct i915_gem_context *ctx,
- int (*fn)(struct intel_context *ce, void *data),
+ void (*fn)(struct intel_context *ce, void *data),
  void *data)
 {
struct i915_gem_engines_iter it;
struct i915_gem_engines *e;
struct intel_context *ce;
-   int err = 0;
 
e = __context_engines_await(ctx, NULL);
-   for_each_gem_engine(ce, e, it) {
-   err = fn(ce, data);
-   if (err)
-   break;
-   }
+   for_each_gem_engine(ce, e, it)
+   fn(ce, data);
i915_sw_fence_complete(>fence);
-
-   return err;
 }
 
-static int __apply_ppgtt(struct intel_context *ce, void *vm)
+static void __apply_ppgtt(struct intel_context *ce, void *vm)
 {
i915_vm_put(ce->vm);
ce->vm = i915_vm_get(vm);
-   return 0;
 }
 
 static struct i915_address_space *
@@ -783,10 +776,9 @@ static void __set_timeline(struct intel_timeline **dst,
intel_timeline_put(old);
 }
 
-static int __apply_timeline(struct intel_context *ce, void *timeline)
+static void __apply_timeline(struct intel_context *ce, void *timeline)
 {
__set_timeline(>timeline, timeline);
-   return 0;
 }
 
 static void __assign_timeline(struct i915_gem_context *ctx,
@@ -1842,19 +1834,17 @@ set_persistence(struct i915_gem_context *ctx,
return __context_set_persistence(ctx, args->value);
 }
 
-static int __apply_priority(struct intel_context *ce, void *arg)
+static void __apply_priority(struct intel_context *ce, void *arg)
 {
struct i915_gem_context *ctx = arg;
 
if (!intel_engine_has_timeslices(ce->engine))
-   return 0;
+   return;
 
if (ctx->sched.priority >= I915_PRIORITY_NORMAL)
intel_context_set_use_semaphores(ce);
else
intel_context_clear_use_semaphores(ce);
-
-   return 0;
 }
 
 static int set_priority(struct i915_gem_context *ctx,
-- 
2.31.1

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[Intel-gfx] [PATCH 00/21] drm/i915/gem: ioctl clean-ups

[Jason Ekstrand]

Overview:
-

This patch series attempts to clean up some of the IOCTL mess we've created
over the last few years.  The most egregious bit being context mutability.
In summary, this series:

 1. Drops two never-used context params: RINGSIZE and NO_ZEROMAP
 2. Drops the entire CONTEXT_CLONE API
 3. Implements SINGLE_TIMELINE with a syncobj instead of actually sharing
intel_timeline between engines.
 4. Adds a few sanity restrictions to the balancing/bonding API.
 5. Implements a proto-ctx mechanism so that the engine set and VM can only
be set early on in the lifetime of a context, before anything ever
executes on it.  This effectively makes the VM and engine set
immutable.

This series has been tested with IGT as well as the Iris, ANV, and the
Intel media driver doing an 8K decode (this uses bonding/balancing).  I've
also done quite a bit of git archeology to ensure that nothing in here will
break anything that's already shipped at some point in history.  It's
possible I've missed something, but I've dug quite a bit.


Details and motivation:
---

In very broad strokes, there's an effort going on right now within Intel to
try and clean up and simplify i915 anywhere we can.  We obviously don't
want to break any shipping userspace but, as can be seen by this series,
there's a lot i915 theoretically supports which userspace doesn't actually
need.  Some of this, like the two context params used here, were simply
oversights where we went through the usual API review process and merged
the i915 bits but the userspace bits never landed for some reason.

Not all are so innocent, however.  For instance, there's an entire context
cloning API which allows one to create a context with certain parameters
"cloned" from some other context.  This entire API has never been used by
any userspace except IGT and there were never patches to any other
userspace to use it.  It never should have landed.  Also, when we added
support for setting explicit engine sets and sharing VMs across contexts,
people decided to do so via SET_CONTEXT_PARAM.  While this allowed them to
re-use existing API, it did so at the cost of making those states mutable
which leads to a plethora of potential race conditions.  There were even
IGT tests merged to cover some of theses:

 - gem_vm_create@async-destroy and gem_vm_create@destroy-race which test
   swapping out the VM on a running context.

 - gem_ctx_persistence@replace* which test whether a client can escape a
   non-persistent context by submitting a hanging batch and then swapping
   out the engine set before the hang is detected.

 - api_intel_bb@bb-with-vm which tests the that intel_bb_assign_vm works
   properly.  This API is never used by any other IGT test.

There is also an entire deferred flush and set state framework in
i915_gem_cotnext.c which exists for safely swapping out the VM while there
is work in-flight on a context.

So, clearly people knew that this API was inherently racy and difficult to
implement but they landed it anyway.  Why?  The best explanation I've been
given is because it makes the API more "unified" or "symmetric" for this
stuff to go through SET_CONTEXT_PARAM.  It's not because any userspace
actually wants to be able to swap out the VM or the set of engines on a
running context.  That would be utterly insane.

This patch series cleans up this particular mess by introducing the concept
of a i915_gem_proto_context data structure which contains context creation
information.  When you initially call GEM_CONTEXT_CREATE, a proto-context
in created instead of an actual context.  Then, the first time something is
done on the context besides SET_CONTEXT_PARAM, an actual context is
created.  This allows us to keep the old drivers which use
SET_CONTEXT_PARAM to set up the engine set (see also media) while ensuring
that, once you have an i915_gem_context, the VM and the engine set are
immutable state.

Eventually, there are more clean-ups I'd like to do on top of this which
should make working with contexts inside i915 simpler and safer:

 1. Move the GEM handle -> vma LUT from i915_gem_context into either
i915_ppgtt or drm_i915_file_private depending on whether or not the
hardware has a full PPGTT.

 2. Move the delayed context destruction code into intel_context or a
per-engine wrapper struct rather than i915_gem_context.

 3. Get rid of the separation between context close and context destroy

 4. Get rid of the RCU on i915_gem_context

However, these should probably be done as a separate patch series as this
one is already starting to get longish, especially if you consider the 89
IGT patches that go along with it.

Test-with: 20210423214853.876911-1-ja...@jlekstrand.net

Jason Ekstrand (21):
  drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE
  drm/i915: Drop I915_CONTEXT_PARAM_NO_ZEROMAP
  drm/i915/gem: Set the watchdog timeout directly in
intel_context_set_gem
  drm/i915/gem: Return void from context_apply_all
  

[Intel-gfx] [PATCH 02/21] drm/i915: Drop I915_CONTEXT_PARAM_NO_ZEROMAP

[Jason Ekstrand]

The idea behind this param is to support OpenCL drivers with relocations
because OpenCL reserves 0x0 for NULL and, if we placed memory there, it
would confuse CL kernels.  It was originally sent out as part of a patch
series including libdrm [1] and Beignet [2] support.  However, the
libdrm and Beignet patches never landed in their respective upstream
projects so this API has never been used.  It's never been used in Mesa
or any other driver, either.

Dropping this API allows us to delete a small bit of code.

[1]: https://lists.freedesktop.org/archives/intel-gfx/2015-May/067030.html
[2]: https://lists.freedesktop.org/archives/intel-gfx/2015-May/067031.html

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/gem/i915_gem_context.c  | 16 ++--
 .../gpu/drm/i915/gem/i915_gem_context_types.h|  1 -
 drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c   |  8 
 include/uapi/drm/i915_drm.h  |  4 
 4 files changed, 6 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index e52b85b8f923d..35bcdeddfbf3f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1922,15 +1922,6 @@ static int ctx_setparam(struct drm_i915_file_private 
*fpriv,
int ret = 0;
 
switch (args->param) {
-   case I915_CONTEXT_PARAM_NO_ZEROMAP:
-   if (args->size)
-   ret = -EINVAL;
-   else if (args->value)
-   set_bit(UCONTEXT_NO_ZEROMAP, >user_flags);
-   else
-   clear_bit(UCONTEXT_NO_ZEROMAP, >user_flags);
-   break;
-
case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
if (args->size)
ret = -EINVAL;
@@ -1980,6 +1971,7 @@ static int ctx_setparam(struct drm_i915_file_private 
*fpriv,
ret = set_persistence(ctx, args);
break;
 
+   case I915_CONTEXT_PARAM_NO_ZEROMAP:
case I915_CONTEXT_PARAM_BAN_PERIOD:
case I915_CONTEXT_PARAM_RINGSIZE:
default:
@@ -2360,11 +2352,6 @@ int i915_gem_context_getparam_ioctl(struct drm_device 
*dev, void *data,
return -ENOENT;
 
switch (args->param) {
-   case I915_CONTEXT_PARAM_NO_ZEROMAP:
-   args->size = 0;
-   args->value = test_bit(UCONTEXT_NO_ZEROMAP, >user_flags);
-   break;
-
case I915_CONTEXT_PARAM_GTT_SIZE:
args->size = 0;
rcu_read_lock();
@@ -2412,6 +2399,7 @@ int i915_gem_context_getparam_ioctl(struct drm_device 
*dev, void *data,
args->value = i915_gem_context_is_persistent(ctx);
break;
 
+   case I915_CONTEXT_PARAM_NO_ZEROMAP:
case I915_CONTEXT_PARAM_BAN_PERIOD:
case I915_CONTEXT_PARAM_RINGSIZE:
default:
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h 
b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
index 340473aa70de0..5ae71ec936f7c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context_types.h
@@ -129,7 +129,6 @@ struct i915_gem_context {
 * @user_flags: small set of booleans controlled by the user
 */
unsigned long user_flags;
-#define UCONTEXT_NO_ZEROMAP0
 #define UCONTEXT_NO_ERROR_CAPTURE  1
 #define UCONTEXT_BANNABLE  2
 #define UCONTEXT_RECOVERABLE   3
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 297143511f99b..b812f313422a9 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -290,7 +290,6 @@ struct i915_execbuffer {
struct intel_context *reloc_context;
 
u64 invalid_flags; /** Set of execobj.flags that are invalid */
-   u32 context_flags; /** Set of execobj.flags to insert from the ctx */
 
u64 batch_len; /** Length of batch within object */
u32 batch_start_offset; /** Location within object of batch */
@@ -541,9 +540,6 @@ eb_validate_vma(struct i915_execbuffer *eb,
entry->flags |= EXEC_OBJECT_NEEDS_GTT | 
__EXEC_OBJECT_NEEDS_MAP;
}
 
-   if (!(entry->flags & EXEC_OBJECT_PINNED))
-   entry->flags |= eb->context_flags;
-
return 0;
 }
 
@@ -750,10 +746,6 @@ static int eb_select_context(struct i915_execbuffer *eb)
if (rcu_access_pointer(ctx->vm))
eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT;
 
-   eb->context_flags = 0;
-   if (test_bit(UCONTEXT_NO_ZEROMAP, >user_flags))
-   eb->context_flags |= __EXEC_OBJECT_NEEDS_BIAS;
-
return 0;
 }
 
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 6eefbc6dec01f..a0aaa8298f28d 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ 

[Intel-gfx] [PATCH 01/21] drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE

[Jason Ekstrand]

This reverts commit 88be76cdafc7 ("drm/i915: Allow userspace to specify
ringsize on construction").  This API was originally added for OpenCL
but the compute-runtime PR has sat open for a year without action so we
can still pull it out if we want.  I argue we should drop it for three
reasons:

 1. If the compute-runtime PR has sat open for a year, this clearly
isn't that important.

 2. It's a very leaky API.  Ring size is an implementation detail of the
current execlist scheduler and really only makes sense there.  It
can't apply to the older ring-buffer scheduler on pre-execlist
hardware because that's shared across all contexts and it won't
apply to the GuC scheduler that's in the pipeline.

 3. Having userspace set a ring size in bytes is a bad solution to the
problem of having too small a ring.  There is no way that userspace
has the information to know how to properly set the ring size so
it's just going to detect the feature and always set it to the
maximum of 512K.  This is what the compute-runtime PR does.  The
scheduler in i915, on the other hand, does have the information to
make an informed choice.  It could detect if the ring size is a
problem and grow it itself.  Or, if that's too hard, we could just
increase the default size from 16K to 32K or even 64K instead of
relying on userspace to do it.

Let's drop this API for now and, if someone decides they really care
about solving this problem, they can do it properly.

Signed-off-by: Jason Ekstrand 
---
 drivers/gpu/drm/i915/Makefile |  1 -
 drivers/gpu/drm/i915/gem/i915_gem_context.c   | 85 +--
 drivers/gpu/drm/i915/gt/intel_context_param.c | 63 --
 drivers/gpu/drm/i915/gt/intel_context_param.h |  3 -
 include/uapi/drm/i915_drm.h   | 20 +
 5 files changed, 4 insertions(+), 168 deletions(-)
 delete mode 100644 drivers/gpu/drm/i915/gt/intel_context_param.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index d0d936d9137bc..afa22338fa343 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -88,7 +88,6 @@ gt-y += \
gt/gen8_ppgtt.o \
gt/intel_breadcrumbs.o \
gt/intel_context.o \
-   gt/intel_context_param.o \
gt/intel_context_sseu.o \
gt/intel_engine_cs.o \
gt/intel_engine_heartbeat.o \
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index fd8ee52e17a47..e52b85b8f923d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -1335,63 +1335,6 @@ static int set_ppgtt(struct drm_i915_file_private 
*file_priv,
return err;
 }
 
-static int __apply_ringsize(struct intel_context *ce, void *sz)
-{
-   return intel_context_set_ring_size(ce, (unsigned long)sz);
-}
-
-static int set_ringsize(struct i915_gem_context *ctx,
-   struct drm_i915_gem_context_param *args)
-{
-   if (!HAS_LOGICAL_RING_CONTEXTS(ctx->i915))
-   return -ENODEV;
-
-   if (args->size)
-   return -EINVAL;
-
-   if (!IS_ALIGNED(args->value, I915_GTT_PAGE_SIZE))
-   return -EINVAL;
-
-   if (args->value < I915_GTT_PAGE_SIZE)
-   return -EINVAL;
-
-   if (args->value > 128 * I915_GTT_PAGE_SIZE)
-   return -EINVAL;
-
-   return context_apply_all(ctx,
-__apply_ringsize,
-__intel_context_ring_size(args->value));
-}
-
-static int __get_ringsize(struct intel_context *ce, void *arg)
-{
-   long sz;
-
-   sz = intel_context_get_ring_size(ce);
-   GEM_BUG_ON(sz > INT_MAX);
-
-   return sz; /* stop on first engine */
-}
-
-static int get_ringsize(struct i915_gem_context *ctx,
-   struct drm_i915_gem_context_param *args)
-{
-   int sz;
-
-   if (!HAS_LOGICAL_RING_CONTEXTS(ctx->i915))
-   return -ENODEV;
-
-   if (args->size)
-   return -EINVAL;
-
-   sz = context_apply_all(ctx, __get_ringsize, NULL);
-   if (sz < 0)
-   return sz;
-
-   args->value = sz;
-   return 0;
-}
-
 int
 i915_gem_user_to_context_sseu(struct intel_gt *gt,
  const struct drm_i915_gem_context_param_sseu 
*user,
@@ -2037,11 +1980,8 @@ static int ctx_setparam(struct drm_i915_file_private 
*fpriv,
ret = set_persistence(ctx, args);
break;
 
-   case I915_CONTEXT_PARAM_RINGSIZE:
-   ret = set_ringsize(ctx, args);
-   break;
-
case I915_CONTEXT_PARAM_BAN_PERIOD:
+   case I915_CONTEXT_PARAM_RINGSIZE:
default:
ret = -EINVAL;
break;
@@ -2069,18 +2009,6 @@ static int create_setparam(struct i915_user_extension 
__user *ext, void *data)
return ctx_setparam(arg->fpriv, arg->ctx, );
 }
 

Re: [Intel-gfx] [Nouveau] [PATCH v4 02/17] drm/nouveau/kms/nv50-: Move AUX adapter reg to connector late register/early unregister

[Ilia Mirkin]

Some trivia, no comment on the real logic of the changes:

On Fri, Apr 23, 2021 at 2:43 PM Lyude Paul  wrote:
>
> Since AUX adapters on nouveau have their respective DRM connectors as
> parents, we need to make sure that we register then after their connectors.

then -> them

>
> Signed-off-by: Lyude Paul 
> ---
>  drivers/gpu/drm/nouveau/nouveau_connector.c | 25 -
>  1 file changed, 20 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c 
> b/drivers/gpu/drm/nouveau/nouveau_connector.c
> index 61e6d7412505..c04044be3d32 100644
> --- a/drivers/gpu/drm/nouveau/nouveau_connector.c
> +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
> @@ -401,7 +401,6 @@ nouveau_connector_destroy(struct drm_connector *connector)
> drm_connector_cleanup(connector);
> if (nv_connector->aux.transfer) {
> drm_dp_cec_unregister_connector(_connector->aux);
> -   drm_dp_aux_unregister(_connector->aux);
> kfree(nv_connector->aux.name);
> }
> kfree(connector);
> @@ -905,13 +904,29 @@ nouveau_connector_late_register(struct drm_connector 
> *connector)
> int ret;
>
> ret = nouveau_backlight_init(connector);
> +   if (ret)
> +   return ret;
>
> +   if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
> +   connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
> +   ret = drm_dp_aux_register(_connector(connector)->aux);
> +   if (ret)
> +   goto backlight_fini;
> +   }
> +
> +   return 0;
> +backlight_fini:
> +   nouveau_backlight_fini(connector);
> return ret;
>  }
>
>  static void
>  nouveau_connector_early_unregister(struct drm_connector *connector)
>  {
> +   if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
> +   connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort)
> +   drm_dp_aux_unregister(_connector(connector)->aux);
> +
> nouveau_backlight_fini(connector);
>  }
>
> @@ -1343,14 +1358,14 @@ nouveau_connector_create(struct drm_device *dev,
> snprintf(aux_name, sizeof(aux_name), "sor-%04x-%04x",
>  dcbe->hasht, dcbe->hashm);
> nv_connector->aux.name = kstrdup(aux_name, GFP_KERNEL);
> -   ret = drm_dp_aux_register(_connector->aux);
> +   drm_dp_aux_init(_connector->aux);
> if (ret) {
> -   NV_ERROR(drm, "failed to register aux channel\n");
> +   NV_ERROR(drm, "Failed to init AUX adapter for 
> sor-%04x-%04x: %d\n",

Maybe just use aux_name instead of rebuilding the string again?

> +dcbe->hasht, dcbe->hashm, ret);
> kfree(nv_connector);
> return ERR_PTR(ret);
> }
> -   funcs = _connector_funcs;
> -   break;
> +   fallthrough;
> default:
> funcs = _connector_funcs;
> break;
> --
> 2.30.2
>
> ___
> Nouveau mailing list
> nouv...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/nouveau
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp_mst: Use the correct DPCD space in Synaptics quirk

[Patchwork]

== Series Details ==

Series: drm/dp_mst: Use the correct DPCD space in Synaptics quirk
URL   : https://patchwork.freedesktop.org/series/89431/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10005 -> Patchwork_19983


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/index.html

Known issues


  Here are the changes found in Patchwork_19983 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s0:
- fi-kbl-soraka:  [PASS][1] -> [INCOMPLETE][2] ([i915#155])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10005/fi-kbl-soraka/igt@gem_exec_susp...@basic-s0.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/fi-kbl-soraka/igt@gem_exec_susp...@basic-s0.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1222]: https://gitlab.freedesktop.org/drm/intel/issues/1222
  [i915#155]: https://gitlab.freedesktop.org/drm/intel/issues/155
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3276]: https://gitlab.freedesktop.org/drm/intel/issues/3276
  [i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Participating hosts (43 -> 39)
--

  Additional (1): fi-rkl-11500t 
  Missing(5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-icl-y fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_10005 -> Patchwork_19983

  CI-20190529: 20190529
  CI_DRM_10005: 7a27cb7ac19a95d801c391044cea5274677e7744 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6074: 3f43ae9fd22dc5a517786b984dc3aa717997664f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19983: 5c141a5364cc5cef77197224cb6f4367b7c24c8d @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

5c141a5364cc drm/dp_mst: Use the correct DPCD space in Synaptics quirk

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19983/index.html
___
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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp_mst: Use the correct DPCD space in Synaptics quirk

[Patchwork]

== Series Details ==

Series: drm/dp_mst: Use the correct DPCD space in Synaptics quirk
URL   : https://patchwork.freedesktop.org/series/89431/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
5c141a5364cc drm/dp_mst: Use the correct DPCD space in Synaptics quirk
-:48: WARNING:LONG_LINE_COMMENT: line length of 125 exceeds 100 columns
#48: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:5896:
+   /* If DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is set, the 
Extended Receiver Capability field has to be used */

-:59: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#59: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:5907:
+   if (drm_dp_dpcd_read(port->mgr->aux, dpcd_caps_offset + 
DP_DOWNSTREAMPORT_PRESENT,

-:64: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#64: FILE: drivers/gpu/drm/drm_dp_mst_topology.c:5912:
+   if ((downstreamport & DP_DWN_STRM_PORT_PRESENT) &&
+  ((downstreamport & DP_DWN_STRM_PORT_TYPE_MASK)

total: 0 errors, 2 warnings, 1 checks, 43 lines checked


___
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[Intel-gfx] [PATCH] drm/dp_mst: Use the correct DPCD space in Synaptics quirk

[Nikola Cornij]

[why]
Two conditions that were part of this fix did not go through:

1. DPCD revision has to be v1.4 and up
   This was because wrong DPCD space was used to get the values

2. Downstream port must not be VGA converter
   This was because for MST the topology manager AUX has to be used,
   due to the way MST AUX reads are done.

[how]
- Use Extended Receiver Capability DPCD space if
DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is set
- Use MST topology manager AUX to get port DPCD

Signed-off-by: Nikola Cornij 
---
 drivers/gpu/drm/drm_dp_mst_topology.c | 33 ---
 1 file changed, 25 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c 
b/drivers/gpu/drm/drm_dp_mst_topology.c
index de5124ce42cb..69fd16ce2cb3 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -5878,18 +5878,35 @@ struct drm_dp_aux *drm_dp_mst_dsc_aux_for_port(struct 
drm_dp_mst_port *port)
return NULL;
 
if (drm_dp_has_quirk(, DP_DPCD_QUIRK_DSC_WITHOUT_VIRTUAL_DPCD) &&
-   port->mgr->dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14 &&
port->parent == port->mgr->mst_primary) {
-   u8 downstreamport;
+   u8 training_aux_rd_interval = 0;
+   u8 dpcd_rev = 0;
+   unsigned int dpcd_caps_offset = 0;
 
-   if (drm_dp_dpcd_read(>aux, DP_DOWNSTREAMPORT_PRESENT,
-, 1) < 0)
+   if (drm_dp_dpcd_read(port->mgr->aux, 
DP_TRAINING_AUX_RD_INTERVAL,
+_aux_rd_interval, 1) < 1)
return NULL;
 
-   if ((downstreamport & DP_DWN_STRM_PORT_PRESENT) &&
-  ((downstreamport & DP_DWN_STRM_PORT_TYPE_MASK)
-!= DP_DWN_STRM_PORT_TYPE_ANALOG))
-   return port->mgr->aux;
+   /* If DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT is set, the 
Extended Receiver Capability field has to be used */
+   if (training_aux_rd_interval & 
DP_EXTENDED_RECEIVER_CAP_FIELD_PRESENT)
+   dpcd_caps_offset = 0x02200;
+
+   if (drm_dp_dpcd_read(port->mgr->aux, dpcd_caps_offset + 
DP_DPCD_REV,
+_rev, 1) < 1)
+   return NULL;
+
+   if (dpcd_rev >= DP_DPCD_REV_14) {
+   u8 downstreamport = 0;
+
+   if (drm_dp_dpcd_read(port->mgr->aux, dpcd_caps_offset + 
DP_DOWNSTREAMPORT_PRESENT,
+, 1) < 1)
+   return NULL;
+
+   if ((downstreamport & DP_DWN_STRM_PORT_PRESENT) &&
+  ((downstreamport & DP_DWN_STRM_PORT_TYPE_MASK)
+!= DP_DWN_STRM_PORT_TYPE_ANALOG))
+   return port->mgr->aux;
+   }
}
 
/*
-- 
2.25.1

___
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev7)

[Patchwork]

== Series Details ==

Series: drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev7)
URL   : https://patchwork.freedesktop.org/series/87242/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10005 -> Patchwork_19982


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/index.html

Known issues


  Here are the changes found in Patchwork_19982 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@runner@aborted:
- fi-bdw-5557u:   NOTRUN -> [FAIL][1] ([i915#1602] / [i915#2029])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/fi-bdw-5557u/igt@run...@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
  [i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3276]: https://gitlab.freedesktop.org/drm/intel/issues/3276
  [i915#3277]: https://gitlab.freedesktop.org/drm/intel/issues/3277
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3283]: https://gitlab.freedesktop.org/drm/intel/issues/3283
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Participating hosts (43 -> 39)
--

  Additional (1): fi-rkl-11500t 
  Missing(5): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan 
fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_10005 -> Patchwork_19982

  CI-20190529: 20190529
  CI_DRM_10005: 7a27cb7ac19a95d801c391044cea5274677e7744 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6074: 3f43ae9fd22dc5a517786b984dc3aa717997664f @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19982: a090abb4f62f79de95039e5953813c91944ea667 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

a090abb4f62f drm/dp_mst: Convert drm_dp_mst_topology.c to drm_err()/drm_dbg*()
ca7da68d794d drm/dp_dual_mode: Convert drm_dp_dual_mode_helper.c to using 
drm_err/drm_dbg_kms()
793080602202 drm/dp: Convert drm_dp_helper.c to using drm_err/drm_dbg_*()
d00493c9e9d3 drm/print: Handle potentially NULL drm_devices in drm_dbg_*
4eb5d5051d28 drm/dp_mst: Pass drm_dp_mst_topology_mgr to 
drm_dp_get_vc_payload_bw()
92a042cc3107 drm/dp_dual_mode: Pass drm_device to drm_lspcon_(get|set)_mode()
e3c71d7763fc drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_get_tmds_output()
0824283ce661 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_max_tmds_clock()
780ab29868d5 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_set_tmds_output()
ba18aefd2372 drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_detect()
ec9a3dd1af61 drm/dp: Always print aux channel name in logs
5eec900104fb drm/dp: Pass drm_dp_aux to drm_dp*_link_train_channel_eq_delay()
4afbe03f74bd drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()
20eaf286aee6 drm/dp: Clarify DP AUX registration time
9fd492eba1f4 drm/dp: Add backpointer to drm_device in drm_dp_aux
cb595a8161ed drm/nouveau/kms/nv50-: Move AUX adapter reg to connector late 
register/early unregister
52998af1e7bf drm/bridge/cdns-mhdp8546: Register DP aux channel with userspace

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19982/index.html
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[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev7)

[Patchwork]

== Series Details ==

Series: drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev7)
URL   : https://patchwork.freedesktop.org/series/87242/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"
+./drivers/gpu/drm/amd/amdgpu/../amdgpu/amdgv_sriovmsg.h:270:49: error: static 
assertion failed: "amd_sriov_msg_vf2pf_info must be 1 KB"

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev7)

[Patchwork]

== Series Details ==

Series: drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers (rev7)
URL   : https://patchwork.freedesktop.org/series/87242/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
52998af1e7bf drm/bridge/cdns-mhdp8546: Register DP aux channel with userspace
cb595a8161ed drm/nouveau/kms/nv50-: Move AUX adapter reg to connector late 
register/early unregister
9fd492eba1f4 drm/dp: Add backpointer to drm_device in drm_dp_aux
20eaf286aee6 drm/dp: Clarify DP AUX registration time
4afbe03f74bd drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()
5eec900104fb drm/dp: Pass drm_dp_aux to drm_dp*_link_train_channel_eq_delay()
ec9a3dd1af61 drm/dp: Always print aux channel name in logs
ba18aefd2372 drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_detect()
780ab29868d5 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_set_tmds_output()
0824283ce661 drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_max_tmds_clock()
e3c71d7763fc drm/dp_dual_mode: Pass drm_device to 
drm_dp_dual_mode_get_tmds_output()
92a042cc3107 drm/dp_dual_mode: Pass drm_device to drm_lspcon_(get|set)_mode()
4eb5d5051d28 drm/dp_mst: Pass drm_dp_mst_topology_mgr to 
drm_dp_get_vc_payload_bw()
-:56: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#56: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:74:
+  
crtc_state->port_clock,

total: 0 errors, 1 warnings, 0 checks, 43 lines checked
d00493c9e9d3 drm/print: Handle potentially NULL drm_devices in drm_dbg_*
793080602202 drm/dp: Convert drm_dp_helper.c to using drm_err/drm_dbg_*()
ca7da68d794d drm/dp_dual_mode: Convert drm_dp_dual_mode_helper.c to using 
drm_err/drm_dbg_kms()
a090abb4f62f drm/dp_mst: Convert drm_dp_mst_topology.c to drm_err()/drm_dbg*()


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[Intel-gfx] [PATCH v4 17/17] drm/dp_mst: Convert drm_dp_mst_topology.c to drm_err()/drm_dbg*()

[Lyude Paul]

And finally, convert all of the code in drm_dp_mst_topology.c over to using
drm_err() and drm_dbg*(). Note that this refactor would have been a lot
more complicated to have tried writing a coccinelle script for, so this
whole thing was done by hand.

v2:
* Fix line-wrapping in drm_dp_mst_atomic_check_mstb_bw_limit()

Signed-off-by: Lyude Paul 
Cc: Robert Foss 
Reviewed-by: Robert Foss 
---
 drivers/gpu/drm/drm_dp_mst_topology.c | 368 +-
 1 file changed, 187 insertions(+), 181 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c 
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 9bac5bd050ab..5539a91b4031 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -286,7 +286,8 @@ static void drm_dp_encode_sideband_msg_hdr(struct 
drm_dp_sideband_msg_hdr *hdr,
*len = idx;
 }
 
-static bool drm_dp_decode_sideband_msg_hdr(struct drm_dp_sideband_msg_hdr *hdr,
+static bool drm_dp_decode_sideband_msg_hdr(const struct 
drm_dp_mst_topology_mgr *mgr,
+  struct drm_dp_sideband_msg_hdr *hdr,
   u8 *buf, int buflen, u8 *hdrlen)
 {
u8 crc4;
@@ -303,7 +304,7 @@ static bool drm_dp_decode_sideband_msg_hdr(struct 
drm_dp_sideband_msg_hdr *hdr,
crc4 = drm_dp_msg_header_crc4(buf, (len * 2) - 1);
 
if ((crc4 & 0xf) != (buf[len - 1] & 0xf)) {
-   DRM_DEBUG_KMS("crc4 mismatch 0x%x 0x%x\n", crc4, buf[len - 1]);
+   drm_dbg_kms(mgr->dev, "crc4 mismatch 0x%x 0x%x\n", crc4, 
buf[len - 1]);
return false;
}
 
@@ -789,7 +790,8 @@ static bool drm_dp_sideband_append_payload(struct 
drm_dp_sideband_msg_rx *msg,
return true;
 }
 
-static bool drm_dp_sideband_parse_link_address(struct drm_dp_sideband_msg_rx 
*raw,
+static bool drm_dp_sideband_parse_link_address(const struct 
drm_dp_mst_topology_mgr *mgr,
+  struct drm_dp_sideband_msg_rx 
*raw,
   struct 
drm_dp_sideband_msg_reply_body *repmsg)
 {
int idx = 1;
@@ -1014,7 +1016,8 @@ drm_dp_sideband_parse_query_stream_enc_status(
return true;
 }
 
-static bool drm_dp_sideband_parse_reply(struct drm_dp_sideband_msg_rx *raw,
+static bool drm_dp_sideband_parse_reply(const struct drm_dp_mst_topology_mgr 
*mgr,
+   struct drm_dp_sideband_msg_rx *raw,
struct drm_dp_sideband_msg_reply_body 
*msg)
 {
memset(msg, 0, sizeof(*msg));
@@ -1030,7 +1033,7 @@ static bool drm_dp_sideband_parse_reply(struct 
drm_dp_sideband_msg_rx *raw,
 
switch (msg->req_type) {
case DP_LINK_ADDRESS:
-   return drm_dp_sideband_parse_link_address(raw, msg);
+   return drm_dp_sideband_parse_link_address(mgr, raw, msg);
case DP_QUERY_PAYLOAD:
return drm_dp_sideband_parse_query_payload_ack(raw, msg);
case DP_REMOTE_DPCD_READ:
@@ -1053,14 +1056,16 @@ static bool drm_dp_sideband_parse_reply(struct 
drm_dp_sideband_msg_rx *raw,
case DP_QUERY_STREAM_ENC_STATUS:
return drm_dp_sideband_parse_query_stream_enc_status(raw, msg);
default:
-   DRM_ERROR("Got unknown reply 0x%02x (%s)\n", msg->req_type,
- drm_dp_mst_req_type_str(msg->req_type));
+   drm_err(mgr->dev, "Got unknown reply 0x%02x (%s)\n",
+   msg->req_type, drm_dp_mst_req_type_str(msg->req_type));
return false;
}
 }
 
-static bool drm_dp_sideband_parse_connection_status_notify(struct 
drm_dp_sideband_msg_rx *raw,
-  struct 
drm_dp_sideband_msg_req_body *msg)
+static bool
+drm_dp_sideband_parse_connection_status_notify(const struct 
drm_dp_mst_topology_mgr *mgr,
+  struct drm_dp_sideband_msg_rx 
*raw,
+  struct 
drm_dp_sideband_msg_req_body *msg)
 {
int idx = 1;
 
@@ -1082,12 +1087,14 @@ static bool 
drm_dp_sideband_parse_connection_status_notify(struct drm_dp_sideban
idx++;
return true;
 fail_len:
-   DRM_DEBUG_KMS("connection status reply parse length fail %d %d\n", idx, 
raw->curlen);
+   drm_dbg_kms(mgr->dev, "connection status reply parse length fail %d 
%d\n",
+   idx, raw->curlen);
return false;
 }
 
-static bool drm_dp_sideband_parse_resource_status_notify(struct 
drm_dp_sideband_msg_rx *raw,
-  struct 
drm_dp_sideband_msg_req_body *msg)
+static bool drm_dp_sideband_parse_resource_status_notify(const struct 
drm_dp_mst_topology_mgr *mgr,
+struct 
drm_dp_sideband_msg_rx *raw,
+struct 

[Intel-gfx] [PATCH v4 14/17] drm/print: Handle potentially NULL drm_devices in drm_dbg_*

[Lyude Paul]

While this shouldn't really be something that happens all that often, since
we're going to be using the drm_dbg_* log helpers in DRM helpers it's
technically possible that a driver could use an AUX adapter before it's
been associated with it's respective drm_device. While drivers should take
care to avoid this, there's likely going to be situations where it's
difficult to workaround. And since other logging helpers in the kernel tend
to be OK with NULL pointers (for instance, passing a NULL pointer to a "%s"
argument for a printk-like function in the kernel doesn't break anything),
we should do the same for ours.

Signed-off-by: Lyude Paul 
---
 include/drm/drm_print.h | 20 ++--
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
index a3c58c941bdc..9b66be54dd16 100644
--- a/include/drm/drm_print.h
+++ b/include/drm/drm_print.h
@@ -443,25 +443,25 @@ void drm_dev_dbg(const struct device *dev, enum 
drm_debug_category category,
 
 
 #define drm_dbg_core(drm, fmt, ...)\
-   drm_dev_dbg((drm)->dev, DRM_UT_CORE, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_CORE, fmt, ##__VA_ARGS__)
 #define drm_dbg(drm, fmt, ...) \
-   drm_dev_dbg((drm)->dev, DRM_UT_DRIVER, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_DRIVER, fmt, 
##__VA_ARGS__)
 #define drm_dbg_kms(drm, fmt, ...) \
-   drm_dev_dbg((drm)->dev, DRM_UT_KMS, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_KMS, fmt, ##__VA_ARGS__)
 #define drm_dbg_prime(drm, fmt, ...)   \
-   drm_dev_dbg((drm)->dev, DRM_UT_PRIME, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_PRIME, fmt, ##__VA_ARGS__)
 #define drm_dbg_atomic(drm, fmt, ...)  \
-   drm_dev_dbg((drm)->dev, DRM_UT_ATOMIC, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_ATOMIC, fmt, 
##__VA_ARGS__)
 #define drm_dbg_vbl(drm, fmt, ...) \
-   drm_dev_dbg((drm)->dev, DRM_UT_VBL, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_VBL, fmt, ##__VA_ARGS__)
 #define drm_dbg_state(drm, fmt, ...)   \
-   drm_dev_dbg((drm)->dev, DRM_UT_STATE, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_STATE, fmt, ##__VA_ARGS__)
 #define drm_dbg_lease(drm, fmt, ...)   \
-   drm_dev_dbg((drm)->dev, DRM_UT_LEASE, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_LEASE, fmt, ##__VA_ARGS__)
 #define drm_dbg_dp(drm, fmt, ...)  \
-   drm_dev_dbg((drm)->dev, DRM_UT_DP, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_DP, fmt, ##__VA_ARGS__)
 #define drm_dbg_drmres(drm, fmt, ...)  \
-   drm_dev_dbg((drm)->dev, DRM_UT_DRMRES, fmt, ##__VA_ARGS__)
+   drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_DRMRES, fmt, 
##__VA_ARGS__)
 
 
 /*
-- 
2.30.2

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[Intel-gfx] [PATCH v4 16/17] drm/dp_dual_mode: Convert drm_dp_dual_mode_helper.c to using drm_err/drm_dbg_kms()

[Lyude Paul]

Next step in the conversion, move everything in drm_dp_dual_mode_helper.c
over to using drm_err() and drm_dbg_kms(). This was done using the
following cocci script:

  @@
  expression list expr;
  @@

  (
  - DRM_DEBUG_KMS(expr);
  + drm_dbg_kms(dev, expr);
  |
  - DRM_ERROR(expr);
  + drm_err(dev, expr);
  )

And correcting the indentation of the resulting code by hand.

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/drm_dp_dual_mode_helper.c | 45 +++
 1 file changed, 21 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_dual_mode_helper.c 
b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
index dbf9b1fdec63..9faf49354cab 100644
--- a/drivers/gpu/drm/drm_dp_dual_mode_helper.c
+++ b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 
+#include 
 #include 
 #include 
 
@@ -202,8 +203,8 @@ enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(const 
struct drm_device *dev,
 */
ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_HDMI_ID,
hdmi_id, sizeof(hdmi_id));
-   DRM_DEBUG_KMS("DP dual mode HDMI ID: %*pE (err %zd)\n",
- ret ? 0 : (int)sizeof(hdmi_id), hdmi_id, ret);
+   drm_dbg_kms(dev, "DP dual mode HDMI ID: %*pE (err %zd)\n",
+   ret ? 0 : (int)sizeof(hdmi_id), hdmi_id, ret);
if (ret)
return DRM_DP_DUAL_MODE_UNKNOWN;
 
@@ -221,8 +222,7 @@ enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(const 
struct drm_device *dev,
 */
ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_ADAPTOR_ID,
_id, sizeof(adaptor_id));
-   DRM_DEBUG_KMS("DP dual mode adaptor ID: %02x (err %zd)\n",
- adaptor_id, ret);
+   drm_dbg_kms(dev, "DP dual mode adaptor ID: %02x (err %zd)\n", 
adaptor_id, ret);
if (ret == 0) {
if (is_lspcon_adaptor(hdmi_id, adaptor_id))
return DRM_DP_DUAL_MODE_LSPCON;
@@ -238,8 +238,7 @@ enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(const 
struct drm_device *dev,
 * that we may have misdetected the type.
 */
if (!is_type1_adaptor(adaptor_id) && adaptor_id != hdmi_id[0])
-   DRM_ERROR("Unexpected DP dual mode adaptor ID %02x\n",
- adaptor_id);
+   drm_err(dev, "Unexpected DP dual mode adaptor ID 
%02x\n", adaptor_id);
 
}
 
@@ -286,7 +285,7 @@ int drm_dp_dual_mode_max_tmds_clock(const struct drm_device 
*dev, enum drm_dp_du
ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_MAX_TMDS_CLOCK,
_tmds_clock, sizeof(max_tmds_clock));
if (ret || max_tmds_clock == 0x00 || max_tmds_clock == 0xff) {
-   DRM_DEBUG_KMS("Failed to query max TMDS clock\n");
+   drm_dbg_kms(dev, "Failed to query max TMDS clock\n");
return 165000;
}
 
@@ -326,7 +325,7 @@ int drm_dp_dual_mode_get_tmds_output(const struct 
drm_device *dev,
ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_TMDS_OEN,
_oen, sizeof(tmds_oen));
if (ret) {
-   DRM_DEBUG_KMS("Failed to query state of TMDS output buffers\n");
+   drm_dbg_kms(dev, "Failed to query state of TMDS output 
buffers\n");
return ret;
}
 
@@ -372,18 +371,17 @@ int drm_dp_dual_mode_set_tmds_output(const struct 
drm_device *dev, enum drm_dp_d
ret = drm_dp_dual_mode_write(adapter, DP_DUAL_MODE_TMDS_OEN,
 _oen, sizeof(tmds_oen));
if (ret) {
-   DRM_DEBUG_KMS("Failed to %s TMDS output buffers (%d 
attempts)\n",
- enable ? "enable" : "disable",
- retry + 1);
+   drm_dbg_kms(dev, "Failed to %s TMDS output buffers (%d 
attempts)\n",
+   enable ? "enable" : "disable", retry + 1);
return ret;
}
 
ret = drm_dp_dual_mode_read(adapter, DP_DUAL_MODE_TMDS_OEN,
, sizeof(tmp));
if (ret) {
-   DRM_DEBUG_KMS("I2C read failed during TMDS output 
buffer %s (%d attempts)\n",
- enable ? "enabling" : "disabling",
- retry + 1);
+   drm_dbg_kms(dev,
+   "I2C read failed during TMDS output buffer 
%s (%d attempts)\n",
+   enable ? "enabling" : "disabling", retry + 
1);
return ret;
}
 
@@ -391,8 +389,8 @@ int drm_dp_dual_mode_set_tmds_output(const struct 
drm_device *dev, enum drm_dp_d
return 0;
}
 
-   

[Intel-gfx] [PATCH v4 13/17] drm/dp_mst: Pass drm_dp_mst_topology_mgr to drm_dp_get_vc_payload_bw()

[Lyude Paul]

Since this is one of the few functions in drm_dp_mst_topology.c that
doesn't have any way of getting access to a drm_device, let's pass the
drm_dp_mst_topology_mgr down to this function so that it can use
drm_dbg_kms().

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/drm_dp_mst_topology.c   | 7 +--
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 3 ++-
 include/drm/drm_dp_mst_helper.h | 3 ++-
 3 files changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c 
b/drivers/gpu/drm/drm_dp_mst_topology.c
index 276f7f054d62..9bac5bd050ab 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -3638,6 +3638,7 @@ static int drm_dp_send_up_ack_reply(struct 
drm_dp_mst_topology_mgr *mgr,
 
 /**
  * drm_dp_get_vc_payload_bw - get the VC payload BW for an MST link
+ * @mgr: The _dp_mst_topology_mgr to use
  * @link_rate: link rate in 10kbits/s units
  * @link_lane_count: lane count
  *
@@ -3646,7 +3647,8 @@ static int drm_dp_send_up_ack_reply(struct 
drm_dp_mst_topology_mgr *mgr,
  * convert the number of PBNs required for a given stream to the number of
  * timeslots this stream requires in each MTP.
  */
-int drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count)
+int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
+int link_rate, int link_lane_count)
 {
if (link_rate == 0 || link_lane_count == 0)
DRM_DEBUG_KMS("invalid link rate/lane count: (%d / %d)\n",
@@ -3711,7 +3713,8 @@ int drm_dp_mst_topology_mgr_set_mst(struct 
drm_dp_mst_topology_mgr *mgr, bool ms
goto out_unlock;
}
 
-   mgr->pbn_div = 
drm_dp_get_vc_payload_bw(drm_dp_bw_code_to_link_rate(mgr->dpcd[1]),
+   mgr->pbn_div = drm_dp_get_vc_payload_bw(mgr,
+   
drm_dp_bw_code_to_link_rate(mgr->dpcd[1]),
mgr->dpcd[2] & 
DP_MAX_LANE_COUNT_MASK);
if (mgr->pbn_div == 0) {
ret = -EINVAL;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 180f97cd74cb..eb04b3cefda2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -70,7 +70,8 @@ static int intel_dp_mst_compute_link_config(struct 
intel_encoder *encoder,
slots = drm_dp_atomic_find_vcpi_slots(state, _dp->mst_mgr,
  connector->port,
  crtc_state->pbn,
- 
drm_dp_get_vc_payload_bw(crtc_state->port_clock,
+ 
drm_dp_get_vc_payload_bw(_dp->mst_mgr,
+  
crtc_state->port_clock,
   
crtc_state->lane_count));
if (slots == -EDEADLK)
return slots;
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index bd1c39907b92..20dc705642bd 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -783,7 +783,8 @@ drm_dp_mst_detect_port(struct drm_connector *connector,
 
 struct edid *drm_dp_mst_get_edid(struct drm_connector *connector, struct 
drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port);
 
-int drm_dp_get_vc_payload_bw(int link_rate, int link_lane_count);
+int drm_dp_get_vc_payload_bw(const struct drm_dp_mst_topology_mgr *mgr,
+int link_rate, int link_lane_count);
 
 int drm_dp_calc_pbn_mode(int clock, int bpp, bool dsc);
 
-- 
2.30.2

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[Intel-gfx] [PATCH v4 15/17] drm/dp: Convert drm_dp_helper.c to using drm_err/drm_dbg_*()

[Lyude Paul]

Now that we've added a back-pointer to drm_device to drm_dp_aux, made
drm_dp_aux available to any functions in drm_dp_helper.c which need to
print to the kernel log, and ensured all of our logging uses a consistent
format, let's do the final step of the conversion and actually move
everything over to using drm_err() and drm_dbg_*().

This was done by using the following cocci script:

  @@
  expression list expr;
  @@

  (
  - DRM_DEBUG_KMS(expr);
  + drm_dbg_kms(aux->drm_dev, expr);
  |
  - DRM_DEBUG_DP(expr);
  + drm_dbg_dp(aux->drm_dev, expr);
  |
  - DRM_DEBUG_ATOMIC(expr);
  + drm_dbg_atomic(aux->drm_dev, expr);
  |
  - DRM_DEBUG_KMS_RATELIMITED(expr);
  + drm_dbg_kms_ratelimited(aux->drm_dev, expr);
  |
  - DRM_ERROR(expr);
  + drm_err(aux->drm_dev, expr);
  )

Followed by correcting the resulting line-wrapping in the results by hand.

v2:
* Fix indenting in drm_dp_dump_access

Signed-off-by: Lyude Paul 
Cc: Robert Foss 
Reviewed-by: Robert Foss 
---
 drivers/gpu/drm/drm_dp_helper.c | 121 
 1 file changed, 59 insertions(+), 62 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index b50e572b544d..cb56d74e9d38 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -139,8 +139,8 @@ void drm_dp_link_train_clock_recovery_delay(const struct 
drm_dp_aux *aux,
 DP_TRAINING_AUX_RD_MASK;
 
if (rd_interval > 4)
-   DRM_DEBUG_KMS("%s: AUX interval %lu, out of range (max 4)\n",
- aux->name, rd_interval);
+   drm_dbg_kms(aux->drm_dev, "%s: AUX interval %lu, out of range 
(max 4)\n",
+   aux->name, rd_interval);
 
if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14)
rd_interval = 100;
@@ -155,8 +155,8 @@ static void __drm_dp_link_train_channel_eq_delay(const 
struct drm_dp_aux *aux,
 unsigned long rd_interval)
 {
if (rd_interval > 4)
-   DRM_DEBUG_KMS("%s: AUX interval %lu, out of range (max 4)\n",
- aux->name, rd_interval);
+   drm_dbg_kms(aux->drm_dev, "%s: AUX interval %lu, out of range 
(max 4)\n",
+   aux->name, rd_interval);
 
if (rd_interval == 0)
rd_interval = 400;
@@ -220,11 +220,11 @@ drm_dp_dump_access(const struct drm_dp_aux *aux,
const char *arrow = request == DP_AUX_NATIVE_READ ? "->" : "<-";
 
if (ret > 0)
-   DRM_DEBUG_DP("%s: 0x%05x AUX %s (ret=%3d) %*ph\n",
-aux->name, offset, arrow, ret, min(ret, 20), 
buffer);
+   drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d) %*ph\n",
+  aux->name, offset, arrow, ret, min(ret, 20), buffer);
else
-   DRM_DEBUG_DP("%s: 0x%05x AUX %s (ret=%3d)\n",
-aux->name, offset, arrow, ret);
+   drm_dbg_dp(aux->drm_dev, "%s: 0x%05x AUX %s (ret=%3d)\n",
+  aux->name, offset, arrow, ret);
 }
 
 /**
@@ -287,8 +287,8 @@ static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 
request,
err = ret;
}
 
-   DRM_DEBUG_KMS("%s: Too many retries, giving up. First error: %d\n",
- aux->name, err);
+   drm_dbg_kms(aux->drm_dev, "%s: Too many retries, giving up. First 
error: %d\n",
+   aux->name, err);
ret = err;
 
 unlock:
@@ -524,44 +524,44 @@ bool drm_dp_send_real_edid_checksum(struct drm_dp_aux 
*aux,
 
if (drm_dp_dpcd_read(aux, DP_DEVICE_SERVICE_IRQ_VECTOR,
 _test_req, 1) < 1) {
-   DRM_ERROR("%s: DPCD failed read at register 0x%x\n",
- aux->name, DP_DEVICE_SERVICE_IRQ_VECTOR);
+   drm_err(aux->drm_dev, "%s: DPCD failed read at register 0x%x\n",
+   aux->name, DP_DEVICE_SERVICE_IRQ_VECTOR);
return false;
}
auto_test_req &= DP_AUTOMATED_TEST_REQUEST;
 
if (drm_dp_dpcd_read(aux, DP_TEST_REQUEST, _edid_read, 1) < 1) {
-   DRM_ERROR("%s: DPCD failed read at register 0x%x\n",
- aux->name, DP_TEST_REQUEST);
+   drm_err(aux->drm_dev, "%s: DPCD failed read at register 0x%x\n",
+   aux->name, DP_TEST_REQUEST);
return false;
}
link_edid_read &= DP_TEST_LINK_EDID_READ;
 
if (!auto_test_req || !link_edid_read) {
-   DRM_DEBUG_KMS("%s: Source DUT does not support 
TEST_EDID_READ\n",
- aux->name);
+   drm_dbg_kms(aux->drm_dev, "%s: Source DUT does not support 
TEST_EDID_READ\n",
+   aux->name);
return false;
}
 
if (drm_dp_dpcd_write(aux, DP_DEVICE_SERVICE_IRQ_VECTOR,

[Intel-gfx] [PATCH v4 10/17] drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_max_tmds_clock()

[Lyude Paul]

Another function we need to pass drm_device down to in order to start using
drm_dbg_*().

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/drm_dp_dual_mode_helper.c | 3 ++-
 drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
 include/drm/drm_dp_dual_mode_helper.h | 2 +-
 3 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_dual_mode_helper.c 
b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
index a63d7de85309..4a26b3e1f78f 100644
--- a/drivers/gpu/drm/drm_dp_dual_mode_helper.c
+++ b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
@@ -252,6 +252,7 @@ EXPORT_SYMBOL(drm_dp_dual_mode_detect);
 
 /**
  * drm_dp_dual_mode_max_tmds_clock - Max TMDS clock for DP dual mode adaptor
+ * @dev: _device to use
  * @type: DP dual mode adaptor type
  * @adapter: I2C adapter for the DDC bus
  *
@@ -265,7 +266,7 @@ EXPORT_SYMBOL(drm_dp_dual_mode_detect);
  * Returns:
  * Maximum supported TMDS clock rate for the DP dual mode adaptor in kHz.
  */
-int drm_dp_dual_mode_max_tmds_clock(enum drm_dp_dual_mode_type type,
+int drm_dp_dual_mode_max_tmds_clock(const struct drm_device *dev, enum 
drm_dp_dual_mode_type type,
struct i2c_adapter *adapter)
 {
uint8_t max_tmds_clock;
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c 
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index fc3e7a9396b5..46de56af33db 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2256,7 +2256,7 @@ intel_hdmi_dp_dual_mode_detect(struct drm_connector 
*connector, bool has_edid)
 
hdmi->dp_dual_mode.type = type;
hdmi->dp_dual_mode.max_tmds_clock =
-   drm_dp_dual_mode_max_tmds_clock(type, adapter);
+   drm_dp_dual_mode_max_tmds_clock(_priv->drm, type, adapter);
 
drm_dbg_kms(_priv->drm,
"DP dual mode adaptor (%s) detected (max TMDS clock: %d 
kHz)\n",
diff --git a/include/drm/drm_dp_dual_mode_helper.h 
b/include/drm/drm_dp_dual_mode_helper.h
index 8cb0dcd98a99..aabf9c951380 100644
--- a/include/drm/drm_dp_dual_mode_helper.h
+++ b/include/drm/drm_dp_dual_mode_helper.h
@@ -106,7 +106,7 @@ enum drm_dp_dual_mode_type {
 
 enum drm_dp_dual_mode_type
 drm_dp_dual_mode_detect(const struct drm_device *dev, struct i2c_adapter 
*adapter);
-int drm_dp_dual_mode_max_tmds_clock(enum drm_dp_dual_mode_type type,
+int drm_dp_dual_mode_max_tmds_clock(const struct drm_device *dev, enum 
drm_dp_dual_mode_type type,
struct i2c_adapter *adapter);
 int drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type,
 struct i2c_adapter *adapter, bool 
*enabled);
-- 
2.30.2

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[Intel-gfx] [PATCH v4 11/17] drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_get_tmds_output()

[Lyude Paul]

Another function to pass drm_device * down to so we can start using the
drm_dbg_*() in the DRM DP helpers.

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/drm_dp_dual_mode_helper.c | 5 +++--
 include/drm/drm_dp_dual_mode_helper.h | 2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_dual_mode_helper.c 
b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
index 4a26b3e1f78f..c9c2952bcad2 100644
--- a/drivers/gpu/drm/drm_dp_dual_mode_helper.c
+++ b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
@@ -296,6 +296,7 @@ EXPORT_SYMBOL(drm_dp_dual_mode_max_tmds_clock);
 
 /**
  * drm_dp_dual_mode_get_tmds_output - Get the state of the TMDS output buffers 
in the DP dual mode adaptor
+ * @dev: _device to use
  * @type: DP dual mode adaptor type
  * @adapter: I2C adapter for the DDC bus
  * @enabled: current state of the TMDS output buffers
@@ -310,8 +311,8 @@ EXPORT_SYMBOL(drm_dp_dual_mode_max_tmds_clock);
  * Returns:
  * 0 on success, negative error code on failure
  */
-int drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type,
-struct i2c_adapter *adapter,
+int drm_dp_dual_mode_get_tmds_output(const struct drm_device *dev,
+enum drm_dp_dual_mode_type type, struct 
i2c_adapter *adapter,
 bool *enabled)
 {
uint8_t tmds_oen;
diff --git a/include/drm/drm_dp_dual_mode_helper.h 
b/include/drm/drm_dp_dual_mode_helper.h
index aabf9c951380..01eec9ff5962 100644
--- a/include/drm/drm_dp_dual_mode_helper.h
+++ b/include/drm/drm_dp_dual_mode_helper.h
@@ -108,7 +108,7 @@ enum drm_dp_dual_mode_type
 drm_dp_dual_mode_detect(const struct drm_device *dev, struct i2c_adapter 
*adapter);
 int drm_dp_dual_mode_max_tmds_clock(const struct drm_device *dev, enum 
drm_dp_dual_mode_type type,
struct i2c_adapter *adapter);
-int drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type,
+int drm_dp_dual_mode_get_tmds_output(const struct drm_device *dev, enum 
drm_dp_dual_mode_type type,
 struct i2c_adapter *adapter, bool 
*enabled);
 int drm_dp_dual_mode_set_tmds_output(const struct drm_device *dev, enum 
drm_dp_dual_mode_type type,
 struct i2c_adapter *adapter, bool enable);
-- 
2.30.2

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[Intel-gfx] [PATCH v4 12/17] drm/dp_dual_mode: Pass drm_device to drm_lspcon_(get|set)_mode()

[Lyude Paul]

So that we can start using drm_dbg_*() throughout the DRM DP helpers.

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/drm_dp_dual_mode_helper.c   |  8 +---
 drivers/gpu/drm/i915/display/intel_lspcon.c | 12 +++-
 include/drm/drm_dp_dual_mode_helper.h   |  4 ++--
 3 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_dual_mode_helper.c 
b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
index c9c2952bcad2..dbf9b1fdec63 100644
--- a/drivers/gpu/drm/drm_dp_dual_mode_helper.c
+++ b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
@@ -430,6 +430,7 @@ EXPORT_SYMBOL(drm_dp_get_dual_mode_type_name);
 /**
  * drm_lspcon_get_mode: Get LSPCON's current mode of operation by
  * reading offset (0x80, 0x41)
+ * @dev: _device to use
  * @adapter: I2C-over-aux adapter
  * @mode: current lspcon mode of operation output variable
  *
@@ -437,7 +438,7 @@ EXPORT_SYMBOL(drm_dp_get_dual_mode_type_name);
  * 0 on success, sets the current_mode value to appropriate mode
  * -error on failure
  */
-int drm_lspcon_get_mode(struct i2c_adapter *adapter,
+int drm_lspcon_get_mode(const struct drm_device *dev, struct i2c_adapter 
*adapter,
enum drm_lspcon_mode *mode)
 {
u8 data;
@@ -477,13 +478,14 @@ EXPORT_SYMBOL(drm_lspcon_get_mode);
 /**
  * drm_lspcon_set_mode: Change LSPCON's mode of operation by
  * writing offset (0x80, 0x40)
+ * @dev: _device to use
  * @adapter: I2C-over-aux adapter
  * @mode: required mode of operation
  *
  * Returns:
  * 0 on success, -error on failure/timeout
  */
-int drm_lspcon_set_mode(struct i2c_adapter *adapter,
+int drm_lspcon_set_mode(const struct drm_device *dev, struct i2c_adapter 
*adapter,
enum drm_lspcon_mode mode)
 {
u8 data = 0;
@@ -508,7 +510,7 @@ int drm_lspcon_set_mode(struct i2c_adapter *adapter,
 * so wait and retry until time out or done.
 */
do {
-   ret = drm_lspcon_get_mode(adapter, _mode);
+   ret = drm_lspcon_get_mode(dev, adapter, _mode);
if (ret) {
DRM_ERROR("can't confirm LSPCON mode change\n");
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c 
b/drivers/gpu/drm/i915/display/intel_lspcon.c
index ca25044e7d1b..ec0048024746 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -139,10 +139,11 @@ void lspcon_detect_hdr_capability(struct intel_lspcon 
*lspcon)
 
 static enum drm_lspcon_mode lspcon_get_current_mode(struct intel_lspcon 
*lspcon)
 {
+   struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
enum drm_lspcon_mode current_mode;
-   struct i2c_adapter *adapter = _to_intel_dp(lspcon)->aux.ddc;
+   struct i2c_adapter *adapter = _dp->aux.ddc;
 
-   if (drm_lspcon_get_mode(adapter, _mode)) {
+   if (drm_lspcon_get_mode(intel_dp->aux.drm_dev, adapter, _mode)) 
{
DRM_DEBUG_KMS("Error reading LSPCON mode\n");
return DRM_LSPCON_MODE_INVALID;
}
@@ -175,11 +176,12 @@ static enum drm_lspcon_mode lspcon_wait_mode(struct 
intel_lspcon *lspcon,
 static int lspcon_change_mode(struct intel_lspcon *lspcon,
  enum drm_lspcon_mode mode)
 {
+   struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
int err;
enum drm_lspcon_mode current_mode;
-   struct i2c_adapter *adapter = _to_intel_dp(lspcon)->aux.ddc;
+   struct i2c_adapter *adapter = _dp->aux.ddc;
 
-   err = drm_lspcon_get_mode(adapter, _mode);
+   err = drm_lspcon_get_mode(intel_dp->aux.drm_dev, adapter, 
_mode);
if (err) {
DRM_ERROR("Error reading LSPCON mode\n");
return err;
@@ -190,7 +192,7 @@ static int lspcon_change_mode(struct intel_lspcon *lspcon,
return 0;
}
 
-   err = drm_lspcon_set_mode(adapter, mode);
+   err = drm_lspcon_set_mode(intel_dp->aux.drm_dev, adapter, mode);
if (err < 0) {
DRM_ERROR("LSPCON mode change failed\n");
return err;
diff --git a/include/drm/drm_dp_dual_mode_helper.h 
b/include/drm/drm_dp_dual_mode_helper.h
index 01eec9ff5962..7ee482265087 100644
--- a/include/drm/drm_dp_dual_mode_helper.h
+++ b/include/drm/drm_dp_dual_mode_helper.h
@@ -114,8 +114,8 @@ int drm_dp_dual_mode_set_tmds_output(const struct 
drm_device *dev, enum drm_dp_d
 struct i2c_adapter *adapter, bool enable);
 const char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type);
 
-int drm_lspcon_get_mode(struct i2c_adapter *adapter,
+int drm_lspcon_get_mode(const struct drm_device *dev, struct i2c_adapter 
*adapter,
enum drm_lspcon_mode *current_mode);
-int drm_lspcon_set_mode(struct i2c_adapter *adapter,
+int drm_lspcon_set_mode(const struct drm_device *dev, struct i2c_adapter 
*adapter,
enum drm_lspcon_mode reqd_mode);
 

[Intel-gfx] [PATCH v4 09/17] drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_set_tmds_output()

[Lyude Paul]

Another function that we'll need to pass a drm_device (and not drm_dp_aux)
down to so that we can move over to using drm_dbg_*().

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/drm_dp_dual_mode_helper.c | 3 ++-
 drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +--
 include/drm/drm_dp_dual_mode_helper.h | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_dual_mode_helper.c 
b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
index 9ee75c568c37..a63d7de85309 100644
--- a/drivers/gpu/drm/drm_dp_dual_mode_helper.c
+++ b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
@@ -336,6 +336,7 @@ EXPORT_SYMBOL(drm_dp_dual_mode_get_tmds_output);
 
 /**
  * drm_dp_dual_mode_set_tmds_output - Enable/disable TMDS output buffers in 
the DP dual mode adaptor
+ * @dev: _device to use
  * @type: DP dual mode adaptor type
  * @adapter: I2C adapter for the DDC bus
  * @enable: enable (as opposed to disable) the TMDS output buffers
@@ -349,7 +350,7 @@ EXPORT_SYMBOL(drm_dp_dual_mode_get_tmds_output);
  * Returns:
  * 0 on success, negative error code on failure
  */
-int drm_dp_dual_mode_set_tmds_output(enum drm_dp_dual_mode_type type,
+int drm_dp_dual_mode_set_tmds_output(const struct drm_device *dev, enum 
drm_dp_dual_mode_type type,
 struct i2c_adapter *adapter, bool enable)
 {
uint8_t tmds_oen = enable ? 0 : DP_DUAL_MODE_TMDS_DISABLE;
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c 
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 08fb98dac169..fc3e7a9396b5 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1251,8 +1251,7 @@ void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi 
*hdmi, bool enable)
drm_dbg_kms(_priv->drm, "%s DP dual mode adaptor TMDS output\n",
enable ? "Enabling" : "Disabling");
 
-   drm_dp_dual_mode_set_tmds_output(hdmi->dp_dual_mode.type,
-adapter, enable);
+   drm_dp_dual_mode_set_tmds_output(_priv->drm, 
hdmi->dp_dual_mode.type, adapter, enable);
 }
 
 static int intel_hdmi_hdcp_read(struct intel_digital_port *dig_port,
diff --git a/include/drm/drm_dp_dual_mode_helper.h 
b/include/drm/drm_dp_dual_mode_helper.h
index 23ce849152f3..8cb0dcd98a99 100644
--- a/include/drm/drm_dp_dual_mode_helper.h
+++ b/include/drm/drm_dp_dual_mode_helper.h
@@ -110,7 +110,7 @@ int drm_dp_dual_mode_max_tmds_clock(enum 
drm_dp_dual_mode_type type,
struct i2c_adapter *adapter);
 int drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type,
 struct i2c_adapter *adapter, bool 
*enabled);
-int drm_dp_dual_mode_set_tmds_output(enum drm_dp_dual_mode_type type,
+int drm_dp_dual_mode_set_tmds_output(const struct drm_device *dev, enum 
drm_dp_dual_mode_type type,
 struct i2c_adapter *adapter, bool enable);
 const char *drm_dp_get_dual_mode_type_name(enum drm_dp_dual_mode_type type);
 
-- 
2.30.2

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[Intel-gfx] [PATCH v4 08/17] drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_detect()

[Lyude Paul]

Since we're about to be using drm_dbg_*() throughout the DP helpers, we'll
need to be able to access the DRM device in the dual mode DP helpers as
well. Note however that since drm_dp_dual_mode_detect() can be called with
DDC adapters that aren't part of a drm_dp_aux struct, we need to pass down
the drm_device to these functions instead of using drm_dp_aux.

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/drm_dp_dual_mode_helper.c   | 4 +++-
 drivers/gpu/drm/i915/display/intel_hdmi.c   | 2 +-
 drivers/gpu/drm/i915/display/intel_lspcon.c | 5 +++--
 include/drm/drm_dp_dual_mode_helper.h   | 4 +++-
 4 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_dual_mode_helper.c 
b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
index 1c9ea9f7fdaf..9ee75c568c37 100644
--- a/drivers/gpu/drm/drm_dp_dual_mode_helper.c
+++ b/drivers/gpu/drm/drm_dp_dual_mode_helper.c
@@ -165,6 +165,7 @@ static bool is_lspcon_adaptor(const char 
hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN],
 
 /**
  * drm_dp_dual_mode_detect - Identify the DP dual mode adaptor
+ * @dev: _device to use
  * @adapter: I2C adapter for the DDC bus
  *
  * Attempt to identify the type of the DP dual mode adaptor used.
@@ -178,7 +179,8 @@ static bool is_lspcon_adaptor(const char 
hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN],
  * Returns:
  * The type of the DP dual mode adaptor used
  */
-enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(struct i2c_adapter *adapter)
+enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(const struct drm_device 
*dev,
+  struct i2c_adapter *adapter)
 {
char hdmi_id[DP_DUAL_MODE_HDMI_ID_LEN] = {};
uint8_t adaptor_id = 0x00;
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c 
b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 47a8f0a1c5e2..08fb98dac169 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -2224,7 +2224,7 @@ intel_hdmi_dp_dual_mode_detect(struct drm_connector 
*connector, bool has_edid)
enum port port = hdmi_to_dig_port(hdmi)->base.port;
struct i2c_adapter *adapter =
intel_gmbus_get_adapter(dev_priv, hdmi->ddc_bus);
-   enum drm_dp_dual_mode_type type = drm_dp_dual_mode_detect(adapter);
+   enum drm_dp_dual_mode_type type = 
drm_dp_dual_mode_detect(_priv->drm, adapter);
 
/*
 * Type 1 DVI adaptors are not required to implement any
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c 
b/drivers/gpu/drm/i915/display/intel_lspcon.c
index e4ff533e3a69..ca25044e7d1b 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -221,7 +221,8 @@ static bool lspcon_probe(struct intel_lspcon *lspcon)
 {
int retry;
enum drm_dp_dual_mode_type adaptor_type;
-   struct i2c_adapter *adapter = _to_intel_dp(lspcon)->aux.ddc;
+   struct intel_dp *intel_dp = lspcon_to_intel_dp(lspcon);
+   struct i2c_adapter *adapter = _dp->aux.ddc;
enum drm_lspcon_mode expected_mode;
 
expected_mode = lspcon_wake_native_aux_ch(lspcon) ?
@@ -232,7 +233,7 @@ static bool lspcon_probe(struct intel_lspcon *lspcon)
if (retry)
usleep_range(500, 1000);
 
-   adaptor_type = drm_dp_dual_mode_detect(adapter);
+   adaptor_type = drm_dp_dual_mode_detect(intel_dp->aux.drm_dev, 
adapter);
if (adaptor_type == DRM_DP_DUAL_MODE_LSPCON)
break;
}
diff --git a/include/drm/drm_dp_dual_mode_helper.h 
b/include/drm/drm_dp_dual_mode_helper.h
index 4c42db81fcb4..23ce849152f3 100644
--- a/include/drm/drm_dp_dual_mode_helper.h
+++ b/include/drm/drm_dp_dual_mode_helper.h
@@ -62,6 +62,7 @@
 #define DP_DUAL_MODE_LSPCON_CURRENT_MODE   0x41
 #define  DP_DUAL_MODE_LSPCON_MODE_PCON 0x1
 
+struct drm_device;
 struct i2c_adapter;
 
 ssize_t drm_dp_dual_mode_read(struct i2c_adapter *adapter,
@@ -103,7 +104,8 @@ enum drm_dp_dual_mode_type {
DRM_DP_DUAL_MODE_LSPCON,
 };
 
-enum drm_dp_dual_mode_type drm_dp_dual_mode_detect(struct i2c_adapter 
*adapter);
+enum drm_dp_dual_mode_type
+drm_dp_dual_mode_detect(const struct drm_device *dev, struct i2c_adapter 
*adapter);
 int drm_dp_dual_mode_max_tmds_clock(enum drm_dp_dual_mode_type type,
struct i2c_adapter *adapter);
 int drm_dp_dual_mode_get_tmds_output(enum drm_dp_dual_mode_type type,
-- 
2.30.2

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[Intel-gfx] [PATCH v4 06/17] drm/dp: Pass drm_dp_aux to drm_dp*_link_train_channel_eq_delay()

[Lyude Paul]

So that we can start using drm_dbg_*() for
drm_dp_link_train_channel_eq_delay() and
drm_dp_lttpr_link_train_channel_eq_delay().

Signed-off-by: Lyude Paul 
Reviewed-by: Laurent Pinchart 
---
 drivers/gpu/drm/amd/amdgpu/atombios_dp.c   |  2 +-
 drivers/gpu/drm/drm_dp_helper.c| 14 +-
 .../gpu/drm/i915/display/intel_dp_link_training.c  |  4 ++--
 drivers/gpu/drm/msm/dp/dp_ctrl.c   |  4 ++--
 drivers/gpu/drm/msm/edp/edp_ctrl.c |  4 ++--
 drivers/gpu/drm/radeon/atombios_dp.c   |  2 +-
 drivers/gpu/drm/xlnx/zynqmp_dp.c   |  2 +-
 include/drm/drm_dp_helper.h|  6 --
 8 files changed, 22 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c 
b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
index 92d76f4cfdfc..f327becb022f 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
@@ -677,7 +677,7 @@ amdgpu_atombios_dp_link_train_ce(struct 
amdgpu_atombios_dp_link_train_info *dp_i
dp_info->tries = 0;
channel_eq = false;
while (1) {
-   drm_dp_link_train_channel_eq_delay(dp_info->dpcd);
+   drm_dp_link_train_channel_eq_delay(dp_info->aux, dp_info->dpcd);
 
if (drm_dp_dpcd_read_link_status(dp_info->aux,
 dp_info->link_status) <= 0) {
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index f71b035a48b4..a2047dae3ab7 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -151,7 +151,8 @@ void drm_dp_link_train_clock_recovery_delay(const struct 
drm_dp_aux *aux,
 }
 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
 
-static void __drm_dp_link_train_channel_eq_delay(unsigned long rd_interval)
+static void __drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux,
+unsigned long rd_interval)
 {
if (rd_interval > 4)
DRM_DEBUG_KMS("AUX interval %lu, out of range (max 4)\n",
@@ -165,9 +166,11 @@ static void __drm_dp_link_train_channel_eq_delay(unsigned 
long rd_interval)
usleep_range(rd_interval, rd_interval * 2);
 }
 
-void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+void drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux,
+   const u8 dpcd[DP_RECEIVER_CAP_SIZE])
 {
-   __drm_dp_link_train_channel_eq_delay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
+   __drm_dp_link_train_channel_eq_delay(aux,
+dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
 DP_TRAINING_AUX_RD_MASK);
 }
 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
@@ -183,13 +186,14 @@ static u8 dp_lttpr_phy_cap(const u8 
phy_cap[DP_LTTPR_PHY_CAP_SIZE], int r)
return phy_cap[r - DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1];
 }
 
-void drm_dp_lttpr_link_train_channel_eq_delay(const u8 
phy_cap[DP_LTTPR_PHY_CAP_SIZE])
+void drm_dp_lttpr_link_train_channel_eq_delay(const struct drm_dp_aux *aux,
+ const u8 
phy_cap[DP_LTTPR_PHY_CAP_SIZE])
 {
u8 interval = dp_lttpr_phy_cap(phy_cap,
   
DP_TRAINING_AUX_RD_INTERVAL_PHY_REPEATER1) &
  DP_TRAINING_AUX_RD_MASK;
 
-   __drm_dp_link_train_channel_eq_delay(interval);
+   __drm_dp_link_train_channel_eq_delay(aux, interval);
 }
 EXPORT_SYMBOL(drm_dp_lttpr_link_train_channel_eq_delay);
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 198ddb3c173a..6bf6f1ec13ed 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -665,11 +665,11 @@ intel_dp_link_training_channel_equalization_delay(struct 
intel_dp *intel_dp,
  enum drm_dp_phy dp_phy)
 {
if (dp_phy == DP_PHY_DPRX) {
-   drm_dp_link_train_channel_eq_delay(intel_dp->dpcd);
+   drm_dp_link_train_channel_eq_delay(_dp->aux, 
intel_dp->dpcd);
} else {
const u8 *phy_caps = intel_dp_lttpr_phy_caps(intel_dp, dp_phy);
 
-   drm_dp_lttpr_link_train_channel_eq_delay(phy_caps);
+   drm_dp_lttpr_link_train_channel_eq_delay(_dp->aux, 
phy_caps);
}
 }
 
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 264a9eae87d3..2cebd17a7289 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1184,7 +1184,7 @@ static int dp_ctrl_link_lane_down_shift(struct 
dp_ctrl_private *ctrl)
 static void dp_ctrl_clear_training_pattern(struct dp_ctrl_private *ctrl)
 {
dp_ctrl_train_pattern_set(ctrl, DP_TRAINING_PATTERN_DISABLE);

[Intel-gfx] [PATCH v4 07/17] drm/dp: Always print aux channel name in logs

[Lyude Paul]

Since we're about to convert everything in drm_dp_helper.c over to using
drm_dbg_*(), let's also make our logging more consistent in drm_dp_helper.c
while we're at it to ensure that we always print the name of the AUX
channel in question.

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/drm_dp_helper.c | 13 +++--
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index a2047dae3ab7..b50e572b544d 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -139,8 +139,8 @@ void drm_dp_link_train_clock_recovery_delay(const struct 
drm_dp_aux *aux,
 DP_TRAINING_AUX_RD_MASK;
 
if (rd_interval > 4)
-   DRM_DEBUG_KMS("AUX interval %lu, out of range (max 4)\n",
- rd_interval);
+   DRM_DEBUG_KMS("%s: AUX interval %lu, out of range (max 4)\n",
+ aux->name, rd_interval);
 
if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14)
rd_interval = 100;
@@ -155,8 +155,8 @@ static void __drm_dp_link_train_channel_eq_delay(const 
struct drm_dp_aux *aux,
 unsigned long rd_interval)
 {
if (rd_interval > 4)
-   DRM_DEBUG_KMS("AUX interval %lu, out of range (max 4)\n",
- rd_interval);
+   DRM_DEBUG_KMS("%s: AUX interval %lu, out of range (max 4)\n",
+ aux->name, rd_interval);
 
if (rd_interval == 0)
rd_interval = 400;
@@ -2781,7 +2781,7 @@ int drm_dp_pcon_frl_enable(struct drm_dp_aux *aux)
if (ret < 0)
return ret;
if (!(buf & DP_PCON_ENABLE_SOURCE_CTL_MODE)) {
-   DRM_DEBUG_KMS("PCON in Autonomous mode, can't enable FRL\n");
+   DRM_DEBUG_KMS("%s: PCON in Autonomous mode, can't enable 
FRL\n", aux->name);
return -EINVAL;
}
buf |= DP_PCON_ENABLE_HDMI_LINK;
@@ -2876,7 +2876,8 @@ void drm_dp_pcon_hdmi_frl_link_error_count(struct 
drm_dp_aux *aux,
num_error = 0;
}
 
-   DRM_ERROR("More than %d errors since the last read for lane 
%d", num_error, i);
+   DRM_ERROR("%s: More than %d errors since the last read for lane 
%d",
+ aux->name, num_error, i);
}
 }
 EXPORT_SYMBOL(drm_dp_pcon_hdmi_frl_link_error_count);
-- 
2.30.2

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[Intel-gfx] [PATCH v4 05/17] drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()

[Lyude Paul]

So that we can start using drm_dbg_*() in
drm_dp_link_train_clock_recovery_delay().

Signed-off-by: Lyude Paul 
Reviewed-by: Laurent Pinchart 
Reviewed-by: Rodrigo Vivi 
---
 drivers/gpu/drm/amd/amdgpu/atombios_dp.c  | 2 +-
 drivers/gpu/drm/drm_dp_helper.c   | 3 ++-
 drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
 drivers/gpu/drm/msm/dp/dp_ctrl.c  | 2 +-
 drivers/gpu/drm/msm/edp/edp_ctrl.c| 2 +-
 drivers/gpu/drm/radeon/atombios_dp.c  | 2 +-
 drivers/gpu/drm/xlnx/zynqmp_dp.c  | 2 +-
 include/drm/drm_dp_helper.h   | 4 +++-
 8 files changed, 11 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c 
b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
index 062625a8a4ec..92d76f4cfdfc 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
@@ -612,7 +612,7 @@ amdgpu_atombios_dp_link_train_cr(struct 
amdgpu_atombios_dp_link_train_info *dp_i
dp_info->tries = 0;
voltage = 0xff;
while (1) {
-   drm_dp_link_train_clock_recovery_delay(dp_info->dpcd);
+   drm_dp_link_train_clock_recovery_delay(dp_info->aux, 
dp_info->dpcd);
 
if (drm_dp_dpcd_read_link_status(dp_info->aux,
 dp_info->link_status) <= 0) {
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 9f66153a3c55..f71b035a48b4 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -132,7 +132,8 @@ u8 drm_dp_get_adjust_request_post_cursor(const u8 
link_status[DP_LINK_STATUS_SIZ
 }
 EXPORT_SYMBOL(drm_dp_get_adjust_request_post_cursor);
 
-void drm_dp_link_train_clock_recovery_delay(const u8 
dpcd[DP_RECEIVER_CAP_SIZE])
+void drm_dp_link_train_clock_recovery_delay(const struct drm_dp_aux *aux,
+   const u8 dpcd[DP_RECEIVER_CAP_SIZE])
 {
unsigned long rd_interval = dpcd[DP_TRAINING_AUX_RD_INTERVAL] &
 DP_TRAINING_AUX_RD_MASK;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c 
b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 591ddc4b876c..198ddb3c173a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -513,7 +513,7 @@ static void 
intel_dp_link_training_clock_recovery_delay(struct intel_dp *intel_d
enum drm_dp_phy dp_phy)
 {
if (dp_phy == DP_PHY_DPRX)
-   drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd);
+   drm_dp_link_train_clock_recovery_delay(_dp->aux, 
intel_dp->dpcd);
else
drm_dp_lttpr_link_train_clock_recovery_delay();
 }
diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c
index 1390f3547fde..264a9eae87d3 100644
--- a/drivers/gpu/drm/msm/dp/dp_ctrl.c
+++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c
@@ -1103,7 +1103,7 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_private 
*ctrl,
tries = 0;
old_v_level = ctrl->link->phy_params.v_level;
for (tries = 0; tries < maximum_retries; tries++) {
-   drm_dp_link_train_clock_recovery_delay(ctrl->panel->dpcd);
+   drm_dp_link_train_clock_recovery_delay(ctrl->aux, 
ctrl->panel->dpcd);
 
ret = dp_ctrl_read_link_status(ctrl, link_status);
if (ret)
diff --git a/drivers/gpu/drm/msm/edp/edp_ctrl.c 
b/drivers/gpu/drm/msm/edp/edp_ctrl.c
index 57af3d8b6699..6501598448b4 100644
--- a/drivers/gpu/drm/msm/edp/edp_ctrl.c
+++ b/drivers/gpu/drm/msm/edp/edp_ctrl.c
@@ -608,7 +608,7 @@ static int edp_start_link_train_1(struct edp_ctrl *ctrl)
tries = 0;
old_v_level = ctrl->v_level;
while (1) {
-   drm_dp_link_train_clock_recovery_delay(ctrl->dpcd);
+   drm_dp_link_train_clock_recovery_delay(ctrl->drm_aux, 
ctrl->dpcd);
 
rlen = drm_dp_dpcd_read_link_status(ctrl->drm_aux, link_status);
if (rlen < DP_LINK_STATUS_SIZE) {
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c 
b/drivers/gpu/drm/radeon/atombios_dp.c
index c50c504bad50..299b9d8da376 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -680,7 +680,7 @@ static int radeon_dp_link_train_cr(struct 
radeon_dp_link_train_info *dp_info)
dp_info->tries = 0;
voltage = 0xff;
while (1) {
-   drm_dp_link_train_clock_recovery_delay(dp_info->dpcd);
+   drm_dp_link_train_clock_recovery_delay(dp_info->aux, 
dp_info->dpcd);
 
if (drm_dp_dpcd_read_link_status(dp_info->aux,
 dp_info->link_status) <= 0) {
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c

[Intel-gfx] [PATCH v4 03/17] drm/dp: Add backpointer to drm_device in drm_dp_aux

[Lyude Paul]

This is something that we've wanted for a while now: the ability to
actually look up the respective drm_device for a given drm_dp_aux struct.
This will also allow us to transition over to using the drm_dbg_*() helpers
for debug message printing, as we'll finally have a drm_device to reference
for doing so.

Note that there is one limitation with this - because some DP AUX adapters
exist as platform devices which are initialized independently of their
respective DRM devices, one cannot rely on drm_dp_aux->drm_dev to always be
non-NULL until drm_dp_aux_register() has been called. We make sure to point
this out in the documentation for struct drm_dp_aux.

v3:
* Add WARN_ON_ONCE() to drm_dp_aux_register() if drm_dev isn't filled out

Signed-off-by: Lyude Paul 
Acked-by: Thierry Reding 
---
 drivers/gpu/drm/amd/amdgpu/atombios_dp.c | 2 ++
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c  | 1 +
 drivers/gpu/drm/bridge/analogix/analogix-anx6345.c   | 1 +
 drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c   | 1 +
 drivers/gpu/drm/bridge/analogix/analogix_dp_core.c   | 1 +
 drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c  | 1 +
 drivers/gpu/drm/bridge/tc358767.c| 1 +
 drivers/gpu/drm/bridge/ti-sn65dsi86.c| 1 +
 drivers/gpu/drm/drm_dp_aux_dev.c | 6 ++
 drivers/gpu/drm/drm_dp_helper.c  | 2 ++
 drivers/gpu/drm/drm_dp_mst_topology.c| 1 +
 drivers/gpu/drm/i915/display/intel_dp_aux.c  | 1 +
 drivers/gpu/drm/msm/edp/edp.h| 3 +--
 drivers/gpu/drm/msm/edp/edp_aux.c| 5 +++--
 drivers/gpu/drm/msm/edp/edp_ctrl.c   | 2 +-
 drivers/gpu/drm/nouveau/nouveau_connector.c  | 1 +
 drivers/gpu/drm/radeon/atombios_dp.c | 1 +
 drivers/gpu/drm/tegra/dpaux.c| 1 +
 drivers/gpu/drm/xlnx/zynqmp_dp.c | 1 +
 include/drm/drm_dp_helper.h  | 9 -
 20 files changed, 36 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c 
b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
index a3ba9ca11e98..062625a8a4ec 100644
--- a/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
+++ b/drivers/gpu/drm/amd/amdgpu/atombios_dp.c
@@ -188,6 +188,8 @@ void amdgpu_atombios_dp_aux_init(struct amdgpu_connector 
*amdgpu_connector)
 {
amdgpu_connector->ddc_bus->rec.hpd = amdgpu_connector->hpd.hpd;
amdgpu_connector->ddc_bus->aux.transfer = 
amdgpu_atombios_dp_aux_transfer;
+   amdgpu_connector->ddc_bus->aux.drm_dev = amdgpu_connector->base.dev;
+
drm_dp_aux_init(_connector->ddc_bus->aux);
amdgpu_connector->ddc_bus->has_aux = true;
 }
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
index 73cdb9fe981a..997567f6f0ba 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
@@ -433,6 +433,7 @@ void amdgpu_dm_initialize_dp_connector(struct 
amdgpu_display_manager *dm,
kasprintf(GFP_KERNEL, "AMDGPU DM aux hw bus %d",
  link_index);
aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer;
+   aconnector->dm_dp_aux.aux.drm_dev = dm->ddev;
aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc;
 
drm_dp_aux_init(>dm_dp_aux.aux);
diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c 
b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
index aa6cda458eb9..e33cd077595a 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix-anx6345.c
@@ -537,6 +537,7 @@ static int anx6345_bridge_attach(struct drm_bridge *bridge,
/* Register aux channel */
anx6345->aux.name = "DP-AUX";
anx6345->aux.dev = >client->dev;
+   anx6345->aux.drm_dev = bridge->dev;
anx6345->aux.transfer = anx6345_aux_transfer;
 
err = drm_dp_aux_register(>aux);
diff --git a/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c 
b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
index f20558618220..5e6a0ed39199 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
+++ b/drivers/gpu/drm/bridge/analogix/analogix-anx78xx.c
@@ -905,6 +905,7 @@ static int anx78xx_bridge_attach(struct drm_bridge *bridge,
/* Register aux channel */
anx78xx->aux.name = "DP-AUX";
anx78xx->aux.dev = >client->dev;
+   anx78xx->aux.drm_dev = bridge->dev;
anx78xx->aux.transfer = anx78xx_aux_transfer;
 
err = drm_dp_aux_register(>aux);
diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c 
b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
index f115233b1cb9..550814ca2139 100644
--- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.c
+++ 

[Intel-gfx] [PATCH v4 04/17] drm/dp: Clarify DP AUX registration time

[Lyude Paul]

The docs we had for drm_dp_aux_init() and drm_dp_aux_register() were mostly
correct, except for the fact that they made the assumption that all AUX
devices were grandchildren of their respective DRM devices. This is the
case for most normal GPUs, but is almost never the case with SoCs and
display bridges. So, let's fix this documentation to clarify when the right
time to use drm_dp_aux_init() or drm_dp_aux_register() is.

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/drm_dp_helper.c | 45 +++--
 1 file changed, 32 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index ad73d7264743..9f66153a3c55 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1728,10 +1728,18 @@ EXPORT_SYMBOL(drm_dp_remote_aux_init);
  * drm_dp_aux_init() - minimally initialise an aux channel
  * @aux: DisplayPort AUX channel
  *
- * If you need to use the drm_dp_aux's i2c adapter prior to registering it
- * with the outside world, call drm_dp_aux_init() first. You must still
- * call drm_dp_aux_register() once the connector has been registered to
- * allow userspace access to the auxiliary DP channel.
+ * If you need to use the drm_dp_aux's i2c adapter prior to registering it with
+ * the outside world, call drm_dp_aux_init() first. For drivers which are
+ * grandparents to their AUX adapters (e.g. the AUX adapter is parented by a
+ * _connector), you must still call drm_dp_aux_register() once the 
connector
+ * has been registered to allow userspace access to the auxiliary DP channel.
+ * Likewise, for such drivers you should also assign _dp_aux.drm_dev as
+ * early as possible so that the _device that corresponds to the AUX 
adapter
+ * may be mentioned in debugging output from the DRM DP helpers.
+ *
+ * For devices which use a separate platform device for their AUX adapters, 
this
+ * may be called as early as required by the driver.
+ *
  */
 void drm_dp_aux_init(struct drm_dp_aux *aux)
 {
@@ -1751,15 +1759,26 @@ EXPORT_SYMBOL(drm_dp_aux_init);
  * drm_dp_aux_register() - initialise and register aux channel
  * @aux: DisplayPort AUX channel
  *
- * Automatically calls drm_dp_aux_init() if this hasn't been done yet.
- * This should only be called when the underlying  drm_connector is
- * initialiazed already. Therefore the best place to call this is from
- * _connector_funcs.late_register. Not that drivers which don't follow this
- * will Oops when CONFIG_DRM_DP_AUX_CHARDEV is enabled.
- *
- * Drivers which need to use the aux channel before that point (e.g. at driver
- * load time, before drm_dev_register() has been called) need to call
- * drm_dp_aux_init().
+ * Automatically calls drm_dp_aux_init() if this hasn't been done yet. This
+ * should only be called once the parent of @aux, _dp_aux.dev, is
+ * initialized. For devices which are grandparents of their AUX channels,
+ * _dp_aux.dev will typically be the _connector  which
+ * corresponds to @aux. For these devices, it's advised to call
+ * drm_dp_aux_register() in _connector_funcs.late_register, and likewise to
+ * call drm_dp_aux_unregister() in _connector_funcs.early_unregister.
+ * Functions which don't follow this will likely Oops when
+ * %CONFIG_DRM_DP_AUX_CHARDEV is enabled.
+ *
+ * For devices where the AUX channel is a device that exists independently of
+ * the _device that uses it, such as SoCs and bridge devices, it is
+ * recommended to call drm_dp_aux_register() after a _device has been
+ * assigned to _dp_aux.drm_dev, and likewise to call
+ * drm_dp_aux_unregister() once the _device should no longer be associated
+ * with the AUX channel (e.g. on bridge detach).
+ *
+ * Drivers which need to use the aux channel before either of the two points
+ * mentioned above need to call drm_dp_aux_init() in order to use the AUX
+ * channel before registration.
  *
  * Returns 0 on success or a negative error code on failure.
  */
-- 
2.30.2

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[Intel-gfx] [PATCH v4 01/17] drm/bridge/cdns-mhdp8546: Register DP aux channel with userspace

[Lyude Paul]

Just adds some missing calls to
drm_dp_aux_register()/drm_dp_aux_unregister() for when we attach/detach the
bridge.

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c | 11 ++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c 
b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
index 01e95466502a..49e4c340f1de 100644
--- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
+++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
@@ -1719,10 +1719,14 @@ static int cdns_mhdp_attach(struct drm_bridge *bridge,
 
dev_dbg(mhdp->dev, "%s\n", __func__);
 
+   ret = drm_dp_aux_register(>aux);
+   if (ret < 0)
+   return ret;
+
if (!(flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)) {
ret = cdns_mhdp_connector_init(mhdp);
if (ret)
-   return ret;
+   goto aux_unregister;
}
 
spin_lock(>start_lock);
@@ -1738,6 +1742,9 @@ static int cdns_mhdp_attach(struct drm_bridge *bridge,
   mhdp->regs + CDNS_APB_INT_MASK);
 
return 0;
+aux_unregister:
+   drm_dp_aux_unregister(>aux);
+   return ret;
 }
 
 static void cdns_mhdp_configure_video(struct cdns_mhdp_device *mhdp,
@@ -2082,6 +2089,8 @@ static void cdns_mhdp_detach(struct drm_bridge *bridge)
 
dev_dbg(mhdp->dev, "%s\n", __func__);
 
+   drm_dp_aux_unregister(>aux);
+
spin_lock(>start_lock);
 
mhdp->bridge_attached = false;
-- 
2.30.2

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[Intel-gfx] [PATCH v4 02/17] drm/nouveau/kms/nv50-: Move AUX adapter reg to connector late register/early unregister

[Lyude Paul]

Since AUX adapters on nouveau have their respective DRM connectors as
parents, we need to make sure that we register then after their connectors.

Signed-off-by: Lyude Paul 
---
 drivers/gpu/drm/nouveau/nouveau_connector.c | 25 -
 1 file changed, 20 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c 
b/drivers/gpu/drm/nouveau/nouveau_connector.c
index 61e6d7412505..c04044be3d32 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.c
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.c
@@ -401,7 +401,6 @@ nouveau_connector_destroy(struct drm_connector *connector)
drm_connector_cleanup(connector);
if (nv_connector->aux.transfer) {
drm_dp_cec_unregister_connector(_connector->aux);
-   drm_dp_aux_unregister(_connector->aux);
kfree(nv_connector->aux.name);
}
kfree(connector);
@@ -905,13 +904,29 @@ nouveau_connector_late_register(struct drm_connector 
*connector)
int ret;
 
ret = nouveau_backlight_init(connector);
+   if (ret)
+   return ret;
 
+   if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
+   connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
+   ret = drm_dp_aux_register(_connector(connector)->aux);
+   if (ret)
+   goto backlight_fini;
+   }
+
+   return 0;
+backlight_fini:
+   nouveau_backlight_fini(connector);
return ret;
 }
 
 static void
 nouveau_connector_early_unregister(struct drm_connector *connector)
 {
+   if (connector->connector_type == DRM_MODE_CONNECTOR_eDP ||
+   connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort)
+   drm_dp_aux_unregister(_connector(connector)->aux);
+
nouveau_backlight_fini(connector);
 }
 
@@ -1343,14 +1358,14 @@ nouveau_connector_create(struct drm_device *dev,
snprintf(aux_name, sizeof(aux_name), "sor-%04x-%04x",
 dcbe->hasht, dcbe->hashm);
nv_connector->aux.name = kstrdup(aux_name, GFP_KERNEL);
-   ret = drm_dp_aux_register(_connector->aux);
+   drm_dp_aux_init(_connector->aux);
if (ret) {
-   NV_ERROR(drm, "failed to register aux channel\n");
+   NV_ERROR(drm, "Failed to init AUX adapter for 
sor-%04x-%04x: %d\n",
+dcbe->hasht, dcbe->hashm, ret);
kfree(nv_connector);
return ERR_PTR(ret);
}
-   funcs = _connector_funcs;
-   break;
+   fallthrough;
default:
funcs = _connector_funcs;
break;
-- 
2.30.2

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[Intel-gfx] [PATCH v4 00/17] drm: Use new DRM printk funcs (like drm_dbg_*()) in DP helpers

[Lyude Paul]

Since it's been asked quite a few times on some of the various DP
related patch series I've submitted to use the new DRM printk helpers,
and it technically wasn't really trivial to do this before due to the
lack of a consistent way to find a drm_device for an AUX channel, this
patch series aims to address this. In this series we:

* (NEW! starting from V3) Make sure drm_dbg_*() and friends can handle
  NULL drm device pointers
* Clean-up potentially erroneous usages of drm_dp_aux_init() and
  drm_dp_aux_register() so that actual AUX registration doesn't happen
  until we have an associated DRM device
* Clean-up any obvious errors in drivers we find along the way
* Add a backpointer to the respective drm_device for an AUX channel in
  drm_dp_aux.drm_dev, and hook it up in every driver with an AUX channel
  across the tree
* Add a new ratelimited print helper we'll need for converting the DP
  helpers over to using the new DRM printk helpers
* Fix any inconsistencies with logging in drm_dp_helper.c so we always
  have the aux channel name printed
* Prepare the various DP helpers so they can find the correct drm_device
  to use for logging
* And finally, convert all of the DP helpers over to using drm_dbg_*()
  and drm_err().

Major changes in v4:
* Don't move i2c aux init into drm_dp_aux_init(), since I think I've
  found a much better solution to tegra's issues:
  https://patchwork.freedesktop.org/series/89420/

Lyude Paul (17):
  drm/bridge/cdns-mhdp8546: Register DP aux channel with userspace
  drm/nouveau/kms/nv50-: Move AUX adapter reg to connector late
register/early unregister
  drm/dp: Add backpointer to drm_device in drm_dp_aux
  drm/dp: Clarify DP AUX registration time
  drm/dp: Pass drm_dp_aux to drm_dp_link_train_clock_recovery_delay()
  drm/dp: Pass drm_dp_aux to drm_dp*_link_train_channel_eq_delay()
  drm/dp: Always print aux channel name in logs
  drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_detect()
  drm/dp_dual_mode: Pass drm_device to
drm_dp_dual_mode_set_tmds_output()
  drm/dp_dual_mode: Pass drm_device to drm_dp_dual_mode_max_tmds_clock()
  drm/dp_dual_mode: Pass drm_device to
drm_dp_dual_mode_get_tmds_output()
  drm/dp_dual_mode: Pass drm_device to drm_lspcon_(get|set)_mode()
  drm/dp_mst: Pass drm_dp_mst_topology_mgr to drm_dp_get_vc_payload_bw()
  drm/print: Handle potentially NULL drm_devices in drm_dbg_*
  drm/dp: Convert drm_dp_helper.c to using drm_err/drm_dbg_*()
  drm/dp_dual_mode: Convert drm_dp_dual_mode_helper.c to using
drm_err/drm_dbg_kms()
  drm/dp_mst: Convert drm_dp_mst_topology.c to drm_err()/drm_dbg*()

 drivers/gpu/drm/amd/amdgpu/atombios_dp.c  |   6 +-
 .../display/amdgpu_dm/amdgpu_dm_mst_types.c   |   1 +
 .../drm/bridge/analogix/analogix-anx6345.c|   1 +
 .../drm/bridge/analogix/analogix-anx78xx.c|   1 +
 .../drm/bridge/analogix/analogix_dp_core.c|   1 +
 .../drm/bridge/cadence/cdns-mhdp8546-core.c   |  12 +-
 drivers/gpu/drm/bridge/tc358767.c |   1 +
 drivers/gpu/drm/bridge/ti-sn65dsi86.c |   1 +
 drivers/gpu/drm/drm_dp_aux_dev.c  |   6 +
 drivers/gpu/drm/drm_dp_dual_mode_helper.c |  68 ++--
 drivers/gpu/drm/drm_dp_helper.c   | 184 +
 drivers/gpu/drm/drm_dp_mst_topology.c | 376 +-
 drivers/gpu/drm/i915/display/intel_dp_aux.c   |   1 +
 .../drm/i915/display/intel_dp_link_training.c |   6 +-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   3 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c |   7 +-
 drivers/gpu/drm/i915/display/intel_lspcon.c   |  17 +-
 drivers/gpu/drm/msm/dp/dp_ctrl.c  |   6 +-
 drivers/gpu/drm/msm/edp/edp.h |   3 +-
 drivers/gpu/drm/msm/edp/edp_aux.c |   5 +-
 drivers/gpu/drm/msm/edp/edp_ctrl.c|   8 +-
 drivers/gpu/drm/nouveau/nouveau_connector.c   |  26 +-
 drivers/gpu/drm/radeon/atombios_dp.c  |   5 +-
 drivers/gpu/drm/tegra/dpaux.c |   1 +
 drivers/gpu/drm/xlnx/zynqmp_dp.c  |   5 +-
 include/drm/drm_dp_dual_mode_helper.h |  14 +-
 include/drm/drm_dp_helper.h   |  19 +-
 include/drm/drm_dp_mst_helper.h   |   3 +-
 include/drm/drm_print.h   |  20 +-
 29 files changed, 453 insertions(+), 354 deletions(-)

-- 
2.30.2

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Re: [Intel-gfx] [PATCH v3 03/20] drm/dp: Move i2c init to drm_dp_aux_init, add __must_check and fini

[Lyude Paul]

On Fri, 2021-04-23 at 14:39 +0200, Thierry Reding wrote:
> 
> I'm curious: how is a DP AUX adapter reference count going to solve the
> issue of potentially registering devices too early (i.e. before the DRM
> is registered)?
> 
> Is it because registering too early could cause a reference count
> problem if somebody get a hold of the DP AUX adapter before the parent
> DRM device is around?

Well currently the problem is that we kind of want to avoid setting up the i2c
adapter before the DRM driver is registered with userspace, but it's not
really possible to do that if we need the core device struct for the ddc
adapter initialized so that tegra can call get_device() on it in
drivers/gpu/drm/tegra/sor.c. So my thought is instead of calling get_device()
on the ddc adapter that the AUX channel provides, why not just call it on the
actual platform device that implements the AUX channel instead? I think this
should work pretty nicely while still preventing the platform device for the
AUX channel from disappearing before the SOR has disappeared.


> 
> Thierry

-- 
Cheers,
 Lyude Paul (she/her)
 Software Engineer at Red Hat

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Re: [Intel-gfx] [PATCH v2] drm/i915: Simplify CCS and UV plane alignment handling

[Ville Syrjälä]

On Wed, Apr 21, 2021 at 08:32:20PM +0300, Imre Deak wrote:
> We can handle the surface alignment of CCS and UV color planes for all
> modifiers at one place, so do this. An AUX color plane can be a CCS or a
> UV plane, use only the more specific query functions and remove
> is_aux_plane() becoming redundant.
> 
> While at it add a TODO for linear UV color plane alignments. The spec
> requires this to be stride-in-bytes * 64 on all platforms, whereas the
> driver uses an alignment of 4k for gen<12 and 256k for gen>=12 for
> linear UV planes.
> 
> v2:
> - Restore previous alignment for linear UV surfaces.
> 
> Signed-off-by: Imre Deak 
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 27 +---
>  drivers/gpu/drm/i915/display/intel_fb.c  |  8 --
>  drivers/gpu/drm/i915/display/intel_fb.h  |  1 -
>  3 files changed, 18 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index a10e26380ef3d..e246e5cf75866 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -973,10 +973,26 @@ unsigned int intel_surf_alignment(const struct 
> drm_framebuffer *fb,
>   struct drm_i915_private *dev_priv = to_i915(fb->dev);
>  
>   /* AUX_DIST needs only 4K alignment */
> - if ((DISPLAY_VER(dev_priv) < 12 && is_aux_plane(fb, color_plane)) ||
> - is_ccs_plane(fb, color_plane))
> + if (is_ccs_plane(fb, color_plane))
>   return 4096;
>  
> + if (is_semiplanar_uv_plane(fb, color_plane)) {
> + /*
> +  * TODO: cross-check wrt. the bspec stride in bytes * 64 bytes
> +  * alignment for linear UV planes on all platforms.
> +  */

I think it's just saying that UV should always start at an integer
multiple of Y stride, whether we're dealing with linear or tiled.
Dunno if that's true or not. I suppose there could be some
tlb/prefetch related reasons for it.

I think the same tile row/stride alignment requirements are specified
for all gen9+ platforms actually. So if it's supposedly really needed
then I guess we should do it on all platforms. And if it's not actually
needed we shoud just nuke it all and be happy with 4k alignment.

What are the chances we can even find a suitbly aligned page boundary?
Not sure.

Oh and there's some oddball mention of the UV start having to be a
multiple of four lines. Is it talking about AUX_DIST of AUX_OFFSET.y?
No idea. What lines? Maybe Y lines? Not sure.


> + if (DISPLAY_VER(dev_priv) >= 12) {
> + if (fb->modifier == DRM_FORMAT_MOD_LINEAR)
> + return intel_linear_alignment(dev_priv);
> +
> + return intel_tile_row_size(fb, color_plane);
> + }
> +
> + return 4096;
> + }
> +
> + drm_WARN_ON(_priv->drm, color_plane != 0);
> +
>   switch (fb->modifier) {
>   case DRM_FORMAT_MOD_LINEAR:
>   return intel_linear_alignment(dev_priv);
> @@ -985,19 +1001,12 @@ unsigned int intel_surf_alignment(const struct 
> drm_framebuffer *fb,
>   return 256 * 1024;
>   return 0;
>   case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
> - if (is_semiplanar_uv_plane(fb, color_plane))
> - return intel_tile_row_size(fb, color_plane);
> - fallthrough;
>   case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
>   case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
>   return 16 * 1024;
>   case I915_FORMAT_MOD_Y_TILED_CCS:
>   case I915_FORMAT_MOD_Yf_TILED_CCS:
>   case I915_FORMAT_MOD_Y_TILED:
> - if (DISPLAY_VER(dev_priv) >= 12 &&
> - is_semiplanar_uv_plane(fb, color_plane))
> - return intel_tile_row_size(fb, color_plane);
> - fallthrough;
>   case I915_FORMAT_MOD_Yf_TILED:
>   return 1 * 1024 * 1024;

As for these IIRC TGL+ should not need any extra alignment anymore.
But that's material for a separate patch.

Anyways patch seems ok.
Reviewed-by: Ville Syrjälä 

>   default:
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> b/drivers/gpu/drm/i915/display/intel_fb.c
> index 0ec9ad7220a14..c8aaca3e79e97 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -30,14 +30,6 @@ bool is_gen12_ccs_cc_plane(const struct drm_framebuffer 
> *fb, int plane)
>  plane == 2;
>  }
>  
> -bool is_aux_plane(const struct drm_framebuffer *fb, int plane)
> -{
> - if (is_ccs_modifier(fb->modifier))
> - return is_ccs_plane(fb, plane);
> -
> - return plane == 1;
> -}
> -
>  bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int 
> color_plane)
>  {
>   return intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.h 
> 

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec

[Souza, Jose]

On Thu, 2021-04-22 at 09:28 +, Patchwork wrote:
Patch Details
Series: series starting with [1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to 
better mach eDP spec
URL:https://patchwork.freedesktop.org/series/89328/
State:  failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19969/index.html
CI Bug Log - changes from CI_DRM_9995_full -> Patchwork_19969_full
Summary

FAILURE

Serious unknown changes coming with Patchwork_19969_full absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_19969_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_19969_full:

IGT changes
Possible regressions

  *   igt@kms_cursor_legacy@short-flip-before-cursor-atomic-transitions:
 *   shard-skl: 
PASS
 -> 
FAIL

This changes are not affecting SKL.
Pushed the second patch that can be merged to drm-intel-next.

Waiting an ack from drm maintainers in the first one.

Known issues

Here are the changes found in Patchwork_19969_full that come from known issues:

IGT changes
Issues hit

  *   igt@gem_ctx_persistence@process:

 *   shard-snb: NOTRUN -> 
SKIP
 (fdo#109271 / 
i915#1099) +1 similar 
issue
  *   igt@gem_eio@in-flight-1us:

 *   shard-skl: 
PASS
 -> 
TIMEOUT
 ([i915#3063])
  *   igt@gem_eio@unwedge-stress:

 *   shard-iclb: 
PASS
 -> 
TIMEOUT
 (i915#2369 / 
i915#2481 / [i915#3070])

 *   shard-snb: NOTRUN -> 
FAIL
 ([i915#3354])

  *   igt@gem_exec_fair@basic-none-share@rcs0:

 *   shard-iclb: 
PASS
 -> 
FAIL
 ([i915#2842])
  *   igt@gem_exec_fair@basic-pace@vecs0:

 *   shard-tglb: 
PASS
 -> 
FAIL
 ([i915#2842])
  *   igt@gem_exec_fair@basic-throttle@rcs0:

 *   shard-iclb: 
PASS
 -> 
FAIL
 ([i915#2849])
  *   igt@gem_exec_reloc@basic-wide-active@bcs0:

 *   shard-apl: NOTRUN -> 
FAIL
 (i915#2389) +3 similar 
issues
  *   igt@gem_exec_reloc@basic-wide-active@vcs1:

 *   shard-iclb: NOTRUN -> 
FAIL
 (i915#2389)
  *   igt@gem_huc_copy@huc-copy:

 *   shard-apl: NOTRUN -> 
SKIP
 (fdo#109271 / 
i915#2190)
  *   igt@gem_userptr_blits@set-cache-level:

 *   shard-snb: NOTRUN -> 
FAIL
 ([i915#3324])
  *   igt@gem_userptr_blits@vma-merge:

 *   shard-snb: NOTRUN -> 
FAIL
 ([i915#2724])

 *   shard-skl: NOTRUN -> 

Re: [Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy

[Lionel Landwerlin]

On 23/04/2021 18:11, Umesh Nerlige Ramappa wrote:

On Fri, Apr 23, 2021 at 10:05:34AM +0300, Lionel Landwerlin wrote:

On 21/04/2021 20:28, Umesh Nerlige Ramappa wrote:

Perf measurements rely on CPU and engine timestamps to correlate
events of interest across these time domains. Current mechanisms get
these timestamps separately and the calculated delta between these
timestamps lack enough accuracy.

To improve the accuracy of these time measurements to within a few us,
add a query that returns the engine and cpu timestamps captured as
close to each other as possible.

v2: (Tvrtko)
- document clock reference used
- return cpu timestamp always
- capture cpu time just before lower dword of cs timestamp

v3: (Chris)
- use uncore-rpm
- use __query_cs_timestamp helper

v4: (Lionel)
- Kernel perf subsytem allows users to specify the clock id to be used
  in perf_event_open. This clock id is used by the perf subsystem to
  return the appropriate cpu timestamp in perf events. Similarly, let
  the user pass the clockid to this query so that cpu timestamp
  corresponds to the clock id requested.

v5: (Tvrtko)
- Use normal ktime accessors instead of fast versions
- Add more uApi documentation

v6: (Lionel)
- Move switch out of spinlock

v7: (Chris)
- cs_timestamp is a misnomer, use cs_cycles instead
- return the cs cycle frequency as well in the query

v8:
- Add platform and engine specific checks

v9: (Lionel)
- Return 2 cpu timestamps in the query - captured before and after the
  register read

v10: (Chris)
- Use local_clock() to measure time taken to read lower dword of
  register and return it to user.

Signed-off-by: Umesh Nerlige Ramappa 
---
 drivers/gpu/drm/i915/i915_query.c | 145 ++
 include/uapi/drm/i915_drm.h   |  48 ++
 2 files changed, 193 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_query.c 
b/drivers/gpu/drm/i915/i915_query.c

index fed337ad7b68..25b96927ab92 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -6,6 +6,8 @@
 #include 
+#include "gt/intel_engine_pm.h"
+#include "gt/intel_engine_user.h"
 #include "i915_drv.h"
 #include "i915_perf.h"
 #include "i915_query.h"
@@ -90,6 +92,148 @@ static int query_topology_info(struct 
drm_i915_private *dev_priv,

 return total_length;
 }
+typedef u64 (*__ktime_func_t)(void);
+static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
+{
+    /*
+ * Use logic same as the perf subsystem to allow user to select 
the

+ * reference clock id to be used for timestamps.
+ */
+    switch (clk_id) {
+    case CLOCK_MONOTONIC:
+    return _get_ns;
+    case CLOCK_MONOTONIC_RAW:
+    return _get_raw_ns;
+    case CLOCK_REALTIME:
+    return _get_real_ns;
+    case CLOCK_BOOTTIME:
+    return _get_boottime_ns;
+    case CLOCK_TAI:
+    return _get_clocktai_ns;
+    default:
+    return NULL;
+    }
+}
+
+static inline int
+__read_timestamps(struct intel_uncore *uncore,
+  i915_reg_t lower_reg,
+  i915_reg_t upper_reg,
+  u64 *cs_ts,
+  u64 *cpu_ts,
+  __ktime_func_t cpu_clock)
+{
+    u32 upper, lower, old_upper, loop = 0;
+
+    upper = intel_uncore_read_fw(uncore, upper_reg);
+    do {
+    cpu_ts[1] = local_clock();
+    cpu_ts[0] = cpu_clock();
+    lower = intel_uncore_read_fw(uncore, lower_reg);
+    cpu_ts[1] = local_clock() - cpu_ts[1];
+    old_upper = upper;
+    upper = intel_uncore_read_fw(uncore, upper_reg);
+    } while (upper != old_upper && loop++ < 2);
+
+    *cs_ts = (u64)upper << 32 | lower;
+
+    return 0;
+}
+
+static int
+__query_cs_cycles(struct intel_engine_cs *engine,
+  u64 *cs_ts, u64 *cpu_ts,
+  __ktime_func_t cpu_clock)
+{
+    struct intel_uncore *uncore = engine->uncore;
+    enum forcewake_domains fw_domains;
+    u32 base = engine->mmio_base;
+    intel_wakeref_t wakeref;
+    int ret;
+
+    fw_domains = intel_uncore_forcewake_for_reg(uncore,
+    RING_TIMESTAMP(base),
+    FW_REG_READ);
+
+    with_intel_runtime_pm(uncore->rpm, wakeref) {
+    spin_lock_irq(>lock);
+    intel_uncore_forcewake_get__locked(uncore, fw_domains);
+
+    ret = __read_timestamps(uncore,
+    RING_TIMESTAMP(base),
+    RING_TIMESTAMP_UDW(base),
+    cs_ts,
+    cpu_ts,
+    cpu_clock);
+
+    intel_uncore_forcewake_put__locked(uncore, fw_domains);
+    spin_unlock_irq(>lock);
+    }
+
+    return ret;
+}
+
+static int
+query_cs_cycles(struct drm_i915_private *i915,
+    struct drm_i915_query_item *query_item)
+{
+    struct drm_i915_query_cs_cycles __user *query_ptr;
+    struct drm_i915_query_cs_cycles query;
+    struct intel_engine_cs *engine;
+    __ktime_func_t cpu_clock;
+    int ret;
+
+    if (INTEL_GEN(i915) < 6)
+    return -ENODEV;


Less than gen6 is handled here early on.


+
+    

Re: [Intel-gfx] [PATCH] vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV

[Alex Williamson]

On Fri, 23 Apr 2021 09:07:09 -0300
Jason Gunthorpe  wrote:

> On Fri, Apr 23, 2021 at 11:54:26AM +0800, Zhenyu Wang wrote:
> > On 2021.04.22 10:58:10 -0300, Jason Gunthorpe wrote:  
> > > On Thu, Apr 22, 2021 at 03:35:33PM +0200, Arnd Bergmann wrote:  
> > > > From: Arnd Bergmann 
> > > > 
> > > > The Kconfig dependency is incomplete since DRM_I915_GVT is a 'bool'
> > > > symbol that depends on the 'tristate' VFIO_MDEV. This allows a
> > > > configuration with VFIO_MDEV=m, DRM_I915_GVT=y and DRM_I915=y that
> > > > causes a link failure:
> > > > 
> > > > x86_64-linux-ld: drivers/gpu/drm/i915/gvt/gvt.o: in function 
> > > > `available_instances_show':
> > > > gvt.c:(.text+0x67a): undefined reference to `mtype_get_parent_dev'
> > > > x86_64-linux-ld: gvt.c:(.text+0x6a5): undefined reference to 
> > > > `mtype_get_type_group_id'
> > > > x86_64-linux-ld: drivers/gpu/drm/i915/gvt/gvt.o: in function 
> > > > `description_show':
> > > > gvt.c:(.text+0x76e): undefined reference to `mtype_get_parent_dev'
> > > > x86_64-linux-ld: gvt.c:(.text+0x799): undefined reference to 
> > > > `mtype_get_type_group_id'
> > > > 
> > > > Clarify the dependency by specifically disallowing the broken
> > > > configuration. If VFIO_MDEV is built-in, it will work, but if
> > > > VFIO_MDEV=m, the i915 driver cannot be built-in here.
> > > > 
> > > > Fixes: 07e543f4f9d1 ("vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV")
> > > > Fixes: 9169cff168ff ("vfio/mdev: Correct the function signatures for 
> > > > the mdev_type_attributes")
> > > > Signed-off-by: Arnd Bergmann 
> > > >  drivers/gpu/drm/i915/Kconfig | 2 +-
> > > >  1 file changed, 1 insertion(+), 1 deletion(-)  
> > > 
> > > Oh kconfig stuff like this makes my head hurt, thanks for finding it
> > > 
> > > I also can't see an alternative to this ugly thing, besides having the
> > > i915 guys properly modularize this code someday
> > > 
> > > Reviewed-by: Jason Gunthorpe 
> > >   
> > 
> > I don't really want this mess to propagate further. We should move
> > mdev related stuff to kvmgt module instead, so not pretend any more to
> > possibly use that for other hypervisor..
> > 
> > Sorry that I didn't realize this issue when Jason proposed this. Let
> > me do the left cleanup.  
> 
> It would be good, but Alex should still take this patch for the
> upcoming merge window, you can revert it when you do all the cleanups

I can include it, but I'll wait for confirmation from Zhenyu.  Thanks,

Alex

___
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Intel-gfx@lists.freedesktop.org
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Re: [Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy

[Umesh Nerlige Ramappa]

On Fri, Apr 23, 2021 at 10:05:34AM +0300, Lionel Landwerlin wrote:

On 21/04/2021 20:28, Umesh Nerlige Ramappa wrote:

Perf measurements rely on CPU and engine timestamps to correlate
events of interest across these time domains. Current mechanisms get
these timestamps separately and the calculated delta between these
timestamps lack enough accuracy.

To improve the accuracy of these time measurements to within a few us,
add a query that returns the engine and cpu timestamps captured as
close to each other as possible.

v2: (Tvrtko)
- document clock reference used
- return cpu timestamp always
- capture cpu time just before lower dword of cs timestamp

v3: (Chris)
- use uncore-rpm
- use __query_cs_timestamp helper

v4: (Lionel)
- Kernel perf subsytem allows users to specify the clock id to be used
  in perf_event_open. This clock id is used by the perf subsystem to
  return the appropriate cpu timestamp in perf events. Similarly, let
  the user pass the clockid to this query so that cpu timestamp
  corresponds to the clock id requested.

v5: (Tvrtko)
- Use normal ktime accessors instead of fast versions
- Add more uApi documentation

v6: (Lionel)
- Move switch out of spinlock

v7: (Chris)
- cs_timestamp is a misnomer, use cs_cycles instead
- return the cs cycle frequency as well in the query

v8:
- Add platform and engine specific checks

v9: (Lionel)
- Return 2 cpu timestamps in the query - captured before and after the
  register read

v10: (Chris)
- Use local_clock() to measure time taken to read lower dword of
  register and return it to user.

Signed-off-by: Umesh Nerlige Ramappa 
---
 drivers/gpu/drm/i915/i915_query.c | 145 ++
 include/uapi/drm/i915_drm.h   |  48 ++
 2 files changed, 193 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_query.c 
b/drivers/gpu/drm/i915/i915_query.c
index fed337ad7b68..25b96927ab92 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -6,6 +6,8 @@
 #include 
+#include "gt/intel_engine_pm.h"
+#include "gt/intel_engine_user.h"
 #include "i915_drv.h"
 #include "i915_perf.h"
 #include "i915_query.h"
@@ -90,6 +92,148 @@ static int query_topology_info(struct drm_i915_private 
*dev_priv,
return total_length;
 }
+typedef u64 (*__ktime_func_t)(void);
+static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
+{
+   /*
+* Use logic same as the perf subsystem to allow user to select the
+* reference clock id to be used for timestamps.
+*/
+   switch (clk_id) {
+   case CLOCK_MONOTONIC:
+   return _get_ns;
+   case CLOCK_MONOTONIC_RAW:
+   return _get_raw_ns;
+   case CLOCK_REALTIME:
+   return _get_real_ns;
+   case CLOCK_BOOTTIME:
+   return _get_boottime_ns;
+   case CLOCK_TAI:
+   return _get_clocktai_ns;
+   default:
+   return NULL;
+   }
+}
+
+static inline int
+__read_timestamps(struct intel_uncore *uncore,
+ i915_reg_t lower_reg,
+ i915_reg_t upper_reg,
+ u64 *cs_ts,
+ u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+   u32 upper, lower, old_upper, loop = 0;
+
+   upper = intel_uncore_read_fw(uncore, upper_reg);
+   do {
+   cpu_ts[1] = local_clock();
+   cpu_ts[0] = cpu_clock();
+   lower = intel_uncore_read_fw(uncore, lower_reg);
+   cpu_ts[1] = local_clock() - cpu_ts[1];
+   old_upper = upper;
+   upper = intel_uncore_read_fw(uncore, upper_reg);
+   } while (upper != old_upper && loop++ < 2);
+
+   *cs_ts = (u64)upper << 32 | lower;
+
+   return 0;
+}
+
+static int
+__query_cs_cycles(struct intel_engine_cs *engine,
+ u64 *cs_ts, u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+   struct intel_uncore *uncore = engine->uncore;
+   enum forcewake_domains fw_domains;
+   u32 base = engine->mmio_base;
+   intel_wakeref_t wakeref;
+   int ret;
+
+   fw_domains = intel_uncore_forcewake_for_reg(uncore,
+   RING_TIMESTAMP(base),
+   FW_REG_READ);
+
+   with_intel_runtime_pm(uncore->rpm, wakeref) {
+   spin_lock_irq(>lock);
+   intel_uncore_forcewake_get__locked(uncore, fw_domains);
+
+   ret = __read_timestamps(uncore,
+   RING_TIMESTAMP(base),
+   RING_TIMESTAMP_UDW(base),
+   cs_ts,
+   cpu_ts,
+   cpu_clock);
+
+   intel_uncore_forcewake_put__locked(uncore, fw_domains);
+   spin_unlock_irq(>lock);
+   }
+
+   return ret;
+}
+
+static int
+query_cs_cycles(struct drm_i915_private *i915,
+  

Re: [Intel-gfx] [PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec

[Souza, Jose]

On Fri, 2021-04-23 at 12:25 +0200, Maarten Lankhorst wrote:
> Op 22-04-2021 om 13:00 schreef Mun, Gwan-gyeong:
> > The changed name looks more accurate to the edp 1.4b spec.
> > Looks good to me.
> > 
> > Reviewed-by: Gwan-gyeong Mun 
> > 
> > On Wed, 2021-04-21 at 15:02 -0700, José Roberto de Souza wrote:
> > > DP_PSR_EN_CFG bit 5 aka "Selective Update Region Scan Line Capture
> > > Indication" in eDP spec has a ambiguous name, so renaming to better
> > > match specification.
> > > 
> > > While at it, replacing bit shit by BIT() macro and adding the version
> > > some registers were added to eDP specification.
> > > 
> > > Cc: 
> > > Cc: Rodrigo Vivi 
> > > Cc: Jani Nikula 
> > > Cc: Gwan-gyeong Mun 
> > > Signed-off-by: José Roberto de Souza 
> > > ---
> > >  include/drm/drm_dp_helper.h | 16 
> > >  1 file changed, 8 insertions(+), 8 deletions(-)
> > > 
> > > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> > > index 1e85c2021f2f..d6f6a084a190 100644
> > > --- a/include/drm/drm_dp_helper.h
> > > +++ b/include/drm/drm_dp_helper.h
> > > @@ -687,14 +687,14 @@ struct drm_device;
> > >  #define DP_DSC_ENABLE   0x160   /* DP 1.4 */
> > >  # define DP_DECOMPRESSION_EN    (1 << 0)
> > >  
> > > -#define DP_PSR_EN_CFG  0x170   /* XXX 1.2? */
> > > -# define DP_PSR_ENABLE (1 << 0)
> > > -# define DP_PSR_MAIN_LINK_ACTIVE   (1 << 1)
> > > -# define DP_PSR_CRC_VERIFICATION   (1 << 2)
> > > -# define DP_PSR_FRAME_CAPTURE  (1 << 3)
> > > -# define DP_PSR_SELECTIVE_UPDATE   (1 << 4)
> > > -# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS (1 << 5)
> > > -# define DP_PSR_ENABLE_PSR2    (1 << 6) /* eDP 1.4a */
> > > +#define DP_PSR_EN_CFG  0x170   /* XXX 1.2? */
> > > +# define DP_PSR_ENABLE BIT(0)
> > > +# define DP_PSR_MAIN_LINK_ACTIVE   BIT(1)
> > > +# define DP_PSR_CRC_VERIFICATION   BIT(2)
> > > +# define DP_PSR_FRAME_CAPTURE  BIT(3)
> > > +# define DP_PSR_SU_REGION_SCANLINE_CAPTURE BIT(4) /* eDP 1.4a */
> > > +# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORSBIT(5) /* eDP
> > > 1.4a */
> > > +# define DP_PSR_ENABLE_PSR2BIT(6) /* eDP 1.4a */
> > >  
> > >  #define DP_ADAPTER_CTRL    0x1a0
> > >  # define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)
> > ___
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> This should probably go throuh drm-misc-next, I don't see the next patch 
> depending on this?

The patch depending on this change will be sent right after this one is merged.

> 

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Re: [Intel-gfx] [PATCH] drm/i915: set min brightness for aux backlight interface.

[Lee, Shawn C]

On Wed, 21 Apr 2021, Jani Nikula  wrote:
>On Mon, 19 Apr 2021, Lee Shawn C  wrote:
>> Min brightness level for aux backlight interface is always zero.
>> Driver should refer to VBT's setting to configure proper minimum level 
>> just like PWM backlight interface.
>
>Unfortunately this change makes it harder for Lyude to extract the dpcd 
>backlight code from i915 to drm helpers, and I think the min brightness should 
>be handled after or in connection with that change.
>
>BR,
>Jani.
>

Understood. We will wait for Lyude's patch landing on upstream. And confirm 
i915 driver need this change or not.

Best regards,
Shawn

>
>>
>> Cc: Jani Nikula 
>> Cc: Ville Syrjala 
>> Cc: Lyude Paul 
>> Cc: Cooper Chiou 
>>
>> Signed-off-by: Lee Shawn C 
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 2 +-
>>  drivers/gpu/drm/i915/display/intel_panel.c| 2 +-
>>  drivers/gpu/drm/i915/display/intel_panel.h| 1 +
>>  3 files changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c 
>> b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> index 4f8337c7fd2e..efd8fa155105 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
>> @@ -571,7 +571,7 @@ static int intel_dp_aux_vesa_setup_backlight(struct 
>> intel_connector *connector,
>>  if (!panel->backlight.max)
>>  return -ENODEV;
>>  
>> -panel->backlight.min = 0;
>> +panel->backlight.min = get_backlight_min_vbt(connector);
>>  panel->backlight.level = intel_dp_aux_vesa_get_backlight(connector, 
>> pipe);
>>  panel->backlight.enabled = 
>> intel_dp_aux_vesa_backlight_dpcd_mode(connector) &&
>> panel->backlight.level != 0;
>> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c 
>> b/drivers/gpu/drm/i915/display/intel_panel.c
>> index 551fcaa77c2c..6d58ec192a04 100644
>> --- a/drivers/gpu/drm/i915/display/intel_panel.c
>> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
>> @@ -1614,7 +1614,7 @@ static u32 get_backlight_max_vbt(struct 
>> intel_connector *connector)
>>  /*
>>   * Note: The setup hooks can't assume pipe is set!
>>   */
>> -static u32 get_backlight_min_vbt(struct intel_connector *connector)
>> +u32 get_backlight_min_vbt(struct intel_connector *connector)
>>  {
>>  struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>>  struct intel_panel *panel = >panel; diff --git 
>> a/drivers/gpu/drm/i915/display/intel_panel.h 
>> b/drivers/gpu/drm/i915/display/intel_panel.h
>> index 1d340f77bffc..63da4e355585 100644
>> --- a/drivers/gpu/drm/i915/display/intel_panel.h
>> +++ b/drivers/gpu/drm/i915/display/intel_panel.h
>> @@ -53,6 +53,7 @@ void intel_panel_set_pwm_level(const struct 
>> drm_connector_state *conn_state, u32
>>  u32 intel_panel_invert_pwm_level(struct intel_connector *connector, 
>> u32 level);
>>  u32 intel_panel_backlight_level_to_pwm(struct intel_connector 
>> *connector, u32 level);
>>  u32 intel_panel_backlight_level_from_pwm(struct intel_connector 
>> *connector, u32 val);
>> +u32 get_backlight_min_vbt(struct intel_connector *connector);
>>  
>>  #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
>>  int intel_backlight_device_register(struct intel_connector 
>> *connector);
>
>--
>Jani Nikula, Intel Open Source Graphics Center
>
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[Intel-gfx] ✗ Fi.CI.BUILD: failure for vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV

[Patchwork]

== Series Details ==

Series: vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV
URL   : https://patchwork.freedesktop.org/series/89408/
State : failure

== Summary ==

Applying: vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV
error: sha1 information is lacking or useless (drivers/gpu/drm/i915/Kconfig).
error: could not build fake ancestor
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".


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Re: [Intel-gfx] [PATCH v2] drm/i915: Invoke BXT _DSM to enable MUX on HP Workstation laptops

[Ville Syrjälä]

On Fri, Apr 23, 2021 at 12:46:54PM +0800, Kai-Heng Feng wrote:
> On HP Fury G7 Workstations, graphics output is re-routed from Intel GFX
> to discrete GFX after S3. This is not desirable, because userspace will
> treat connected display as a new one, losing display settings.
> 
> The expected behavior is to let discrete GFX drives all external
> displays.
> 
> The platform in question uses ACPI method \_SB.PCI0.HGME to enable MUX.
> The method is inside the BXT _DSM, so add the _DSM and call it
> accordingly.
> 
> I also tested some MUX-less and iGPU only laptops with the BXT _DSM, no
> regression was found.
> 
> v2:
>  - Forward declare struct pci_dev.
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3113
> References: 
> https://lore.kernel.org/intel-gfx/1460040732-31417-4-git-send-email-animesh.ma...@intel.com/
> Signed-off-by: Kai-Heng Feng 
> ---
>  drivers/gpu/drm/i915/display/intel_acpi.c | 17 +
>  drivers/gpu/drm/i915/display/intel_acpi.h |  3 +++
>  drivers/gpu/drm/i915/i915_drv.c   |  5 +
>  3 files changed, 25 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_acpi.c 
> b/drivers/gpu/drm/i915/display/intel_acpi.c
> index 833d0c1be4f1..c7b57c22dce3 100644
> --- a/drivers/gpu/drm/i915/display/intel_acpi.c
> +++ b/drivers/gpu/drm/i915/display/intel_acpi.c
> @@ -14,11 +14,16 @@
>  
>  #define INTEL_DSM_REVISION_ID 1 /* For Calpella anyway... */
>  #define INTEL_DSM_FN_PLATFORM_MUX_INFO 1 /* No args */
> +#define INTEL_DSM_FN_PLATFORM_BXT_MUX_INFO 0 /* No args */
>  
>  static const guid_t intel_dsm_guid =
>   GUID_INIT(0x7ed873d3, 0xc2d0, 0x4e4f,
> 0xa8, 0x54, 0x0f, 0x13, 0x17, 0xb0, 0x1c, 0x2c);
>  
> +static const guid_t intel_bxt_dsm_guid =
> + GUID_INIT(0x3e5b41c6, 0xeb1d, 0x4260,
> +   0x9d, 0x15, 0xc7, 0x1f, 0xba, 0xda, 0xe4, 0x14);
> +

I think this dsm is just supposed to be more or less an
alternative to the opregion SCI stuff. Why there are two
ways to do the same things I have no idea. The opregion
spec does not tell us such mundane details.

It's also not documented to do anything except list the
supported functions:
"Get BIOS Data Functions Supported “Function #0"
 This function can be called to discover which “_DSM” Functions are
 supported. It may only return success if the return value accurately
 lists supported Functions."

But what you're apparently saying is that calling this changes
the behaviour of the system somehow? That is troubling.

-- 
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH v3 03/20] drm/dp: Move i2c init to drm_dp_aux_init, add __must_check and fini

[Thierry Reding]

On Fri, Apr 23, 2021 at 12:11:06AM -0400, Lyude Paul wrote:
> On Thu, 2021-04-22 at 18:33 -0400, Lyude Paul wrote:
> > OK - talked with Ville a bit on this and did some of my own research, I
> > actually think that moving i2c to drm_dp_aux_init() is the right decision
> > for
> > the time being. The reasoning behind this being that as shown by my previous
> > work of fixing drivers that call drm_dp_aux_register() too early - it seems
> > like there's already been drivers that have been working just fine with
> > setting up the i2c device before DRM registration. 
> > 
> > In the future, it'd probably be better if we can split up i2c_add_adapter()
> > into an init and register function - but we'll have to talk with the i2c
> > maintainers to see if this is acceptable w/ them
> 
> Actually - I think adding the ability to refcount dp aux adapters might be a
> better solution so I'm going to try that!

I'm curious: how is a DP AUX adapter reference count going to solve the
issue of potentially registering devices too early (i.e. before the DRM
is registered)?

Is it because registering too early could cause a reference count
problem if somebody get a hold of the DP AUX adapter before the parent
DRM device is around?

Thierry


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Re: [Intel-gfx] [PATCH v3 03/20] drm/dp: Move i2c init to drm_dp_aux_init, add __must_check and fini

[Thierry Reding]

On Thu, Apr 22, 2021 at 06:33:44PM -0400, Lyude Paul wrote:
> OK - talked with Ville a bit on this and did some of my own research, I
> actually think that moving i2c to drm_dp_aux_init() is the right decision for
> the time being. The reasoning behind this being that as shown by my previous
> work of fixing drivers that call drm_dp_aux_register() too early - it seems
> like there's already been drivers that have been working just fine with
> setting up the i2c device before DRM registration. 
> 
> In the future, it'd probably be better if we can split up i2c_add_adapter()
> into an init and register function - but we'll have to talk with the i2c
> maintainers to see if this is acceptable w/ them

Yeah, that sounds like a better long-term solution. We could leave
i2c_add_adapter() in place, since it's already half-way split up into
some initialization code and i2c_register_adapter(), so it shouldn't be
all that difficult to split out an i2c_init_adapter() so that outside
users can do the split setup.

Thierry


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Re: [Intel-gfx] [PATCH v3 03/20] drm/dp: Move i2c init to drm_dp_aux_init, add __must_check and fini

[Thierry Reding]

On Thu, Apr 22, 2021 at 01:18:09PM -0400, Lyude Paul wrote:
> On Tue, 2021-04-20 at 02:16 +0300, Ville Syrjälä wrote:
> > 
> > The init vs. register split is intentional. Registering the thing
> > and allowing userspace access to it before the rest of the driver
> > is ready isn't particularly great. For a while now we've tried to
> > move towards an architecture where the driver is fully initialzied
> > before anything gets exposed to userspace.
> 
> Yeah-thank you for pointing this out. Thierry - do you think there's an
> alternate solution we could go with in Tegra to fix the get_device() issue
> that wouldn't require us trying to expose the i2c adapter early?

I suppose we could do it in a hackish way that grabs a reference to the
I2C adapter only upon registration. We can't do that for the regular I2C
DDC case where the I2C controller is an external one because by the time
we get to registration it could've gone again. This would make both code
paths asymmetric, so I'd prefer not to do it. Perhaps it could serve as
an stop-gap solution until something better is in place, though.

Thierry


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[Intel-gfx] [ANNOUNCE] igt-gpu-tools 1.26

[Petri Latvala]

-BEGIN PGP SIGNED MESSAGE-
Hash: SHA512

A new igt-gpu-tools release is available with the following changes:

- - Autotools support has been entirely dropped in favor of only meson. 
(Arkadiusz Hiler)

- - Tests can now signal that the whole test round should be aborted. 
(Arkadiusz Hiler)

- - Various robustness improvements for Chamelium use. (Arkadiusz Hiler,
  Kunal Joshi, Imre Deak, et al)

- - Device filtering improvements for multi-device use. (Arkadiusz Hiler)

- - Device filtering for various Intel tools like intel_gpu_top. (Ayaz A 
Siddiqui)

- - Overhauled kernel parameter handling. (Jani Nikula)

- - Introduced an i915 batchbuffer facility. (Zbigniew Kempczyński)

- - Improvements for testing nouveau. (Lyude Paul)

- - More readable and useful output for lsgpu and other tools that list
  devices. (Tvrtko Ursulin)

- - intel_gpu_top can now show per-client busyness stats. (Tvrtko Ursulin)

- - igt_runner can now limit the disk space used by a single test. (Petri 
Latvala)


And many other bug fixes, improvements, cleanups and new tests.


Full changelog:


Abhinav Kumar (5):
  tools: rename intel_dp_compliance_hotplug to igt_dp_compliance_hotplug
  lib/igt_kms: move some of the useful dump functions to igt_kms
  lib/igt_fb: move the CTS fill framebuffer to igt_fb lib
  tools: move terminal utility functions to a separate file
  tools: add support for msm_dp_compliance to IGT

Adam Miszczak (3):
  i915/gem_partial_pwrite_pread: Remove libdrm dependency
  lib: sync i915_pciids.h with kernel
  lib/i915: Add DG1 platform definition

Anand Moon (1):
  tests/kms_setmode: basic Improve accuracy with using of confidence 
interval

Andrzej Turko (1):
  lib/i915: Split gem_create.c from ioctl_wrappers.c

Ankit Nautiyal (3):
  lib/igt_kms: Add support for detecting connector events
  tests/kms_content_protection: Use library functions for handling uevents
  lib: Use generic names for APIs that handle uevents

Anshuman Gupta (7):
  tests/i915_pm_lpsp: Nuke the panel-fitter test
  lib/igt_pm: Add lib func to get lpsp capability
  tests/i915_pm_lpsp: lpsp platform agnostic support
  tests/i915_pm_lpsp: screens-disabled subtest use igt_wait
  tests/i915_pm_rpm: lpsp/non-lpsp screen mode_set_data
  tests/i915_pm_rpm: Fix plane_subtest assertion
  tests/i915_pm_lpsp: Add igt_wait to test lpsp

Apoorva Singh (4):
  i915/gem_mmap: Modified offset in subtest "bad-size"
  i915/gem_mmap_wc: Align subtests with correct function calls
  i915/gem_render_copy_redux: Remove redundant checks
  i915/gem_ctx_param: Add subtests description

Arjun Melkaveri (2):
  i915/gem_exec_nop: Fixed Crash issue seen on few platform
  i915/gem_syncc: Exercise all physical engine selection and legacy rings

Arkadiusz Hiler (43):
  lib/tests: Extract fork helpers
  lib/tests: Add support for redirecting fork output to /dev/null
  lib: Make it possible to abort the whole execution from inside of a test
  runner/runner_tests: Extract helper for inspecting test result
  runner: Abort the run when test exits with IGT_EXIT_ABORT
  lib/chamelium: Clear error after checking if chamelium is reachable
  lib/chamelium: Make it clear that function asserts
  lib/chamelium: Add functions to initialize XMLRPC only
  lib/kms: Try to plug all Chamelium ports, abort if it fails
  chamelium: Retry XMLRPC call when chamelond fails talking with a receiver
  Remove files related to release 1.25 accidentally added to the repo
  tests/kms_chamelium: Fix dp-mode-timings test
  test/kms_chamelium: Start with disabling modeset
  tests/kms_chamelium: Issue disabling modeset when resetting state
  tests/kms_chamelium: Test HPD for different mode handling scenarios
  lib: Support multiple filters
  lib/drmtest: Introduce __drm_open_driver_another
  test/kms_prime: Use drm_open_driver_another
  lib/igt_core: Make assert on invalid magic blocks nesting more verbose
  lib/igt_core: Disallow nesting of igt_dynamic inside igt_dynamic
  lib/tests: Add tests for magic control blocks nesting
  lib/igt_chamelium: Sleep when doing autodiscovery
  lib/igt_kms: Make igt_display_require() + chamelium more robust
  lib/igt_core: Don't kill the world after a failed fork
  python: Stop using cElementTree
  runner/resultgen: Explain why json creation might have failed
  lib/core: Print thread:tid with igt_log for non-main threads
  lib/core: Handle asserts in threads
  igt/core: Disallow igt_require/skip in non-main threads
  Build api_intel_bb with Autotools too
  tests/kms_atomic_transition: Add explicit curly brackets
  tests/i915_pm_lpsp: Fix compilation warning
  tests: Add feature_discovery
  MAINTAINERS: Change Arek's email address
  tests/feature_discovery: Fix things spotted by GitLab's CI
  meson: Drop ':' in test names
  

[Intel-gfx] [PATCH] vfio/gvt: fix DRM_I915_GVT dependency on VFIO_MDEV

[Arnd Bergmann]

From: Arnd Bergmann 

The Kconfig dependency is incomplete since DRM_I915_GVT is a 'bool'
symbol that depends on the 'tristate' VFIO_MDEV. This allows a
configuration with VFIO_MDEV=m, DRM_I915_GVT=y and DRM_I915=y that
causes a link failure:

x86_64-linux-ld: drivers/gpu/drm/i915/gvt/gvt.o: in function 
`available_instances_show':
gvt.c:(.text+0x67a): undefined reference to `mtype_get_parent_dev'
x86_64-linux-ld: gvt.c:(.text+0x6a5): undefined reference to 
`mtype_get_type_group_id'
x86_64-linux-ld: drivers/gpu/drm/i915/gvt/gvt.o: in function `description_show':
gvt.c:(.text+0x76e): undefined reference to `mtype_get_parent_dev'
x86_64-linux-ld: gvt.c:(.text+0x799): undefined reference to 
`mtype_get_type_group_id'

Clarify the dependency by specifically disallowing the broken
configuration. If VFIO_MDEV is built-in, it will work, but if
VFIO_MDEV=m, the i915 driver cannot be built-in here.

Fixes: 07e543f4f9d1 ("vfio/gvt: Make DRM_I915_GVT depend on VFIO_MDEV")
Fixes: 9169cff168ff ("vfio/mdev: Correct the function signatures for the 
mdev_type_attributes")
Signed-off-by: Arnd Bergmann 
---
 drivers/gpu/drm/i915/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index 7a5b7a93d33e..791cc9556863 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -111,7 +111,7 @@ config DRM_I915_GVT
bool "Enable Intel GVT-g graphics virtualization host support"
depends on DRM_I915
depends on 64BIT
-   depends on VFIO_MDEV
+   depends on VFIO_MDEV=y || VFIO_MDEV=DRM_I915
default n
help
  Choose this option if you want to enable Intel GVT-g graphics
-- 
2.29.2

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Re: [Intel-gfx] [PATCH v5 05/16] swiotlb: Add restricted DMA pool initialization

[Steven Price]

On 22/04/2021 09:14, Claire Chang wrote:

Add the initialization function to create restricted DMA pools from
matching reserved-memory nodes.

Signed-off-by: Claire Chang 
---
  include/linux/device.h  |  4 +++
  include/linux/swiotlb.h |  3 +-
  kernel/dma/swiotlb.c| 80 +
  3 files changed, 86 insertions(+), 1 deletion(-)

diff --git a/include/linux/device.h b/include/linux/device.h
index 38a2071cf776..4987608ea4ff 100644
--- a/include/linux/device.h
+++ b/include/linux/device.h
@@ -416,6 +416,7 @@ struct dev_links_info {
   * @dma_pools:Dma pools (if dma'ble device).
   * @dma_mem:  Internal for coherent mem override.
   * @cma_area: Contiguous memory area for dma allocations
+ * @dma_io_tlb_mem: Internal for swiotlb io_tlb_mem override.
   * @archdata: For arch-specific additions.
   * @of_node:  Associated device tree node.
   * @fwnode:   Associated device node supplied by platform firmware.
@@ -521,6 +522,9 @@ struct device {
  #ifdef CONFIG_DMA_CMA
struct cma *cma_area;   /* contiguous memory area for dma
   allocations */
+#endif
+#ifdef CONFIG_DMA_RESTRICTED_POOL
+   struct io_tlb_mem *dma_io_tlb_mem;
  #endif
/* arch specific additions */
struct dev_archdata archdata;
diff --git a/include/linux/swiotlb.h b/include/linux/swiotlb.h
index 216854a5e513..03ad6e3b4056 100644
--- a/include/linux/swiotlb.h
+++ b/include/linux/swiotlb.h
@@ -72,7 +72,8 @@ extern enum swiotlb_force swiotlb_force;
   *range check to see if the memory was in fact allocated by this
   *API.
   * @nslabs:   The number of IO TLB blocks (in groups of 64) between @start and
- * @end. This is command line adjustable via setup_io_tlb_npages.
+ * @end. For default swiotlb, this is command line adjustable via
+ * setup_io_tlb_npages.
   * @used: The number of used IO TLB block.
   * @list: The free list describing the number of free entries available
   *from each index.
diff --git a/kernel/dma/swiotlb.c b/kernel/dma/swiotlb.c
index 57a9adb920bf..ffbb8724e06c 100644
--- a/kernel/dma/swiotlb.c
+++ b/kernel/dma/swiotlb.c
@@ -39,6 +39,13 @@
  #ifdef CONFIG_DEBUG_FS
  #include 
  #endif
+#ifdef CONFIG_DMA_RESTRICTED_POOL
+#include 
+#include 
+#include 
+#include 
+#include 
+#endif
  
  #include 

  #include 
@@ -681,3 +688,76 @@ static int __init swiotlb_create_default_debugfs(void)
  late_initcall(swiotlb_create_default_debugfs);
  
  #endif

+
+#ifdef CONFIG_DMA_RESTRICTED_POOL
+static int rmem_swiotlb_device_init(struct reserved_mem *rmem,
+   struct device *dev)
+{
+   struct io_tlb_mem *mem = rmem->priv;
+   unsigned long nslabs = rmem->size >> IO_TLB_SHIFT;
+
+   if (dev->dma_io_tlb_mem)
+   return 0;
+
+   /* Since multiple devices can share the same pool, the private data,
+* io_tlb_mem struct, will be initialized by the first device attached
+* to it.
+*/
+   if (!mem) {
+   mem = kzalloc(struct_size(mem, slots, nslabs), GFP_KERNEL);
+   if (!mem)
+   return -ENOMEM;
+#ifdef CONFIG_ARM
+   if (!PageHighMem(pfn_to_page(PHYS_PFN(rmem->base {
+   kfree(mem);
+   return -EINVAL;
+   }
+#endif /* CONFIG_ARM */
+   swiotlb_init_io_tlb_mem(mem, rmem->base, nslabs, false);
+
+   rmem->priv = mem;
+   }
+
+#ifdef CONFIG_DEBUG_FS
+   if (!io_tlb_default_mem->debugfs)
+   io_tlb_default_mem->debugfs =
+   debugfs_create_dir("swiotlb", NULL);


At this point it's possible for io_tlb_default_mem to be NULL, leading 
to a splat.


But even then if it's not and we have the situation where debugfs==NULL 
then the debugfs_create_dir() here will cause a subsequent attempt in 
swiotlb_create_debugfs() to fail (directory already exists) leading to 
mem->debugfs being assigned an error value. I suspect the creation of 
the debugfs directory needs to be separated from io_tlb_default_mem 
being set.


Other than that I gave this series a go with our prototype of Arm's 
Confidential Computer Architecture[1] - since the majority of the 
guest's memory is protected from the host the restricted DMA pool allows 
(only) a small area to be shared with the host.


After fixing (well hacking round) the above it all seems to be working 
fine with virtio drivers.


Thanks,

Steve

[1] 
https://www.arm.com/why-arm/architecture/security-features/arm-confidential-compute-architecture

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Re: [Intel-gfx] [PATCH] drm/i915: Fix docbook descriptions for i915_cmd_parser

[Maarten Lankhorst]

Op 22-04-2021 om 10:18 schreef Daniel Vetter:
> On Wed, Apr 21, 2021 at 04:39:10PM +0200, Maarten Lankhorst wrote:
>> Op 21-04-2021 om 16:32 schreef Daniel Vetter:
>>> On Wed, Apr 21, 2021 at 2:03 PM Maarten Lankhorst
>>>  wrote:
 Fixes the following htmldocs warnings:
 drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function 
 parameter 'trampoline' description in 'intel_engine_cmd_parser'
 drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter 
 or member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
 drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter 
 or member 'shadow_map' not described in 'intel_engine_cmd_parser'
 drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter 
 or member 'batch_map' not described in 'intel_engine_cmd_parser'
 drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function 
 parameter 'trampoline' description in 'intel_engine_cmd_parser'

 Reported-by: Stephen Rothwell 
 Signed-off-by: Maarten Lankhorst 
 ---
  drivers/gpu/drm/i915/i915_cmd_parser.c | 16 +++-
  1 file changed, 15 insertions(+), 1 deletion(-)

 diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c 
 b/drivers/gpu/drm/i915/i915_cmd_parser.c
 index e6f1e93a..afb9b7516999 100644
 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
 +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
 @@ -1369,6 +1369,18 @@ static int check_bbstart(u32 *cmd, u32 offset, u32 
 length,
 return 0;
  }

 +/**
 + * intel_engine_cmd_parser_alloc_jump_whitelist() - preallocate jump 
 whitelist for intel_engine_cmd_parser()
 + * @batch_length: length of the commands in batch_obj
 + * @trampoline: Whether jump trampolines are used.
 + *
 + * Preallocates a jump whitelist for parsing the cmd buffer in 
 intel_engine_cmd_parser().
 + * This has to be preallocated, because the command parser runs in 
 signaling context,
 + * and may not allocate any memory.
 + *
 + * Return: NULL or pointer to a jump whitelist, or ERR_PTR() on failure. 
 Use
 + * IS_ERR() to check for errors. Must bre freed() with kfree().
>>> IS_ERR_OR_NULL or needs an actual bugfix in the code since we're not
>>> consistent. Also s/bre/be/
>> We're sort of consistent, NULL is a valid return code. IS_ERR is only on 
>> faliure. :)
> Maybe explain that and then Reviewed-by: Daniel Vetter 
> 
>
> Cheers, Daniel
>
>>> -Daniel
>>>
 + */
  unsigned long *intel_engine_cmd_parser_alloc_jump_whitelist(u32 
 batch_length,
 bool 
 trampoline)
  {
 @@ -1401,7 +1413,9 @@ unsigned long 
 *intel_engine_cmd_parser_alloc_jump_whitelist(u32 batch_length,
   * @batch_offset: byte offset in the batch at which execution starts
   * @batch_length: length of the commands in batch_obj
   * @shadow: validated copy of the batch buffer in question
 - * @trampoline: whether to emit a conditional trampoline at the end of 
 the batch
 + * @jump_whitelist: buffer preallocated with 
 intel_engine_cmd_parser_alloc_jump_whitelist()
 + * @shadow_map: mapping to @shadow vma
 + * @batch_map: mapping to @batch vma
   *
   * Parses the specified batch buffer looking for privilege violations as
   * described in the overview.
 --
 2.31.0

Updated and pushed both, thanks. :)

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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 
(rev3)
URL   : https://patchwork.freedesktop.org/series/89348/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10001 -> Patchwork_19980


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_19980 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_19980, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_19980:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@execlists:
- fi-icl-y:   NOTRUN -> [DMESG-WARN][1] +1 similar issue
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-icl-y/igt@i915_selftest@l...@execlists.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_exec_suspend@basic-s3:
- {fi-cml-drallion}:  NOTRUN -> [INCOMPLETE][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-cml-drallion/igt@gem_exec_susp...@basic-s3.html

  
Known issues


  Here are the changes found in Patchwork_19980 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-icl-y:   NOTRUN -> [SKIP][3] ([fdo#109315]) +17 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-icl-y/igt@amdgpu/amd_ba...@semaphore.html

  * igt@amdgpu/amd_cs_nop@fork-gfx0:
- fi-tgl-y:   NOTRUN -> [SKIP][4] ([fdo#109315] / [i915#2575]) +4 
similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-tgl-y/igt@amdgpu/amd_cs_...@fork-gfx0.html

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-kbl-soraka:  NOTRUN -> [SKIP][5] ([fdo#109271]) +5 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-kbl-soraka/igt@amdgpu/amd_cs_...@sync-fork-compute0.html

  * igt@fbdev@write:
- fi-bdw-gvtdvm:  NOTRUN -> [SKIP][6] ([fdo#109271]) +5 similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-bdw-gvtdvm/igt@fb...@write.html

  * igt@gem_exec_suspend@basic-s0:
- fi-bdw-gvtdvm:  NOTRUN -> [INCOMPLETE][7] ([i915#146])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-bdw-gvtdvm/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_huc_copy@huc-copy:
- fi-icl-y:   NOTRUN -> [SKIP][8] ([i915#2190])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-icl-y/igt@gem_huc_c...@huc-copy.html

  * igt@i915_pm_rpm@module-reload:
- fi-kbl-guc: [PASS][9] -> [FAIL][10] ([i915#2203] / [i915#579])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10001/fi-kbl-guc/igt@i915_pm_...@module-reload.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-kbl-guc/igt@i915_pm_...@module-reload.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-icl-y:   NOTRUN -> [SKIP][11] ([fdo#109284] / [fdo#111827]) +8 
similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-icl-y/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-icl-y:   NOTRUN -> [SKIP][12] ([fdo#109285])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-icl-y/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-icl-y:   NOTRUN -> [SKIP][13] ([fdo#109278])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-icl-y/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@primary_mmap_gtt:
- fi-icl-y:   NOTRUN -> [SKIP][14] ([fdo#110189]) +3 similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-icl-y/igt@kms_psr@primary_mmap_gtt.html

  * igt@prime_vgem@basic-userptr:
- fi-icl-y:   NOTRUN -> [SKIP][15] ([i915#3301])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-icl-y/igt@prime_v...@basic-userptr.html

  * igt@runner@aborted:
- fi-bdw-5557u:   NOTRUN -> [FAIL][16] ([i915#1602] / [i915#2029])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19980/fi-bdw-5557u/igt@run...@aborted.html

  
 Possible fixes 

  * igt@kms_frontbuffer_tracking@basic:
- {fi-rkl-11500t}:[SKIP][17] ([i915#1849] / [i915#3180]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10001/fi-rkl-11500t/igt@kms_frontbuffer_track...@basic.html
   [18]: 

Re: [Intel-gfx] [PATCH 1/2] drm: Rename DP_PSR_SELECTIVE_UPDATE to better mach eDP spec

[Maarten Lankhorst]

Op 22-04-2021 om 13:00 schreef Mun, Gwan-gyeong:
> The changed name looks more accurate to the edp 1.4b spec.
> Looks good to me.
>
> Reviewed-by: Gwan-gyeong Mun 
>
> On Wed, 2021-04-21 at 15:02 -0700, José Roberto de Souza wrote:
>> DP_PSR_EN_CFG bit 5 aka "Selective Update Region Scan Line Capture
>> Indication" in eDP spec has a ambiguous name, so renaming to better
>> match specification.
>>
>> While at it, replacing bit shit by BIT() macro and adding the version
>> some registers were added to eDP specification.
>>
>> Cc: 
>> Cc: Rodrigo Vivi 
>> Cc: Jani Nikula 
>> Cc: Gwan-gyeong Mun 
>> Signed-off-by: José Roberto de Souza 
>> ---
>>  include/drm/drm_dp_helper.h | 16 
>>  1 file changed, 8 insertions(+), 8 deletions(-)
>>
>> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> index 1e85c2021f2f..d6f6a084a190 100644
>> --- a/include/drm/drm_dp_helper.h
>> +++ b/include/drm/drm_dp_helper.h
>> @@ -687,14 +687,14 @@ struct drm_device;
>>  #define DP_DSC_ENABLE   0x160   /* DP 1.4 */
>>  # define DP_DECOMPRESSION_EN    (1 << 0)
>>  
>> -#define DP_PSR_EN_CFG  0x170   /* XXX 1.2? */
>> -# define DP_PSR_ENABLE (1 << 0)
>> -# define DP_PSR_MAIN_LINK_ACTIVE   (1 << 1)
>> -# define DP_PSR_CRC_VERIFICATION   (1 << 2)
>> -# define DP_PSR_FRAME_CAPTURE  (1 << 3)
>> -# define DP_PSR_SELECTIVE_UPDATE   (1 << 4)
>> -# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORS (1 << 5)
>> -# define DP_PSR_ENABLE_PSR2    (1 << 6) /* eDP 1.4a */
>> +#define DP_PSR_EN_CFG  0x170   /* XXX 1.2? */
>> +# define DP_PSR_ENABLE BIT(0)
>> +# define DP_PSR_MAIN_LINK_ACTIVE   BIT(1)
>> +# define DP_PSR_CRC_VERIFICATION   BIT(2)
>> +# define DP_PSR_FRAME_CAPTURE  BIT(3)
>> +# define DP_PSR_SU_REGION_SCANLINE_CAPTURE BIT(4) /* eDP 1.4a */
>> +# define DP_PSR_IRQ_HPD_WITH_CRC_ERRORSBIT(5) /* eDP
>> 1.4a */
>> +# define DP_PSR_ENABLE_PSR2BIT(6) /* eDP 1.4a */
>>  
>>  #define DP_ADAPTER_CTRL    0x1a0
>>  # define DP_ADAPTER_CTRL_FORCE_LOAD_SENSE   (1 << 0)
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This should probably go throuh drm-misc-next, I don't see the next patch 
depending on this?

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[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Disable PSR2 if TGL Display stepping is B1 from A0 
(rev3)
URL   : https://patchwork.freedesktop.org/series/89348/
State : warning

== Summary ==

$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter 
or member 'ww' not described in 'i915_gem_shrink'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function 
parameter 'trampoline' description in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or 
member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or 
member 'shadow_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or 
member 'batch_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function 
parameter 'trampoline' description in 'intel_engine_cmd_parser'


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Re: [Intel-gfx] [PATCH v2] drm/i915: Invoke BXT _DSM to enable MUX on HP Workstation laptops

[Jani Nikula]

On Fri, 23 Apr 2021, Kai-Heng Feng  wrote:
> On HP Fury G7 Workstations, graphics output is re-routed from Intel GFX
> to discrete GFX after S3. This is not desirable, because userspace will
> treat connected display as a new one, losing display settings.
>
> The expected behavior is to let discrete GFX drives all external
> displays.
>
> The platform in question uses ACPI method \_SB.PCI0.HGME to enable MUX.
> The method is inside the BXT _DSM, so add the _DSM and call it
> accordingly.
>
> I also tested some MUX-less and iGPU only laptops with the BXT _DSM, no
> regression was found.

I don't know whether this change is the right thing to do. I don't know
if it isn't either. Need to look into it.

However, I have some general comments, inline.

>
> v2:
>  - Forward declare struct pci_dev.
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/3113
> References: 
> https://lore.kernel.org/intel-gfx/1460040732-31417-4-git-send-email-animesh.ma...@intel.com/
> Signed-off-by: Kai-Heng Feng 
> ---
>  drivers/gpu/drm/i915/display/intel_acpi.c | 17 +
>  drivers/gpu/drm/i915/display/intel_acpi.h |  3 +++
>  drivers/gpu/drm/i915/i915_drv.c   |  5 +
>  3 files changed, 25 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_acpi.c 
> b/drivers/gpu/drm/i915/display/intel_acpi.c
> index 833d0c1be4f1..c7b57c22dce3 100644
> --- a/drivers/gpu/drm/i915/display/intel_acpi.c
> +++ b/drivers/gpu/drm/i915/display/intel_acpi.c
> @@ -14,11 +14,16 @@
>  
>  #define INTEL_DSM_REVISION_ID 1 /* For Calpella anyway... */
>  #define INTEL_DSM_FN_PLATFORM_MUX_INFO 1 /* No args */
> +#define INTEL_DSM_FN_PLATFORM_BXT_MUX_INFO 0 /* No args */
>  
>  static const guid_t intel_dsm_guid =
>   GUID_INIT(0x7ed873d3, 0xc2d0, 0x4e4f,
> 0xa8, 0x54, 0x0f, 0x13, 0x17, 0xb0, 0x1c, 0x2c);
>  
> +static const guid_t intel_bxt_dsm_guid =
> + GUID_INIT(0x3e5b41c6, 0xeb1d, 0x4260,
> +   0x9d, 0x15, 0xc7, 0x1f, 0xba, 0xda, 0xe4, 0x14);
> +
>  static char *intel_dsm_port_name(u8 id)
>  {
>   switch (id) {
> @@ -176,6 +181,18 @@ void intel_unregister_dsm_handler(void)
>  {
>  }
>  
> +void intel_bxt_dsm_detect(struct pci_dev *pdev)

Please leave out bxt from the naming and make the argument struct
drm_i915_private *i915. Mmh, then it conflicts with existing
intel_dsm_detect(), maybe we need a more descriptive name altogether?

> +{
> + acpi_handle dhandle;
> +
> + dhandle = ACPI_HANDLE(>dev);
> + if (!dhandle)
> + return;
> +
> + acpi_evaluate_dsm(dhandle, _bxt_dsm_guid, INTEL_DSM_REVISION_ID,
> +   INTEL_DSM_FN_PLATFORM_BXT_MUX_INFO, NULL);
> +}
> +
>  /*
>   * ACPI Specification, Revision 5.0, Appendix B.3.2 _DOD (Enumerate All 
> Devices
>   * Attached to the Display Adapter).
> diff --git a/drivers/gpu/drm/i915/display/intel_acpi.h 
> b/drivers/gpu/drm/i915/display/intel_acpi.h
> index e8b068661d22..d2d560d63bb3 100644
> --- a/drivers/gpu/drm/i915/display/intel_acpi.h
> +++ b/drivers/gpu/drm/i915/display/intel_acpi.h
> @@ -6,15 +6,18 @@
>  #ifndef __INTEL_ACPI_H__
>  #define __INTEL_ACPI_H__
>  
> +struct pci_dev;
>  struct drm_i915_private;
>  
>  #ifdef CONFIG_ACPI
>  void intel_register_dsm_handler(void);
>  void intel_unregister_dsm_handler(void);
> +void intel_bxt_dsm_detect(struct pci_dev *pdev);
>  void intel_acpi_device_id_update(struct drm_i915_private *i915);
>  #else
>  static inline void intel_register_dsm_handler(void) { return; }
>  static inline void intel_unregister_dsm_handler(void) { return; }
> +static inline void intel_bxt_dsm_detect(struct pci_dev *pdev) { return; }
>  static inline
>  void intel_acpi_device_id_update(struct drm_i915_private *i915) { return; }
>  #endif /* CONFIG_ACPI */
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 785dcf20c77b..57b12068aab4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -853,6 +853,8 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
> pci_device_id *ent)
>   if (ret)
>   goto out_cleanup_gem;
>  
> + intel_bxt_dsm_detect(pdev);
> +

The call sites in i915_driver_probe() and i915_drm_resume() seem rather
arbitrary.

Long term, I'd like most or all of the display stuff like this placed in
appropriate intel_modeset_*() functions in display/intel_display.c. I'm
not keen on having new and very specific calls in the higher levels.

At probe, feels like the routing should happen earlier, before output
setup? In intel_modeset_init_nogem()?

>   i915_driver_register(i915);
>  
>   enable_rpm_wakeref_asserts(>runtime_pm);
> @@ -1215,6 +1217,7 @@ int i915_suspend_switcheroo(struct drm_i915_private 
> *i915, pm_message_t state)
>  static int i915_drm_resume(struct drm_device *dev)
>  {
>   struct drm_i915_private *dev_priv = to_i915(dev);
> + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
>   int ret;
>  
>   

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Invoke BXT _DSM to enable MUX on HP Workstation laptops (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Invoke BXT _DSM to enable MUX on HP Workstation laptops (rev2)
URL   : https://patchwork.freedesktop.org/series/89374/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_1_full -> Patchwork_19978_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Known issues


  Here are the changes found in Patchwork_19978_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@display-4x:
- shard-apl:  NOTRUN -> [SKIP][1] ([fdo#109271]) +114 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-apl1/igt@feature_discov...@display-4x.html

  * igt@gem_ctx_persistence@legacy-engines-hang:
- shard-snb:  NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099]) +1 
similar issue
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-snb2/igt@gem_ctx_persiste...@legacy-engines-hang.html

  * igt@gem_eio@unwedge-stress:
- shard-snb:  NOTRUN -> [FAIL][3] ([i915#3354])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-snb7/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][4] -> [FAIL][5] ([i915#2842])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_1/shard-iclb1/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-iclb3/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-none@vecs0:
- shard-kbl:  NOTRUN -> [FAIL][6] ([i915#2842])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-kbl1/igt@gem_exec_fair@basic-n...@vecs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2842])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_1/shard-tglb5/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-tglb6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
- shard-glk:  [PASS][9] -> [FAIL][10] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_1/shard-glk3/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-glk8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][11] -> [FAIL][12] ([i915#2849])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_1/shard-iclb4/igt@gem_exec_fair@basic-throt...@rcs0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-iclb8/igt@gem_exec_fair@basic-throt...@rcs0.html

  * igt@gem_mmap_gtt@big-copy-odd:
- shard-skl:  [PASS][13] -> [FAIL][14] ([i915#307]) +1 similar issue
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_1/shard-skl1/igt@gem_mmap_...@big-copy-odd.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-skl1/igt@gem_mmap_...@big-copy-odd.html

  * igt@gem_userptr_blits@vma-merge:
- shard-kbl:  NOTRUN -> [FAIL][15] ([i915#3318])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-kbl1/igt@gem_userptr_bl...@vma-merge.html

  * igt@i915_pm_dc@dc6-dpms:
- shard-skl:  NOTRUN -> [FAIL][16] ([i915#454])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-skl4/igt@i915_pm...@dc6-dpms.html

  * igt@kms_ccs@pipe-c-random-ccs-data:
- shard-snb:  NOTRUN -> [SKIP][17] ([fdo#109271]) +216 similar 
issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-snb2/igt@kms_...@pipe-c-random-ccs-data.html

  * igt@kms_chamelium@dp-crc-multiple:
- shard-apl:  NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) 
+12 similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-apl1/igt@kms_chamel...@dp-crc-multiple.html

  * igt@kms_chamelium@hdmi-audio-edid:
- shard-skl:  NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +7 
similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-skl4/igt@kms_chamel...@hdmi-audio-edid.html

  * igt@kms_chamelium@hdmi-hpd-storm:
- shard-kbl:  NOTRUN -> [SKIP][20] ([fdo#109271] / [fdo#111827]) 
+12 similar issues
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-kbl4/igt@kms_chamel...@hdmi-hpd-storm.html

  * igt@kms_color_chamelium@pipe-c-ctm-green-to-red:
- shard-snb:  NOTRUN -> [SKIP][21] ([fdo#109271] / [fdo#111827]) 
+10 similar issues
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19978/shard-snb6/igt@kms_color_chamel...@pipe-c-ctm-green-to-red.html

  * igt@kms_content_protection@atomic-dpms:
- shard-apl:  NOTRUN -> [TIMEOUT][22] ([i915#1319])
   [22]: 

Re: [Intel-gfx] [PATCH v5 01/16] swiotlb: Fix the type of index

[Christoph Hellwig]

On Thu, Apr 22, 2021 at 04:14:53PM +0800, Claire Chang wrote:
> Fix the type of index from unsigned int to int since find_slots() might
> return -1.
> 
> Fixes: 0774983bc923 ("swiotlb: refactor swiotlb_tbl_map_single")
> Signed-off-by: Claire Chang 

Looks good:

Reviewed-by: Christoph Hellwig 

it really should go into 5.12.  I'm not sure if Konrad is going to
be able to queue this up due to his vacation, so I'm tempted to just
queue it up in the dma-mapping tree.
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[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: Fix state mismatch in drm infoframe (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Fix state mismatch in drm infoframe (rev3)
URL   : https://patchwork.freedesktop.org/series/89225/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_1 -> Patchwork_19979


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_19979 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_19979, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19979/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_19979:

### CI changes ###

 Possible regressions 

  * boot:
- fi-hsw-4770:[PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_1/fi-hsw-4770/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19979/fi-hsw-4770/boot.html

  
Known issues


  Here are the changes found in Patchwork_19979 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@semaphore:
- fi-bdw-5557u:   NOTRUN -> [SKIP][3] ([fdo#109271]) +27 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19979/fi-bdw-5557u/igt@amdgpu/amd_ba...@semaphore.html

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-kbl-soraka:  NOTRUN -> [SKIP][4] ([fdo#109271]) +9 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19979/fi-kbl-soraka/igt@amdgpu/amd_cs_...@sync-fork-compute0.html

  * igt@amdgpu/amd_prime@amd-to-i915:
- fi-tgl-y:   NOTRUN -> [SKIP][5] ([fdo#109315] / [i915#2575])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19979/fi-tgl-y/igt@amdgpu/amd_pr...@amd-to-i915.html

  * igt@core_hotunplug@unbind-rebind:
- fi-bdw-5557u:   NOTRUN -> [WARN][6] ([i915#2283])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19979/fi-bdw-5557u/igt@core_hotunp...@unbind-rebind.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u:   NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) +8 
similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19979/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_heartbeat:
- {fi-jsl-1}: [DMESG-WARN][8] ([i915#1222]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_1/fi-jsl-1/igt@i915_selftest@live@gt_heartbeat.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19979/fi-jsl-1/igt@i915_selftest@live@gt_heartbeat.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1222]: https://gitlab.freedesktop.org/drm/intel/issues/1222
  [i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575


Participating hosts (41 -> 39)
--

  Missing(2): fi-bsw-cyan fi-bdw-samus 


Build changes
-

  * Linux: CI_DRM_1 -> Patchwork_19979

  CI-20190529: 20190529
  CI_DRM_1: 44407be4a35b68f51c6c64e57eb0cf797b9e2e5d @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6072: 0a51f49df9f5ca535fc0206a27a6780de6b52320 @ 
git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_19979: 970f1c51f3ec7f299c6ff04a45b92ee8cc4028f7 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

970f1c51f3ec drm/i915/display: Fix state mismatch in drm infoframe

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19979/index.html
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Re: [Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy

[Lionel Landwerlin]

On 21/04/2021 20:28, Umesh Nerlige Ramappa wrote:

Perf measurements rely on CPU and engine timestamps to correlate
events of interest across these time domains. Current mechanisms get
these timestamps separately and the calculated delta between these
timestamps lack enough accuracy.

To improve the accuracy of these time measurements to within a few us,
add a query that returns the engine and cpu timestamps captured as
close to each other as possible.

v2: (Tvrtko)
- document clock reference used
- return cpu timestamp always
- capture cpu time just before lower dword of cs timestamp

v3: (Chris)
- use uncore-rpm
- use __query_cs_timestamp helper

v4: (Lionel)
- Kernel perf subsytem allows users to specify the clock id to be used
   in perf_event_open. This clock id is used by the perf subsystem to
   return the appropriate cpu timestamp in perf events. Similarly, let
   the user pass the clockid to this query so that cpu timestamp
   corresponds to the clock id requested.

v5: (Tvrtko)
- Use normal ktime accessors instead of fast versions
- Add more uApi documentation

v6: (Lionel)
- Move switch out of spinlock

v7: (Chris)
- cs_timestamp is a misnomer, use cs_cycles instead
- return the cs cycle frequency as well in the query

v8:
- Add platform and engine specific checks

v9: (Lionel)
- Return 2 cpu timestamps in the query - captured before and after the
   register read

v10: (Chris)
- Use local_clock() to measure time taken to read lower dword of
   register and return it to user.

Signed-off-by: Umesh Nerlige Ramappa 
---
  drivers/gpu/drm/i915/i915_query.c | 145 ++
  include/uapi/drm/i915_drm.h   |  48 ++
  2 files changed, 193 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_query.c 
b/drivers/gpu/drm/i915/i915_query.c
index fed337ad7b68..25b96927ab92 100644
--- a/drivers/gpu/drm/i915/i915_query.c
+++ b/drivers/gpu/drm/i915/i915_query.c
@@ -6,6 +6,8 @@
  
  #include 
  
+#include "gt/intel_engine_pm.h"

+#include "gt/intel_engine_user.h"
  #include "i915_drv.h"
  #include "i915_perf.h"
  #include "i915_query.h"
@@ -90,6 +92,148 @@ static int query_topology_info(struct drm_i915_private 
*dev_priv,
return total_length;
  }
  
+typedef u64 (*__ktime_func_t)(void);

+static __ktime_func_t __clock_id_to_func(clockid_t clk_id)
+{
+   /*
+* Use logic same as the perf subsystem to allow user to select the
+* reference clock id to be used for timestamps.
+*/
+   switch (clk_id) {
+   case CLOCK_MONOTONIC:
+   return _get_ns;
+   case CLOCK_MONOTONIC_RAW:
+   return _get_raw_ns;
+   case CLOCK_REALTIME:
+   return _get_real_ns;
+   case CLOCK_BOOTTIME:
+   return _get_boottime_ns;
+   case CLOCK_TAI:
+   return _get_clocktai_ns;
+   default:
+   return NULL;
+   }
+}
+
+static inline int
+__read_timestamps(struct intel_uncore *uncore,
+ i915_reg_t lower_reg,
+ i915_reg_t upper_reg,
+ u64 *cs_ts,
+ u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+   u32 upper, lower, old_upper, loop = 0;
+
+   upper = intel_uncore_read_fw(uncore, upper_reg);
+   do {
+   cpu_ts[1] = local_clock();
+   cpu_ts[0] = cpu_clock();
+   lower = intel_uncore_read_fw(uncore, lower_reg);
+   cpu_ts[1] = local_clock() - cpu_ts[1];
+   old_upper = upper;
+   upper = intel_uncore_read_fw(uncore, upper_reg);
+   } while (upper != old_upper && loop++ < 2);
+
+   *cs_ts = (u64)upper << 32 | lower;
+
+   return 0;
+}
+
+static int
+__query_cs_cycles(struct intel_engine_cs *engine,
+ u64 *cs_ts, u64 *cpu_ts,
+ __ktime_func_t cpu_clock)
+{
+   struct intel_uncore *uncore = engine->uncore;
+   enum forcewake_domains fw_domains;
+   u32 base = engine->mmio_base;
+   intel_wakeref_t wakeref;
+   int ret;
+
+   fw_domains = intel_uncore_forcewake_for_reg(uncore,
+   RING_TIMESTAMP(base),
+   FW_REG_READ);
+
+   with_intel_runtime_pm(uncore->rpm, wakeref) {
+   spin_lock_irq(>lock);
+   intel_uncore_forcewake_get__locked(uncore, fw_domains);
+
+   ret = __read_timestamps(uncore,
+   RING_TIMESTAMP(base),
+   RING_TIMESTAMP_UDW(base),
+   cs_ts,
+   cpu_ts,
+   cpu_clock);
+
+   intel_uncore_forcewake_put__locked(uncore, fw_domains);
+   spin_unlock_irq(>lock);
+   }
+
+   return ret;
+}
+
+static int
+query_cs_cycles(struct drm_i915_private *i915,
+   struct drm_i915_query_item 

[Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/display: Fix state mismatch in drm infoframe (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Fix state mismatch in drm infoframe (rev3)
URL   : https://patchwork.freedesktop.org/series/89225/
State : warning

== Summary ==

$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_shrinker.c:102: warning: Function parameter 
or member 'ww' not described in 'i915_gem_shrink'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function 
parameter 'trampoline' description in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or 
member 'jump_whitelist' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or 
member 'shadow_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Function parameter or 
member 'batch_map' not described in 'intel_engine_cmd_parser'
./drivers/gpu/drm/i915/i915_cmd_parser.c:1420: warning: Excess function 
parameter 'trampoline' description in 'intel_engine_cmd_parser'


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Re: [Intel-gfx] [PATCH v4] drm/doc/rfc: i915 DG1 uAPI

[Dave Airlie]

On Tue, 20 Apr 2021 at 02:45, Matthew Auld  wrote:
>
> Add an entry for the new uAPI needed for DG1. Also add the overall
> upstream plan, including some notes for the TTM conversion.
>
> v2(Daniel):
>   - include the overall upstreaming plan
>   - add a note for mmap, there are differences here for TTM vs i915
>   - bunch of other suggestions from Daniel
> v3:
>  (Daniel)
>   - add a note for set/get caching stuff
>   - add some more docs for existing query and extensions stuff
>   - add an actual code example for regions query
>   - bunch of other stuff
>  (Jason)
>   - uAPI change(!):
> - try a simpler design with the placements extension
> - rather than have a generic setparam which can cover multiple
>   use cases, have each extension be responsible for one thing
>   only
> v4:
>  (Daniel)
>   - add some more notes for ttm conversion
>   - bunch of other stuff
>  (Jason)
>   - uAPI change(!):
> - drop all the extra rsvd members for the region_query and
>   region_info, just keep the bare minimum needed for padding

Staying out of the ioctl's being over engineering, I hope they have a
good future use case.

The plan seems like a good plan.

Acked-by: Dave Airlie 

Dave.
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[Intel-gfx] [V3] drm/i915/display: Fix state mismatch in drm infoframe

[Bhanuprakash Modem]

While reading the SDP infoframe, we are getting filtered with
the encoder type INTEL_OUTPUT_DDI which causes the infoframe
mismatch. This patch will drop encoder->type check as we can
mask individual infoframe type.

[1025.606556] i915 :00:02.0: [drm] *ERROR* mismatch in drm infoframe
[1025.607865] i915 :00:02.0: [drm] *ERROR* expected:
[1025.607879] i915 :00:02.0: HDMI infoframe: Dynamic Range and Mastering, 
version 1, length 26
[1025.607889] i915 :00:02.0: length: 26
[1025.607898] i915 :00:02.0: metadata type: 0
[1025.608292] i915 :00:02.0: eotf: 2
[1025.608302] i915 :00:02.0: x[0]: 35400
[1025.608312] i915 :00:02.0: y[0]: 14599
[1025.609115] i915 :00:02.0: x[1]: 8500
[1025.609947] i915 :00:02.0: y[1]: 39850
[1025.609959] i915 :00:02.0: x[2]: 6550
[1025.609970] i915 :00:02.0: y[2]: 2300
[1025.609980] i915 :00:02.0: white point x: 15634
[1025.609989] i915 :00:02.0: white point y: 16450
[1025.610381] i915 :00:02.0: max_display_mastering_luminance: 1000
[1025.610392] i915 :00:02.0: min_display_mastering_luminance: 500
[1025.610401] i915 :00:02.0: max_cll: 500
[1025.610816] i915 :00:02.0: max_fall: 1000
[1025.612457] i915 :00:02.0: [drm] *ERROR* found:
[1025.614354] [ cut here ]
[1025.616244] pipe state doesn't match!
[1025.617640] WARNING: CPU: 6 PID: 2114 at 
drivers/gpu/drm/i915/display/intel_display.c:9332 
intel_atomic_commit_tail+0x14d4/0x17c0 [i915]

V2:
* Drop encoder->type check

V3:
* Remove internal reviews

Cc: Uma Shankar 
Cc: Ville Syrjälä 
Signed-off-by: Bhanuprakash Modem 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 4ad12dde5938..280b0b5ee70e 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3014,9 +3014,6 @@ void intel_read_dp_sdp(struct intel_encoder *encoder,
   struct intel_crtc_state *crtc_state,
   unsigned int type)
 {
-   if (encoder->type != INTEL_OUTPUT_DDI)
-   return;
-
switch (type) {
case DP_SDP_VSC:
intel_read_dp_vsc_sdp(encoder, crtc_state,
-- 
2.20.1

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