[Intel-gfx] [PATCH v2] drm/i915/gt: move remaining debugfs interfaces into gt

[Andi Shyti]

From: Andi Shyti 

The following interfaces:

  i915_wedged
  i915_forcewake_user
  i915_gem_interrupt

are dependent on gt values. Put them inside gt/ and drop the
"i915_" prefix name. This would be the new structure:

  dri/0/gt
  |
  +-- forcewake_user
  |
  +-- interrupt_info
  |
  \-- reset

For backwards compatibility with existing igt (and the slight
semantic difference between operating on the i915 abi entry
points and the deep gt info):

  dri/0
  |
  +-- i915_wedged
  |
  \-- i915_forcewake_user

remain at the top level.

Signed-off-by: Andi Shyti 
Cc: Tvrtko Ursulin 
Cc: Chris Wilson 
---
Hi,

I am reproposing this patch exactly as it was proposed initially
where the original interfaces are kept where they have been
originally placed. It might generate some duplicated code but,
well, it's debugfs and I don't see any issue. In the future we
can transform the upper interfaces to act upon all the GTs and
provide information from all the GTs. This is, for example, how
the sysfs interfaces will act.

The reason I removed them in V1 is because igt as only user is
not a strong reason to keep duplicated code, but as Chris
suggested offline:

"It's debugfs, igt is the primary consumer. CI has to be bridged over
changes to the interfaces it is using in any case, as you want
comparable results before/after the patches land.

For i915_forcewake_user, it's not just igt testing, but part of the
tools/ packaged up by distro. That makes it a very strong candidate to be
moved out of debugfs into sysfs/gt."

I, therefore, repropose this patch with the idea of improving the
behavior of the upper level interfaces as described above.

Thanks,
Andi

Changelog:
--
v1 -> v2:
 * keep the original interfaces intact (thanks Chris).

 drivers/gpu/drm/i915/Makefile |   1 +
 drivers/gpu/drm/i915/gt/intel_gt_debugfs.c|  47 -
 .../gpu/drm/i915/gt/intel_gt_irq_debugfs.c| 178 ++
 .../gpu/drm/i915/gt/intel_gt_irq_debugfs.h|  15 ++
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c |  31 +++
 5 files changed, 271 insertions(+), 1 deletion(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_irq_debugfs.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_irq_debugfs.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index cdc244bbbfc1..e92984954ba8 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -98,6 +98,7 @@ gt-y += \
gt/intel_gt_debugfs.o \
gt/intel_gt_engines_debugfs.o \
gt/intel_gt_irq.o \
+   gt/intel_gt_irq_debugfs.o \
gt/intel_gt_pm.o \
gt/intel_gt_pm_debugfs.o \
gt/intel_gt_pm_irq.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c 
b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
index 1fe19ccd2794..d3075c138585 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
@@ -8,11 +8,54 @@
 #include "i915_drv.h"
 #include "intel_gt_debugfs.h"
 #include "intel_gt_engines_debugfs.h"
+#include "intel_gt_irq_debugfs.h"
+#include "intel_gt_pm.h"
 #include "intel_gt_pm_debugfs.h"
+#include "intel_gt_requests.h"
 #include "intel_sseu_debugfs.h"
 #include "pxp/intel_pxp_debugfs.h"
 #include "uc/intel_uc_debugfs.h"
 
+static int reset_show(void *data, u64 *val)
+{
+   struct intel_gt *gt = data;
+   int ret = intel_gt_terminally_wedged(gt);
+
+   switch (ret) {
+   case -EIO:
+   *val = 1;
+   return 0;
+   case 0:
+   *val = 0;
+   return 0;
+   default:
+   return ret;
+   }
+}
+
+static int reset_store(void *data, u64 val)
+{
+   struct intel_gt *gt = data;
+
+   /* Flush any previous reset before applying for a new one */
+   wait_event(gt->reset.queue,
+  !test_bit(I915_RESET_BACKOFF, >reset.flags));
+
+   intel_gt_handle_error(gt, val, I915_ERROR_CAPTURE,
+ "Manually reset engine mask to %llx", val);
+   return 0;
+}
+DEFINE_SIMPLE_ATTRIBUTE(reset_fops, reset_show, reset_store, "%llu\n");
+
+static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
+{
+   static const struct intel_gt_debugfs_file files[] = {
+   { "reset", _fops, NULL },
+   };
+
+   intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
+}
+
 void intel_gt_debugfs_register(struct intel_gt *gt)
 {
struct dentry *root;
@@ -24,10 +67,12 @@ void intel_gt_debugfs_register(struct intel_gt *gt)
if (IS_ERR(root))
return;
 
+   gt_debugfs_register(gt, root);
+
intel_gt_engines_debugfs_register(gt, root);
intel_gt_pm_debugfs_register(gt, root);
+   intel_gt_irq_debugfs_register(gt, root);
intel_sseu_debugfs_register(gt, root);
-
intel_uc_debugfs_register(>uc, root);
intel_pxp_debugfs_register(>pxp, root);
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq_debugfs.c 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/gt: move remaining debugfs interfaces into gt (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915/gt: move remaining debugfs interfaces into gt (rev8)
URL   : https://patchwork.freedesktop.org/series/75333/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10696_full -> Patchwork_21288_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21288_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21288_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21288_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_crc@pipe-d-cursor-64x21-random:
- shard-tglb: [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-tglb8/igt@kms_cursor_...@pipe-d-cursor-64x21-random.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-tglb7/igt@kms_cursor_...@pipe-d-cursor-64x21-random.html

  * igt@kms_invalid_mode@clock-too-high:
- shard-tglb: NOTRUN -> [SKIP][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-tglb1/igt@kms_invalid_m...@clock-too-high.html

  
Known issues


  Here are the changes found in Patchwork_21288_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@chamelium:
- shard-tglb: NOTRUN -> [SKIP][4] ([fdo#111827])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-tglb5/igt@feature_discov...@chamelium.html

  * igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-kbl:  [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +4 similar 
issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-kbl6/igt@gem_ctx_isolation@preservation...@rcs0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-kbl4/igt@gem_ctx_isolation@preservation...@rcs0.html

  * igt@gem_ctx_persistence@legacy-engines-queued:
- shard-snb:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) +1 
similar issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-snb2/igt@gem_ctx_persiste...@legacy-engines-queued.html

  * igt@gem_ctx_sseu@invalid-args:
- shard-tglb: NOTRUN -> [SKIP][8] ([i915#280])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-tglb6/igt@gem_ctx_s...@invalid-args.html

  * igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][9] -> [TIMEOUT][10] ([i915#2369] / [i915#3063] 
/ [i915#3648])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-tglb7/igt@gem_...@unwedge-stress.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-tglb5/igt@gem_...@unwedge-stress.html
- shard-skl:  [PASS][11] -> [TIMEOUT][12] ([i915#2369] / 
[i915#3063])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-skl3/igt@gem_...@unwedge-stress.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-skl7/igt@gem_...@unwedge-stress.html
- shard-snb:  NOTRUN -> [FAIL][13] ([i915#3354])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-snb2/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-tglb: [PASS][14] -> [FAIL][15] ([i915#2842])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-tglb5/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-tglb8/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: NOTRUN -> [FAIL][16] ([i915#2842]) +4 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-tglb6/igt@gem_exec_fair@basic-p...@bcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-kbl:  [PASS][17] -> [FAIL][18] ([i915#2842])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-kbl7/igt@gem_exec_fair@basic-p...@rcs0.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-kbl1/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_suspend@basic-s3:
- shard-apl:  [PASS][19] -> [DMESG-WARN][20] ([i915#180])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-apl1/igt@gem_exec_susp...@basic-s3.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-apl1/igt@gem_exec_susp...@basic-s3.html

  * igt@gem_huc_copy@huc-copy:
- shard-apl:  NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#2190])
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/shard-apl1/igt@gem_huc_c...@huc-copy.html

  * igt@gem_pread@exhaustion:
- shard-snb:  

Re: [Intel-gfx] [PATCH] drm/i915/gem: Check function return in live_nop_switch

[kernel test robot]

Hi Oak,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on drm-tip/drm-tip v5.15-rc4 next-20211007]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:
https://github.com/0day-ci/linux/commits/Oak-Zeng/drm-i915-gem-Check-function-return-in-live_nop_switch/20211008-055247
base:   git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-a016-20211004 (attached as .config)
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
reproduce (this is a W=1 build):
# 
https://github.com/0day-ci/linux/commit/2d7a26805f7bf806f78efb6542a16f67ed8bc58c
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review 
Oak-Zeng/drm-i915-gem-Check-function-return-in-live_nop_switch/20211008-055247
git checkout 2d7a26805f7bf806f78efb6542a16f67ed8bc58c
# save the attached .config to linux build tree
make W=1 ARCH=x86_64 

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot 

All error/warnings (new ones prefixed by >>):

   In file included from drivers/gpu/drm/i915/gem/i915_gem_context.c:2279:
   drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c: In function 
'live_nop_switch':
>> drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:94:26: error: implicit 
>> declaration of function 'to_gt'; did you mean 'uc_to_gt'? 
>> [-Werror=implicit-function-declaration]
  94 |  intel_gt_set_wedged(to_gt(i915));
 |  ^
 |  uc_to_gt
>> drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:94:26: warning: 
>> passing argument 1 of 'intel_gt_set_wedged' makes pointer from integer 
>> without a cast [-Wint-conversion]
  94 |  intel_gt_set_wedged(to_gt(i915));
 |  ^~~
 |  |
 |  int
   In file included from drivers/gpu/drm/i915/gt/intel_gtt.h:28,
from drivers/gpu/drm/i915/gt/gen6_ppgtt.h:9,
from drivers/gpu/drm/i915/gem/i915_gem_context.c:72:
   drivers/gpu/drm/i915/gt/intel_reset.h:44:43: note: expected 'struct intel_gt 
*' but argument is of type 'int'
  44 | void intel_gt_set_wedged(struct intel_gt *gt);
 |  ~^~
   cc1: some warnings being treated as errors


vim +94 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c

35  
36  static int live_nop_switch(void *arg)
37  {
38  const unsigned int nctx = 1024;
39  struct drm_i915_private *i915 = arg;
40  struct intel_engine_cs *engine;
41  struct i915_gem_context **ctx;
42  struct igt_live_test t;
43  struct file *file;
44  unsigned long n;
45  int err = -ENODEV;
46  
47  /*
48   * Create as many contexts as we can feasibly get away with
49   * and check we can switch between them rapidly.
50   *
51   * Serves as very simple stress test for submission and HW 
switching
52   * between contexts.
53   */
54  
55  if (!DRIVER_CAPS(i915)->has_logical_contexts)
56  return 0;
57  
58  file = mock_file(i915);
59  if (IS_ERR(file))
60  return PTR_ERR(file);
61  
62  ctx = kcalloc(nctx, sizeof(*ctx), GFP_KERNEL);
63  if (!ctx) {
64  err = -ENOMEM;
65  goto out_file;
66  }
67  
68  for (n = 0; n < nctx; n++) {
69  ctx[n] = live_context(i915, file);
70  if (IS_ERR(ctx[n])) {
71  err = PTR_ERR(ctx[n]);
72  goto out_file;
73  }
74  }
75  
76  for_each_uabi_engine(engine, i915) {
77  struct i915_request *rq = NULL;
78  unsigned long end_time, prime;
79  ktime_t times[2] = {};
80  
81  times[0] = ktime_get_raw();
82  for (n = 0; n < nctx; n++) {
83  struct i915_request *this;
84  
85  this = igt_request_alloc(ctx[n], engine);
86  if (IS_ERR(this)) {
87  err = PTR_ERR(this);
88  goto out_file;
89  }
90  if (rq) {
91  if (i915_request_await_dma_fence(this,
92

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: move remaining debugfs interfaces into gt (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915/gt: move remaining debugfs interfaces into gt (rev8)
URL   : https://patchwork.freedesktop.org/series/75333/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10696 -> Patchwork_21288


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/index.html

Known issues


  Here are the changes found in Patchwork_21288 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@cs-gfx:
- fi-skl-6700k2:  NOTRUN -> [SKIP][1] ([fdo#109271]) +31 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-skl-6700k2/igt@amdgpu/amd_ba...@cs-gfx.html
- fi-kbl-soraka:  NOTRUN -> [SKIP][2] ([fdo#109271]) +5 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-kbl-soraka/igt@amdgpu/amd_ba...@cs-gfx.html

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600:NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html

  * igt@gem_huc_copy@huc-copy:
- fi-skl-6700k2:  NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-skl-6700k2/igt@gem_huc_c...@huc-copy.html

  * igt@kms_chamelium@dp-crc-fast:
- fi-kbl-7500u:   [PASS][5] -> [FAIL][6] ([i915#1372])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-kbl-7500u/igt@kms_chamel...@dp-crc-fast.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2:  [PASS][7] -> [DMESG-WARN][8] ([i915#4269])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-6700k2:  NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#533])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-skl-6700k2/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2:  [FAIL][10] ([i915#1888]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_exec_suspend@basic-s3:
- fi-tgl-1115g4:  [FAIL][12] ([i915#1888]) -> [PASS][13] +1 similar 
issue
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html
- fi-skl-6700k2:  [INCOMPLETE][14] ([i915#146] / [i915#198]) -> 
[PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-r:   [DMESG-FAIL][16] ([i915#2291] / [i915#541]) -> 
[PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[INCOMPLETE][18] ([i915#3921]) -> [PASS][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21288/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1372]: https://gitlab.freedesktop.org/drm/intel/issues/1372
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541


Participating hosts (44 -> 37)
--

  Missing(7): fi-ilk-m540 bat-dg1-6 fi-hsw-4200u fi-glk-dsi 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Simplify handling of modifiers (rev9)

[Patchwork]

== Series Details ==

Series: drm/i915: Simplify handling of modifiers (rev9)
URL   : https://patchwork.freedesktop.org/series/95579/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10696_full -> Patchwork_21287_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21287_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21287_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21287_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_invalid_mode@clock-too-high:
- shard-tglb: NOTRUN -> [SKIP][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-tglb3/igt@kms_invalid_m...@clock-too-high.html

  * igt@kms_universal_plane@cursor-fb-leak-pipe-c:
- shard-tglb: [PASS][2] -> [FAIL][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-tglb1/igt@kms_universal_pl...@cursor-fb-leak-pipe-c.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-tglb8/igt@kms_universal_pl...@cursor-fb-leak-pipe-c.html

  
Known issues


  Here are the changes found in Patchwork_21287_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@feature_discovery@chamelium:
- shard-tglb: NOTRUN -> [SKIP][4] ([fdo#111827])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-tglb5/igt@feature_discov...@chamelium.html

  * igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-apl:  [PASS][5] -> [DMESG-WARN][6] ([i915#180]) +1 similar 
issue
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-apl8/igt@gem_ctx_isolation@preservation...@rcs0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-apl3/igt@gem_ctx_isolation@preservation...@rcs0.html

  * igt@gem_ctx_persistence@legacy-engines-queued:
- shard-snb:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1099]) +1 
similar issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-snb5/igt@gem_ctx_persiste...@legacy-engines-queued.html

  * igt@gem_ctx_sseu@invalid-args:
- shard-tglb: NOTRUN -> [SKIP][8] ([i915#280])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-tglb3/igt@gem_ctx_s...@invalid-args.html

  * igt@gem_eio@in-flight-suspend:
- shard-apl:  NOTRUN -> [DMESG-WARN][9] ([i915#180]) +1 similar 
issue
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-apl3/igt@gem_...@in-flight-suspend.html

  * igt@gem_eio@unwedge-stress:
- shard-skl:  [PASS][10] -> [TIMEOUT][11] ([i915#2369] / 
[i915#3063])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-skl3/igt@gem_...@unwedge-stress.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-skl4/igt@gem_...@unwedge-stress.html
- shard-snb:  NOTRUN -> [FAIL][12] ([i915#3354])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-snb5/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-tglb: [PASS][13] -> [FAIL][14] ([i915#2842])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-tglb5/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-tglb6/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: NOTRUN -> [FAIL][15] ([i915#2842]) +3 similar issues
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-tglb3/igt@gem_exec_fair@basic-p...@bcs0.html

  * igt@gem_exec_fair@basic-pace@vcs0:
- shard-kbl:  [PASS][16] -> [FAIL][17] ([i915#2842])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-kbl7/igt@gem_exec_fair@basic-p...@vcs0.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-kbl1/igt@gem_exec_fair@basic-p...@vcs0.html

  * igt@gem_exec_reloc@basic-write-gtt:
- shard-skl:  [PASS][18] -> [DMESG-WARN][19] ([i915#1982])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-skl1/igt@gem_exec_re...@basic-write-gtt.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-skl8/igt@gem_exec_re...@basic-write-gtt.html

  * igt@gem_exec_whisper@basic-contexts:
- shard-glk:  [PASS][20] -> [DMESG-WARN][21] ([i915#118])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-glk2/igt@gem_exec_whis...@basic-contexts.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/shard-glk1/igt@gem_exec_whis...@basic-contexts.html

  * 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: move remaining debugfs interfaces into gt (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915/gt: move remaining debugfs interfaces into gt (rev8)
URL   : https://patchwork.freedesktop.org/series/75333/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
81673b413127 drm/i915/gt: move remaining debugfs interfaces into gt
-:125: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#125: 
new file mode 100644

-:258: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#258: FILE: drivers/gpu/drm/i915/gt/intel_gt_irq_debugfs.c:129:
+  intel_uncore_read(uncore,
+   GEN12_VCS4_VCS5_INTR_MASK));

-:262: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#262: FILE: drivers/gpu/drm/i915/gt/intel_gt_irq_debugfs.c:133:
+  intel_uncore_read(uncore,
+   GEN12_VCS6_VCS7_INTR_MASK));

-:271: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#271: FILE: drivers/gpu/drm/i915/gt/intel_gt_irq_debugfs.c:142:
+  intel_uncore_read(uncore,
+   GEN12_VECS2_VECS3_INTR_MASK));

total: 0 errors, 1 warnings, 3 checks, 310 lines checked

Re: [Intel-gfx] [PATCH 08/26] drm/i915/guc: Add multi-lrc context registration

[Matthew Brost]

On Thu, Oct 07, 2021 at 12:50:28PM -0700, John Harrison wrote:
> On 10/4/2021 15:06, Matthew Brost wrote:
> > Add multi-lrc context registration H2G. In addition a workqueue and
> > process descriptor are setup during multi-lrc context registration as
> > these data structures are needed for multi-lrc submission.
> > 
> > v2:
> >   (John Harrison)
> >- Move GuC specific fields into sub-struct
> >- Clean up WQ defines
> >- Add comment explaining math to derive WQ / PD address
> > 
> > Signed-off-by: Matthew Brost 
> > ---
> >   drivers/gpu/drm/i915/gt/intel_context_types.h |  12 ++
> >   drivers/gpu/drm/i915/gt/intel_lrc.c   |   5 +
> >   .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |   1 +
> >   drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   2 -
> >   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 114 +-
> >   5 files changed, 131 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h 
> > b/drivers/gpu/drm/i915/gt/intel_context_types.h
> > index 76dfca57cb45..48decb5ee954 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_context_types.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
> > @@ -239,6 +239,18 @@ struct intel_context {
> > struct intel_context *parent;
> > /** @number_children: number of children if parent */
> > u8 number_children;
> > +   /** @guc: GuC specific members for parallel submission */
> > +   struct {
> > +   /** @wqi_head: head pointer in work queue */
> > +   u16 wqi_head;
> > +   /** @wqi_tail: tail pointer in work queue */
> > +   u16 wqi_tail;
> > +   /**
> > +* @parent_page: page in context state (ce->state) used
> > +* by parent for work queue, process descriptor
> > +*/
> > +   u8 parent_page;
> > +   } guc;
> > } parallel;
> >   #ifdef CONFIG_DRM_I915_SELFTEST
> > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
> > b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > index 3ef9eaf8c50e..57339d5c1fc8 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > @@ -942,6 +942,11 @@ __lrc_alloc_state(struct intel_context *ce, struct 
> > intel_engine_cs *engine)
> > context_size += PAGE_SIZE;
> > }
> > +   if (intel_context_is_parent(ce) && intel_engine_uses_guc(engine)) {
> > +   ce->parallel.guc.parent_page = context_size / PAGE_SIZE;
> > +   context_size += PAGE_SIZE;
> > +   }
> > +
> > obj = i915_gem_object_create_lmem(engine->i915, context_size,
> >   I915_BO_ALLOC_PM_VOLATILE);
> > if (IS_ERR(obj))
> > diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h 
> > b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
> > index 8ff58aff..ba10bd374cee 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
> > +++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
> > @@ -142,6 +142,7 @@ enum intel_guc_action {
> > INTEL_GUC_ACTION_REGISTER_COMMAND_TRANSPORT_BUFFER = 0x4505,
> > INTEL_GUC_ACTION_DEREGISTER_COMMAND_TRANSPORT_BUFFER = 0x4506,
> > INTEL_GUC_ACTION_DEREGISTER_CONTEXT_DONE = 0x4600,
> > +   INTEL_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC = 0x4601,
> > INTEL_GUC_ACTION_RESET_CLIENT = 0x5507,
> > INTEL_GUC_ACTION_LIMIT
> >   };
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h 
> > b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> > index fa4be13c8854..0eeb2a9feeed 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
> > @@ -52,8 +52,6 @@
> >   #define GUC_DOORBELL_INVALID  256
> > -#define GUC_WQ_SIZE(PAGE_SIZE * 2)
> > -
> >   /* Work queue item header definitions */
> >   #define WQ_STATUS_ACTIVE  1
> >   #define WQ_STATUS_SUSPENDED   2
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
> > b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > index 451d9ae861a6..ab6d7fc1b0b1 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > @@ -344,6 +344,45 @@ static inline struct i915_priolist *to_priolist(struct 
> > rb_node *rb)
> > return rb_entry(rb, struct i915_priolist, node);
> >   }
> > +/*
> > + * When using multi-lrc submission an extra page in the context state is
> > + * reserved for the process descriptor and work queue.
> > + *
> > + * The layout of this page is below:
> > + * 0   guc_process_desc
> > + * ... unused
> > + * PAGE_SIZE / 2   work queue start
> > + * ... work queue
> > + * PAGE_SIZE - 1   work queue 

Re: [Intel-gfx] [PATCH 02/26] drm/i915/guc: Take GT PM ref when deregistering context

[Matthew Brost]

On Wed, Oct 06, 2021 at 08:37:03PM -0700, John Harrison wrote:
> On 10/4/2021 15:06, Matthew Brost wrote:
> > Taking a PM reference to prevent intel_gt_wait_for_idle from short
> > circuiting while a deregister context H2G is in flight. To do this must
> > issue the deregister H2G from a worker as context can be destroyed from
> > an atomic context and taking GT PM ref blows up. Previously we took a
> > runtime PM from this atomic context which worked but will stop working
> > once runtime pm autosuspend in enabled.
> > 
> > So this patch is two fold, stop intel_gt_wait_for_idle from short
> > circuting and fix runtime pm autosuspend.
> > 
> > v2:
> >   (John Harrison)
> >- Split structure changes out in different patch
> >   (Tvrtko)
> >- Don't drop lock in deregister_destroyed_contexts
> > 
> > Signed-off-by: Matthew Brost 
> > ---
> >   drivers/gpu/drm/i915/gt/intel_context.c   |   2 +
> >   drivers/gpu/drm/i915/gt/intel_context_types.h |   7 +
> >   drivers/gpu/drm/i915/gt/intel_engine_pm.h |   5 +
> >   drivers/gpu/drm/i915/gt/intel_gt_pm.h |   4 +
> >   drivers/gpu/drm/i915/gt/uc/intel_guc.h|  11 ++
> >   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 146 +++---
> >   6 files changed, 121 insertions(+), 54 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/intel_context.c 
> > b/drivers/gpu/drm/i915/gt/intel_context.c
> > index e9a0cad5c34d..1076066f41e0 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_context.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_context.c
> > @@ -399,6 +399,8 @@ intel_context_init(struct intel_context *ce, struct 
> > intel_engine_cs *engine)
> > ce->guc_id.id = GUC_INVALID_LRC_ID;
> > INIT_LIST_HEAD(>guc_id.link);
> > +   INIT_LIST_HEAD(>destroyed_link);
> > +
> > /*
> >  * Initialize fence to be complete as this is expected to be complete
> >  * unless there is a pending schedule disable outstanding.
> > diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h 
> > b/drivers/gpu/drm/i915/gt/intel_context_types.h
> > index e7e3984aab78..4613d027cbc3 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_context_types.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
> > @@ -213,6 +213,13 @@ struct intel_context {
> > struct list_head link;
> > } guc_id;
> > +   /**
> > +* @destroyed_link: link in guc->submission_state.destroyed_contexts, in
> > +* list when context is pending to be destroyed (deregistered with the
> > +* GuC), protected by guc->submission_state.lock
> > +*/
> > +   struct list_head destroyed_link;
> > +
> >   #ifdef CONFIG_DRM_I915_SELFTEST
> > /**
> >  * @drop_schedule_enable: Force drop of schedule enable G2H for selftest
> > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.h 
> > b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
> > index 8520c595f5e1..6fdeae668e6e 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
> > @@ -16,6 +16,11 @@ intel_engine_pm_is_awake(const struct intel_engine_cs 
> > *engine)
> > return intel_wakeref_is_active(>wakeref);
> >   }
> > +static inline void __intel_engine_pm_get(struct intel_engine_cs *engine)
> > +{
> > +   __intel_wakeref_get(>wakeref);
> > +}
> > +
> >   static inline void intel_engine_pm_get(struct intel_engine_cs *engine)
> >   {
> > intel_wakeref_get(>wakeref);
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h 
> > b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> > index d0588d8aaa44..05de6c1af25b 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> > @@ -41,6 +41,10 @@ static inline void intel_gt_pm_put_async(struct intel_gt 
> > *gt)
> > intel_wakeref_put_async(>wakeref);
> >   }
> > +#define with_intel_gt_pm(gt, tmp) \
> > +   for (tmp = 1, intel_gt_pm_get(gt); tmp; \
> > +intel_gt_pm_put(gt), tmp = 0)
> > +
> >   static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
> >   {
> > return intel_wakeref_wait_for_idle(>wakeref);
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
> > b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> > index 65b5e8eeef96..25a598e2b6e8 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> > @@ -84,6 +84,17 @@ struct intel_guc {
> >  * refs
> >  */
> > struct list_head guc_id_list;
> > +   /**
> > +* @destroyed_contexts: list of contexts waiting to be destroyed
> > +* (deregistered with the GuC)
> > +*/
> > +   struct list_head destroyed_contexts;
> > +   /**
> > +* @destroyed_worker: worker to deregister contexts, need as we
> > +* need to take a GT PM reference and can't from destroy
> > +* function as it might be in an atomic context (no sleeping)
> > +*/
> > +   struct work_struct destroyed_worker;
> > } submission_state;
> 

Re: [Intel-gfx] [PATCH 03/26] drm/i915/guc: Take engine PM when a context is pinned with GuC submission

[Matthew Brost]

On Thu, Oct 07, 2021 at 11:15:51AM -0700, John Harrison wrote:
> On 10/7/2021 08:19, Matthew Brost wrote:
> > On Wed, Oct 06, 2021 at 08:45:42PM -0700, John Harrison wrote:
> > > On 10/4/2021 15:06, Matthew Brost wrote:
> > > > Taking a PM reference to prevent intel_gt_wait_for_idle from short
> > > > circuiting while a scheduling of user context could be enabled.
> > > I'm not sure what 'while a scheduling of user context could be enabled'
> > > means.
> > > 
> > Not really sure how this isn't clear.
> > 
> > It means if a user context has scheduling enabled this function cannot
> > short circuit returning idle.
> > 
> > Matt
> Okay. The 'a scheduling' was throwing me off. And I was reading 'could be
> enabled' as saying something that might happen in the future. English is
> great at being ambiguous ;). Maybe 'while any user context has scheduling
> enabled' would be simpler?
> 

Sure.

Matt

> John.
> 
> > > John.
> > > 
> > > > Returning GT idle when it is not can cause all sorts of issues
> > > > throughout the stack.
> > > > 
> > > > v2:
> > > >(Daniel Vetter)
> > > > - Add might_lock annotations to pin / unpin function
> > > > v3:
> > > >(CI)
> > > > - Drop intel_engine_pm_might_put from unpin path as an async put is
> > > >   used
> > > > v4:
> > > >(John Harrison)
> > > > - Make intel_engine_pm_might_get/put work with GuC virtual engines
> > > > - Update commit message
> > > > 
> > > > Signed-off-by: Matthew Brost 
> > > > ---
> > > >drivers/gpu/drm/i915/gt/intel_context.c   |  2 ++
> > > >drivers/gpu/drm/i915/gt/intel_engine_pm.h | 32 +
> > > >drivers/gpu/drm/i915/gt/intel_gt_pm.h | 10 ++
> > > >.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 36 
> > > > +--
> > > >drivers/gpu/drm/i915/intel_wakeref.h  | 12 +++
> > > >5 files changed, 89 insertions(+), 3 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/gt/intel_context.c 
> > > > b/drivers/gpu/drm/i915/gt/intel_context.c
> > > > index 1076066f41e0..f601323b939f 100644
> > > > --- a/drivers/gpu/drm/i915/gt/intel_context.c
> > > > +++ b/drivers/gpu/drm/i915/gt/intel_context.c
> > > > @@ -240,6 +240,8 @@ int __intel_context_do_pin_ww(struct intel_context 
> > > > *ce,
> > > > if (err)
> > > > goto err_post_unpin;
> > > > +   intel_engine_pm_might_get(ce->engine);
> > > > +
> > > > if (unlikely(intel_context_is_closed(ce))) {
> > > > err = -ENOENT;
> > > > goto err_unlock;
> > > > diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.h 
> > > > b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
> > > > index 6fdeae668e6e..d68675925b79 100644
> > > > --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.h
> > > > +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
> > > > @@ -6,9 +6,11 @@
> > > >#ifndef INTEL_ENGINE_PM_H
> > > >#define INTEL_ENGINE_PM_H
> > > > +#include "i915_drv.h"
> > > >#include "i915_request.h"
> > > >#include "intel_engine_types.h"
> > > >#include "intel_wakeref.h"
> > > > +#include "intel_gt_pm.h"
> > > >static inline bool
> > > >intel_engine_pm_is_awake(const struct intel_engine_cs *engine)
> > > > @@ -31,6 +33,21 @@ static inline bool 
> > > > intel_engine_pm_get_if_awake(struct intel_engine_cs *engine)
> > > > return intel_wakeref_get_if_active(>wakeref);
> > > >}
> > > > +static inline void intel_engine_pm_might_get(struct intel_engine_cs 
> > > > *engine)
> > > > +{
> > > > +   if (!intel_engine_is_virtual(engine)) {
> > > > +   intel_wakeref_might_get(>wakeref);
> > > > +   } else {
> > > > +   struct intel_gt *gt = engine->gt;
> > > > +   struct intel_engine_cs *tengine;
> > > > +   intel_engine_mask_t tmp, mask = engine->mask;
> > > > +
> > > > +   for_each_engine_masked(tengine, gt, mask, tmp)
> > > > +   intel_wakeref_might_get(>wakeref);
> > > > +   }
> > > > +   intel_gt_pm_might_get(engine->gt);
> > > > +}
> > > > +
> > > >static inline void intel_engine_pm_put(struct intel_engine_cs 
> > > > *engine)
> > > >{
> > > > intel_wakeref_put(>wakeref);
> > > > @@ -52,6 +69,21 @@ static inline void intel_engine_pm_flush(struct 
> > > > intel_engine_cs *engine)
> > > > intel_wakeref_unlock_wait(>wakeref);
> > > >}
> > > > +static inline void intel_engine_pm_might_put(struct intel_engine_cs 
> > > > *engine)
> > > > +{
> > > > +   if (!intel_engine_is_virtual(engine)) {
> > > > +   intel_wakeref_might_put(>wakeref);
> > > > +   } else {
> > > > +   struct intel_gt *gt = engine->gt;
> > > > +   struct intel_engine_cs *tengine;
> > > > +   intel_engine_mask_t tmp, mask = engine->mask;
> > > > +
> > > > +   for_each_engine_masked(tengine, gt, mask, tmp)
> > > > +   intel_wakeref_might_put(>wakeref);

Re: [Intel-gfx] [PATCH 10/26] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids

[Matthew Brost]

On Thu, Oct 07, 2021 at 03:03:04PM -0700, John Harrison wrote:
> On 10/4/2021 15:06, Matthew Brost wrote:
> > Assign contexts in parent-child relationship consecutive guc_ids. This
> > is accomplished by partitioning guc_id space between ones that need to
> > be consecutive (1/16 available guc_ids) and ones that do not (15/16 of
> > available guc_ids). The consecutive search is implemented via the bitmap
> > API.
> > 
> > This is a precursor to the full GuC multi-lrc implementation but aligns
> > to how GuC mutli-lrc interface is defined - guc_ids must be consecutive
> > when using the GuC multi-lrc interface.
> > 
> > v2:
> >   (Daniel Vetter)
> >- Explicitly state why we assign consecutive guc_ids
> > v3:
> >   (John Harrison)
> >- Bring back in spin lock
> > 
> > Signed-off-by: Matthew Brost 
> > ---
> >   drivers/gpu/drm/i915/gt/uc/intel_guc.h|   6 +-
> >   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 104 ++
> >   2 files changed, 86 insertions(+), 24 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
> > b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> > index 25a598e2b6e8..a9f4ec972bfb 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
> > @@ -76,9 +76,13 @@ struct intel_guc {
> >  */
> > spinlock_t lock;
> > /**
> > -* @guc_ids: used to allocate new guc_ids
> > +* @guc_ids: used to allocate new guc_ids, single-lrc
> >  */
> > struct ida guc_ids;
> > +   /**
> > +* @guc_ids_bitmap: used to allocate new guc_ids, multi-lrc
> > +*/
> > +   unsigned long *guc_ids_bitmap;
> > /**
> >  * @guc_id_list: list of intel_context with valid guc_ids but no
> >  * refs
> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
> > b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > index 1f2809187513..79e7732e83b2 100644
> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
> > @@ -128,6 +128,16 @@ guc_create_virtual(struct intel_engine_cs **siblings, 
> > unsigned int count);
> >   #define GUC_REQUEST_SIZE 64 /* bytes */
> > +/*
> > + * We reserve 1/16 of the guc_ids for multi-lrc as these need to be 
> > contiguous
> > + * per the GuC submission interface. A different allocation algorithm is 
> > used
> > + * (bitmap vs. ida) between multi-lrc and single-lrc hence the reason to
> > + * partition the guc_id space. We believe the number of multi-lrc contexts 
> > in
> > + * use should be low and 1/16 should be sufficient. Minimum of 32 guc_ids 
> > for
> > + * multi-lrc.
> > + */
> > +#define NUMBER_MULTI_LRC_GUC_ID(GUC_MAX_LRC_DESCRIPTORS / 16)
> > +
> >   /*
> >* Below is a set of functions which control the GuC scheduling state 
> > which
> >* require a lock.
> > @@ -1206,6 +1216,11 @@ int intel_guc_submission_init(struct intel_guc *guc)
> > INIT_WORK(>submission_state.destroyed_worker,
> >   destroyed_worker_func);
> > +   guc->submission_state.guc_ids_bitmap =
> > +   bitmap_zalloc(NUMBER_MULTI_LRC_GUC_ID, GFP_KERNEL);
> > +   if (!guc->submission_state.guc_ids_bitmap)
> > +   return -ENOMEM;
> > +
> > return 0;
> >   }
> > @@ -1217,6 +1232,7 @@ void intel_guc_submission_fini(struct intel_guc *guc)
> > guc_lrc_desc_pool_destroy(guc);
> > guc_flush_destroyed_contexts(guc);
> > i915_sched_engine_put(guc->sched_engine);
> > +   bitmap_free(guc->submission_state.guc_ids_bitmap);
> >   }
> >   static inline void queue_request(struct i915_sched_engine *sched_engine,
> > @@ -1268,18 +1284,43 @@ static void guc_submit_request(struct i915_request 
> > *rq)
> > spin_unlock_irqrestore(_engine->lock, flags);
> >   }
> > -static int new_guc_id(struct intel_guc *guc)
> > +static int new_guc_id(struct intel_guc *guc, struct intel_context *ce)
> >   {
> > -   return ida_simple_get(>submission_state.guc_ids, 0,
> > - GUC_MAX_LRC_DESCRIPTORS, GFP_KERNEL |
> > - __GFP_RETRY_MAYFAIL | __GFP_NOWARN);
> > +   int ret;
> > +
> > +   GEM_BUG_ON(intel_context_is_child(ce));
> > +
> > +   if (intel_context_is_parent(ce))
> > +   ret = 
> > bitmap_find_free_region(guc->submission_state.guc_ids_bitmap,
> > + NUMBER_MULTI_LRC_GUC_ID,
> > + 
> > order_base_2(ce->parallel.number_children
> > +  + 1));
> > +   else
> > +   ret = ida_simple_get(>submission_state.guc_ids,
> > +NUMBER_MULTI_LRC_GUC_ID,
> > +GUC_MAX_LRC_DESCRIPTORS,
> > +GFP_KERNEL | __GFP_RETRY_MAYFAIL |
> > +__GFP_NOWARN);
> > +   if (unlikely(ret 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Simplify handling of modifiers (rev9)

[Patchwork]

== Series Details ==

Series: drm/i915: Simplify handling of modifiers (rev9)
URL   : https://patchwork.freedesktop.org/series/95579/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10696 -> Patchwork_21287


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/index.html

Known issues


  Here are the changes found in Patchwork_21287 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@cs-gfx:
- fi-skl-6700k2:  NOTRUN -> [SKIP][1] ([fdo#109271]) +31 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-skl-6700k2/igt@amdgpu/amd_ba...@cs-gfx.html

  * igt@core_hotunplug@unbind-rebind:
- fi-bwr-2160:[PASS][2] -> [FAIL][3] ([i915#3194])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-bwr-2160/igt@core_hotunp...@unbind-rebind.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-bwr-2160/igt@core_hotunp...@unbind-rebind.html

  * igt@gem_huc_copy@huc-copy:
- fi-skl-6700k2:  NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-skl-6700k2/igt@gem_huc_c...@huc-copy.html

  * igt@i915_selftest@live@gt_lrc:
- fi-bsw-n3050:   [PASS][5] -> [DMESG-FAIL][6] ([i915#2373])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-bsw-n3050/igt@i915_selftest@live@gt_lrc.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-bsw-n3050/igt@i915_selftest@live@gt_lrc.html

  * igt@kms_flip@basic-flip-vs-modeset@c-dp1:
- fi-cfl-8109u:   [PASS][7] -> [FAIL][8] ([i915#4165]) +1 similar issue
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-cfl-8109u/igt@kms_flip@basic-flip-vs-mode...@c-dp1.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-cfl-8109u/igt@kms_flip@basic-flip-vs-mode...@c-dp1.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
- fi-cfl-8109u:   [PASS][9] -> [DMESG-WARN][10] ([i915#295]) +18 
similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-6700k2:  NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#533])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-skl-6700k2/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s3:
- fi-tgl-1115g4:  [FAIL][12] ([i915#1888]) -> [PASS][13] +1 similar 
issue
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html
- fi-skl-6700k2:  [INCOMPLETE][14] ([i915#146] / [i915#198]) -> 
[PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-r:   [DMESG-FAIL][16] ([i915#2291] / [i915#541]) -> 
[PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- {fi-hsw-gt1}:   [DMESG-WARN][18] ([i915#3303]) -> [PASS][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-hsw-gt1/igt@i915_selftest@l...@hangcheck.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21287/fi-hsw-gt1/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#2373]: https://gitlab.freedesktop.org/drm/intel/issues/2373
  [i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
  [i915#3194]: https://gitlab.freedesktop.org/drm/intel/issues/3194
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#4165]: 

Re: [Intel-gfx] [PATCH 3/3] drm/i915/display: remove unused intel-mid.h include

[Souza, Jose]

On Thu, 2021-10-07 at 16:32 -0700, Lucas De Marchi wrote:
> Nothing from intel-mid.h and this is only available on x86, so remove it
> as we prepare support for other architectures.

Whole series is
Reviewed-by: José Roberto de Souza 

> 
> Signed-off-by: Lucas De Marchi 
> ---
>  drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c 
> b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> index c2a2cd1f84dc..61c2ef6a4b8c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
> @@ -31,7 +31,6 @@
>  #include 
>  #include 
>  
> -#include 
>  #include 
>  
>  #include 

Re: [Intel-gfx] [PATCH 03/26] drm/i915/guc: Take engine PM when a context is pinned with GuC submission

[John Harrison]

On 10/7/2021 08:19, Matthew Brost wrote:

On Wed, Oct 06, 2021 at 08:45:42PM -0700, John Harrison wrote:

On 10/4/2021 15:06, Matthew Brost wrote:

Taking a PM reference to prevent intel_gt_wait_for_idle from short
circuiting while a scheduling of user context could be enabled.

I'm not sure what 'while a scheduling of user context could be enabled'
means.


Not really sure how this isn't clear.

It means if a user context has scheduling enabled this function cannot
short circuit returning idle.

Matt
Okay. The 'a scheduling' was throwing me off. And I was reading 'could 
be enabled' as saying something that might happen in the future. English 
is great at being ambiguous ;). Maybe 'while any user context has 
scheduling enabled' would be simpler?


John.

  

John.


Returning GT idle when it is not can cause all sorts of issues
throughout the stack.

v2:
   (Daniel Vetter)
- Add might_lock annotations to pin / unpin function
v3:
   (CI)
- Drop intel_engine_pm_might_put from unpin path as an async put is
  used
v4:
   (John Harrison)
- Make intel_engine_pm_might_get/put work with GuC virtual engines
- Update commit message

Signed-off-by: Matthew Brost 
---
   drivers/gpu/drm/i915/gt/intel_context.c   |  2 ++
   drivers/gpu/drm/i915/gt/intel_engine_pm.h | 32 +
   drivers/gpu/drm/i915/gt/intel_gt_pm.h | 10 ++
   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 36 +--
   drivers/gpu/drm/i915/intel_wakeref.h  | 12 +++
   5 files changed, 89 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_context.c 
b/drivers/gpu/drm/i915/gt/intel_context.c
index 1076066f41e0..f601323b939f 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -240,6 +240,8 @@ int __intel_context_do_pin_ww(struct intel_context *ce,
if (err)
goto err_post_unpin;
+   intel_engine_pm_might_get(ce->engine);
+
if (unlikely(intel_context_is_closed(ce))) {
err = -ENOENT;
goto err_unlock;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.h 
b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
index 6fdeae668e6e..d68675925b79 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
@@ -6,9 +6,11 @@
   #ifndef INTEL_ENGINE_PM_H
   #define INTEL_ENGINE_PM_H
+#include "i915_drv.h"
   #include "i915_request.h"
   #include "intel_engine_types.h"
   #include "intel_wakeref.h"
+#include "intel_gt_pm.h"
   static inline bool
   intel_engine_pm_is_awake(const struct intel_engine_cs *engine)
@@ -31,6 +33,21 @@ static inline bool intel_engine_pm_get_if_awake(struct 
intel_engine_cs *engine)
return intel_wakeref_get_if_active(>wakeref);
   }
+static inline void intel_engine_pm_might_get(struct intel_engine_cs *engine)
+{
+   if (!intel_engine_is_virtual(engine)) {
+   intel_wakeref_might_get(>wakeref);
+   } else {
+   struct intel_gt *gt = engine->gt;
+   struct intel_engine_cs *tengine;
+   intel_engine_mask_t tmp, mask = engine->mask;
+
+   for_each_engine_masked(tengine, gt, mask, tmp)
+   intel_wakeref_might_get(>wakeref);
+   }
+   intel_gt_pm_might_get(engine->gt);
+}
+
   static inline void intel_engine_pm_put(struct intel_engine_cs *engine)
   {
intel_wakeref_put(>wakeref);
@@ -52,6 +69,21 @@ static inline void intel_engine_pm_flush(struct 
intel_engine_cs *engine)
intel_wakeref_unlock_wait(>wakeref);
   }
+static inline void intel_engine_pm_might_put(struct intel_engine_cs *engine)
+{
+   if (!intel_engine_is_virtual(engine)) {
+   intel_wakeref_might_put(>wakeref);
+   } else {
+   struct intel_gt *gt = engine->gt;
+   struct intel_engine_cs *tengine;
+   intel_engine_mask_t tmp, mask = engine->mask;
+
+   for_each_engine_masked(tengine, gt, mask, tmp)
+   intel_wakeref_might_put(>wakeref);
+   }
+   intel_gt_pm_might_put(engine->gt);
+}
+
   static inline struct i915_request *
   intel_engine_create_kernel_request(struct intel_engine_cs *engine)
   {
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h 
b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index 05de6c1af25b..bc898df7a48c 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -31,6 +31,11 @@ static inline bool intel_gt_pm_get_if_awake(struct intel_gt 
*gt)
return intel_wakeref_get_if_active(>wakeref);
   }
+static inline void intel_gt_pm_might_get(struct intel_gt *gt)
+{
+   intel_wakeref_might_get(>wakeref);
+}
+
   static inline void intel_gt_pm_put(struct intel_gt *gt)
   {
intel_wakeref_put(>wakeref);
@@ -41,6 +46,11 @@ static inline void intel_gt_pm_put_async(struct intel_gt *gt)
intel_wakeref_put_async(>wakeref);
   }
+static inline void 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Simplify handling of modifiers (rev9)

[Patchwork]

== Series Details ==

Series: drm/i915: Simplify handling of modifiers (rev9)
URL   : https://patchwork.freedesktop.org/series/95579/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_fb.c:132:3: warning: symbol 
'intel_modifiers' was not declared. Should it be static?
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1392:5: warning: context imbalance in 
'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 
16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 
16777216
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative 
(-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative 
(-262080)
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write16' 
- different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write32' 
- different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write8' 
- different lock contexts for basic block

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Simplify handling of modifiers (rev9)

[Patchwork]

== Series Details ==

Series: drm/i915: Simplify handling of modifiers (rev9)
URL   : https://patchwork.freedesktop.org/series/95579/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
bdfa60b8fbc5 drm/i915: Add a table with a descriptor for all i915 modifiers
e97b1f8c3ad0 drm/i915: Move intel_get_format_info() to intel_fb.c
-:267: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'format_list' - possible 
side-effects?
#267: FILE: drivers/gpu/drm/i915/display/intel_fb.c:109:
+#define FORMAT_OVERRIDE(format_list) \
+   .formats = format_list, \
+   .format_count = ARRAY_SIZE(format_list)

total: 0 errors, 0 warnings, 1 checks, 358 lines checked
06b0cc3e787d drm/i915: Add tiling attribute to the modifier descriptor
bc77c73f768e drm/i915: Simplify the modifier check for interlaced scanout 
support
5cd326dde5f2 drm/i915: Unexport is_semiplanar_uv_plane()
5282dd95ba72 drm/i915: Move intel_format_info_is_yuv_semiplanar() to intel_fb.c
a143347efd15 drm/i915: Add a platform independent way to get the RC CCS CC plane
749c3e2b2297 drm/i915: Handle CCS CC planes separately from CCS control planes
5af0a07cd551 drm/i915: Add a platform independent way to check for CCS control 
planes
-:247: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#247: FILE: drivers/gpu/drm/i915/display/intel_fb.c:1207:
+   unsigned int min_stride = intel_fb_is_ccs_ctrl_plane(>base, 
color_plane) ? 2 : 8;

total: 0 errors, 1 warnings, 0 checks, 228 lines checked
69716ae77a44 drm/i915: Move is_ccs_modifier() to intel_fb.c
cd25a5607e73 drm/i915: Add functions to check for RC CCS CC and MC CCS modifiers

[Intel-gfx] ✗ Fi.CI.BAT: failure for Fixup header includes

[Patchwork]

== Series Details ==

Series: Fixup header includes
URL   : https://patchwork.freedesktop.org/series/95587/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10696 -> Patchwork_21286


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21286 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21286, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21286:

### IGT changes ###

 Possible regressions 

  * igt@core_auth@basic-auth:
- fi-kbl-8809g:   [PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-kbl-8809g/igt@core_a...@basic-auth.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-kbl-8809g/igt@core_a...@basic-auth.html

  * igt@core_hotunplug@unbind-rebind:
- fi-tgl-u2:  [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-tgl-u2/igt@core_hotunp...@unbind-rebind.html

  
Known issues


  Here are the changes found in Patchwork_21286 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@cs-gfx:
- fi-skl-6700k2:  NOTRUN -> [SKIP][5] ([fdo#109271]) +31 similar issues
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-skl-6700k2/igt@amdgpu/amd_ba...@cs-gfx.html

  * igt@gem_huc_copy@huc-copy:
- fi-skl-6700k2:  NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-skl-6700k2/igt@gem_huc_c...@huc-copy.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-6700k2:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#533])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-skl-6700k2/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  * igt@runner@aborted:
- fi-kbl-8809g:   NOTRUN -> [FAIL][8] ([i915#3363])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-kbl-8809g/igt@run...@aborted.html
- fi-tgl-u2:  NOTRUN -> [FAIL][9] ([i915#1602] / [i915#2722])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-tgl-u2/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2:  [FAIL][10] ([i915#1888]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_exec_suspend@basic-s3:
- fi-skl-6700k2:  [INCOMPLETE][12] ([i915#146] / [i915#198]) -> 
[PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-r:   [DMESG-FAIL][14] ([i915#2291] / [i915#541]) -> 
[PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- {fi-hsw-gt1}:   [DMESG-WARN][16] ([i915#3303]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-hsw-gt1/igt@i915_selftest@l...@hangcheck.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21286/fi-hsw-gt1/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#533]: 

[Intel-gfx] [PATCH v2 11/11] drm/i915: Add functions to check for RC CCS CC and MC CCS modifiers

[Imre Deak]

Instead of open-coding the checks add functions for this, simplifying
the handling of CCS modifiers on future platforms.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_fb.c   | 24 +++
 drivers/gpu/drm/i915/display/intel_fb.h   |  2 ++
 .../drm/i915/display/skl_universal_plane.c|  4 ++--
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index cf84b1ce6a485..da8cc5e47aa1b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -274,6 +274,30 @@ bool intel_fb_is_ccs_modifier(u64 modifier)
return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_ANY);
 }
 
+/**
+ * intel_fb_is_rc_ccs_cc_modifier: Check if a modifier is an RC CCS CC 
modifier type
+ * @modifier: Modifier to check
+ *
+ * Returns:
+ * Returns %true if @modifier is a render with color clear modifier.
+ */
+bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier)
+{
+   return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_RC_CC);
+}
+
+/**
+ * intel_fb_is_mc_ccs_modifier: Check if a modifier is an MC CCS modifier type
+ * @modifier: Modifier to check
+ *
+ * Returns:
+ * Returns %true if @modifier is a media compression modifier.
+ */
+bool intel_fb_is_mc_ccs_modifier(u64 modifier)
+{
+   return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_MC);
+}
+
 static bool plane_has_modifier(struct drm_i915_private *i915,
   enum intel_plane_caps plane_caps,
   const struct intel_modifier_desc *md)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h 
b/drivers/gpu/drm/i915/display/intel_fb.h
index b05c3f64b6f0c..c39bf840edb2c 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -31,6 +31,8 @@ enum intel_plane_caps {
 };
 
 bool intel_fb_is_ccs_modifier(u64 modifier);
+bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier);
+bool intel_fb_is_mc_ccs_modifier(u64 modifier);
 
 bool intel_fb_is_ccs_ctrl_plane(const struct drm_framebuffer *fb, int plane);
 int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb);
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 82dd3c0cc49ea..e3346da4884d1 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1067,7 +1067,7 @@ skl_program_plane(struct intel_plane *plane,
if (fb->format->is_yuv && icl_is_hdr_plane(dev_priv, plane_id))
icl_program_input_csc(plane, crtc_state, plane_state);
 
-   if (fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC)
+   if (intel_fb_is_rc_ccs_cc_modifier(fb->modifier))
intel_uncore_write64_fw(_priv->uncore,
PLANE_CC_VAL(pipe, plane_id), 
plane_state->ccval);
 
@@ -1899,7 +1899,7 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
-   if (modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS)
+   if (intel_fb_is_mc_ccs_modifier(modifier))
return true;
fallthrough;
case DRM_FORMAT_RGB565:
-- 
2.27.0

[Intel-gfx] [PATCH v2 03/11] drm/i915: Add tiling attribute to the modifier descriptor

[Imre Deak]

Add a tiling atttribute to the modifier descriptor, which let's us
get the tiling without listing the modifiers twice.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_fb.c | 20 
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index 920de857ffa28..c15d17d2983d4 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -116,6 +116,7 @@ const struct intel_modifier_desc {
const struct drm_format_info *formats;
int format_count;
u8 is_linear:1;
+   u8 tiling;
 
struct {
 #define INTEL_CCS_RC   BIT(0)
@@ -134,10 +135,12 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_X_TILED,
.display_versions = DISPLAY_VER_MASK_ALL,
+   .tiling = I915_TILING_X,
},
{
.id = I915_FORMAT_MOD_Y_TILED,
.display_versions = DISPLAY_VER_MASK(9, 13),
+   .tiling = I915_TILING_Y,
},
{
.id = I915_FORMAT_MOD_Yf_TILED,
@@ -146,6 +149,7 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_Y_TILED_CCS,
.display_versions = DISPLAY_VER_MASK(9, 11),
+   .tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC,
 
@@ -162,6 +166,7 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
.display_versions = DISPLAY_VER_MASK(12, 13),
+   .tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC,
 
@@ -170,6 +175,7 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC,
.display_versions = DISPLAY_VER_MASK(12, 13),
+   .tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC_CC,
 
@@ -178,6 +184,7 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,
.display_versions = DISPLAY_VER_MASK(12, 13),
+   .tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_MC,
 
@@ -529,18 +536,7 @@ intel_fb_align_height(const struct drm_framebuffer *fb,
 
 static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)
 {
-   switch (fb_modifier) {
-   case I915_FORMAT_MOD_X_TILED:
-   return I915_TILING_X;
-   case I915_FORMAT_MOD_Y_TILED:
-   case I915_FORMAT_MOD_Y_TILED_CCS:
-   case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
-   case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
-   case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
-   return I915_TILING_Y;
-   default:
-   return I915_TILING_NONE;
-   }
+   return lookup_modifier(fb_modifier)->tiling;
 }
 
 unsigned int intel_cursor_alignment(const struct drm_i915_private *i915)
-- 
2.27.0

[Intel-gfx] [PATCH v2 10/11] drm/i915: Move is_ccs_modifier() to intel_fb.c

[Imre Deak]

Move the function to intel_fb.c and rename it adding the intel_fb_
prefix following the naming of exported functions.

Signed-off-by: Imre Deak 
---
 .../drm/i915/display/intel_display_types.h|  9 --
 drivers/gpu/drm/i915/display/intel_fb.c   | 29 ++-
 drivers/gpu/drm/i915/display/intel_fb.h   |  2 ++
 .../drm/i915/display/skl_universal_plane.c| 12 
 4 files changed, 29 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index b4b6a31caf4e3..f38b70ef6afaa 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -2041,13 +2041,4 @@ to_intel_frontbuffer(struct drm_framebuffer *fb)
return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL;
 }
 
-static inline bool is_ccs_modifier(u64 modifier)
-{
-   return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
-  modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
-  modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
-  modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
-  modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
-}
-
 #endif /*  __INTEL_DISPLAY_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index 85a2eaaa7cad8..cf84b1ce6a485 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -261,6 +261,19 @@ static bool is_ccs_type_modifier(const struct 
intel_modifier_desc *md, u8 ccs_ty
return md->ccs.type & ccs_type;
 }
 
+/**
+ * intel_fb_is_ccs_modifier: Check if a modifier is a CCS modifier type
+ * @modifier: Modifier to check
+ *
+ * Returns:
+ * Returns %true if @modifier is a render, render with color clear or
+ * media compression modifier.
+ */
+bool intel_fb_is_ccs_modifier(u64 modifier)
+{
+   return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_ANY);
+}
+
 static bool plane_has_modifier(struct drm_i915_private *i915,
   enum intel_plane_caps plane_caps,
   const struct intel_modifier_desc *md)
@@ -446,7 +459,7 @@ bool is_surface_linear(const struct drm_framebuffer *fb, 
int color_plane)
 
 int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane)
 {
-   drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
+   drm_WARN_ON(fb->dev, !intel_fb_is_ccs_modifier(fb->modifier) ||
(main_plane && main_plane >= fb->format->num_planes / 2));
 
return fb->format->num_planes / 2 + main_plane;
@@ -454,7 +467,7 @@ int main_to_ccs_plane(const struct drm_framebuffer *fb, int 
main_plane)
 
 int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane)
 {
-   drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
+   drm_WARN_ON(fb->dev, !intel_fb_is_ccs_modifier(fb->modifier) ||
ccs_plane < fb->format->num_planes / 2);
 
if (is_gen12_ccs_cc_plane(fb, ccs_plane))
@@ -499,7 +512,7 @@ int skl_main_to_aux_plane(const struct drm_framebuffer *fb, 
int main_plane)
 {
struct drm_i915_private *i915 = to_i915(fb->dev);
 
-   if (is_ccs_modifier(fb->modifier))
+   if (intel_fb_is_ccs_modifier(fb->modifier))
return main_to_ccs_plane(fb, main_plane);
else if (DISPLAY_VER(i915) < 11 &&
 intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
@@ -1063,7 +1076,7 @@ static bool intel_plane_can_remap(const struct 
intel_plane_state *plane_state)
 * The new CCS hash mode isn't compatible with remapping as
 * the virtual address of the pages affects the compressed data.
 */
-   if (is_ccs_modifier(fb->modifier))
+   if (intel_fb_is_ccs_modifier(fb->modifier))
return false;
 
/* Linear needs a page aligned stride for remapping */
@@ -1470,7 +1483,7 @@ static void intel_plane_remap_gtt(struct 
intel_plane_state *plane_state)
src_w = drm_rect_width(_state->uapi.src) >> 16;
src_h = drm_rect_height(_state->uapi.src) >> 16;
 
-   drm_WARN_ON(>drm, is_ccs_modifier(fb->modifier));
+   drm_WARN_ON(>drm, intel_fb_is_ccs_modifier(fb->modifier));
 
/* Make src coordinates relative to the viewport */
drm_rect_translate(_state->uapi.src,
@@ -1533,7 +1546,7 @@ u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
 *
 * The new CCS hash mode makes remapping impossible
 */
-   if (DISPLAY_VER(dev_priv) < 4 || is_ccs_modifier(modifier) ||
+   if (DISPLAY_VER(dev_priv) < 4 || intel_fb_is_ccs_modifier(modifier) ||
intel_modifier_uses_dpt(dev_priv, modifier))
return intel_plane_fb_max_stride(dev_priv, pixel_format, 
modifier);
else if (DISPLAY_VER(dev_priv) >= 7)
@@ -1558,14 +1571,14 @@ intel_fb_stride_alignment(const struct drm_framebuffer 

[Intel-gfx] [PATCH v2 07/11] drm/i915: Add a platform independent way to get the RC CCS CC plane

[Imre Deak]

On future platforms the index of the color-clear plane will change from
the one used by the GEN12 RC CCS CC modifier, so add a way to retrieve
the index independently of the platform/modifier.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_display.c | 10 +---
 drivers/gpu/drm/i915/display/intel_fb.c  | 25 ++--
 drivers/gpu/drm/i915/display/intel_fb.h  |  2 ++
 3 files changed, 32 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 8043a9fd665a5..bfb9120cb31ed 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10031,10 +10031,14 @@ static void 
intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *s
 
for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
struct drm_framebuffer *fb = plane_state->hw.fb;
+   int cc_plane;
int ret;
 
-   if (!fb ||
-   fb->modifier != I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC)
+   if (!fb)
+   continue;
+
+   cc_plane = intel_fb_rc_ccs_cc_plane(fb);
+   if (cc_plane < 0)
continue;
 
/*
@@ -10051,7 +10055,7 @@ static void 
intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *s
 * GPU write on it.
 */
ret = i915_gem_object_read_from_page(intel_fb_obj(fb),
-fb->offsets[2] + 16,
+fb->offsets[cc_plane] + 16,
 _state->ccval,
 
sizeof(plane_state->ccval));
/* The above could only fail if the FB obj has an unexpected 
backing store type. */
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index bca9176e3e905..ead1f69a1873c 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -125,6 +125,7 @@ const struct intel_modifier_desc {
 
 #define INTEL_CCS_ANY  (INTEL_CCS_RC | INTEL_CCS_RC_CC | INTEL_CCS_MC)
u8 type:3;
+   u8 cc_planes:3;
} ccs;
 } intel_modifiers[] = {
{
@@ -178,6 +179,7 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC_CC,
+   .ccs.cc_planes = BIT(2),
 
FORMAT_OVERRIDE(gen12_ccs_cc_formats),
},
@@ -369,10 +371,29 @@ bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, 
int plane)
return is_gen12_ccs_modifier(fb->modifier) && is_ccs_plane(fb, plane);
 }
 
+/**
+ * intel_fb_rc_ccs_cc_plane: Get the CCS CC color plane index for a framebuffer
+ * @fb: Framebuffer
+ *
+ * Returns:
+ * Returns the index of the color clear plane for @fb, or -1 if @fb is not a
+ * framebuffer using a render compression/color clear modifier.
+ */
+int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb)
+{
+   const struct intel_modifier_desc *md = lookup_modifier(fb->modifier);
+
+   if (!md->ccs.cc_planes)
+   return -1;
+
+   drm_WARN_ON_ONCE(fb->dev, hweight8(md->ccs.cc_planes) > 1);
+
+   return ilog2((int)md->ccs.cc_planes);
+}
+
 bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane)
 {
-   return fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC &&
-  plane == 2;
+   return intel_fb_rc_ccs_cc_plane(fb) == plane;
 }
 
 static bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int 
color_plane)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h 
b/drivers/gpu/drm/i915/display/intel_fb.h
index 442d8d084f100..7bcfc5517a2e7 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -34,6 +34,8 @@ bool is_ccs_plane(const struct drm_framebuffer *fb, int 
plane);
 bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
 bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
 
+int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb);
+
 u64 *intel_fb_plane_get_modifiers(struct drm_i915_private *i915,
  enum intel_plane_caps plane_caps);
 bool intel_fb_plane_supports_modifier(struct intel_plane *plane, u64 modifier);
-- 
2.27.0

[Intel-gfx] [PATCH v2 05/11] drm/i915: Unexport is_semiplanar_uv_plane()

[Imre Deak]

This function is only used by intel_fb.c, so unexport it.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
 drivers/gpu/drm/i915/display/intel_fb.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index c15d17d2983d4..2523d5baf59ae 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -345,7 +345,7 @@ bool is_gen12_ccs_cc_plane(const struct drm_framebuffer 
*fb, int plane)
   plane == 2;
 }
 
-bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int color_plane)
+static bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int 
color_plane)
 {
return intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
color_plane == 1;
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h 
b/drivers/gpu/drm/i915/display/intel_fb.h
index a87c58a3219cd..65b5dd9468ff2 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -33,7 +33,6 @@ enum intel_plane_caps {
 bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
 bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
 bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
-bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int color_plane);
 
 u64 *intel_fb_plane_get_modifiers(struct drm_i915_private *i915,
  enum intel_plane_caps plane_caps);
-- 
2.27.0

[Intel-gfx] [PATCH v2 09/11] drm/i915: Add a platform independent way to check for CCS control planes

[Imre Deak]

Future platforms change the location of CCS control planes in CCS
framebuffers, so add intel_fb_is_rc_ccs_ctrl_plane() to query for these
planes independently of the platform. This function can be used
everywhere instead of is_ccs_plane() (or is_ccs_plane() && !cc_plane()),
since all the callers are only interested in control planes (and not CCS
color-clear planes).

Add the corresponding intel_fb_is_gen12_ccs_ctrl_plane(), which can be
used everywhere instead of is_gen12_ccs_plane(), based on the above
explanation.

This change also unexports the is_gen12_ccs_modifier(),
is_gen12_ccs_plane(), is_gen12_ccs_cc_plane() functions as they are only
used in intel_fb.c

Signed-off-by: Imre Deak 
---
 .../drm/i915/display/intel_display_types.h|  7 --
 drivers/gpu/drm/i915/display/intel_fb.c   | 73 ++-
 drivers/gpu/drm/i915/display/intel_fb.h   |  5 +-
 .../drm/i915/display/skl_universal_plane.c|  3 +-
 4 files changed, 56 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index bb53b01f07aee..b4b6a31caf4e3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -2050,11 +2050,4 @@ static inline bool is_ccs_modifier(u64 modifier)
   modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
 }
 
-static inline bool is_gen12_ccs_modifier(u64 modifier)
-{
-   return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
-  modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
-  modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
-}
-
 #endif /*  __INTEL_DISPLAY_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index d2491a73d255b..85a2eaaa7cad8 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -126,6 +126,8 @@ const struct intel_modifier_desc {
 #define INTEL_CCS_ANY  (INTEL_CCS_RC | INTEL_CCS_RC_CC | INTEL_CCS_MC)
u8 type:3;
u8 cc_planes:3;
+   u8 packed_ctrl_planes:4;
+   u8 planar_ctrl_planes:4;
} ccs;
 } intel_modifiers[] = {
{
@@ -153,6 +155,7 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC,
+   .ccs.packed_ctrl_planes = BIT(1),
 
FORMAT_OVERRIDE(skl_ccs_formats),
},
@@ -161,6 +164,7 @@ const struct intel_modifier_desc {
.display_versions = DISPLAY_VER_MASK(9, 11),
 
.ccs.type = INTEL_CCS_RC,
+   .ccs.packed_ctrl_planes = BIT(1),
 
FORMAT_OVERRIDE(skl_ccs_formats),
},
@@ -170,6 +174,7 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC,
+   .ccs.packed_ctrl_planes = BIT(1),
 
FORMAT_OVERRIDE(gen12_ccs_formats),
},
@@ -179,6 +184,7 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC_CC,
+   .ccs.packed_ctrl_planes = BIT(1),
.ccs.cc_planes = BIT(2),
 
FORMAT_OVERRIDE(gen12_ccs_cc_formats),
@@ -189,6 +195,8 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_MC,
+   .ccs.packed_ctrl_planes = BIT(1),
+   .ccs.planar_ctrl_planes = BIT(2) | BIT(3),
 
FORMAT_OVERRIDE(gen12_ccs_formats),
},
@@ -358,17 +366,44 @@ bool intel_format_info_is_yuv_semiplanar(const struct 
drm_format_info *info,
return format_is_yuv_semiplanar(lookup_modifier(modifier), info);
 }
 
-bool is_ccs_plane(const struct drm_framebuffer *fb, int plane)
+static u8 ccs_ctrl_plane_mask(const struct intel_modifier_desc *md,
+ const struct drm_format_info *format)
 {
-   if (!is_ccs_modifier(fb->modifier))
-   return false;
+   if (format_is_yuv_semiplanar(md, format))
+   return md->ccs.planar_ctrl_planes;
+   else
+   return md->ccs.packed_ctrl_planes;
+}
+
+/**
+ * intel_fb_is_ccs_ctrl_plane: Check if a framebuffer color plane is a CCS 
control plane
+ * @fb: Framebuffer
+ * @plane: color plane index to check
+ *
+ * Returns:
+ * Returns %true if @fb's color plane at index @plane is a CCS control plane.
+ */
+bool intel_fb_is_ccs_ctrl_plane(const struct drm_framebuffer *fb, int plane)
+{
+   const struct intel_modifier_desc *md = lookup_modifier(fb->modifier);
 
-   return plane >= fb->format->num_planes / 2;
+   return ccs_ctrl_plane_mask(md, fb->format) & BIT(plane);
 }
 
-bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane)
+/**
+ * intel_fb_is_gen12_ccs_ctrl_plane: Check if a framebuffer color plane is a 
GEN12 CCS control plane
+ * 

[Intel-gfx] [PATCH v2 01/11] drm/i915: Add a table with a descriptor for all i915 modifiers

[Imre Deak]

Add a table describing all the framebuffer modifiers used by i915 at one
place. This has the benefit of deduplicating the listing of supported
modifiers for each platform and checking the support of these modifiers
on a given plane. This also simplifies in a similar way getting some
attribute for a modifier, for instance checking if the modifier is a
CCS modifier type.

v2:
- Keep the plane caps calculation in the plane code and pass an enum
  with these caps to intel_fb_get_modifiers(). (Ville)
- Get the modifiers calling intel_fb_get_modifiers() in i9xx_plane.c as
  well.

Cc: Ville Syrjälä 
Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/i9xx_plane.c |  30 +--
 drivers/gpu/drm/i915/display/intel_cursor.c   |  19 +-
 .../drm/i915/display/intel_display_types.h|   1 -
 drivers/gpu/drm/i915/display/intel_fb.c   | 143 ++
 drivers/gpu/drm/i915/display/intel_fb.h   |  16 ++
 drivers/gpu/drm/i915/display/intel_sprite.c   |  35 +---
 drivers/gpu/drm/i915/display/skl_scaler.c |   1 +
 .../drm/i915/display/skl_universal_plane.c| 181 +-
 drivers/gpu/drm/i915/i915_drv.h   |   3 +
 9 files changed, 245 insertions(+), 184 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c 
b/drivers/gpu/drm/i915/display/i9xx_plane.c
index b1439ba78f67b..a939accff7ee2 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -60,22 +60,11 @@ static const u32 vlv_primary_formats[] = {
DRM_FORMAT_XBGR16161616F,
 };
 
-static const u64 i9xx_format_modifiers[] = {
-   I915_FORMAT_MOD_X_TILED,
-   DRM_FORMAT_MOD_LINEAR,
-   DRM_FORMAT_MOD_INVALID
-};
-
 static bool i8xx_plane_format_mod_supported(struct drm_plane *_plane,
u32 format, u64 modifier)
 {
-   switch (modifier) {
-   case DRM_FORMAT_MOD_LINEAR:
-   case I915_FORMAT_MOD_X_TILED:
-   break;
-   default:
+   if (!intel_fb_plane_supports_modifier(to_intel_plane(_plane), modifier))
return false;
-   }
 
switch (format) {
case DRM_FORMAT_C8:
@@ -92,13 +81,8 @@ static bool i8xx_plane_format_mod_supported(struct drm_plane 
*_plane,
 static bool i965_plane_format_mod_supported(struct drm_plane *_plane,
u32 format, u64 modifier)
 {
-   switch (modifier) {
-   case DRM_FORMAT_MOD_LINEAR:
-   case I915_FORMAT_MOD_X_TILED:
-   break;
-   default:
+   if (!intel_fb_plane_supports_modifier(to_intel_plane(_plane), modifier))
return false;
-   }
 
switch (format) {
case DRM_FORMAT_C8:
@@ -768,6 +752,7 @@ intel_primary_plane_create(struct drm_i915_private 
*dev_priv, enum pipe pipe)
struct intel_plane *plane;
const struct drm_plane_funcs *plane_funcs;
unsigned int supported_rotations;
+   const u64 *modifiers;
const u32 *formats;
int num_formats;
int ret, zpos;
@@ -875,21 +860,26 @@ intel_primary_plane_create(struct drm_i915_private 
*dev_priv, enum pipe pipe)
plane->disable_flip_done = ilk_primary_disable_flip_done;
}
 
+   modifiers = intel_fb_plane_get_modifiers(dev_priv, PLANE_HAS_TILING);
+
if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
ret = drm_universal_plane_init(_priv->drm, >base,
   0, plane_funcs,
   formats, num_formats,
-  i9xx_format_modifiers,
+  modifiers,
   DRM_PLANE_TYPE_PRIMARY,
   "primary %c", pipe_name(pipe));
else
ret = drm_universal_plane_init(_priv->drm, >base,
   0, plane_funcs,
   formats, num_formats,
-  i9xx_format_modifiers,
+  modifiers,
   DRM_PLANE_TYPE_PRIMARY,
   "plane %c",
   plane_name(plane->i9xx_plane));
+
+   kfree(modifiers);
+
if (ret)
goto fail;
 
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c 
b/drivers/gpu/drm/i915/display/intel_cursor.c
index f6dcb5aa63f64..1f764c6d59583 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -28,11 +28,6 @@ static const u32 intel_cursor_formats[] = {
DRM_FORMAT_ARGB,
 };
 
-static const u64 cursor_format_modifiers[] = {
-   DRM_FORMAT_MOD_LINEAR,
-   DRM_FORMAT_MOD_INVALID
-};
-
 static u32 intel_cursor_base(const struct 

[Intel-gfx] [PATCH v2 02/11] drm/i915: Move intel_get_format_info() to intel_fb.c

[Imre Deak]

Move the function retrieving the format override information for a given
format/modifier to intel_fb.c. We can store a pointer to the format list
in each modifier's descriptor instead of the corresponding switch/case
logic, avoiding the listing of the modifiers twice.

v2: Handle invalid modifiers in intel_fb_get_format_info() passed from
userspace.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_display.c | 132 +--
 drivers/gpu/drm/i915/display/intel_fb.c  | 163 +++
 drivers/gpu/drm/i915/display/intel_fb.h  |   3 +
 3 files changed, 167 insertions(+), 131 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 4f0badb11bbba..90802d16fbf91 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1087,136 +1087,6 @@ void intel_add_fb_offsets(int *x, int *y,
*y += state->view.color_plane[color_plane].y;
 }
 
-/*
- * From the Sky Lake PRM:
- * "The Color Control Surface (CCS) contains the compression status of
- *  the cache-line pairs. The compression state of the cache-line pair
- *  is specified by 2 bits in the CCS. Each CCS cache-line represents
- *  an area on the main surface of 16 x16 sets of 128 byte Y-tiled
- *  cache-line-pairs. CCS is always Y tiled."
- *
- * Since cache line pairs refers to horizontally adjacent cache lines,
- * each cache line in the CCS corresponds to an area of 32x16 cache
- * lines on the main surface. Since each pixel is 4 bytes, this gives
- * us a ratio of one byte in the CCS for each 8x16 pixels in the
- * main surface.
- */
-static const struct drm_format_info skl_ccs_formats[] = {
-   { .format = DRM_FORMAT_XRGB, .depth = 24, .num_planes = 2,
- .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
-   { .format = DRM_FORMAT_XBGR, .depth = 24, .num_planes = 2,
- .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
-   { .format = DRM_FORMAT_ARGB, .depth = 32, .num_planes = 2,
- .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
-   { .format = DRM_FORMAT_ABGR, .depth = 32, .num_planes = 2,
- .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
-};
-
-/*
- * Gen-12 compression uses 4 bits of CCS data for each cache line pair in the
- * main surface. And each 64B CCS cache line represents an area of 4x1 Y-tiles
- * in the main surface. With 4 byte pixels and each Y-tile having dimensions of
- * 32x32 pixels, the ratio turns out to 1B in the CCS for every 2x32 pixels in
- * the main surface.
- */
-static const struct drm_format_info gen12_ccs_formats[] = {
-   { .format = DRM_FORMAT_XRGB, .depth = 24, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, },
-   { .format = DRM_FORMAT_XBGR, .depth = 24, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, },
-   { .format = DRM_FORMAT_ARGB, .depth = 32, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, .has_alpha = true },
-   { .format = DRM_FORMAT_ABGR, .depth = 32, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, .has_alpha = true },
-   { .format = DRM_FORMAT_YUYV, .num_planes = 2,
- .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 2, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_YVYU, .num_planes = 2,
- .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 2, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_UYVY, .num_planes = 2,
- .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 2, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_VYUY, .num_planes = 2,
- .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 2, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_XYUV, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_NV12, .num_planes = 4,
- .char_per_block = { 1, 2, 1, 1 }, .block_w = { 1, 1, 4, 4 }, .block_h 
= { 1, 1, 1, 1 },
- .hsub = 2, .vsub = 2, .is_yuv = true },
-   { .format = DRM_FORMAT_P010, .num_planes = 4,
- .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
- .hsub = 2, .vsub = 2, .is_yuv = true },
-   { .format = DRM_FORMAT_P012, .num_planes = 4,
- .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
- .hsub = 2, .vsub = 2, .is_yuv = 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Fixup header includes

[Patchwork]

== Series Details ==

Series: Fixup header includes
URL   : https://patchwork.freedesktop.org/series/95587/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1392:5: warning: context imbalance in 
'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 
16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 
16777216
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative 
(-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative 
(-262080)
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write16' 
- different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write32' 
- different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write8' 
- different lock contexts for basic block

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers

[Patchwork]

== Series Details ==

Series: drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers
URL   : https://patchwork.freedesktop.org/series/95578/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10696_full -> Patchwork_21282_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21282_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21282_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21282_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_invalid_mode@clock-too-high:
- shard-tglb: NOTRUN -> [SKIP][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-tglb8/igt@kms_invalid_m...@clock-too-high.html

  
 Warnings 

  * igt@i915_pm_dc@dc9-dpms:
- shard-iclb: [FAIL][2] ([i915#4275]) -> [SKIP][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-iclb2/igt@i915_pm...@dc9-dpms.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-iclb3/igt@i915_pm...@dc9-dpms.html

  
Known issues


  Here are the changes found in Patchwork_21282_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_persistence@legacy-engines-queued:
- shard-snb:  NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1099]) +1 
similar issue
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-snb5/igt@gem_ctx_persiste...@legacy-engines-queued.html

  * igt@gem_ctx_sseu@invalid-args:
- shard-tglb: NOTRUN -> [SKIP][5] ([i915#280])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-tglb6/igt@gem_ctx_s...@invalid-args.html

  * igt@gem_eio@unwedge-stress:
- shard-snb:  NOTRUN -> [FAIL][6] ([i915#3354])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-snb5/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl:  [PASS][7] -> [FAIL][8] ([i915#2842]) +3 similar issues
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs0.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-kbl1/igt@gem_exec_fair@basic-n...@vcs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: NOTRUN -> [FAIL][9] ([i915#2842]) +4 similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-tglb3/igt@gem_exec_fair@basic-p...@bcs0.html

  * igt@gem_exec_fence@basic-wait@bcs0:
- shard-kbl:  NOTRUN -> [SKIP][10] ([fdo#109271]) +57 similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-kbl2/igt@gem_exec_fence@basic-w...@bcs0.html

  * igt@gem_exec_whisper@basic-queues-forked-all:
- shard-glk:  [PASS][11] -> [DMESG-WARN][12] ([i915#118]) +1 
similar issue
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-glk1/igt@gem_exec_whis...@basic-queues-forked-all.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-glk2/igt@gem_exec_whis...@basic-queues-forked-all.html

  * igt@gem_pread@exhaustion:
- shard-apl:  NOTRUN -> [WARN][13] ([i915#2658]) +1 similar issue
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-apl8/igt@gem_pr...@exhaustion.html
- shard-snb:  NOTRUN -> [WARN][14] ([i915#2658])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-snb5/igt@gem_pr...@exhaustion.html
- shard-skl:  NOTRUN -> [WARN][15] ([i915#2658])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-skl3/igt@gem_pr...@exhaustion.html

  * igt@gem_pxp@display-protected-crc:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#4270]) +1 similar issue
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-tglb8/igt@gem_...@display-protected-crc.html

  * igt@gem_softpin@evict-snoop-interruptible:
- shard-tglb: NOTRUN -> [SKIP][17] ([fdo#109312])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-tglb6/igt@gem_soft...@evict-snoop-interruptible.html

  * igt@gem_sync@basic-many-each:
- shard-kbl:  [PASS][18] -> [INCOMPLETE][19] ([i915#4274])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-kbl2/igt@gem_s...@basic-many-each.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/shard-kbl7/igt@gem_s...@basic-many-each.html
- shard-iclb: [PASS][20] -> [INCOMPLETE][21] ([i915#4274])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-iclb2/igt@gem_s...@basic-many-each.html
   [21]: 

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915/pmu: Add a name to the execlists stats

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/pmu: Add a name to the execlists 
stats
URL   : https://patchwork.freedesktop.org/series/95586/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10696 -> Patchwork_21285


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21285 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21285, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21285/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21285:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@gt_engines:
- fi-rkl-guc: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-rkl-guc/igt@i915_selftest@live@gt_engines.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21285/fi-rkl-guc/igt@i915_selftest@live@gt_engines.html

  
Known issues


  Here are the changes found in Patchwork_21285 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@runner@aborted:
- fi-rkl-guc: NOTRUN -> [FAIL][3] ([i915#3928])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21285/fi-rkl-guc/igt@run...@aborted.html

  
  [i915#3928]: https://gitlab.freedesktop.org/drm/intel/issues/3928


Participating hosts (44 -> 1)
--

  ERROR: It appears as if the changes made in Patchwork_21285 prevented too 
many machines from booting.

  Missing(43): fi-kbl-soraka fi-rkl-11600 bat-dg1-6 fi-bdw-gvtdvm fi-icl-u2 
fi-apl-guc fi-snb-2520m fi-pnv-d510 fi-icl-y fi-skl-6600u fi-snb-2600 fi-cml-u2 
fi-bxt-dsi fi-bdw-5557u fi-bsw-n3050 fi-tgl-u2 fi-glk-dsi fi-bwr-2160 
fi-kbl-7500u fi-ctg-p8600 fi-hsw-4770 fi-ivb-3770 fi-elk-e7500 fi-bsw-nick 
fi-skl-6700k2 fi-kbl-r fi-kbl-7567u fi-ilk-m540 fi-tgl-dsi fi-skl-guc 
fi-cfl-8700k fi-ehl-2 bat-jsl-1 fi-hsw-gt1 fi-jsl-1 fi-hsw-4200u fi-tgl-1115g4 
fi-bsw-cyan fi-cfl-guc fi-kbl-guc fi-cfl-8109u fi-kbl-8809g fi-bsw-kefka 


Build changes
-

  * Linux: CI_DRM_10696 -> Patchwork_21285

  CI-20190529: 20190529
  CI_DRM_10696: 58a206ae5bf2f81a11e4408d10a3e1b445d6eebb @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6237: 910b5caac6625d2bf0b6c1dde502451431bd0159 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_21285: 03bcbfdbe47d5b10a8eb3440cbeee39bd2efd3e8 @ 
git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

03bcbfdbe47d drm/i915/pmu: Connect engine busyness stats from GuC to pmu
ffc67cf0919d drm/i915/pmu: Add a name to the execlists stats

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21285/index.html

[Intel-gfx] [PATCH 1/3] drm/i915/gt: include tsc.h where used

[Lucas De Marchi]

We are currently using tsc_khz as a fallback so add the right include.
For other architectures we may need to add a different fallback, but
this is not being used by dgfx so we may as well just paper it over.

Signed-off-by: Lucas De Marchi 
---
 drivers/gpu/drm/i915/gt/intel_llc.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_llc.c 
b/drivers/gpu/drm/i915/gt/intel_llc.c
index eb1a15deed22..d6c6b8b0a1e6 100644
--- a/drivers/gpu/drm/i915/gt/intel_llc.c
+++ b/drivers/gpu/drm/i915/gt/intel_llc.c
@@ -3,6 +3,7 @@
  * Copyright © 2019 Intel Corporation
  */
 
+#include 
 #include 
 
 #include "i915_drv.h"
-- 
2.33.0

[Intel-gfx] [PATCH 3/3] drm/i915/display: remove unused intel-mid.h include

[Lucas De Marchi]

Nothing from intel-mid.h and this is only available on x86, so remove it
as we prepare support for other architectures.

Signed-off-by: Lucas De Marchi 
---
 drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c 
b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
index c2a2cd1f84dc..61c2ef6a4b8c 100644
--- a/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
+++ b/drivers/gpu/drm/i915/display/intel_dsi_vbt.c
@@ -31,7 +31,6 @@
 #include 
 #include 
 
-#include 
 #include 
 
 #include 
-- 
2.33.0

[Intel-gfx] [PATCH 0/3] Fixup header includes

[Lucas De Marchi]

Some low hanging fruits to start supporting other architectures.
Let's make sure we include what we use, particularly when the header is
arch-dependent.

Lucas De Marchi (3):
  drm/i915/gt: include tsc.h where used
  drm/i915/gt: add asm/cacheflush.h for use of clflush()
  drm/i915/display: remove unused intel-mid.h include

 drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 1 -
 drivers/gpu/drm/i915/gt/intel_engine.h   | 1 +
 drivers/gpu/drm/i915/gt/intel_llc.c  | 1 +
 3 files changed, 2 insertions(+), 1 deletion(-)

-- 
2.33.0

[Intel-gfx] [PATCH 2/3] drm/i915/gt: add asm/cacheflush.h for use of clflush()

[Lucas De Marchi]

Let's include what we use instead of relying on other indirect includes.

Signed-off-by: Lucas De Marchi 
---
 drivers/gpu/drm/i915/gt/intel_engine.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h 
b/drivers/gpu/drm/i915/gt/intel_engine.h
index 452248884ef1..d5ac49c0691e 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -2,6 +2,7 @@
 #ifndef _INTEL_RINGBUFFER_H_
 #define _INTEL_RINGBUFFER_H_
 
+#include 
 #include 
 
 #include 
-- 
2.33.0

[Intel-gfx] ✗ Fi.CI.DOCS: warning for series starting with [1/2] drm/i915/pmu: Add a name to the execlists stats

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/pmu: Add a name to the execlists 
stats
URL   : https://patchwork.freedesktop.org/series/95586/
State : warning

== Summary ==

$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gt/uc/intel_guc.h:167: warning: Function parameter or 
member 'timestamp' not described in 'intel_guc'

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/pmu: Add a name to the execlists stats

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/pmu: Add a name to the execlists 
stats
URL   : https://patchwork.freedesktop.org/series/95586/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy 
expression type 31
-O:drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy 
expression type 31

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/pmu: Add a name to the execlists stats

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/pmu: Add a name to the execlists 
stats
URL   : https://patchwork.freedesktop.org/series/95586/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
ffc67cf0919d drm/i915/pmu: Add a name to the execlists stats
03bcbfdbe47d drm/i915/pmu: Connect engine busyness stats from GuC to pmu
-:505: CHECK:SPACING: No space is necessary after a cast
#505: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:839:
+   guc->timestamp.gt_stamp = ((u64) gt_stamp_hi << 32) | gt_stamp_now;

total: 0 errors, 0 warnings, 1 checks, 572 lines checked

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev7)

[Patchwork]

== Series Details ==

Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers 
(rev7)
URL   : https://patchwork.freedesktop.org/series/95127/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10696_full -> Patchwork_21281_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21281_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21281_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_21281_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_invalid_mode@clock-too-high:
- shard-tglb: NOTRUN -> [SKIP][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-tglb3/igt@kms_invalid_m...@clock-too-high.html

  
Known issues


  Here are the changes found in Patchwork_21281_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_persistence@legacy-engines-queued:
- shard-snb:  NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099]) +2 
similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-snb2/igt@gem_ctx_persiste...@legacy-engines-queued.html

  * igt@gem_ctx_sseu@invalid-args:
- shard-tglb: NOTRUN -> [SKIP][3] ([i915#280])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-tglb2/igt@gem_ctx_s...@invalid-args.html

  * igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][4] -> [TIMEOUT][5] ([i915#2369] / [i915#3063] 
/ [i915#3648])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-tglb7/igt@gem_...@unwedge-stress.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-tglb6/igt@gem_...@unwedge-stress.html
- shard-skl:  [PASS][6] -> [TIMEOUT][7] ([i915#2369] / [i915#3063])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-skl3/igt@gem_...@unwedge-stress.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-skl3/igt@gem_...@unwedge-stress.html
- shard-snb:  NOTRUN -> [FAIL][8] ([i915#3354])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-snb2/igt@gem_...@unwedge-stress.html

  * igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][9] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-iclb2/igt@gem_exec_fair@basic-n...@vcs1.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-kbl:  [PASS][10] -> [FAIL][11] ([i915#2842])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-kbl2/igt@gem_exec_fair@basic-pace-s...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-kbl2/igt@gem_exec_fair@basic-pace-s...@rcs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
- shard-tglb: NOTRUN -> [FAIL][12] ([i915#2842]) +5 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-tglb8/igt@gem_exec_fair@basic-p...@bcs0.html

  * igt@gem_exec_reloc@basic-write-gtt:
- shard-skl:  [PASS][13] -> [DMESG-WARN][14] ([i915#1982])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-skl1/igt@gem_exec_re...@basic-write-gtt.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-skl10/igt@gem_exec_re...@basic-write-gtt.html

  * igt@gem_exec_whisper@basic-queues-priority-all:
- shard-iclb: [PASS][15] -> [INCOMPLETE][16] ([i915#1895])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/shard-iclb6/igt@gem_exec_whis...@basic-queues-priority-all.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-iclb1/igt@gem_exec_whis...@basic-queues-priority-all.html

  * igt@gem_pread@exhaustion:
- shard-apl:  NOTRUN -> [WARN][17] ([i915#2658])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-apl8/igt@gem_pr...@exhaustion.html
- shard-snb:  NOTRUN -> [WARN][18] ([i915#2658])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-snb2/igt@gem_pr...@exhaustion.html
- shard-skl:  NOTRUN -> [WARN][19] ([i915#2658])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-skl3/igt@gem_pr...@exhaustion.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
- shard-tglb: NOTRUN -> [SKIP][20] ([i915#4270]) +2 similar issues
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/shard-tglb6/igt@gem_...@protected-encrypted-src-copy-not-readible.html

  * igt@gem_softpin@evict-snoop-interruptible:
- shard-tglb: NOTRUN -> [SKIP][21] ([fdo#109312])
   [21]: 

Re: [Intel-gfx] [PATCH] drm/i915/pmu: Connect engine busyness stats from GuC to pmu

[Umesh Nerlige Ramappa]

On Tue, Oct 05, 2021 at 04:14:23PM -0700, Matthew Brost wrote:

On Tue, Oct 05, 2021 at 10:47:11AM -0700, Umesh Nerlige Ramappa wrote:

With GuC handling scheduling, i915 is not aware of the time that a
context is scheduled in and out of the engine. Since i915 pmu relies on
this info to provide engine busyness to the user, GuC shares this info
with i915 for all engines using shared memory. For each engine, this
info contains:

- total busyness: total time that the context was running (total)
- id: id of the running context (id)
- start timestamp: timestamp when the context started running (start)

At the time (now) of sampling the engine busyness, if the id is valid
(!= ~0), and start is non-zero, then the context is considered to be
active and the engine busyness is calculated using the below equation

engine busyness = total + (now - start)

All times are obtained from the gt clock base. For inactive contexts,
engine busyness is just equal to the total.

The start and total values provided by GuC are 32 bits and wrap around
in a few minutes. Since perf pmu provides busyness as 64 bit
monotonically increasing values, there is a need for this implementation
to account for overflows and extend the time to 64 bits before returning
busyness to the user. In order to do that, a worker runs periodically at
frequency = 1/8th the time it takes for the timestamp to wrap. As an
example, that would be once in 27 seconds for a gt clock frequency of
19.2 MHz.

Opens and wip that are targeted for later patches:

1) On global gt reset the total busyness of engines resets and i915
   needs to fix that so that user sees monotonically increasing
   busyness.
2) In runtime suspend mode, the worker may not need to be run. We could
   stop the worker on suspend and rerun it on resume provided that the
   guc pm timestamp does not tick during suspend.

Note:
There might be an overaccounting of busyness due to the fact that GuC
may be updating the total and start values while kmd is reading them.
(i.e kmd may read the updated total and the stale start). In such a
case, user may see higher busyness value followed by smaller ones which
would eventually catch up to the higher value.

v2: (Tvrtko)
- Include details in commit message
- Move intel engine busyness function into execlist code
- Use union inside engine->stats
- Use natural type for ping delay jiffies
- Drop active_work condition checks
- Use for_each_engine if iterating all engines
- Drop seq locking, use spinlock at guc level to update engine stats
- Document worker specific details

v3: (Tvrtko/Umesh)
- Demarcate guc and execlist stat objects with comments
- Document known over-accounting issue in commit
- Provide a consistent view of guc state
- Add hooks to gt park/unpark for guc busyness
- Stop/start worker in gt park/unpark path
- Drop inline
- Move spinlock and worker inits to guc initialization
- Drop helpers that are called only once

Signed-off-by: John Harrison 
Signed-off-by: Umesh Nerlige Ramappa 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  26 +-
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  90 +--
 .../drm/i915/gt/intel_execlists_submission.c  |  32 +++
 drivers/gpu/drm/i915/gt/intel_gt_pm.c |   2 +
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |   1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  26 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c|  21 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h|   5 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  13 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 227 ++
 .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   2 +
 drivers/gpu/drm/i915/i915_reg.h   |   2 +
 12 files changed, 398 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 2ae57e4656a3..6fcc70a313d9 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1873,22 +1873,6 @@ void intel_engine_dump(struct intel_engine_cs *engine,
intel_engine_print_breadcrumbs(engine, m);
 }

-static ktime_t __intel_engine_get_busy_time(struct intel_engine_cs *engine,
-   ktime_t *now)
-{
-   ktime_t total = engine->stats.total;
-
-   /*
-* If the engine is executing something at the moment
-* add it to the total.
-*/
-   *now = ktime_get();
-   if (READ_ONCE(engine->stats.active))
-   total = ktime_add(total, ktime_sub(*now, engine->stats.start));
-
-   return total;
-}
-
 /**
  * intel_engine_get_busy_time() - Return current accumulated engine busyness
  * @engine: engine to report on
@@ -1898,15 +1882,7 @@ static ktime_t __intel_engine_get_busy_time(struct 
intel_engine_cs *engine,
  */
 ktime_t intel_engine_get_busy_time(struct intel_engine_cs *engine, ktime_t 
*now)
 {
-   unsigned int seq;
-   ktime_t total;
-
-   do {
-   

[Intel-gfx] [PATCH 1/2] drm/i915/pmu: Add a name to the execlists stats

[Umesh Nerlige Ramappa]

In preparation for GuC pmu stats, add a name to the execlists stats
structure so that it can be differentiated from the GuC stats.

Signed-off-by: Umesh Nerlige Ramappa 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c| 14 +++---
 drivers/gpu/drm/i915/gt/intel_engine_stats.h | 33 +++--
 drivers/gpu/drm/i915/gt/intel_engine_types.h | 52 +++-
 3 files changed, 53 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 2ae57e4656a3..38436f4b5706 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -361,7 +361,7 @@ static int intel_engine_setup(struct intel_gt *gt, enum 
intel_engine_id id)
DRIVER_CAPS(i915)->has_logical_contexts = true;
 
ewma__engine_latency_init(>latency);
-   seqcount_init(>stats.lock);
+   seqcount_init(>stats.execlists.lock);
 
ATOMIC_INIT_NOTIFIER_HEAD(>context_status_notifier);
 
@@ -1876,15 +1876,16 @@ void intel_engine_dump(struct intel_engine_cs *engine,
 static ktime_t __intel_engine_get_busy_time(struct intel_engine_cs *engine,
ktime_t *now)
 {
-   ktime_t total = engine->stats.total;
+   struct intel_engine_execlists_stats *stats = >stats.execlists;
+   ktime_t total = stats->total;
 
/*
 * If the engine is executing something at the moment
 * add it to the total.
 */
*now = ktime_get();
-   if (READ_ONCE(engine->stats.active))
-   total = ktime_add(total, ktime_sub(*now, engine->stats.start));
+   if (READ_ONCE(stats->active))
+   total = ktime_add(total, ktime_sub(*now, stats->start));
 
return total;
 }
@@ -1898,13 +1899,14 @@ static ktime_t __intel_engine_get_busy_time(struct 
intel_engine_cs *engine,
  */
 ktime_t intel_engine_get_busy_time(struct intel_engine_cs *engine, ktime_t 
*now)
 {
+   struct intel_engine_execlists_stats *stats = >stats.execlists;
unsigned int seq;
ktime_t total;
 
do {
-   seq = read_seqcount_begin(>stats.lock);
+   seq = read_seqcount_begin(>lock);
total = __intel_engine_get_busy_time(engine, now);
-   } while (read_seqcount_retry(>stats.lock, seq));
+   } while (read_seqcount_retry(>lock, seq));
 
return total;
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_stats.h 
b/drivers/gpu/drm/i915/gt/intel_engine_stats.h
index 24fbdd94351a..8e762d683e50 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_stats.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_stats.h
@@ -15,45 +15,46 @@
 
 static inline void intel_engine_context_in(struct intel_engine_cs *engine)
 {
+   struct intel_engine_execlists_stats *stats = >stats.execlists;
unsigned long flags;
 
-   if (engine->stats.active) {
-   engine->stats.active++;
+   if (stats->active) {
+   stats->active++;
return;
}
 
/* The writer is serialised; but the pmu reader may be from hardirq */
local_irq_save(flags);
-   write_seqcount_begin(>stats.lock);
+   write_seqcount_begin(>lock);
 
-   engine->stats.start = ktime_get();
-   engine->stats.active++;
+   stats->start = ktime_get();
+   stats->active++;
 
-   write_seqcount_end(>stats.lock);
+   write_seqcount_end(>lock);
local_irq_restore(flags);
 
-   GEM_BUG_ON(!engine->stats.active);
+   GEM_BUG_ON(!stats->active);
 }
 
 static inline void intel_engine_context_out(struct intel_engine_cs *engine)
 {
+   struct intel_engine_execlists_stats *stats = >stats.execlists;
unsigned long flags;
 
-   GEM_BUG_ON(!engine->stats.active);
-   if (engine->stats.active > 1) {
-   engine->stats.active--;
+   GEM_BUG_ON(!stats->active);
+   if (stats->active > 1) {
+   stats->active--;
return;
}
 
local_irq_save(flags);
-   write_seqcount_begin(>stats.lock);
+   write_seqcount_begin(>lock);
 
-   engine->stats.active--;
-   engine->stats.total =
-   ktime_add(engine->stats.total,
- ktime_sub(ktime_get(), engine->stats.start));
+   stats->active--;
+   stats->total = ktime_add(stats->total,
+ktime_sub(ktime_get(), stats->start));
 
-   write_seqcount_end(>stats.lock);
+   write_seqcount_end(>lock);
local_irq_restore(flags);
 }
 
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h 
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 5ae1207c363b..316d8551d22f 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -257,6 +257,33 @@ struct intel_engine_execlists {
 
 #define INTEL_ENGINE_CS_MAX_NAME 8
 
+struct intel_engine_execlists_stats {
+   /**
+* @active: Number 

[Intel-gfx] [PATCH 2/2] drm/i915/pmu: Connect engine busyness stats from GuC to pmu

[Umesh Nerlige Ramappa]

With GuC handling scheduling, i915 is not aware of the time that a
context is scheduled in and out of the engine. Since i915 pmu relies on
this info to provide engine busyness to the user, GuC shares this info
with i915 for all engines using shared memory. For each engine, this
info contains:

- total busyness: total time that the context was running (total)
- id: id of the running context (id)
- start timestamp: timestamp when the context started running (start)

At the time (now) of sampling the engine busyness, if the id is valid
(!= ~0), and start is non-zero, then the context is considered to be
active and the engine busyness is calculated using the below equation

engine busyness = total + (now - start)

All times are obtained from the gt clock base. For inactive contexts,
engine busyness is just equal to the total.

The start and total values provided by GuC are 32 bits and wrap around
in a few minutes. Since perf pmu provides busyness as 64 bit
monotonically increasing values, there is a need for this implementation
to account for overflows and extend the time to 64 bits before returning
busyness to the user. In order to do that, a worker runs periodically at
frequency = 1/8th the time it takes for the timestamp to wrap. As an
example, that would be once in 27 seconds for a gt clock frequency of
19.2 MHz.

Note:
There might be an overaccounting of busyness due to the fact that GuC
may be updating the total and start values while kmd is reading them.
(i.e kmd may read the updated total and the stale start). In such a
case, user may see higher busyness value followed by smaller ones which
would eventually catch up to the higher value.

v2: (Tvrtko)
- Include details in commit message
- Move intel engine busyness function into execlist code
- Use union inside engine->stats
- Use natural type for ping delay jiffies
- Drop active_work condition checks
- Use for_each_engine if iterating all engines
- Drop seq locking, use spinlock at guc level to update engine stats
- Document worker specific details

v3: (Tvrtko/Umesh)
- Demarcate guc and execlist stat objects with comments
- Document known over-accounting issue in commit
- Provide a consistent view of guc state
- Add hooks to gt park/unpark for guc busyness
- Stop/start worker in gt park/unpark path
- Drop inline
- Move spinlock and worker inits to guc initialization
- Drop helpers that are called only once

v4: (Tvrtko/Matt/Umesh)
- Drop addressed opens from commit message
- Get runtime pm in ping, remove from the park path
- Use cancel_delayed_work_sync in disable_submission path
- Update stats during reset prepare
- Skip ping if reset in progress
- Explicitly name execlists and guc stats objects
- Since disable_submission is called from many places, move resetting
  stats to intel_guc_submission_reset_prepare

Signed-off-by: John Harrison 
Signed-off-by: Umesh Nerlige Ramappa 
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  28 +--
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  33 ++-
 .../drm/i915/gt/intel_execlists_submission.c  |  34 +++
 drivers/gpu/drm/i915/gt/intel_gt_pm.c |   2 +
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |   1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  26 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c|  21 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h|   5 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  13 +
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 238 ++
 .../gpu/drm/i915/gt/uc/intel_guc_submission.h |   2 +
 drivers/gpu/drm/i915/i915_reg.h   |   2 +
 12 files changed, 377 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 38436f4b5706..6b783fdcba2a 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1873,23 +1873,6 @@ void intel_engine_dump(struct intel_engine_cs *engine,
intel_engine_print_breadcrumbs(engine, m);
 }
 
-static ktime_t __intel_engine_get_busy_time(struct intel_engine_cs *engine,
-   ktime_t *now)
-{
-   struct intel_engine_execlists_stats *stats = >stats.execlists;
-   ktime_t total = stats->total;
-
-   /*
-* If the engine is executing something at the moment
-* add it to the total.
-*/
-   *now = ktime_get();
-   if (READ_ONCE(stats->active))
-   total = ktime_add(total, ktime_sub(*now, stats->start));
-
-   return total;
-}
-
 /**
  * intel_engine_get_busy_time() - Return current accumulated engine busyness
  * @engine: engine to report on
@@ -1899,16 +1882,7 @@ static ktime_t __intel_engine_get_busy_time(struct 
intel_engine_cs *engine,
  */
 ktime_t intel_engine_get_busy_time(struct intel_engine_cs *engine, ktime_t 
*now)
 {
-   struct intel_engine_execlists_stats *stats = >stats.execlists;
-   unsigned int seq;
-   ktime_t total;
-
-   do {
-  

[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gem: Check function return in live_nop_switch

[Patchwork]

== Series Details ==

Series: drm/i915/gem: Check function return in live_nop_switch
URL   : https://patchwork.freedesktop.org/series/95584/
State : failure

== Summary ==

CALLscripts/checksyscalls.sh
  CALLscripts/atomic/check-atomics.sh
  DESCEND objtool
  CHK include/generated/compile.h
  CC [M]  drivers/gpu/drm/i915/gem/i915_gem_context.o
In file included from drivers/gpu/drm/i915/gem/i915_gem_context.c:2283:
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c: In function 
‘live_nop_switch’:
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:88:26: error: implicit 
declaration of function ‘to_gt’; did you mean ‘uc_to_gt’? 
[-Werror=implicit-function-declaration]
  intel_gt_set_wedged(to_gt(i915));
  ^
  uc_to_gt
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c:88:26: error: passing 
argument 1 of ‘intel_gt_set_wedged’ makes pointer from integer without a cast 
[-Werror=int-conversion]
  intel_gt_set_wedged(to_gt(i915));
  ^~~
In file included from ./drivers/gpu/drm/i915/gt/intel_gtt.h:28,
 from ./drivers/gpu/drm/i915/gt/gen6_ppgtt.h:9,
 from drivers/gpu/drm/i915/gem/i915_gem_context.c:72:
./drivers/gpu/drm/i915/gt/intel_reset.h:44:43: note: expected ‘struct intel_gt 
*’ but argument is of type ‘int’
 void intel_gt_set_wedged(struct intel_gt *gt);
  ~^~
cc1: all warnings being treated as errors
scripts/Makefile.build:277: recipe for target 
'drivers/gpu/drm/i915/gem/i915_gem_context.o' failed
make[4]: *** [drivers/gpu/drm/i915/gem/i915_gem_context.o] Error 1
scripts/Makefile.build:540: recipe for target 'drivers/gpu/drm/i915' failed
make[3]: *** [drivers/gpu/drm/i915] Error 2
scripts/Makefile.build:540: recipe for target 'drivers/gpu/drm' failed
make[2]: *** [drivers/gpu/drm] Error 2
scripts/Makefile.build:540: recipe for target 'drivers/gpu' failed
make[1]: *** [drivers/gpu] Error 2
Makefile:1868: recipe for target 'drivers' failed
make: *** [drivers] Error 2

Re: [Intel-gfx] [PATCH 10/26] drm/i915/guc: Assign contexts in parent-child relationship consecutive guc_ids

[John Harrison]

On 10/4/2021 15:06, Matthew Brost wrote:

Assign contexts in parent-child relationship consecutive guc_ids. This
is accomplished by partitioning guc_id space between ones that need to
be consecutive (1/16 available guc_ids) and ones that do not (15/16 of
available guc_ids). The consecutive search is implemented via the bitmap
API.

This is a precursor to the full GuC multi-lrc implementation but aligns
to how GuC mutli-lrc interface is defined - guc_ids must be consecutive
when using the GuC multi-lrc interface.

v2:
  (Daniel Vetter)
   - Explicitly state why we assign consecutive guc_ids
v3:
  (John Harrison)
   - Bring back in spin lock

Signed-off-by: Matthew Brost 
---
  drivers/gpu/drm/i915/gt/uc/intel_guc.h|   6 +-
  .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 104 ++
  2 files changed, 86 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 25a598e2b6e8..a9f4ec972bfb 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -76,9 +76,13 @@ struct intel_guc {
 */
spinlock_t lock;
/**
-* @guc_ids: used to allocate new guc_ids
+* @guc_ids: used to allocate new guc_ids, single-lrc
 */
struct ida guc_ids;
+   /**
+* @guc_ids_bitmap: used to allocate new guc_ids, multi-lrc
+*/
+   unsigned long *guc_ids_bitmap;
/**
 * @guc_id_list: list of intel_context with valid guc_ids but no
 * refs
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 1f2809187513..79e7732e83b2 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -128,6 +128,16 @@ guc_create_virtual(struct intel_engine_cs **siblings, 
unsigned int count);
  
  #define GUC_REQUEST_SIZE 64 /* bytes */
  
+/*

+ * We reserve 1/16 of the guc_ids for multi-lrc as these need to be contiguous
+ * per the GuC submission interface. A different allocation algorithm is used
+ * (bitmap vs. ida) between multi-lrc and single-lrc hence the reason to
+ * partition the guc_id space. We believe the number of multi-lrc contexts in
+ * use should be low and 1/16 should be sufficient. Minimum of 32 guc_ids for
+ * multi-lrc.
+ */
+#define NUMBER_MULTI_LRC_GUC_ID(GUC_MAX_LRC_DESCRIPTORS / 16)
+
  /*
   * Below is a set of functions which control the GuC scheduling state which
   * require a lock.
@@ -1206,6 +1216,11 @@ int intel_guc_submission_init(struct intel_guc *guc)
INIT_WORK(>submission_state.destroyed_worker,
  destroyed_worker_func);
  
+	guc->submission_state.guc_ids_bitmap =

+   bitmap_zalloc(NUMBER_MULTI_LRC_GUC_ID, GFP_KERNEL);
+   if (!guc->submission_state.guc_ids_bitmap)
+   return -ENOMEM;
+
return 0;
  }
  
@@ -1217,6 +1232,7 @@ void intel_guc_submission_fini(struct intel_guc *guc)

guc_lrc_desc_pool_destroy(guc);
guc_flush_destroyed_contexts(guc);
i915_sched_engine_put(guc->sched_engine);
+   bitmap_free(guc->submission_state.guc_ids_bitmap);
  }
  
  static inline void queue_request(struct i915_sched_engine *sched_engine,

@@ -1268,18 +1284,43 @@ static void guc_submit_request(struct i915_request *rq)
spin_unlock_irqrestore(_engine->lock, flags);
  }
  
-static int new_guc_id(struct intel_guc *guc)

+static int new_guc_id(struct intel_guc *guc, struct intel_context *ce)
  {
-   return ida_simple_get(>submission_state.guc_ids, 0,
- GUC_MAX_LRC_DESCRIPTORS, GFP_KERNEL |
- __GFP_RETRY_MAYFAIL | __GFP_NOWARN);
+   int ret;
+
+   GEM_BUG_ON(intel_context_is_child(ce));
+
+   if (intel_context_is_parent(ce))
+   ret = 
bitmap_find_free_region(guc->submission_state.guc_ids_bitmap,
+ NUMBER_MULTI_LRC_GUC_ID,
+ 
order_base_2(ce->parallel.number_children
+  + 1));
+   else
+   ret = ida_simple_get(>submission_state.guc_ids,
+NUMBER_MULTI_LRC_GUC_ID,
+GUC_MAX_LRC_DESCRIPTORS,
+GFP_KERNEL | __GFP_RETRY_MAYFAIL |
+__GFP_NOWARN);
+   if (unlikely(ret < 0))
+   return ret;
+
+   ce->guc_id.id = ret;
+   return 0;
  }
  
  static void __release_guc_id(struct intel_guc *guc, struct intel_context *ce)

  {
+   GEM_BUG_ON(intel_context_is_child(ce));
+
if (!context_guc_id_invalid(ce)) {
-   ida_simple_remove(>submission_state.guc_ids,
-   

Re: [Intel-gfx] [PATCH 01/11] drm/i915: Add a table with a descriptor for all i915 modifiers

[Imre Deak]

On Fri, Oct 08, 2021 at 12:32:57AM +0300, Ville Syrjälä wrote:
> On Fri, Oct 08, 2021 at 12:26:11AM +0300, Imre Deak wrote:
> > On Fri, Oct 08, 2021 at 12:10:00AM +0300, Ville Syrjälä wrote:
> > > On Thu, Oct 07, 2021 at 11:35:07PM +0300, Imre Deak wrote:
> > > > Add a table describing all the framebuffer modifiers used by i915 at one
> > > > place. This has the benefit of deduplicating the listing of supported
> > > > modifiers for each platform and checking the support of these modifiers
> > > > on a given plane. This also simplifies in a similar way getting some
> > > > attribute for a modifier, for instance checking if the modifier is a
> > > > CCS modifier type.
> > > > 
> > > > Signed-off-by: Imre Deak 
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_cursor.c   |  19 +-
> > > >  .../drm/i915/display/intel_display_types.h|   1 -
> > > >  drivers/gpu/drm/i915/display/intel_fb.c   | 178 ++
> > > >  drivers/gpu/drm/i915/display/intel_fb.h   |   8 +
> > > >  drivers/gpu/drm/i915/display/intel_sprite.c   |  35 +---
> > > >  drivers/gpu/drm/i915/display/skl_scaler.c |   1 +
> > > >  .../drm/i915/display/skl_universal_plane.c| 137 +-
> > > >  drivers/gpu/drm/i915/i915_drv.h   |   3 +
> > > >  8 files changed, 218 insertions(+), 164 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c 
> > > > b/drivers/gpu/drm/i915/display/intel_cursor.c
> > > > index f6dcb5aa63f64..bcd44ff30ce5b 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> > > > @@ -28,11 +28,6 @@ static const u32 intel_cursor_formats[] = {
> > > > DRM_FORMAT_ARGB,
> > > >  };
> > > >  
> > > > -static const u64 cursor_format_modifiers[] = {
> > > > -   DRM_FORMAT_MOD_LINEAR,
> > > > -   DRM_FORMAT_MOD_INVALID
> > > > -};
> > > > -
> > > >  static u32 intel_cursor_base(const struct intel_plane_state 
> > > > *plane_state)
> > > >  {
> > > > struct drm_i915_private *dev_priv =
> > > > @@ -605,8 +600,10 @@ static bool i9xx_cursor_get_hw_state(struct 
> > > > intel_plane *plane,
> > > >  static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,
> > > >   u32 format, u64 modifier)
> > > >  {
> > > > -   return modifier == DRM_FORMAT_MOD_LINEAR &&
> > > > -   format == DRM_FORMAT_ARGB;
> > > > +   if (!intel_fb_plane_supports_modifier(to_intel_plane(_plane), 
> > > > modifier))
> > > > +   return false;
> > > > +
> > > > +   return format == DRM_FORMAT_ARGB;
> > > >  }
> > > >  
> > > >  static int
> > > > @@ -754,6 +751,7 @@ intel_cursor_plane_create(struct drm_i915_private 
> > > > *dev_priv,
> > > >  {
> > > > struct intel_plane *cursor;
> > > > int ret, zpos;
> > > > +   u64 *modifiers;
> > > >  
> > > > cursor = intel_plane_alloc();
> > > > if (IS_ERR(cursor))
> > > > @@ -784,13 +782,18 @@ intel_cursor_plane_create(struct drm_i915_private 
> > > > *dev_priv,
> > > > if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || 
> > > > HAS_CUR_FBC(dev_priv))
> > > > cursor->cursor.size = ~0;
> > > >  
> > > > +   modifiers = intel_fb_plane_get_modifiers(dev_priv, pipe, 
> > > > cursor->id);
> > > > +
> > > > ret = drm_universal_plane_init(_priv->drm, >base,
> > > >0, _cursor_plane_funcs,
> > > >intel_cursor_formats,
> > > >ARRAY_SIZE(intel_cursor_formats),
> > > > -  cursor_format_modifiers,
> > > > +  modifiers,
> > > >DRM_PLANE_TYPE_CURSOR,
> > > >"cursor %c", pipe_name(pipe));
> > > > +
> > > > +   kfree(modifiers);
> > > > +
> > > > if (ret)
> > > > goto fail;
> > > >  
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> > > > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > index 21ce8bccc645a..bb53b01f07aee 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > > @@ -1336,7 +1336,6 @@ struct intel_plane {
> > > > enum plane_id id;
> > > > enum pipe pipe;
> > > > bool has_fbc;
> > > > -   bool has_ccs;
> > > > bool need_async_flip_disable_wa;
> > > > u32 frontbuffer_bit;
> > > >  
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> > > > b/drivers/gpu/drm/i915/display/intel_fb.c
> > > > index fa1f375e696bf..aefae988b620b 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > > > @@ -13,6 +13,184 @@
> > > >  
> > > >  #define check_array_bounds(i915, a, i) 

[Intel-gfx] [PATCH] drm/i915/gem: Check function return in live_nop_switch

[Oak Zeng]

Fail this test earlier if i915_request_await_dma_fence
fails.

Signed-off-by: Oak Zeng 
---
 drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c 
b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index b32f7fed2d9c..c0b85e861014 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -82,7 +82,14 @@ static int live_nop_switch(void *arg)
goto out_file;
}
if (rq) {
-   i915_request_await_dma_fence(this, >fence);
+   if (i915_request_await_dma_fence(this,
+   >fence)) {
+   pr_err("Failed to populate %ld 
contexts\n", n);
+   intel_gt_set_wedged(to_gt(i915));
+   i915_request_put(rq);
+   err = -EIO;
+   goto out_file;
+   }
i915_request_put(rq);
}
rq = i915_request_get(this);
-- 
2.25.1

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Simplify handling of modifiers

[Patchwork]

== Series Details ==

Series: drm/i915: Simplify handling of modifiers
URL   : https://patchwork.freedesktop.org/series/95579/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10696 -> Patchwork_21283


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21283 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21283, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21283:

### IGT changes ###

 Possible regressions 

  * igt@kms_addfb_basic@addfb25-bad-modifier:
- fi-icl-y:   [PASS][1] -> [DMESG-WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-icl-y/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-icl-y/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-bwr-2160:[PASS][3] -> [DMESG-WARN][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-bwr-2160/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-bwr-2160/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-rkl-11600:   [PASS][5] -> [DMESG-WARN][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-rkl-11600/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-rkl-11600/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-skl-guc: [PASS][7] -> [DMESG-WARN][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-skl-guc/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-skl-guc/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-skl-6600u:   [PASS][9] -> [DMESG-WARN][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-skl-6600u/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-skl-6600u/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-pnv-d510:[PASS][11] -> [DMESG-WARN][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-pnv-d510/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-pnv-d510/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-bdw-5557u:   [PASS][13] -> [DMESG-WARN][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-bdw-5557u/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-bdw-5557u/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-kbl-7567u:   [PASS][15] -> [DMESG-WARN][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-kbl-7567u/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-kbl-7567u/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-snb-2520m:   [PASS][17] -> [DMESG-WARN][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-snb-2520m/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-snb-2520m/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-tgl-1115g4:  [PASS][19] -> [DMESG-WARN][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-tgl-1115g4/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-tgl-1115g4/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-hsw-4770:[PASS][21] -> [DMESG-WARN][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-bxt-dsi: [PASS][23] -> [DMESG-WARN][24]
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-bxt-dsi/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-bxt-dsi/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-cfl-8700k:   [PASS][25] -> [DMESG-WARN][26]
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-cfl-8700k/igt@kms_addfb_ba...@addfb25-bad-modifier.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21283/fi-cfl-8700k/igt@kms_addfb_ba...@addfb25-bad-modifier.html
- fi-skl-6700k2:  NOTRUN -> [DMESG-WARN][27]
   [27]: 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Simplify handling of modifiers

[Patchwork]

== Series Details ==

Series: drm/i915: Simplify handling of modifiers
URL   : https://patchwork.freedesktop.org/series/95579/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_fb.c:131:3: warning: symbol 
'intel_modifiers' was not declared. Should it be static?
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:27:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:32:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:49:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:56:9: warning: trying to copy 
expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1392:5: warning: context imbalance in 
'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_perf.c:1442:15: warning: memset with byte count of 
16777216
+drivers/gpu/drm/i915/i915_perf.c:1496:15: warning: memset with byte count of 
16777216
+./include/asm-generic/bitops/find.h:112:45: warning: shift count is negative 
(-262080)
+./include/asm-generic/bitops/find.h:32:31: warning: shift count is negative 
(-262080)
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 
'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write16' 
- different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write32' 
- different lock contexts for basic block
+./include/linux/spinlock.h:418:9: warning: context imbalance in 'gen6_write8' 
- different lock contexts for basic block

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Simplify handling of modifiers

[Patchwork]

== Series Details ==

Series: drm/i915: Simplify handling of modifiers
URL   : https://patchwork.freedesktop.org/series/95579/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
b43f636afaea drm/i915: Add a table with a descriptor for all i915 modifiers
147f27b14377 drm/i915: Move intel_get_format_info() to intel_fb.c
-:264: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'format_list' - possible 
side-effects?
#264: FILE: drivers/gpu/drm/i915/display/intel_fb.c:109:
+#define FORMAT_OVERRIDE(format_list) \
+   .formats = format_list, \
+   .format_count = ARRAY_SIZE(format_list)

total: 0 errors, 0 warnings, 1 checks, 350 lines checked
00315bd9b13a drm/i915: Add tiling attribute to the modifier descriptor
a07b18ff79b6 drm/i915: Simplify the modifier check for interlaced scanout 
support
6c7f82cfed4e drm/i915: Unexport is_semiplanar_uv_plane()
2b0fae99dcf3 drm/i915: Move intel_format_info_is_yuv_semiplanar() to intel_fb.c
049969f74a95 drm/i915: Add a platform independent way to get the RC CCS CC plane
26e6af6207e8 drm/i915: Handle CCS CC planes separately from CCS control planes
14c507bc8eb3 drm/i915: Add a platform independent way to check for CCS control 
planes
-:247: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#247: FILE: drivers/gpu/drm/i915/display/intel_fb.c:1234:
+   unsigned int min_stride = intel_fb_is_ccs_ctrl_plane(>base, 
color_plane) ? 2 : 8;

total: 0 errors, 1 warnings, 0 checks, 228 lines checked
4dfe4cce0fad drm/i915: Move is_ccs_modifier() to intel_fb.c
656646ce1dc3 drm/i915: Add functions to check for RC CCS CC and MC CCS modifiers

Re: [Intel-gfx] [PATCH 01/11] drm/i915: Add a table with a descriptor for all i915 modifiers

[Ville Syrjälä]

On Fri, Oct 08, 2021 at 12:26:11AM +0300, Imre Deak wrote:
> On Fri, Oct 08, 2021 at 12:10:00AM +0300, Ville Syrjälä wrote:
> > On Thu, Oct 07, 2021 at 11:35:07PM +0300, Imre Deak wrote:
> > > Add a table describing all the framebuffer modifiers used by i915 at one
> > > place. This has the benefit of deduplicating the listing of supported
> > > modifiers for each platform and checking the support of these modifiers
> > > on a given plane. This also simplifies in a similar way getting some
> > > attribute for a modifier, for instance checking if the modifier is a
> > > CCS modifier type.
> > > 
> > > Signed-off-by: Imre Deak 
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_cursor.c   |  19 +-
> > >  .../drm/i915/display/intel_display_types.h|   1 -
> > >  drivers/gpu/drm/i915/display/intel_fb.c   | 178 ++
> > >  drivers/gpu/drm/i915/display/intel_fb.h   |   8 +
> > >  drivers/gpu/drm/i915/display/intel_sprite.c   |  35 +---
> > >  drivers/gpu/drm/i915/display/skl_scaler.c |   1 +
> > >  .../drm/i915/display/skl_universal_plane.c| 137 +-
> > >  drivers/gpu/drm/i915/i915_drv.h   |   3 +
> > >  8 files changed, 218 insertions(+), 164 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c 
> > > b/drivers/gpu/drm/i915/display/intel_cursor.c
> > > index f6dcb5aa63f64..bcd44ff30ce5b 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> > > @@ -28,11 +28,6 @@ static const u32 intel_cursor_formats[] = {
> > >   DRM_FORMAT_ARGB,
> > >  };
> > >  
> > > -static const u64 cursor_format_modifiers[] = {
> > > - DRM_FORMAT_MOD_LINEAR,
> > > - DRM_FORMAT_MOD_INVALID
> > > -};
> > > -
> > >  static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
> > >  {
> > >   struct drm_i915_private *dev_priv =
> > > @@ -605,8 +600,10 @@ static bool i9xx_cursor_get_hw_state(struct 
> > > intel_plane *plane,
> > >  static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,
> > > u32 format, u64 modifier)
> > >  {
> > > - return modifier == DRM_FORMAT_MOD_LINEAR &&
> > > - format == DRM_FORMAT_ARGB;
> > > + if (!intel_fb_plane_supports_modifier(to_intel_plane(_plane), modifier))
> > > + return false;
> > > +
> > > + return format == DRM_FORMAT_ARGB;
> > >  }
> > >  
> > >  static int
> > > @@ -754,6 +751,7 @@ intel_cursor_plane_create(struct drm_i915_private 
> > > *dev_priv,
> > >  {
> > >   struct intel_plane *cursor;
> > >   int ret, zpos;
> > > + u64 *modifiers;
> > >  
> > >   cursor = intel_plane_alloc();
> > >   if (IS_ERR(cursor))
> > > @@ -784,13 +782,18 @@ intel_cursor_plane_create(struct drm_i915_private 
> > > *dev_priv,
> > >   if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
> > >   cursor->cursor.size = ~0;
> > >  
> > > + modifiers = intel_fb_plane_get_modifiers(dev_priv, pipe, cursor->id);
> > > +
> > >   ret = drm_universal_plane_init(_priv->drm, >base,
> > >  0, _cursor_plane_funcs,
> > >  intel_cursor_formats,
> > >  ARRAY_SIZE(intel_cursor_formats),
> > > -cursor_format_modifiers,
> > > +modifiers,
> > >  DRM_PLANE_TYPE_CURSOR,
> > >  "cursor %c", pipe_name(pipe));
> > > +
> > > + kfree(modifiers);
> > > +
> > >   if (ret)
> > >   goto fail;
> > >  
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> > > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index 21ce8bccc645a..bb53b01f07aee 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -1336,7 +1336,6 @@ struct intel_plane {
> > >   enum plane_id id;
> > >   enum pipe pipe;
> > >   bool has_fbc;
> > > - bool has_ccs;
> > >   bool need_async_flip_disable_wa;
> > >   u32 frontbuffer_bit;
> > >  
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> > > b/drivers/gpu/drm/i915/display/intel_fb.c
> > > index fa1f375e696bf..aefae988b620b 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > > @@ -13,6 +13,184 @@
> > >  
> > >  #define check_array_bounds(i915, a, i) drm_WARN_ON(&(i915)->drm, (i) >= 
> > > ARRAY_SIZE(a))
> > >  
> > > +const struct intel_modifier_desc {
> > > + u64 id;
> > > + u64 display_versions;
> > > +
> > > + struct {
> > > +#define INTEL_CCS_RC BIT(0)
> > > +#define INTEL_CCS_RC_CC  BIT(1)
> > > +#define INTEL_CCS_MC BIT(2)
> > > +
> > > +#define INTEL_CCS_ANY(INTEL_CCS_RC | INTEL_CCS_RC_CC | 
> > > INTEL_CCS_MC)
> > > + u8 type:3;
> > > + } ccs;
> > > +} intel_modifiers[] = {
> > > + {
> > > +

[Intel-gfx] ✓ Fi.CI.BAT: success for drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers

[Patchwork]

== Series Details ==

Series: drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers
URL   : https://patchwork.freedesktop.org/series/95578/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10696 -> Patchwork_21282


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/index.html

Known issues


  Here are the changes found in Patchwork_21282 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@cs-gfx:
- fi-skl-6700k2:  NOTRUN -> [SKIP][1] ([fdo#109271]) +31 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-skl-6700k2/igt@amdgpu/amd_ba...@cs-gfx.html
- fi-kbl-soraka:  NOTRUN -> [SKIP][2] ([fdo#109271]) +5 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-kbl-soraka/igt@amdgpu/amd_ba...@cs-gfx.html

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600:NOTRUN -> [SKIP][3] ([fdo#109271]) +17 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html

  * igt@gem_huc_copy@huc-copy:
- fi-skl-6700k2:  NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-skl-6700k2/igt@gem_huc_c...@huc-copy.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-6700k2:  NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#533])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-skl-6700k2/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2:  [FAIL][6] ([i915#1888]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-tgl-u2/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_exec_suspend@basic-s3:
- fi-tgl-1115g4:  [FAIL][8] ([i915#1888]) -> [PASS][9] +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s3.html
- fi-skl-6700k2:  [INCOMPLETE][10] ([i915#146] / [i915#198]) -> 
[PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-r:   [DMESG-FAIL][12] ([i915#2291] / [i915#541]) -> 
[PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
- {fi-hsw-gt1}:   [DMESG-WARN][14] ([i915#3303]) -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-hsw-gt1/igt@i915_selftest@l...@hangcheck.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-hsw-gt1/igt@i915_selftest@l...@hangcheck.html
- fi-snb-2600:[INCOMPLETE][16] ([i915#3921]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21282/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541


Participating hosts (44 -> 38)
--

  Missing(6): fi-ilk-m540 bat-dg1-6 fi-hsw-4200u fi-bsw-cyan fi-ctg-p8600 
bat-jsl-1 


Build changes
-

  * Linux: CI_DRM_10696 -> Patchwork_21282

  CI-20190529: 20190529
  CI_DRM_10696: 58a206ae5bf2f81a11e4408d10a3e1b445d6eebb @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6237: 910b5caac6625d2bf0b6c1dde502451431bd0159 @ 

Re: [Intel-gfx] [PATCH 01/11] drm/i915: Add a table with a descriptor for all i915 modifiers

[Imre Deak]

On Fri, Oct 08, 2021 at 12:10:00AM +0300, Ville Syrjälä wrote:
> On Thu, Oct 07, 2021 at 11:35:07PM +0300, Imre Deak wrote:
> > Add a table describing all the framebuffer modifiers used by i915 at one
> > place. This has the benefit of deduplicating the listing of supported
> > modifiers for each platform and checking the support of these modifiers
> > on a given plane. This also simplifies in a similar way getting some
> > attribute for a modifier, for instance checking if the modifier is a
> > CCS modifier type.
> > 
> > Signed-off-by: Imre Deak 
> > ---
> >  drivers/gpu/drm/i915/display/intel_cursor.c   |  19 +-
> >  .../drm/i915/display/intel_display_types.h|   1 -
> >  drivers/gpu/drm/i915/display/intel_fb.c   | 178 ++
> >  drivers/gpu/drm/i915/display/intel_fb.h   |   8 +
> >  drivers/gpu/drm/i915/display/intel_sprite.c   |  35 +---
> >  drivers/gpu/drm/i915/display/skl_scaler.c |   1 +
> >  .../drm/i915/display/skl_universal_plane.c| 137 +-
> >  drivers/gpu/drm/i915/i915_drv.h   |   3 +
> >  8 files changed, 218 insertions(+), 164 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c 
> > b/drivers/gpu/drm/i915/display/intel_cursor.c
> > index f6dcb5aa63f64..bcd44ff30ce5b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> > @@ -28,11 +28,6 @@ static const u32 intel_cursor_formats[] = {
> > DRM_FORMAT_ARGB,
> >  };
> >  
> > -static const u64 cursor_format_modifiers[] = {
> > -   DRM_FORMAT_MOD_LINEAR,
> > -   DRM_FORMAT_MOD_INVALID
> > -};
> > -
> >  static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
> >  {
> > struct drm_i915_private *dev_priv =
> > @@ -605,8 +600,10 @@ static bool i9xx_cursor_get_hw_state(struct 
> > intel_plane *plane,
> >  static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,
> >   u32 format, u64 modifier)
> >  {
> > -   return modifier == DRM_FORMAT_MOD_LINEAR &&
> > -   format == DRM_FORMAT_ARGB;
> > +   if (!intel_fb_plane_supports_modifier(to_intel_plane(_plane), modifier))
> > +   return false;
> > +
> > +   return format == DRM_FORMAT_ARGB;
> >  }
> >  
> >  static int
> > @@ -754,6 +751,7 @@ intel_cursor_plane_create(struct drm_i915_private 
> > *dev_priv,
> >  {
> > struct intel_plane *cursor;
> > int ret, zpos;
> > +   u64 *modifiers;
> >  
> > cursor = intel_plane_alloc();
> > if (IS_ERR(cursor))
> > @@ -784,13 +782,18 @@ intel_cursor_plane_create(struct drm_i915_private 
> > *dev_priv,
> > if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
> > cursor->cursor.size = ~0;
> >  
> > +   modifiers = intel_fb_plane_get_modifiers(dev_priv, pipe, cursor->id);
> > +
> > ret = drm_universal_plane_init(_priv->drm, >base,
> >0, _cursor_plane_funcs,
> >intel_cursor_formats,
> >ARRAY_SIZE(intel_cursor_formats),
> > -  cursor_format_modifiers,
> > +  modifiers,
> >DRM_PLANE_TYPE_CURSOR,
> >"cursor %c", pipe_name(pipe));
> > +
> > +   kfree(modifiers);
> > +
> > if (ret)
> > goto fail;
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 21ce8bccc645a..bb53b01f07aee 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1336,7 +1336,6 @@ struct intel_plane {
> > enum plane_id id;
> > enum pipe pipe;
> > bool has_fbc;
> > -   bool has_ccs;
> > bool need_async_flip_disable_wa;
> > u32 frontbuffer_bit;
> >  
> > diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> > b/drivers/gpu/drm/i915/display/intel_fb.c
> > index fa1f375e696bf..aefae988b620b 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > @@ -13,6 +13,184 @@
> >  
> >  #define check_array_bounds(i915, a, i) drm_WARN_ON(&(i915)->drm, (i) >= 
> > ARRAY_SIZE(a))
> >  
> > +const struct intel_modifier_desc {
> > +   u64 id;
> > +   u64 display_versions;
> > +
> > +   struct {
> > +#define INTEL_CCS_RC   BIT(0)
> > +#define INTEL_CCS_RC_CCBIT(1)
> > +#define INTEL_CCS_MC   BIT(2)
> > +
> > +#define INTEL_CCS_ANY  (INTEL_CCS_RC | INTEL_CCS_RC_CC | 
> > INTEL_CCS_MC)
> > +   u8 type:3;
> > +   } ccs;
> > +} intel_modifiers[] = {
> > +   {
> > +   .id = DRM_FORMAT_MOD_LINEAR,
> > +   .display_versions = DISPLAY_VER_MASK_ALL,
> > +   },
> > +   {
> > +   .id = I915_FORMAT_MOD_X_TILED,
> > +   .display_versions = 

Re: [Intel-gfx] [PATCH 01/11] drm/i915: Add a table with a descriptor for all i915 modifiers

[Ville Syrjälä]

On Thu, Oct 07, 2021 at 11:35:07PM +0300, Imre Deak wrote:
> Add a table describing all the framebuffer modifiers used by i915 at one
> place. This has the benefit of deduplicating the listing of supported
> modifiers for each platform and checking the support of these modifiers
> on a given plane. This also simplifies in a similar way getting some
> attribute for a modifier, for instance checking if the modifier is a
> CCS modifier type.
> 
> Signed-off-by: Imre Deak 
> ---
>  drivers/gpu/drm/i915/display/intel_cursor.c   |  19 +-
>  .../drm/i915/display/intel_display_types.h|   1 -
>  drivers/gpu/drm/i915/display/intel_fb.c   | 178 ++
>  drivers/gpu/drm/i915/display/intel_fb.h   |   8 +
>  drivers/gpu/drm/i915/display/intel_sprite.c   |  35 +---
>  drivers/gpu/drm/i915/display/skl_scaler.c |   1 +
>  .../drm/i915/display/skl_universal_plane.c| 137 +-
>  drivers/gpu/drm/i915/i915_drv.h   |   3 +
>  8 files changed, 218 insertions(+), 164 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c 
> b/drivers/gpu/drm/i915/display/intel_cursor.c
> index f6dcb5aa63f64..bcd44ff30ce5b 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -28,11 +28,6 @@ static const u32 intel_cursor_formats[] = {
>   DRM_FORMAT_ARGB,
>  };
>  
> -static const u64 cursor_format_modifiers[] = {
> - DRM_FORMAT_MOD_LINEAR,
> - DRM_FORMAT_MOD_INVALID
> -};
> -
>  static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
>  {
>   struct drm_i915_private *dev_priv =
> @@ -605,8 +600,10 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane 
> *plane,
>  static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,
> u32 format, u64 modifier)
>  {
> - return modifier == DRM_FORMAT_MOD_LINEAR &&
> - format == DRM_FORMAT_ARGB;
> + if (!intel_fb_plane_supports_modifier(to_intel_plane(_plane), modifier))
> + return false;
> +
> + return format == DRM_FORMAT_ARGB;
>  }
>  
>  static int
> @@ -754,6 +751,7 @@ intel_cursor_plane_create(struct drm_i915_private 
> *dev_priv,
>  {
>   struct intel_plane *cursor;
>   int ret, zpos;
> + u64 *modifiers;
>  
>   cursor = intel_plane_alloc();
>   if (IS_ERR(cursor))
> @@ -784,13 +782,18 @@ intel_cursor_plane_create(struct drm_i915_private 
> *dev_priv,
>   if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
>   cursor->cursor.size = ~0;
>  
> + modifiers = intel_fb_plane_get_modifiers(dev_priv, pipe, cursor->id);
> +
>   ret = drm_universal_plane_init(_priv->drm, >base,
>  0, _cursor_plane_funcs,
>  intel_cursor_formats,
>  ARRAY_SIZE(intel_cursor_formats),
> -cursor_format_modifiers,
> +modifiers,
>  DRM_PLANE_TYPE_CURSOR,
>  "cursor %c", pipe_name(pipe));
> +
> + kfree(modifiers);
> +
>   if (ret)
>   goto fail;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 21ce8bccc645a..bb53b01f07aee 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1336,7 +1336,6 @@ struct intel_plane {
>   enum plane_id id;
>   enum pipe pipe;
>   bool has_fbc;
> - bool has_ccs;
>   bool need_async_flip_disable_wa;
>   u32 frontbuffer_bit;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> b/drivers/gpu/drm/i915/display/intel_fb.c
> index fa1f375e696bf..aefae988b620b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -13,6 +13,184 @@
>  
>  #define check_array_bounds(i915, a, i) drm_WARN_ON(&(i915)->drm, (i) >= 
> ARRAY_SIZE(a))
>  
> +const struct intel_modifier_desc {
> + u64 id;
> + u64 display_versions;
> +
> + struct {
> +#define INTEL_CCS_RC BIT(0)
> +#define INTEL_CCS_RC_CC  BIT(1)
> +#define INTEL_CCS_MC BIT(2)
> +
> +#define INTEL_CCS_ANY(INTEL_CCS_RC | INTEL_CCS_RC_CC | 
> INTEL_CCS_MC)
> + u8 type:3;
> + } ccs;
> +} intel_modifiers[] = {
> + {
> + .id = DRM_FORMAT_MOD_LINEAR,
> + .display_versions = DISPLAY_VER_MASK_ALL,
> + },
> + {
> + .id = I915_FORMAT_MOD_X_TILED,
> + .display_versions = DISPLAY_VER_MASK_ALL,
> + },
> + {
> + .id = I915_FORMAT_MOD_Y_TILED,
> + .display_versions = DISPLAY_VER_MASK(9, 13),
> + },
> + {
> + .id = I915_FORMAT_MOD_Yf_TILED,
> + 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers

[Patchwork]

== Series Details ==

Series: drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers
URL   : https://patchwork.freedesktop.org/series/95578/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
-drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
-drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
-drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
-drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
-drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
-drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
-drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
+ from drivers/gpu/drm/amd/amdgpu/amdgpu_display.c:28:
- from 
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:28:
- from 
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:28:
- from 
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:28:
- from 
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:28:
+ from 
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:30:
+ from 
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:30:
+ from 
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:30:
+ from 
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_debugfs.c:30:

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers

[Patchwork]

== Series Details ==

Series: drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers
URL   : https://patchwork.freedesktop.org/series/95578/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
8d34fdf1cc49 drm: cleanup: drm_modeset_lock_all_ctx() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
7cbf763b4871 drm/i915: cleanup: drm_modeset_lock_all_ctx() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
13cb92d49c02 drm/msm: cleanup: drm_modeset_lock_all_ctx() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
b82af3f59874 drm: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
bb35bbdd26ff drm/vmwgfx: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
a8040ea39f2d drm/tegra: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
d0712186 drm/shmobile: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
1de49f3f0810 drm/radeon: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
e3a175ef0c54 drm/omapdrm: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
5fa6223c7d3e drm/nouveau: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
696204f23cab drm/msm: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
fbd3d0b396bb drm/i915: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
91f0cc0ba780 drm/i915: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN() [part 2]
6726d668d7b3 drm/i915: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN() [part 3]
9ec5220dd5a1 drm/gma500: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
d3f57a3cd640 drm/amd: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN()
8dc492c630ae drm/amd: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN() [part 2]
dfeb0d16c1f7 drm/amd: cleanup: drm_modeset_lock_all() --> 
DRM_MODESET_LOCK_ALL_BEGIN() [part 3]
08b6e1f105d9 drm: cleanup: remove drm_modeset_(un)lock_all()
7bf784bb287c drm: cleanup: remove acquire_ctx from drm_mode_config
-:8: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one

-:27: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s)

total: 1 errors, 1 warnings, 0 checks, 16 lines checked

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev7)

[Patchwork]

== Series Details ==

Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers 
(rev7)
URL   : https://patchwork.freedesktop.org/series/95127/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_10696 -> Patchwork_21281


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/index.html

Known issues


  Here are the changes found in Patchwork_21281 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@amdgpu/amd_basic@cs-gfx:
- fi-skl-6700k2:  NOTRUN -> [SKIP][1] ([fdo#109271]) +31 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-skl-6700k2/igt@amdgpu/amd_ba...@cs-gfx.html

  * igt@amdgpu/amd_basic@query-info:
- fi-kbl-soraka:  NOTRUN -> [SKIP][2] ([fdo#109271]) +1 similar issue
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-kbl-soraka/igt@amdgpu/amd_ba...@query-info.html

  * igt@gem_huc_copy@huc-copy:
- fi-skl-6700k2:  NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-skl-6700k2/igt@gem_huc_c...@huc-copy.html

  * igt@i915_selftest@live@execlists:
- fi-bsw-n3050:   [PASS][4] -> [INCOMPLETE][5] ([i915#2940])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-bsw-n3050/igt@i915_selftest@l...@execlists.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-bsw-n3050/igt@i915_selftest@l...@execlists.html

  * igt@kms_flip@basic-flip-vs-modeset@c-dp1:
- fi-cfl-8109u:   [PASS][6] -> [FAIL][7] ([i915#4165])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-cfl-8109u/igt@kms_flip@basic-flip-vs-mode...@c-dp1.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-cfl-8109u/igt@kms_flip@basic-flip-vs-mode...@c-dp1.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-cfl-8109u:   [PASS][8] -> [FAIL][9] ([i915#2546])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-cfl-8109u/igt@kms_frontbuffer_track...@basic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-6700k2:  NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#533])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-skl-6700k2/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html

  * igt@runner@aborted:
- fi-bdw-5557u:   NOTRUN -> [FAIL][11] ([i915#1602] / [i915#2029])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-bdw-5557u/igt@run...@aborted.html
- fi-bsw-n3050:   NOTRUN -> [FAIL][12] ([fdo#109271] / [i915#1436] / 
[i915#3428])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-bsw-n3050/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0:
- fi-tgl-1115g4:  [FAIL][13] ([i915#1888]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s0.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-tgl-1115g4/igt@gem_exec_susp...@basic-s0.html

  * igt@gem_exec_suspend@basic-s3:
- fi-skl-6700k2:  [INCOMPLETE][15] ([i915#146] / [i915#198]) -> 
[PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-skl-6700k2/igt@gem_exec_susp...@basic-s3.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-r:   [DMESG-FAIL][17] ([i915#2291] / [i915#541]) -> 
[PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10696/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21281/fi-kbl-r/igt@i915_selftest@live@gt_heartbeat.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
  [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#2546]: https://gitlab.freedesktop.org/drm/intel/issues/2546
  [i915#2940]: 

[Intel-gfx] [PATCH 11/11] drm/i915: Add functions to check for RC CCS CC and MC CCS modifiers

[Imre Deak]

Instead of open-coding the checks add functions for this, simplifying
the handling of CCS modifiers on future platforms.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_fb.c   | 24 +++
 drivers/gpu/drm/i915/display/intel_fb.h   |  2 ++
 .../drm/i915/display/skl_universal_plane.c|  4 ++--
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index b68bda0845c56..e8d37f0678741 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -264,6 +264,30 @@ bool intel_fb_is_ccs_modifier(u64 modifier)
return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_ANY);
 }
 
+/**
+ * intel_fb_is_rc_ccs_cc_modifier: Check if a modifier is an RC CCS CC 
modifier type
+ * @modifier: Modifier to check
+ *
+ * Returns:
+ * Returns %true if @modifier is a render with color clear modifier.
+ */
+bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier)
+{
+   return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_RC_CC);
+}
+
+/**
+ * intel_fb_is_mc_ccs_modifier: Check if a modifier is an MC CCS modifier type
+ * @modifier: Modifier to check
+ *
+ * Returns:
+ * Returns %true if @modifier is a media compression modifier.
+ */
+bool intel_fb_is_mc_ccs_modifier(u64 modifier)
+{
+   return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_MC);
+}
+
 static bool skl_plane_has_rc_ccs(struct drm_i915_private *i915,
 enum pipe pipe, enum plane_id plane_id)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h 
b/drivers/gpu/drm/i915/display/intel_fb.h
index af8097699dac5..cb5bc6304011a 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -23,6 +23,8 @@ struct intel_plane;
 struct intel_plane_state;
 
 bool intel_fb_is_ccs_modifier(u64 modifier);
+bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier);
+bool intel_fb_is_mc_ccs_modifier(u64 modifier);
 
 bool intel_fb_is_ccs_ctrl_plane(const struct drm_framebuffer *fb, int plane);
 int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb);
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index d29ad180f8477..9cff6cc2bdf4f 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1067,7 +1067,7 @@ skl_program_plane(struct intel_plane *plane,
if (fb->format->is_yuv && icl_is_hdr_plane(dev_priv, plane_id))
icl_program_input_csc(plane, crtc_state, plane_state);
 
-   if (fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC)
+   if (intel_fb_is_rc_ccs_cc_modifier(fb->modifier))
intel_uncore_write64_fw(_priv->uncore,
PLANE_CC_VAL(pipe, plane_id), 
plane_state->ccval);
 
@@ -1899,7 +1899,7 @@ static bool gen12_plane_format_mod_supported(struct 
drm_plane *_plane,
case DRM_FORMAT_P010:
case DRM_FORMAT_P012:
case DRM_FORMAT_P016:
-   if (modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS)
+   if (intel_fb_is_mc_ccs_modifier(modifier))
return true;
fallthrough;
case DRM_FORMAT_RGB565:
-- 
2.27.0

[Intel-gfx] [PATCH 10/11] drm/i915: Move is_ccs_modifier() to intel_fb.c

[Imre Deak]

Move the function to intel_fb.c and rename it adding the intel_fb_
prefix following the naming of exported functions.

Signed-off-by: Imre Deak 
---
 .../drm/i915/display/intel_display_types.h|  9 --
 drivers/gpu/drm/i915/display/intel_fb.c   | 29 ++-
 drivers/gpu/drm/i915/display/intel_fb.h   |  2 ++
 .../drm/i915/display/skl_universal_plane.c| 12 
 4 files changed, 29 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index b4b6a31caf4e3..f38b70ef6afaa 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -2041,13 +2041,4 @@ to_intel_frontbuffer(struct drm_framebuffer *fb)
return fb ? to_intel_framebuffer(fb)->frontbuffer : NULL;
 }
 
-static inline bool is_ccs_modifier(u64 modifier)
-{
-   return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
-  modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
-  modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
-  modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
-  modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
-}
-
 #endif /*  __INTEL_DISPLAY_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index 392f89e659eb6..b68bda0845c56 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -251,6 +251,19 @@ static bool is_ccs_type_modifier(const struct 
intel_modifier_desc *md, u8 ccs_ty
return md->ccs.type & ccs_type;
 }
 
+/**
+ * intel_fb_is_ccs_modifier: Check if a modifier is a CCS modifier type
+ * @modifier: Modifier to check
+ *
+ * Returns:
+ * Returns %true if @modifier is a render, render with color clear or
+ * media compression modifier.
+ */
+bool intel_fb_is_ccs_modifier(u64 modifier)
+{
+   return is_ccs_type_modifier(lookup_modifier(modifier), INTEL_CCS_ANY);
+}
+
 static bool skl_plane_has_rc_ccs(struct drm_i915_private *i915,
 enum pipe pipe, enum plane_id plane_id)
 {
@@ -473,7 +486,7 @@ bool is_surface_linear(const struct drm_framebuffer *fb, 
int color_plane)
 
 int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane)
 {
-   drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
+   drm_WARN_ON(fb->dev, !intel_fb_is_ccs_modifier(fb->modifier) ||
(main_plane && main_plane >= fb->format->num_planes / 2));
 
return fb->format->num_planes / 2 + main_plane;
@@ -481,7 +494,7 @@ int main_to_ccs_plane(const struct drm_framebuffer *fb, int 
main_plane)
 
 int skl_ccs_to_main_plane(const struct drm_framebuffer *fb, int ccs_plane)
 {
-   drm_WARN_ON(fb->dev, !is_ccs_modifier(fb->modifier) ||
+   drm_WARN_ON(fb->dev, !intel_fb_is_ccs_modifier(fb->modifier) ||
ccs_plane < fb->format->num_planes / 2);
 
if (is_gen12_ccs_cc_plane(fb, ccs_plane))
@@ -526,7 +539,7 @@ int skl_main_to_aux_plane(const struct drm_framebuffer *fb, 
int main_plane)
 {
struct drm_i915_private *i915 = to_i915(fb->dev);
 
-   if (is_ccs_modifier(fb->modifier))
+   if (intel_fb_is_ccs_modifier(fb->modifier))
return main_to_ccs_plane(fb, main_plane);
else if (DISPLAY_VER(i915) < 11 &&
 intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier))
@@ -1090,7 +1103,7 @@ static bool intel_plane_can_remap(const struct 
intel_plane_state *plane_state)
 * The new CCS hash mode isn't compatible with remapping as
 * the virtual address of the pages affects the compressed data.
 */
-   if (is_ccs_modifier(fb->modifier))
+   if (intel_fb_is_ccs_modifier(fb->modifier))
return false;
 
/* Linear needs a page aligned stride for remapping */
@@ -1497,7 +1510,7 @@ static void intel_plane_remap_gtt(struct 
intel_plane_state *plane_state)
src_w = drm_rect_width(_state->uapi.src) >> 16;
src_h = drm_rect_height(_state->uapi.src) >> 16;
 
-   drm_WARN_ON(>drm, is_ccs_modifier(fb->modifier));
+   drm_WARN_ON(>drm, intel_fb_is_ccs_modifier(fb->modifier));
 
/* Make src coordinates relative to the viewport */
drm_rect_translate(_state->uapi.src,
@@ -1560,7 +1573,7 @@ u32 intel_fb_max_stride(struct drm_i915_private *dev_priv,
 *
 * The new CCS hash mode makes remapping impossible
 */
-   if (DISPLAY_VER(dev_priv) < 4 || is_ccs_modifier(modifier) ||
+   if (DISPLAY_VER(dev_priv) < 4 || intel_fb_is_ccs_modifier(modifier) ||
intel_modifier_uses_dpt(dev_priv, modifier))
return intel_plane_fb_max_stride(dev_priv, pixel_format, 
modifier);
else if (DISPLAY_VER(dev_priv) >= 7)
@@ -1585,14 +1598,14 @@ intel_fb_stride_alignment(const struct drm_framebuffer 
*fb, int color_plane)
 * we need the 

[Intel-gfx] [PATCH 07/11] drm/i915: Add a platform independent way to get the RC CCS CC plane

[Imre Deak]

On future platforms the index of the color-clear plane will change from
the one used by the GEN12 RC CCS CC modifier, so add a way to retrieve
the index independently of the platform/modifier.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_display.c | 10 +---
 drivers/gpu/drm/i915/display/intel_fb.c  | 25 ++--
 drivers/gpu/drm/i915/display/intel_fb.h  |  2 ++
 3 files changed, 32 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 8043a9fd665a5..bfb9120cb31ed 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10031,10 +10031,14 @@ static void 
intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *s
 
for_each_new_intel_plane_in_state(state, plane, plane_state, i) {
struct drm_framebuffer *fb = plane_state->hw.fb;
+   int cc_plane;
int ret;
 
-   if (!fb ||
-   fb->modifier != I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC)
+   if (!fb)
+   continue;
+
+   cc_plane = intel_fb_rc_ccs_cc_plane(fb);
+   if (cc_plane < 0)
continue;
 
/*
@@ -10051,7 +10055,7 @@ static void 
intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state *s
 * GPU write on it.
 */
ret = i915_gem_object_read_from_page(intel_fb_obj(fb),
-fb->offsets[2] + 16,
+fb->offsets[cc_plane] + 16,
 _state->ccval,
 
sizeof(plane_state->ccval));
/* The above could only fail if the FB obj has an unexpected 
backing store type. */
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index f0d8c848b23e1..f18fab9c3b941 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -124,6 +124,7 @@ const struct intel_modifier_desc {
 
 #define INTEL_CCS_ANY  (INTEL_CCS_RC | INTEL_CCS_RC_CC | INTEL_CCS_MC)
u8 type:3;
+   u8 cc_planes:3;
} ccs;
 } intel_modifiers[] = {
{
@@ -176,6 +177,7 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC_CC,
+   .ccs.cc_planes = BIT(2),
 
FORMAT_OVERRIDE(gen12_ccs_cc_formats),
},
@@ -396,10 +398,29 @@ bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, 
int plane)
return is_gen12_ccs_modifier(fb->modifier) && is_ccs_plane(fb, plane);
 }
 
+/**
+ * intel_fb_rc_ccs_cc_plane: Get the CCS CC color plane index for a framebuffer
+ * @fb: Framebuffer
+ *
+ * Returns:
+ * Returns the index of the color clear plane for @fb, or -1 if @fb is not a
+ * framebuffer using a render compression/color clear modifier.
+ */
+int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb)
+{
+   const struct intel_modifier_desc *md = lookup_modifier(fb->modifier);
+
+   if (!md->ccs.cc_planes)
+   return -1;
+
+   drm_WARN_ON_ONCE(fb->dev, hweight8(md->ccs.cc_planes) > 1);
+
+   return ilog2((int)md->ccs.cc_planes);
+}
+
 bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane)
 {
-   return fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC &&
-  plane == 2;
+   return intel_fb_rc_ccs_cc_plane(fb) == plane;
 }
 
 static bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int 
color_plane)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h 
b/drivers/gpu/drm/i915/display/intel_fb.h
index d9693fc767c54..5affcc834e045 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -26,6 +26,8 @@ bool is_ccs_plane(const struct drm_framebuffer *fb, int 
plane);
 bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
 bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
 
+int intel_fb_rc_ccs_cc_plane(const struct drm_framebuffer *fb);
+
 u64 *intel_fb_plane_get_modifiers(struct drm_i915_private *i915,
  enum pipe pipe, enum plane_id plane_id);
 bool intel_fb_plane_supports_modifier(struct intel_plane *plane, u64 modifier);
-- 
2.27.0

[Intel-gfx] [PATCH 09/11] drm/i915: Add a platform independent way to check for CCS control planes

[Imre Deak]

Future platforms change the location of CCS control planes in CCS
framebuffers, so add intel_fb_is_rc_ccs_ctrl_plane() to query for these
planes independently of the platform. This function can be used
everywhere instead of is_ccs_plane() (or is_ccs_plane() && !cc_plane()),
since all the callers are only interested in control planes (and not CCS
color-clear planes).

Add the corresponding intel_fb_is_gen12_ccs_ctrl_plane(), which can be
used everywhere instead of is_gen12_ccs_plane(), based on the above
explanation.

This change also unexports the is_gen12_ccs_modifier(),
is_gen12_ccs_plane(), is_gen12_ccs_cc_plane() functions as they are only
used in intel_fb.c

Signed-off-by: Imre Deak 
---
 .../drm/i915/display/intel_display_types.h|  7 --
 drivers/gpu/drm/i915/display/intel_fb.c   | 73 ++-
 drivers/gpu/drm/i915/display/intel_fb.h   |  5 +-
 .../drm/i915/display/skl_universal_plane.c|  3 +-
 4 files changed, 56 insertions(+), 32 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index bb53b01f07aee..b4b6a31caf4e3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -2050,11 +2050,4 @@ static inline bool is_ccs_modifier(u64 modifier)
   modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
 }
 
-static inline bool is_gen12_ccs_modifier(u64 modifier)
-{
-   return modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
-  modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
-  modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
-}
-
 #endif /*  __INTEL_DISPLAY_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index e8fe198b1b6a1..392f89e659eb6 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -125,6 +125,8 @@ const struct intel_modifier_desc {
 #define INTEL_CCS_ANY  (INTEL_CCS_RC | INTEL_CCS_RC_CC | INTEL_CCS_MC)
u8 type:3;
u8 cc_planes:3;
+   u8 packed_ctrl_planes:4;
+   u8 planar_ctrl_planes:4;
} ccs;
 } intel_modifiers[] = {
{
@@ -151,6 +153,7 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC,
+   .ccs.packed_ctrl_planes = BIT(1),
 
FORMAT_OVERRIDE(skl_ccs_formats),
},
@@ -159,6 +162,7 @@ const struct intel_modifier_desc {
.display_versions = DISPLAY_VER_MASK(9, 11),
 
.ccs.type = INTEL_CCS_RC,
+   .ccs.packed_ctrl_planes = BIT(1),
 
FORMAT_OVERRIDE(skl_ccs_formats),
},
@@ -168,6 +172,7 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC,
+   .ccs.packed_ctrl_planes = BIT(1),
 
FORMAT_OVERRIDE(gen12_ccs_formats),
},
@@ -177,6 +182,7 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC_CC,
+   .ccs.packed_ctrl_planes = BIT(1),
.ccs.cc_planes = BIT(2),
 
FORMAT_OVERRIDE(gen12_ccs_cc_formats),
@@ -187,6 +193,8 @@ const struct intel_modifier_desc {
.tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_MC,
+   .ccs.packed_ctrl_planes = BIT(1),
+   .ccs.planar_ctrl_planes = BIT(2) | BIT(3),
 
FORMAT_OVERRIDE(gen12_ccs_formats),
},
@@ -385,17 +393,44 @@ bool intel_format_info_is_yuv_semiplanar(const struct 
drm_format_info *info,
return format_is_yuv_semiplanar(lookup_modifier(modifier), info);
 }
 
-bool is_ccs_plane(const struct drm_framebuffer *fb, int plane)
+static u8 ccs_ctrl_plane_mask(const struct intel_modifier_desc *md,
+ const struct drm_format_info *format)
 {
-   if (!is_ccs_modifier(fb->modifier))
-   return false;
+   if (format_is_yuv_semiplanar(md, format))
+   return md->ccs.planar_ctrl_planes;
+   else
+   return md->ccs.packed_ctrl_planes;
+}
+
+/**
+ * intel_fb_is_ccs_ctrl_plane: Check if a framebuffer color plane is a CCS 
control plane
+ * @fb: Framebuffer
+ * @plane: color plane index to check
+ *
+ * Returns:
+ * Returns %true if @fb's color plane at index @plane is a CCS control plane.
+ */
+bool intel_fb_is_ccs_ctrl_plane(const struct drm_framebuffer *fb, int plane)
+{
+   const struct intel_modifier_desc *md = lookup_modifier(fb->modifier);
 
-   return plane >= fb->format->num_planes / 2;
+   return ccs_ctrl_plane_mask(md, fb->format) & BIT(plane);
 }
 
-bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane)
+/**
+ * intel_fb_is_gen12_ccs_ctrl_plane: Check if a framebuffer color plane is a 
GEN12 CCS control plane
+ * 

[Intel-gfx] [PATCH 06/11] drm/i915: Move intel_format_info_is_yuv_semiplanar() to intel_fb.c

[Imre Deak]

Move intel_format_info_is_yuv_semiplanar() to intel_fb.c . The number of
planes for YUV semiplanar formats using CCS modifiers will change on
future platforms. We can use the modifier descriptors to simplify
getting the plane numbers for all modifiers, prepare for that here.

Signed-off-by: Imre Deak 
---
 .../gpu/drm/i915/display/intel_atomic_plane.c |  1 +
 drivers/gpu/drm/i915/display/intel_display.c  |  8 -
 drivers/gpu/drm/i915/display/intel_display.h  |  4 ---
 drivers/gpu/drm/i915/display/intel_fb.c   | 30 +++
 drivers/gpu/drm/i915/display/intel_fb.h   |  4 +++
 drivers/gpu/drm/i915/intel_pm.c   |  1 +
 6 files changed, 36 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c 
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 47234d8985490..0eb7323717d30 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -39,6 +39,7 @@
 #include "intel_atomic_plane.h"
 #include "intel_cdclk.h"
 #include "intel_display_types.h"
+#include "intel_fb.h"
 #include "intel_pm.h"
 #include "intel_sprite.h"
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 90802d16fbf91..8043a9fd665a5 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -821,14 +821,6 @@ void intel_disable_transcoder(const struct 
intel_crtc_state *old_crtc_state)
intel_wait_for_pipe_off(old_crtc_state);
 }
 
-bool
-intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
-   u64 modifier)
-{
-   return info->is_yuv &&
-  info->num_planes == (is_ccs_modifier(modifier) ? 4 : 2);
-}
-
 unsigned int intel_rotation_info_size(const struct intel_rotation_info 
*rot_info)
 {
unsigned int size = 0;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h 
b/drivers/gpu/drm/i915/display/intel_display.h
index 3028072c2cf35..84ae8b555ea0f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -619,10 +619,6 @@ void ilk_pfit_disable(const struct intel_crtc_state 
*old_crtc_state);
 int bdw_get_pipemisc_bpp(struct intel_crtc *crtc);
 unsigned int intel_plane_fence_y_offset(const struct intel_plane_state 
*plane_state);
 
-bool
-intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
-   u64 modifier);
-
 int intel_plane_pin_fb(struct intel_plane_state *plane_state);
 void intel_plane_unpin_fb(struct intel_plane_state *old_plane_state);
 struct intel_encoder *
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index 19aa99375502a..f0d8c848b23e1 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -353,6 +353,36 @@ bool intel_fb_plane_supports_modifier(struct intel_plane 
*plane, u64 modifier)
return false;
 }
 
+static bool format_is_yuv_semiplanar(const struct intel_modifier_desc *md,
+const struct drm_format_info *info)
+{
+   int yuv_planes;
+
+   if (!info->is_yuv)
+   return false;
+
+   if (is_ccs_type_modifier(md, INTEL_CCS_ANY))
+   yuv_planes = 4;
+   else
+   yuv_planes = 2;
+
+   return info->num_planes == yuv_planes;
+}
+
+/**
+ * intel_format_info_is_yuv_semiplanar: Check if the given format is YUV 
semiplanar
+ * @info: format to check
+ * @modifier: modifier used with the format
+ *
+ * Returns:
+ * %true if @info / @modifier is YUV semiplanar.
+ */
+bool intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
+u64 modifier)
+{
+   return format_is_yuv_semiplanar(lookup_modifier(modifier), info);
+}
+
 bool is_ccs_plane(const struct drm_framebuffer *fb, int plane)
 {
if (!is_ccs_modifier(fb->modifier))
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h 
b/drivers/gpu/drm/i915/display/intel_fb.h
index a198914c0088b..d9693fc767c54 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -33,6 +33,10 @@ bool intel_fb_plane_supports_modifier(struct intel_plane 
*plane, u64 modifier);
 const struct drm_format_info *
 intel_fb_get_format_info(const struct drm_mode_fb_cmd2 *cmd);
 
+bool
+intel_format_info_is_yuv_semiplanar(const struct drm_format_info *info,
+   u64 modifier);
+
 bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane);
 
 int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 8dbf8ec0d8905..bafcac58ac096 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -37,6 +37,7 @@
 #include 

[Intel-gfx] [PATCH 08/11] drm/i915: Handle CCS CC planes separately from CCS control planes

[Imre Deak]

CCS CC planes are quite different from CCS control planes, even though
we regard the CC planes as a linear buffer having a 64 byte stride.
Thus it's clearer to check for either CCS plane types explicitly when we
need to handle them; add the required CCS CC planes check here, while
the next patch will change all is_ccs_plane()/is_gen12_ccs_plane()
checks to consider only the CCS control planes.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_fb.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index f18fab9c3b941..e8fe198b1b6a1 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -432,7 +432,8 @@ static bool is_semiplanar_uv_plane(const struct 
drm_framebuffer *fb, int color_p
 bool is_surface_linear(const struct drm_framebuffer *fb, int color_plane)
 {
return fb->modifier == DRM_FORMAT_MOD_LINEAR ||
-  is_gen12_ccs_plane(fb, color_plane);
+  is_gen12_ccs_plane(fb, color_plane) ||
+  is_gen12_ccs_cc_plane(fb, color_plane);
 }
 
 int main_to_ccs_plane(const struct drm_framebuffer *fb, int main_plane)
@@ -525,7 +526,8 @@ intel_tile_width_bytes(const struct drm_framebuffer *fb, 
int color_plane)
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
-   if (is_ccs_plane(fb, color_plane))
+   if (is_ccs_plane(fb, color_plane) ||
+   is_gen12_ccs_cc_plane(fb, color_plane))
return 64;
fallthrough;
case I915_FORMAT_MOD_Y_TILED:
-- 
2.27.0

[Intel-gfx] [PATCH 05/11] drm/i915: Unexport is_semiplanar_uv_plane()

[Imre Deak]

This function is only used by intel_fb.c, so unexport it.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
 drivers/gpu/drm/i915/display/intel_fb.h | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index ef3cd375c9942..19aa99375502a 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -372,7 +372,7 @@ bool is_gen12_ccs_cc_plane(const struct drm_framebuffer 
*fb, int plane)
   plane == 2;
 }
 
-bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int color_plane)
+static bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int 
color_plane)
 {
return intel_format_info_is_yuv_semiplanar(fb->format, fb->modifier) &&
color_plane == 1;
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h 
b/drivers/gpu/drm/i915/display/intel_fb.h
index 67c20451ae63f..a198914c0088b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -25,7 +25,6 @@ struct intel_plane_state;
 bool is_ccs_plane(const struct drm_framebuffer *fb, int plane);
 bool is_gen12_ccs_plane(const struct drm_framebuffer *fb, int plane);
 bool is_gen12_ccs_cc_plane(const struct drm_framebuffer *fb, int plane);
-bool is_semiplanar_uv_plane(const struct drm_framebuffer *fb, int color_plane);
 
 u64 *intel_fb_plane_get_modifiers(struct drm_i915_private *i915,
  enum pipe pipe, enum plane_id plane_id);
-- 
2.27.0

[Intel-gfx] [PATCH 04/11] drm/i915: Simplify the modifier check for interlaced scanout support

[Imre Deak]

Checking the modifiers that support interlacing makes the condition
simpler and avoids us having to add new modifiers to the list (presuming
all/most of the new modifiers won't support interlacing).

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/skl_universal_plane.c | 9 ++---
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index cebd688ab1a22..4f0dbb00ea28c 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1240,13 +1240,8 @@ static int skl_plane_check_fb(const struct 
intel_crtc_state *crtc_state,
/* Y-tiling is not supported in IF-ID Interlace mode */
if (crtc_state->hw.enable &&
crtc_state->hw.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE &&
-   (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
-fb->modifier == I915_FORMAT_MOD_Yf_TILED ||
-fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
-fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
-fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
-fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
-fb->modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC)) {
+   fb->modifier != DRM_FORMAT_MOD_LINEAR &&
+   fb->modifier != I915_FORMAT_MOD_X_TILED) {
drm_dbg_kms(_priv->drm,
"Y/Yf tiling not supported in IF-ID mode\n");
return -EINVAL;
-- 
2.27.0

[Intel-gfx] [PATCH 03/11] drm/i915: Add tiling attribute to the modifier descriptor

[Imre Deak]

Add a tiling atttribute to the modifier descriptor, which let's us
get the tiling without listing the modifiers twice.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_fb.c | 20 
 1 file changed, 8 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index 2543232580885..ef3cd375c9942 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -115,6 +115,7 @@ const struct intel_modifier_desc {
u64 display_versions;
const struct drm_format_info *formats;
int format_count;
+   u8 tiling;
 
struct {
 #define INTEL_CCS_RC   BIT(0)
@@ -132,10 +133,12 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_X_TILED,
.display_versions = DISPLAY_VER_MASK_ALL,
+   .tiling = I915_TILING_X,
},
{
.id = I915_FORMAT_MOD_Y_TILED,
.display_versions = DISPLAY_VER_MASK(9, 13),
+   .tiling = I915_TILING_Y,
},
{
.id = I915_FORMAT_MOD_Yf_TILED,
@@ -144,6 +147,7 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_Y_TILED_CCS,
.display_versions = DISPLAY_VER_MASK(9, 11),
+   .tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC,
 
@@ -160,6 +164,7 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS,
.display_versions = DISPLAY_VER_MASK(12, 13),
+   .tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC,
 
@@ -168,6 +173,7 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC,
.display_versions = DISPLAY_VER_MASK(12, 13),
+   .tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_RC_CC,
 
@@ -176,6 +182,7 @@ const struct intel_modifier_desc {
{
.id = I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS,
.display_versions = DISPLAY_VER_MASK(12, 13),
+   .tiling = I915_TILING_Y,
 
.ccs.type = INTEL_CCS_MC,
 
@@ -556,18 +563,7 @@ intel_fb_align_height(const struct drm_framebuffer *fb,
 
 static unsigned int intel_fb_modifier_to_tiling(u64 fb_modifier)
 {
-   switch (fb_modifier) {
-   case I915_FORMAT_MOD_X_TILED:
-   return I915_TILING_X;
-   case I915_FORMAT_MOD_Y_TILED:
-   case I915_FORMAT_MOD_Y_TILED_CCS:
-   case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS:
-   case I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC:
-   case I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS:
-   return I915_TILING_Y;
-   default:
-   return I915_TILING_NONE;
-   }
+   return lookup_modifier(fb_modifier)->tiling;
 }
 
 unsigned int intel_cursor_alignment(const struct drm_i915_private *i915)
-- 
2.27.0

[Intel-gfx] [PATCH 02/11] drm/i915: Move intel_get_format_info() to intel_fb.c

[Imre Deak]

Move the function retrieving the format override information for a given
format/modifier to intel_fb.c. We can store a pointer to the format list
in each modifier's descriptor instead of the corresponding switch/case
logic, avoiding the listing of the modifiers twice.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_display.c | 132 +---
 drivers/gpu/drm/i915/display/intel_fb.c  | 155 +++
 drivers/gpu/drm/i915/display/intel_fb.h  |   3 +
 3 files changed, 159 insertions(+), 131 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 4f0badb11bbba..90802d16fbf91 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1087,136 +1087,6 @@ void intel_add_fb_offsets(int *x, int *y,
*y += state->view.color_plane[color_plane].y;
 }
 
-/*
- * From the Sky Lake PRM:
- * "The Color Control Surface (CCS) contains the compression status of
- *  the cache-line pairs. The compression state of the cache-line pair
- *  is specified by 2 bits in the CCS. Each CCS cache-line represents
- *  an area on the main surface of 16 x16 sets of 128 byte Y-tiled
- *  cache-line-pairs. CCS is always Y tiled."
- *
- * Since cache line pairs refers to horizontally adjacent cache lines,
- * each cache line in the CCS corresponds to an area of 32x16 cache
- * lines on the main surface. Since each pixel is 4 bytes, this gives
- * us a ratio of one byte in the CCS for each 8x16 pixels in the
- * main surface.
- */
-static const struct drm_format_info skl_ccs_formats[] = {
-   { .format = DRM_FORMAT_XRGB, .depth = 24, .num_planes = 2,
- .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
-   { .format = DRM_FORMAT_XBGR, .depth = 24, .num_planes = 2,
- .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, },
-   { .format = DRM_FORMAT_ARGB, .depth = 32, .num_planes = 2,
- .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
-   { .format = DRM_FORMAT_ABGR, .depth = 32, .num_planes = 2,
- .cpp = { 4, 1, }, .hsub = 8, .vsub = 16, .has_alpha = true, },
-};
-
-/*
- * Gen-12 compression uses 4 bits of CCS data for each cache line pair in the
- * main surface. And each 64B CCS cache line represents an area of 4x1 Y-tiles
- * in the main surface. With 4 byte pixels and each Y-tile having dimensions of
- * 32x32 pixels, the ratio turns out to 1B in the CCS for every 2x32 pixels in
- * the main surface.
- */
-static const struct drm_format_info gen12_ccs_formats[] = {
-   { .format = DRM_FORMAT_XRGB, .depth = 24, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, },
-   { .format = DRM_FORMAT_XBGR, .depth = 24, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, },
-   { .format = DRM_FORMAT_ARGB, .depth = 32, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, .has_alpha = true },
-   { .format = DRM_FORMAT_ABGR, .depth = 32, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, .has_alpha = true },
-   { .format = DRM_FORMAT_YUYV, .num_planes = 2,
- .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 2, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_YVYU, .num_planes = 2,
- .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 2, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_UYVY, .num_planes = 2,
- .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 2, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_VYUY, .num_planes = 2,
- .char_per_block = { 2, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 2, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_XYUV, .num_planes = 2,
- .char_per_block = { 4, 1 }, .block_w = { 1, 2 }, .block_h = { 1, 1 },
- .hsub = 1, .vsub = 1, .is_yuv = true },
-   { .format = DRM_FORMAT_NV12, .num_planes = 4,
- .char_per_block = { 1, 2, 1, 1 }, .block_w = { 1, 1, 4, 4 }, .block_h 
= { 1, 1, 1, 1 },
- .hsub = 2, .vsub = 2, .is_yuv = true },
-   { .format = DRM_FORMAT_P010, .num_planes = 4,
- .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
- .hsub = 2, .vsub = 2, .is_yuv = true },
-   { .format = DRM_FORMAT_P012, .num_planes = 4,
- .char_per_block = { 2, 4, 1, 1 }, .block_w = { 1, 1, 2, 2 }, .block_h 
= { 1, 1, 1, 1 },
- .hsub = 2, .vsub = 2, .is_yuv = true },
-   { .format = DRM_FORMAT_P016, .num_planes = 4,
- .char_per_block 

[Intel-gfx] [PATCH 01/11] drm/i915: Add a table with a descriptor for all i915 modifiers

[Imre Deak]

Add a table describing all the framebuffer modifiers used by i915 at one
place. This has the benefit of deduplicating the listing of supported
modifiers for each platform and checking the support of these modifiers
on a given plane. This also simplifies in a similar way getting some
attribute for a modifier, for instance checking if the modifier is a
CCS modifier type.

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_cursor.c   |  19 +-
 .../drm/i915/display/intel_display_types.h|   1 -
 drivers/gpu/drm/i915/display/intel_fb.c   | 178 ++
 drivers/gpu/drm/i915/display/intel_fb.h   |   8 +
 drivers/gpu/drm/i915/display/intel_sprite.c   |  35 +---
 drivers/gpu/drm/i915/display/skl_scaler.c |   1 +
 .../drm/i915/display/skl_universal_plane.c| 137 +-
 drivers/gpu/drm/i915/i915_drv.h   |   3 +
 8 files changed, 218 insertions(+), 164 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c 
b/drivers/gpu/drm/i915/display/intel_cursor.c
index f6dcb5aa63f64..bcd44ff30ce5b 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -28,11 +28,6 @@ static const u32 intel_cursor_formats[] = {
DRM_FORMAT_ARGB,
 };
 
-static const u64 cursor_format_modifiers[] = {
-   DRM_FORMAT_MOD_LINEAR,
-   DRM_FORMAT_MOD_INVALID
-};
-
 static u32 intel_cursor_base(const struct intel_plane_state *plane_state)
 {
struct drm_i915_private *dev_priv =
@@ -605,8 +600,10 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane 
*plane,
 static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,
  u32 format, u64 modifier)
 {
-   return modifier == DRM_FORMAT_MOD_LINEAR &&
-   format == DRM_FORMAT_ARGB;
+   if (!intel_fb_plane_supports_modifier(to_intel_plane(_plane), modifier))
+   return false;
+
+   return format == DRM_FORMAT_ARGB;
 }
 
 static int
@@ -754,6 +751,7 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
 {
struct intel_plane *cursor;
int ret, zpos;
+   u64 *modifiers;
 
cursor = intel_plane_alloc();
if (IS_ERR(cursor))
@@ -784,13 +782,18 @@ intel_cursor_plane_create(struct drm_i915_private 
*dev_priv,
if (IS_I845G(dev_priv) || IS_I865G(dev_priv) || HAS_CUR_FBC(dev_priv))
cursor->cursor.size = ~0;
 
+   modifiers = intel_fb_plane_get_modifiers(dev_priv, pipe, cursor->id);
+
ret = drm_universal_plane_init(_priv->drm, >base,
   0, _cursor_plane_funcs,
   intel_cursor_formats,
   ARRAY_SIZE(intel_cursor_formats),
-  cursor_format_modifiers,
+  modifiers,
   DRM_PLANE_TYPE_CURSOR,
   "cursor %c", pipe_name(pipe));
+
+   kfree(modifiers);
+
if (ret)
goto fail;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 21ce8bccc645a..bb53b01f07aee 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1336,7 +1336,6 @@ struct intel_plane {
enum plane_id id;
enum pipe pipe;
bool has_fbc;
-   bool has_ccs;
bool need_async_flip_disable_wa;
u32 frontbuffer_bit;
 
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index fa1f375e696bf..aefae988b620b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -13,6 +13,184 @@
 
 #define check_array_bounds(i915, a, i) drm_WARN_ON(&(i915)->drm, (i) >= 
ARRAY_SIZE(a))
 
+const struct intel_modifier_desc {
+   u64 id;
+   u64 display_versions;
+
+   struct {
+#define INTEL_CCS_RC   BIT(0)
+#define INTEL_CCS_RC_CCBIT(1)
+#define INTEL_CCS_MC   BIT(2)
+
+#define INTEL_CCS_ANY  (INTEL_CCS_RC | INTEL_CCS_RC_CC | INTEL_CCS_MC)
+   u8 type:3;
+   } ccs;
+} intel_modifiers[] = {
+   {
+   .id = DRM_FORMAT_MOD_LINEAR,
+   .display_versions = DISPLAY_VER_MASK_ALL,
+   },
+   {
+   .id = I915_FORMAT_MOD_X_TILED,
+   .display_versions = DISPLAY_VER_MASK_ALL,
+   },
+   {
+   .id = I915_FORMAT_MOD_Y_TILED,
+   .display_versions = DISPLAY_VER_MASK(9, 13),
+   },
+   {
+   .id = I915_FORMAT_MOD_Yf_TILED,
+   .display_versions = DISPLAY_VER_MASK(9, 11),
+   },
+   {
+   .id = I915_FORMAT_MOD_Y_TILED_CCS,
+   .display_versions = DISPLAY_VER_MASK(9, 11),
+
+   .ccs.type = INTEL_CCS_RC,

[Intel-gfx] [PATCH 00/11] drm/i915: Simplify handling of modifiers

[Imre Deak]

This patchset adds a descriptor table for all modifiers used by i915,
which deduplicates the listing of supported modifiers during plane
initialization and during checking for a modifier support on a plane.
This also simplifies getting some modifier attributes like checking
if a plane is a CCS modifier. The motivation is to make it easier to
add and maintain new CCS modifier sets, which will be needed for at
least ADL-P and another upcoming platform.

Tested with igt/kms_plane,kms_ccs on CHV,HSW,TGL,ADLP.

The patches are also avaiable at:
https://github.com/ideak/linux/commits/modifier-descriptors

Imre Deak (11):
  drm/i915: Add a table with a descriptor for all i915 modifiers
  drm/i915: Move intel_get_format_info() to intel_fb.c
  drm/i915: Add tiling attribute to the modifier descriptor
  drm/i915: Simplify the modifier check for interlaced scanout support
  drm/i915: Unexport is_semiplanar_uv_plane()
  drm/i915: Move intel_format_info_is_yuv_semiplanar() to intel_fb.c
  drm/i915: Add a platform independent way to get the RC CCS CC plane
  drm/i915: Handle CCS CC planes separately from CCS control planes
  drm/i915: Add a platform independent way to check for CCS control
planes
  drm/i915: Move is_ccs_modifier() to intel_fb.c
  drm/i915: Add functions to check for RC CCS CC and MC CCS modifiers

 .../gpu/drm/i915/display/intel_atomic_plane.c |   1 +
 drivers/gpu/drm/i915/display/intel_cursor.c   |  19 +-
 drivers/gpu/drm/i915/display/intel_display.c  | 150 +
 drivers/gpu/drm/i915/display/intel_display.h  |   4 -
 .../drm/i915/display/intel_display_types.h|  17 -
 drivers/gpu/drm/i915/display/intel_fb.c   | 536 --
 drivers/gpu/drm/i915/display/intel_fb.h   |  25 +-
 drivers/gpu/drm/i915/display/intel_sprite.c   |  35 +-
 drivers/gpu/drm/i915/display/skl_scaler.c |   1 +
 .../drm/i915/display/skl_universal_plane.c| 165 +-
 drivers/gpu/drm/i915/i915_drv.h   |   3 +
 drivers/gpu/drm/i915/intel_pm.c   |   1 +
 12 files changed, 569 insertions(+), 388 deletions(-)

-- 
2.27.0

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers (rev7)

[Patchwork]

== Series Details ==

Series: drm/dp, drm/i915: Finish basic PWM support for VESA backlight helpers 
(rev7)
URL   : https://patchwork.freedesktop.org/series/95127/
State : warning

== Summary ==

$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
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+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 
+ 

Re: [Intel-gfx] [PATCH 09/26] drm/i915/guc: Ensure GuC schedule operations do not operate on child contexts

[John Harrison]

On 10/4/2021 15:06, Matthew Brost wrote:

In GuC parent-child contexts the parent context controls the scheduling,
ensure only the parent does the scheduling operations.

Signed-off-by: Matthew Brost 

Reviewed-by: John Harrison 


---
  drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 13 -
  1 file changed, 12 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index ab6d7fc1b0b1..1f2809187513 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -324,6 +324,12 @@ static inline void decr_context_committed_requests(struct 
intel_context *ce)
GEM_BUG_ON(ce->guc_state.number_committed_requests < 0);
  }
  
+static struct intel_context *

+request_to_scheduling_context(struct i915_request *rq)
+{
+   return intel_context_to_parent(rq->context);
+}
+
  static inline bool context_guc_id_invalid(struct intel_context *ce)
  {
return ce->guc_id.id == GUC_INVALID_LRC_ID;
@@ -1710,6 +1716,7 @@ static void __guc_context_sched_disable(struct intel_guc 
*guc,
  
  	GEM_BUG_ON(guc_id == GUC_INVALID_LRC_ID);
  
+	GEM_BUG_ON(intel_context_is_child(ce));

trace_intel_context_sched_disable(ce);
  
  	guc_submission_send_busy_loop(guc, action, ARRAY_SIZE(action),

@@ -1935,6 +1942,8 @@ static void guc_context_sched_disable(struct 
intel_context *ce)
intel_wakeref_t wakeref;
u16 guc_id;
  
+	GEM_BUG_ON(intel_context_is_child(ce));

+
spin_lock_irqsave(>guc_state.lock, flags);
  
  	/*

@@ -2303,6 +2312,8 @@ static void guc_signal_context_fence(struct intel_context 
*ce)
  {
unsigned long flags;
  
+	GEM_BUG_ON(intel_context_is_child(ce));

+
spin_lock_irqsave(>guc_state.lock, flags);
clr_context_wait_for_deregister_to_register(ce);
__guc_signal_context_fence(ce);
@@ -2333,7 +2344,7 @@ static void guc_context_init(struct intel_context *ce)
  
  static int guc_request_alloc(struct i915_request *rq)

  {
-   struct intel_context *ce = rq->context;
+   struct intel_context *ce = request_to_scheduling_context(rq);
struct intel_guc *guc = ce_to_guc(ce);
unsigned long flags;
int ret;

Re: [Intel-gfx] [PATCH 08/26] drm/i915/guc: Add multi-lrc context registration

[John Harrison]

On 10/4/2021 15:06, Matthew Brost wrote:

Add multi-lrc context registration H2G. In addition a workqueue and
process descriptor are setup during multi-lrc context registration as
these data structures are needed for multi-lrc submission.

v2:
  (John Harrison)
   - Move GuC specific fields into sub-struct
   - Clean up WQ defines
   - Add comment explaining math to derive WQ / PD address

Signed-off-by: Matthew Brost 
---
  drivers/gpu/drm/i915/gt/intel_context_types.h |  12 ++
  drivers/gpu/drm/i915/gt/intel_lrc.c   |   5 +
  .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |   1 +
  drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |   2 -
  .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 114 +-
  5 files changed, 131 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h 
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index 76dfca57cb45..48decb5ee954 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -239,6 +239,18 @@ struct intel_context {
struct intel_context *parent;
/** @number_children: number of children if parent */
u8 number_children;
+   /** @guc: GuC specific members for parallel submission */
+   struct {
+   /** @wqi_head: head pointer in work queue */
+   u16 wqi_head;
+   /** @wqi_tail: tail pointer in work queue */
+   u16 wqi_tail;
+   /**
+* @parent_page: page in context state (ce->state) used
+* by parent for work queue, process descriptor
+*/
+   u8 parent_page;
+   } guc;
} parallel;
  
  #ifdef CONFIG_DRM_I915_SELFTEST

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 3ef9eaf8c50e..57339d5c1fc8 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -942,6 +942,11 @@ __lrc_alloc_state(struct intel_context *ce, struct 
intel_engine_cs *engine)
context_size += PAGE_SIZE;
}
  
+	if (intel_context_is_parent(ce) && intel_engine_uses_guc(engine)) {

+   ce->parallel.guc.parent_page = context_size / PAGE_SIZE;
+   context_size += PAGE_SIZE;
+   }
+
obj = i915_gem_object_create_lmem(engine->i915, context_size,
  I915_BO_ALLOC_PM_VOLATILE);
if (IS_ERR(obj))
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h 
b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
index 8ff58aff..ba10bd374cee 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
@@ -142,6 +142,7 @@ enum intel_guc_action {
INTEL_GUC_ACTION_REGISTER_COMMAND_TRANSPORT_BUFFER = 0x4505,
INTEL_GUC_ACTION_DEREGISTER_COMMAND_TRANSPORT_BUFFER = 0x4506,
INTEL_GUC_ACTION_DEREGISTER_CONTEXT_DONE = 0x4600,
+   INTEL_GUC_ACTION_REGISTER_CONTEXT_MULTI_LRC = 0x4601,
INTEL_GUC_ACTION_RESET_CLIENT = 0x5507,
INTEL_GUC_ACTION_LIMIT
  };
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index fa4be13c8854..0eeb2a9feeed 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -52,8 +52,6 @@
  
  #define GUC_DOORBELL_INVALID		256
  
-#define GUC_WQ_SIZE			(PAGE_SIZE * 2)

-
  /* Work queue item header definitions */
  #define WQ_STATUS_ACTIVE  1
  #define WQ_STATUS_SUSPENDED   2
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 451d9ae861a6..ab6d7fc1b0b1 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -344,6 +344,45 @@ static inline struct i915_priolist *to_priolist(struct 
rb_node *rb)
return rb_entry(rb, struct i915_priolist, node);
  }
  
+/*

+ * When using multi-lrc submission an extra page in the context state is
+ * reserved for the process descriptor and work queue.
+ *
+ * The layout of this page is below:
+ * 0   guc_process_desc
+ * ... unused
+ * PAGE_SIZE / 2   work queue start
+ * ... work queue
+ * PAGE_SIZE - 1   work queue end
+ */
+#define WQ_SIZE(PAGE_SIZE / 2)
+#define WQ_OFFSET  (PAGE_SIZE - WQ_SIZE)
I thought you were going with '#define PARENT_SCRATCH SIZE PAGE_SIZE' 
and then using that everywhere else? Unless there is a fundamental 
reason why the above must be exactly a page in size then I think the 
size should be defined once and re-used 

[Intel-gfx] [PATCH v3 20/20] drm: cleanup: remove acquire_ctx from drm_mode_config

[Fernando Ramos]

---
 include/drm/drm_mode_config.h | 10 --
 1 file changed, 10 deletions(-)

diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 48b7de80daf5..b214b07157f2 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -383,16 +383,6 @@ struct drm_mode_config {
 */
struct drm_modeset_lock connection_mutex;
 
-   /**
-* @acquire_ctx:
-*
-* Global implicit acquire context used by atomic drivers for legacy
-* IOCTLs. Deprecated, since implicit locking contexts make it
-* impossible to use driver-private  drm_modeset_lock. Users of
-* this must hold @mutex.
-*/
-   struct drm_modeset_acquire_ctx *acquire_ctx;
-
/**
 * @idr_mutex:
 *
-- 
2.33.0

[Intel-gfx] [PATCH v3 19/20] drm: cleanup: remove drm_modeset_(un)lock_all()

[Fernando Ramos]

Functions drm_modeset_lock_all() and drm_modeset_unlock_all() are no
longer used anywhere and can be removed.

Signed-off-by: Fernando Ramos 
---
 drivers/gpu/drm/drm_modeset_lock.c | 94 +-
 include/drm/drm_modeset_lock.h |  2 -
 2 files changed, 3 insertions(+), 93 deletions(-)

diff --git a/drivers/gpu/drm/drm_modeset_lock.c 
b/drivers/gpu/drm/drm_modeset_lock.c
index bf8a6e823a15..ac49bf6169a2 100644
--- a/drivers/gpu/drm/drm_modeset_lock.c
+++ b/drivers/gpu/drm/drm_modeset_lock.c
@@ -77,93 +77,6 @@
 
 static DEFINE_WW_CLASS(crtc_ww_class);
 
-/**
- * drm_modeset_lock_all - take all modeset locks
- * @dev: DRM device
- *
- * This function takes all modeset locks, suitable where a more fine-grained
- * scheme isn't (yet) implemented. Locks must be dropped by calling the
- * drm_modeset_unlock_all() function.
- *
- * This function is deprecated. It allocates a lock acquisition context and
- * stores it in _device.mode_config. This facilitate conversion of
- * existing code because it removes the need to manually deal with the
- * acquisition context, but it is also brittle because the context is global
- * and care must be taken not to nest calls. New code should use the
- * drm_modeset_lock_all_ctx() function and pass in the context explicitly.
- */
-void drm_modeset_lock_all(struct drm_device *dev)
-{
-   struct drm_mode_config *config = >mode_config;
-   struct drm_modeset_acquire_ctx *ctx;
-   int ret;
-
-   ctx = kzalloc(sizeof(*ctx), GFP_KERNEL | __GFP_NOFAIL);
-   if (WARN_ON(!ctx))
-   return;
-
-   mutex_lock(>mutex);
-
-   drm_modeset_acquire_init(ctx, 0);
-
-retry:
-   ret = drm_modeset_lock_all_ctx(dev, ctx);
-   if (ret < 0) {
-   if (ret == -EDEADLK) {
-   drm_modeset_backoff(ctx);
-   goto retry;
-   }
-
-   drm_modeset_acquire_fini(ctx);
-   kfree(ctx);
-   return;
-   }
-   ww_acquire_done(>ww_ctx);
-
-   WARN_ON(config->acquire_ctx);
-
-   /*
-* We hold the locks now, so it is safe to stash the acquisition
-* context for drm_modeset_unlock_all().
-*/
-   config->acquire_ctx = ctx;
-
-   drm_warn_on_modeset_not_all_locked(dev);
-}
-EXPORT_SYMBOL(drm_modeset_lock_all);
-
-/**
- * drm_modeset_unlock_all - drop all modeset locks
- * @dev: DRM device
- *
- * This function drops all modeset locks taken by a previous call to the
- * drm_modeset_lock_all() function.
- *
- * This function is deprecated. It uses the lock acquisition context stored
- * in _device.mode_config. This facilitates conversion of existing
- * code because it removes the need to manually deal with the acquisition
- * context, but it is also brittle because the context is global and care must
- * be taken not to nest calls. New code should pass the acquisition context
- * directly to the drm_modeset_drop_locks() function.
- */
-void drm_modeset_unlock_all(struct drm_device *dev)
-{
-   struct drm_mode_config *config = >mode_config;
-   struct drm_modeset_acquire_ctx *ctx = config->acquire_ctx;
-
-   if (WARN_ON(!ctx))
-   return;
-
-   config->acquire_ctx = NULL;
-   drm_modeset_drop_locks(ctx);
-   drm_modeset_acquire_fini(ctx);
-
-   kfree(ctx);
-
-   mutex_unlock(>mode_config.mutex);
-}
-EXPORT_SYMBOL(drm_modeset_unlock_all);
-
 /**
  * drm_warn_on_modeset_not_all_locked - check that all modeset locks are locked
  * @dev: device
@@ -380,10 +293,9 @@ EXPORT_SYMBOL(drm_modeset_unlock);
  * This function takes all modeset locks, suitable where a more fine-grained
  * scheme isn't (yet) implemented.
  *
- * Unlike drm_modeset_lock_all(), it doesn't take the _mode_config.mutex
- * since that lock isn't required for modeset state changes. Callers which
- * need to grab that lock too need to do so outside of the acquire context
- * @ctx.
+ * It doesn't take the _mode_config.mutex since that lock isn't required 
for
+ * modeset state changes. Callers which need to grab that lock too need to do 
so
+ * outside of the acquire context @ctx.
  *
  * Locks acquired with this function should be released by calling the
  * drm_modeset_drop_locks() function on @ctx.
diff --git a/include/drm/drm_modeset_lock.h b/include/drm/drm_modeset_lock.h
index aafd07388eb7..865e64bcc4cb 100644
--- a/include/drm/drm_modeset_lock.h
+++ b/include/drm/drm_modeset_lock.h
@@ -132,8 +132,6 @@ struct drm_device;
 struct drm_crtc;
 struct drm_plane;
 
-void drm_modeset_lock_all(struct drm_device *dev);
-void drm_modeset_unlock_all(struct drm_device *dev);
 void drm_warn_on_modeset_not_all_locked(struct drm_device *dev);
 
 int drm_modeset_lock_all_ctx(struct drm_device *dev,
-- 
2.33.0

[Intel-gfx] [PATCH v3 18/20] drm/amd: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() [part 3]

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

NOTE:

While this change is similar to the one done two commits ago, it
contains an important extra nuances that I'm going to explain next.

The only difference between the old drm_modeset_{lock,unlock}_all()
functions and the new DRM_MODESET_LOCK_ALL_{BEGIN,END}() macros is that
the former use a global context stored in dev->mode_config.acquire_ctx
while the latter depend on a user provided one (typically in the stack).

This means that as long as no one accesses the global
dev->mode_config.acquire_ctx context in the block that runs between
lock/BEGIN and unlock/END, the code should be equivalent before and
after my changes.

Turns out that, while not obvious at first sight, the call to
dm_restore_drm_connector_state() done between drm_modset_lock_all() and
drm_modeset_unlock_all() ends up using that global context structure
stored in dev.

To fix this we need to update some function prototypes to accept the
new stack allocated variable as an argument.

Signed-off-by: Fernando Ramos 
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 27 ---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  3 ++-
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 13 ++---
 3 files changed, 29 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 444ad054980a..2041075243d5 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -80,6 +80,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #if defined(CONFIG_DRM_AMD_DC_DCN)
 #include "ivsrcid/dcn/irqsrcs_dcn_1_0.h"
@@ -2880,6 +2881,8 @@ static void handle_hpd_irq_helper(struct 
amdgpu_dm_connector *aconnector)
struct amdgpu_device *adev = drm_to_adev(dev);
struct dm_connector_state *dm_con_state = 
to_dm_connector_state(connector->state);
struct dm_crtc_state *dm_crtc_state = NULL;
+   struct drm_modeset_acquire_ctx ctx;
+   int ret;
 
if (adev->dm.disable_hpd_irq)
return;
@@ -2921,9 +2924,9 @@ static void handle_hpd_irq_helper(struct 
amdgpu_dm_connector *aconnector)
goto out;
}
 
-   drm_modeset_lock_all(dev);
-   dm_restore_drm_connector_state(dev, connector);
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
+   dm_restore_drm_connector_state(dev, connector, );
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 
if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
drm_kms_helper_hotplug_event(dev);
@@ -3044,6 +3047,7 @@ static void handle_hpd_rx_irq(void *param)
struct drm_connector *connector = >base;
struct drm_device *dev = connector->dev;
struct dc_link *dc_link = aconnector->dc_link;
+   struct drm_modeset_acquire_ctx ctx;
bool is_mst_root_connector = aconnector->mst_mgr.mst_state;
bool result = false;
enum dc_connection_type new_connection_type = dc_connection_none;
@@ -3053,6 +3057,7 @@ static void handle_hpd_rx_irq(void *param)
bool has_left_work = false;
int idx = aconnector->base.index;
struct hpd_rx_irq_offload_work_queue *offload_wq = 
>dm.hpd_rx_offload_wq[idx];
+   int ret;
 
memset(_irq_data, 0, sizeof(hpd_irq_data));
 
@@ -3127,9 +3132,9 @@ static void handle_hpd_rx_irq(void *param)
goto finish;
}
 
-   drm_modeset_lock_all(dev);
-   dm_restore_drm_connector_state(dev, connector);
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
+   dm_restore_drm_connector_state(dev, connector, );
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 
drm_kms_helper_hotplug_event(dev);
}
@@ -9662,7 +9667,8 @@ static void amdgpu_dm_atomic_commit_tail(struct 
drm_atomic_state *state)
 }
 
 
-static int dm_force_atomic_commit(struct drm_connector *connector)
+static int dm_force_atomic_commit(struct drm_connector *connector,
+ struct drm_modeset_acquire_ctx *ctx)
 {
int ret = 0;
struct drm_device *ddev = connector->dev;
@@ -9676,7 +9682,7 @@ static int dm_force_atomic_commit(struct drm_connector 
*connector)
if (!state)
return -ENOMEM;
 
-   state->acquire_ctx = ddev->mode_config.acquire_ctx;
+   state->acquire_ctx = ctx;
 
/* Construct an atomic state to restore previous display setting */
 
@@ -9723,7 +9729,8 @@ static int dm_force_atomic_commit(struct drm_connector 
*connector)
  * same port and when running without usermode desktop manager supprot
  */
 void dm_restore_drm_connector_state(struct drm_device *dev,
-   

[Intel-gfx] [PATCH v3 17/20] drm/amd: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() [part 2]

[Fernando Ramos]

Refactor places using drm_modeset_{lock,unlock}_all() so that they only
appear once per function.

This is needed so that in the next commit I can replace those functions
by the new macros (which use labels that can only appear once per
function).

Signed-off-by: Fernando Ramos 
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 44 ---
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 18 +++-
 2 files changed, 26 insertions(+), 36 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index e676d0a56d50..444ad054980a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2909,14 +2909,6 @@ static void handle_hpd_irq_helper(struct 
amdgpu_dm_connector *aconnector)
if (aconnector->base.force && new_connection_type == 
dc_connection_none) {
emulated_link_detect(aconnector->dc_link);
 
-
-   drm_modeset_lock_all(dev);
-   dm_restore_drm_connector_state(dev, connector);
-   drm_modeset_unlock_all(dev);
-
-   if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
-   drm_kms_helper_hotplug_event(dev);
-
} else if (dc_link_detect(aconnector->dc_link, DETECT_REASON_HPD)) {
if (new_connection_type == dc_connection_none &&
aconnector->dc_link->type == dc_connection_none &&
@@ -2925,13 +2917,18 @@ static void handle_hpd_irq_helper(struct 
amdgpu_dm_connector *aconnector)
 
amdgpu_dm_update_connector_after_detect(aconnector);
 
-   drm_modeset_lock_all(dev);
-   dm_restore_drm_connector_state(dev, connector);
-   drm_modeset_unlock_all(dev);
-
-   if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
-   drm_kms_helper_hotplug_event(dev);
+   } else {
+   goto out;
}
+
+   drm_modeset_lock_all(dev);
+   dm_restore_drm_connector_state(dev, connector);
+   drm_modeset_unlock_all(dev);
+
+   if (aconnector->base.force == DRM_FORCE_UNSPECIFIED)
+   drm_kms_helper_hotplug_event(dev);
+
+out:
mutex_unlock(>hpd_lock);
 
 }
@@ -3119,12 +3116,6 @@ static void handle_hpd_rx_irq(void *param)
 
amdgpu_dm_update_connector_after_detect(aconnector);
 
-
-   drm_modeset_lock_all(dev);
-   dm_restore_drm_connector_state(dev, connector);
-   drm_modeset_unlock_all(dev);
-
-   drm_kms_helper_hotplug_event(dev);
} else if (dc_link_detect(dc_link, DETECT_REASON_HPDRX)) {
 
if (aconnector->fake_enable)
@@ -3132,14 +3123,17 @@ static void handle_hpd_rx_irq(void *param)
 
amdgpu_dm_update_connector_after_detect(aconnector);
 
+   } else {
+   goto finish;
+   }
 
-   drm_modeset_lock_all(dev);
-   dm_restore_drm_connector_state(dev, connector);
-   drm_modeset_unlock_all(dev);
+   drm_modeset_lock_all(dev);
+   dm_restore_drm_connector_state(dev, connector);
+   drm_modeset_unlock_all(dev);
 
-   drm_kms_helper_hotplug_event(dev);
-   }
+   drm_kms_helper_hotplug_event(dev);
}
+finish:
 #ifdef CONFIG_DRM_AMD_DC_HDCP
if (hpd_irq_data.bytes.device_service_irq.bits.CP_IRQ) {
if (adev->dm.hdcp_workqueue)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c 
b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
index f3ada9b6be5a..4efb1f355fe7 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c
@@ -1237,12 +1237,6 @@ static ssize_t trigger_hotplug(struct file *f, const 
char __user *buf,
goto unlock;
 
amdgpu_dm_update_connector_after_detect(aconnector);
-
-   drm_modeset_lock_all(dev);
-   dm_restore_drm_connector_state(dev, connector);
-   drm_modeset_unlock_all(dev);
-
-   drm_kms_helper_hotplug_event(dev);
} else if (param[0] == 0) {
if (!aconnector->dc_link)
goto unlock;
@@ -1260,13 +1254,15 @@ static ssize_t trigger_hotplug(struct file *f, const 
char __user *buf,
 
amdgpu_dm_update_connector_after_detect(aconnector);
 
-   drm_modeset_lock_all(dev);
-   dm_restore_drm_connector_state(dev, connector);
-   drm_modeset_unlock_all(dev);
-
-   drm_kms_helper_hotplug_event(dev);
+   } else {
+   goto unlock;
}
 
+   drm_modeset_lock_all(dev);
+   dm_restore_drm_connector_state(dev, connector);
+   

[Intel-gfx] [PATCH v3 16/20] drm/amd: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 21 ++---
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index dc50c05f23fc..0ea7bdbc8482 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -40,6 +40,7 @@
 #include 
 #include 
 #include 
+#include 
 
 static void amdgpu_display_flip_callback(struct dma_fence *f,
 struct dma_fence_cb *cb)
@@ -1574,16 +1575,21 @@ int amdgpu_display_suspend_helper(struct amdgpu_device 
*adev)
struct drm_crtc *crtc;
struct drm_connector *connector;
struct drm_connector_list_iter iter;
-   int r;
+   struct drm_modeset_acquire_ctx ctx;
+   int r, ret;
 
/* turn off display hw */
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
drm_connector_list_iter_begin(dev, );
drm_for_each_connector_iter(connector, )
drm_helper_connector_dpms(connector,
  DRM_MODE_DPMS_OFF);
drm_connector_list_iter_end();
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
+
+   if (ret)
+   return ret;
+
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, >mode_config.crtc_list, head) {
struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(crtc);
@@ -1621,7 +1627,8 @@ int amdgpu_display_resume_helper(struct amdgpu_device 
*adev)
struct drm_connector *connector;
struct drm_connector_list_iter iter;
struct drm_crtc *crtc;
-   int r;
+   struct drm_modeset_acquire_ctx ctx;
+   int r, ret;
 
/* pin cursors */
list_for_each_entry(crtc, >mode_config.crtc_list, head) {
@@ -1643,7 +1650,7 @@ int amdgpu_display_resume_helper(struct amdgpu_device 
*adev)
drm_helper_resume_force_mode(dev);
 
/* turn on display hw */
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
 
drm_connector_list_iter_begin(dev, );
drm_for_each_connector_iter(connector, )
@@ -1651,8 +1658,8 @@ int amdgpu_display_resume_helper(struct amdgpu_device 
*adev)
  DRM_MODE_DPMS_ON);
drm_connector_list_iter_end();
 
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 
-   return 0;
+   return ret;
 }
 
-- 
2.33.0

[Intel-gfx] [PATCH v3 15/20] drm/gma500: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
---
 drivers/gpu/drm/gma500/psb_device.c | 18 --
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/gma500/psb_device.c 
b/drivers/gpu/drm/gma500/psb_device.c
index 3030f18ba022..021a7238508f 100644
--- a/drivers/gpu/drm/gma500/psb_device.c
+++ b/drivers/gpu/drm/gma500/psb_device.c
@@ -8,6 +8,7 @@
 #include 
 
 #include 
+#include 
 
 #include "gma_device.h"
 #include "intel_bios.h"
@@ -169,8 +170,10 @@ static int psb_save_display_registers(struct drm_device 
*dev)
 {
struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
struct drm_crtc *crtc;
+   struct drm_modeset_acquire_ctx ctx;
struct gma_connector *connector;
struct psb_state *regs = _priv->regs.psb;
+   int ret;
 
/* Display arbitration control + watermarks */
regs->saveDSPARB = PSB_RVDC32(DSPARB);
@@ -183,7 +186,7 @@ static int psb_save_display_registers(struct drm_device 
*dev)
regs->saveCHICKENBIT = PSB_RVDC32(DSPCHICKENBIT);
 
/* Save crtc and output state */
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
list_for_each_entry(crtc, >mode_config.crtc_list, head) {
if (drm_helper_crtc_in_use(crtc))
dev_priv->ops->save_crtc(crtc);
@@ -193,8 +196,9 @@ static int psb_save_display_registers(struct drm_device 
*dev)
if (connector->save)
connector->save(>base);
 
-   drm_modeset_unlock_all(dev);
-   return 0;
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
+
+   return ret;
 }
 
 /**
@@ -207,8 +211,10 @@ static int psb_restore_display_registers(struct drm_device 
*dev)
 {
struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
struct drm_crtc *crtc;
+   struct drm_modeset_acquire_ctx ctx;
struct gma_connector *connector;
struct psb_state *regs = _priv->regs.psb;
+   int ret;
 
/* Display arbitration + watermarks */
PSB_WVDC32(regs->saveDSPARB, DSPARB);
@@ -223,7 +229,7 @@ static int psb_restore_display_registers(struct drm_device 
*dev)
/*make sure VGA plane is off. it initializes to on after reset!*/
PSB_WVDC32(0x8000, VGACNTRL);
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
list_for_each_entry(crtc, >mode_config.crtc_list, head)
if (drm_helper_crtc_in_use(crtc))
dev_priv->ops->restore_crtc(crtc);
@@ -232,8 +238,8 @@ static int psb_restore_display_registers(struct drm_device 
*dev)
if (connector->restore)
connector->restore(>base);
 
-   drm_modeset_unlock_all(dev);
-   return 0;
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
+   return ret;
 }
 
 static int psb_power_down(struct drm_device *dev)
-- 
2.33.0

[Intel-gfx] [PATCH v3 14/20] drm/i915: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() [part 3]

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

NOTE:

While the previous two commits were a simple "search and replace", this
time I had to do a bit of refactoring as only one call to
DRM_MODESET_LOCK_ALL_BEGIN() is allowed inside one same function.

Signed-off-by: Fernando Ramos 
---
 drivers/gpu/drm/i915/display/intel_overlay.c | 40 ++--
 1 file changed, 19 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c 
b/drivers/gpu/drm/i915/display/intel_overlay.c
index c0ee135e5499..c623738c59c8 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -1105,6 +1105,7 @@ int intel_overlay_put_image_ioctl(struct drm_device *dev, 
void *data,
struct drm_crtc *drmmode_crtc;
struct intel_crtc *crtc;
struct drm_i915_gem_object *new_bo;
+   struct drm_modeset_acquire_ctx ctx;
int ret;
 
overlay = dev_priv->overlay;
@@ -1113,24 +1114,24 @@ int intel_overlay_put_image_ioctl(struct drm_device 
*dev, void *data,
return -ENODEV;
}
 
-   if (!(params->flags & I915_OVERLAY_ENABLE)) {
-   drm_modeset_lock_all(dev);
-   ret = intel_overlay_switch_off(overlay);
-   drm_modeset_unlock_all(dev);
+   if (params->flags & I915_OVERLAY_ENABLE) {
 
-   return ret;
-   }
+   drmmode_crtc = drm_crtc_find(dev, file_priv, params->crtc_id);
+   if (!drmmode_crtc)
+   return -ENOENT;
+   crtc = to_intel_crtc(drmmode_crtc);
 
-   drmmode_crtc = drm_crtc_find(dev, file_priv, params->crtc_id);
-   if (!drmmode_crtc)
-   return -ENOENT;
-   crtc = to_intel_crtc(drmmode_crtc);
+   new_bo = i915_gem_object_lookup(file_priv, params->bo_handle);
+   if (!new_bo)
+   return -ENOENT;
+   }
 
-   new_bo = i915_gem_object_lookup(file_priv, params->bo_handle);
-   if (!new_bo)
-   return -ENOENT;
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
 
-   drm_modeset_lock_all(dev);
+   if (!(params->flags & I915_OVERLAY_ENABLE)) {
+   ret = intel_overlay_switch_off(overlay);
+   goto out_unlock;
+   }
 
if (i915_gem_object_is_tiled(new_bo)) {
drm_dbg_kms(_priv->drm,
@@ -1195,14 +1196,11 @@ int intel_overlay_put_image_ioctl(struct drm_device 
*dev, void *data,
if (ret != 0)
goto out_unlock;
 
-   drm_modeset_unlock_all(dev);
-   i915_gem_object_put(new_bo);
-
-   return 0;
-
 out_unlock:
-   drm_modeset_unlock_all(dev);
-   i915_gem_object_put(new_bo);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
+
+   if (params->flags & I915_OVERLAY_ENABLE)
+   i915_gem_object_put(new_bo);
 
return ret;
 }
-- 
2.33.0

[Intel-gfx] [PATCH v3 13/20] drm/i915: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() [part 2]

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

NOTE:

I separated this change from the rest of modifications to the i915
driver to point out something special explained next.

The only difference between the old drm_modeset_{lock,unlock}_all()
functions and the new DRM_MODESET_LOCK_ALL_{BEGIN,END}() macros is that
the former use a global context stored in dev->mode_config.acquire_ctx
while the latter depend on a user provided one (typically in the stack).

This means that as long as no one accesses the global
dev->mode_config.acquire_ctx context in the block that runs between
lock/BEGIN and unlock/END, the code should be equivalent before and
after my changes.

The only place where I had to take special action to preserve this
condition was here, where I need to modify the old call to
intel_modeset_setup_hw_state() to use the new stack allocated context
structure instead of the global one.

Signed-off-by: Fernando Ramos 
---
 drivers/gpu/drm/i915/display/intel_display.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index cb1142447186..670ce17789c6 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11707,6 +11707,7 @@ int intel_modeset_init_noirq(struct drm_i915_private 
*i915)
 int intel_modeset_init_nogem(struct drm_i915_private *i915)
 {
struct drm_device *dev = >drm;
+   struct drm_modeset_acquire_ctx ctx;
enum pipe pipe;
struct intel_crtc *crtc;
int ret;
@@ -11758,10 +11759,10 @@ int intel_modeset_init_nogem(struct drm_i915_private 
*i915)
intel_vga_disable(i915);
intel_setup_outputs(i915);
 
-   drm_modeset_lock_all(dev);
-   intel_modeset_setup_hw_state(dev, dev->mode_config.acquire_ctx);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
+   intel_modeset_setup_hw_state(dev, );
intel_acpi_assign_connector_fwnodes(i915);
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 
for_each_intel_crtc(dev, crtc) {
struct intel_initial_plane_config plane_config = {};
-- 
2.33.0

[Intel-gfx] [PATCH v3 12/20] drm/i915: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
---
 drivers/gpu/drm/i915/display/intel_audio.c| 16 ---
 .../drm/i915/display/intel_display_debugfs.c  | 46 ---
 drivers/gpu/drm/i915/display/intel_overlay.c  |  6 ++-
 drivers/gpu/drm/i915/display/intel_pipe_crc.c |  7 ++-
 drivers/gpu/drm/i915/i915_drv.c   | 13 --
 5 files changed, 58 insertions(+), 30 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_audio.c 
b/drivers/gpu/drm/i915/display/intel_audio.c
index 03e8c05a74f6..37699f13b21f 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -26,6 +26,7 @@
 
 #include 
 #include 
+#include 
 
 #include "i915_drv.h"
 #include "intel_atomic.h"
@@ -1225,7 +1226,8 @@ static int i915_audio_component_bind(struct device 
*i915_kdev,
 {
struct i915_audio_component *acomp = data;
struct drm_i915_private *dev_priv = kdev_to_i915(i915_kdev);
-   int i;
+   struct drm_modeset_acquire_ctx ctx;
+   int i, ret;
 
if (drm_WARN_ON(_priv->drm, acomp->base.ops || acomp->base.dev))
return -EEXIST;
@@ -1235,16 +1237,16 @@ static int i915_audio_component_bind(struct device 
*i915_kdev,
 DL_FLAG_STATELESS)))
return -ENOMEM;
 
-   drm_modeset_lock_all(_priv->drm);
+   DRM_MODESET_LOCK_ALL_BEGIN((_priv->drm), ctx, 0, ret);
acomp->base.ops = _audio_component_ops;
acomp->base.dev = i915_kdev;
BUILD_BUG_ON(MAX_PORTS != I915_MAX_PORTS);
for (i = 0; i < ARRAY_SIZE(acomp->aud_sample_rate); i++)
acomp->aud_sample_rate[i] = 0;
dev_priv->audio_component = acomp;
-   drm_modeset_unlock_all(_priv->drm);
+   DRM_MODESET_LOCK_ALL_END((_priv->drm), ctx, ret);
 
-   return 0;
+   return ret;
 }
 
 static void i915_audio_component_unbind(struct device *i915_kdev,
@@ -1252,12 +1254,14 @@ static void i915_audio_component_unbind(struct device 
*i915_kdev,
 {
struct i915_audio_component *acomp = data;
struct drm_i915_private *dev_priv = kdev_to_i915(i915_kdev);
+   struct drm_modeset_acquire_ctx ctx;
+   int ret;
 
-   drm_modeset_lock_all(_priv->drm);
+   DRM_MODESET_LOCK_ALL_BEGIN((_priv->drm), ctx, 0, ret);
acomp->base.ops = NULL;
acomp->base.dev = NULL;
dev_priv->audio_component = NULL;
-   drm_modeset_unlock_all(_priv->drm);
+   DRM_MODESET_LOCK_ALL_END((_priv->drm), ctx, ret);
 
device_link_remove(hda_kdev, i915_kdev);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c 
b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 309d74fd86ce..8a4cc82f9f23 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -5,6 +5,7 @@
 
 #include 
 #include 
+#include 
 
 #include "i915_debugfs.h"
 #include "intel_display_debugfs.h"
@@ -1058,11 +1059,13 @@ static int i915_display_info(struct seq_file *m, void 
*unused)
struct intel_crtc *crtc;
struct drm_connector *connector;
struct drm_connector_list_iter conn_iter;
+   struct drm_modeset_acquire_ctx ctx;
intel_wakeref_t wakeref;
+   int ret;
 
wakeref = intel_runtime_pm_get(_priv->runtime_pm);
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
 
seq_printf(m, "CRTC info\n");
seq_printf(m, "-\n");
@@ -1077,20 +1080,21 @@ static int i915_display_info(struct seq_file *m, void 
*unused)
intel_connector_info(m, connector);
drm_connector_list_iter_end(_iter);
 
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 
intel_runtime_pm_put(_priv->runtime_pm, wakeref);
 
-   return 0;
+   return ret;
 }
 
 static int i915_shared_dplls_info(struct seq_file *m, void *unused)
 {
struct drm_i915_private *dev_priv = node_to_i915(m->private);
struct drm_device *dev = _priv->drm;
-   int i;
+   struct drm_modeset_acquire_ctx ctx;
+   int i, ret;
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
 
seq_printf(m, "PLL refclks: non-SSC: %d kHz, SSC: %d kHz\n",
   dev_priv->dpll.ref_clks.nssc,
@@ -1133,9 +1137,9 @@ static int i915_shared_dplls_info(struct seq_file *m, 
void *unused)
seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n",
   pll->state.hw_state.mg_pll_tdc_coldst_bias);
}
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 
-   return 0;
+   return ret;
 }
 
 static int i915_ipc_status_show(struct seq_file *m, void *data)
@@ -1194,13 +1198,15 @@ static int 

[Intel-gfx] [PATCH v3 11/20] drm/msm: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 768012243b44..b89687074890 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -18,6 +18,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "dpu_kms.h"
 #include "dpu_hw_lm.h"
@@ -1172,14 +1173,15 @@ static int _dpu_debugfs_status_show(struct seq_file *s, 
void *data)
struct drm_display_mode *mode;
struct drm_framebuffer *fb;
struct drm_plane_state *state;
+   struct drm_modeset_acquire_ctx ctx;
struct dpu_crtc_state *cstate;
 
-   int i, out_width;
+   int i, out_width, ret;
 
dpu_crtc = s->private;
crtc = _crtc->base;
 
-   drm_modeset_lock_all(crtc->dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(crtc->dev, ctx, 0, ret);
cstate = to_dpu_crtc_state(crtc->state);
 
mode = >state->adjusted_mode;
@@ -1263,9 +1265,9 @@ static int _dpu_debugfs_status_show(struct seq_file *s, 
void *data)
dpu_crtc->vblank_cb_time = ktime_set(0, 0);
}
 
-   drm_modeset_unlock_all(crtc->dev);
+   DRM_MODESET_LOCK_ALL_END(crtc->dev, ctx, ret);
 
-   return 0;
+   return ret;
 }
 
 DEFINE_SHOW_ATTRIBUTE(_dpu_debugfs_status);
-- 
2.33.0

[Intel-gfx] [PATCH v3 10/20] drm/nouveau: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
Reviewed-by: Sean Paul 
---
 drivers/gpu/drm/nouveau/dispnv50/disp.c | 15 ++-
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c 
b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index d7b9f7f8c9e3..86e18a844953 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -42,6 +42,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include 
 
@@ -667,16 +668,18 @@ nv50_audio_component_bind(struct device *kdev, struct 
device *hda_kdev,
struct drm_device *drm_dev = dev_get_drvdata(kdev);
struct nouveau_drm *drm = nouveau_drm(drm_dev);
struct drm_audio_component *acomp = data;
+   struct drm_modeset_acquire_ctx ctx;
+   int ret;
 
if (WARN_ON(!device_link_add(hda_kdev, kdev, DL_FLAG_STATELESS)))
return -ENOMEM;
 
-   drm_modeset_lock_all(drm_dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(drm_dev, ctx, 0, ret);
acomp->ops = _audio_component_ops;
acomp->dev = kdev;
drm->audio.component = acomp;
-   drm_modeset_unlock_all(drm_dev);
-   return 0;
+   DRM_MODESET_LOCK_ALL_END(drm_dev, ctx, ret);
+   return ret;
 }
 
 static void
@@ -686,12 +689,14 @@ nv50_audio_component_unbind(struct device *kdev, struct 
device *hda_kdev,
struct drm_device *drm_dev = dev_get_drvdata(kdev);
struct nouveau_drm *drm = nouveau_drm(drm_dev);
struct drm_audio_component *acomp = data;
+   struct drm_modeset_acquire_ctx ctx;
+   int ret;
 
-   drm_modeset_lock_all(drm_dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(drm_dev, ctx, 0, ret);
drm->audio.component = NULL;
acomp->ops = NULL;
acomp->dev = NULL;
-   drm_modeset_unlock_all(drm_dev);
+   DRM_MODESET_LOCK_ALL_END(drm_dev, ctx, ret);
 }
 
 static const struct component_ops nv50_audio_component_bind_ops = {
-- 
2.33.0

[Intel-gfx] [PATCH v3 09/20] drm/omapdrm: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
Reviewed-by: Sean Paul 
---
 drivers/gpu/drm/omapdrm/omap_fb.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c 
b/drivers/gpu/drm/omapdrm/omap_fb.c
index 190afc564914..fa7636c13c19 100644
--- a/drivers/gpu/drm/omapdrm/omap_fb.c
+++ b/drivers/gpu/drm/omapdrm/omap_fb.c
@@ -9,6 +9,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "omap_dmm_tiler.h"
 #include "omap_drv.h"
@@ -62,15 +63,17 @@ static int omap_framebuffer_dirty(struct drm_framebuffer 
*fb,
  unsigned num_clips)
 {
struct drm_crtc *crtc;
+   struct drm_modeset_acquire_ctx ctx;
+   int ret;
 
-   drm_modeset_lock_all(fb->dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(fb->dev, ctx, 0, ret);
 
drm_for_each_crtc(crtc, fb->dev)
omap_crtc_flush(crtc);
 
-   drm_modeset_unlock_all(fb->dev);
+   DRM_MODESET_LOCK_ALL_END(fb->dev, ctx, ret);
 
-   return 0;
+   return ret;
 }
 
 static const struct drm_framebuffer_funcs omap_framebuffer_funcs = {
-- 
2.33.0

[Intel-gfx] [PATCH v3 08/20] drm/radeon: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
---
 drivers/gpu/drm/radeon/radeon_device.c | 21 +++--
 drivers/gpu/drm/radeon/radeon_dp_mst.c | 10 ++
 2 files changed, 21 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_device.c 
b/drivers/gpu/drm/radeon/radeon_device.c
index 4f0fbf667431..7e31e5ce7f61 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -37,6 +37,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -1559,7 +1560,8 @@ int radeon_suspend_kms(struct drm_device *dev, bool 
suspend,
struct pci_dev *pdev;
struct drm_crtc *crtc;
struct drm_connector *connector;
-   int i, r;
+   struct drm_modeset_acquire_ctx ctx;
+   int i, r, ret;
 
if (dev == NULL || dev->dev_private == NULL) {
return -ENODEV;
@@ -1573,12 +1575,15 @@ int radeon_suspend_kms(struct drm_device *dev, bool 
suspend,
 
drm_kms_helper_poll_disable(dev);
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
/* turn off display hw */
list_for_each_entry(connector, >mode_config.connector_list, head) {
drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
}
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
+
+   if (ret)
+   return ret;
 
/* unpin the front buffers and cursors */
list_for_each_entry(crtc, >mode_config.crtc_list, head) {
@@ -1663,7 +1668,8 @@ int radeon_resume_kms(struct drm_device *dev, bool 
resume, bool fbcon)
struct radeon_device *rdev = dev->dev_private;
struct pci_dev *pdev = to_pci_dev(dev->dev);
struct drm_crtc *crtc;
-   int r;
+   struct drm_modeset_acquire_ctx ctx;
+   int r, ret;
 
if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
return 0;
@@ -1741,11 +1747,14 @@ int radeon_resume_kms(struct drm_device *dev, bool 
resume, bool fbcon)
if (fbcon) {
drm_helper_resume_force_mode(dev);
/* turn on display hw */
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
list_for_each_entry(connector, 
>mode_config.connector_list, head) {
drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
}
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
+
+   if (ret)
+   return ret;
}
 
drm_kms_helper_poll_enable(dev);
diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c 
b/drivers/gpu/drm/radeon/radeon_dp_mst.c
index ec867fa880a4..3f83ee75b100 100644
--- a/drivers/gpu/drm/radeon/radeon_dp_mst.c
+++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
@@ -4,6 +4,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "atom.h"
 #include "ni_reg.h"
@@ -737,11 +738,12 @@ static int radeon_debugfs_mst_info_show(struct seq_file 
*m, void *unused)
struct radeon_device *rdev = (struct radeon_device *)m->private;
struct drm_device *dev = rdev->ddev;
struct drm_connector *connector;
+   struct drm_modeset_acquire_ctx ctx;
struct radeon_connector *radeon_connector;
struct radeon_connector_atom_dig *dig_connector;
-   int i;
+   int i, ret;
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
list_for_each_entry(connector, >mode_config.connector_list, head) {
if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
continue;
@@ -759,8 +761,8 @@ static int radeon_debugfs_mst_info_show(struct seq_file *m, 
void *unused)
   radeon_connector->cur_stream_attribs[i].fe,
   
radeon_connector->cur_stream_attribs[i].slots);
}
-   drm_modeset_unlock_all(dev);
-   return 0;
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
+   return ret;
 }
 
 DEFINE_SHOW_ATTRIBUTE(radeon_debugfs_mst_info);
-- 
2.33.0

[Intel-gfx] [PATCH v3 07/20] drm/shmobile: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
Reviewed-by: Sean Paul 
---
 drivers/gpu/drm/shmobile/shmob_drm_drv.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/shmobile/shmob_drm_drv.c 
b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
index 7db01904d18d..8ee215ab614e 100644
--- a/drivers/gpu/drm/shmobile/shmob_drm_drv.c
+++ b/drivers/gpu/drm/shmobile/shmob_drm_drv.c
@@ -156,10 +156,12 @@ static int shmob_drm_pm_suspend(struct device *dev)
 static int shmob_drm_pm_resume(struct device *dev)
 {
struct shmob_drm_device *sdev = dev_get_drvdata(dev);
+   struct drm_modeset_acquire_ctx ctx;
+   int ret;
 
-   drm_modeset_lock_all(sdev->ddev);
+   DRM_MODESET_LOCK_ALL_BEGIN(sdev->ddev, ctx, 0, ret);
shmob_drm_crtc_resume(>crtc);
-   drm_modeset_unlock_all(sdev->ddev);
+   DRM_MODESET_LOCK_ALL_END(sdev->ddev, ctx, ret);
 
drm_kms_helper_poll_enable(sdev->ddev);
return 0;
-- 
2.33.0

[Intel-gfx] [PATCH v3 06/20] drm/tegra: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
Reviewed-by: Sean Paul 
Reported-by: kernel test robot 
---
 drivers/gpu/drm/tegra/dsi.c  |  6 --
 drivers/gpu/drm/tegra/hdmi.c |  6 --
 drivers/gpu/drm/tegra/sor.c  | 11 +++
 3 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/tegra/dsi.c b/drivers/gpu/drm/tegra/dsi.c
index f46d377f0c30..28050c188c1c 100644
--- a/drivers/gpu/drm/tegra/dsi.c
+++ b/drivers/gpu/drm/tegra/dsi.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "dc.h"
 #include "drm.h"
@@ -202,10 +203,11 @@ static int tegra_dsi_show_regs(struct seq_file *s, void 
*data)
struct tegra_dsi *dsi = node->info_ent->data;
struct drm_crtc *crtc = dsi->output.encoder.crtc;
struct drm_device *drm = node->minor->dev;
+   struct drm_modeset_acquire_ctx ctx;
unsigned int i;
int err = 0;
 
-   drm_modeset_lock_all(drm);
+   DRM_MODESET_LOCK_ALL_BEGIN(drm, ctx, 0, err);
 
if (!crtc || !crtc->state->active) {
err = -EBUSY;
@@ -220,7 +222,7 @@ static int tegra_dsi_show_regs(struct seq_file *s, void 
*data)
}
 
 unlock:
-   drm_modeset_unlock_all(drm);
+   DRM_MODESET_LOCK_ALL_END(drm, ctx, err);
return err;
 }
 
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index e5d2a4026028..a62de7f92414 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -22,6 +22,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "hda.h"
 #include "hdmi.h"
@@ -1031,10 +1032,11 @@ static int tegra_hdmi_show_regs(struct seq_file *s, 
void *data)
struct tegra_hdmi *hdmi = node->info_ent->data;
struct drm_crtc *crtc = hdmi->output.encoder.crtc;
struct drm_device *drm = node->minor->dev;
+   struct drm_modeset_acquire_ctx ctx;
unsigned int i;
int err = 0;
 
-   drm_modeset_lock_all(drm);
+   DRM_MODESET_LOCK_ALL_BEGIN(drm, ctx, 0, err);
 
if (!crtc || !crtc->state->active) {
err = -EBUSY;
@@ -1049,7 +1051,7 @@ static int tegra_hdmi_show_regs(struct seq_file *s, void 
*data)
}
 
 unlock:
-   drm_modeset_unlock_all(drm);
+   DRM_MODESET_LOCK_ALL_END(drm, ctx, err);
return err;
 }
 
diff --git a/drivers/gpu/drm/tegra/sor.c b/drivers/gpu/drm/tegra/sor.c
index 0ea320c1092b..3d1c8b3d1358 100644
--- a/drivers/gpu/drm/tegra/sor.c
+++ b/drivers/gpu/drm/tegra/sor.c
@@ -23,6 +23,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "dc.h"
 #include "dp.h"
@@ -1490,10 +1491,11 @@ static int tegra_sor_show_crc(struct seq_file *s, void 
*data)
struct tegra_sor *sor = node->info_ent->data;
struct drm_crtc *crtc = sor->output.encoder.crtc;
struct drm_device *drm = node->minor->dev;
+   struct drm_modeset_acquire_ctx ctx;
int err = 0;
u32 value;
 
-   drm_modeset_lock_all(drm);
+   DRM_MODESET_LOCK_ALL_BEGIN(drm, ctx, 0, err);
 
if (!crtc || !crtc->state->active) {
err = -EBUSY;
@@ -1522,7 +1524,7 @@ static int tegra_sor_show_crc(struct seq_file *s, void 
*data)
seq_printf(s, "%08x\n", value);
 
 unlock:
-   drm_modeset_unlock_all(drm);
+   DRM_MODESET_LOCK_ALL_END(drm, ctx, err);
return err;
 }
 
@@ -1652,10 +1654,11 @@ static int tegra_sor_show_regs(struct seq_file *s, void 
*data)
struct tegra_sor *sor = node->info_ent->data;
struct drm_crtc *crtc = sor->output.encoder.crtc;
struct drm_device *drm = node->minor->dev;
+   struct drm_modeset_acquire_ctx ctx;
unsigned int i;
int err = 0;
 
-   drm_modeset_lock_all(drm);
+   DRM_MODESET_LOCK_ALL_BEGIN(drm, ctx, 0, err);
 
if (!crtc || !crtc->state->active) {
err = -EBUSY;
@@ -1670,7 +1673,7 @@ static int tegra_sor_show_regs(struct seq_file *s, void 
*data)
}
 
 unlock:
-   drm_modeset_unlock_all(drm);
+   DRM_MODESET_LOCK_ALL_END(drm, ctx, err);
return err;
 }
 
-- 
2.33.0

[Intel-gfx] [PATCH v3 05/20] drm/vmwgfx: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
Reviewed-by: Sean Paul 
---
 drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c | 11 +++
 drivers/gpu/drm/vmwgfx/vmwgfx_kms.c   | 12 
 2 files changed, 15 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c 
b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
index 28af34ab6ed6..7df35c6f1458 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ioctl.c
@@ -28,6 +28,7 @@
 #include "vmwgfx_drv.h"
 #include "vmwgfx_devcaps.h"
 #include 
+#include 
 #include "vmwgfx_kms.h"
 
 int vmw_getparam_ioctl(struct drm_device *dev, void *data,
@@ -172,6 +173,7 @@ int vmw_present_ioctl(struct drm_device *dev, void *data,
struct drm_vmw_rect __user *clips_ptr;
struct drm_vmw_rect *clips = NULL;
struct drm_framebuffer *fb;
+   struct drm_modeset_acquire_ctx ctx;
struct vmw_framebuffer *vfb;
struct vmw_resource *res;
uint32_t num_clips;
@@ -203,7 +205,7 @@ int vmw_present_ioctl(struct drm_device *dev, void *data,
goto out_no_copy;
}
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
 
fb = drm_framebuffer_lookup(dev, file_priv, arg->fb_id);
if (!fb) {
@@ -231,7 +233,7 @@ int vmw_present_ioctl(struct drm_device *dev, void *data,
 out_no_surface:
drm_framebuffer_put(fb);
 out_no_fb:
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 out_no_copy:
kfree(clips);
 out_clips:
@@ -250,6 +252,7 @@ int vmw_present_readback_ioctl(struct drm_device *dev, void 
*data,
struct drm_vmw_rect __user *clips_ptr;
struct drm_vmw_rect *clips = NULL;
struct drm_framebuffer *fb;
+   struct drm_modeset_acquire_ctx ctx;
struct vmw_framebuffer *vfb;
uint32_t num_clips;
int ret;
@@ -280,7 +283,7 @@ int vmw_present_readback_ioctl(struct drm_device *dev, void 
*data,
goto out_no_copy;
}
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
 
fb = drm_framebuffer_lookup(dev, file_priv, arg->fb_id);
if (!fb) {
@@ -303,7 +306,7 @@ int vmw_present_readback_ioctl(struct drm_device *dev, void 
*data,
 out_no_ttm_lock:
drm_framebuffer_put(fb);
 out_no_fb:
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 out_no_copy:
kfree(clips);
 out_clips:
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c 
b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 74fa41909213..268095cb8c84 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -33,6 +33,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "vmwgfx_kms.h"
 
@@ -243,15 +244,17 @@ void vmw_kms_legacy_hotspot_clear(struct vmw_private 
*dev_priv)
struct drm_device *dev = _priv->drm;
struct vmw_display_unit *du;
struct drm_crtc *crtc;
+   struct drm_modeset_acquire_ctx ctx;
+   int ret;
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
drm_for_each_crtc(crtc, dev) {
du = vmw_crtc_to_du(crtc);
 
du->hotspot_x = 0;
du->hotspot_y = 0;
}
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 }
 
 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
@@ -1012,9 +1015,10 @@ static int vmw_framebuffer_bo_dirty(struct 
drm_framebuffer *framebuffer,
struct vmw_framebuffer_bo *vfbd =
vmw_framebuffer_to_vfbd(framebuffer);
struct drm_clip_rect norect;
+   struct drm_modeset_acquire_ctx ctx;
int ret, increment = 1;
 
-   drm_modeset_lock_all(_priv->drm);
+   DRM_MODESET_LOCK_ALL_BEGIN((_priv->drm), ctx, 0, ret);
 
if (!num_clips) {
num_clips = 1;
@@ -1040,7 +1044,7 @@ static int vmw_framebuffer_bo_dirty(struct 
drm_framebuffer *framebuffer,
 
vmw_cmd_flush(dev_priv, false);
 
-   drm_modeset_unlock_all(_priv->drm);
+   DRM_MODESET_LOCK_ALL_END((_priv->drm), ctx, ret);
 
return ret;
 }
-- 
2.33.0

[Intel-gfx] [PATCH v3 04/20] drm: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace driver calls to
drm_modeset_lock_all() with DRM_MODESET_LOCK_ALL_BEGIN() and
DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
Reviewed-by: Sean Paul 
---
 drivers/gpu/drm/drm_client_modeset.c |  5 +++--
 drivers/gpu/drm/drm_crtc_helper.c| 18 --
 drivers/gpu/drm/drm_fb_helper.c  | 10 ++
 drivers/gpu/drm/drm_framebuffer.c|  6 --
 4 files changed, 25 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/drm_client_modeset.c 
b/drivers/gpu/drm/drm_client_modeset.c
index 5f5184f071ed..43f772543d2a 100644
--- a/drivers/gpu/drm/drm_client_modeset.c
+++ b/drivers/gpu/drm/drm_client_modeset.c
@@ -1062,9 +1062,10 @@ static int drm_client_modeset_commit_legacy(struct 
drm_client_dev *client)
struct drm_device *dev = client->dev;
struct drm_mode_set *mode_set;
struct drm_plane *plane;
+   struct drm_modeset_acquire_ctx ctx;
int ret = 0;
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
drm_for_each_plane(plane, dev) {
if (plane->type != DRM_PLANE_TYPE_PRIMARY)
drm_plane_force_disable(plane);
@@ -1093,7 +1094,7 @@ static int drm_client_modeset_commit_legacy(struct 
drm_client_dev *client)
goto out;
}
 out:
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 
return ret;
 }
diff --git a/drivers/gpu/drm/drm_crtc_helper.c 
b/drivers/gpu/drm/drm_crtc_helper.c
index bff917531f33..f3ce073dff79 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -218,11 +218,14 @@ static void __drm_helper_disable_unused_functions(struct 
drm_device *dev)
  */
 void drm_helper_disable_unused_functions(struct drm_device *dev)
 {
+   struct drm_modeset_acquire_ctx ctx;
+   int ret;
+
WARN_ON(drm_drv_uses_atomic_modeset(dev));
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
__drm_helper_disable_unused_functions(dev);
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 }
 EXPORT_SYMBOL(drm_helper_disable_unused_functions);
 
@@ -942,12 +945,14 @@ void drm_helper_resume_force_mode(struct drm_device *dev)
struct drm_crtc *crtc;
struct drm_encoder *encoder;
const struct drm_crtc_helper_funcs *crtc_funcs;
+   struct drm_modeset_acquire_ctx ctx;
int encoder_dpms;
bool ret;
+   int err;
 
WARN_ON(drm_drv_uses_atomic_modeset(dev));
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, err);
drm_for_each_crtc(crtc, dev) {
 
if (!crtc->enabled)
@@ -982,7 +987,7 @@ void drm_helper_resume_force_mode(struct drm_device *dev)
 
/* disable the unused connectors while restoring the modesetting */
__drm_helper_disable_unused_functions(dev);
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, err);
 }
 EXPORT_SYMBOL(drm_helper_resume_force_mode);
 
@@ -1002,9 +1007,10 @@ EXPORT_SYMBOL(drm_helper_resume_force_mode);
 int drm_helper_force_disable_all(struct drm_device *dev)
 {
struct drm_crtc *crtc;
+   struct drm_modeset_acquire_ctx ctx;
int ret = 0;
 
-   drm_modeset_lock_all(dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
drm_for_each_crtc(crtc, dev)
if (crtc->enabled) {
struct drm_mode_set set = {
@@ -1016,7 +1022,7 @@ int drm_helper_force_disable_all(struct drm_device *dev)
goto out;
}
 out:
-   drm_modeset_unlock_all(dev);
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
return ret;
 }
 EXPORT_SYMBOL(drm_helper_force_disable_all);
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 8e7a124d6c5a..3b5661cf6c2b 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -940,10 +940,11 @@ static int setcmap_legacy(struct fb_cmap *cmap, struct 
fb_info *info)
struct drm_fb_helper *fb_helper = info->par;
struct drm_mode_set *modeset;
struct drm_crtc *crtc;
+   struct drm_modeset_acquire_ctx ctx;
u16 *r, *g, *b;
int ret = 0;
 
-   drm_modeset_lock_all(fb_helper->dev);
+   DRM_MODESET_LOCK_ALL_BEGIN(fb_helper->dev, ctx, 0, ret);
drm_client_for_each_modeset(modeset, _helper->client) {
crtc = modeset->crtc;
if (!crtc->funcs->gamma_set || !crtc->gamma_size) {
@@ -970,7 +971,7 @@ static int setcmap_legacy(struct fb_cmap *cmap, struct 
fb_info *info)
goto out;
}
 out:
-   drm_modeset_unlock_all(fb_helper->dev);
+   DRM_MODESET_LOCK_ALL_END(fb_helper->dev, ctx, ret);
 
return ret;
 }
@@ -1441,10 +1442,11 @@ static int pan_display_legacy(struct 

[Intel-gfx] [PATCH v3 03/20] drm/msm: cleanup: drm_modeset_lock_all_ctx() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace the boilerplate code
surrounding drm_modeset_lock_all_ctx() with DRM_MODESET_LOCK_ALL_BEGIN()
and DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
Reviewed-by: Sean Paul 
Reported-by: kernel test robot 
---
 drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c | 12 ++--
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c 
b/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c
index cabe15190ec1..abda52f09b09 100644
--- a/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c
+++ b/drivers/gpu/drm/msm/disp/msm_disp_snapshot_util.c
@@ -5,6 +5,8 @@
 
 #define pr_fmt(fmt)"[drm:%s:%d] " fmt, __func__, __LINE__
 
+#include 
+
 #include "msm_disp_snapshot.h"
 
 static void msm_disp_state_dump_regs(u32 **reg, u32 aligned_len, void __iomem 
*base_addr)
@@ -99,20 +101,18 @@ static void msm_disp_capture_atomic_state(struct 
msm_disp_state *disp_state)
 {
struct drm_device *ddev;
struct drm_modeset_acquire_ctx ctx;
+   int ret;
 
disp_state->timestamp = ktime_get();
 
ddev = disp_state->drm_dev;
 
-   drm_modeset_acquire_init(, 0);
-
-   while (drm_modeset_lock_all_ctx(ddev, ) != 0)
-   drm_modeset_backoff();
+   DRM_MODESET_LOCK_ALL_BEGIN(ddev, ctx, 0, ret);
 
disp_state->atomic_state = drm_atomic_helper_duplicate_state(ddev,
);
-   drm_modeset_drop_locks();
-   drm_modeset_acquire_fini();
+
+   DRM_MODESET_LOCK_ALL_END(ddev, ctx, ret);
 }
 
 void msm_disp_snapshot_capture_state(struct msm_disp_state *disp_state)
-- 
2.33.0

[Intel-gfx] [PATCH v3 02/20] drm/i915: cleanup: drm_modeset_lock_all_ctx() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace the boilerplate code
surrounding drm_modeset_lock_all_ctx() with DRM_MODESET_LOCK_ALL_BEGIN()
and DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
Reviewed-by: Sean Paul 
---
 drivers/gpu/drm/i915/display/intel_display.c | 18 +-
 1 file changed, 5 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 4f0badb11bbb..cb1142447186 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -43,6 +43,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "display/intel_audio.h"
 #include "display/intel_crt.h"
@@ -12656,22 +12657,13 @@ void intel_display_resume(struct drm_device *dev)
if (state)
state->acquire_ctx = 
 
-   drm_modeset_acquire_init(, 0);
-
-   while (1) {
-   ret = drm_modeset_lock_all_ctx(dev, );
-   if (ret != -EDEADLK)
-   break;
-
-   drm_modeset_backoff();
-   }
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, ret);
 
-   if (!ret)
-   ret = __intel_display_resume(dev, state, );
+   ret = __intel_display_resume(dev, state, );
 
intel_enable_ipc(dev_priv);
-   drm_modeset_drop_locks();
-   drm_modeset_acquire_fini();
+
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, ret);
 
if (ret)
drm_err(_priv->drm,
-- 
2.33.0

[Intel-gfx] [PATCH v3 01/20] drm: cleanup: drm_modeset_lock_all_ctx() --> DRM_MODESET_LOCK_ALL_BEGIN()

[Fernando Ramos]

As requested in Documentation/gpu/todo.rst, replace the boilerplate code
surrounding drm_modeset_lock_all_ctx() with DRM_MODESET_LOCK_ALL_BEGIN()
and DRM_MODESET_LOCK_ALL_END()

Signed-off-by: Fernando Ramos 
---
 drivers/gpu/drm/drm_client_modeset.c | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/drm_client_modeset.c 
b/drivers/gpu/drm/drm_client_modeset.c
index ced09c7c06f9..5f5184f071ed 100644
--- a/drivers/gpu/drm/drm_client_modeset.c
+++ b/drivers/gpu/drm/drm_client_modeset.c
@@ -574,6 +574,7 @@ static bool drm_client_firmware_config(struct 
drm_client_dev *client,
int num_connectors_detected = 0;
int num_tiled_conns = 0;
struct drm_modeset_acquire_ctx ctx;
+   int err;
 
if (!drm_drv_uses_atomic_modeset(dev))
return false;
@@ -585,10 +586,7 @@ static bool drm_client_firmware_config(struct 
drm_client_dev *client,
if (!save_enabled)
return false;
 
-   drm_modeset_acquire_init(, 0);
-
-   while (drm_modeset_lock_all_ctx(dev, ) != 0)
-   drm_modeset_backoff();
+   DRM_MODESET_LOCK_ALL_BEGIN(dev, ctx, 0, err);
 
memcpy(save_enabled, enabled, count);
mask = GENMASK(count - 1, 0);
@@ -743,8 +741,7 @@ static bool drm_client_firmware_config(struct 
drm_client_dev *client,
ret = false;
}
 
-   drm_modeset_drop_locks();
-   drm_modeset_acquire_fini();
+   DRM_MODESET_LOCK_ALL_END(dev, ctx, err);
 
kfree(save_enabled);
return ret;
-- 
2.33.0

[Intel-gfx] [PATCH v3 00/20] drm: cleanup: Use DRM_MODESET_LOCK_ALL_* helpers

[Fernando Ramos]

Hi all,

One of the things in the DRM TODO list ("Documentation/gpu/todo.rst") was to
"use DRM_MODESET_LOCAL_ALL_* helpers instead of boilerplate". That's what this
patch series is about.

You will find two types of changes here:

  - Replacing "drm_modeset_lock_all_ctx()" (and surrounding boilerplate) with
"DRM_MODESET_LOCK_ALL_BEGIN()/END()" in the remaining places (as it has
already been done in previous commits such as b7ea04d2)

  - Replacing "drm_modeset_lock_all()" with "DRM_MODESET_LOCK_ALL_BEGIN()/END()"
in the remaining places (as it has already been done in previous commits
such as 57037094)

Most of the changes are straight forward, except for a few cases in the "amd"
and "i915" drivers where some extra dancing was needed to overcome the
limitation that the DRM_MODESET_LOCK_ALL_BEGIN()/END() macros can only be used
once inside the same function (the reason being that the macro expansion
includes *labels*, and you can not have two labels named the same inside one
function)

Notice that, even after this patch series, some places remain where
"drm_modeset_lock_all()" and "drm_modeset_lock_all_ctx()" are still present,
all inside drm core (which makes sense), except for two (in "amd" and "i915")
which cannot be replaced due to the way they are being used.

Changes in v2:
  - Fix commit message typo
  - Use the value returned by DRM_MODESET_LOCK_ALL_END when possible
  - Split drm/i915 patch into two simpler ones
  - Remove drm_modeset_(un)lock_all()
  - Fix build problems in non-x86 platforms

Changes in v3:
  - Fix in drm/i915 driver to make sure global context is no longer used
  - Fix in drm/amdgpu driver to make sure global context is no longer used
  - Split amdgpu driver to make it easier to understand
  - Remove acquire_ctx from drm_mode_config 
  - Rebase on top of drm-tip
  - WARNING: There is some discussion going on regarding whether the new macros
should be used (or not) in the i915 driver, as a different set of functions
has been proposed in the past (see here:
https://lore.kernel.org/dri-devel/yvrizxceipbug...@intel.com/).
In that case I will need to create a v4 where i915 files are left unchanged.
Let me know your thoughts regarding this.

Fernando Ramos (20):
  drm: cleanup: drm_modeset_lock_all_ctx() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/i915: cleanup: drm_modeset_lock_all_ctx() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/msm: cleanup: drm_modeset_lock_all_ctx() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/vmwgfx: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/tegra: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/shmobile: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/radeon: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/omapdrm: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/nouveau: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/msm: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/i915: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/i915: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() 
[part 2]
  drm/i915: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() 
[part 3]
  drm/gma500: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/amd: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN()
  drm/amd: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() 
[part 2]
  drm/amd: cleanup: drm_modeset_lock_all() --> DRM_MODESET_LOCK_ALL_BEGIN() 
[part 3]
  drm: cleanup: remove drm_modeset_(un)lock_all()
  drm: cleanup: remove acquire_ctx from drm_mode_config

 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c   | 21 +++--
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 59 ++--
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h |  3 +-
 .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 25 ++---
 drivers/gpu/drm/drm_client_modeset.c  | 14 ++-
 drivers/gpu/drm/drm_crtc_helper.c | 18 ++--
 drivers/gpu/drm/drm_fb_helper.c   | 10 +-
 drivers/gpu/drm/drm_framebuffer.c |  6 +-
 drivers/gpu/drm/drm_modeset_lock.c| 94 +--
 drivers/gpu/drm/gma500/psb_device.c   | 18 ++--
 drivers/gpu/drm/i915/display/intel_audio.c| 16 ++--
 drivers/gpu/drm/i915/display/intel_display.c  | 25 ++---
 .../drm/i915/display/intel_display_debugfs.c  | 46 +
 drivers/gpu/drm/i915/display/intel_overlay.c  | 46 -
 drivers/gpu/drm/i915/display/intel_pipe_crc.c |  7 +-
 drivers/gpu/drm/i915/i915_drv.c   | 13 ++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c  | 10 +-
 .../gpu/drm/msm/disp/msm_disp_snapshot_util.c | 12 +--
 drivers/gpu/drm/nouveau/dispnv50/disp.c   | 15 ++-
 drivers/gpu/drm/omapdrm/omap_fb.c |  9 +-
 

Re: [Intel-gfx] [PATCH 07/26] drm/i915/guc: Introduce context parent-child relationship

[John Harrison]

On 10/4/2021 15:06, Matthew Brost wrote:

Introduce context parent-child relationship. Once this relationship is
created all pinning / unpinning operations are directed to the parent
context. The parent context is responsible for pinning all of its'

No need for an apostrophe.


children and itself.

This is a precursor to the full GuC multi-lrc implementation but aligns
to how GuC mutli-lrc interface is defined - a single H2G is used
register / deregister all of the contexts simultaneously.

Subsequent patches in the series will implement the pinning / unpinning
operations for parent / child contexts.

v2:
  (Daniel Vetter)
   - Add kernel doc, add wrapper to access parent to ensure safety
v3:
  (John Harrison)
   - Fix comment explaing GEM_BUG_ON in to_parent()
   - Make variable names generic (non-GuC specific)

Signed-off-by: Matthew Brost 
---
  drivers/gpu/drm/i915/gt/intel_context.c   | 29 +
  drivers/gpu/drm/i915/gt/intel_context.h   | 41 +++
  drivers/gpu/drm/i915/gt/intel_context_types.h | 21 ++
  3 files changed, 91 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_context.c 
b/drivers/gpu/drm/i915/gt/intel_context.c
index f601323b939f..c5bb7ccfb3f8 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.c
+++ b/drivers/gpu/drm/i915/gt/intel_context.c
@@ -403,6 +403,8 @@ intel_context_init(struct intel_context *ce, struct 
intel_engine_cs *engine)
  
  	INIT_LIST_HEAD(>destroyed_link);
  
+	INIT_LIST_HEAD(>parallel.child_list);

+
/*
 * Initialize fence to be complete as this is expected to be complete
 * unless there is a pending schedule disable outstanding.
@@ -417,10 +419,17 @@ intel_context_init(struct intel_context *ce, struct 
intel_engine_cs *engine)
  
  void intel_context_fini(struct intel_context *ce)

  {
+   struct intel_context *child, *next;
+
if (ce->timeline)
intel_timeline_put(ce->timeline);
i915_vm_put(ce->vm);
  
+	/* Need to put the creation ref for the children */

+   if (intel_context_is_parent(ce))
+   for_each_child_safe(ce, child, next)
+   intel_context_put(child);
+
mutex_destroy(>pin_mutex);
i915_active_fini(>active);
i915_sw_fence_fini(>guc_state.blocked);
@@ -537,6 +546,26 @@ struct i915_request 
*intel_context_find_active_request(struct intel_context *ce)
return active;
  }
  
+void intel_context_bind_parent_child(struct intel_context *parent,

+struct intel_context *child)
+{
+   /*
+* Callers responsibility to validate that this function is used
+* correctly but we use GEM_BUG_ON here ensure that they do.
+*/
+   GEM_BUG_ON(!intel_engine_uses_guc(parent->engine));
+   GEM_BUG_ON(intel_context_is_pinned(parent));
+   GEM_BUG_ON(intel_context_is_child(parent));
+   GEM_BUG_ON(intel_context_is_pinned(child));
+   GEM_BUG_ON(intel_context_is_child(child));
+   GEM_BUG_ON(intel_context_is_parent(child));
+
+   parent->parallel.number_children++;
+   list_add_tail(>parallel.child_link,
+ >parallel.child_list);
+   child->parallel.parent = parent;
+}
+
  #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
  #include "selftest_context.c"
  #endif
diff --git a/drivers/gpu/drm/i915/gt/intel_context.h 
b/drivers/gpu/drm/i915/gt/intel_context.h
index c41098950746..b63c10a144af 100644
--- a/drivers/gpu/drm/i915/gt/intel_context.h
+++ b/drivers/gpu/drm/i915/gt/intel_context.h
@@ -44,6 +44,47 @@ void intel_context_free(struct intel_context *ce);
  int intel_context_reconfigure_sseu(struct intel_context *ce,
   const struct intel_sseu sseu);
  
+static inline bool intel_context_is_child(struct intel_context *ce)

+{
+   return !!ce->parallel.parent;
+}
+
+static inline bool intel_context_is_parent(struct intel_context *ce)
+{
+   return !!ce->parallel.number_children;
+}
+
+static inline bool intel_context_is_pinned(struct intel_context *ce);
+
+static inline struct intel_context *
+intel_context_to_parent(struct intel_context *ce)
+{
+   if (intel_context_is_child(ce)) {
+   /*
+* The parent holds ref count to the child so it is always safe
+* for the parent to access the child, but the child has a
+* pointer to the parent without a ref. To ensure this is safe
+* the child should only access the parent pointer while the
+* parent is pinned.
+*/
+   GEM_BUG_ON(!intel_context_is_pinned(ce->parallel.parent));
+
+   return ce->parallel.parent;
+   } else {
+   return ce;
+   }
+}
+
+void intel_context_bind_parent_child(struct intel_context *parent,
+struct intel_context *child);
+
+#define for_each_child(parent, ce)\
+   list_for_each_entry(ce, 

Re: [Intel-gfx] [PATCH 05/26] drm/i915: Add logical engine mapping

[John Harrison]

On 10/4/2021 15:06, Matthew Brost wrote:

Add logical engine mapping. This is required for split-frame, as
workloads need to be placed on engines in a logically contiguous manner.

v2:
  (Daniel Vetter)
   - Add kernel doc for new fields
v3
  (Tvrtko)
   - Update comment for new logical_mask field

Signed-off-by: Matthew Brost 
---
  drivers/gpu/drm/i915/gt/intel_engine_cs.c | 60 ---
  drivers/gpu/drm/i915/gt/intel_engine_types.h  |  7 +++
  .../drm/i915/gt/intel_execlists_submission.c  |  1 +
  drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c|  2 +-
  .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 21 +--
  5 files changed, 62 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 2ae57e4656a3..2eb798ad068b 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -290,7 +290,8 @@ static void nop_irq_handler(struct intel_engine_cs *engine, 
u16 iir)
GEM_DEBUG_WARN_ON(iir);
  }
  
-static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id)

+static int intel_engine_setup(struct intel_gt *gt, enum intel_engine_id id,
+ u8 logical_instance)
  {
const struct engine_info *info = _engines[id];
struct drm_i915_private *i915 = gt->i915;
@@ -335,6 +336,7 @@ static int intel_engine_setup(struct intel_gt *gt, enum 
intel_engine_id id)
  
  	engine->class = info->class;

engine->instance = info->instance;
+   engine->logical_mask = BIT(logical_instance);
__sprint_engine_name(engine);
  
  	engine->props.heartbeat_interval_ms =

@@ -588,6 +590,37 @@ static intel_engine_mask_t init_engine_mask(struct 
intel_gt *gt)
return info->engine_mask;
  }
  
+static void populate_logical_ids(struct intel_gt *gt, u8 *logical_ids,

+u8 class, const u8 *map, u8 num_instances)
+{
+   int i, j;
+   u8 current_logical_id = 0;
+
+   for (j = 0; j < num_instances; ++j) {
+   for (i = 0; i < ARRAY_SIZE(intel_engines); ++i) {
+   if (!HAS_ENGINE(gt, i) ||
+   intel_engines[i].class != class)
+   continue;
+
+   if (intel_engines[i].instance == map[j]) {
+   logical_ids[intel_engines[i].instance] =
+   current_logical_id++;
+   break;
+   }
+   }
+   }
+}
+
+static void setup_logical_ids(struct intel_gt *gt, u8 *logical_ids, u8 class)
+{
+   int i;
+   u8 map[MAX_ENGINE_INSTANCE + 1];
+
+   for (i = 0; i < MAX_ENGINE_INSTANCE + 1; ++i)
+   map[i] = i;
+   populate_logical_ids(gt, logical_ids, class, map, ARRAY_SIZE(map));
+}
+
  /**
   * intel_engines_init_mmio() - allocate and prepare the Engine Command 
Streamers
   * @gt: pointer to struct intel_gt
@@ -599,7 +632,8 @@ int intel_engines_init_mmio(struct intel_gt *gt)
struct drm_i915_private *i915 = gt->i915;
const unsigned int engine_mask = init_engine_mask(gt);
unsigned int mask = 0;
-   unsigned int i;
+   unsigned int i, class;
+   u8 logical_ids[MAX_ENGINE_INSTANCE + 1];
int err;
  
  	drm_WARN_ON(>drm, engine_mask == 0);

@@ -609,15 +643,23 @@ int intel_engines_init_mmio(struct intel_gt *gt)
if (i915_inject_probe_failure(i915))
return -ENODEV;
  
-	for (i = 0; i < ARRAY_SIZE(intel_engines); i++) {

-   if (!HAS_ENGINE(gt, i))
-   continue;
+   for (class = 0; class < MAX_ENGINE_CLASS + 1; ++class) {
+   setup_logical_ids(gt, logical_ids, class);
  
-		err = intel_engine_setup(gt, i);

-   if (err)
-   goto cleanup;
+   for (i = 0; i < ARRAY_SIZE(intel_engines); ++i) {
+   u8 instance = intel_engines[i].instance;
+
+   if (intel_engines[i].class != class ||
+   !HAS_ENGINE(gt, i))
+   continue;
  
-		mask |= BIT(i);

+   err = intel_engine_setup(gt, i,
+logical_ids[instance]);
+   if (err)
+   goto cleanup;
+
+   mask |= BIT(i);
+   }
}
  
  	/*

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h 
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 5ae1207c363b..68010da468a4 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -269,6 +269,13 @@ struct intel_engine_cs {
unsigned int guc_id;
  
  	intel_engine_mask_t mask;

+   /**
+* @logical_mask: logical mask of engine, reported to user space via
+* query IOCTL and used to communicate with the 

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Fix up skl_program_plane() pxp stuff

[Rodrigo Vivi]

On Thu, Oct 07, 2021 at 02:57:02AM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> There's lots of expensive stuff inserted between the PLANE_CTL
> and  PLANE_SURF writes even though the comment before the PLANE_CTL
> write says not to put stuff there. Move it all to a more apporiate
> place.

Yeap, the comment was ignored by all, including me during reviews. Sorry.

I'm wondering now if this entire block deserves a separated function
with more emphasis on the "do not put anything between plane_ctl and
plane_srf...

> 
> There's also a weird PLANE_COLOR_CTL RMW in there. I guess because
> force_black was computed way too late originally, but that is now
> sorted.

I would be hesitant in removing that, but since Juston confirmed that
everything works well for him with these patches, it is fine by me.

Great clean-up.

Reviewed-by: Rodrigo Vivi 

Thanks for this and all the other patches.

> 
> Cc: Anshuman Gupta 
> Cc: Daniele Ceraolo Spurio 
> Cc: Juston Li 
> Cc: Rodrigo Vivi 
> Cc: Uma Shankar 
> Signed-off-by: Ville Syrjälä 
> ---
>  .../drm/i915/display/skl_universal_plane.c| 30 +--
>  1 file changed, 14 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c 
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 1fcb41942c7e..55dae8c8fcad 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -985,6 +985,9 @@ static u32 glk_plane_color_ctl(const struct 
> intel_crtc_state *crtc_state,
>   plane_color_ctl |= 
> PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
>   }
>  
> + if (plane_state->force_black)
> + plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
> +
>   return plane_color_ctl;
>  }
>  
> @@ -1090,8 +1093,19 @@ skl_program_plane(struct intel_plane *plane,
>   aux_dist |= skl_plane_stride(plane_state, aux_plane);
>   }
>  
> + plane_surf = intel_plane_ggtt_offset(plane_state) + surf_addr;
> + if (plane_state->decrypt)
> + plane_surf |= PLANE_SURF_DECRYPT;
> +
>   spin_lock_irqsave(_priv->uncore.lock, irqflags);
>  
> + /*
> +  * FIXME: pxp session invalidation can hit any time even at time of 
> commit
> +  * or after the commit, display content will be garbage.
> +  */
> + if (plane_state->force_black)
> + intel_load_plane_csc_black(plane);
> +
>   intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id), stride);
>   intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
> (crtc_y << 16) | crtc_x);
> @@ -1146,22 +1160,6 @@ skl_program_plane(struct intel_plane *plane,
>* the control register just before the surface register.
>*/
>   intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> - plane_surf = intel_plane_ggtt_offset(plane_state) + surf_addr;
> - plane_color_ctl = intel_de_read_fw(dev_priv, PLANE_COLOR_CTL(pipe, 
> plane_id));
> -
> - /*
> -  * FIXME: pxp session invalidation can hit any time even at time of 
> commit
> -  * or after the commit, display content will be garbage.
> -  */
> - if (plane_state->decrypt) {
> - plane_surf |= PLANE_SURF_DECRYPT;
> - } else if (plane_state->force_black) {
> - intel_load_plane_csc_black(plane);
> - plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
> - }
> -
> - intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id),
> -   plane_color_ctl);
>   intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), plane_surf);
>  
>   spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
> -- 
> 2.32.0
> 

Re: [Intel-gfx] [PATCH v3] drm/i915: remove IS_ACTIVE

[Masahiro Yamada]

On Wed, Oct 6, 2021 at 2:21 AM Lucas De Marchi  wrote:
>
> When trying to bring IS_ACTIVE to linux/kconfig.h I thought it wouldn't
> provide much value just encapsulating it in a boolean context. So I also
> added the support for handling undefined macros as the IS_ENABLED()
> counterpart. However the feedback received from Masahiro Yamada was that
> it is too ugly, not providing much value. And just wrapping in a boolean
> context is too dumb - we could simply open code it.
>
> As detailed in commit babaab2f4738 ("drm/i915: Encapsulate kconfig
> constant values inside boolean predicates"), the IS_ACTIVE macro was
> added to workaround a compilation warning. However after checking again
> our current uses of IS_ACTIVE it turned out there is only
> 1 case in which it triggers a warning in clang (due
> -Wconstant-logical-operand) and 2 in smatch. All the others
> can simply use the shorter version, without wrapping it in any macro.
>
> So here I'm dialing all the way back to simply removing the macro. That
> single case hit by clang can be changed to make the constant come first,
> so it doesn't think it's mask:
>
> -   if (context && CONFIG_DRM_I915_FENCE_TIMEOUT)
> +   if (CONFIG_DRM_I915_FENCE_TIMEOUT && context)
>
> As talked with Dan Carpenter, that logic will be added in smatch as
> well, so it will also stop warning about it.
>
> Signed-off-by: Lucas De Marchi 
> Acked-by: Jani Nikula 

Reviewed-by: Masahiro Yamada 





-- 
Best Regards
Masahiro Yamada

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v7,1/8] drm/i915/gem: Break out some shmem backend utils

[Christian König]

Am 07.10.21 um 17:53 schrieb Tvrtko Ursulin:


On 07/10/2021 16:18, Vudum, Lakshminarayana wrote:

-Original Message-
From: Tvrtko Ursulin 
Sent: Thursday, October 7, 2021 6:41 AM
To: Christian König ; 
intel-gfx@lists.freedesktop.org

Cc: Vudum, Lakshminarayana 
Subject: Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting 
with [v7,1/8] drm/i915/gem: Break out some shmem backend utils



On 07/10/2021 13:57, Christian König wrote:

Am 07.10.21 um 12:51 schrieb Tvrtko Ursulin:


On 07/10/2021 10:19, Christian König wrote:

Am 07.10.21 um 11:15 schrieb Tvrtko Ursulin:

Hi,

On 06/10/2021 16:26, Patchwork wrote:

*Patch Details*
*Series:*    series starting with [v7,1/8] drm/i915/gem: Break out
some shmem backend utils
*URL:* https://patchwork.freedesktop.org/series/95501/

*State:*    failure
*Details:*
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21264/index.htm
l



   CI Bug Log - changes from CI_DRM_10688_full ->
Patchwork_21264_full


 Summary

*FAILURE*

Serious unknown changes coming with Patchwork_21264_full
absolutely need to be verified manually.

If you think the reported changes have nothing to do with the
changes introduced in Patchwork_21264_full, please notify your bug
team to allow them to document this new failure mode, which will
reduce false positives in CI.


 Possible new issues

Here are the unknown changes that may have been introduced in
Patchwork_21264_full:


   IGT changes


 Possible regressions

   *

 igt@gem_sync@basic-many-each:

   o shard-apl: NOTRUN -> INCOMPLETE



Something still fishy in the unlocked iterator? Or
dma_resv_get_fences using it?


Probably the later. I'm going to take a look.

Thanks for the notice,
Christian.



<6> [187.551235] [IGT] gem_sync: starting subtest basic-many-each
<1> [188.935462] BUG: kernel NULL pointer dereference, address:
0010
<1> [188.935485] #PF: supervisor write access in kernel mode <1>
[188.935495] #PF: error_code(0x0002) - not-present page <6>
[188.935504] PGD 0 P4D 0 <4> [188.935512] Oops: 0002 [#1] PREEMPT
SMP NOPTI <4> [188.935521] CPU: 2 PID: 1467 Comm: gem_sync Not
tainted 5.15.0-rc4-CI-Patchwork_21264+ #1 <4> [188.935535] Hardware
name:  /NUC6CAYB, BIOS
AYAPLCEL.86A.0049.2018.0508.1356 05/08/2018 <4> [188.935546] RIP:
0010:dma_resv_get_fences+0x116/0x2d0
<4> [188.935560] Code: 10 85 c0 7f c9 be 03 00 00 00 e8 15 8b df ff
eb bd e8 8e c6 ff ff eb b6 41 8b 04 24 49 8b 55 00 48 89 e7 8d 48
01
41 89 0c 24 <4c> 89 34 c2 e8 41 f2 ff ff 49 89 c6 48 85 c0 75 8c 48
8b 44 24 10 <4> [188.935583] RSP: 0018:c900011dbcc8 EFLAGS:
00010202 <4> [188.935593] RAX:  RBX:
 RCX:
0001
<4> [188.935603] RDX: 0010 RSI: 822e343c RDI:
c900011dbcc8
<4> [188.935613] RBP: c900011dbd48 R08: 88812d255bb8 R09:
fffe
<4> [188.935623] R10: 0001 R11:  R12:
c900011dbd44
<4> [188.935633] R13: c900011dbd50 R14: 888113d29cc0 R15:

<4> [188.935643] FS:  7f68d17e9700()
GS:88827790() knlGS: <4> [188.935655]
CS:  0010 DS:  ES:  CR0: 80050033 <4> [188.935665]
CR2: 0010 CR3: 00012d0a4000 CR4:
003506e0
<4> [188.935676] Call Trace:
<4> [188.935685]  i915_gem_object_wait+0x1ff/0x410 [i915] <4>
[188.935988]  i915_gem_wait_ioctl+0xf2/0x2a0 [i915] <4>
[188.936272]  ? i915_gem_object_wait+0x410/0x410 [i915] <4>
[188.936533]  drm_ioctl_kernel+0xae/0x140 <4> [188.936546]
drm_ioctl+0x201/0x3d0 <4> [188.936555]  ?
i915_gem_object_wait+0x410/0x410 [i915] <4> [188.936820]  ?
__fget_files+0xc2/0x1c0 <4> [188.936830]  ? __fget_files+0xda/0x1c0
<4> [188.936839]  __x64_sys_ioctl+0x6d/0xa0 <4> [188.936848]
do_syscall_64+0x3a/0xb0 <4> [188.936859]
entry_SYSCALL_64_after_hwframe+0x44/0xae


FWIW if you disassemble the code it seems to be crashing in:

   (*shared)[(*shared_count)++] = fence; // mov %r14, (%rdx, %rax, 8)

RDX is *shared, RAX is *shared_count, RCX is *shared_count++ (for the
next iteration. R13 is share and R12 shared_count.

That *shared can contain 0010 makes no sense to me. At
least yet. :)


Yeah, me neither. I've gone over the whole code multiple time now and
absolutely don't get what's happening here.

Adding some more selftests didn't helped either. As far as I can see
the code works as intended.

Do we have any other reports of crashes?


Yes, sporadic but present across different platforms since the change 
went it:
https://intel-gfx-ci.01.org/tree/drm-tip/igt@gem_s...@basic-many-each.html. 


So issue is probably real.

Did not find any other tests failing with the same signature. Lakshmi 
are you perhaps able to search for the same or similar signature 

Re: [Intel-gfx] [PATCH 01/26] drm/i915/guc: Move GuC guc_id allocation under submission state sub-struct

[John Harrison]

On 10/7/2021 08:05, Matthew Brost wrote:

On Wed, Oct 06, 2021 at 08:06:41PM -0700, John Harrison wrote:

On 10/4/2021 15:06, Matthew Brost wrote:

Move guc_id allocation under submission state sub-struct as a future
patch will reuse the spin lock as a global submission state lock. Moving
this into sub-struct makes ownership of fields / lock clear.

Signed-off-by: Matthew Brost 
---
   drivers/gpu/drm/i915/gt/intel_context_types.h |  6 +-
   drivers/gpu/drm/i915/gt/uc/intel_guc.h| 26 +
   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 56 ++-
   3 files changed, 47 insertions(+), 41 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h 
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index 12252c411159..e7e3984aab78 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -197,18 +197,18 @@ struct intel_context {
struct {
/**
 * @id: handle which is used to uniquely identify this context
-* with the GuC, protected by guc->contexts_lock
+* with the GuC, protected by guc->submission_state.lock
 */
u16 id;
/**
 * @ref: the number of references to the guc_id, when
 * transitioning in and out of zero protected by
-* guc->contexts_lock
+* guc->submission_state.lock
 */
atomic_t ref;
/**
 * @link: in guc->guc_id_list when the guc_id has no refs but is
-* still valid, protected by guc->contexts_lock
+* still valid, protected by guc->submission_state.lock
 */
struct list_head link;
} guc_id;
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 5dd174babf7a..65b5e8eeef96 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -70,17 +70,21 @@ struct intel_guc {
void (*disable)(struct intel_guc *guc);
} interrupts;
-   /**
-* @contexts_lock: protects guc_ids, guc_id_list, ce->guc_id.id, and
-* ce->guc_id.ref when transitioning in and out of zero
-*/
-   spinlock_t contexts_lock;
-   /** @guc_ids: used to allocate unique ce->guc_id.id values */
-   struct ida guc_ids;
-   /**
-* @guc_id_list: list of intel_context with valid guc_ids but no refs
-*/
-   struct list_head guc_id_list;
+   struct {
+   /**
+* @lock: protects everything in submission_state
+*/
+   spinlock_t lock;

The old version also mentioned 'ce->guc_id.ref'. Should this not also
mention that transition? Or was the old comment inaccurate. I'm not seeing
any actual behaviour changes in the patch.



Can add that back in.


+   /**
+* @guc_ids: used to allocate new guc_ids
+*/
+   struct ida guc_ids;
+   /**
+* @guc_id_list: list of intel_context with valid guc_ids but no
+* refs
+*/
+   struct list_head guc_id_list;
+   } submission_state;
/**
 * @submission_supported: tracks whether we support GuC submission on
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index ba0de35f6323..ad5c18119d92 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -68,16 +68,16 @@
* fence is used to stall all requests associated with this guc_id until the
* corresponding G2H returns indicating the guc_id has been deregistered.
*
- * guc_ids:
+ * submission_state.guc_ids:
* Unique number associated with private GuC context data passed in during
* context registration / submission / deregistration. 64k available. Simple 
ida
* is used for allocation.
*
- * Stealing guc_ids:
- * If no guc_ids are available they can be stolen from another context at
- * request creation time if that context is unpinned. If a guc_id can't be 
found
- * we punt this problem to the user as we believe this is near impossible to 
hit
- * during normal use cases.
+ * Stealing submission_state.guc_ids:
+ * If no submission_state.guc_ids are available they can be stolen from another

I would abbreviate this instance as well, submission_state.guc_id is quite
the mouthful. Unless this somehow magically links back to the structure
entry in the kerneldoc output?


It might, not really sure but agree the submission_state should be
dropped. Think changed because of global find replace.

Matt

Okay. With those nits fixed:
Reviewed by: John Harrison 


John.


+ * context at request creation time if that context is unpinned. If a guc_id
+ * can't 

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/panelreplay: Added state checker for panel replay state

[Jani Nikula]

On Thu, 07 Oct 2021, Animesh Manna  wrote:
> has_panel_replay flag is used to check panel replay state
> which is part of crtc_state structure.
>
> Signed-off-by: Animesh Manna 
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 1 +
>  drivers/gpu/drm/i915/display/intel_psr.c | 2 ++
>  2 files changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 4f0badb11bbb..a30b6fe87dfc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8136,6 +8136,7 @@ intel_pipe_config_compare(const struct intel_crtc_state 
> *current_config,
>   PIPE_CONF_CHECK_BOOL(has_psr);
>   PIPE_CONF_CHECK_BOOL(has_psr2);
>   PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
> + PIPE_CONF_CHECK_BOOL(has_panel_replay);
>   PIPE_CONF_CHECK_I(dc3co_exitline);
>   }
>   }
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 197cab7551c6..756f3c775e71 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1050,6 +1050,8 @@ void intel_psr_get_config(struct intel_encoder *encoder,
>*/
>   pipe_config->has_psr = true;
>   pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
> + pipe_config->has_panel_replay = intel_dp->psr.enabled &&
> + intel_dp_is_edp(intel_dp);

Get config is supposed to read the config from hardware, and then the
state checker compares sw and hw states. This seems off.

BR,
Jani.

>   pipe_config->infoframes.enable |= 
> intel_hdmi_infoframe_enable(DP_SDP_VSC);
>  
>   if (!intel_dp->psr.psr2_enabled)

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v2 3/4] drm/i915/panelreplay: enable/disable panel replay

[Jani Nikula]

On Thu, 07 Oct 2021, Animesh Manna  wrote:
> TRANS_DP2_CTL register is programmed to enable panel replay from source
> and sink is enabled through panel replay dpcd configuration address.
>
> Signed-off-by: Animesh Manna 
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 30 
>  drivers/gpu/drm/i915/i915_reg.h  |  1 +
>  include/drm/drm_dp_helper.h  |  3 +++
>  3 files changed, 30 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 935ea1c434ac..197cab7551c6 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -370,8 +370,14 @@ static void intel_psr_enable_sink(struct intel_dp 
> *intel_dp)
>   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>   u8 dpcd_val = DP_PSR_ENABLE;
>  
> - /* Enable ALPM at sink for psr2 */
> + if (intel_dp->psr.enabled && !intel_dp_is_edp(intel_dp)) {
> + drm_dp_dpcd_writeb(_dp->aux, PANEL_REPLAY_CONFIG,
> +PANEL_REPLAY_ENABLE);
> + return;
> + }
> +
>   if (intel_dp->psr.psr2_enabled) {
> + /* Enable ALPM at sink for psr2 */
>   drm_dp_dpcd_writeb(_dp->aux, DP_RECEIVER_ALPM_CONFIG,
>  DP_ALPM_ENABLE |
>  DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
> @@ -498,6 +504,17 @@ static u32 intel_psr2_get_tp_time(struct intel_dp 
> *intel_dp)
>   return val;
>  }
>  
> +static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
> +{
> + struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> + intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder),
> +ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE);
> +
> + intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0,
> +  TRANS_DP2_PANEL_REPLAY_ENABLE);
> +}
> +
>  static void hsw_activate_psr2(struct intel_dp *intel_dp)
>  {
>   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> @@ -1067,8 +1084,10 @@ static void intel_psr_activate(struct intel_dp 
> *intel_dp)
>   drm_WARN_ON(_priv->drm, intel_dp->psr.active);
>   lockdep_assert_held(_dp->psr.lock);
>  
> - /* psr1 and psr2 are mutually exclusive.*/
> - if (intel_dp->psr.psr2_enabled)
> + /* psr1, psr2 and panel-replay are mutually exclusive.*/
> + if (intel_dp->psr.enabled && !intel_dp_is_edp(intel_dp))
> + dg2_activate_panel_replay(intel_dp);
> + else if (intel_dp->psr.psr2_enabled)
>   hsw_activate_psr2(intel_dp);
>   else
>   hsw_activate_psr1(intel_dp);
> @@ -1241,7 +1260,10 @@ static void intel_psr_exit(struct intel_dp *intel_dp)
>   return;
>   }
>  
> - if (intel_dp->psr.psr2_enabled) {
> + if (intel_dp->psr.enabled && !intel_dp_is_edp(intel_dp)) {
> + intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder),
> +  TRANS_DP2_PANEL_REPLAY_ENABLE, 0);
> + } else if (intel_dp->psr.psr2_enabled) {
>   tgl_disallow_dc3co_on_psr2_exit(intel_dp);
>   val = intel_de_read(dev_priv,
>   EDP_PSR2_CTL(intel_dp->psr.transcoder));
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index a897f4abea0c..6cc6ebcd3bdb 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4725,6 +4725,7 @@ enum {
>  #define  PSR2_MAN_TRK_CTL_SF_SINGLE_FULL_FRAME   
> REG_BIT(3)
>  #define  PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAMEREG_BIT(2)
>  #define  PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATEREG_BIT(1)
> +#define  ADLP_PSR2_MAN_TRK_CTL_SF_PARTIAL_FRAME_UPDATE   
> REG_BIT(31)
>  #define  ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK REG_GENMASK(28, 
> 16)
>  #define  ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR(val) 
> REG_FIELD_PREP(ADLP_PSR2_MAN_TRK_CTL_SU_REGION_START_ADDR_MASK, val)
>  #define  ADLP_PSR2_MAN_TRK_CTL_SU_REGION_END_ADDR_MASK   
> REG_GENMASK(12, 0)
> diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
> index d18340cbf8ac..4b95289e6edf 100644
> --- a/include/drm/drm_dp_helper.h
> +++ b/include/drm/drm_dp_helper.h
> @@ -712,6 +712,9 @@ struct drm_panel;
>  #define DP_BRANCH_DEVICE_CTRL0x1a1
>  # define DP_BRANCH_DEVICE_IRQ_HPD(1 << 0)
>  
> +#define PANEL_REPLAY_CONFIG 0x1b0
> +# define PANEL_REPLAY_ENABLE(1 << 0)
> +

Previous patch has:

 +#define DP_PANEL_REPLAY_SUPPORT 0x0b0
 +# define PANEL_REPLAY_SUPPORT   (1 << 0)
 +

Also, it's called "PANEL REPLAY CAPABILITY SUPPORTED" in the spec, so
DP_PANEL_REPLAY_CAP or something sounds more like it.


>  #define DP_PAYLOAD_ALLOCATE_SET  0x1c0
>  

Re: [Intel-gfx] [PATCH v2 2/4] drm/i915/panelreplay: Initializaton and compute config for panel replay

[Jani Nikula]

On Thu, 07 Oct 2021, Animesh Manna  wrote:
> As panel replay feature similar to PSR feature of EDP panel, so currently
> utilized existing psr framework for panel replay.
>
> v1: RFC version.
> v2: optimized code, pr_enabled and pr_dpcd variable removed. [Jose]
>
> Signed-off-by: Animesh Manna 
> ---
>  .../drm/i915/display/intel_display_types.h|  2 +
>  drivers/gpu/drm/i915/display/intel_dp.c   | 47 +++
>  drivers/gpu/drm/i915/display/intel_psr.c  | 43 +
>  drivers/gpu/drm/i915/display/intel_psr.h  |  3 ++
>  include/drm/drm_dp_helper.h   |  3 ++
>  5 files changed, 89 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 21ce8bccc645..b32d9529feef 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1070,6 +1070,7 @@ struct intel_crtc_state {
>   bool req_psr2_sdp_prior_scanline;
>   u32 dc3co_exitline;
>   u16 su_y_granularity;
> + bool has_panel_replay;
>   struct drm_dp_vsc_sdp psr_vsc;
>  
>   /*
> @@ -1531,6 +1532,7 @@ struct intel_psr {
>   bool irq_aux_error;
>   u16 su_w_granularity;
>   u16 su_y_granularity;
> + bool sink_pr_support;

Maybe spell out panel_replay here too, pr is just too short IMO.

>   u32 dc3co_exitline;
>   u32 dc3co_exit_delay;
>   struct delayed_work dc3co_work;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 74a657ae131a..45181692e3b0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1569,12 +1569,22 @@ static void intel_dp_compute_vsc_colorimetry(const 
> struct intel_crtc_state *crtc
>   struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  
> - /*
> -  * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
> -  * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
> -  * Colorimetry Format indication.
> -  */
> - vsc->revision = 0x5;
> + if (crtc_state->has_panel_replay) {
> + /*
> +  * Prepare VSC Header for SU as per DP 2.0 spec, Table 2-223
> +  * VSC SDP supporting 3D stereo, Panel Replay, and Pixel
> +  * Encoding/Colorimetry Format indication.
> +  */
> + vsc->revision = 0x7;
> + } else {
> + /*
> +  * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
> +  * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
> +  * Colorimetry Format indication.
> +  */
> + vsc->revision = 0x5;
> + }
> +
>   vsc->length = 0x13;
>  
>   /* DP 1.4a spec, Table 2-120 */
> @@ -1683,6 +1693,22 @@ void intel_dp_compute_psr_vsc_sdp(struct intel_dp 
> *intel_dp,
>   vsc->revision = 0x4;
>   vsc->length = 0xe;
>   }
> + } else if (intel_dp->psr.enabled && !intel_dp_is_edp(intel_dp)) {
> + if (intel_dp->psr.colorimetry_support &&
> + intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
> + /* [PR, +Colorimetry] */
> + intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
> +  vsc);
> + } else {
> + /*
> +  * [PR, -Colorimetry]
> +  * Prepare VSC Header for SU as per DP 2.0 spec, Table 
> 2-223
> +  * VSC SDP supporting 3D stereo + PR (applies to eDP 
> v1.3 or
> +  * higher).
> +  */
> + vsc->revision = 0x6;
> + vsc->length = 0x10;
> + }
>   } else {
>   /*
>* [PSR1]
> @@ -1824,6 +1850,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  
>   intel_vrr_compute_config(pipe_config, conn_state);
>   intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> + intel_panel_replay_compute_config(intel_dp, pipe_config);
>   intel_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> constant_n);
>   intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> @@ -2731,10 +2758,10 @@ static ssize_t intel_dp_vsc_sdp_pack(const struct 
> drm_dp_vsc_sdp *vsc,
>   sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */
>  
>   /*
> -  * Only revision 0x5 supports Pixel Encoding/Colorimetry Format as
> -  * per DP 1.4a spec.
> +  * Revision 0x5 and 0x7 supports Pixel Encoding/Colorimetry Format as
> +  * per DP 1.4a spec and DP 2.0 spec respectively.
>*/
> - if (vsc->revision != 0x5)
> + if 

Re: [Intel-gfx] [PATCH v2 2/4] drm/i915/panelreplay: Initializaton and compute config for panel replay

[Jani Nikula]

On Thu, 07 Oct 2021, Animesh Manna  wrote:
> As panel replay feature similar to PSR feature of EDP panel, so currently
> utilized existing psr framework for panel replay.
>
> v1: RFC version.
> v2: optimized code, pr_enabled and pr_dpcd variable removed. [Jose]
>
> Signed-off-by: Animesh Manna 
> ---
>  .../drm/i915/display/intel_display_types.h|  2 +
>  drivers/gpu/drm/i915/display/intel_dp.c   | 47 +++
>  drivers/gpu/drm/i915/display/intel_psr.c  | 43 +
>  drivers/gpu/drm/i915/display/intel_psr.h  |  3 ++
>  include/drm/drm_dp_helper.h   |  3 ++
>  5 files changed, 89 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 21ce8bccc645..b32d9529feef 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1070,6 +1070,7 @@ struct intel_crtc_state {
>   bool req_psr2_sdp_prior_scanline;
>   u32 dc3co_exitline;
>   u16 su_y_granularity;
> + bool has_panel_replay;
>   struct drm_dp_vsc_sdp psr_vsc;
>  
>   /*
> @@ -1531,6 +1532,7 @@ struct intel_psr {
>   bool irq_aux_error;
>   u16 su_w_granularity;
>   u16 su_y_granularity;
> + bool sink_pr_support;
>   u32 dc3co_exitline;
>   u32 dc3co_exit_delay;
>   struct delayed_work dc3co_work;
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 74a657ae131a..45181692e3b0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1569,12 +1569,22 @@ static void intel_dp_compute_vsc_colorimetry(const 
> struct intel_crtc_state *crtc
>   struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>   struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
>  
> - /*
> -  * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
> -  * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
> -  * Colorimetry Format indication.
> -  */
> - vsc->revision = 0x5;
> + if (crtc_state->has_panel_replay) {
> + /*
> +  * Prepare VSC Header for SU as per DP 2.0 spec, Table 2-223
> +  * VSC SDP supporting 3D stereo, Panel Replay, and Pixel
> +  * Encoding/Colorimetry Format indication.
> +  */
> + vsc->revision = 0x7;
> + } else {
> + /*
> +  * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
> +  * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
> +  * Colorimetry Format indication.
> +  */
> + vsc->revision = 0x5;
> + }
> +
>   vsc->length = 0x13;
>  
>   /* DP 1.4a spec, Table 2-120 */
> @@ -1683,6 +1693,22 @@ void intel_dp_compute_psr_vsc_sdp(struct intel_dp 
> *intel_dp,
>   vsc->revision = 0x4;
>   vsc->length = 0xe;
>   }
> + } else if (intel_dp->psr.enabled && !intel_dp_is_edp(intel_dp)) {
> + if (intel_dp->psr.colorimetry_support &&
> + intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
> + /* [PR, +Colorimetry] */
> + intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
> +  vsc);
> + } else {
> + /*
> +  * [PR, -Colorimetry]

I don't understand the comment format here and above. Plain English,
please.

> +  * Prepare VSC Header for SU as per DP 2.0 spec, Table 
> 2-223
> +  * VSC SDP supporting 3D stereo + PR (applies to eDP 
> v1.3 or
> +  * higher).
> +  */
> + vsc->revision = 0x6;
> + vsc->length = 0x10;
> + }
>   } else {
>   /*
>* [PSR1]
> @@ -1824,6 +1850,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
>  
>   intel_vrr_compute_config(pipe_config, conn_state);
>   intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> + intel_panel_replay_compute_config(intel_dp, pipe_config);

Are there any cases where we'd actually need to keep
intel_psr_compute_config and intel_panel_replay_compute_config separate?
Could you just call intel_panel_replay_compute_config from within
intel_psr_compute_config to not clutter this?

>   intel_drrs_compute_config(intel_dp, pipe_config, output_bpp,
> constant_n);
>   intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
> @@ -2731,10 +2758,10 @@ static ssize_t intel_dp_vsc_sdp_pack(const struct 
> drm_dp_vsc_sdp *vsc,
>   sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */
>  
>   /*
> -  * Only revision 0x5 supports Pixel 

[Intel-gfx] ✗ Fi.CI.BAT: failure for Panel replay phase1 implementation (rev2)

[Patchwork]

== Series Details ==

Series: Panel replay phase1 implementation (rev2)
URL   : https://patchwork.freedesktop.org/series/94470/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_10695 -> Patchwork_21280


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_21280 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_21280, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/index.html

Possible new issues
---

  Here are the unknown changes that may have been introduced in Patchwork_21280:

### IGT changes ###

 Possible regressions 

  * igt@debugfs_test@read_all_entries:
- fi-icl-u2:  [PASS][1] -> [DMESG-WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10695/fi-icl-u2/igt@debugfs_test@read_all_entries.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-icl-u2/igt@debugfs_test@read_all_entries.html

  * igt@runner@aborted:
- fi-tgl-u2:  NOTRUN -> [FAIL][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-tgl-u2/igt@run...@aborted.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@runner@aborted:
- {fi-jsl-1}: NOTRUN -> [FAIL][4]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-jsl-1/igt@run...@aborted.html
- {fi-ehl-2}: NOTRUN -> [FAIL][5]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-ehl-2/igt@run...@aborted.html

  
Known issues


  Here are the changes found in Patchwork_21280 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@read_all_entries:
- fi-kbl-r:   [PASS][6] -> [DMESG-WARN][7] ([i915#262])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10695/fi-kbl-r/igt@debugfs_test@read_all_entries.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-kbl-r/igt@debugfs_test@read_all_entries.html

  * igt@i915_selftest@live@execlists:
- fi-bsw-nick:[PASS][8] -> [INCOMPLETE][9] ([i915#2940])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10695/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-bsw-nick/igt@i915_selftest@l...@execlists.html

  * igt@runner@aborted:
- fi-skl-6600u:   NOTRUN -> [FAIL][10] ([i915#3363])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-skl-6600u/igt@run...@aborted.html
- fi-icl-u2:  NOTRUN -> [FAIL][11] ([i915#1814] / [i915#3363])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-icl-u2/igt@run...@aborted.html
- fi-bsw-nick:NOTRUN -> [FAIL][12] ([fdo#109271] / [i915#1436] / 
[i915#3428])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-bsw-nick/igt@run...@aborted.html
- fi-kbl-r:   NOTRUN -> [FAIL][13] ([i915#1814] / [i915#3363])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-kbl-r/igt@run...@aborted.html
- fi-bdw-5557u:   NOTRUN -> [FAIL][14] ([i915#1602] / [i915#2029])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-bdw-5557u/igt@run...@aborted.html
- fi-kbl-soraka:  NOTRUN -> [FAIL][15] ([i915#1569] / [i915#192] / 
[i915#193] / [i915#194] / [i915#3363])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-kbl-soraka/igt@run...@aborted.html
- fi-cml-u2:  NOTRUN -> [FAIL][16] ([i915#3363])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21280/fi-cml-u2/igt@run...@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1569]: https://gitlab.freedesktop.org/drm/intel/issues/1569
  [i915#1602]: https://gitlab.freedesktop.org/drm/intel/issues/1602
  [i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
  [i915#192]: https://gitlab.freedesktop.org/drm/intel/issues/192
  [i915#193]: https://gitlab.freedesktop.org/drm/intel/issues/193
  [i915#194]: https://gitlab.freedesktop.org/drm/intel/issues/194
  [i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
  [i915#262]: https://gitlab.freedesktop.org/drm/intel/issues/262
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#3363]: https://gitlab.freedesktop.org/drm/intel/issues/3363
  [i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428

Re: [Intel-gfx] [PATCH v2 1/4] drm/i915/panelreplay: HAS_PR() macro added for panel replay

[Jani Nikula]

On Thu, 07 Oct 2021, Ville Syrjälä  wrote:
> On Thu, Oct 07, 2021 at 09:27:26PM +0530, Animesh Manna wrote:
>> Platforms having Display 13 and above will support panel
>> replay feature of DP 2.0 monitor. Added a HAS_PR() macro
>> to check for panel replay capability.
>> 
>> v1: Initial version.
>> v2: DISPLAY_VER macro used instead of has_pr flag. [Jose]
>> 
>> Signed-off-by: Animesh Manna 
>> ---
>>  drivers/gpu/drm/i915/i915_drv.h | 1 +
>>  1 file changed, 1 insertion(+)
>> 
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
>> b/drivers/gpu/drm/i915/i915_drv.h
>> index 12256218634f..8db0626337e3 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -1693,6 +1693,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>>  #define HAS_DDI(dev_priv)(INTEL_INFO(dev_priv)->display.has_ddi)
>>  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) 
>> (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
>>  #define HAS_PSR(dev_priv)(INTEL_INFO(dev_priv)->display.has_psr)
>> +#define HAS_PR(dev_priv) (DISPLAY_VER(dev_priv) >= 13)
>
> Public relations?

Yeah, HAS_PANEL_REPLAY() sounds more like it. Also wondering why this
doesn't depend on HAS_DP20() which is what effectively gets done in
patch 2. Sure, it's more restrictive at the moment, but IIUC that's the
dependency.

BR,
Jani.

>
>>  #define HAS_PSR_HW_TRACKING(dev_priv) \
>>  (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
>>  #define HAS_PSR2_SEL_FETCH(dev_priv) (GRAPHICS_VER(dev_priv) >= 12)
>> -- 
>> 2.29.0

-- 
Jani Nikula, Intel Open Source Graphics Center