[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] x86/quirks: Fix logic to apply quirk once
== Series Details == Series: series starting with [v2,1/2] x86/quirks: Fix logic to apply quirk once URL : https://patchwork.freedesktop.org/series/98523/ State : success == Summary == CI Bug Log - changes from CI_DRM_11051 -> Patchwork_21929 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/index.html Participating hosts (46 -> 31) -- Additional (1): fi-pnv-d510 Missing(16): fi-kbl-soraka bat-adls-5 bat-dg1-6 bat-dg1-5 fi-bsw-n3050 fi-tgl-dsi fi-icl-u2 fi-bwr-2160 bat-adlp-6 fi-bsw-cyan fi-bsw-kefka bat-rpls-1 fi-bdw-samus bat-jsl-2 fi-bsw-nick bat-jsl-1 Known issues Here are the changes found in Patchwork_21929 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_cs_nop@sync-fork-compute0: - fi-snb-2600:NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/fi-snb-2600/igt@amdgpu/amd_cs_...@sync-fork-compute0.html * igt@gem_exec_suspend@basic-s3@smem: - fi-tgl-1115g4: [PASS][2] -> [FAIL][3] ([i915#1888]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11051/fi-tgl-1115g4/igt@gem_exec_suspend@basic...@smem.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/fi-tgl-1115g4/igt@gem_exec_suspend@basic...@smem.html * igt@i915_selftest@live@hugepages: - fi-snb-2520m: [PASS][4] -> [DMESG-FAIL][5] ([i915#4610]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11051/fi-snb-2520m/igt@i915_selftest@l...@hugepages.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/fi-snb-2520m/igt@i915_selftest@l...@hugepages.html * igt@kms_frontbuffer_tracking@basic: - fi-cml-u2: [PASS][6] -> [DMESG-WARN][7] ([i915#4269]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11051/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html * igt@prime_vgem@basic-userptr: - fi-pnv-d510:NOTRUN -> [SKIP][8] ([fdo#109271]) +57 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/fi-pnv-d510/igt@prime_v...@basic-userptr.html * igt@runner@aborted: - fi-snb-2520m: NOTRUN -> [FAIL][9] ([i915#2426] / [i915#4312]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/fi-snb-2520m/igt@run...@aborted.html Possible fixes * igt@i915_selftest@live@reset: - fi-snb-2600:[DMESG-FAIL][10] ([i915#4610]) -> [PASS][11] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11051/fi-snb-2600/igt@i915_selftest@l...@reset.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/fi-snb-2600/igt@i915_selftest@l...@reset.html Warnings * igt@kms_psr@primary_page_flip: - fi-skl-6600u: [INCOMPLETE][12] ([i915#4547] / [i915#4838]) -> [FAIL][13] ([i915#4547]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11051/fi-skl-6600u/igt@kms_psr@primary_page_flip.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/fi-skl-6600u/igt@kms_psr@primary_page_flip.html * igt@runner@aborted: - fi-skl-6600u: [FAIL][14] ([i915#2722] / [i915#4312]) -> [FAIL][15] ([i915#4312]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11051/fi-skl-6600u/igt@run...@aborted.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/fi-skl-6600u/igt@run...@aborted.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888 [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426 [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722 [i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547 [i915#4610]: https://gitlab.freedesktop.org/drm/intel/issues/4610 [i915#4838]: https://gitlab.freedesktop.org/drm/intel/issues/4838 Build changes - * Linux: CI_DRM_11051 -> Patchwork_21929 CI-20190529: 20190529 CI_DRM_11051: 9b0d7ca3667904f5d5ba802c5d7c840db46de5f6 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6323: 9dbaa0d5be7a859cda9b7d54c20ba96a596f43bd @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_21929: 5f1881f1ab58fdf136e766b319a9cc0bdedab16c @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 5f1881f1ab58 x86/quirks: better wrap quirk conditions 82b222891e10 x86/quirks: Fix logic to apply quirk once == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21929/index.html
[Intel-gfx] [PATCH v2 1/2] x86/quirks: Fix logic to apply quirk once
When using QFLAG_APPLY_ONCE we make sure the quirk is called only once.
This is useful when it's enough one device to trigger a certain
condition or when the resource in each that applies is global to the
system rather than local to the device.
However we call the quirk handler based on vendor, class, and device,
allowing the specific handler to do additional filtering. In that case
check_dev_quirk() may incorrectly mark the quirk as applied when it's
not: the quirk was called, but may not have been applied due to the
additional filter.
This is particularly bad for intel_graphics_quirks() that uses
PCI_ANY_ID and then compares with a long list of devices. This hasn't
been problematic so far because those devices are integrated GPUs and
there can only be one in the system. However as Intel starts to
release discrete cards, this condition is no longer true and we fail to
reserve the stolen memory (for the integrated GPU) depending on the bus
topology: if the traversal finds the discrete card first, for which
there is no system stolen memory, we will fail to reserve it for the
integrated card.
This fixes the stolen memory reservation for an Alderlake-P system with
one additional Intel discrete GPU (DG2 in this case, but applies for
any of them). In this system we have:
- 00:01.0 Bridge
`- 03:00.0 DG2
- 00:02.0 Alderlake-P's integrated GPU
Since we do a depth-first traversal, when we call the handler because of
DG2 we were marking it as already being applied and never reserving the
stolen memory for Alderlake-P.
Since there are just a few quirks using the QFLAG_APPLY_ONCE logic and
that is even the only flag, just use a static local variable in the
quirk function itself. This allows to mark the quirk as applied only
when it really is. As pointed out by Bjorn Helgaas, this is also more in
line with the PCI fixups as done by pci_do_fixups().
Signed-off-by: Lucas De Marchi
---
v2: instead of changing all quirks to return if it was successfully
applied, remove the flag infra and use a static local variable to mark
quirks already applied (suggested by Bjorn Helgaas).
arch/x86/kernel/early-quirks.c | 60 --
1 file changed, 36 insertions(+), 24 deletions(-)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 391a4e2b8604..102ecd0a910e 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -57,12 +57,18 @@ static void __init fix_hypertransport_config(int num, int
slot, int func)
static void __init via_bugs(int num, int slot, int func)
{
#ifdef CONFIG_GART_IOMMU
+ static bool quirk_applied __initdata;
+
+ if (quirk_applied)
+ return;
+
if ((max_pfn > MAX_DMA32_PFN || force_iommu) &&
!gart_iommu_aperture_allowed) {
printk(KERN_INFO
"Looks like a VIA chipset. Disabling IOMMU."
" Override with iommu=allowed\n");
gart_iommu_aperture_disabled = 1;
+ quirk_applied = true;
}
#endif
}
@@ -81,6 +87,11 @@ static void __init nvidia_bugs(int num, int slot, int func)
{
#ifdef CONFIG_ACPI
#ifdef CONFIG_X86_IO_APIC
+ static bool quirk_applied __initdata;
+
+ if (quirk_applied)
+ return;
+
/*
* Only applies to Nvidia root ports (bus 0) and not to
* Nvidia graphics cards with PCI ports on secondary buses.
@@ -105,6 +116,7 @@ static void __init nvidia_bugs(int num, int slot, int func)
"timer override.\n");
printk(KERN_INFO "If you got timer trouble "
"try acpi_use_timer_override\n");
+ quirk_applied = true;
}
#endif
#endif
@@ -559,7 +571,7 @@ static const struct pci_device_id intel_early_ids[]
__initconst = {
struct resource intel_graphics_stolen_res __ro_after_init = DEFINE_RES_MEM(0,
0);
EXPORT_SYMBOL(intel_graphics_stolen_res);
-static void __init
+static bool __init
intel_graphics_stolen(int num, int slot, int func,
const struct intel_early_ops *early_ops)
{
@@ -570,7 +582,7 @@ intel_graphics_stolen(int num, int slot, int func,
base = early_ops->stolen_base(num, slot, func, size);
if (!size || !base)
- return;
+ return false;
end = base + size - 1;
@@ -583,14 +595,20 @@ intel_graphics_stolen(int num, int slot, int func,
/* Mark this space as reserved */
e820__range_add(base, size, E820_TYPE_RESERVED);
e820__update_table(e820_table);
+
+ return true;
}
static void __init intel_graphics_quirks(int num, int slot, int func)
{
+ static bool quirk_applied __initdata;
const struct intel_early_ops *early_ops;
u16 device;
int i;
+ if (quirk_applied)
+ return;
+
device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
for (i = 0;
[Intel-gfx] [PATCH v2 2/2] x86/quirks: better wrap quirk conditions
Remove extra parenthesis and wrap lines so it's easier to read what are
the conditions being checked. The call to the hook also had an extra
indentation: remove here to conform to coding style.
Signed-off-by: Lucas De Marchi
---
arch/x86/kernel/early-quirks.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index 102ecd0a910e..03256f802aba 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -766,14 +766,12 @@ static int __init check_dev_quirk(int num, int slot, int
func)
device = read_pci_config_16(num, slot, func, PCI_DEVICE_ID);
for (i = 0; early_qrk[i].f != NULL; i++) {
- if (((early_qrk[i].vendor == PCI_ANY_ID) ||
- (early_qrk[i].vendor == vendor)) &&
- ((early_qrk[i].device == PCI_ANY_ID) ||
- (early_qrk[i].device == device)) &&
- (!((early_qrk[i].class ^ class) &
- early_qrk[i].class_mask)))
- early_qrk[i].f(num, slot, func);
-
+ if ((early_qrk[i].vendor == PCI_ANY_ID ||
+early_qrk[i].vendor == vendor) &&
+ (early_qrk[i].device == PCI_ANY_ID ||
+early_qrk[i].device == device) &&
+ !((early_qrk[i].class ^ class) & early_qrk[i].class_mask))
+ early_qrk[i].f(num, slot, func);
}
type = read_pci_config_byte(num, slot, func,
--
2.34.1
Re: [Intel-gfx] [PATCH v3 2/6] drm/plane: Fix typo in format_mod_supported documentation
Pushed patches 1 & 2 to drm-misc-next. Thanks for your contribution!
Re: [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: clean up i915_drv.h
On Wed, 05 Jan 2022, Patchwork wrote: > == Series Details == > > Series: drm/i915: clean up i915_drv.h > URL : https://patchwork.freedesktop.org/series/98515/ > State : failure > > == Summary == > > Applying: drm/i915: split out i915_getparam.h from i915_drv.h > Applying: drm/i915: split out i915_cmd_parser.h from i915_drv.h > Applying: drm/i915: split out i915_gem_evict.h from i915_drv.h > Applying: drm/i915: split out gem/i915_gem_userptr.h from i915_drv.h > Applying: drm/i915: split out gem/i915_gem_tiling.h from i915_drv.h > Applying: drm/i915: split out i915_gem.h declarations from i915_drv.h > Applying: drm/i915: split out i915_gem_internal.h from i915_drv.h > error: sha1 information is lacking or useless > (drivers/gpu/drm/i915/i915_drv.h). > error: could not build fake ancestor > hint: Use 'git am --show-current-patch=diff' to see the failed patch > Patch failed at 0007 drm/i915: split out i915_gem_internal.h from i915_drv.h > When you have resolved this problem, run "git am --continue". > If you prefer to skip this patch, run "git am --skip" instead. > To restore the original branch and stop patching, run "git am --abort". Don't know what gives, the series rebases just fine without conflicts. I guess let's review first, and I'll split smaller series for CI because this is going to be painful. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: clean up i915_drv.h
== Series Details == Series: drm/i915: clean up i915_drv.h URL : https://patchwork.freedesktop.org/series/98515/ State : failure == Summary == Applying: drm/i915: split out i915_getparam.h from i915_drv.h Applying: drm/i915: split out i915_cmd_parser.h from i915_drv.h Applying: drm/i915: split out i915_gem_evict.h from i915_drv.h Applying: drm/i915: split out gem/i915_gem_userptr.h from i915_drv.h Applying: drm/i915: split out gem/i915_gem_tiling.h from i915_drv.h Applying: drm/i915: split out i915_gem.h declarations from i915_drv.h Applying: drm/i915: split out i915_gem_internal.h from i915_drv.h error: sha1 information is lacking or useless (drivers/gpu/drm/i915/i915_drv.h). error: could not build fake ancestor hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed at 0007 drm/i915: split out i915_gem_internal.h from i915_drv.h When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To restore the original branch and stop patching, run "git am --abort".
[Intel-gfx] [PATCH 21/21] drm/i915: group drm_i915.h forward declarations together
Do the same as in other files, group forward declarations together near
the top.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 45 +++--
1 file changed, 20 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ddd06b6f5f41..ad7d02bffcfb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -82,6 +82,26 @@
#include "intel_uncore.h"
#include "intel_wopcm.h"
+struct dpll;
+struct drm_i915_gem_object;
+struct drm_i915_private;
+struct intel_atomic_state;
+struct intel_audio_funcs;
+struct intel_cdclk_config;
+struct intel_cdclk_funcs;
+struct intel_cdclk_state;
+struct intel_cdclk_vals;
+struct intel_connector;
+struct intel_crtc;
+struct intel_dp;
+struct intel_encoder;
+struct intel_fbdev;
+struct intel_initial_plane_config;
+struct intel_limit;
+struct intel_overlay;
+struct intel_overlay_error_state;
+struct vlv_s0ix_state;
+
/* General customization:
*/
@@ -90,8 +110,6 @@
#define DRIVER_DATE"20201103"
#define DRIVER_TIMESTAMP 1604406085
-struct drm_i915_gem_object;
-
/* Threshold == 5 for long IRQs, 50 for short */
#define HPD_STORM_DEFAULT_THRESHOLD 50
@@ -141,8 +159,6 @@ struct i915_hotplug {
I915_GEM_DOMAIN_INSTRUCTION | \
I915_GEM_DOMAIN_VERTEX)
-struct drm_i915_private;
-
/* Interface history:
*
* 1.1: Original.
@@ -157,9 +173,6 @@ struct drm_i915_private;
#define DRIVER_MINOR 6
#define DRIVER_PATCHLEVEL 0
-struct intel_overlay;
-struct intel_overlay_error_state;
-
struct sdvo_device_mapping {
u8 initialized;
u8 dvo_port;
@@ -169,18 +182,6 @@ struct sdvo_device_mapping {
u8 ddc_pin;
};
-struct intel_connector;
-struct intel_encoder;
-struct intel_atomic_state;
-struct intel_cdclk_config;
-struct intel_cdclk_funcs;
-struct intel_cdclk_state;
-struct intel_cdclk_vals;
-struct intel_initial_plane_config;
-struct intel_crtc;
-struct intel_limit;
-struct dpll;
-
/* functions used internal in intel_pm.c */
struct drm_i915_clock_gating_funcs {
void (*init_clock_gating)(struct drm_i915_private *dev_priv);
@@ -268,7 +269,6 @@ enum drrs_support_type {
SEAMLESS_DRRS_SUPPORT = 2
};
-struct intel_dp;
struct i915_drrs {
struct mutex mutex;
struct delayed_work work;
@@ -286,8 +286,6 @@ struct i915_drrs {
#define QUIRK_INCREASE_DDI_DISABLED_TIME (1<<7)
#define QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK (1<<8)
-struct intel_fbdev;
-
struct intel_gmbus {
struct i2c_adapter adapter;
#define GMBUS_FORCE_BIT_RETRY (1U << 31)
@@ -306,8 +304,6 @@ struct i915_suspend_saved_registers {
u16 saveGCDGMBUS;
};
-struct vlv_s0ix_state;
-
#define MAX_L3_SLICES 2
struct intel_l3_parity {
u32 *remap_info[MAX_L3_SLICES];
@@ -504,7 +500,6 @@ struct i915_selftest_stash {
};
/* intel_audio.c private */
-struct intel_audio_funcs;
struct intel_audio_private {
/* Display internal audio functions */
const struct intel_audio_funcs *funcs;
--
2.30.2
[Intel-gfx] [PATCH 20/21] drm/i915: fix drm_i915.h include grouping and sorting
Group and sort includes in i915_drv.h similar to other places. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.h | 19 --- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7ceb4b596c1c..ddd06b6f5f41 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -42,10 +42,6 @@ #include #include -#include "i915_params.h" -#include "i915_reg.h" -#include "i915_utils.h" - #include "display/intel_bios.h" #include "display/intel_cdclk.h" #include "display/intel_display.h" @@ -60,9 +56,9 @@ #include "display/intel_opregion.h" #include "gem/i915_gem_context_types.h" +#include "gem/i915_gem_lmem.h" #include "gem/i915_gem_shrinker.h" #include "gem/i915_gem_stolen.h" -#include "gem/i915_gem_lmem.h" #include "gt/intel_engine.h" #include "gt/intel_gt_types.h" @@ -70,6 +66,13 @@ #include "gt/intel_workarounds.h" #include "gt/uc/intel_uc.h" +#include "i915_gem.h" +#include "i915_gpu_error.h" +#include "i915_params.h" +#include "i915_perf_types.h" +#include "i915_reg.h" +#include "i915_scheduler.h" +#include "i915_utils.h" #include "intel_device_info.h" #include "intel_memory_region.h" #include "intel_pch.h" @@ -79,12 +82,6 @@ #include "intel_uncore.h" #include "intel_wopcm.h" -#include "i915_gem.h" -#include "i915_gpu_error.h" -#include "i915_perf_types.h" -#include "i915_scheduler.h" - - /* General customization: */ -- 2.30.2
[Intel-gfx] [PATCH 18/21] drm/i915: include some drm headers only where needed
Include drm_fourcc.h, drm_plane.h, and drm_color_mgmt.h where needed, so we can drop the includes for drm_atomic.h and drm_fourcc.h from i915_drv.h, reducing the build dependencies. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gem/i915_gem_create.c | 2 ++ drivers/gpu/drm/i915/gvt/dmabuf.c | 3 +++ drivers/gpu/drm/i915/i915_drv.h| 2 -- drivers/gpu/drm/i915/i915_pci.c| 1 + 4 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c index 0deff550d324..c6eb023d3d86 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c @@ -3,6 +3,8 @@ * Copyright © 2020 Intel Corporation */ +#include + #include "gem/i915_gem_ioctls.h" #include "gem/i915_gem_lmem.h" #include "gem/i915_gem_region.h" diff --git a/drivers/gpu/drm/i915/gvt/dmabuf.c b/drivers/gpu/drm/i915/gvt/dmabuf.c index 509b6fed0b5b..32d95e2cd51a 100644 --- a/drivers/gpu/drm/i915/gvt/dmabuf.c +++ b/drivers/gpu/drm/i915/gvt/dmabuf.c @@ -31,6 +31,9 @@ #include #include +#include +#include + #include "gem/i915_gem_dmabuf.h" #include "i915_drv.h" diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 30533862c10c..4421bfd3fe2f 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -31,7 +31,6 @@ #define _I915_DRV_H_ #include -#include #include @@ -52,7 +51,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 8261b6455747..b3b72acb76d2 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -22,6 +22,7 @@ * */ +#include #include #include -- 2.30.2
[Intel-gfx] [PATCH 19/21] drm/i915: axe lots of unnecessary includes from i915_drv.h
It's fairly difficult to ensure these are actually not needed due to indirect includes via other files. However, it's easier to add them back as needed and, most importantly, where needed instead of exhaustively proving they're unnecessary. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.h | 18 -- 1 file changed, 18 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4421bfd3fe2f..7ceb4b596c1c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -34,25 +34,12 @@ #include -#include #include #include -#include -#include #include -#include -#include -#include #include -#include -#include -#include -#include -#include -#include #include -#include #include #include "i915_params.h" @@ -90,17 +77,12 @@ #include "intel_runtime_pm.h" #include "intel_step.h" #include "intel_uncore.h" -#include "intel_wakeref.h" #include "intel_wopcm.h" #include "i915_gem.h" -#include "i915_gem_gtt.h" #include "i915_gpu_error.h" #include "i915_perf_types.h" -#include "i915_request.h" #include "i915_scheduler.h" -#include "gt/intel_timeline.h" -#include "i915_vma.h" /* General customization: -- 2.30.2
[Intel-gfx] [PATCH 17/21] drm/i915: include shmem_fs.h only where needed
Don't include shmem_fs.h in i915_drv.h, reducing the build dependencies. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 ++ drivers/gpu/drm/i915/i915_drv.h | 1 - 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c index 3414122245f0..60f962f0c041 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c @@ -5,6 +5,7 @@ */ #include +#include #include #include diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c index 923cc7ad8d70..37a28784992d 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c @@ -3,6 +3,8 @@ * Copyright © 2021 Intel Corporation */ +#include + #include #include diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index f287abb94df2..30533862c10c 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -46,7 +46,6 @@ #include #include #include -#include #include #include -- 2.30.2
[Intel-gfx] [PATCH 16/21] drm/i915: don't include drm_cache.h in i915_drv.h
Include it only in files that use it. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 2 ++ drivers/gpu/drm/i915/gem/i915_gem_context.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_mman.c| 2 ++ drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 ++ drivers/gpu/drm/i915/gem/i915_gem_pages.c | 2 ++ drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 2 ++ drivers/gpu/drm/i915/gt/intel_ring_submission.c | 2 ++ drivers/gpu/drm/i915/gt/intel_timeline.c| 2 ++ drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 ++ drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c| 2 ++ drivers/gpu/drm/i915/i915_cmd_parser.c | 2 ++ drivers/gpu/drm/i915/i915_drv.h | 1 - drivers/gpu/drm/i915/i915_gem.c | 4 +++- drivers/gpu/drm/i915/i915_gpu_error.c | 1 + 14 files changed, 25 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c index 8a248003dfae..ce91b23385cf 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_clflush.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_clflush.c @@ -4,6 +4,8 @@ * Copyright © 2016 Intel Corporation */ +#include + #include "display/intel_frontbuffer.h" #include "i915_drv.h" diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index 77bebaa4fe2e..238c3d7da9a7 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -67,6 +67,7 @@ #include #include +#include #include #include "gt/gen6_ppgtt.h" diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c index aaf970c37aa2..b0e22d3d5b34 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c @@ -9,6 +9,8 @@ #include #include +#include + #include "gt/intel_gt.h" #include "gt/intel_gt_requests.h" diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c index 160431b41fa7..9a478c19c477 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_object.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c @@ -24,6 +24,8 @@ #include +#include + #include "display/intel_frontbuffer.h" #include "pxp/intel_pxp.h" diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c index 89b70f5cde7a..7d4ccde8cf1c 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c @@ -4,6 +4,8 @@ * Copyright © 2014-2016 Intel Corporation */ +#include + #include "i915_drv.h" #include "i915_gem_object.h" #include "i915_scatterlist.h" diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c index cc9fe258fba7..3414122245f0 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_shmem.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_shmem.c @@ -7,6 +7,8 @@ #include #include +#include + #include "gem/i915_gem_region.h" #include "i915_drv.h" #include "i915_gemfs.h" diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c index 40a008d71795..41aacb58d15b 100644 --- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c +++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c @@ -3,6 +3,8 @@ * Copyright © 2008-2021 Intel Corporation */ +#include + #include "gem/i915_gem_internal.h" #include "gen2_engine_cs.h" diff --git a/drivers/gpu/drm/i915/gt/intel_timeline.c b/drivers/gpu/drm/i915/gt/intel_timeline.c index 2962be6d4d00..b9640212d659 100644 --- a/drivers/gpu/drm/i915/gt/intel_timeline.c +++ b/drivers/gpu/drm/i915/gt/intel_timeline.c @@ -3,6 +3,8 @@ * Copyright © 2016-2018 Intel Corporation */ +#include + #include "gem/i915_gem_internal.h" #include "i915_active.h" diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c index 13b27b8ff74e..3d046d690c7b 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c @@ -3,6 +3,8 @@ * Copyright © 2021 Intel Corporation */ +#include + #include "i915_drv.h" #include "intel_guc_slpc.h" #include "gt/intel_gt.h" diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c index a5af05bde6f2..c4aee2b2c86a 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c @@ -5,6 +5,8 @@ #include #include + +#include #include #include "gem/i915_gem_lmem.h" diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index 9c90740520a9..797cfc30827d 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -25,6 +25,8 @@ * */ +#include + #include "gt/intel_engine.h" #include "gt/intel_gpu_commands.h" diff --git a/drivers/gpu/drm/i915/i915_drv.h
[Intel-gfx] [PATCH 14/21] drm/i915: move i915_reset_count()/i915_reset_engine_count() out of i915_drv.h
It doesn't help much, as i915_drv.h includes i915_gpu_error.h, but it's
a step in the right direction.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 11 ---
drivers/gpu/drm/i915/i915_gpu_error.h | 11 +++
2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index aabd4a563a00..784a01dbdf60 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1643,17 +1643,6 @@ static inline void i915_gem_drain_workqueue(struct
drm_i915_private *i915)
drain_workqueue(i915->wq);
}
-static inline u32 i915_reset_count(struct i915_gpu_error *error)
-{
- return atomic_read(>reset_count);
-}
-
-static inline u32 i915_reset_engine_count(struct i915_gpu_error *error,
- const struct intel_engine_cs *engine)
-{
- return atomic_read(>reset_engine_count[engine->uabi_class]);
-}
-
/* i915_gem_tiling.c */
static inline bool i915_gem_object_needs_bit17_swizzle(struct
drm_i915_gem_object *obj)
{
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h
b/drivers/gpu/drm/i915/i915_gpu_error.h
index 5aedf5129814..903d838e2e63 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -210,6 +210,17 @@ struct drm_i915_error_state_buf {
int err;
};
+static inline u32 i915_reset_count(struct i915_gpu_error *error)
+{
+ return atomic_read(>reset_count);
+}
+
+static inline u32 i915_reset_engine_count(struct i915_gpu_error *error,
+ const struct intel_engine_cs *engine)
+{
+ return atomic_read(>reset_engine_count[engine->uabi_class]);
+}
+
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
__printf(2, 3)
--
2.30.2
[Intel-gfx] [PATCH 15/21] drm/i915: split out i915_file_private.h from i915_drv.h
Limit the scope of struct drm_i915_file_private to the files that
actually need it.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 1 +
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 1 +
drivers/gpu/drm/i915/gem/i915_gem_object.c| 1 +
drivers/gpu/drm/i915/gem/i915_gem_throttle.c | 1 +
.../gpu/drm/i915/gem/selftests/mock_context.c | 1 +
drivers/gpu/drm/i915/gt/intel_reset.c | 1 +
drivers/gpu/drm/i915/i915_driver.c| 1 +
drivers/gpu/drm/i915/i915_drv.h | 93 ---
drivers/gpu/drm/i915/i915_file_private.h | 108 ++
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/i915_perf.c | 1 +
11 files changed, 117 insertions(+), 94 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_file_private.h
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index fff09df0009e..77bebaa4fe2e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -79,6 +79,7 @@
#include "pxp/intel_pxp.h"
+#include "i915_file_private.h"
#include "i915_gem_context.h"
#include "i915_trace.h"
#include "i915_user_extensions.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 377aada6269d..c965960d4bcc 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -25,6 +25,7 @@
#include "i915_cmd_parser.h"
#include "i915_drv.h"
+#include "i915_file_private.h"
#include "i915_gem_clflush.h"
#include "i915_gem_context.h"
#include "i915_gem_evict.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 6b719368467e..160431b41fa7 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -28,6 +28,7 @@
#include "pxp/intel_pxp.h"
#include "i915_drv.h"
+#include "i915_file_private.h"
#include "i915_gem_clflush.h"
#include "i915_gem_context.h"
#include "i915_gem_dmabuf.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_throttle.c
b/drivers/gpu/drm/i915/gem/i915_gem_throttle.c
index 75501db71041..af85d0c28168 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_throttle.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_throttle.c
@@ -9,6 +9,7 @@
#include
#include "i915_drv.h"
+#include "i915_file_private.h"
#include "i915_gem_context.h"
#include "i915_gem_ioctls.h"
#include "i915_gem_object.h"
diff --git a/drivers/gpu/drm/i915/gem/selftests/mock_context.c
b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
index c0a8ef368044..6d6082b5f31f 100644
--- a/drivers/gpu/drm/i915/gem/selftests/mock_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/mock_context.c
@@ -4,6 +4,7 @@
* Copyright © 2016 Intel Corporation
*/
+#include "i915_file_private.h"
#include "mock_context.h"
#include "selftests/mock_drm.h"
#include "selftests/mock_gtt.h"
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c
b/drivers/gpu/drm/i915/gt/intel_reset.c
index 7be0002d9d70..a4ad1cd455b9 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -12,6 +12,7 @@
#include "gem/i915_gem_context.h"
#include "i915_drv.h"
+#include "i915_file_private.h"
#include "i915_gpu_error.h"
#include "i915_irq.h"
#include "intel_breadcrumbs.h"
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index a1b5cf212e74..2471b9328f09 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -73,6 +73,7 @@
#include "pxp/intel_pxp_pm.h"
+#include "i915_file_private.h"
#include "i915_debugfs.h"
#include "i915_driver.h"
#include "i915_drv.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 784a01dbdf60..ced8bdde88db 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -48,7 +48,6 @@
#include
#include
#include
-#include
#include
#include
@@ -169,98 +168,6 @@ struct i915_hotplug {
struct drm_i915_private;
-struct drm_i915_file_private {
- struct drm_i915_private *dev_priv;
-
- union {
- struct drm_file *file;
- struct rcu_head rcu;
- };
-
- /** @proto_context_lock: Guards all struct i915_gem_proto_context
-* operations
-*
-* This not only guards @proto_context_xa, but is always held
-* whenever we manipulate any struct i915_gem_proto_context,
-* including finalizing it on first actual use of the GEM context.
-*
-* See i915_gem_proto_context.
-*/
- struct mutex proto_context_lock;
-
- /** @proto_context_xa: xarray of struct i915_gem_proto_context
-*
-* Historically, the context uAPI allowed for two methods of
-* setting context parameters:
[Intel-gfx] [PATCH 12/21] drm/i915: move i915_cache_level_str() static in i915_debugfs.c
Move the function next to the only user.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 11 ---
drivers/gpu/drm/i915/i915_debugfs.c | 11 +++
drivers/gpu/drm/i915/i915_drv.h | 2 --
3 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index bc21d30f7abb..a0d43cfca694 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1228,17 +1228,6 @@ void intel_engine_cancel_stop_cs(struct intel_engine_cs
*engine)
ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));
}
-const char *i915_cache_level_str(struct drm_i915_private *i915, int type)
-{
- switch (type) {
- case I915_CACHE_NONE: return " uncached";
- case I915_CACHE_LLC: return HAS_LLC(i915) ? " LLC" : " snooped";
- case I915_CACHE_L3_LLC: return " L3+LLC";
- case I915_CACHE_WT: return " WT";
- default: return "";
- }
-}
-
static u32
read_subslice_reg(const struct intel_engine_cs *engine,
int slice, int subslice, i915_reg_t reg)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index e0e052cdf8b8..cb99ba0aaa66 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -136,6 +136,17 @@ static const char *stringify_vma_type(const struct
i915_vma *vma)
return "ppgtt";
}
+static const char *i915_cache_level_str(struct drm_i915_private *i915, int
type)
+{
+ switch (type) {
+ case I915_CACHE_NONE: return " uncached";
+ case I915_CACHE_LLC: return HAS_LLC(i915) ? " LLC" : " snooped";
+ case I915_CACHE_L3_LLC: return " L3+LLC";
+ case I915_CACHE_WT: return " WT";
+ default: return "";
+ }
+}
+
void
i915_debugfs_describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
{
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c30e994c9822..3e9aeb51de34 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1677,8 +1677,6 @@ static inline bool
i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_objec
i915_gem_object_is_tiled(obj);
}
-const char *i915_cache_level_str(struct drm_i915_private *i915, int type);
-
/* intel_device_info.c */
static inline struct intel_device_info *
mkwrite_device_info(struct drm_i915_private *dev_priv)
--
2.30.2
[Intel-gfx] [PATCH 13/21] drm/i915: move i915_gem_vm_lookup() where it's used
Move the function next to the only user. Arguably it's perhaps not the
best place, but it's much better than having a static inline in a
header.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gem/i915_gem_context.c | 15 +++
drivers/gpu/drm/i915/i915_drv.h | 14 --
2 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c
b/drivers/gpu/drm/i915/gem/i915_gem_context.c
index ebbac2ea0833..fff09df0009e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
@@ -343,6 +343,21 @@ static int proto_context_register(struct
drm_i915_file_private *fpriv,
return ret;
}
+
+static struct i915_address_space *
+i915_gem_vm_lookup(struct drm_i915_file_private *file_priv, u32 id)
+{
+ struct i915_address_space *vm;
+
+ xa_lock(_priv->vm_xa);
+ vm = xa_load(_priv->vm_xa, id);
+ if (vm)
+ kref_get(>ref);
+ xa_unlock(_priv->vm_xa);
+
+ return vm;
+}
+
static int set_proto_ctx_vm(struct drm_i915_file_private *fpriv,
struct i915_gem_proto_context *pc,
const struct drm_i915_gem_context_param *args)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3e9aeb51de34..aabd4a563a00 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1654,20 +1654,6 @@ static inline u32 i915_reset_engine_count(struct
i915_gpu_error *error,
return atomic_read(>reset_engine_count[engine->uabi_class]);
}
-static inline struct i915_address_space *
-i915_gem_vm_lookup(struct drm_i915_file_private *file_priv, u32 id)
-{
- struct i915_address_space *vm;
-
- xa_lock(_priv->vm_xa);
- vm = xa_load(_priv->vm_xa, id);
- if (vm)
- kref_get(>ref);
- xa_unlock(_priv->vm_xa);
-
- return vm;
-}
-
/* i915_gem_tiling.c */
static inline bool i915_gem_object_needs_bit17_swizzle(struct
drm_i915_gem_object *obj)
{
--
2.30.2
[Intel-gfx] [PATCH 11/21] drm/i915: split out gem/i915_gem_domain.h from i915_drv.h
We already have the gem/i915_gem_domain.c file.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_dpt.c| 4 +++-
drivers/gpu/drm/i915/display/intel_fb_pin.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 5 +++--
drivers/gpu/drm/i915/gem/i915_gem_domain.h | 15 +++
drivers/gpu/drm/i915/i915_drv.h | 3 ---
5 files changed, 22 insertions(+), 6 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_domain.h
diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c
b/drivers/gpu/drm/i915/display/intel_dpt.c
index 8f674745e7e0..2b8e89477f48 100644
--- a/drivers/gpu/drm/i915/display/intel_dpt.c
+++ b/drivers/gpu/drm/i915/display/intel_dpt.c
@@ -3,11 +3,13 @@
* Copyright © 2021 Intel Corporation
*/
+#include "gem/i915_gem_domain.h"
+#include "gt/gen8_ppgtt.h"
+
#include "i915_drv.h"
#include "intel_display_types.h"
#include "intel_dpt.h"
#include "intel_fb.h"
-#include "gt/gen8_ppgtt.h"
struct i915_dpt {
struct i915_address_space vm;
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c
b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 31c15e5fca95..e60046d90124 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -7,6 +7,7 @@
* DOC: display pinning helpers
*/
+#include "gem/i915_gem_domain.h"
#include "gem/i915_gem_object.h"
#include "i915_drv.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 26532c07d467..3e5d6057b3ef 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -9,12 +9,13 @@
#include "i915_drv.h"
#include "i915_gem_clflush.h"
+#include "i915_gem_domain.h"
#include "i915_gem_gtt.h"
#include "i915_gem_ioctls.h"
-#include "i915_gem_object.h"
-#include "i915_vma.h"
#include "i915_gem_lmem.h"
#include "i915_gem_mman.h"
+#include "i915_gem_object.h"
+#include "i915_vma.h"
static bool gpu_write_needs_clflush(struct drm_i915_gem_object *obj)
{
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.h
b/drivers/gpu/drm/i915/gem/i915_gem_domain.h
new file mode 100644
index ..9622df962bfc
--- /dev/null
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef __I915_GEM_DOMAIN_H__
+#define __I915_GEM_DOMAIN_H__
+
+struct drm_i915_gem_object;
+enum i915_cache_level;
+
+int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
+ enum i915_cache_level cache_level);
+
+#endif /* __I915_GEM_DOMAIN_H__ */
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cd74fe21d3c6..c30e994c9822 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1654,9 +1654,6 @@ static inline u32 i915_reset_engine_count(struct
i915_gpu_error *error,
return atomic_read(>reset_engine_count[engine->uabi_class]);
}
-int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
- enum i915_cache_level cache_level);
-
static inline struct i915_address_space *
i915_gem_vm_lookup(struct drm_i915_file_private *file_priv, u32 id)
{
--
2.30.2
[Intel-gfx] [PATCH 10/21] drm/i915: split out gem/i915_gem_create.h from i915_drv.h
We already have the gem/i915_gem_create.c file.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gem/i915_gem_create.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_create.h | 17 +
drivers/gpu/drm/i915/i915_driver.c | 1 +
drivers/gpu/drm/i915/i915_drv.h| 4
4 files changed, 19 insertions(+), 4 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_create.h
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c
b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index 9402d4bf4ffc..0deff550d324 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -9,6 +9,7 @@
#include "pxp/intel_pxp.h"
#include "i915_drv.h"
+#include "i915_gem_create.h"
#include "i915_trace.h"
#include "i915_user_extensions.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.h
b/drivers/gpu/drm/i915/gem/i915_gem_create.h
new file mode 100644
index ..9536aa906001
--- /dev/null
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.h
@@ -0,0 +1,17 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_GEM_CREATE_H__
+#define __I915_GEM_CREATE_H__
+
+struct drm_file;
+struct drm_device;
+struct drm_mode_create_dumb;
+
+int i915_gem_dumb_create(struct drm_file *file_priv,
+struct drm_device *dev,
+struct drm_mode_create_dumb *args);
+
+#endif /* __I915_GEM_CREATE_H__ */
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index 5b9355a73f53..a1b5cf212e74 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -62,6 +62,7 @@
#include "display/intel_vga.h"
#include "gem/i915_gem_context.h"
+#include "gem/i915_gem_create.h"
#include "gem/i915_gem_dmabuf.h"
#include "gem/i915_gem_ioctls.h"
#include "gem/i915_gem_mman.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 50d1fa6c8938..cd74fe21d3c6 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1643,10 +1643,6 @@ static inline void i915_gem_drain_workqueue(struct
drm_i915_private *i915)
drain_workqueue(i915->wq);
}
-int i915_gem_dumb_create(struct drm_file *file_priv,
-struct drm_device *dev,
-struct drm_mode_create_dumb *args);
-
static inline u32 i915_reset_count(struct i915_gpu_error *error)
{
return atomic_read(>reset_count);
--
2.30.2
[Intel-gfx] [PATCH 09/21] drm/i915: split out gem/i915_gem_dmabuf.h from i915_drv.h
We already have the gem/i915_gem_dmabuf.c file.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h | 18 ++
drivers/gpu/drm/i915/gem/i915_gem_object.c | 2 ++
drivers/gpu/drm/i915/gvt/dmabuf.c | 2 ++
drivers/gpu/drm/i915/i915_driver.c | 1 +
drivers/gpu/drm/i915/i915_drv.h| 5 -
6 files changed, 24 insertions(+), 5 deletions(-)
create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index 1b526039a60d..29877894352e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -11,6 +11,7 @@
#include
+#include "gem/i915_gem_dmabuf.h"
#include "i915_drv.h"
#include "i915_gem_object.h"
#include "i915_scatterlist.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
new file mode 100644
index ..6e0405d47ce1
--- /dev/null
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef __I915_GEM_DMABUF_H__
+#define __I915_GEM_DMABUF_H__
+
+struct drm_gem_object;
+struct drm_device;
+struct dma_buf;
+
+struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
+struct dma_buf *dma_buf);
+
+struct dma_buf *i915_gem_prime_export(struct drm_gem_object *gem_obj, int
flags);
+
+#endif /* __I915_GEM_DMABUF_H__ */
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c
b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index d87b508b59b1..6b719368467e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -26,9 +26,11 @@
#include "display/intel_frontbuffer.h"
#include "pxp/intel_pxp.h"
+
#include "i915_drv.h"
#include "i915_gem_clflush.h"
#include "i915_gem_context.h"
+#include "i915_gem_dmabuf.h"
#include "i915_gem_mman.h"
#include "i915_gem_object.h"
#include "i915_gem_ttm.h"
diff --git a/drivers/gpu/drm/i915/gvt/dmabuf.c
b/drivers/gpu/drm/i915/gvt/dmabuf.c
index 8e65cd8258b9..509b6fed0b5b 100644
--- a/drivers/gpu/drm/i915/gvt/dmabuf.c
+++ b/drivers/gpu/drm/i915/gvt/dmabuf.c
@@ -31,6 +31,8 @@
#include
#include
+#include "gem/i915_gem_dmabuf.h"
+
#include "i915_drv.h"
#include "gvt.h"
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index 68017a945b3e..5b9355a73f53 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -62,6 +62,7 @@
#include "display/intel_vga.h"
#include "gem/i915_gem_context.h"
+#include "gem/i915_gem_dmabuf.h"
#include "gem/i915_gem_ioctls.h"
#include "gem/i915_gem_mman.h"
#include "gem/i915_gem_pm.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index cbee09231fdb..50d1fa6c8938 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1661,11 +1661,6 @@ static inline u32 i915_reset_engine_count(struct
i915_gpu_error *error,
int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
enum i915_cache_level cache_level);
-struct drm_gem_object *i915_gem_prime_import(struct drm_device *dev,
- struct dma_buf *dma_buf);
-
-struct dma_buf *i915_gem_prime_export(struct drm_gem_object *gem_obj, int
flags);
-
static inline struct i915_address_space *
i915_gem_vm_lookup(struct drm_i915_file_private *file_priv, u32 id)
{
--
2.30.2
[Intel-gfx] [PATCH 08/21] drm/i915: remove leftover i915_gem_pm.h declarations from i915_drv.h
Remove the duplicates. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/i915_drv.h | 4 drivers/gpu/drm/i915/i915_gem.c | 1 + 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 7afe5b3927a4..cbee09231fdb 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1658,10 +1658,6 @@ static inline u32 i915_reset_engine_count(struct i915_gpu_error *error, return atomic_read(>reset_engine_count[engine->uabi_class]); } -void i915_gem_suspend(struct drm_i915_private *dev_priv); -void i915_gem_suspend_late(struct drm_i915_private *dev_priv); -void i915_gem_resume(struct drm_i915_private *dev_priv); - int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj, enum i915_cache_level cache_level); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 5ef959a9f594..7b66d90318ce 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -44,6 +44,7 @@ #include "gem/i915_gem_context.h" #include "gem/i915_gem_ioctls.h" #include "gem/i915_gem_mman.h" +#include "gem/i915_gem_pm.h" #include "gem/i915_gem_region.h" #include "gem/i915_gem_userptr.h" #include "gt/intel_engine_user.h" -- 2.30.2
[Intel-gfx] [PATCH 07/21] drm/i915: split out i915_gem_internal.h from i915_drv.h
We already have the i915_gem_internal.c file. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_dsb.c | 2 ++ drivers/gpu/drm/i915/display/intel_overlay.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_internal.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_internal.h | 23 +++ .../gpu/drm/i915/gem/selftests/huge_pages.c | 3 ++- .../drm/i915/gem/selftests/i915_gem_context.c | 1 + .../drm/i915/gem/selftests/i915_gem_mman.c| 4 +++- .../drm/i915/gem/selftests/igt_gem_utils.c| 1 + drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 2 ++ drivers/gpu/drm/i915/gt/intel_engine_cs.c | 1 + drivers/gpu/drm/i915/gt/intel_gt.c| 7 +++--- .../gpu/drm/i915/gt/intel_gt_buffer_pool.c| 1 + drivers/gpu/drm/i915/gt/intel_gtt.c | 1 + drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 ++ drivers/gpu/drm/i915/gt/intel_ring.c | 1 + .../gpu/drm/i915/gt/intel_ring_submission.c | 2 ++ drivers/gpu/drm/i915/gt/intel_timeline.c | 3 ++- drivers/gpu/drm/i915/gt/selftest_execlists.c | 1 + drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 1 + drivers/gpu/drm/i915/gt/selftest_lrc.c| 2 ++ drivers/gpu/drm/i915/gt/selftest_migrate.c| 2 ++ drivers/gpu/drm/i915/gt/selftest_rps.c| 2 ++ .../gpu/drm/i915/gt/selftest_workarounds.c| 1 + drivers/gpu/drm/i915/i915_drv.h | 9 drivers/gpu/drm/i915/i915_perf.c | 1 + drivers/gpu/drm/i915/selftests/i915_gem.c | 3 ++- .../gpu/drm/i915/selftests/i915_gem_evict.c | 1 + drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 1 + drivers/gpu/drm/i915/selftests/i915_request.c | 1 + drivers/gpu/drm/i915/selftests/i915_vma.c | 1 + drivers/gpu/drm/i915/selftests/igt_spinner.c | 1 + 31 files changed, 67 insertions(+), 16 deletions(-) create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_internal.h diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index 83a69a4a4fea..b34a67309976 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -4,6 +4,8 @@ * */ +#include "gem/i915_gem_internal.h" + #include "i915_drv.h" #include "intel_de.h" #include "intel_display_types.h" diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c index 1a376e9a1ff3..8a283e7dd6d3 100644 --- a/drivers/gpu/drm/i915/display/intel_overlay.c +++ b/drivers/gpu/drm/i915/display/intel_overlay.c @@ -28,6 +28,7 @@ #include +#include "gem/i915_gem_internal.h" #include "gem/i915_gem_pm.h" #include "gt/intel_gpu_commands.h" #include "gt/intel_ring.h" diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c b/drivers/gpu/drm/i915/gem/i915_gem_internal.c index c5150a1ee3d2..c698f95af15f 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_internal.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.c @@ -10,6 +10,7 @@ #include "i915_drv.h" #include "i915_gem.h" +#include "i915_gem_internal.h" #include "i915_gem_object.h" #include "i915_scatterlist.h" #include "i915_utils.h" diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.h b/drivers/gpu/drm/i915/gem/i915_gem_internal.h new file mode 100644 index ..6664e06112fc --- /dev/null +++ b/drivers/gpu/drm/i915/gem/i915_gem_internal.h @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2022 Intel Corporation + */ + +#ifndef __I915_GEM_INTERNAL_H__ +#define __I915_GEM_INTERNAL_H__ + +#include + +struct drm_i915_gem_object; +struct drm_i915_gem_object_ops; +struct drm_i915_private; + +struct drm_i915_gem_object * +i915_gem_object_create_internal(struct drm_i915_private *i915, + phys_addr_t size); +struct drm_i915_gem_object * +__i915_gem_object_create_internal(struct drm_i915_private *i915, + const struct drm_i915_gem_object_ops *ops, + phys_addr_t size); + +#endif /* __I915_GEM_INTERNAL_H__ */ diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c index 11f0aa65f8a3..6af237aa1854 100644 --- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c +++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c @@ -8,9 +8,10 @@ #include "i915_selftest.h" -#include "gem/i915_gem_region.h" +#include "gem/i915_gem_internal.h" #include "gem/i915_gem_lmem.h" #include "gem/i915_gem_pm.h" +#include "gem/i915_gem_region.h" #include "gt/intel_gt.h" diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c index 3f41fe5ec9d4..3c866a3f74a2 100644 --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c @@ -6,6 +6,7 @@ #include +#include "gem/i915_gem_internal.h" #include "gem/i915_gem_pm.h" #include "gt/intel_engine_pm.h" #include "gt/intel_gt.h" diff
[Intel-gfx] [PATCH 06/21] drm/i915: split out i915_gem.h declarations from i915_drv.h
i915_gem.h should be the place for declarations for i915_gem.c, but
looks like it's filled with all sorts of cruft. Even so, move the
declarations where they belong.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 32 -
drivers/gpu/drm/i915/i915_gem.h | 36 +
2 files changed, 36 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bb48ab725a44..6c5122659b9d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1605,9 +1605,6 @@ intel_vm_no_concurrent_access_wa(struct drm_i915_private
*i915)
}
/* i915_gem.c */
-void i915_gem_init_early(struct drm_i915_private *dev_priv);
-void i915_gem_cleanup_early(struct drm_i915_private *dev_priv);
-
static inline void i915_gem_drain_freed_objects(struct drm_i915_private *i915)
{
/*
@@ -1646,32 +1643,10 @@ static inline void i915_gem_drain_workqueue(struct
drm_i915_private *i915)
drain_workqueue(i915->wq);
}
-struct i915_vma * __must_check
-i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
- struct i915_gem_ww_ctx *ww,
- const struct i915_ggtt_view *view,
- u64 size, u64 alignment, u64 flags);
-
-struct i915_vma * __must_check
-i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
-const struct i915_ggtt_view *view,
-u64 size, u64 alignment, u64 flags);
-
-int i915_gem_object_unbind(struct drm_i915_gem_object *obj,
- unsigned long flags);
-#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
-#define I915_GEM_OBJECT_UNBIND_BARRIER BIT(1)
-#define I915_GEM_OBJECT_UNBIND_TEST BIT(2)
-#define I915_GEM_OBJECT_UNBIND_VM_TRYLOCK BIT(3)
-
-void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv);
-
int i915_gem_dumb_create(struct drm_file *file_priv,
struct drm_device *dev,
struct drm_mode_create_dumb *args);
-int __must_check i915_gem_set_global_seqno(struct drm_device *dev, u32 seqno);
-
static inline u32 i915_reset_count(struct i915_gpu_error *error)
{
return atomic_read(>reset_count);
@@ -1683,17 +1658,10 @@ static inline u32 i915_reset_engine_count(struct
i915_gpu_error *error,
return atomic_read(>reset_engine_count[engine->uabi_class]);
}
-int __must_check i915_gem_init(struct drm_i915_private *dev_priv);
-void i915_gem_driver_register(struct drm_i915_private *i915);
-void i915_gem_driver_unregister(struct drm_i915_private *i915);
-void i915_gem_driver_remove(struct drm_i915_private *dev_priv);
-void i915_gem_driver_release(struct drm_i915_private *dev_priv);
void i915_gem_suspend(struct drm_i915_private *dev_priv);
void i915_gem_suspend_late(struct drm_i915_private *dev_priv);
void i915_gem_resume(struct drm_i915_private *dev_priv);
-int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file);
-
int i915_gem_object_set_cache_level(struct drm_i915_gem_object *obj,
enum i915_cache_level cache_level);
diff --git a/drivers/gpu/drm/i915/i915_gem.h b/drivers/gpu/drm/i915/i915_gem.h
index d0752e5553db..0ebe32dc6e83 100644
--- a/drivers/gpu/drm/i915/i915_gem.h
+++ b/drivers/gpu/drm/i915/i915_gem.h
@@ -27,12 +27,18 @@
#include
#include
+#include
#include
#include "i915_utils.h"
+struct drm_file;
+struct drm_i915_gem_object;
struct drm_i915_private;
+struct i915_gem_ww_ctx;
+struct i915_ggtt_view;
+struct i915_vma;
#ifdef CONFIG_DRM_I915_DEBUG_GEM
@@ -123,4 +129,34 @@ static inline bool __tasklet_is_scheduled(struct
tasklet_struct *t)
return test_bit(TASKLET_STATE_SCHED, >state);
}
+void i915_gem_init_early(struct drm_i915_private *i915);
+void i915_gem_cleanup_early(struct drm_i915_private *i915);
+int __must_check i915_gem_init(struct drm_i915_private *i915);
+void i915_gem_driver_register(struct drm_i915_private *i915);
+void i915_gem_driver_unregister(struct drm_i915_private *i915);
+void i915_gem_driver_remove(struct drm_i915_private *i915);
+void i915_gem_driver_release(struct drm_i915_private *i915);
+int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file);
+
+void i915_gem_runtime_suspend(struct drm_i915_private *i915);
+
+struct i915_vma * __must_check
+i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
+ struct i915_gem_ww_ctx *ww,
+ const struct i915_ggtt_view *view,
+ u64 size, u64 alignment, u64 flags);
+
+struct i915_vma * __must_check
+i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
+const struct i915_ggtt_view *view,
+u64 size, u64 alignment, u64 flags);
+
+#define I915_GEM_OBJECT_UNBIND_ACTIVE BIT(0)
+#define I915_GEM_OBJECT_UNBIND_BARRIER BIT(1)
+#define
[Intel-gfx] [PATCH 02/21] drm/i915: split out i915_cmd_parser.h from i915_drv.h
We already have the i915_cmd_parser.c file. Signed-off-by: Jani Nikula --- .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 1 + drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +- drivers/gpu/drm/i915/i915_cmd_parser.c| 1 + drivers/gpu/drm/i915/i915_cmd_parser.h| 26 +++ drivers/gpu/drm/i915/i915_drv.h | 12 - drivers/gpu/drm/i915/i915_getparam.c | 1 + 6 files changed, 30 insertions(+), 13 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_cmd_parser.h diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c index e9541244027a..62387218d9a6 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c @@ -23,6 +23,7 @@ #include "pxp/intel_pxp.h" +#include "i915_cmd_parser.h" #include "i915_drv.h" #include "i915_gem_clflush.h" #include "i915_gem_context.h" diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c index 352254e001b4..548d599c09dc 100644 --- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c +++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c @@ -7,8 +7,8 @@ #include "gem/i915_gem_context.h" +#include "i915_cmd_parser.h" #include "i915_drv.h" - #include "intel_breadcrumbs.h" #include "intel_context.h" #include "intel_engine.h" diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c index e0403ce9ce69..9c90740520a9 100644 --- a/drivers/gpu/drm/i915/i915_cmd_parser.c +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c @@ -28,6 +28,7 @@ #include "gt/intel_engine.h" #include "gt/intel_gpu_commands.h" +#include "i915_cmd_parser.h" #include "i915_drv.h" #include "i915_memcpy.h" diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.h b/drivers/gpu/drm/i915/i915_cmd_parser.h new file mode 100644 index ..ba70ac6c97cd --- /dev/null +++ b/drivers/gpu/drm/i915/i915_cmd_parser.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2021 Intel Corporation + */ + +#ifndef __I915_CMD_PARSER_H__ +#define __I915_CMD_PARSER_H__ + +#include + +struct drm_i915_private; +struct intel_engine_cs; +struct i915_vma; + +int i915_cmd_parser_get_version(struct drm_i915_private *dev_priv); +int intel_engine_init_cmd_parser(struct intel_engine_cs *engine); +void intel_engine_cleanup_cmd_parser(struct intel_engine_cs *engine); +int intel_engine_cmd_parser(struct intel_engine_cs *engine, + struct i915_vma *batch, + unsigned long batch_offset, + unsigned long batch_length, + struct i915_vma *shadow, + bool trampoline); +#define I915_CMD_PARSER_TRAMPOLINE_SIZE 8 + +#endif /* __I915_CMD_PARSER_H__ */ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index c6a24c6d07b7..5c3a78aa0a7b 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1754,18 +1754,6 @@ u32 i915_gem_fence_alignment(struct drm_i915_private *dev_priv, u32 size, const char *i915_cache_level_str(struct drm_i915_private *i915, int type); -/* i915_cmd_parser.c */ -int i915_cmd_parser_get_version(struct drm_i915_private *dev_priv); -int intel_engine_init_cmd_parser(struct intel_engine_cs *engine); -void intel_engine_cleanup_cmd_parser(struct intel_engine_cs *engine); -int intel_engine_cmd_parser(struct intel_engine_cs *engine, - struct i915_vma *batch, - unsigned long batch_offset, - unsigned long batch_length, - struct i915_vma *shadow, - bool trampoline); -#define I915_CMD_PARSER_TRAMPOLINE_SIZE 8 - /* intel_device_info.c */ static inline struct intel_device_info * mkwrite_device_info(struct drm_i915_private *dev_priv) diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c index 70e634106295..dbe49fd87283 100644 --- a/drivers/gpu/drm/i915/i915_getparam.c +++ b/drivers/gpu/drm/i915/i915_getparam.c @@ -5,6 +5,7 @@ #include "gem/i915_gem_mman.h" #include "gt/intel_engine_user.h" +#include "i915_cmd_parser.h" #include "i915_drv.h" #include "i915_getparam.h" #include "i915_perf.h" -- 2.30.2
[Intel-gfx] [PATCH 05/21] drm/i915: split out gem/i915_gem_tiling.h from i915_drv.h
We already have the gem/i915_gem_tiling.c file. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gem/i915_gem_tiling.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_tiling.h | 18 ++ drivers/gpu/drm/i915/i915_drv.h| 5 - drivers/gpu/drm/i915/i915_vma.c| 2 +- 4 files changed, 20 insertions(+), 6 deletions(-) create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_tiling.h diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c index ef4d0f7dc118..cf324329703f 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.c @@ -12,6 +12,7 @@ #include "i915_gem_ioctls.h" #include "i915_gem_mman.h" #include "i915_gem_object.h" +#include "i915_gem_tiling.h" /** * DOC: buffer object tiling diff --git a/drivers/gpu/drm/i915/gem/i915_gem_tiling.h b/drivers/gpu/drm/i915/gem/i915_gem_tiling.h new file mode 100644 index ..9924196a8139 --- /dev/null +++ b/drivers/gpu/drm/i915/gem/i915_gem_tiling.h @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2022 Intel Corporation + */ + +#ifndef __I915_GEM_TILING_H__ +#define __I915_GEM_TILING_H__ + +#include + +struct drm_i915_private; + +u32 i915_gem_fence_size(struct drm_i915_private *i915, u32 size, + unsigned int tiling, unsigned int stride); +u32 i915_gem_fence_alignment(struct drm_i915_private *i915, u32 size, +unsigned int tiling, unsigned int stride); + +#endif /* __I915_GEM_TILING_H__ */ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9cc3b5b9ec39..bb48ab725a44 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1734,11 +1734,6 @@ static inline bool i915_gem_object_needs_bit17_swizzle(struct drm_i915_gem_objec i915_gem_object_is_tiled(obj); } -u32 i915_gem_fence_size(struct drm_i915_private *dev_priv, u32 size, - unsigned int tiling, unsigned int stride); -u32 i915_gem_fence_alignment(struct drm_i915_private *dev_priv, u32 size, -unsigned int tiling, unsigned int stride); - const char *i915_cache_level_str(struct drm_i915_private *i915, int type); /* intel_device_info.c */ diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c index 09d3424c9270..81a611b7d36f 100644 --- a/drivers/gpu/drm/i915/i915_vma.c +++ b/drivers/gpu/drm/i915/i915_vma.c @@ -26,8 +26,8 @@ #include #include "display/intel_frontbuffer.h" - #include "gem/i915_gem_lmem.h" +#include "gem/i915_gem_tiling.h" #include "gt/intel_engine.h" #include "gt/intel_engine_heartbeat.h" #include "gt/intel_gt.h" -- 2.30.2
[Intel-gfx] [PATCH 04/21] drm/i915: split out gem/i915_gem_userptr.h from i915_drv.h
We already have the gem/i915_gem_userptr.c file. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_userptr.h | 14 ++ drivers/gpu/drm/i915/i915_drv.h | 2 -- drivers/gpu/drm/i915/i915_gem.c | 1 + 4 files changed, 16 insertions(+), 2 deletions(-) create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_userptr.h diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c index 3cc01c30dd62..6d1a71d6404c 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c @@ -42,6 +42,7 @@ #include "i915_drv.h" #include "i915_gem_ioctls.h" #include "i915_gem_object.h" +#include "i915_gem_userptr.h" #include "i915_scatterlist.h" #ifdef CONFIG_MMU_NOTIFIER diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.h b/drivers/gpu/drm/i915/gem/i915_gem_userptr.h new file mode 100644 index ..8dadb2f8436d --- /dev/null +++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2021 Intel Corporation + */ + +#ifndef __I915_GEM_USERPTR_H__ +#define __I915_GEM_USERPTR_H__ + +struct drm_i915_private; + +int i915_gem_init_userptr(struct drm_i915_private *dev_priv); +void i915_gem_cleanup_userptr(struct drm_i915_private *dev_priv); + +#endif /* __I915_GEM_USERPTR_H__ */ diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ceecccfd9ccd..9cc3b5b9ec39 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1605,8 +1605,6 @@ intel_vm_no_concurrent_access_wa(struct drm_i915_private *i915) } /* i915_gem.c */ -int i915_gem_init_userptr(struct drm_i915_private *dev_priv); -void i915_gem_cleanup_userptr(struct drm_i915_private *dev_priv); void i915_gem_init_early(struct drm_i915_private *dev_priv); void i915_gem_cleanup_early(struct drm_i915_private *dev_priv); diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 915bf431f320..5ef959a9f594 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -45,6 +45,7 @@ #include "gem/i915_gem_ioctls.h" #include "gem/i915_gem_mman.h" #include "gem/i915_gem_region.h" +#include "gem/i915_gem_userptr.h" #include "gt/intel_engine_user.h" #include "gt/intel_gt.h" #include "gt/intel_gt_pm.h" -- 2.30.2
[Intel-gfx] [PATCH 03/21] drm/i915: split out i915_gem_evict.h from i915_drv.h
We already have the i915_gem_evicti915.c file.
Signed-off-by: Jani Nikula
---
.../gpu/drm/i915/gem/i915_gem_execbuffer.c| 1 +
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 11 -
drivers/gpu/drm/i915/i915_gem_evict.c | 1 +
drivers/gpu/drm/i915/i915_gem_evict.h | 24 +++
drivers/gpu/drm/i915/i915_gem_gtt.c | 1 +
drivers/gpu/drm/i915/i915_vma.c | 1 +
7 files changed, 29 insertions(+), 11 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_gem_evict.h
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 62387218d9a6..377aada6269d 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -27,6 +27,7 @@
#include "i915_drv.h"
#include "i915_gem_clflush.h"
#include "i915_gem_context.h"
+#include "i915_gem_evict.h"
#include "i915_gem_ioctls.h"
#include "i915_trace.h"
#include "i915_user_extensions.h"
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 15d63435ec4d..4a20ba63446c 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -7,6 +7,7 @@
#include "gem/i915_gem_context.h"
+#include "i915_gem_evict.h"
#include "intel_gt.h"
#include "intel_engine_heartbeat.h"
#include "intel_engine_pm.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5c3a78aa0a7b..ceecccfd9ccd 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1718,17 +1718,6 @@ i915_gem_vm_lookup(struct drm_i915_file_private
*file_priv, u32 id)
return vm;
}
-/* i915_gem_evict.c */
-int __must_check i915_gem_evict_something(struct i915_address_space *vm,
- u64 min_size, u64 alignment,
- unsigned long color,
- u64 start, u64 end,
- unsigned flags);
-int __must_check i915_gem_evict_for_node(struct i915_address_space *vm,
-struct drm_mm_node *node,
-unsigned int flags);
-int i915_gem_evict_vm(struct i915_address_space *vm);
-
/* i915_gem_internal.c */
struct drm_i915_gem_object *
i915_gem_object_create_internal(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.c
b/drivers/gpu/drm/i915/i915_gem_evict.c
index 2b73ddb11c66..24eee0c2055f 100644
--- a/drivers/gpu/drm/i915/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/i915_gem_evict.c
@@ -31,6 +31,7 @@
#include "gt/intel_gt_requests.h"
#include "i915_drv.h"
+#include "i915_gem_evict.h"
#include "i915_trace.h"
I915_SELFTEST_DECLARE(static struct igt_evict_ctl {
diff --git a/drivers/gpu/drm/i915/i915_gem_evict.h
b/drivers/gpu/drm/i915/i915_gem_evict.h
new file mode 100644
index ..d4478b6ad11b
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_gem_evict.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_GEM_EVICT_H__
+#define __I915_GEM_EVICT_H__
+
+#include
+
+struct drm_mm_node;
+struct i915_address_space;
+
+int __must_check i915_gem_evict_something(struct i915_address_space *vm,
+ u64 min_size, u64 alignment,
+ unsigned long color,
+ u64 start, u64 end,
+ unsigned flags);
+int __must_check i915_gem_evict_for_node(struct i915_address_space *vm,
+struct drm_mm_node *node,
+unsigned int flags);
+int i915_gem_evict_vm(struct i915_address_space *vm);
+
+#endif /* __I915_GEM_EVICT_H__ */
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index cd5f2348a187..8a7f0d92b56f 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -20,6 +20,7 @@
#include "gt/intel_gt_requests.h"
#include "i915_drv.h"
+#include "i915_gem_evict.h"
#include "i915_scatterlist.h"
#include "i915_trace.h"
#include "i915_vgpu.h"
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index be208a8f1ed0..09d3424c9270 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -34,6 +34,7 @@
#include "gt/intel_gt_requests.h"
#include "i915_drv.h"
+#include "i915_gem_evict.h"
#include "i915_sw_fence_work.h"
#include "i915_trace.h"
#include "i915_vma.h"
--
2.30.2
[Intel-gfx] [PATCH 01/21] drm/i915: split out i915_getparam.h from i915_drv.h
We already have the i915_getparam.c file.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_driver.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 4
drivers/gpu/drm/i915/i915_getparam.c | 1 +
drivers/gpu/drm/i915/i915_getparam.h | 15 +++
drivers/gpu/drm/i915/i915_ioc32.c| 1 +
5 files changed, 18 insertions(+), 4 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_getparam.h
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index 95174938b160..68017a945b3e 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -74,6 +74,7 @@
#include "i915_debugfs.h"
#include "i915_driver.h"
#include "i915_drv.h"
+#include "i915_getparam.h"
#include "i915_ioc32.h"
#include "i915_irq.h"
#include "i915_memcpy.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3967748ba347..c6a24c6d07b7 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1604,10 +1604,6 @@ intel_vm_no_concurrent_access_wa(struct drm_i915_private
*i915)
return IS_CHERRYVIEW(i915) || intel_ggtt_update_needs_vtd_wa(i915);
}
-/* i915_getparam.c */
-int i915_getparam_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv);
-
/* i915_gem.c */
int i915_gem_init_userptr(struct drm_i915_private *dev_priv);
void i915_gem_cleanup_userptr(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_getparam.c
b/drivers/gpu/drm/i915/i915_getparam.c
index 7f80ad247bc8..70e634106295 100644
--- a/drivers/gpu/drm/i915/i915_getparam.c
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -6,6 +6,7 @@
#include "gt/intel_engine_user.h"
#include "i915_drv.h"
+#include "i915_getparam.h"
#include "i915_perf.h"
int i915_getparam_ioctl(struct drm_device *dev, void *data,
diff --git a/drivers/gpu/drm/i915/i915_getparam.h
b/drivers/gpu/drm/i915/i915_getparam.h
new file mode 100644
index ..18e4752e8f70
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_getparam.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_GETPARAM_H__
+#define __I915_GETPARAM_H__
+
+struct drm_device;
+struct drm_file;
+
+int i915_getparam_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv);
+
+#endif /* __I915_GETPARAM_H__ */
diff --git a/drivers/gpu/drm/i915/i915_ioc32.c
b/drivers/gpu/drm/i915/i915_ioc32.c
index 55b97c3a3dde..33348960f623 100644
--- a/drivers/gpu/drm/i915/i915_ioc32.c
+++ b/drivers/gpu/drm/i915/i915_ioc32.c
@@ -31,6 +31,7 @@
#include
#include "i915_drv.h"
+#include "i915_getparam.h"
#include "i915_ioc32.h"
struct drm_i915_getparam32 {
--
2.30.2
[Intel-gfx] [PATCH 00/21] drm/i915: clean up i915_drv.h
In a long overdue cleanup, split out a bunch of headers and declarations out of i915_drv.h, and reduce includes all over the place. I feel pretty strongly that declarations for functions in some_file.c need to be placed in some_file.h. This does not generally seem to be the case in gem/gt land. I create a number of such files here to place the declarations extracted from i915_drv.h in them. I limit myself to i915_drv.h cleanup here, and leave further cleanup for follow-up. i915_drv.h is a painful file to deal with. Due to the massive amount of headers it includes, and the massive amount of files it gets included from, it basically causes the entire driver to be rebuilt whenever almost any header gets changed in include/linux, include/drm, or i915 itself. Just build and sparse testing each commit takes eons. This series is far from fixing everything, but it moves things forward a few strides. BR, Jani. Jani Nikula (21): drm/i915: split out i915_getparam.h from i915_drv.h drm/i915: split out i915_cmd_parser.h from i915_drv.h drm/i915: split out i915_gem_evict.h from i915_drv.h drm/i915: split out gem/i915_gem_userptr.h from i915_drv.h drm/i915: split out gem/i915_gem_tiling.h from i915_drv.h drm/i915: split out i915_gem.h declarations from i915_drv.h drm/i915: split out i915_gem_internal.h from i915_drv.h drm/i915: remove leftover i915_gem_pm.h declarations from i915_drv.h drm/i915: split out gem/i915_gem_dmabuf.h from i915_drv.h drm/i915: split out gem/i915_gem_create.h from i915_drv.h drm/i915: split out gem/i915_gem_domain.h from i915_drv.h drm/i915: move i915_cache_level_str() static in i915_debugfs.c drm/i915: move i915_gem_vm_lookup() where it's used drm/i915: move i915_reset_count()/i915_reset_engine_count() out of i915_drv.h drm/i915: split out i915_file_private.h from i915_drv.h drm/i915: don't include drm_cache.h in i915_drv.h drm/i915: include shmem_fs.h only where needed drm/i915: include some drm headers only where needed drm/i915: axe lots of unnecessary includes from i915_drv.h drm/i915: fix drm_i915.h include grouping and sorting drm/i915: group drm_i915.h forward declarations together drivers/gpu/drm/i915/display/intel_dpt.c | 4 +- drivers/gpu/drm/i915/display/intel_dsb.c | 2 + drivers/gpu/drm/i915/display/intel_fb_pin.c | 1 + drivers/gpu/drm/i915/display/intel_overlay.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 2 + drivers/gpu/drm/i915/gem/i915_gem_context.c | 17 + drivers/gpu/drm/i915/gem/i915_gem_create.c| 3 + drivers/gpu/drm/i915/gem/i915_gem_create.h| 17 + drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c| 1 + drivers/gpu/drm/i915/gem/i915_gem_dmabuf.h| 18 ++ drivers/gpu/drm/i915/gem/i915_gem_domain.c| 5 +- drivers/gpu/drm/i915/gem/i915_gem_domain.h| 15 + .../gpu/drm/i915/gem/i915_gem_execbuffer.c| 3 + drivers/gpu/drm/i915/gem/i915_gem_internal.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_internal.h | 23 ++ drivers/gpu/drm/i915/gem/i915_gem_mman.c | 2 + drivers/gpu/drm/i915/gem/i915_gem_object.c| 5 + drivers/gpu/drm/i915/gem/i915_gem_pages.c | 2 + drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 3 + drivers/gpu/drm/i915/gem/i915_gem_throttle.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_tiling.c| 1 + drivers/gpu/drm/i915/gem/i915_gem_tiling.h| 18 ++ drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 + drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 1 + drivers/gpu/drm/i915/gem/i915_gem_userptr.h | 14 + .../gpu/drm/i915/gem/selftests/huge_pages.c | 3 +- .../drm/i915/gem/selftests/i915_gem_context.c | 1 + .../drm/i915/gem/selftests/i915_gem_mman.c| 4 +- .../drm/i915/gem/selftests/igt_gem_utils.c| 1 + .../gpu/drm/i915/gem/selftests/mock_context.c | 1 + drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 2 + drivers/gpu/drm/i915/gt/intel_engine_cs.c | 14 +- drivers/gpu/drm/i915/gt/intel_gt.c| 7 +- .../gpu/drm/i915/gt/intel_gt_buffer_pool.c| 1 + drivers/gpu/drm/i915/gt/intel_gtt.c | 1 + drivers/gpu/drm/i915/gt/intel_renderstate.c | 2 + drivers/gpu/drm/i915/gt/intel_reset.c | 1 + drivers/gpu/drm/i915/gt/intel_ring.c | 1 + .../gpu/drm/i915/gt/intel_ring_submission.c | 4 + drivers/gpu/drm/i915/gt/intel_timeline.c | 5 +- drivers/gpu/drm/i915/gt/selftest_execlists.c | 1 + drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 + drivers/gpu/drm/i915/gt/selftest_lrc.c| 2 + drivers/gpu/drm/i915/gt/selftest_migrate.c| 2 + drivers/gpu/drm/i915/gt/selftest_rps.c| 2 + .../gpu/drm/i915/gt/selftest_workarounds.c| 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 2 + drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 2 + drivers/gpu/drm/i915/gvt/dmabuf.c | 5 + drivers/gpu/drm/i915/i915_cmd_parser.c| 3 + drivers/gpu/drm/i915/i915_cmd_parser.h
Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for More preparation for multi gt patches (rev4)
On Wed, Jan 05, 2022 at 07:15:51AM +, Patchwork wrote:
> == Series Details ==
>
> Series: More preparation for multi gt patches (rev4)
> URL : https://patchwork.freedesktop.org/series/98215/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11047_full -> Patchwork_21923_full
>
>
> Summary
> ---
>
> **FAILURE**
>
> Serious unknown changes coming with Patchwork_21923_full absolutely need to
> be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_21923_full, please notify your bug team to allow
> them
> to document this new failure mode, which will reduce false positives in CI.
>
>
>
> Participating hosts (13 -> 12)
> --
>
> Missing(1): shard-dg1
>
> Possible new issues
> ---
>
> Here are the unknown changes that may have been introduced in
> Patchwork_21923_full:
>
> ### IGT changes ###
>
> Possible regressions
>
> * igt@i915_selftest@perf@region:
> - shard-snb: [PASS][1] -> [DMESG-FAIL][2]
>[1]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-snb5/igt@i915_selftest@p...@region.html
>[2]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-snb5/igt@i915_selftest@p...@region.html
Looks to be the same as
https://gitlab.freedesktop.org/drm/intel/-/issues/4610
>
> * igt@kms_plane_alpha_blend@pipe-d-alpha-opaque-fb:
> - shard-tglb: [PASS][3] -> [INCOMPLETE][4]
>[3]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglb7/igt@kms_plane_alpha_bl...@pipe-d-alpha-opaque-fb.html
>[4]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-tglb3/igt@kms_plane_alpha_bl...@pipe-d-alpha-opaque-fb.html
Random system crash / connection loss? Incomplete result doesn't appear
to be related to the series here.
Series applied to drm-intel-gt-next. Thanks for the patches.
Matt
>
>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> * igt@gem_exec_flush@basic-wb-prw-default:
> - {shard-rkl}:[PASS][5] -> [INCOMPLETE][6] +1 similar issue
>[5]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-rkl-2/igt@gem_exec_fl...@basic-wb-prw-default.html
>[6]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-rkl-5/igt@gem_exec_fl...@basic-wb-prw-default.html
>
> * igt@gem_exec_schedule@u-submit-early-slice@bcs0:
> - {shard-tglu}: [PASS][7] -> [INCOMPLETE][8]
>[7]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglu-8/igt@gem_exec_schedule@u-submit-early-sl...@bcs0.html
>[8]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-tglu-7/igt@gem_exec_schedule@u-submit-early-sl...@bcs0.html
>
> * igt@gem_exec_whisper@basic-contexts-forked-all:
> - {shard-rkl}:[PASS][9] -> ([PASS][10], [INCOMPLETE][11])
>[9]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-rkl-1/igt@gem_exec_whis...@basic-contexts-forked-all.html
>[10]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-rkl-4/igt@gem_exec_whis...@basic-contexts-forked-all.html
>[11]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-rkl-5/igt@gem_exec_whis...@basic-contexts-forked-all.html
>
> * igt@i915_pm_dc@dc6-psr:
> - {shard-tglu}: NOTRUN -> [SKIP][12]
>[12]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-tglu-3/igt@i915_pm...@dc6-psr.html
>
> * igt@testdisplay:
> - {shard-tglu}: [PASS][13] -> [DMESG-WARN][14]
>[13]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglu-1/i...@testdisplay.html
>[14]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-tglu-5/i...@testdisplay.html
>
>
> Known issues
>
>
> Here are the changes found in Patchwork_21923_full that come from known
> issues:
>
> ### IGT changes ###
>
> Issues hit
>
> * igt@gem_create@create-massive:
> - shard-tglb: NOTRUN -> [DMESG-WARN][15] ([i915#3002])
>[15]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-tglb6/igt@gem_cre...@create-massive.html
> - shard-skl: NOTRUN -> [DMESG-WARN][16] ([i915#3002])
>[16]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-skl1/igt@gem_cre...@create-massive.html
>
> * igt@gem_eio@in-flight-contexts-10ms:
> - shard-tglb: [PASS][17] -> [TIMEOUT][18] ([i915#3063])
>[17]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglb7/igt@gem_...@in-flight-contexts-10ms.html
>[18]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21923/shard-tglb2/igt@gem_...@in-flight-contexts-10ms.html
>
> * igt@gem_exec_balancer@parallel-contexts:
> - shard-iclb:
Re: [Intel-gfx] [igt-dev] [PATCH i-g-t] tests/i915/userptr: fix mapping type
On Wed, 05 Jan 2022 09:21:06 -0800, Matthew Auld wrote:
>
> We need to use the FIXED mapping type on discrete platforms.
Reviewed-by: Ashutosh Dixit
> Signed-off-by: Matthew Auld
> Cc: Thomas Hellström
> Cc: Priyanka Dandamudi
> ---
> tests/i915/gem_userptr_blits.c | 5 -
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
> index 3464db66..a4dca4c0 100644
> --- a/tests/i915/gem_userptr_blits.c
> +++ b/tests/i915/gem_userptr_blits.c
> @@ -2185,7 +2185,10 @@ static void test_probe(int fd)
>*/
> memset(_offset, 0, sizeof(mmap_offset));
> mmap_offset.handle = gem_create(fd, PAGE_SIZE);
> - mmap_offset.flags = I915_MMAP_OFFSET_WB;
> + if (gem_has_lmem(fd))
> + mmap_offset.flags = I915_MMAP_OFFSET_FIXED;
> + else
> + mmap_offset.flags = I915_MMAP_OFFSET_WB;
> igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET,
> _offset), 0);
>
> for (unsigned long pass = 0; pass < 4 * 4 * 4 * 4 * 4; pass++) {
> --
> 2.31.1
>
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915: don't call free_mmap_offset when purging
== Series Details ==
Series: series starting with [1/4] drm/i915: don't call free_mmap_offset when
purging
URL : https://patchwork.freedesktop.org/series/98509/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11048_full -> Patchwork_21927_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_21927_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21927_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_21927_full:
### IGT changes ###
Possible regressions
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/shard-skl7/igt@i915_susp...@fence-restore-tiled2untiled.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-skl8/igt@i915_susp...@fence-restore-tiled2untiled.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_whisper@basic-fds-priority-all:
- {shard-rkl}:NOTRUN -> [INCOMPLETE][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-rkl-5/igt@gem_exec_whis...@basic-fds-priority-all.html
* igt@gem_exec_whisper@basic-forked-all:
- {shard-rkl}:[PASS][4] -> [INCOMPLETE][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/shard-rkl-1/igt@gem_exec_whis...@basic-forked-all.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-rkl-5/igt@gem_exec_whis...@basic-forked-all.html
* igt@gem_mmap_gtt@close-race:
- {shard-dg1}:NOTRUN -> [SKIP][6] +2 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-dg1-15/igt@gem_mmap_...@close-race.html
* igt@i915_pm_dc@dc5-psr:
- {shard-tglu}: NOTRUN -> [SKIP][7]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-tglu-7/igt@i915_pm...@dc5-psr.html
* igt@i915_pm_rps@waitboost:
- {shard-dg1}:[PASS][8] -> [FAIL][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/shard-dg1-19/igt@i915_pm_...@waitboost.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-dg1-15/igt@i915_pm_...@waitboost.html
* igt@prime_busy@hang-wait@bcs0:
- {shard-tglu}: NOTRUN -> [DMESG-WARN][10]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-tglu-7/igt@prime_busy@hang-w...@bcs0.html
* igt@prime_busy@hang-wait@vcs0:
- {shard-tglu}: NOTRUN -> [INCOMPLETE][11]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-tglu-7/igt@prime_busy@hang-w...@vcs0.html
* igt@prime_busy@hang@bcs0:
- {shard-tglu}: [PASS][12] -> [INCOMPLETE][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/shard-tglu-2/igt@prime_busy@h...@bcs0.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-tglu-7/igt@prime_busy@h...@bcs0.html
* igt@runner@aborted:
- {shard-tglu}: ([FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17])
([i915#3002] / [i915#3690] / [i915#4312]) -> ([FAIL][18], [FAIL][19],
[FAIL][20]) ([i915#3002] / [i915#4312])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/shard-tglu-8/igt@run...@aborted.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/shard-tglu-7/igt@run...@aborted.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/shard-tglu-6/igt@run...@aborted.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/shard-tglu-3/igt@run...@aborted.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-tglu-5/igt@run...@aborted.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-tglu-6/igt@run...@aborted.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-tglu-3/igt@run...@aborted.html
Known issues
Here are the changes found in Patchwork_21927_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][21] ([i915#3002])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/shard-skl4/igt@gem_cre...@create-massive.html
* igt@gem_eio@in-flight-contexts-10ms:
- shard-skl: [PASS][22] -> [TIMEOUT][23] ([i915#3063])
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/shard-skl3/igt@gem_...@in-flight-contexts-10ms.html
[23]:
Re: [Intel-gfx] [PATCH v4 2/4] drm/i915: Use the vma resource as argument for gtt binding / unbinding
Regards, Oak > -Original Message- > From: Thomas Hellström > Sent: January 5, 2022 8:44 AM > To: Zeng, Oak ; intel-gfx@lists.freedesktop.org; > dri-de...@lists.freedesktop.org; Bloomfield, Jon > ; Vetter, Daniel ; Wilson, > Chris P > Cc: Auld, Matthew > Subject: Re: [Intel-gfx] [PATCH v4 2/4] drm/i915: Use the vma resource as > argument for gtt binding / unbinding > > > On 1/4/22 17:07, Thomas Hellström wrote: > > Hi, Oak, > > > > On 1/4/22 16:35, Zeng, Oak wrote: > >> > >> Regards, > >> Oak > >> > >>> -Original Message- > >>> From: Thomas Hellström > >>> Sent: January 4, 2022 3:29 AM > >>> To: Zeng, Oak ; intel-gfx@lists.freedesktop.org; > >>> dri-de...@lists.freedesktop.org > >>> Cc: Auld, Matthew > >>> Subject: Re: [Intel-gfx] [PATCH v4 2/4] drm/i915: Use the vma > >>> resource as argument for gtt binding / unbinding > >>> > >>> Hi, Oak. > >>> > >>> On 1/4/22 00:08, Zeng, Oak wrote: > Regards, > Oak > >>> Looks like your emails always start with "Regards, Oak". a > >>> misconfiguration? > >> My mail client (outlook) is set to automatically add a regards, when > >> I compose new mail or reply email. Not a big problem > >> > >>> > > -Original Message- > > From: Thomas Hellström > > Sent: January 3, 2022 1:58 PM > > To: Zeng, Oak ; > > intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org > > Cc: Auld, Matthew > > Subject: Re: [Intel-gfx] [PATCH v4 2/4] drm/i915: Use the vma > > resource as argument for gtt binding / unbinding > > > > Hi, Oak. > > > > On 1/3/22 19:17, Zeng, Oak wrote: > >> Regards, > >> Oak > >> > >>> -Original Message- > >>> From: Intel-gfx On > >>> Behalf Of Thomas Hellström > >>> Sent: January 3, 2022 7:00 AM > >>> To: intel-gfx@lists.freedesktop.org; > >>> dri-de...@lists.freedesktop.org > >>> Cc: Thomas Hellström ; Auld, > >>> Matthew > >>> Subject: [Intel-gfx] [PATCH v4 2/4] drm/i915: Use the vma > >>> resource as argument for gtt binding / unbinding > >>> > >>> When introducing asynchronous unbinding, the vma itself may no > >>> longer > >>> be alive when the actual binding or unbinding takes place. > >> Can we take an extra reference counter of the vma to keep the vma > >> alive, until the actual binding/unbinding takes place? > > The point here is that that's not needed, and should be avoided. > Can you explain more why "keeping vma alive until unbinding takes > place" should be avoided? > > As I understand it, your series introduce asynchronized unbinding. > But since vma might be no longer alive at the time of unbinding. > >>> To overcome this difficulty, you introduce a vma resource structure > >>> and you guarantee vma resource is alive at bind/unbind time. So > >>> you can use vma resource for the bind/unbind operation. My question > >>> is, can we achieve the asynchronized unbinding still using vma > >>> structure by keeping vma structure alive ( by ref count it). This > >>> way the change should be much smaller (compared to this series). Why > >>> it is harmful to keep the vma alive? Maybe you have other reasons to > >>> introduce vma resource that I don't see. > >>> > >>> When we allow asynchronous unbinding, it's allowed to immediately > >>> rebind > >>> the vma, possibly into the same gpu virtual address, but with different > >>> pages. And when doing that we don't want to block waiting for the > >>> unbind > >>> to execute. > >> Imagine this sequence: > >> > >> 1. Virtual address a1 is bound to physical page p1 > >> 2. Unbind a1 from p1, asynchronous so actual unbind not happen yet > >> 3. bind a1 to physical page p2, page table is changed, now a1 > >> pointing to p2 in page table. > >> 4. #2 now take place now - since in page table, a1 points to p2 now, > >> does a1 point to scratch page after #4? > > > > Here, 3) will also become async, awaiting any pending unbinds in the > > address range provided to 3), in particular, the bind in 3) will await > > 4). See i915_vma_resource_bind_dep_await(), and the discussion on > > whether or not to use an interval tree for this at the start of > > i915_vma_resource.c > > > >> In fact, we could allow a large number of outstanding binds > >>> and unbinds for a vma, which makes the vma structure unsuitable to > >>> track > >>> this, since there will no longer be a single mapping between a set of > >>> active pages and a vma, or a virtual gpu range and a vma. > >> I agree that if pages - vma - virtual gpu range is not 1:1:1 mapping, > >> we need introduce a finer-grained vma resource to for the non-1:1 > >> mapping. I also understand the asynchronous unbinding utilize the > >> virtual address space more effectively. But my feeling is that this > >> non-1:1 mapping makes our program hard to understand and maintain. > >> Since this non- 1:1 mapping is introduced by asynchronous > >> binding/unbinding, maybe the
Re: [Intel-gfx] [RFC 7/7] drm/i915/guc: Print the GuC error capture output register list.
On Tue, 2022-01-04 at 13:56 +, Tvrtko Ursulin wrote: > > > The flow of events are as below: > > > > 1. guc sends notification that an error capture was done and ready to take. > > - at this point we copy the guc error captured dump into an interim > > store > > (larger buffer that can hold multiple captures). > > 2. guc sends notification that a context was reset (after the prior) > > - this triggers a call to i915_gpu_coredump with the corresponding > > engine-mask > >from the context that was reset > > - i915_gpu_coredump proceeds to gather entire gpu state including > > driver state, > >global gpu state, engine state, context vmas and also engine > > registers. For the > >engine registers now call into the guc_capture code which merely > > needs to verify > > that GuC had already done a step 1 and we have data ready to be > > parsed. > > What about the time between the actual reset and receiving the context > reset notification? Latter will contain intel_context->guc_id - can that > be re-assigned or "retired" in between the two and so cause problems for > matching the correct (or any) vmas? > Not it cannot because its only after the context reset notification that i915 starts taking action against that cotnext - and even that happens after the i915_gpu_codedump (engine-mask-of-context) happens. That's what i've observed in the code flow. > Regards, > > Tvrtko
Re: [Intel-gfx] [PATCH] drm/i915: stop including i915_irq.h from i915_drv.h
On Wed, 05 Jan 2022, Tvrtko Ursulin wrote: > On 05/01/2022 10:21, Jani Nikula wrote: >> Only include i915_irq.h where actually needed. >> >> Signed-off-by: Jani Nikula > > Acked-by: Tvrtko Ursulin Thanks, pushed to drm-intel-next. BR, Jani. > > Regards, > > Tvrtko > >> --- >> drivers/gpu/drm/i915/display/intel_crtc.c | 1 + >> drivers/gpu/drm/i915/display/intel_display_trace.h | 1 + >> drivers/gpu/drm/i915/gt/intel_rps.c| 1 + >> drivers/gpu/drm/i915/gt/uc/intel_guc.c | 1 + >> drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 1 + >> drivers/gpu/drm/i915/i915_drv.h| 1 - >> 6 files changed, 5 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c >> b/drivers/gpu/drm/i915/display/intel_crtc.c >> index 16c3ca66d9f0..08ee3e17ee5c 100644 >> --- a/drivers/gpu/drm/i915/display/intel_crtc.c >> +++ b/drivers/gpu/drm/i915/display/intel_crtc.c >> @@ -12,6 +12,7 @@ >> #include >> #include >> >> +#include "i915_irq.h" >> #include "i915_vgpu.h" >> #include "i9xx_plane.h" >> #include "icl_dsi.h" >> diff --git a/drivers/gpu/drm/i915/display/intel_display_trace.h >> b/drivers/gpu/drm/i915/display/intel_display_trace.h >> index 4043e1276383..f05f0f9b5103 100644 >> --- a/drivers/gpu/drm/i915/display/intel_display_trace.h >> +++ b/drivers/gpu/drm/i915/display/intel_display_trace.h >> @@ -13,6 +13,7 @@ >> #include >> >> #include "i915_drv.h" >> +#include "i915_irq.h" >> #include "intel_crtc.h" >> #include "intel_display_types.h" >> >> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c >> b/drivers/gpu/drm/i915/gt/intel_rps.c >> index 54e7df788dbf..bd35e45d3aaa 100644 >> --- a/drivers/gpu/drm/i915/gt/intel_rps.c >> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c >> @@ -6,6 +6,7 @@ >> #include >> >> #include "i915_drv.h" >> +#include "i915_irq.h" >> #include "intel_breadcrumbs.h" >> #include "intel_gt.h" >> #include "intel_gt_clock_utils.h" >> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c >> b/drivers/gpu/drm/i915/gt/uc/intel_guc.c >> index 6e228343e8cb..0c52d1652e8b 100644 >> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c >> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c >> @@ -12,6 +12,7 @@ >> #include "intel_guc_ads.h" >> #include "intel_guc_submission.h" >> #include "i915_drv.h" >> +#include "i915_irq.h" >> >> /** >>* DOC: GuC >> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c >> b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c >> index ac0931f0374b..7b0b43e87244 100644 >> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c >> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c >> @@ -7,6 +7,7 @@ >> >> #include "gt/intel_gt.h" >> #include "i915_drv.h" >> +#include "i915_irq.h" >> #include "i915_memcpy.h" >> #include "intel_guc_log.h" >> >> diff --git a/drivers/gpu/drm/i915/i915_drv.h >> b/drivers/gpu/drm/i915/i915_drv.h >> index beeb42a14aae..3967748ba347 100644 >> --- a/drivers/gpu/drm/i915/i915_drv.h >> +++ b/drivers/gpu/drm/i915/i915_drv.h >> @@ -106,7 +106,6 @@ >> #include "i915_scheduler.h" >> #include "gt/intel_timeline.h" >> #include "i915_vma.h" >> -#include "i915_irq.h" >> >> >> /* General customization: >> -- Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] [PATCH i-g-t] tests/i915/userptr: fix mapping type
We need to use the FIXED mapping type on discrete platforms.
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
Cc: Priyanka Dandamudi
---
tests/i915/gem_userptr_blits.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 3464db66..a4dca4c0 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -2185,7 +2185,10 @@ static void test_probe(int fd)
*/
memset(_offset, 0, sizeof(mmap_offset));
mmap_offset.handle = gem_create(fd, PAGE_SIZE);
- mmap_offset.flags = I915_MMAP_OFFSET_WB;
+ if (gem_has_lmem(fd))
+ mmap_offset.flags = I915_MMAP_OFFSET_FIXED;
+ else
+ mmap_offset.flags = I915_MMAP_OFFSET_WB;
igt_assert_eq(igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET,
_offset), 0);
for (unsigned long pass = 0; pass < 4 * 4 * 4 * 4 * 4; pass++) {
--
2.31.1
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: don't call free_mmap_offset when purging
== Series Details == Series: series starting with [1/4] drm/i915: don't call free_mmap_offset when purging URL : https://patchwork.freedesktop.org/series/98509/ State : success == Summary == CI Bug Log - changes from CI_DRM_11048 -> Patchwork_21927 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/index.html Participating hosts (46 -> 37) -- Additional (1): fi-icl-u2 Missing(10): bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-pnv-d510 bat-rpls-1 fi-bdw-samus bat-jsl-2 bat-jsl-1 Known issues Here are the changes found in Patchwork_21927 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_basic@cs-gfx: - fi-hsw-4770:NOTRUN -> [SKIP][1] ([fdo#109271] / [fdo#109315]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-hsw-4770/igt@amdgpu/amd_ba...@cs-gfx.html * igt@amdgpu/amd_cs_nop@fork-gfx0: - fi-icl-u2: NOTRUN -> [SKIP][2] ([fdo#109315]) +17 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-icl-u2/igt@amdgpu/amd_cs_...@fork-gfx0.html * igt@amdgpu/amd_cs_nop@sync-fork-compute0: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271]) +9 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-kbl-soraka/igt@amdgpu/amd_cs_...@sync-fork-compute0.html * igt@gem_huc_copy@huc-copy: - fi-skl-6600u: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-skl-6600u/igt@gem_huc_c...@huc-copy.html - fi-icl-u2: NOTRUN -> [SKIP][5] ([i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-icl-u2/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-icl-u2: NOTRUN -> [SKIP][6] ([i915#4613]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-icl-u2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-skl-6600u: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-skl-6600u/igt@gem_lmem_swapp...@verify-random.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-icl-u2: NOTRUN -> [SKIP][8] ([fdo#111827]) +8 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_chamelium@vga-edid-read: - fi-skl-6600u: NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827]) +8 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-skl-6600u/igt@kms_chamel...@vga-edid-read.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-icl-u2: NOTRUN -> [SKIP][10] ([fdo#109278]) +2 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html - fi-skl-6600u: NOTRUN -> [SKIP][11] ([fdo#109271]) +2 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-skl-6600u/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - fi-icl-u2: NOTRUN -> [SKIP][12] ([fdo#109285]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-icl-u2/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-skl-6600u: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#533]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-skl-6600u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html * igt@kms_psr@primary_page_flip: - fi-skl-6600u: NOTRUN -> [FAIL][14] ([i915#4547]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-skl-6600u/igt@kms_psr@primary_page_flip.html * igt@prime_vgem@basic-userptr: - fi-icl-u2: NOTRUN -> [SKIP][15] ([i915#3301]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-icl-u2/igt@prime_v...@basic-userptr.html * igt@runner@aborted: - fi-skl-6600u: NOTRUN -> [FAIL][16] ([i915#4312]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-skl-6600u/igt@run...@aborted.html Possible fixes * igt@gem_flink_basic@bad-flink: - fi-skl-6600u: [INCOMPLETE][17] ([i915#4547]) -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11048/fi-skl-6600u/igt@gem_flink_ba...@bad-flink.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21927/fi-skl-6600u/igt@gem_flink_ba...@bad-flink.html * igt@i915_selftest@live@hangcheck: - fi-hsw-4770:
Re: [Intel-gfx] [PATCH] drm/i915: Lock timeline mutex directly in error path of eb_pin_timeline
On Wed, Jan 05, 2022 at 09:35:44AM +, Tvrtko Ursulin wrote:
>
> On 04/01/2022 23:30, Matthew Brost wrote:
> > Don't use the interruptable version of the timeline mutex lock in the
>
> interruptible
>
> > error path of eb_pin_timeline as the cleanup must always happen.
> >
> > v2:
> > (John Harrison)
> >- Don't check for interrupt during mutex lock
> >
> > Fixes: 544460c33821 ("drm/i915: Multi-BB execbuf")
> > Signed-off-by: Matthew Brost
> > ---
> > drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > index e9541244027a..e96e133cbb1f 100644
> > --- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > +++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
> > @@ -2516,9 +2516,9 @@ static int eb_pin_timeline(struct i915_execbuffer
> > *eb, struct intel_context *ce,
> > timeout) < 0) {
> > i915_request_put(rq);
> > - tl = intel_context_timeline_lock(ce);
> > + mutex_lock(>timeline->mutex);
>
> On the other hand it is more user friendly to handle signals (which maybe
> does not matter in this case, not sure any longer how long hold time it can
> have) but there is also a question of consistency within the very function
> you are changing.
>
> Apart from consistency, what about the parent-child magic
> intel_context_timeline_lock does and you wouldn't have here?
>
> And what about the very existence of intel_context_timeline_lock as a
> component boundary separation API, if it is used inconsistently throughout
> i915_gem_execbuffer.c?
intel_context_timeline_lock does 2 things:
1. Handles lockdep nesting of timeline locks for parent-child contexts
ensuring locks are acquired from parent to last child, then released
last child to parent
2. Allows the mutex lock to be interrupted
This helper should be used in setup steps where a user can signal abort
(context pinning time + request creation time), by 'should be' I mean
this was how it was done before I extended the execbuf IOCTL for
multiple BBs. Slightly confusing but this is what was in place so I
stuck with it.
This code here is an error path that only hold at most 1 timeline lock
(no nesting required) and is a path that must be executed as it is a
cleanup step (not allowed to be interrupted by user, intel_context_exit
must be called or we have dangling engine PM refs).
Make sense? I probably should update the comment message to explain this
a bit better as it did take me a bit to understand how this locking
worked.
Matt
>
> Regards,
>
> Tvrtko
>
> > intel_context_exit(ce);
> > - intel_context_timeline_unlock(tl);
> > + mutex_unlock(>timeline->mutex);
> > if (nonblock)
> > return -EWOULDBLOCK;
> >
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: don't call free_mmap_offset when purging
== Series Details == Series: series starting with [1/4] drm/i915: don't call free_mmap_offset when purging URL : https://patchwork.freedesktop.org/series/98509/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5198a35603a2 drm/i915: don't call free_mmap_offset when purging -:22: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line) #22: <4> [749.062928] CPU: 0 PID: 1643 Comm: gem_madvise Tainted: G U W 5.16.0-rc8-CI-CI_DRM_11046+ #1 total: 0 errors, 1 warnings, 0 checks, 7 lines checked d478a7195b96 drm/i915/ttm: only fault WILLNEED objects 62769350a16a drm/i915/ttm: ensure we unmap when purging c6d2e5c11332 drm/i915/ttm: ensure we unmap when shrinking
Re: [Intel-gfx] [PATCH 1/4] drm/i915: don't call free_mmap_offset when purging
On Wed, 2022-01-05 at 16:03 +, Matthew Auld wrote:
> On 05/01/2022 15:46, Thomas Hellström wrote:
> > On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
> > > The TTM backend is in theory the only user here(also purge should
> > > only
> > > be called once we have dropped the pages), where it is setup at
> > > object
> > > creation and is only removed once the object is destroyed. Also
> > > resetting the node here might be iffy since the ttm fault handler
> > > uses the stored fake offset to determine the page offset within
> > > the
> > > pages
> > > array.
> > >
> > > This also blows up in the dontneed-before-mmap test, since the
> > > expectation is that the vma_node will live on, until the object
> > > is
> > > destroyed:
> > >
> > > <2> [749.062902] kernel BUG at
> > > drivers/gpu/drm/i915/gem/i915_gem_ttm.c:943!
> > > <4> [749.062923] invalid opcode: [#1] PREEMPT SMP NOPTI
> > > <4> [749.062928] CPU: 0 PID: 1643 Comm: gem_madvise Tainted:
> > > G U
> > > W 5.16.0-rc8-CI-CI_DRM_11046+ #1
> > > <4> [749.062933] Hardware name: Gigabyte Technology Co., Ltd. GB-
> > > Z390
> > > Garuda/GB-Z390 Garuda-CF, BIOS IG1c 11/19/2019
> > > <4> [749.062937] RIP: 0010:i915_ttm_mmap_offset.cold.35+0x5b/0x5d
> > > [i915]
> > > <4> [749.063044] Code: 00 48 c7 c2 a0 23 4e a0 48 c7 c7 26 df 4a
> > > a0
> > > e8 95 1d d0 e0 bf 01 00 00 00 e8 8b ec cf e0 31 f6 bf 09 00 00 00
> > > e8
> > > 5f 30 c0 e0 <0f> 0b 48 c7 c1 24 4b 56 a0 ba 5b 03 00 00 48 c7 c6
> > > c0
> > > 23 4e a0 48
> > > <4> [749.063052] RSP: 0018:c90002ab7d38 EFLAGS: 00010246
> > > <4> [749.063056] RAX: 0240 RBX: 88811f2e61c0 RCX:
> > > 0006
> > > <4> [749.063060] RDX: RSI: RDI:
> > > 0009
> > > <4> [749.063063] RBP: c90002ab7e58 R08: 0001 R09:
> > > 0001
> > > <4> [749.063067] R10: 0123d0f8 R11: c90002ab7b20 R12:
> > > 888112a1a000
> > > <4> [749.063071] R13: 0004 R14: 88811f2e61c0 R15:
> > > 888112a1a000
> > > <4> [749.063074] FS: 7f6e5fcad500()
> > > GS:8884ad60() knlGS:
> > > <4> [749.063078] CS: 0010 DS: ES: CR0:
> > > 80050033
> > > <4> [749.063081] CR2: 7efd264e39f0 CR3: 000115fd6005 CR4:
> > > 003706f0
> > > <4> [749.063085] Call Trace:
> > > <4> [749.063087]
> > > <4> [749.063089] __assign_mmap_offset+0x41/0x300 [i915]
> > > <4> [749.063171] __assign_mmap_offset_handle+0x159/0x270 [i915]
> > > <4> [749.063248] ? i915_gem_dumb_mmap_offset+0x70/0x70 [i915]
> > > <4> [749.063325] drm_ioctl_kernel+0xae/0x140
> > > <4> [749.063330] drm_ioctl+0x201/0x3d0
> > > <4> [749.06] ? i915_gem_dumb_mmap_offset+0x70/0x70 [i915]
> > > <4> [749.063409] ? do_user_addr_fault+0x200/0x670
> > > <4> [749.063415] __x64_sys_ioctl+0x6d/0xa0
> > > <4> [749.063419] do_syscall_64+0x3a/0xb0
> > > <4> [749.063423] entry_SYSCALL_64_after_hwframe+0x44/0xae
> > > <4> [749.063428] RIP: 0033:0x7f6e5f100317
> > >
> > > Testcase: igt@gem_madvise@dontneed-before-mmap
> > > Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm
> > > bo's.")
> > > Signed-off-by: Matthew Auld
> > > Cc: Thomas Hellström
> > > ---
> > > drivers/gpu/drm/i915/gem/i915_gem_pages.c | 1 -
> > > 1 file changed, 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > > b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > > index 89b70f5cde7a..9f429ed6e78a 100644
> > > --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> > > @@ -161,7 +161,6 @@ int i915_gem_object_pin_pages_unlocked(struct
> > > drm_i915_gem_object *obj)
> > > /* Immediately discard the backing storage */
> > > int i915_gem_object_truncate(struct drm_i915_gem_object *obj)
> > > {
> > > - drm_gem_free_mmap_offset(>base);
> >
> > What happens if a non-ttm shmem system object gets truncated from
> > the
> > shrinker and then tries to use the above mmap offset?
>
> AFAIK nothing on integrated is really using this. The mmap_offset
> ioctl
> stuff is managing multiple vma nodes itself, per object(one for each
> cache type/mapping or something), and so doesn't use this. And the
> shmem
> mmap ioctl doesn't use the any fake offset stuff, AFAIK.
OK, then
Reviewed-by: Thomas Hellström
>
> >
> > /Thomas
> >
> >
> >
> > > if (obj->ops->truncate)
> > > return obj->ops->truncate(obj);
> > >
> >
> >
Re: [Intel-gfx] [PATCH v5 4/6] drm/i915: Use vma resources for async unbinding
On Wed, 2022-01-05 at 15:52 +, Matthew Auld wrote:
> On 04/01/2022 12:51, Thomas Hellström wrote:
> > Implement async (non-blocking) unbinding by not syncing the vma
> > before
> > calling unbind on the vma_resource.
> > Add the resulting unbind fence to the object's dma_resv from where
> > it is
> > picked up by the ttm migration code.
> > Ideally these unbind fences should be coalesced with the migration
> > blit
> > fence to avoid stalling the migration blit waiting for unbind, as
> > they
> > can certainly go on in parallel, but since we don't yet have a
> > reasonable data structure to use to coalesce fences and attach the
> > resulting fence to a timeline, we defer that for now.
> >
> > Note that with async unbinding, even while the unbind waits for the
> > preceding bind to complete before unbinding, the vma itself might
> > have been
> > destroyed in the process, clearing the vma pages. Therefore we can
> > only allow async unbinding if we have a refcounted sg-list and keep
> > a
> > refcount on that for the vma resource pages to stay intact until
> > binding occurs. If this condition is not met, a request for an
> > async
> > unbind is diverted to a sync unbind.
> >
> > v2:
> > - Use a separate kmem_cache for vma resources for now to isolate
> > their
> > memory allocation and aid debugging.
> > - Move the check for vm closed to the actual unbinding thread.
> > Regardless
> > of whether the vm is closed, we need the unbind fence to
> > properly wait
> > for capture.
> > - Clear vma_res::vm on unbind and update its documentation.
> > v4:
> > - Take cache coloring into account when searching for vma resources
> > pending unbind. (Matthew Auld)
> > v5:
> > - Fix timeout and error check in
> > i915_vma_resource_bind_dep_await().
> > - Avoid taking a reference on the object for async binding if
> > async unbind capable.
> > - Fix braces around a single-line if statement.
> >
> > Signed-off-by: Thomas Hellström
>
>
>
> > @@ -434,12 +439,30 @@ int i915_vma_bind(struct i915_vma *vma,
> >
> > bind_flags &= ~vma_flags;
> > if (bind_flags == 0) {
> > - kfree(vma_res);
> > + i915_vma_resource_free(vma_res);
> > return 0;
> > }
> >
> > GEM_BUG_ON(!atomic_read(>pages_count));
> >
> > + /* Wait for or await async unbinds touching our range */
> > + if (work && bind_flags & vma->vm->bind_async_flags)
> > + ret = i915_vma_resource_bind_dep_await(vma->vm,
> > +
> > >base.chain,
> > + vma-
> > >node.start,
> > + vma-
> > >node.size,
> > + true,
> > + GFP_NOWAIT |
> > +
> > __GFP_RETRY_MAYFAIL |
> > +
> > __GFP_NOWARN);
> > + else
> > + ret = i915_vma_resource_bind_dep_sync(vma->vm, vma-
> > >node.start,
> > + vma-
> > >node.size, true);
> > + if (ret) {
> > + i915_vma_resource_free(vma_res);
> > + return ret;
> > + }
> > +
> > if (vma->resource || !vma_res) {
> > /* Rebinding with an additional I915_VMA_*_BIND */
> > GEM_WARN_ON(!vma_flags);
> > @@ -452,9 +475,11 @@ int i915_vma_bind(struct i915_vma *vma,
> > if (work && bind_flags & vma->vm->bind_async_flags) {
> > struct dma_fence *prev;
> >
> > - work->vma = vma;
> > + work->vma_res = i915_vma_resource_get(vma-
> > >resource);
> > work->cache_level = cache_level;
> > work->flags = bind_flags;
> > + if (vma->obj->mm.rsgt)
> > + work->rsgt = i915_refct_sgt_get(vma->obj-
> > >mm.rsgt);
>
> Hmmm, at a glance I would have expected this to use the vma->pages. I
> think with the GGTT the vma will often create its own sg layout which
> !=
> obj->mm.sgt. IIUC the async unbind will still call vma_unbind_pages
> which might nuke the vma sgt? Or is something else going on here?
>
Yes, the binding code is only using vma_res->pages, which should have
been copied from vma->pages, and keeps a reference to the rsgt just in
case we do an async unbind.
However good point we should refuse async unbind for now if vma_res-
>pages != >table, because the former might otherwise be nuked
before the async unbind actually happens. Will fix that for next
version.
/Thomas
Re: [Intel-gfx] [PATCH 1/4] drm/i915: don't call free_mmap_offset when purging
On 05/01/2022 15:46, Thomas Hellström wrote:
On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
The TTM backend is in theory the only user here(also purge should
only
be called once we have dropped the pages), where it is setup at
object
creation and is only removed once the object is destroyed. Also
resetting the node here might be iffy since the ttm fault handler
uses the stored fake offset to determine the page offset within the
pages
array.
This also blows up in the dontneed-before-mmap test, since the
expectation is that the vma_node will live on, until the object is
destroyed:
<2> [749.062902] kernel BUG at
drivers/gpu/drm/i915/gem/i915_gem_ttm.c:943!
<4> [749.062923] invalid opcode: [#1] PREEMPT SMP NOPTI
<4> [749.062928] CPU: 0 PID: 1643 Comm: gem_madvise Tainted: G U
W 5.16.0-rc8-CI-CI_DRM_11046+ #1
<4> [749.062933] Hardware name: Gigabyte Technology Co., Ltd. GB-Z390
Garuda/GB-Z390 Garuda-CF, BIOS IG1c 11/19/2019
<4> [749.062937] RIP: 0010:i915_ttm_mmap_offset.cold.35+0x5b/0x5d
[i915]
<4> [749.063044] Code: 00 48 c7 c2 a0 23 4e a0 48 c7 c7 26 df 4a a0
e8 95 1d d0 e0 bf 01 00 00 00 e8 8b ec cf e0 31 f6 bf 09 00 00 00 e8
5f 30 c0 e0 <0f> 0b 48 c7 c1 24 4b 56 a0 ba 5b 03 00 00 48 c7 c6 c0
23 4e a0 48
<4> [749.063052] RSP: 0018:c90002ab7d38 EFLAGS: 00010246
<4> [749.063056] RAX: 0240 RBX: 88811f2e61c0 RCX:
0006
<4> [749.063060] RDX: RSI: RDI:
0009
<4> [749.063063] RBP: c90002ab7e58 R08: 0001 R09:
0001
<4> [749.063067] R10: 0123d0f8 R11: c90002ab7b20 R12:
888112a1a000
<4> [749.063071] R13: 0004 R14: 88811f2e61c0 R15:
888112a1a000
<4> [749.063074] FS: 7f6e5fcad500()
GS:8884ad60() knlGS:
<4> [749.063078] CS: 0010 DS: ES: CR0: 80050033
<4> [749.063081] CR2: 7efd264e39f0 CR3: 000115fd6005 CR4:
003706f0
<4> [749.063085] Call Trace:
<4> [749.063087]
<4> [749.063089] __assign_mmap_offset+0x41/0x300 [i915]
<4> [749.063171] __assign_mmap_offset_handle+0x159/0x270 [i915]
<4> [749.063248] ? i915_gem_dumb_mmap_offset+0x70/0x70 [i915]
<4> [749.063325] drm_ioctl_kernel+0xae/0x140
<4> [749.063330] drm_ioctl+0x201/0x3d0
<4> [749.06] ? i915_gem_dumb_mmap_offset+0x70/0x70 [i915]
<4> [749.063409] ? do_user_addr_fault+0x200/0x670
<4> [749.063415] __x64_sys_ioctl+0x6d/0xa0
<4> [749.063419] do_syscall_64+0x3a/0xb0
<4> [749.063423] entry_SYSCALL_64_after_hwframe+0x44/0xae
<4> [749.063428] RIP: 0033:0x7f6e5f100317
Testcase: igt@gem_madvise@dontneed-before-mmap
Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 89b70f5cde7a..9f429ed6e78a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -161,7 +161,6 @@ int i915_gem_object_pin_pages_unlocked(struct
drm_i915_gem_object *obj)
/* Immediately discard the backing storage */
int i915_gem_object_truncate(struct drm_i915_gem_object *obj)
{
- drm_gem_free_mmap_offset(>base);
What happens if a non-ttm shmem system object gets truncated from the
shrinker and then tries to use the above mmap offset?
AFAIK nothing on integrated is really using this. The mmap_offset ioctl
stuff is managing multiple vma nodes itself, per object(one for each
cache type/mapping or something), and so doesn't use this. And the shmem
mmap ioctl doesn't use the any fake offset stuff, AFAIK.
/Thomas
if (obj->ops->truncate)
return obj->ops->truncate(obj);
Re: [Intel-gfx] [PATCH v5 4/6] drm/i915: Use vma resources for async unbinding
On 04/01/2022 12:51, Thomas Hellström wrote:
Implement async (non-blocking) unbinding by not syncing the vma before
calling unbind on the vma_resource.
Add the resulting unbind fence to the object's dma_resv from where it is
picked up by the ttm migration code.
Ideally these unbind fences should be coalesced with the migration blit
fence to avoid stalling the migration blit waiting for unbind, as they
can certainly go on in parallel, but since we don't yet have a
reasonable data structure to use to coalesce fences and attach the
resulting fence to a timeline, we defer that for now.
Note that with async unbinding, even while the unbind waits for the
preceding bind to complete before unbinding, the vma itself might have been
destroyed in the process, clearing the vma pages. Therefore we can
only allow async unbinding if we have a refcounted sg-list and keep a
refcount on that for the vma resource pages to stay intact until
binding occurs. If this condition is not met, a request for an async
unbind is diverted to a sync unbind.
v2:
- Use a separate kmem_cache for vma resources for now to isolate their
memory allocation and aid debugging.
- Move the check for vm closed to the actual unbinding thread. Regardless
of whether the vm is closed, we need the unbind fence to properly wait
for capture.
- Clear vma_res::vm on unbind and update its documentation.
v4:
- Take cache coloring into account when searching for vma resources
pending unbind. (Matthew Auld)
v5:
- Fix timeout and error check in i915_vma_resource_bind_dep_await().
- Avoid taking a reference on the object for async binding if
async unbind capable.
- Fix braces around a single-line if statement.
Signed-off-by: Thomas Hellström
@@ -434,12 +439,30 @@ int i915_vma_bind(struct i915_vma *vma,
bind_flags &= ~vma_flags;
if (bind_flags == 0) {
- kfree(vma_res);
+ i915_vma_resource_free(vma_res);
return 0;
}
GEM_BUG_ON(!atomic_read(>pages_count));
+ /* Wait for or await async unbinds touching our range */
+ if (work && bind_flags & vma->vm->bind_async_flags)
+ ret = i915_vma_resource_bind_dep_await(vma->vm,
+ >base.chain,
+ vma->node.start,
+ vma->node.size,
+ true,
+ GFP_NOWAIT |
+ __GFP_RETRY_MAYFAIL |
+ __GFP_NOWARN);
+ else
+ ret = i915_vma_resource_bind_dep_sync(vma->vm, vma->node.start,
+ vma->node.size, true);
+ if (ret) {
+ i915_vma_resource_free(vma_res);
+ return ret;
+ }
+
if (vma->resource || !vma_res) {
/* Rebinding with an additional I915_VMA_*_BIND */
GEM_WARN_ON(!vma_flags);
@@ -452,9 +475,11 @@ int i915_vma_bind(struct i915_vma *vma,
if (work && bind_flags & vma->vm->bind_async_flags) {
struct dma_fence *prev;
- work->vma = vma;
+ work->vma_res = i915_vma_resource_get(vma->resource);
work->cache_level = cache_level;
work->flags = bind_flags;
+ if (vma->obj->mm.rsgt)
+ work->rsgt = i915_refct_sgt_get(vma->obj->mm.rsgt);
Hmmm, at a glance I would have expected this to use the vma->pages. I
think with the GGTT the vma will often create its own sg layout which !=
obj->mm.sgt. IIUC the async unbind will still call vma_unbind_pages
which might nuke the vma sgt? Or is something else going on here?
Re: [Intel-gfx] [PATCH 1/4] drm/i915: don't call free_mmap_offset when purging
On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
> The TTM backend is in theory the only user here(also purge should
> only
> be called once we have dropped the pages), where it is setup at
> object
> creation and is only removed once the object is destroyed. Also
> resetting the node here might be iffy since the ttm fault handler
> uses the stored fake offset to determine the page offset within the
> pages
> array.
>
> This also blows up in the dontneed-before-mmap test, since the
> expectation is that the vma_node will live on, until the object is
> destroyed:
>
> <2> [749.062902] kernel BUG at
> drivers/gpu/drm/i915/gem/i915_gem_ttm.c:943!
> <4> [749.062923] invalid opcode: [#1] PREEMPT SMP NOPTI
> <4> [749.062928] CPU: 0 PID: 1643 Comm: gem_madvise Tainted: G U
> W 5.16.0-rc8-CI-CI_DRM_11046+ #1
> <4> [749.062933] Hardware name: Gigabyte Technology Co., Ltd. GB-Z390
> Garuda/GB-Z390 Garuda-CF, BIOS IG1c 11/19/2019
> <4> [749.062937] RIP: 0010:i915_ttm_mmap_offset.cold.35+0x5b/0x5d
> [i915]
> <4> [749.063044] Code: 00 48 c7 c2 a0 23 4e a0 48 c7 c7 26 df 4a a0
> e8 95 1d d0 e0 bf 01 00 00 00 e8 8b ec cf e0 31 f6 bf 09 00 00 00 e8
> 5f 30 c0 e0 <0f> 0b 48 c7 c1 24 4b 56 a0 ba 5b 03 00 00 48 c7 c6 c0
> 23 4e a0 48
> <4> [749.063052] RSP: 0018:c90002ab7d38 EFLAGS: 00010246
> <4> [749.063056] RAX: 0240 RBX: 88811f2e61c0 RCX:
> 0006
> <4> [749.063060] RDX: RSI: RDI:
> 0009
> <4> [749.063063] RBP: c90002ab7e58 R08: 0001 R09:
> 0001
> <4> [749.063067] R10: 0123d0f8 R11: c90002ab7b20 R12:
> 888112a1a000
> <4> [749.063071] R13: 0004 R14: 88811f2e61c0 R15:
> 888112a1a000
> <4> [749.063074] FS: 7f6e5fcad500()
> GS:8884ad60() knlGS:
> <4> [749.063078] CS: 0010 DS: ES: CR0: 80050033
> <4> [749.063081] CR2: 7efd264e39f0 CR3: 000115fd6005 CR4:
> 003706f0
> <4> [749.063085] Call Trace:
> <4> [749.063087]
> <4> [749.063089] __assign_mmap_offset+0x41/0x300 [i915]
> <4> [749.063171] __assign_mmap_offset_handle+0x159/0x270 [i915]
> <4> [749.063248] ? i915_gem_dumb_mmap_offset+0x70/0x70 [i915]
> <4> [749.063325] drm_ioctl_kernel+0xae/0x140
> <4> [749.063330] drm_ioctl+0x201/0x3d0
> <4> [749.06] ? i915_gem_dumb_mmap_offset+0x70/0x70 [i915]
> <4> [749.063409] ? do_user_addr_fault+0x200/0x670
> <4> [749.063415] __x64_sys_ioctl+0x6d/0xa0
> <4> [749.063419] do_syscall_64+0x3a/0xb0
> <4> [749.063423] entry_SYSCALL_64_after_hwframe+0x44/0xae
> <4> [749.063428] RIP: 0033:0x7f6e5f100317
>
> Testcase: igt@gem_madvise@dontneed-before-mmap
> Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
> Signed-off-by: Matthew Auld
> Cc: Thomas Hellström
> ---
> drivers/gpu/drm/i915/gem/i915_gem_pages.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> index 89b70f5cde7a..9f429ed6e78a 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
> @@ -161,7 +161,6 @@ int i915_gem_object_pin_pages_unlocked(struct
> drm_i915_gem_object *obj)
> /* Immediately discard the backing storage */
> int i915_gem_object_truncate(struct drm_i915_gem_object *obj)
> {
> - drm_gem_free_mmap_offset(>base);
What happens if a non-ttm shmem system object gets truncated from the
shrinker and then tries to use the above mmap offset?
/Thomas
> if (obj->ops->truncate)
> return obj->ops->truncate(obj);
>
Re: [Intel-gfx] [PATCH 3/4] drm/i915/ttm: ensure we unmap when purging
On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
> Purging can happen during swapping out, or directly invoked with the
> madvise ioctl. In such cases this doesn't involve a ttm move, which
> skips umapping the object.
>
> Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
> Signed-off-by: Matthew Auld
> Cc: Thomas Hellström
> ---
> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> index 8d61d4538a64..f148e7e48f86 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> @@ -399,6 +399,8 @@ int i915_ttm_purge(struct drm_i915_gem_object
> *obj)
> if (obj->mm.madv == __I915_MADV_PURGED)
> return 0;
>
> + ttm_bo_unmap_virtual(bo);
> +
> ret = ttm_bo_validate(bo, , );
> if (ret)
> return ret;
The swap notifier and the move code both call i915_ttm_move_notify() to
achieve this before calling i915_ttm_purge. This ensures both cpu- and
gpu ptes are torn down, and also when we extend to dynamic dma-buf
exporting, makes sure dma-buf importers unbind.
So I suggest we make a i915_ttm_truncate wrapper function that calls
i915_ttm_move_notify() and then ttm_bo_purge(), and use that as the
truncate callback as well as from those places we call i915_ttm_purge
without a prior call to i915_ttm_move_notify(), which seems to be the
ones you've identified in patch 3 and 4,
/Thomas
Re: [Intel-gfx] [PATCH 2/4] drm/i915/ttm: only fault WILLNEED objects
On Wed, 2022-01-05 at 14:58 +, Matthew Auld wrote:
> Don't attempt to fault and re-populate purged objects. By some fluke
> this passes the dontneed-after-mmap IGT, but for the wrong reasons.
>
> Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
> Signed-off-by: Matthew Auld
> Cc: Thomas Hellström
Reviewed-by: Thomas Hellström
> ---
> drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> index 923cc7ad8d70..8d61d4538a64 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
> @@ -883,6 +883,11 @@ static vm_fault_t vm_fault_ttm(struct vm_fault
> *vmf)
> if (ret)
> return ret;
>
> + if (obj->mm.madv != I915_MADV_WILLNEED) {
> + dma_resv_unlock(bo->base.resv);
> + return VM_FAULT_SIGBUS;
> + }
> +
> if (drm_dev_enter(dev, )) {
> ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma-
> >vm_page_prot,
>
> TTM_BO_VM_NUM_PREFAULT);
[Intel-gfx] [PATCH 4/4] drm/i915/ttm: ensure we unmap when shrinking
Assuming we don't purge the pages, but instead swap them out then we
need to ensure we also unmap the object.
Fixes: 7ae034590cea ("drm/i915/ttm: add tt shmem backend")
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index f148e7e48f86..adbbd57bb9bf 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -462,6 +462,8 @@ static int i915_ttm_shrinker_release_pages(struct
drm_i915_gem_object *obj,
if (bo->ttm->page_flags & TTM_TT_FLAG_SWAPPED)
return 0;
+ ttm_bo_unmap_virtual(bo);
+
bo->ttm->page_flags |= TTM_TT_FLAG_SWAPPED;
ret = ttm_bo_validate(bo, , );
if (ret) {
--
2.31.1
[Intel-gfx] [PATCH 3/4] drm/i915/ttm: ensure we unmap when purging
Purging can happen during swapping out, or directly invoked with the
madvise ioctl. In such cases this doesn't involve a ttm move, which
skips umapping the object.
Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 8d61d4538a64..f148e7e48f86 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -399,6 +399,8 @@ int i915_ttm_purge(struct drm_i915_gem_object *obj)
if (obj->mm.madv == __I915_MADV_PURGED)
return 0;
+ ttm_bo_unmap_virtual(bo);
+
ret = ttm_bo_validate(bo, , );
if (ret)
return ret;
--
2.31.1
[Intel-gfx] [PATCH 2/4] drm/i915/ttm: only fault WILLNEED objects
Don't attempt to fault and re-populate purged objects. By some fluke
this passes the dontneed-after-mmap IGT, but for the wrong reasons.
Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
index 923cc7ad8d70..8d61d4538a64 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm.c
@@ -883,6 +883,11 @@ static vm_fault_t vm_fault_ttm(struct vm_fault *vmf)
if (ret)
return ret;
+ if (obj->mm.madv != I915_MADV_WILLNEED) {
+ dma_resv_unlock(bo->base.resv);
+ return VM_FAULT_SIGBUS;
+ }
+
if (drm_dev_enter(dev, )) {
ret = ttm_bo_vm_fault_reserved(vmf, vmf->vma->vm_page_prot,
TTM_BO_VM_NUM_PREFAULT);
--
2.31.1
[Intel-gfx] [PATCH 1/4] drm/i915: don't call free_mmap_offset when purging
The TTM backend is in theory the only user here(also purge should only
be called once we have dropped the pages), where it is setup at object
creation and is only removed once the object is destroyed. Also
resetting the node here might be iffy since the ttm fault handler
uses the stored fake offset to determine the page offset within the pages
array.
This also blows up in the dontneed-before-mmap test, since the
expectation is that the vma_node will live on, until the object is
destroyed:
<2> [749.062902] kernel BUG at drivers/gpu/drm/i915/gem/i915_gem_ttm.c:943!
<4> [749.062923] invalid opcode: [#1] PREEMPT SMP NOPTI
<4> [749.062928] CPU: 0 PID: 1643 Comm: gem_madvise Tainted: G U W
5.16.0-rc8-CI-CI_DRM_11046+ #1
<4> [749.062933] Hardware name: Gigabyte Technology Co., Ltd. GB-Z390
Garuda/GB-Z390 Garuda-CF, BIOS IG1c 11/19/2019
<4> [749.062937] RIP: 0010:i915_ttm_mmap_offset.cold.35+0x5b/0x5d [i915]
<4> [749.063044] Code: 00 48 c7 c2 a0 23 4e a0 48 c7 c7 26 df 4a a0 e8 95 1d d0
e0 bf 01 00 00 00 e8 8b ec cf e0 31 f6 bf 09 00 00 00 e8 5f 30 c0 e0 <0f> 0b 48
c7 c1 24 4b 56 a0 ba 5b 03 00 00 48 c7 c6 c0 23 4e a0 48
<4> [749.063052] RSP: 0018:c90002ab7d38 EFLAGS: 00010246
<4> [749.063056] RAX: 0240 RBX: 88811f2e61c0 RCX:
0006
<4> [749.063060] RDX: RSI: RDI:
0009
<4> [749.063063] RBP: c90002ab7e58 R08: 0001 R09:
0001
<4> [749.063067] R10: 0123d0f8 R11: c90002ab7b20 R12:
888112a1a000
<4> [749.063071] R13: 0004 R14: 88811f2e61c0 R15:
888112a1a000
<4> [749.063074] FS: 7f6e5fcad500() GS:8884ad60()
knlGS:
<4> [749.063078] CS: 0010 DS: ES: CR0: 80050033
<4> [749.063081] CR2: 7efd264e39f0 CR3: 000115fd6005 CR4:
003706f0
<4> [749.063085] Call Trace:
<4> [749.063087]
<4> [749.063089] __assign_mmap_offset+0x41/0x300 [i915]
<4> [749.063171] __assign_mmap_offset_handle+0x159/0x270 [i915]
<4> [749.063248] ? i915_gem_dumb_mmap_offset+0x70/0x70 [i915]
<4> [749.063325] drm_ioctl_kernel+0xae/0x140
<4> [749.063330] drm_ioctl+0x201/0x3d0
<4> [749.06] ? i915_gem_dumb_mmap_offset+0x70/0x70 [i915]
<4> [749.063409] ? do_user_addr_fault+0x200/0x670
<4> [749.063415] __x64_sys_ioctl+0x6d/0xa0
<4> [749.063419] do_syscall_64+0x3a/0xb0
<4> [749.063423] entry_SYSCALL_64_after_hwframe+0x44/0xae
<4> [749.063428] RIP: 0033:0x7f6e5f100317
Testcase: igt@gem_madvise@dontneed-before-mmap
Fixes: cf3e3e86d779 ("drm/i915: Use ttm mmap handling for ttm bo's.")
Signed-off-by: Matthew Auld
Cc: Thomas Hellström
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 89b70f5cde7a..9f429ed6e78a 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -161,7 +161,6 @@ int i915_gem_object_pin_pages_unlocked(struct
drm_i915_gem_object *obj)
/* Immediately discard the backing storage */
int i915_gem_object_truncate(struct drm_i915_gem_object *obj)
{
- drm_gem_free_mmap_offset(>base);
if (obj->ops->truncate)
return obj->ops->truncate(obj);
--
2.31.1
Re: [Intel-gfx] [PATCH 2/2] drm/i915/uncore: rename i915_reg_read_ioctl intel_uncore_reg_read_ioctl
On 05/01/2022 13:18, Jani Nikula wrote: On Wed, 05 Jan 2022, Tvrtko Ursulin wrote: On 05/01/2022 10:32, Jani Nikula wrote: On Wed, 05 Jan 2022, Tvrtko Ursulin wrote: On 05/01/2022 10:05, Jani Nikula wrote: Follow the usual naming convention. But intel_uncore_ prefix usually means functions takes intel_uncore as the first argument. Maybe solution here is that i915_reg_read_ioctl does not belong in intel_uncore.c, it being the UAPI layer thing? I guess arguments could be made for either way. My position is that the function and file prefixes go hand in hand. You'll always know where to place a function, and you'll always know where the function is to be found. If you can *also* make the context argument follow the pattern, it's obviously better, and indicates the division to files is working out nicely. However, in a lot of cases you'll need to pass struct drm_i915_private or similar as the first parameter to e.g. init functions. It can't be the rigid rule. I'm fine with moving the entire function somewhere else, as long as the declaration is not in i915_drv.h. There's no longer a i915_drv.c, and i915_drv.h should not have function declarations at all. Yes I agree it cannot be a rigid rule. I just that it feels intel_uncore.[hc] is too low level to me to hold an ioctl implementation, and header actually feels wrong to have the declaration. Not least it is about _one_ of the uncores, while the ioctl is not operating on that level, albeit undefined at the moment how exactly it would work for multi-tile. Would it be too early, or unwarranted at this point, to maybe consider adding i915_ioctls.[hc]? Then the conversation would be about putting together a ton of unrelated functions where the only thing in common is that they're an ioctl implementation. Arguably many of them would have less in common than the reg read ioctl has with uncore! I imagined it as a place for ioctls which don't fit anywhere else, like it this case it is not a family of ioctls but and odd one out. So yes, first "problem" would be there is only one to put there and no line of sight for others. And when is it okay to put an ioctl in the i915_ioctls.c file and when is it warranted to put it somewhere else? It's just a different set of problems. When it does not fit anywhere else? I like the i915_ prefix of ioctls for consistency.. i915_getparam_ioctl, i915_query_ioctl, i915_perf_..., i915_gem_ The display ioctls have intel_ prefix anyway. It's the _ioctl suffix that we use. Again, my main driver here is cleaning up i915_drv.h. I can shove the reg read ioctl somewhere other than intel_uncore.[ch] too. But as it stands, the only alternative that seems better than intel_uncore.[ch] at the moment is adding a dedicated file for a 60-line function. I understand your motivation and I wouldn't nack your efforts, but I also cannot yet make myself ack it. Is 60 lines so bad? Lets see.. $ find . -name "*.c" -print0 | xargs -0 wc -l | sort -nr ... 59 ./selftests/mock_request.c 59 ./gt/uc/intel_uc_debugfs.c 59 ./gem/i915_gemfs.c 52 ./selftests/igt_mmap.c 51 ./selftests/igt_reset.c 49 ./selftests/mock_uncore.c 47 ./selftests/igt_atomic.c 36 ./gt/uc/intel_huc_debugfs.c 36 ./gt/intel_gt_engines_debugfs.c 35 ./selftests/igt_flush_test.c 34 ./selftests/librapl.c 34 ./gvt/trace_points.c 29 ./gt/selftests/mock_timeline.c 27 ./gt/selftest_engine.c 26 ./gt/uc/intel_huc_fw.c 15 ./i915_config.c 14 ./i915_trace_points.c 9 ./display/intel_display_trace.c So kind of meh, wouldn't be first. I'd add a dedicated file just for the benefit of being able to legitimately keep the i915_reg_read_ioctl name. Come multi-tile it may get company. Even though at the moment I am not aware anyone is trying to add multi-tile aware reg read, but I expect there will be need as long as need for the existing one exists. Regards, Tvrtko
Re: [Intel-gfx] [PATCH v4 2/4] drm/i915: Use the vma resource as argument for gtt binding / unbinding
On 1/4/22 17:07, Thomas Hellström wrote: Hi, Oak, On 1/4/22 16:35, Zeng, Oak wrote: Regards, Oak -Original Message- From: Thomas Hellström Sent: January 4, 2022 3:29 AM To: Zeng, Oak ; intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org Cc: Auld, Matthew Subject: Re: [Intel-gfx] [PATCH v4 2/4] drm/i915: Use the vma resource as argument for gtt binding / unbinding Hi, Oak. On 1/4/22 00:08, Zeng, Oak wrote: Regards, Oak Looks like your emails always start with "Regards, Oak". a misconfiguration? My mail client (outlook) is set to automatically add a regards, when I compose new mail or reply email. Not a big problem -Original Message- From: Thomas Hellström Sent: January 3, 2022 1:58 PM To: Zeng, Oak ; intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org Cc: Auld, Matthew Subject: Re: [Intel-gfx] [PATCH v4 2/4] drm/i915: Use the vma resource as argument for gtt binding / unbinding Hi, Oak. On 1/3/22 19:17, Zeng, Oak wrote: Regards, Oak -Original Message- From: Intel-gfx On Behalf Of Thomas Hellström Sent: January 3, 2022 7:00 AM To: intel-gfx@lists.freedesktop.org; dri-de...@lists.freedesktop.org Cc: Thomas Hellström ; Auld, Matthew Subject: [Intel-gfx] [PATCH v4 2/4] drm/i915: Use the vma resource as argument for gtt binding / unbinding When introducing asynchronous unbinding, the vma itself may no longer be alive when the actual binding or unbinding takes place. Can we take an extra reference counter of the vma to keep the vma alive, until the actual binding/unbinding takes place? The point here is that that's not needed, and should be avoided. Can you explain more why "keeping vma alive until unbinding takes place" should be avoided? As I understand it, your series introduce asynchronized unbinding. But since vma might be no longer alive at the time of unbinding. To overcome this difficulty, you introduce a vma resource structure and you guarantee vma resource is alive at bind/unbind time. So you can use vma resource for the bind/unbind operation. My question is, can we achieve the asynchronized unbinding still using vma structure by keeping vma structure alive ( by ref count it). This way the change should be much smaller (compared to this series). Why it is harmful to keep the vma alive? Maybe you have other reasons to introduce vma resource that I don't see. When we allow asynchronous unbinding, it's allowed to immediately rebind the vma, possibly into the same gpu virtual address, but with different pages. And when doing that we don't want to block waiting for the unbind to execute. Imagine this sequence: 1. Virtual address a1 is bound to physical page p1 2. Unbind a1 from p1, asynchronous so actual unbind not happen yet 3. bind a1 to physical page p2, page table is changed, now a1 pointing to p2 in page table. 4. #2 now take place now - since in page table, a1 points to p2 now, does a1 point to scratch page after #4? Here, 3) will also become async, awaiting any pending unbinds in the address range provided to 3), in particular, the bind in 3) will await 4). See i915_vma_resource_bind_dep_await(), and the discussion on whether or not to use an interval tree for this at the start of i915_vma_resource.c In fact, we could allow a large number of outstanding binds and unbinds for a vma, which makes the vma structure unsuitable to track this, since there will no longer be a single mapping between a set of active pages and a vma, or a virtual gpu range and a vma. I agree that if pages - vma - virtual gpu range is not 1:1:1 mapping, we need introduce a finer-grained vma resource to for the non-1:1 mapping. I also understand the asynchronous unbinding utilize the virtual address space more effectively. But my feeling is that this non-1:1 mapping makes our program hard to understand and maintain. Since this non- 1:1 mapping is introduced by asynchronous binding/unbinding, maybe the real question here is, is it really benefit to introduce asynchronous unbinding? That's a relevant question, which I've asked myself a couple of times. Async unbinding has complicated things like error capture and indeed complicates the understanding of the binding process as well. The main gain is that we avoid a sync point at LMEM eviction, enabling us to pipeline eviction, moving forward it may also find use in the shrinker and for user-space prematurely wanting to re-use softpin addresses. /Thomas I am still not familiar enough to the codes. I suggest other experts to take a look also. @Bloomfield, Jon @Vetter, Daniel @Wilson, Chris P. It might make sense here to point out as well that the direction from the arch team is towards moving towards gpu-writes of page-table entries for binding and unbinding, also keeping small PCI bars in mind, which will more or less force us to allow async unbinding for maintained performance. /Thomas Regards, Oak Thanks, /Thomas
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: stop including i915_irq.h from i915_drv.h
== Series Details ==
Series: drm/i915: stop including i915_irq.h from i915_drv.h
URL : https://patchwork.freedesktop.org/series/98500/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11047_full -> Patchwork_21926_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_21926_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21926_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_21926_full:
### IGT changes ###
Possible regressions
* igt@gem_workarounds@suspend-resume-fd:
- shard-skl: [PASS][1] -> [INCOMPLETE][2] +1 similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-skl4/igt@gem_workarou...@suspend-resume-fd.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-skl6/igt@gem_workarou...@suspend-resume-fd.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_mmap_gtt@basic-copy:
- {shard-dg1}:NOTRUN -> [SKIP][3] +3 similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-dg1-19/igt@gem_mmap_...@basic-copy.html
* igt@i915_pm_rps@min-max-config-loaded:
- {shard-dg1}:[FAIL][4] ([i915#4032]) -> [FAIL][5]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-dg1-13/igt@i915_pm_...@min-max-config-loaded.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-dg1-13/igt@i915_pm_...@min-max-config-loaded.html
* igt@testdisplay:
- {shard-tglu}: [PASS][6] -> [DMESG-WARN][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglu-1/i...@testdisplay.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-tglu-8/i...@testdisplay.html
Known issues
Here are the changes found in Patchwork_21926_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_create@create-massive:
- shard-tglb: NOTRUN -> [DMESG-WARN][8] ([i915#3002])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-tglb1/igt@gem_cre...@create-massive.html
* igt@gem_ctx_isolation@preservation-s3@vcs0:
- shard-kbl: NOTRUN -> [DMESG-WARN][9] ([i915#180]) +4 similar
issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-kbl7/igt@gem_ctx_isolation@preservation...@vcs0.html
* igt@gem_eio@in-flight-contexts-immediate:
- shard-tglb: [PASS][10] -> [TIMEOUT][11] ([i915#3063]) +1 similar
issue
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglb7/igt@gem_...@in-flight-contexts-immediate.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-tglb2/igt@gem_...@in-flight-contexts-immediate.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-skl: NOTRUN -> [SKIP][12] ([fdo#109271]) +145 similar
issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-skl6/igt@gem_exec_fair@basic-f...@rcs0.html
- shard-tglb: [PASS][13] -> [FAIL][14] ([i915#2842])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglb1/igt@gem_exec_fair@basic-f...@rcs0.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-tglb2/igt@gem_exec_fair@basic-f...@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-apl: [PASS][15] -> [FAIL][16] ([i915#2842])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-apl4/igt@gem_exec_fair@basic-n...@vcs0.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-apl2/igt@gem_exec_fair@basic-n...@vcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-kbl: [PASS][17] -> [FAIL][18] ([i915#2842])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-kbl1/igt@gem_exec_fair@basic-n...@vecs0.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-kbl3/igt@gem_exec_fair@basic-n...@vecs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-kbl: NOTRUN -> [FAIL][19] ([i915#2842])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/shard-kbl3/igt@gem_exec_fair@basic-p...@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][20] -> [FAIL][21] ([i915#2849])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-iclb5/igt@gem_exec_fair@basic-throt...@rcs0.html
[21]:
Re: [Intel-gfx] [PATCH 2/2] drm/i915/uncore: rename i915_reg_read_ioctl intel_uncore_reg_read_ioctl
On Wed, 05 Jan 2022, Tvrtko Ursulin wrote:
> On 05/01/2022 10:32, Jani Nikula wrote:
>> On Wed, 05 Jan 2022, Tvrtko Ursulin wrote:
>>> On 05/01/2022 10:05, Jani Nikula wrote:
Follow the usual naming convention.
>>>
>>> But intel_uncore_ prefix usually means functions takes intel_uncore as
>>> the first argument.
>>>
>>> Maybe solution here is that i915_reg_read_ioctl does not belong in
>>> intel_uncore.c, it being the UAPI layer thing? I guess arguments could
>>> be made for either way.
>>
>> My position is that the function and file prefixes go hand in
>> hand. You'll always know where to place a function, and you'll always
>> know where the function is to be found.
>>
>> If you can *also* make the context argument follow the pattern, it's
>> obviously better, and indicates the division to files is working out
>> nicely. However, in a lot of cases you'll need to pass struct
>> drm_i915_private or similar as the first parameter to e.g. init
>> functions. It can't be the rigid rule.
>>
>> I'm fine with moving the entire function somewhere else, as long as the
>> declaration is not in i915_drv.h. There's no longer a i915_drv.c, and
>> i915_drv.h should not have function declarations at all.
>
> Yes I agree it cannot be a rigid rule. I just that it feels
> intel_uncore.[hc] is too low level to me to hold an ioctl
> implementation, and header actually feels wrong to have the declaration.
> Not least it is about _one_ of the uncores, while the ioctl is not
> operating on that level, albeit undefined at the moment how exactly it
> would work for multi-tile.
>
> Would it be too early, or unwarranted at this point, to maybe consider
> adding i915_ioctls.[hc]?
Then the conversation would be about putting together a ton of unrelated
functions where the only thing in common is that they're an ioctl
implementation. Arguably many of them would have less in common than the
reg read ioctl has with uncore!
And when is it okay to put an ioctl in the i915_ioctls.c file and when
is it warranted to put it somewhere else? It's just a different set of
problems.
> I like the i915_ prefix of ioctls for consistency.. i915_getparam_ioctl,
> i915_query_ioctl, i915_perf_..., i915_gem_
The display ioctls have intel_ prefix anyway. It's the _ioctl suffix
that we use.
Again, my main driver here is cleaning up i915_drv.h. I can shove the
reg read ioctl somewhere other than intel_uncore.[ch] too. But as it
stands, the only alternative that seems better than intel_uncore.[ch] at
the moment is adding a dedicated file for a 60-line function.
BR,
Jani.
>
> Regards,
>
> Tvrtko
>
>>
>> BR,
>> Jani.
>>
>>>
>>> Regards,
>>>
>>> Tvrtko
>>>
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.h | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index 95174938b160..f9a494e159dc 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1805,7 +1805,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE_EXT,
i915_gem_context_create_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY,
i915_gem_context_destroy_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_REG_READ, intel_uncore_reg_read_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GET_RESET_STATS,
i915_gem_context_reset_stats_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_USERPTR, i915_gem_userptr_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_GETPARAM,
i915_gem_context_getparam_ioctl, DRM_RENDER_ALLOW),
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index fc25ebf1a593..33f95bb2d3d5 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -2269,8 +2269,8 @@ static const struct reg_whitelist {
.size = 8
} };
-int i915_reg_read_ioctl(struct drm_device *dev,
- void *data, struct drm_file *file)
+int intel_uncore_reg_read_ioctl(struct drm_device *dev,
+ void *data, struct drm_file *file)
{
struct drm_i915_private *i915 = to_i915(dev);
struct intel_uncore *uncore = >uncore;
diff --git a/drivers/gpu/drm/i915/intel_uncore.h
b/drivers/gpu/drm/i915/intel_uncore.h
index 3a87bbd906f8..697ac4586159 100644
---
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: move i915_reg_read_ioctl declaration to intel_uncore.h
== Series Details ==
Series: series starting with [1/2] drm/i915: move i915_reg_read_ioctl
declaration to intel_uncore.h
URL : https://patchwork.freedesktop.org/series/98499/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11047_full -> Patchwork_21925_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_21925_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21925_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 12)
--
Missing(1): shard-dg1
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_21925_full:
### IGT changes ###
Possible regressions
* igt@kms_frontbuffer_tracking@psr-1p-rte:
- shard-tglb: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglb6/igt@kms_frontbuffer_track...@psr-1p-rte.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-tglb8/igt@kms_frontbuffer_track...@psr-1p-rte.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_create@create-clear:
- {shard-rkl}:NOTRUN -> ([PASS][3], [INCOMPLETE][4])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-rkl-4/igt@gem_cre...@create-clear.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-rkl-5/igt@gem_cre...@create-clear.html
* igt@gem_exec_whisper@basic-fds-priority:
- {shard-rkl}:NOTRUN -> [INCOMPLETE][5] +1 similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-rkl-5/igt@gem_exec_whis...@basic-fds-priority.html
* igt@gem_exec_whisper@basic-queues-priority:
- {shard-rkl}:[PASS][6] -> [DMESG-FAIL][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-rkl-6/igt@gem_exec_whis...@basic-queues-priority.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-rkl-5/igt@gem_exec_whis...@basic-queues-priority.html
* igt@gem_flink_race@flink_close:
- {shard-rkl}:[PASS][8] -> [INCOMPLETE][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-rkl-1/igt@gem_flink_race@flink_close.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-rkl-5/igt@gem_flink_race@flink_close.html
* igt@i915_pm_dc@dc6-psr:
- {shard-tglu}: NOTRUN -> [SKIP][10]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-tglu-1/igt@i915_pm...@dc6-psr.html
* igt@testdisplay:
- {shard-tglu}: [PASS][11] -> [DMESG-WARN][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglu-1/i...@testdisplay.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-tglu-5/i...@testdisplay.html
Known issues
Here are the changes found in Patchwork_21925_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_create@create-massive:
- shard-tglb: NOTRUN -> [DMESG-WARN][13] ([i915#3002])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-tglb7/igt@gem_cre...@create-massive.html
* igt@gem_eio@in-flight-contexts-immediate:
- shard-tglb: [PASS][14] -> [TIMEOUT][15] ([i915#3063])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglb7/igt@gem_...@in-flight-contexts-immediate.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-tglb3/igt@gem_...@in-flight-contexts-immediate.html
* igt@gem_eio@in-flight-suspend:
- shard-apl: NOTRUN -> [DMESG-WARN][16] ([i915#180])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-apl6/igt@gem_...@in-flight-suspend.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-skl: NOTRUN -> [SKIP][17] ([fdo#109271]) +190 similar
issues
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-skl5/igt@gem_exec_fair@basic-f...@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-kbl: [PASS][18] -> [FAIL][19] ([i915#2842]) +1 similar
issue
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-kbl4/igt@gem_exec_fair@basic-pace-s...@rcs0.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/shard-kbl7/igt@gem_exec_fair@basic-pace-s...@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][20] -> [FAIL][21] ([i915#2849])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-iclb5/igt@gem_exec_fair@basic-throt...@rcs0.html
[21]:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: stop including i915_irq.h from i915_drv.h
== Series Details == Series: drm/i915: stop including i915_irq.h from i915_drv.h URL : https://patchwork.freedesktop.org/series/98500/ State : success == Summary == CI Bug Log - changes from CI_DRM_11047 -> Patchwork_21926 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/index.html Participating hosts (48 -> 37) -- Additional (2): fi-kbl-soraka fi-icl-u2 Missing(13): fi-ilk-m540 bat-dg1-6 bat-dg1-5 fi-hsw-4200u fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-ctg-p8600 fi-pnv-d510 bat-rpls-1 fi-bdw-samus bat-jsl-2 bat-jsl-1 Known issues Here are the changes found in Patchwork_21926 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_cs_nop@fork-gfx0: - fi-icl-u2: NOTRUN -> [SKIP][1] ([fdo#109315]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-icl-u2/igt@amdgpu/amd_cs_...@fork-gfx0.html * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) +24 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html - fi-icl-u2: NOTRUN -> [SKIP][4] ([i915#2190]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-icl-u2/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-icl-u2: NOTRUN -> [SKIP][6] ([i915#4613]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-icl-u2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#2291]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827]) +8 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-icl-u2: NOTRUN -> [SKIP][9] ([fdo#111827]) +8 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-icl-u2: NOTRUN -> [SKIP][10] ([fdo#109278]) +2 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-connector-state: - fi-cfl-8109u: [PASS][11] -> [DMESG-WARN][12] ([i915#165]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/fi-cfl-8109u/igt@kms_force_connector_ba...@force-connector-state.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-cfl-8109u/igt@kms_force_connector_ba...@force-connector-state.html * igt@kms_force_connector_basic@force-load-detect: - fi-icl-u2: NOTRUN -> [SKIP][13] ([fdo#109285]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-icl-u2/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b: - fi-cfl-8109u: [PASS][14] -> [DMESG-WARN][15] ([i915#165] / [i915#295]) +13 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-cfl-8109u/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-b.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-kbl-soraka: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#533]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html * igt@kms_psr@primary_page_flip: - fi-skl-6600u: [PASS][17] -> [INCOMPLETE][18] ([i915#4547] / [i915#4838]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/fi-skl-6600u/igt@kms_psr@primary_page_flip.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21926/fi-skl-6600u/igt@kms_psr@primary_page_flip.html * igt@prime_vgem@basic-userptr: - fi-icl-u2:
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/2] drm/i915: split out intel_vtd.[ch] from i915_drv.h
== Series Details ==
Series: series starting with [v2,1/2] drm/i915: split out intel_vtd.[ch] from
i915_drv.h
URL : https://patchwork.freedesktop.org/series/98498/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11047_full -> Patchwork_21924_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_21924_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_21924_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 12)
--
Missing(1): shard-dg1
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_21924_full:
### IGT changes ###
Possible regressions
* igt@kms_flip@flip-vs-suspend-interruptible@a-vga1:
- shard-snb: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-snb2/igt@kms_flip@flip-vs-suspend-interrupti...@a-vga1.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-snb2/igt@kms_flip@flip-vs-suspend-interrupti...@a-vga1.html
* igt@kms_lease@cursor_implicit_plane:
- shard-apl: [PASS][3] -> [INCOMPLETE][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-apl8/igt@kms_lease@cursor_implicit_plane.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-apl7/igt@kms_lease@cursor_implicit_plane.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_whisper@basic-contexts-forked:
- {shard-rkl}:[PASS][5] -> [DMESG-WARN][6]
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-rkl-6/igt@gem_exec_whis...@basic-contexts-forked.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-rkl-5/igt@gem_exec_whis...@basic-contexts-forked.html
* igt@gem_exec_whisper@basic-queues-priority:
- {shard-rkl}:[PASS][7] -> [INCOMPLETE][8] +3 similar issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-rkl-6/igt@gem_exec_whis...@basic-queues-priority.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-rkl-5/igt@gem_exec_whis...@basic-queues-priority.html
* igt@testdisplay:
- {shard-tglu}: [PASS][9] -> [DMESG-WARN][10]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglu-1/i...@testdisplay.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-tglu-3/i...@testdisplay.html
Known issues
Here are the changes found in Patchwork_21924_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][11] ([i915#3002])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-skl9/igt@gem_cre...@create-massive.html
* igt@gem_ctx_isolation@preservation-s3@vcs0:
- shard-kbl: NOTRUN -> [DMESG-WARN][12] ([i915#180]) +4 similar
issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-kbl1/igt@gem_ctx_isolation@preservation...@vcs0.html
* igt@gem_exec_suspend@basic-s3@smem:
- shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +3
similar issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-kbl3/igt@gem_exec_suspend@basic...@smem.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-kbl1/igt@gem_exec_suspend@basic...@smem.html
* igt@gem_exec_whisper@basic-queues-forked:
- shard-glk: [PASS][15] -> [DMESG-WARN][16] ([i915#118])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-glk1/igt@gem_exec_whis...@basic-queues-forked.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-glk2/igt@gem_exec_whis...@basic-queues-forked.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][17] -> [SKIP][18] ([i915#2190])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/shard-tglb1/igt@gem_huc_c...@huc-copy.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-tglb7/igt@gem_huc_c...@huc-copy.html
- shard-kbl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-kbl7/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@parallel-random:
- shard-apl: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#4613])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/shard-apl7/igt@gem_lmem_swapp...@parallel-random.html
* igt@gem_lmem_swapping@parallel-random-engines:
- shard-kbl: NOTRUN ->
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: stop including i915_irq.h from i915_drv.h
== Series Details == Series: drm/i915: stop including i915_irq.h from i915_drv.h URL : https://patchwork.freedesktop.org/series/98500/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [Intel-gfx] [PATCH 2/2] drm/i915/uncore: rename i915_reg_read_ioctl intel_uncore_reg_read_ioctl
On 05/01/2022 10:32, Jani Nikula wrote:
On Wed, 05 Jan 2022, Tvrtko Ursulin wrote:
On 05/01/2022 10:05, Jani Nikula wrote:
Follow the usual naming convention.
But intel_uncore_ prefix usually means functions takes intel_uncore as
the first argument.
Maybe solution here is that i915_reg_read_ioctl does not belong in
intel_uncore.c, it being the UAPI layer thing? I guess arguments could
be made for either way.
My position is that the function and file prefixes go hand in
hand. You'll always know where to place a function, and you'll always
know where the function is to be found.
If you can *also* make the context argument follow the pattern, it's
obviously better, and indicates the division to files is working out
nicely. However, in a lot of cases you'll need to pass struct
drm_i915_private or similar as the first parameter to e.g. init
functions. It can't be the rigid rule.
I'm fine with moving the entire function somewhere else, as long as the
declaration is not in i915_drv.h. There's no longer a i915_drv.c, and
i915_drv.h should not have function declarations at all.
Yes I agree it cannot be a rigid rule. I just that it feels
intel_uncore.[hc] is too low level to me to hold an ioctl
implementation, and header actually feels wrong to have the declaration.
Not least it is about _one_ of the uncores, while the ioctl is not
operating on that level, albeit undefined at the moment how exactly it
would work for multi-tile.
Would it be too early, or unwarranted at this point, to maybe consider
adding i915_ioctls.[hc]?
I like the i915_ prefix of ioctls for consistency.. i915_getparam_ioctl,
i915_query_ioctl, i915_perf_..., i915_gem_
Regards,
Tvrtko
BR,
Jani.
Regards,
Tvrtko
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.h | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index 95174938b160..f9a494e159dc 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1805,7 +1805,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE_EXT,
i915_gem_context_create_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY,
i915_gem_context_destroy_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_REG_READ, intel_uncore_reg_read_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GET_RESET_STATS,
i915_gem_context_reset_stats_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_USERPTR, i915_gem_userptr_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_GETPARAM,
i915_gem_context_getparam_ioctl, DRM_RENDER_ALLOW),
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index fc25ebf1a593..33f95bb2d3d5 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -2269,8 +2269,8 @@ static const struct reg_whitelist {
.size = 8
} };
-int i915_reg_read_ioctl(struct drm_device *dev,
- void *data, struct drm_file *file)
+int intel_uncore_reg_read_ioctl(struct drm_device *dev,
+ void *data, struct drm_file *file)
{
struct drm_i915_private *i915 = to_i915(dev);
struct intel_uncore *uncore = >uncore;
diff --git a/drivers/gpu/drm/i915/intel_uncore.h
b/drivers/gpu/drm/i915/intel_uncore.h
index 3a87bbd906f8..697ac4586159 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -457,7 +457,7 @@ static inline int intel_uncore_write_and_verify(struct
intel_uncore *uncore,
#define raw_reg_write(base, reg, value) \
writel(value, base + i915_mmio_reg_offset(reg))
-int i915_reg_read_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file);
+int intel_uncore_reg_read_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
#endif /* !__INTEL_UNCORE_H__ */
Re: [Intel-gfx] [PATCH] drm/i915: stop including i915_irq.h from i915_drv.h
On 05/01/2022 10:21, Jani Nikula wrote: Only include i915_irq.h where actually needed. Signed-off-by: Jani Nikula Acked-by: Tvrtko Ursulin Regards, Tvrtko --- drivers/gpu/drm/i915/display/intel_crtc.c | 1 + drivers/gpu/drm/i915/display/intel_display_trace.h | 1 + drivers/gpu/drm/i915/gt/intel_rps.c| 1 + drivers/gpu/drm/i915/gt/uc/intel_guc.c | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 1 + drivers/gpu/drm/i915/i915_drv.h| 1 - 6 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index 16c3ca66d9f0..08ee3e17ee5c 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -12,6 +12,7 @@ #include #include +#include "i915_irq.h" #include "i915_vgpu.h" #include "i9xx_plane.h" #include "icl_dsi.h" diff --git a/drivers/gpu/drm/i915/display/intel_display_trace.h b/drivers/gpu/drm/i915/display/intel_display_trace.h index 4043e1276383..f05f0f9b5103 100644 --- a/drivers/gpu/drm/i915/display/intel_display_trace.h +++ b/drivers/gpu/drm/i915/display/intel_display_trace.h @@ -13,6 +13,7 @@ #include #include "i915_drv.h" +#include "i915_irq.h" #include "intel_crtc.h" #include "intel_display_types.h" diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 54e7df788dbf..bd35e45d3aaa 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -6,6 +6,7 @@ #include #include "i915_drv.h" +#include "i915_irq.h" #include "intel_breadcrumbs.h" #include "intel_gt.h" #include "intel_gt_clock_utils.h" diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c index 6e228343e8cb..0c52d1652e8b 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -12,6 +12,7 @@ #include "intel_guc_ads.h" #include "intel_guc_submission.h" #include "i915_drv.h" +#include "i915_irq.h" /** * DOC: GuC diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c index ac0931f0374b..7b0b43e87244 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c @@ -7,6 +7,7 @@ #include "gt/intel_gt.h" #include "i915_drv.h" +#include "i915_irq.h" #include "i915_memcpy.h" #include "intel_guc_log.h" diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index beeb42a14aae..3967748ba347 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -106,7 +106,6 @@ #include "i915_scheduler.h" #include "gt/intel_timeline.h" #include "i915_vma.h" -#include "i915_irq.h" /* General customization:
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: move i915_reg_read_ioctl declaration to intel_uncore.h
== Series Details == Series: series starting with [1/2] drm/i915: move i915_reg_read_ioctl declaration to intel_uncore.h URL : https://patchwork.freedesktop.org/series/98499/ State : success == Summary == CI Bug Log - changes from CI_DRM_11047 -> Patchwork_21925 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/index.html Participating hosts (48 -> 37) -- Additional (2): fi-kbl-soraka fi-icl-u2 Missing(13): fi-ilk-m540 bat-dg1-6 bat-dg1-5 fi-hsw-4200u fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-ctg-p8600 fi-pnv-d510 bat-rpls-1 fi-bdw-samus bat-jsl-2 bat-jsl-1 Known issues Here are the changes found in Patchwork_21925 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_cs_nop@fork-gfx0: - fi-icl-u2: NOTRUN -> [SKIP][1] ([fdo#109315]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-icl-u2/igt@amdgpu/amd_cs_...@fork-gfx0.html * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271]) +16 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html * igt@gem_huc_copy@huc-copy: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html - fi-icl-u2: NOTRUN -> [SKIP][4] ([i915#2190]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-icl-u2/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613]) +3 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-icl-u2: NOTRUN -> [SKIP][6] ([i915#4613]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-icl-u2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][7] ([i915#1886] / [i915#2291]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-soraka: NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827]) +8 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-kbl-soraka/igt@kms_chamel...@common-hpd-after-suspend.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-icl-u2: NOTRUN -> [SKIP][9] ([fdo#111827]) +8 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-icl-u2: NOTRUN -> [SKIP][10] ([fdo#109278]) +2 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - fi-icl-u2: NOTRUN -> [SKIP][11] ([fdo#109285]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-icl-u2/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-kbl-soraka: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#533]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html * igt@kms_psr@primary_page_flip: - fi-skl-6600u: [PASS][13] -> [FAIL][14] ([i915#4547]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/fi-skl-6600u/igt@kms_psr@primary_page_flip.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-skl-6600u/igt@kms_psr@primary_page_flip.html * igt@prime_vgem@basic-userptr: - fi-icl-u2: NOTRUN -> [SKIP][15] ([i915#3301]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-icl-u2/igt@prime_v...@basic-userptr.html Possible fixes * igt@kms_frontbuffer_tracking@basic: - fi-cml-u2: [DMESG-WARN][16] ([i915#4269]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21925/fi-cml-u2/igt@kms_frontbuffer_track...@basic.html Warnings * igt@runner@aborted: - fi-skl-6600u: [FAIL][18] ([i915#1436] / [i915#2722] / [i915#4312]) -> [FAIL][19] ([i915#4312]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/fi-skl-6600u/igt@run...@aborted.html [19]:
Re: [Intel-gfx] [PATCH 2/2] drm/i915/uncore: rename i915_reg_read_ioctl intel_uncore_reg_read_ioctl
On Wed, 05 Jan 2022, Tvrtko Ursulin wrote:
> On 05/01/2022 10:05, Jani Nikula wrote:
>> Follow the usual naming convention.
>
> But intel_uncore_ prefix usually means functions takes intel_uncore as
> the first argument.
>
> Maybe solution here is that i915_reg_read_ioctl does not belong in
> intel_uncore.c, it being the UAPI layer thing? I guess arguments could
> be made for either way.
My position is that the function and file prefixes go hand in
hand. You'll always know where to place a function, and you'll always
know where the function is to be found.
If you can *also* make the context argument follow the pattern, it's
obviously better, and indicates the division to files is working out
nicely. However, in a lot of cases you'll need to pass struct
drm_i915_private or similar as the first parameter to e.g. init
functions. It can't be the rigid rule.
I'm fine with moving the entire function somewhere else, as long as the
declaration is not in i915_drv.h. There's no longer a i915_drv.c, and
i915_drv.h should not have function declarations at all.
BR,
Jani.
>
> Regards,
>
> Tvrtko
>
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/i915_driver.c | 2 +-
>> drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
>> drivers/gpu/drm/i915/intel_uncore.h | 4 ++--
>> 3 files changed, 5 insertions(+), 5 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_driver.c
>> b/drivers/gpu/drm/i915/i915_driver.c
>> index 95174938b160..f9a494e159dc 100644
>> --- a/drivers/gpu/drm/i915/i915_driver.c
>> +++ b/drivers/gpu/drm/i915/i915_driver.c
>> @@ -1805,7 +1805,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
>> DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_RENDER_ALLOW),
>> DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE_EXT,
>> i915_gem_context_create_ioctl, DRM_RENDER_ALLOW),
>> DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY,
>> i915_gem_context_destroy_ioctl, DRM_RENDER_ALLOW),
>> -DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_RENDER_ALLOW),
>> +DRM_IOCTL_DEF_DRV(I915_REG_READ, intel_uncore_reg_read_ioctl,
>> DRM_RENDER_ALLOW),
>> DRM_IOCTL_DEF_DRV(I915_GET_RESET_STATS,
>> i915_gem_context_reset_stats_ioctl, DRM_RENDER_ALLOW),
>> DRM_IOCTL_DEF_DRV(I915_GEM_USERPTR, i915_gem_userptr_ioctl,
>> DRM_RENDER_ALLOW),
>> DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_GETPARAM,
>> i915_gem_context_getparam_ioctl, DRM_RENDER_ALLOW),
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.c
>> b/drivers/gpu/drm/i915/intel_uncore.c
>> index fc25ebf1a593..33f95bb2d3d5 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.c
>> +++ b/drivers/gpu/drm/i915/intel_uncore.c
>> @@ -2269,8 +2269,8 @@ static const struct reg_whitelist {
>> .size = 8
>> } };
>>
>> -int i915_reg_read_ioctl(struct drm_device *dev,
>> -void *data, struct drm_file *file)
>> +int intel_uncore_reg_read_ioctl(struct drm_device *dev,
>> +void *data, struct drm_file *file)
>> {
>> struct drm_i915_private *i915 = to_i915(dev);
>> struct intel_uncore *uncore = >uncore;
>> diff --git a/drivers/gpu/drm/i915/intel_uncore.h
>> b/drivers/gpu/drm/i915/intel_uncore.h
>> index 3a87bbd906f8..697ac4586159 100644
>> --- a/drivers/gpu/drm/i915/intel_uncore.h
>> +++ b/drivers/gpu/drm/i915/intel_uncore.h
>> @@ -457,7 +457,7 @@ static inline int intel_uncore_write_and_verify(struct
>> intel_uncore *uncore,
>> #define raw_reg_write(base, reg, value) \
>> writel(value, base + i915_mmio_reg_offset(reg))
>>
>> -int i915_reg_read_ioctl(struct drm_device *dev, void *data,
>> -struct drm_file *file);
>> +int intel_uncore_reg_read_ioctl(struct drm_device *dev, void *data,
>> +struct drm_file *file);
>>
>> #endif /* !__INTEL_UNCORE_H__ */
>>
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PATCH 2/2] drm/i915: clean up shrinker_release_pages
Hi, Matthew On 12/15/21 12:07, Matthew Auld wrote: Add some proper flags for the different modes, and shorten the name to something more snappy. Suggested-by: Tvrtko Ursulin Signed-off-by: Matthew Auld LGTM. Reviewed-by: Thomas Hellström
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915: move i915_reg_read_ioctl declaration to intel_uncore.h
== Series Details == Series: series starting with [1/2] drm/i915: move i915_reg_read_ioctl declaration to intel_uncore.h URL : https://patchwork.freedesktop.org/series/98499/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915: split out intel_vtd.[ch] from i915_drv.h
== Series Details == Series: series starting with [v2,1/2] drm/i915: split out intel_vtd.[ch] from i915_drv.h URL : https://patchwork.freedesktop.org/series/98498/ State : success == Summary == CI Bug Log - changes from CI_DRM_11047 -> Patchwork_21924 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/index.html Participating hosts (48 -> 36) -- Additional (1): fi-icl-u2 Missing(13): fi-ilk-m540 bat-dg1-6 bat-dg1-5 fi-hsw-4200u fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-ctg-p8600 fi-pnv-d510 bat-rpls-1 fi-bdw-samus bat-jsl-2 bat-jsl-1 Known issues Here are the changes found in Patchwork_21924 that come from known issues: ### IGT changes ### Issues hit * igt@amdgpu/amd_cs_nop@fork-gfx0: - fi-icl-u2: NOTRUN -> [SKIP][1] ([fdo#109315]) +17 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-icl-u2/igt@amdgpu/amd_cs_...@fork-gfx0.html * igt@gem_huc_copy@huc-copy: - fi-icl-u2: NOTRUN -> [SKIP][2] ([i915#2190]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-icl-u2/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-icl-u2: NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-icl-u2/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@i915_selftest@live@hangcheck: - fi-hsw-4770:[PASS][4] -> [INCOMPLETE][5] ([i915#3303]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-icl-u2: NOTRUN -> [SKIP][6] ([fdo#111827]) +8 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-icl-u2/igt@kms_chamel...@hdmi-hpd-fast.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - fi-icl-u2: NOTRUN -> [SKIP][7] ([fdo#109278]) +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-icl-u2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_force_connector_basic@force-load-detect: - fi-icl-u2: NOTRUN -> [SKIP][8] ([fdo#109285]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-icl-u2/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_psr@primary_page_flip: - fi-skl-6600u: [PASS][9] -> [FAIL][10] ([i915#4547]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/fi-skl-6600u/igt@kms_psr@primary_page_flip.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-skl-6600u/igt@kms_psr@primary_page_flip.html * igt@prime_vgem@basic-userptr: - fi-icl-u2: NOTRUN -> [SKIP][11] ([i915#3301]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-icl-u2/igt@prime_v...@basic-userptr.html * igt@runner@aborted: - fi-bdw-5557u: NOTRUN -> [FAIL][12] ([i915#2426] / [i915#4312]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-bdw-5557u/igt@run...@aborted.html - fi-hsw-4770:NOTRUN -> [FAIL][13] ([fdo#109271] / [i915#1436] / [i915#4312]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-hsw-4770/igt@run...@aborted.html Warnings * igt@runner@aborted: - fi-skl-6600u: [FAIL][14] ([i915#1436] / [i915#2722] / [i915#4312]) -> [FAIL][15] ([i915#4312]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11047/fi-skl-6600u/igt@run...@aborted.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21924/fi-skl-6600u/igt@run...@aborted.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426 [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 Build changes - * Linux: CI_DRM_11047 -> Patchwork_21924 CI-20190529: 20190529
[Intel-gfx] [PATCH] drm/i915: stop including i915_irq.h from i915_drv.h
Only include i915_irq.h where actually needed. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_crtc.c | 1 + drivers/gpu/drm/i915/display/intel_display_trace.h | 1 + drivers/gpu/drm/i915/gt/intel_rps.c| 1 + drivers/gpu/drm/i915/gt/uc/intel_guc.c | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 1 + drivers/gpu/drm/i915/i915_drv.h| 1 - 6 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c b/drivers/gpu/drm/i915/display/intel_crtc.c index 16c3ca66d9f0..08ee3e17ee5c 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc.c +++ b/drivers/gpu/drm/i915/display/intel_crtc.c @@ -12,6 +12,7 @@ #include #include +#include "i915_irq.h" #include "i915_vgpu.h" #include "i9xx_plane.h" #include "icl_dsi.h" diff --git a/drivers/gpu/drm/i915/display/intel_display_trace.h b/drivers/gpu/drm/i915/display/intel_display_trace.h index 4043e1276383..f05f0f9b5103 100644 --- a/drivers/gpu/drm/i915/display/intel_display_trace.h +++ b/drivers/gpu/drm/i915/display/intel_display_trace.h @@ -13,6 +13,7 @@ #include #include "i915_drv.h" +#include "i915_irq.h" #include "intel_crtc.h" #include "intel_display_types.h" diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c index 54e7df788dbf..bd35e45d3aaa 100644 --- a/drivers/gpu/drm/i915/gt/intel_rps.c +++ b/drivers/gpu/drm/i915/gt/intel_rps.c @@ -6,6 +6,7 @@ #include #include "i915_drv.h" +#include "i915_irq.h" #include "intel_breadcrumbs.h" #include "intel_gt.h" #include "intel_gt_clock_utils.h" diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c index 6e228343e8cb..0c52d1652e8b 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c @@ -12,6 +12,7 @@ #include "intel_guc_ads.h" #include "intel_guc_submission.h" #include "i915_drv.h" +#include "i915_irq.h" /** * DOC: GuC diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c index ac0931f0374b..7b0b43e87244 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c @@ -7,6 +7,7 @@ #include "gt/intel_gt.h" #include "i915_drv.h" +#include "i915_irq.h" #include "i915_memcpy.h" #include "intel_guc_log.h" diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index beeb42a14aae..3967748ba347 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -106,7 +106,6 @@ #include "i915_scheduler.h" #include "gt/intel_timeline.h" #include "i915_vma.h" -#include "i915_irq.h" /* General customization: -- 2.30.2
Re: [Intel-gfx] [PATCH 2/2] drm/i915/uncore: rename i915_reg_read_ioctl intel_uncore_reg_read_ioctl
On 05/01/2022 10:05, Jani Nikula wrote:
Follow the usual naming convention.
But intel_uncore_ prefix usually means functions takes intel_uncore as
the first argument.
Maybe solution here is that i915_reg_read_ioctl does not belong in
intel_uncore.c, it being the UAPI layer thing? I guess arguments could
be made for either way.
Regards,
Tvrtko
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.h | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index 95174938b160..f9a494e159dc 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1805,7 +1805,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE_EXT,
i915_gem_context_create_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY,
i915_gem_context_destroy_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_REG_READ, intel_uncore_reg_read_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GET_RESET_STATS,
i915_gem_context_reset_stats_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_USERPTR, i915_gem_userptr_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_GETPARAM,
i915_gem_context_getparam_ioctl, DRM_RENDER_ALLOW),
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index fc25ebf1a593..33f95bb2d3d5 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -2269,8 +2269,8 @@ static const struct reg_whitelist {
.size = 8
} };
-int i915_reg_read_ioctl(struct drm_device *dev,
- void *data, struct drm_file *file)
+int intel_uncore_reg_read_ioctl(struct drm_device *dev,
+ void *data, struct drm_file *file)
{
struct drm_i915_private *i915 = to_i915(dev);
struct intel_uncore *uncore = >uncore;
diff --git a/drivers/gpu/drm/i915/intel_uncore.h
b/drivers/gpu/drm/i915/intel_uncore.h
index 3a87bbd906f8..697ac4586159 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -457,7 +457,7 @@ static inline int intel_uncore_write_and_verify(struct
intel_uncore *uncore,
#define raw_reg_write(base, reg, value) \
writel(value, base + i915_mmio_reg_offset(reg))
-int i915_reg_read_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file);
+int intel_uncore_reg_read_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
#endif /* !__INTEL_UNCORE_H__ */
[Intel-gfx] [PATCH 2/2] drm/i915/uncore: rename i915_reg_read_ioctl intel_uncore_reg_read_ioctl
Follow the usual naming convention.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/i915/intel_uncore.c | 4 ++--
drivers/gpu/drm/i915/intel_uncore.h | 4 ++--
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index 95174938b160..f9a494e159dc 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -1805,7 +1805,7 @@ static const struct drm_ioctl_desc i915_ioctls[] = {
DRM_IOCTL_DEF_DRV(I915_GEM_WAIT, i915_gem_wait_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_CREATE_EXT,
i915_gem_context_create_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_DESTROY,
i915_gem_context_destroy_ioctl, DRM_RENDER_ALLOW),
- DRM_IOCTL_DEF_DRV(I915_REG_READ, i915_reg_read_ioctl, DRM_RENDER_ALLOW),
+ DRM_IOCTL_DEF_DRV(I915_REG_READ, intel_uncore_reg_read_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GET_RESET_STATS,
i915_gem_context_reset_stats_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_USERPTR, i915_gem_userptr_ioctl,
DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(I915_GEM_CONTEXT_GETPARAM,
i915_gem_context_getparam_ioctl, DRM_RENDER_ALLOW),
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index fc25ebf1a593..33f95bb2d3d5 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -2269,8 +2269,8 @@ static const struct reg_whitelist {
.size = 8
} };
-int i915_reg_read_ioctl(struct drm_device *dev,
- void *data, struct drm_file *file)
+int intel_uncore_reg_read_ioctl(struct drm_device *dev,
+ void *data, struct drm_file *file)
{
struct drm_i915_private *i915 = to_i915(dev);
struct intel_uncore *uncore = >uncore;
diff --git a/drivers/gpu/drm/i915/intel_uncore.h
b/drivers/gpu/drm/i915/intel_uncore.h
index 3a87bbd906f8..697ac4586159 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -457,7 +457,7 @@ static inline int intel_uncore_write_and_verify(struct
intel_uncore *uncore,
#define raw_reg_write(base, reg, value) \
writel(value, base + i915_mmio_reg_offset(reg))
-int i915_reg_read_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file);
+int intel_uncore_reg_read_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
#endif /* !__INTEL_UNCORE_H__ */
--
2.30.2
[Intel-gfx] [PATCH 1/2] drm/i915: move i915_reg_read_ioctl declaration to intel_uncore.h
Declarations should be where the implementation is.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/i915_drv.h | 3 ---
drivers/gpu/drm/i915/intel_uncore.h | 7 ++-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index beeb42a14aae..e5183743fe93 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1778,9 +1778,6 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
return (struct intel_device_info *)INTEL_INFO(dev_priv);
}
-int i915_reg_read_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file);
-
static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
{
if (GRAPHICS_VER(i915) >= 11)
diff --git a/drivers/gpu/drm/i915/intel_uncore.h
b/drivers/gpu/drm/i915/intel_uncore.h
index 210fe2a71612..3a87bbd906f8 100644
--- a/drivers/gpu/drm/i915/intel_uncore.h
+++ b/drivers/gpu/drm/i915/intel_uncore.h
@@ -32,10 +32,12 @@
#include "i915_reg.h"
+struct drm_device;
+struct drm_file;
struct drm_i915_private;
+struct intel_gt;
struct intel_runtime_pm;
struct intel_uncore;
-struct intel_gt;
struct intel_uncore_mmio_debug {
spinlock_t lock; /** lock is also taken in irq contexts. */
@@ -455,4 +457,7 @@ static inline int intel_uncore_write_and_verify(struct
intel_uncore *uncore,
#define raw_reg_write(base, reg, value) \
writel(value, base + i915_mmio_reg_offset(reg))
+int i915_reg_read_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file);
+
#endif /* !__INTEL_UNCORE_H__ */
--
2.30.2
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915: split out intel_vtd.[ch] from i915_drv.h
== Series Details == Series: series starting with [v2,1/2] drm/i915: split out intel_vtd.[ch] from i915_drv.h URL : https://patchwork.freedesktop.org/series/98498/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915: split out intel_vtd.[ch] from i915_drv.h
== Series Details == Series: series starting with [v2,1/2] drm/i915: split out intel_vtd.[ch] from i915_drv.h URL : https://patchwork.freedesktop.org/series/98498/ State : warning == Summary == $ dim checkpatch origin/drm-tip 4c826c63dab3 drm/i915: split out intel_vtd.[ch] from i915_drv.h -:314: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #314: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 272 lines checked 312bce2a81ff drm/i915/vtd: rename functions to have the usual prefix
Re: [Intel-gfx] ✗ Fi.CI.BUILD: failure for series starting with [1/2] drm/i915: split out intel_vtd.[ch] from i915_drv.h
On Tue, 04 Jan 2022, Patchwork wrote: > == Series Details == > > Series: series starting with [1/2] drm/i915: split out intel_vtd.[ch] from > i915_drv.h > URL : https://patchwork.freedesktop.org/series/98471/ > State : failure > > == Summary == > > CALLscripts/checksyscalls.sh > CALLscripts/atomic/check-atomics.sh > DESCEND objtool > CHK include/generated/compile.h > HDRTEST drivers/gpu/drm/i915/intel_vtd.h > In file included from ./drivers/gpu/drm/i915/intel_vtd.h:9, > from : > ./arch/x86/include/asm/hypervisor.h:78:15: error: unknown type name ‘bool’ > static inline bool hypervisor_is_type(enum x86_hypervisor_type type) Hmph, that file is not self-contained. Sent v2 with the #include order changed. BR, Jani. >^~~~ > drivers/gpu/drm/i915/Makefile:343: recipe for target > 'drivers/gpu/drm/i915/intel_vtd.hdrtest' failed > make[4]: *** [drivers/gpu/drm/i915/intel_vtd.hdrtest] Error 1 > scripts/Makefile.build:549: recipe for target 'drivers/gpu/drm/i915' failed > make[3]: *** [drivers/gpu/drm/i915] Error 2 > scripts/Makefile.build:549: recipe for target 'drivers/gpu/drm' failed > make[2]: *** [drivers/gpu/drm] Error 2 > scripts/Makefile.build:549: recipe for target 'drivers/gpu' failed > make[1]: *** [drivers/gpu] Error 2 > Makefile:1846: recipe for target 'drivers' failed > make: *** [drivers] Error 2 > > -- Jani Nikula, Intel Open Source Graphics Center
[Intel-gfx] [PATCH v2 2/2] drm/i915/vtd: rename functions to have the usual prefix
The prefix should tell where the function is to be found and where it
belongs.
Cc: Daniel Vetter
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_fb_pin.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 2 +-
drivers/gpu/drm/i915/gt/intel_ggtt.c | 6 +++---
drivers/gpu/drm/i915/gt/intel_gtt.c | 2 +-
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_driver.c | 2 +-
drivers/gpu/drm/i915/intel_pch.c | 2 +-
drivers/gpu/drm/i915/intel_vtd.c | 2 +-
drivers/gpu/drm/i915/intel_vtd.h | 14 +++---
9 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c
b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index d4196ea1bbca..543cae8d9e53 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -104,7 +104,7 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb,
* we should always have valid PTE following the scanout preventing
* the VT-d warning.
*/
- if (intel_scanout_needs_vtd_wa(dev_priv) && alignment < 256 * 1024)
+ if (intel_vtd_scanout_needs_wa(dev_priv) && alignment < 256 * 1024)
alignment = 256 * 1024;
/*
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index 01000f9071c4..e32da9ad9fde 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -127,7 +127,7 @@ i915_gem_shrink(struct i915_gem_ww_ctx *ww,
int err = 0;
/* CHV + VTD workaround use stop_machine(); need to trylock vm->mutex */
- bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915);
+ bool trylock_vm = !ww && intel_vtd_vm_no_concurrent_access_wa(i915);
trace_i915_gem_shrink(i915, target, shrink);
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c
b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 5444bdd20eb1..4eab2dd325a4 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -930,7 +930,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.cleanup = gen6_gmch_remove;
ggtt->vm.insert_page = gen8_ggtt_insert_page;
ggtt->vm.clear_range = nop_clear_range;
- if (intel_scanout_needs_vtd_wa(i915))
+ if (intel_vtd_scanout_needs_wa(i915))
ggtt->vm.clear_range = gen8_ggtt_clear_range;
ggtt->vm.insert_entries = gen8_ggtt_insert_entries;
@@ -939,7 +939,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
* Serialize GTT updates with aperture access on BXT if VT-d is on,
* and always on CHV.
*/
- if (intel_vm_no_concurrent_access_wa(i915)) {
+ if (intel_vtd_vm_no_concurrent_access_wa(i915)) {
ggtt->vm.insert_entries = bxt_vtd_ggtt_insert_entries__BKL;
ggtt->vm.insert_page= bxt_vtd_ggtt_insert_page__BKL;
ggtt->vm.bind_async_flags =
@@ -1078,7 +1078,7 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.alloc_scratch_dma = alloc_pt_dma;
ggtt->vm.clear_range = nop_clear_range;
- if (!HAS_FULL_PPGTT(i915) || intel_scanout_needs_vtd_wa(i915))
+ if (!HAS_FULL_PPGTT(i915) || intel_vtd_scanout_needs_wa(i915))
ggtt->vm.clear_range = gen6_ggtt_clear_range;
ggtt->vm.insert_page = gen6_ggtt_insert_page;
ggtt->vm.insert_entries = gen6_ggtt_insert_entries;
diff --git a/drivers/gpu/drm/i915/gt/intel_gtt.c
b/drivers/gpu/drm/i915/gt/intel_gtt.c
index 281d12908457..0c1a3cc13c3b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gtt.c
@@ -201,7 +201,7 @@ void i915_address_space_init(struct i915_address_space *vm,
int subclass)
mutex_init(>mutex);
lockdep_set_subclass(>mutex, subclass);
- if (!intel_vm_no_concurrent_access_wa(vm->i915)) {
+ if (!intel_vtd_vm_no_concurrent_access_wa(vm->i915)) {
i915_gem_shrinker_taints_mutex(vm->i915, >mutex);
} else {
/*
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 5ef9d0af8572..7b868057f433 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -65,7 +65,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
intel_device_info_print_static(INTEL_INFO(i915), );
intel_device_info_print_runtime(RUNTIME_INFO(i915), );
- i915_print_iommu_status(i915, );
+ intel_vtd_print_iommu_status(i915, );
intel_gt_info_print(_gt(i915)->info, );
intel_driver_caps_print(>caps, );
diff --git a/drivers/gpu/drm/i915/i915_driver.c
b/drivers/gpu/drm/i915/i915_driver.c
index fc3b531021d2..a89a74f712cd 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++
[Intel-gfx] [PATCH v2 1/2] drm/i915: split out intel_vtd.[ch] from i915_drv.h
Perhaps a bit contrived, but we need to reduce the size of i915_drv.h
from all the accumulated cruft.
v2: Turns out asm/hypervisor.h is not self-contained
Cc: Daniel Vetter
Cc: Ville Syrjälä
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/Makefile| 1 +
drivers/gpu/drm/i915/display/intel_bw.c | 1 +
drivers/gpu/drm/i915/display/intel_display.c | 5 +-
drivers/gpu/drm/i915/display/intel_fb_pin.c | 1 +
drivers/gpu/drm/i915/display/intel_fbc.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 1 +
drivers/gpu/drm/i915/gem/i915_gemfs.c| 1 +
drivers/gpu/drm/i915/gt/intel_ggtt.c | 6 +--
drivers/gpu/drm/i915/gt/intel_gtt.c | 1 +
drivers/gpu/drm/i915/i915_debugfs.c | 1 +
drivers/gpu/drm/i915/i915_driver.c | 7 +--
drivers/gpu/drm/i915/i915_drv.h | 37 --
drivers/gpu/drm/i915/i915_gpu_error.c| 1 +
drivers/gpu/drm/i915/intel_device_info.c | 3 +-
drivers/gpu/drm/i915/intel_pch.c | 1 +
drivers/gpu/drm/i915/intel_pm.c | 1 +
drivers/gpu/drm/i915/intel_vtd.c | 14 ++
drivers/gpu/drm/i915/intel_vtd.h | 51
19 files changed, 86 insertions(+), 49 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_vtd.c
create mode 100644 drivers/gpu/drm/i915/intel_vtd.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 1b62b9f65196..8e94638a7afc 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -54,6 +54,7 @@ i915-y += i915_driver.o \
intel_sbi.o \
intel_step.o \
intel_uncore.o \
+ intel_vtd.o \
intel_wakeref.o \
vlv_sideband.o \
vlv_suspend.o
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
b/drivers/gpu/drm/i915/display/intel_bw.c
index 2da4aacc956b..cc2b4a02bf59 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -11,6 +11,7 @@
#include "intel_display_types.h"
#include "intel_pcode.h"
#include "intel_pm.h"
+#include "intel_vtd.h"
/* Parameters for Qclk Geyserville (QGV) */
struct intel_qgv_point {
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index bf7ce684dd8e..00b07f00bb6f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -75,6 +75,7 @@
#include "g4x_dp.h"
#include "g4x_hdmi.h"
#include "i915_drv.h"
+#include "i9xx_plane.h"
#include "icl_dsi.h"
#include "intel_acpi.h"
#include "intel_atomic.h"
@@ -109,12 +110,12 @@
#include "intel_sprite.h"
#include "intel_tc.h"
#include "intel_vga.h"
-#include "i9xx_plane.h"
+#include "intel_vtd.h"
#include "skl_scaler.h"
#include "skl_universal_plane.h"
+#include "vlv_dsi.h"
#include "vlv_dsi_pll.h"
#include "vlv_sideband.h"
-#include "vlv_dsi.h"
static void intel_set_transcoder_timings(const struct intel_crtc_state
*crtc_state);
static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_fb_pin.c
b/drivers/gpu/drm/i915/display/intel_fb_pin.c
index 31c15e5fca95..d4196ea1bbca 100644
--- a/drivers/gpu/drm/i915/display/intel_fb_pin.c
+++ b/drivers/gpu/drm/i915/display/intel_fb_pin.c
@@ -14,6 +14,7 @@
#include "intel_dpt.h"
#include "intel_fb.h"
#include "intel_fb_pin.h"
+#include "intel_vtd.h"
static struct i915_vma *
intel_pin_fb_obj_dpt(struct drm_framebuffer *fb,
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
b/drivers/gpu/drm/i915/display/intel_fbc.c
index 465dc4e97ea8..7f9dc69972e9 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -48,6 +48,7 @@
#include "intel_display_types.h"
#include "intel_fbc.h"
#include "intel_frontbuffer.h"
+#include "intel_vtd.h"
#define for_each_fbc_id(__dev_priv, __fbc_id) \
for ((__fbc_id) = INTEL_FBC_A; (__fbc_id) < I915_MAX_FBCS;
(__fbc_id)++) \
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
index cc927e49d21f..01000f9071c4 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_shrinker.c
@@ -16,6 +16,7 @@
#include "gt/intel_gt_requests.h"
#include "i915_trace.h"
+#include "intel_vtd.h"
static bool swap_available(void)
{
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
index 7df50fd6cc7b..2a91715bd327 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_stolen.c
@@ -15,6 +15,7 @@
#include "i915_drv.h"
#include "i915_gem_stolen.h"
#include "i915_vgpu.h"
+#include "intel_vtd.h"
/*
* The BIOS typically reserves some of the system's memory for the exclusive
diff --git a/drivers/gpu/drm/i915/gem/i915_gemfs.c
Re: [Intel-gfx] [PATCH] drm/i915: Lock timeline mutex directly in error path of eb_pin_timeline
On 04/01/2022 23:30, Matthew Brost wrote:
Don't use the interruptable version of the timeline mutex lock in the
interruptible
error path of eb_pin_timeline as the cleanup must always happen.
v2:
(John Harrison)
- Don't check for interrupt during mutex lock
Fixes: 544460c33821 ("drm/i915: Multi-BB execbuf")
Signed-off-by: Matthew Brost
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index e9541244027a..e96e133cbb1f 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2516,9 +2516,9 @@ static int eb_pin_timeline(struct i915_execbuffer *eb,
struct intel_context *ce,
timeout) < 0) {
i915_request_put(rq);
- tl = intel_context_timeline_lock(ce);
+ mutex_lock(>timeline->mutex);
On the other hand it is more user friendly to handle signals (which
maybe does not matter in this case, not sure any longer how long hold
time it can have) but there is also a question of consistency within the
very function you are changing.
Apart from consistency, what about the parent-child magic
intel_context_timeline_lock does and you wouldn't have here?
And what about the very existence of intel_context_timeline_lock as a
component boundary separation API, if it is used inconsistently
throughout i915_gem_execbuffer.c?
Regards,
Tvrtko
intel_context_exit(ce);
- intel_context_timeline_unlock(tl);
+ mutex_unlock(>timeline->mutex);
if (nonblock)
return -EWOULDBLOCK;
Re: [Intel-gfx] [PATCH -next] drm/i915/fbc: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
On Wed, 05 Jan 2022, Yang Li wrote: > Fix the following coccicheck warning: > ./drivers/gpu/drm/i915/display/intel_fbc.c:1757:0-23: WARNING: > intel_fbc_debugfs_false_color_fops should be defined with > DEFINE_DEBUGFS_ATTRIBUTE > > Reported-by: Abaci Robot > Signed-off-by: Yang Li > --- > drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c > b/drivers/gpu/drm/i915/display/intel_fbc.c > index 160fd2bdafe5..a43f5b74d6ac 100644 > --- a/drivers/gpu/drm/i915/display/intel_fbc.c > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c > @@ -1754,7 +1754,7 @@ static int intel_fbc_debugfs_false_color_set(void > *data, u64 val) > return 0; > } > > -DEFINE_SIMPLE_ATTRIBUTE(intel_fbc_debugfs_false_color_fops, > +DEFINE_DEBUGFS_ATTRIBUTE(intel_fbc_debugfs_false_color_fops, > intel_fbc_debugfs_false_color_get, > intel_fbc_debugfs_false_color_set, > "%llu\n"); Please fix the indentation on the continuation lines. BR, Jani. -- Jani Nikula, Intel Open Source Graphics Center
