Re: [Intel-gfx] [PATCH v2 05/12] drm/i915/pvc: Remove additional 3D flags from PIPE_CONTROL
On Fri, May 06, 2022 at 10:23:41AM -0700, Lucas De Marchi wrote: > On Thu, May 05, 2022 at 02:38:05PM -0700, Matt Roper wrote: > > From: Stuart Summers > > > > Although we already strip 3D-specific flags from PIPE_CONTROL > > instructions when submitting to a compute engine, there are some > > additional flags that need to be removed when the platform as a whole > > lacks a 3D pipeline. Add those restrictions here. > > > > Bspec: 47112 > > Signed-off-by: Stuart Summers > > Signed-off-by: Matt Roper > > --- > > drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 18 -- > > drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 12 ++-- > > drivers/gpu/drm/i915/i915_drv.h | 2 ++ > > drivers/gpu/drm/i915/i915_pci.c | 3 ++- > > drivers/gpu/drm/i915/intel_device_info.h | 3 ++- > > 5 files changed, 28 insertions(+), 10 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > > b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > > index 3e13960615bd..11c72792573d 100644 > > --- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > > +++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c > > @@ -197,8 +197,10 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 > > mode) > > > > flags |= PIPE_CONTROL_CS_STALL; > > > > - if (engine->class == COMPUTE_CLASS) > > - flags &= ~PIPE_CONTROL_3D_FLAGS; > > + if (LACKS_3D_PIPELINE(engine->i915)) > > + flags &= ~PIPE_CONTROL_3D_ARCH_FLAGS; > > + else if (engine->class == COMPUTE_CLASS) > > + flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS; > > > > cs = intel_ring_begin(rq, 6); > > if (IS_ERR(cs)) > > @@ -227,8 +229,10 @@ int gen12_emit_flush_rcs(struct i915_request *rq, u32 > > mode) > > > > flags |= PIPE_CONTROL_CS_STALL; > > > > - if (engine->class == COMPUTE_CLASS) > > - flags &= ~PIPE_CONTROL_3D_FLAGS; > > + if (LACKS_3D_PIPELINE(engine->i915)) > > + flags &= ~PIPE_CONTROL_3D_ARCH_FLAGS; > > + else if (engine->class == COMPUTE_CLASS) > > + flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS; > > > > if (!HAS_FLAT_CCS(rq->engine->i915)) > > count = 8 + 4; > > @@ -716,8 +720,10 @@ u32 *gen12_emit_fini_breadcrumb_rcs(struct > > i915_request *rq, u32 *cs) > > /* Wa_1409600907 */ > > flags |= PIPE_CONTROL_DEPTH_STALL; > > > > - if (rq->engine->class == COMPUTE_CLASS) > > - flags &= ~PIPE_CONTROL_3D_FLAGS; > > + if (LACKS_3D_PIPELINE(rq->engine->i915)) > > + flags &= ~PIPE_CONTROL_3D_ARCH_FLAGS; > > + else if (rq->engine->class == COMPUTE_CLASS) > > + flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS; > > > > cs = gen12_emit_ggtt_write_rcs(cs, > >rq->fence.seqno, > > diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h > > b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h > > index 556bca3be804..900755f4b787 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h > > +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h > > @@ -288,8 +288,8 @@ > > #define PIPE_CONTROL_DEPTH_CACHE_FLUSH(1<<0) > > #define PIPE_CONTROL_GLOBAL_GTT (1<<2) /* in addr dword */ > > > > -/* 3D-related flags can't be set on compute engine */ > > -#define PIPE_CONTROL_3D_FLAGS (\ > > +/* 3D-related flags that can't be set on _engines_ that lack a 3D pipeline > > */ > > +#define PIPE_CONTROL_3D_ENGINE_FLAGS (\ > > PIPE_CONTROL_RENDER_TARGET_CACHE_FLUSH | \ > > PIPE_CONTROL_DEPTH_CACHE_FLUSH | \ > > PIPE_CONTROL_TILE_CACHE_FLUSH | \ > > @@ -300,6 +300,14 @@ > > PIPE_CONTROL_VF_CACHE_INVALIDATE | \ > > PIPE_CONTROL_GLOBAL_SNAPSHOT_RESET) > > > > +/* 3D-related flags that can't be set on _platforms_ that lack a 3D > > pipeline */ > > +#define PIPE_CONTROL_3D_ARCH_FLAGS ( \ > > names and comments here I think are confusing. In the code we do: > > if (LACKS_3D_PIPELINE(engine->i915)) > flags &= ~PIPE_CONTROL_3D_ARCH_FLAGS; > else if (engine->class == COMPUTE_CLASS) > flags &= ~PIPE_CONTROL_3D_ENGINE_FLAGS; > > coments give the _engines_ that lack a 3D pipeline doens't seem accurate > as bcs, vcs, vecs also lack a 3d pipeline. Maybe be explicit about the > flags being set on compute engine: PIPE_CONTROL_COMPUTE_ENGINE_FLAGS No, that's what we're trying to avoid here. Presence/absence of the 3D pipeline is a characteristic of the platform, not of the engine. A CCS engine doesn't have access to the 3D pipeline on any platform (that's what makes it different from an RCS), but we still wind up needing to program the PIPE_CONTROL flags for a CCS engine differently on a platform like PVC (which doesn't have a 3D pipeline at all) vs Xe_HP SDV (which does have a vestigial 3D pipeline,
Re: [Intel-gfx] [PATCH 3/8] drm/i915/pcode: Extend pcode functions for multiple gt's
On Tue, 10 May 2022 00:43:29 -0700, Jani Nikula wrote:
> On Tue, 10 May 2022, Tvrtko Ursulin wrote:
> > On 29/04/2022 20:56, Ashutosh Dixit wrote:
> >> diff --git a/drivers/gpu/drm/i915/i915_driver.c
> >> b/drivers/gpu/drm/i915/i915_driver.c
> >> index 90b0ce5051af..bc49eff38c6a 100644
> >> --- a/drivers/gpu/drm/i915/i915_driver.c
> >> +++ b/drivers/gpu/drm/i915/i915_driver.c
> >> @@ -520,6 +520,22 @@ static int i915_set_dma_info(struct drm_i915_private
> >> *i915)
> >>return ret;
> >> }
> >>
> >> +static int i915_pcode_init(struct drm_i915_private *i915)
> >> +{
> >> + struct intel_gt *gt;
> >> + int id, ret;
> >> +
> >> + for_each_gt(gt, i915, id) {
> >> + ret = intel_pcode_init(gt->uncore);
> >> + if (ret) {
> >> + drm_err(>i915->drm, "gt %d: intel_pcode_init failed
> >> %d\n", id, ret);
> >
> > A few nits..
> >
> > 1) All other/current logs use "gt%d" (no space).
> >
> > 2) intel_pcode_init also logs a drm_err - do we need two? I suggest
> > leaving this one only since it has more information.
> >
> > 3) It would have been nicer to have refactoring of intel_pcode_ to work
> > on uncore separate from adding for_each_gt.
>
> Yeah.
>
> Also the obvious first patch would've been to convert intel_pcode.c
> functions from struct drm_i915_private * to intel_uncore *.
Will fix up the first 2 points but about this last point, to not break
incremental compile all callers of the pcode functions also need to be
converted to i915->uncore or gt->uncore (so it's not possible to convert
just intel_pcode.c functions without also converting all callers, if that
was the intent of this comment, unless I am missing something).
But yes the i915_pcode_init() above can be separated out to a separate
patch so I can do that.
Thanks.
--
Ashutosh
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/reset: Add additional steps for Wa_22011802037 for execlist backend
== Series Details == Series: drm/i915/reset: Add additional steps for Wa_22011802037 for execlist backend URL : https://patchwork.freedesktop.org/series/103837/ State : success == Summary == CI Bug Log - changes from CI_DRM_11630_full -> Patchwork_103837v1_full Summary --- **SUCCESS** No regressions found. Participating hosts (13 -> 12) -- Missing(1): shard-dg1 Known issues Here are the changes found in Patchwork_103837v1_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [PASS][1] -> [FAIL][2] ([i915#2842]) +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-kbl4/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-tglb: [PASS][3] -> [FAIL][4] ([i915#2842]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-tglb1/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-tglb7/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-glk: [PASS][5] -> [FAIL][6] ([i915#2842]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-glk6/igt@gem_exec_fair@basic-p...@vcs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-glk1/igt@gem_exec_fair@basic-p...@vcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-iclb: NOTRUN -> [FAIL][7] ([i915#2842]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-iclb4/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_fair@basic-sync@rcs0: - shard-tglb: [PASS][8] -> [SKIP][9] ([i915#2848]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-tglb5/igt@gem_exec_fair@basic-s...@rcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-tglb2/igt@gem_exec_fair@basic-s...@rcs0.html * igt@gem_exec_flush@basic-uc-set-default: - shard-snb: [PASS][10] -> [SKIP][11] ([fdo#109271]) +3 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-snb2/igt@gem_exec_fl...@basic-uc-set-default.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-snb6/igt@gem_exec_fl...@basic-uc-set-default.html * igt@gem_exec_params@no-vebox: - shard-iclb: NOTRUN -> [SKIP][12] ([fdo#109283]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-iclb7/igt@gem_exec_par...@no-vebox.html * igt@gem_huc_copy@huc-copy: - shard-iclb: NOTRUN -> [SKIP][13] ([i915#2190]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-iclb7/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@parallel-random-engines: - shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-apl7/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_pxp@reject-modify-context-protection-off-3: - shard-iclb: NOTRUN -> [SKIP][15] ([i915#4270]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-iclb7/igt@gem_...@reject-modify-context-protection-off-3.html * igt@gem_render_copy@y-tiled-mc-ccs-to-yf-tiled-ccs: - shard-iclb: NOTRUN -> [SKIP][16] ([i915#768]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-iclb7/igt@gem_render_c...@y-tiled-mc-ccs-to-yf-tiled-ccs.html * igt@gen3_render_linear_blits: - shard-iclb: NOTRUN -> [SKIP][17] ([fdo#109289]) +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-iclb7/igt@gen3_render_linear_blits.html * igt@gen9_exec_parse@allowed-single: - shard-glk: [PASS][18] -> [DMESG-WARN][19] ([i915#5566] / [i915#716]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-glk7/igt@gen9_exec_pa...@allowed-single.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-glk1/igt@gen9_exec_pa...@allowed-single.html * igt@gen9_exec_parse@cmd-crossing-page: - shard-iclb: NOTRUN -> [SKIP][20] ([i915#2856]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-iclb7/igt@gen9_exec_pa...@cmd-crossing-page.html * igt@i915_pm_dc@dc3co-vpb-simulation: - shard-iclb: NOTRUN -> [SKIP][21] ([i915#658]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/shard-iclb5/igt@i915_pm...@dc3co-vpb-simulation.html * igt@i915_pm_rpm@modeset-non-lpsp: - shard-iclb: NOTRUN -> [SKIP][22] ([fdo#110892])
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Flush TLBs for all the tiles
== Series Details ==
Series: drm/i915/gem: Flush TLBs for all the tiles
URL : https://patchwork.freedesktop.org/series/103831/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11630_full -> Patchwork_103831v1_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (13 -> 12)
--
Missing(1): shard-dg1
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_103831v1_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_reloc@basic-concurrent0:
- {shard-rkl}:[PASS][1] -> [INCOMPLETE][2] +1 similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-rkl-1/igt@gem_exec_re...@basic-concurrent0.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-rkl-5/igt@gem_exec_re...@basic-concurrent0.html
Known issues
Here are the changes found in Patchwork_103831v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_eio@in-flight-contexts-10ms:
- shard-apl: [PASS][3] -> [TIMEOUT][4] ([i915#3063])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-apl1/igt@gem_...@in-flight-contexts-10ms.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-apl1/igt@gem_...@in-flight-contexts-10ms.html
* igt@gem_eio@unwedge-stress:
- shard-tglb: [PASS][5] -> [FAIL][6] ([i915#5784])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-tglb6/igt@gem_...@unwedge-stress.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-tglb8/igt@gem_...@unwedge-stress.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][7] -> [FAIL][8] ([i915#2846])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-glk3/igt@gem_exec_f...@basic-deadline.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-glk6/igt@gem_exec_f...@basic-deadline.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [PASS][9] -> [FAIL][10] ([i915#2842]) +2 similar
issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs0.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs0.html
- shard-apl: NOTRUN -> [FAIL][11] ([i915#2842])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-apl1/igt@gem_exec_fair@basic-n...@vcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [PASS][12] -> [FAIL][13] ([i915#2842]) +2 similar
issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-glk6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-glk3/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-tglb: [PASS][14] -> [FAIL][15] ([i915#2842])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-tglb6/igt@gem_exec_fair@basic-p...@rcs0.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-tglb8/igt@gem_exec_fair@basic-p...@rcs0.html
* igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][16] ([i915#2842])
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-iclb2/igt@gem_exec_fair@basic-p...@vcs1.html
* igt@gem_exec_flush@basic-wb-pro-default:
- shard-snb: [PASS][17] -> [SKIP][18] ([fdo#109271]) +1 similar
issue
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-snb4/igt@gem_exec_fl...@basic-wb-pro-default.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-snb6/igt@gem_exec_fl...@basic-wb-pro-default.html
* igt@gem_exec_params@no-vebox:
- shard-iclb: NOTRUN -> [SKIP][19] ([fdo#109283])
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-iclb5/igt@gem_exec_par...@no-vebox.html
* igt@gem_huc_copy@huc-copy:
- shard-iclb: NOTRUN -> [SKIP][20] ([i915#2190])
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-iclb5/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-kbl: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4613])
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/shard-kbl7/igt@gem_lmem_swapp...@heavy-verify-random.html
* igt@gem_lmem_swapping@parallel-random-engines:
- shard-apl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#4613])
[22]:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: disable HPD workers before display driver unregister (rev2)
== Series Details == Series: drm/i915/display: disable HPD workers before display driver unregister (rev2) URL : https://patchwork.freedesktop.org/series/103811/ State : success == Summary == CI Bug Log - changes from CI_DRM_11630_full -> Patchwork_103811v2_full Summary --- **SUCCESS** No regressions found. Participating hosts (13 -> 12) -- Missing(1): shard-dg1 Known issues Here are the changes found in Patchwork_103811v2_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][1] -> [FAIL][2] ([i915#5784]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-tglb6/igt@gem_...@unwedge-stress.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-tglb3/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [PASS][3] -> [FAIL][4] ([i915#2842]) +5 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs0.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-tglb: [PASS][5] -> [FAIL][6] ([i915#2842]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-tglb6/igt@gem_exec_fair@basic-p...@rcs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-tglb3/igt@gem_exec_fair@basic-p...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-iclb: NOTRUN -> [FAIL][7] ([i915#2842]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-iclb1/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-glk: [PASS][8] -> [FAIL][9] ([i915#2842]) +2 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-glk6/igt@gem_exec_fair@basic-p...@vecs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-glk6/igt@gem_exec_fair@basic-p...@vecs0.html * igt@gem_exec_flush@basic-batch-kernel-default-uc: - shard-snb: [PASS][10] -> [SKIP][11] ([fdo#109271]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-snb5/igt@gem_exec_fl...@basic-batch-kernel-default-uc.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-snb6/igt@gem_exec_fl...@basic-batch-kernel-default-uc.html * igt@gem_lmem_swapping@heavy-verify-random: - shard-kbl: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-kbl4/igt@gem_lmem_swapp...@heavy-verify-random.html * igt@gem_ppgtt@flink-and-close-vma-leak: - shard-skl: [PASS][13] -> [FAIL][14] ([i915#644]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-skl6/igt@gem_pp...@flink-and-close-vma-leak.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-skl2/igt@gem_pp...@flink-and-close-vma-leak.html * igt@i915_pm_dc@dc6-dpms: - shard-iclb: [PASS][15] -> [FAIL][16] ([i915#454]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-iclb5/igt@i915_pm...@dc6-dpms.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-iclb3/igt@i915_pm...@dc6-dpms.html * igt@i915_pm_rpm@modeset-pc8-residency-stress: - shard-apl: NOTRUN -> [SKIP][17] ([fdo#109271]) +45 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-apl1/igt@i915_pm_...@modeset-pc8-residency-stress.html * igt@i915_suspend@sysfs-reader: - shard-apl: [PASS][18] -> [DMESG-WARN][19] ([i915#180]) +1 similar issue [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-apl4/igt@i915_susp...@sysfs-reader.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-apl3/igt@i915_susp...@sysfs-reader.html * igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc: - shard-apl: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#3886]) +1 similar issue [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-apl1/igt@kms_ccs@pipe-a-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs: - shard-iclb: NOTRUN -> [SKIP][21] ([fdo#109278]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/shard-iclb7/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs.html * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs: - shard-kbl: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#3886]) +3 similar issues [22]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for Clear TLB caches in all tiles when object is removed
== Series Details == Series: Clear TLB caches in all tiles when object is removed URL : https://patchwork.freedesktop.org/series/103846/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11631 -> Patchwork_103846v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_103846v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_103846v1, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/index.html Participating hosts (43 -> 43) -- Additional (3): fi-kbl-soraka fi-rkl-11600 bat-dg1-6 Missing(3): fi-ctg-p8600 fi-bsw-cyan fi-tgl-dsi Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_103846v1: ### IGT changes ### Possible regressions * igt@gem_busy@busy@all: - fi-pnv-d510:[PASS][1] -> [DMESG-WARN][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-pnv-d510/igt@gem_busy@b...@all.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-pnv-d510/igt@gem_busy@b...@all.html - fi-bwr-2160:[PASS][3] -> [DMESG-WARN][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-bwr-2160/igt@gem_busy@b...@all.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bwr-2160/igt@gem_busy@b...@all.html - fi-hsw-4770:[PASS][5] -> [DMESG-WARN][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-hsw-4770/igt@gem_busy@b...@all.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-hsw-4770/igt@gem_busy@b...@all.html - fi-ivb-3770:[PASS][7] -> [DMESG-WARN][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-ivb-3770/igt@gem_busy@b...@all.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-ivb-3770/igt@gem_busy@b...@all.html * igt@gem_close_race@basic-process: - fi-blb-e6850: [PASS][9] -> [INCOMPLETE][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-blb-e6850/igt@gem_close_r...@basic-process.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-blb-e6850/igt@gem_close_r...@basic-process.html * igt@runner@aborted: - fi-ilk-650: NOTRUN -> [FAIL][11] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-ilk-650/igt@run...@aborted.html - fi-elk-e7500: NOTRUN -> [FAIL][12] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-elk-e7500/igt@run...@aborted.html Known issues Here are the changes found in Patchwork_103846v1 that come from known issues: ### IGT changes ### Issues hit * igt@runner@aborted: - fi-rkl-11600: NOTRUN -> [FAIL][13] ([i915#5602]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-rkl-11600/igt@run...@aborted.html - fi-snb-2600:NOTRUN -> [FAIL][14] ([i915#5602]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-snb-2600/igt@run...@aborted.html - fi-kbl-x1275: NOTRUN -> [FAIL][15] ([i915#5602] / [i915#5917]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-kbl-x1275/igt@run...@aborted.html - fi-bsw-kefka: NOTRUN -> [FAIL][16] ([i915#3690]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bsw-kefka/igt@run...@aborted.html - fi-bdw-gvtdvm: NOTRUN -> [FAIL][17] ([i915#5917]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bdw-gvtdvm/igt@run...@aborted.html - fi-cfl-8700k: NOTRUN -> [FAIL][18] ([i915#5917]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-cfl-8700k/igt@run...@aborted.html - fi-cfl-8109u: NOTRUN -> [FAIL][19] ([i915#5602] / [i915#5917]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-cfl-8109u/igt@run...@aborted.html - fi-bsw-nick:NOTRUN -> [FAIL][20] ([i915#3690]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bsw-nick/igt@run...@aborted.html - fi-kbl-8809g: NOTRUN -> [FAIL][21] ([i915#5602] / [i915#5917]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-kbl-8809g/igt@run...@aborted.html - fi-snb-2520m: NOTRUN -> [FAIL][22] ([i915#5602]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-snb-2520m/igt@run...@aborted.html - fi-bdw-5557u: NOTRUN -> [FAIL][23] ([i915#5917]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bdw-5557u/igt@run...@aborted.html - fi-bwr-2160:NOTRUN -> [FAIL][24] ([i915#4312]) [24]:
[Intel-gfx] ✓ Fi.CI.IGT: success for ttm for internal (rev3)
== Series Details == Series: ttm for internal (rev3) URL : https://patchwork.freedesktop.org/series/103492/ State : success == Summary == CI Bug Log - changes from CI_DRM_11630_full -> Patchwork_103492v3_full Summary --- **SUCCESS** No regressions found. Participating hosts (13 -> 12) -- Missing(1): shard-dg1 Known issues Here are the changes found in Patchwork_103492v3_full that come from known issues: ### IGT changes ### Issues hit * igt@gem_eio@unwedge-stress: - shard-tglb: [PASS][1] -> [TIMEOUT][2] ([i915#3063]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-tglb6/igt@gem_...@unwedge-stress.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-tglb6/igt@gem_...@unwedge-stress.html * igt@gem_exec_fair@basic-deadline: - shard-glk: [PASS][3] -> [FAIL][4] ([i915#2846]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-glk3/igt@gem_exec_f...@basic-deadline.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-glk9/igt@gem_exec_f...@basic-deadline.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-kbl: [PASS][5] -> [FAIL][6] ([i915#2842]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-kbl4/igt@gem_exec_fair@basic-none-r...@rcs0.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-kbl7/igt@gem_exec_fair@basic-none-r...@rcs0.html * igt@gem_exec_fair@basic-none-share@rcs0: - shard-tglb: [PASS][7] -> [FAIL][8] ([i915#2842]) +1 similar issue [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-tglb2/igt@gem_exec_fair@basic-none-sh...@rcs0.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-tglb7/igt@gem_exec_fair@basic-none-sh...@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-apl: NOTRUN -> [FAIL][9] ([i915#2842]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-apl3/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-glk6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-glk4/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-iclb: NOTRUN -> [FAIL][12] ([i915#2842]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-iclb1/igt@gem_exec_fair@basic-p...@vcs1.html * igt@gem_exec_flush@basic-uc-set-default: - shard-snb: [PASS][13] -> [SKIP][14] ([fdo#109271]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-snb2/igt@gem_exec_fl...@basic-uc-set-default.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-snb6/igt@gem_exec_fl...@basic-uc-set-default.html * igt@gem_exec_params@no-vebox: - shard-iclb: NOTRUN -> [SKIP][15] ([fdo#109283]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-iclb5/igt@gem_exec_par...@no-vebox.html * igt@gem_exec_whisper@basic-fds-priority: - shard-skl: [PASS][16] -> [DMESG-WARN][17] ([i915#1982]) +1 similar issue [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/shard-skl9/igt@gem_exec_whis...@basic-fds-priority.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-skl8/igt@gem_exec_whis...@basic-fds-priority.html * igt@gem_huc_copy@huc-copy: - shard-iclb: NOTRUN -> [SKIP][18] ([i915#2190]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-iclb5/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@heavy-verify-random: - shard-kbl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4613]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-kbl4/igt@gem_lmem_swapp...@heavy-verify-random.html * igt@gem_lmem_swapping@parallel-random-engines: - shard-apl: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#4613]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-apl3/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_pxp@reject-modify-context-protection-off-3: - shard-iclb: NOTRUN -> [SKIP][21] ([i915#4270]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-iclb5/igt@gem_...@reject-modify-context-protection-off-3.html * igt@gem_render_copy@y-tiled-mc-ccs-to-yf-tiled-ccs: - shard-iclb: NOTRUN -> [SKIP][22] ([i915#768]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/shard-iclb5/igt@gem_render_c...@y-tiled-mc-ccs-to-yf-tiled-ccs.html *
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Clear TLB caches in all tiles when object is removed
== Series Details == Series: Clear TLB caches in all tiles when object is removed URL : https://patchwork.freedesktop.org/series/103846/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. - +drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy expression type 31 +drivers/gpu/drm/i915/gt/intel_reset.c:1391:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clear TLB caches in all tiles when object is removed
== Series Details == Series: Clear TLB caches in all tiles when object is removed URL : https://patchwork.freedesktop.org/series/103846/ State : warning == Summary == Error: dim checkpatch failed f8c5bb9dff90 drm/i915/gt: Ignore TLB invalidations on idle engines -:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'gt' - possible side-effects? #22: FILE: drivers/gpu/drm/i915/gt/intel_gt_pm.h:58: +#define with_intel_gt_pm_if_awake(gt, tmp) \ + for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \ +intel_gt_pm_put(gt), tmp = 0) -:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'tmp' - possible side-effects? #22: FILE: drivers/gpu/drm/i915/gt/intel_gt_pm.h:58: +#define with_intel_gt_pm_if_awake(gt, tmp) \ + for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \ +intel_gt_pm_put(gt), tmp = 0) total: 0 errors, 0 warnings, 2 checks, 10 lines checked 20649dd77c54 drm/i915/gem: Flush TLBs for all the tiles when clearing an obj ce3788fd518e drm/i915/gt: Skip TLB invalidation if the engine is not awake
[Intel-gfx] [PATCH v4 0/3] Clear TLB caches in all tiles when object is removed
Hi, Maybe I should not send patches this late at night as I end up messing things up and spamming sleeping people. Sorry for this version 4. The real fix is in patch 2. The rest is a helper that adds the with_intel_gt_pm_if_awake() (from Chris) and one more check on the status of the engine before accessing it for clearing the TLB. Andi Changelog = v3 -> v4 - Fix e-mail mismatch in author and in SoB (Sorry!). v2 -> v3 (v2: https://patchwork.freedesktop.org/series/103835/) - Add missing header file that was causing a compmile error. - Fix wrong patch formatting. v1 -> v2 (v1: https://patchwork.freedesktop.org/series/103831/) - Add with_intel_gt_pm_if_awake() macro for gt specific wakeref. - Check if an engine is awake before invalidating its TLB. Andi Shyti (2): drm/i915/gem: Flush TLBs for all the tiles when clearing an obj drm/i915/gt: Skip TLB invalidation if the engine is not awake Chris Wilson (1): drm/i915/gt: Ignore TLB invalidations on idle engines drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +--- drivers/gpu/drm/i915/gt/intel_gt.c| 4 drivers/gpu/drm/i915/gt/intel_gt_pm.h | 4 3 files changed, 17 insertions(+), 3 deletions(-) -- 2.36.1
[Intel-gfx] [PATCH v4 3/3] drm/i915/gt: Skip TLB invalidation if the engine is not awake
We want to check if the engine is awake first before invalidating its cache. Suggested-by: Chris Wilson Signed-off-by: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index 034182f85501b..a1dc9f4203c2b 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -12,6 +12,7 @@ #include "i915_drv.h" #include "intel_context.h" #include "intel_engine_regs.h" +#include "intel_engine_pm.h" #include "intel_gt.h" #include "intel_gt_buffer_pool.h" #include "intel_gt_clock_utils.h" @@ -1219,6 +1220,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) const unsigned int timeout_ms = 4; struct reg_and_bit rb; + if (!intel_engine_pm_is_awake(engine)) + continue; + rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num); if (!i915_mmio_reg_offset(rb.reg)) continue; -- 2.36.1
[Intel-gfx] [PATCH v4 2/3] drm/i915/gem: Flush TLBs for all the tiles when clearing an obj
During object cleanup we invalidate the TLBs but we do it only
for gt0. Invalidate the caches for all the tiles.
Reported-by: Chris Wilson
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 97c820eee115a..37d23e328bd0c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -13,6 +13,7 @@
#include "i915_gem_mman.h"
#include "gt/intel_gt.h"
+#include "gt/intel_gt_pm.h"
void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
struct sg_table *pages,
@@ -217,10 +218,15 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object
*obj)
if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, >flags)) {
struct drm_i915_private *i915 = to_i915(obj->base.dev);
- intel_wakeref_t wakeref;
+ struct intel_gt *gt;
+ int i;
- with_intel_runtime_pm_if_active(>runtime_pm, wakeref)
- intel_gt_invalidate_tlbs(to_gt(i915));
+ for_each_gt(gt, i915, i) {
+ int tmp;
+
+ with_intel_gt_pm_if_awake(gt, tmp)
+ intel_gt_invalidate_tlbs(gt);
+ }
}
return pages;
--
2.36.1
[Intel-gfx] [PATCH v4 1/3] drm/i915/gt: Ignore TLB invalidations on idle engines
From: Chris Wilson
As an extension of the current skip TLB invalidations if the device is
powered down, we recognised that prior to any engine activity, all the
TLBs are explicitly invalidated. Thus anytime we know the engine is
asleep, we can skip invalidating the TLBs on that engine.
Signed-off-by: Chris Wilson
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index bc898df7a48cc..3b1fbce7ea369 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -55,6 +55,10 @@ static inline void intel_gt_pm_might_put(struct intel_gt *gt)
for (tmp = 1, intel_gt_pm_get(gt); tmp; \
intel_gt_pm_put(gt), tmp = 0)
+#define with_intel_gt_pm_if_awake(gt, tmp) \
+ for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \
+intel_gt_pm_put(gt), tmp = 0)
+
static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
{
return intel_wakeref_wait_for_idle(>wakeref);
--
2.36.1
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dmc: Add MMIO range restrictions
== Series Details ==
Series: drm/i915/dmc: Add MMIO range restrictions
URL : https://patchwork.freedesktop.org/series/103844/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11631 -> Patchwork_103844v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/index.html
Participating hosts (43 -> 39)
--
Additional (1): fi-kbl-soraka
Missing(5): bat-dg1-5 bat-dg2-8 fi-bsw-cyan fi-cfl-guc fi-ctg-p8600
Known issues
Here are the changes found in Patchwork_103844v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_exec_fence@basic-busy@bcs0:
- fi-kbl-soraka: NOTRUN -> [SKIP][1] ([fdo#109271]) +9 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-kbl-soraka/igt@gem_exec_fence@basic-b...@bcs0.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3
similar issues
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][4] ([i915#1886])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-4770:NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-hsw-4770/igt@kms_chamel...@common-hpd-after-suspend.html
* igt@kms_chamelium@dp-edid-read:
- fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +7
similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-kbl-soraka/igt@kms_chamel...@dp-edid-read.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#533])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-kbl-soraka/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@smem:
- {fi-ehl-2}: [DMESG-WARN][8] ([i915#5122]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-ehl-2/igt@gem_exec_suspend@basic...@smem.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-ehl-2/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@gt_mocs:
- fi-rkl-guc: [DMESG-WARN][10] -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-rkl-guc/igt@i915_selftest@live@gt_mocs.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-rkl-guc/igt@i915_selftest@live@gt_mocs.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[INCOMPLETE][12] ([i915#4785]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103844v1/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5879]: https://gitlab.freedesktop.org/drm/intel/issues/5879
[i915#5950]: https://gitlab.freedesktop.org/drm/intel/issues/5950
Build changes
-
* Linux: CI_DRM_11631 -> Patchwork_103844v1
CI-20190529: 20190529
CI_DRM_11631: 410072c9a105aa0f2d37b8793ae5e5b43f6fa066 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6471: 1d6816f1200520f936a799b7b0ef2e6f396abb16 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_103844v1: 410072c9a105aa0f2d37b8793ae5e5b43f6fa066 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
9cfdee77932a drm/i915/dmc: Add MMIO range restrictions
== Logs ==
For more details see:
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: disable HPD workers before display driver unregister (rev4)
== Series Details == Series: drm/i915/display: disable HPD workers before display driver unregister (rev4) URL : https://patchwork.freedesktop.org/series/103811/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11631 -> Patchwork_103811v4 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_103811v4 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_103811v4, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/index.html Participating hosts (43 -> 39) -- Additional (2): fi-kbl-soraka fi-icl-u2 Missing(6): bat-dg1-5 bat-dg2-8 bat-dg2-9 fi-bsw-cyan fi-ctg-p8600 fi-hsw-4770 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_103811v4: ### IGT changes ### Possible regressions * igt@core_hotunplug@unbind-rebind: - fi-skl-6700k2: [PASS][1] -> [DMESG-WARN][2] +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-skl-6700k2/igt@core_hotunp...@unbind-rebind.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-skl-6700k2/igt@core_hotunp...@unbind-rebind.html - fi-elk-e7500: [PASS][3] -> [DMESG-WARN][4] +2 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-elk-e7500/igt@core_hotunp...@unbind-rebind.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-elk-e7500/igt@core_hotunp...@unbind-rebind.html - fi-ivb-3770:[PASS][5] -> [DMESG-WARN][6] +2 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-ivb-3770/igt@core_hotunp...@unbind-rebind.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-ivb-3770/igt@core_hotunp...@unbind-rebind.html - fi-ilk-650: [PASS][7] -> [DMESG-WARN][8] +2 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-ilk-650/igt@core_hotunp...@unbind-rebind.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-ilk-650/igt@core_hotunp...@unbind-rebind.html - fi-bsw-n3050: [PASS][9] -> [DMESG-WARN][10] +2 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-bsw-n3050/igt@core_hotunp...@unbind-rebind.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-bsw-n3050/igt@core_hotunp...@unbind-rebind.html - fi-cfl-guc: [PASS][11] -> [DMESG-WARN][12] +3 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-cfl-guc/igt@core_hotunp...@unbind-rebind.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-cfl-guc/igt@core_hotunp...@unbind-rebind.html - fi-kbl-soraka: NOTRUN -> [DMESG-WARN][13] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-kbl-soraka/igt@core_hotunp...@unbind-rebind.html - fi-bxt-dsi: [PASS][14] -> [DMESG-WARN][15] +2 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-bxt-dsi/igt@core_hotunp...@unbind-rebind.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-bxt-dsi/igt@core_hotunp...@unbind-rebind.html - fi-snb-2600:[PASS][16] -> [DMESG-WARN][17] +2 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-snb-2600/igt@core_hotunp...@unbind-rebind.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-snb-2600/igt@core_hotunp...@unbind-rebind.html * igt@i915_module_load@reload: - fi-glk-j4005: [PASS][18] -> [DMESG-WARN][19] +3 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-glk-j4005/igt@i915_module_l...@reload.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-glk-j4005/igt@i915_module_l...@reload.html - fi-icl-u2: NOTRUN -> [DMESG-WARN][20] +3 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-icl-u2/igt@i915_module_l...@reload.html - fi-adl-ddr5:[PASS][21] -> [DMESG-WARN][22] +3 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-adl-ddr5/igt@i915_module_l...@reload.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-adl-ddr5/igt@i915_module_l...@reload.html - fi-blb-e6850: [PASS][23] -> [DMESG-WARN][24] +1 similar issue [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-blb-e6850/igt@i915_module_l...@reload.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v4/fi-blb-e6850/igt@i915_module_l...@reload.html - fi-snb-2520m: [PASS][25] -> [DMESG-WARN][26] +2 similar
[Intel-gfx] [CI] drm/i915/dmc: Add MMIO range restrictions
Bspec has added some steps that check forDMC MMIO range before
programming them
v2: Fix for CI
v3: move register defines to .h (Anusha)
- Check MMIO restrictions per pipe
- Add MMIO restricton for v1 dmc header as well (Lucas)
v4: s/_PICK/_PICK_EVEN and use it only for Pipe DMC scenario.
- clean up sanity check logic.(Lucas)
- Add MMIO range for RKL as well.(Anusha)
v5: Use DISPLAY_VER instead of per platform check (Lucas)
BSpec: 49193
Cc:
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
Reviewed-by: Lucas De Marchi
---
drivers/gpu/drm/i915/display/intel_dmc.c | 44 +++
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 18 +++-
2 files changed, 61 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c
b/drivers/gpu/drm/i915/display/intel_dmc.c
index 2f01aca4d981..34d00f5aff25 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -378,6 +378,44 @@ static void dmc_set_fw_offset(struct intel_dmc *dmc,
}
}
+static bool dmc_mmio_addr_sanity_check(struct intel_dmc *dmc,
+ const u32 *mmioaddr, u32 mmio_count,
+ int header_ver, u8 dmc_id)
+{
+ struct drm_i915_private *i915 = container_of(dmc, typeof(*i915), dmc);
+ u32 start_range, end_range;
+ int i;
+
+ if (dmc_id >= DMC_FW_MAX) {
+ drm_warn(>drm, "Unsupported firmware id %u\n", dmc_id);
+ return false;
+ }
+
+ if (header_ver == 1) {
+ start_range = DMC_MMIO_START_RANGE;
+ end_range = DMC_MMIO_END_RANGE;
+ } else if (dmc_id == DMC_FW_MAIN) {
+ start_range = TGL_MAIN_MMIO_START;
+ end_range = TGL_MAIN_MMIO_END;
+ } else if (DISPLAY_VER(i915) >= 13) {
+ start_range = ADLP_PIPE_MMIO_START;
+ end_range = ADLP_PIPE_MMIO_END;
+ } else if (DISPLAY_VER(i915) >= 12) {
+ start_range = TGL_PIPE_MMIO_START(dmc_id);
+ end_range = TGL_PIPE_MMIO_END(dmc_id);
+ } else {
+ drm_warn(>drm, "Unknown mmio range for sanity check");
+ return false;
+ }
+
+ for (i = 0; i < mmio_count; i++) {
+ if (mmioaddr[i] < start_range || mmioaddr[i] > end_range)
+ return false;
+ }
+
+ return true;
+}
+
static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
const struct intel_dmc_header_base *dmc_header,
size_t rem_size, u8 dmc_id)
@@ -447,6 +485,12 @@ static u32 parse_dmc_fw_header(struct intel_dmc *dmc,
return 0;
}
+ if (!dmc_mmio_addr_sanity_check(dmc, mmioaddr, mmio_count,
+ dmc_header->header_ver, dmc_id)) {
+ drm_err(>drm, "DMC firmware has Wrong MMIO Addresses\n");
+ return 0;
+ }
+
for (i = 0; i < mmio_count; i++) {
dmc_info->mmioaddr[i] = _MMIO(mmioaddr[i]);
dmc_info->mmiodata[i] = mmiodata[i];
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
index d65e698832eb..67e14eb96a7a 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_dmc_regs.h
@@ -16,7 +16,23 @@
#define DMC_LAST_WRITE _MMIO(0x8F034)
#define DMC_LAST_WRITE_VALUE 0xc003b400
#define DMC_MMIO_START_RANGE 0x8
-#define DMC_MMIO_END_RANGE 0x8
+#define DMC_MMIO_END_RANGE 0x8
+#define DMC_V1_MMIO_START_RANGE0x8
+#define TGL_MAIN_MMIO_START0x8F000
+#define TGL_MAIN_MMIO_END 0x8
+#define _TGL_PIPEA_MMIO_START 0x92000
+#define _TGL_PIPEA_MMIO_END0x93FFF
+#define _TGL_PIPEB_MMIO_START 0x96000
+#define _TGL_PIPEB_MMIO_END0x97FFF
+#define ADLP_PIPE_MMIO_START 0x5F000
+#define ADLP_PIPE_MMIO_END 0x5
+
+#define TGL_PIPE_MMIO_START(dmc_id)_PICK_EVEN(((dmc_id) - 1),
_TGL_PIPEA_MMIO_START,\
+ _TGL_PIPEB_MMIO_START)
+
+#define TGL_PIPE_MMIO_END(dmc_id) _PICK_EVEN(((dmc_id) - 1),
_TGL_PIPEA_MMIO_END,\
+ _TGL_PIPEB_MMIO_END)
+
#define SKL_DMC_DC3_DC5_COUNT _MMIO(0x80030)
#define SKL_DMC_DC5_DC6_COUNT _MMIO(0x8002C)
#define BXT_DMC_DC3_DC5_COUNT _MMIO(0x80038)
--
2.25.1
[Intel-gfx] ✓ Fi.CI.IGT: success for Fixes for selective fetch area calculation (rev3)
== Series Details == Series: Fixes for selective fetch area calculation (rev3) URL : https://patchwork.freedesktop.org/series/103659/ State : success == Summary == CI Bug Log - changes from CI_DRM_11629_full -> Patchwork_103659v3_full Summary --- **SUCCESS** No regressions found. Participating hosts (12 -> 12) -- No changes in participating hosts Known issues Here are the changes found in Patchwork_103659v3_full that come from known issues: ### CI changes ### Issues hit * boot: - shard-skl: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23]) -> ([PASS][24], [PASS][25], [PASS][26], [PASS][27], [FAIL][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44]) ([i915#5032]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl9/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl9/boot.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl8/boot.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl8/boot.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl8/boot.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl8/boot.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl7/boot.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl7/boot.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl7/boot.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl6/boot.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl6/boot.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl5/boot.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl5/boot.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl4/boot.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl3/boot.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl2/boot.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl2/boot.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl2/boot.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl1/boot.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl1/boot.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl1/boot.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl10/boot.html [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/shard-skl10/boot.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl4/boot.html [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl4/boot.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl4/boot.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl4/boot.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl5/boot.html [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl5/boot.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl6/boot.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl6/boot.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl7/boot.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl7/boot.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl8/boot.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl8/boot.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl9/boot.html [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl9/boot.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl9/boot.html [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl10/boot.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl10/boot.html [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl10/boot.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl1/boot.html [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/shard-skl1/boot.html [44]:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/reset: Add additional steps for Wa_22011802037 for execlist backend
== Series Details ==
Series: drm/i915/reset: Add additional steps for Wa_22011802037 for execlist
backend
URL : https://patchwork.freedesktop.org/series/103837/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11630 -> Patchwork_103837v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/index.html
Participating hosts (44 -> 42)
--
Additional (2): fi-bdw-5557u bat-dg2-9
Missing(4): fi-ctg-p8600 fi-bsw-cyan fi-bdw-samus bat-dg1-5
Known issues
Here are the changes found in Patchwork_103837v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@gem:
- fi-blb-e6850: NOTRUN -> [DMESG-FAIL][1] ([i915#4528])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/fi-blb-e6850/igt@i915_selftest@l...@gem.html
* igt@i915_selftest@live@hangcheck:
- fi-bdw-5557u: NOTRUN -> [INCOMPLETE][2] ([i915#3921])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/fi-bdw-5557u/igt@i915_selftest@l...@hangcheck.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-pnv-d510:NOTRUN -> [SKIP][3] ([fdo#109271])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/fi-pnv-d510/igt@kms_chamel...@common-hpd-after-suspend.html
* igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u: NOTRUN -> [SKIP][4] ([fdo#109271] / [fdo#111827]) +7
similar issues
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-bdw-5557u: NOTRUN -> [SKIP][5] ([fdo#109271]) +14 similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/fi-bdw-5557u/igt@kms_setm...@basic-clone-single-crtc.html
Possible fixes
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [DMESG-FAIL][6] ([i915#4528]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/fi-blb-e6850/igt@i915_selftest@l...@requests.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/fi-blb-e6850/igt@i915_selftest@l...@requests.html
- fi-pnv-d510:[DMESG-FAIL][8] ([i915#4528]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/fi-pnv-d510/igt@i915_selftest@l...@requests.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103837v1/fi-pnv-d510/igt@i915_selftest@l...@requests.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5275]: https://gitlab.freedesktop.org/drm/intel/issues/5275
[i915#5763]: https://gitlab.freedesktop.org/drm/intel/issues/5763
[i915#5879]: https://gitlab.freedesktop.org/drm/intel/issues/5879
[i915#5885]: https://gitlab.freedesktop.org/drm/intel/issues/5885
Build changes
-
* Linux: CI_DRM_11630 -> Patchwork_103837v1
CI-20190529: 20190529
CI_DRM_11630: fa53ea1e866d739663dbcfab3afa4d0f5e3a12e1 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_6471: 1d6816f1200520f936a799b7b0ef2e6f396abb16 @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_103837v1: fa53ea1e866d739663dbcfab3afa4d0f5e3a12e1 @
git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
Re: [Intel-gfx] ✓ Fi.CI.IGT: success for i915: Introduce Ponte Vecchio (rev3)
On Fri, May 06, 2022 at 04:29:37AM +, Patchwork wrote:
> == Series Details ==
>
> Series: i915: Introduce Ponte Vecchio (rev3)
> URL : https://patchwork.freedesktop.org/series/103443/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_11613_full -> Patchwork_103443v3_full
>
>
> Summary
> ---
>
> **SUCCESS**
>
> No regressions found.
Pushed the reviewed patches (all except the two forcewake patches and
the PIPE_CONTROL patch) to drm-intel-gt-next.
Thanks for the reviews.
Matt
>
>
>
> Participating hosts (10 -> 12)
> --
>
> Additional (2): shard-rkl shard-tglu
>
> Possible new issues
> ---
>
> Here are the unknown changes that may have been introduced in
> Patchwork_103443v3_full:
>
> ### IGT changes ###
>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> * {igt@kms_plane_scaling@downscale-with-modifier-factor-0-25}:
> - {shard-rkl}:NOTRUN -> [SKIP][1] +4 similar issues
>[1]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103443v3/shard-rkl-2/igt@kms_plane_scal...@downscale-with-modifier-factor-0-25.html
>
>
> Known issues
>
>
> Here are the changes found in Patchwork_103443v3_full that come from known
> issues:
>
> ### CI changes ###
>
> Possible fixes
>
> * boot:
> - shard-apl: ([PASS][2], [FAIL][3], [PASS][4], [PASS][5],
> [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11],
> [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17],
> [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23],
> [PASS][24], [PASS][25], [PASS][26]) ([i915#4386]) -> ([PASS][27], [PASS][28],
> [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34],
> [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40],
> [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46],
> [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51])
>[2]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl1/boot.html
>[3]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl1/boot.html
>[4]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl1/boot.html
>[5]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl1/boot.html
>[6]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl1/boot.html
>[7]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl2/boot.html
>[8]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl2/boot.html
>[9]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl2/boot.html
>[10]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl2/boot.html
>[11]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl3/boot.html
>[12]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl3/boot.html
>[13]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl3/boot.html
>[14]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl4/boot.html
>[15]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl4/boot.html
>[16]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl4/boot.html
>[17]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl4/boot.html
>[18]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl6/boot.html
>[19]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl6/boot.html
>[20]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl6/boot.html
>[21]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl7/boot.html
>[22]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl7/boot.html
>[23]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl7/boot.html
>[24]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl8/boot.html
>[25]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl8/boot.html
>[26]:
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11613/shard-apl8/boot.html
>[27]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103443v3/shard-apl1/boot.html
>[28]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103443v3/shard-apl1/boot.html
>[29]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103443v3/shard-apl1/boot.html
>[30]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103443v3/shard-apl2/boot.html
>[31]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103443v3/shard-apl2/boot.html
>[32]:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103443v3/shard-apl2/boot.html
>[33]:
>
[Intel-gfx] [PATCH v3] drm/i915/display: disable HPD workers before display driver unregister
Handling HPD during driver removal is pointless, and can cause different use-after-free/concurrency issues: 1. Setup of deferred fbdev after fbdev unregistration. 2. Access to DP-AUX after DP-AUX removal. Below stacktraces of both cases observed on CI: [272.634530] general protection fault, probably for non-canonical address 0x6b6b6b6b6b6b6b6b: [#1] PREEMPT SMP NOPTI [272.634536] CPU: 0 PID: 6030 Comm: i915_selftest Tainted: G U 5.18.0-rc5-CI_DRM_11603-g12dccf4f5eef+ #1 [272.634541] Hardware name: Intel Corporation Raptor Lake Client Platform/RPL-S ADP-S DDR5 UDIMM CRB, BIOS RPLSFWI1.R00.2397.A01.2109300731 09/30/2021 [272.634545] RIP: 0010:fb_do_apertures_overlap.part.14+0x26/0x60 ... [272.634582] Call Trace: [272.634583] [272.634585] do_remove_conflicting_framebuffers+0x59/0xa0 [272.634589] remove_conflicting_framebuffers+0x2d/0xc0 [272.634592] remove_conflicting_pci_framebuffers+0xc8/0x110 [272.634595] drm_aperture_remove_conflicting_pci_framebuffers+0x52/0x70 [272.634604] i915_driver_probe+0x63a/0xdd0 [i915] [283.405824] cpu_latency_qos_update_request called for unknown object [283.405866] WARNING: CPU: 2 PID: 240 at kernel/power/qos.c:296 cpu_latency_qos_update_request+0x2d/0x100 [283.405912] CPU: 2 PID: 240 Comm: kworker/u64:9 Not tainted 5.18.0-rc6-Patchwork_103738v3-g1672d1c43e43+ #1 [283.405915] Hardware name: Intel Corporation Raptor Lake Client Platform/RPL-S ADP-S DDR5 UDIMM CRB, BIOS RPLSFWI1.R00.2397.A01.2109300731 09/30/2021 [283.405916] Workqueue: i915-dp i915_digport_work_func [i915] [283.406020] RIP: 0010:cpu_latency_qos_update_request+0x2d/0x100 ... [283.406040] Call Trace: [283.406041] [283.406044] intel_dp_aux_xfer+0x60e/0x8e0 [i915] [283.406131] ? finish_swait+0x80/0x80 [283.406139] intel_dp_aux_transfer+0xc5/0x2b0 [i915] [283.406218] drm_dp_dpcd_access+0x79/0x130 [drm_display_helper] [283.406227] drm_dp_dpcd_read+0xe2/0xf0 [drm_display_helper] [283.406233] intel_dp_hpd_pulse+0x134/0x570 [i915] [283.406308] ? __down_killable+0x70/0x140 [283.406313] i915_digport_work_func+0xba/0x150 [i915] Signed-off-by: Andrzej Hajda --- Hi all, This is my Nth attempt to solve some old CI bug[1]. v1: caused issues in kms code [2], v2: revealed that not only fbdev does not like HPD on removal [3], v3: lacks drm_kms_helper_poll_disable[4] Moreover this is quite rare bug, but due to specific configuration of one of CI machines it appears there very frequently. [1]: https://gitlab.freedesktop.org/drm/intel/-/issues/5329 [2]: https://patchwork.freedesktop.org/series/103621/ [3]: https://patchwork.freedesktop.org/series/103738/ [4]: https://patchwork.freedesktop.org/series/103811/ Regards Andrzej --- drivers/gpu/drm/i915/display/intel_display.c | 2 ++ drivers/gpu/drm/i915/display/intel_fbdev.c | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 806d50b302ab92..9c9232da61ff37 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -10584,6 +10584,8 @@ void intel_display_driver_unregister(struct drm_i915_private *i915) if (!HAS_DISPLAY(i915)) return; + intel_hpd_cancel_work(i915); + drm_kms_helper_poll_disable(>drm); intel_fbdev_unregister(i915); intel_audio_deinit(i915); diff --git a/drivers/gpu/drm/i915/display/intel_fbdev.c b/drivers/gpu/drm/i915/display/intel_fbdev.c index 221336178991f0..908741c3161676 100644 --- a/drivers/gpu/drm/i915/display/intel_fbdev.c +++ b/drivers/gpu/drm/i915/display/intel_fbdev.c @@ -308,6 +308,7 @@ static int intelfb_create(struct drm_fb_helper *helper, i915_ggtt_offset(vma)); ifbdev->vma = vma; ifbdev->vma_flags = flags; + dump_stack(); intel_runtime_pm_put(_priv->runtime_pm, wakeref); vga_switcheroo_client_fb_set(pdev, info); -- 2.25.1
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/reset: Add additional steps for Wa_22011802037 for execlist backend
== Series Details == Series: drm/i915/reset: Add additional steps for Wa_22011802037 for execlist backend URL : https://patchwork.freedesktop.org/series/103837/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: Flush TLBs for all the tiles
== Series Details == Series: drm/i915/gem: Flush TLBs for all the tiles URL : https://patchwork.freedesktop.org/series/103831/ State : success == Summary == CI Bug Log - changes from CI_DRM_11630 -> Patchwork_103831v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/index.html Participating hosts (44 -> 39) -- Additional (2): fi-bdw-5557u bat-dg1-6 Missing(7): bat-dg1-5 fi-icl-u2 fi-bsw-cyan fi-ctg-p8600 fi-hsw-4770 fi-bdw-samus bat-jsl-1 Known issues Here are the changes found in Patchwork_103831v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg1-6: NOTRUN -> [SKIP][1] ([i915#4083]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@gem_m...@basic.html * igt@gem_tiled_blits@basic: - bat-dg1-6: NOTRUN -> [SKIP][2] ([i915#4077]) +2 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg1-6: NOTRUN -> [SKIP][3] ([i915#4079]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@gem_tiled_pread_basic.html * igt@i915_pm_backlight@basic-brightness: - bat-dg1-6: NOTRUN -> [SKIP][4] ([i915#1155]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@gt_engines: - bat-dg1-6: NOTRUN -> [INCOMPLETE][5] ([i915#4418]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@i915_selftest@live@gt_engines.html * igt@i915_selftest@live@hangcheck: - fi-bdw-5557u: NOTRUN -> [INCOMPLETE][6] ([i915#3921]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/fi-bdw-5557u/igt@i915_selftest@l...@hangcheck.html * igt@kms_addfb_basic@addfb25-x-tiled-legacy: - bat-dg1-6: NOTRUN -> [SKIP][7] ([i915#4212]) +7 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@kms_addfb_ba...@addfb25-x-tiled-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg1-6: NOTRUN -> [SKIP][8] ([i915#4215]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_chamelium@dp-crc-fast: - fi-bdw-5557u: NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827]) +7 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html * igt@kms_chamelium@hdmi-edid-read: - bat-dg1-6: NOTRUN -> [SKIP][10] ([fdo#111827]) +7 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@kms_chamel...@hdmi-edid-read.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - bat-dg1-6: NOTRUN -> [SKIP][11] ([i915#4103] / [i915#4213]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg1-6: NOTRUN -> [SKIP][12] ([fdo#109285]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_psr@sprite_plane_onoff: - bat-dg1-6: NOTRUN -> [SKIP][13] ([i915#1072] / [i915#4078]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@kms_psr@sprite_plane_onoff.html * igt@kms_setmode@basic-clone-single-crtc: - fi-bdw-5557u: NOTRUN -> [SKIP][14] ([fdo#109271]) +14 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/fi-bdw-5557u/igt@kms_setm...@basic-clone-single-crtc.html - bat-dg1-6: NOTRUN -> [SKIP][15] ([i915#3555]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-gtt: - bat-dg1-6: NOTRUN -> [SKIP][16] ([i915#3708] / [i915#4077]) +1 similar issue [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@prime_v...@basic-gtt.html * igt@prime_vgem@basic-userptr: - bat-dg1-6: NOTRUN -> [SKIP][17] ([i915#3708] / [i915#4873]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@prime_v...@basic-userptr.html * igt@prime_vgem@basic-write: - bat-dg1-6: NOTRUN -> [SKIP][18] ([i915#3708]) +3 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103831v1/bat-dg1-6/igt@prime_v...@basic-write.html *
[Intel-gfx] ✗ Fi.CI.BUILD: failure for Clear TLB caches in all tiles when object is removed
== Series Details == Series: Clear TLB caches in all tiles when object is removed URL : https://patchwork.freedesktop.org/series/103835/ State : failure == Summary == Error: make failed CALLscripts/checksyscalls.sh CALLscripts/atomic/check-atomics.sh DESCEND objtool CHK include/generated/compile.h CC [M] drivers/gpu/drm/i915/gt/intel_gt.o drivers/gpu/drm/i915/gt/intel_gt.c: In function ‘intel_gt_invalidate_tlbs’: drivers/gpu/drm/i915/gt/intel_gt.c:1222:8: error: implicit declaration of function ‘intel_engine_pm_is_awake’; did you mean ‘intel_gt_pm_is_awake’? [-Werror=implicit-function-declaration] if (!intel_engine_pm_is_awake(engine)) ^~~~ intel_gt_pm_is_awake cc1: all warnings being treated as errors scripts/Makefile.build:288: recipe for target 'drivers/gpu/drm/i915/gt/intel_gt.o' failed make[4]: *** [drivers/gpu/drm/i915/gt/intel_gt.o] Error 1 scripts/Makefile.build:550: recipe for target 'drivers/gpu/drm/i915' failed make[3]: *** [drivers/gpu/drm/i915] Error 2 scripts/Makefile.build:550: recipe for target 'drivers/gpu/drm' failed make[2]: *** [drivers/gpu/drm] Error 2 scripts/Makefile.build:550: recipe for target 'drivers/gpu' failed make[1]: *** [drivers/gpu] Error 2 Makefile:1834: recipe for target 'drivers' failed make: *** [drivers] Error 2
[Intel-gfx] [PATCH] drm/i915/reset: Add additional steps for Wa_22011802037 for execlist backend
From: Umesh Nerlige Ramappa
For execlists backend, current implementation of Wa_22011802037 is to
stop the CS before doing a reset of the engine. This WA was further
extended to wait for any pending MI FORCE WAKEUPs before issuing a
reset. Add the extended steps in the execlist path of reset.
In addition, extend the WA to gen11.
v2: (Tvrtko)
- Clarify comments, commit message, fix typos
- Use IS_GRAPHICS_VER for gen 11/12 checks
Signed-off-by: Umesh Nerlige Ramappa
Fixes: f6aa0d713c88 ("drm/i915: Add Wa_22011802037 force cs halt")
---
drivers/gpu/drm/i915/gt/intel_engine.h| 2 +
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 85 ++-
.../drm/i915/gt/intel_execlists_submission.c | 7 ++
.../gpu/drm/i915/gt/intel_ring_submission.c | 7 ++
drivers/gpu/drm/i915/gt/uc/intel_guc.c| 4 +-
.../gpu/drm/i915/gt/uc/intel_guc_submission.c | 81 ++
6 files changed, 107 insertions(+), 79 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h
b/drivers/gpu/drm/i915/gt/intel_engine.h
index 1431f1e9dbee..04e435bce79b 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -201,6 +201,8 @@ int intel_ring_submission_setup(struct intel_engine_cs
*engine);
int intel_engine_stop_cs(struct intel_engine_cs *engine);
void intel_engine_cancel_stop_cs(struct intel_engine_cs *engine);
+void intel_engine_wait_for_pending_mi_fw(struct intel_engine_cs *engine);
+
void intel_engine_set_hwsp_writemask(struct intel_engine_cs *engine, u32 mask);
u64 intel_engine_get_active_head(const struct intel_engine_cs *engine);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index 14c6ddbbfde8..9943cf9655b2 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -1282,10 +1282,10 @@ static int __intel_engine_stop_cs(struct
intel_engine_cs *engine,
intel_uncore_write_fw(uncore, mode, _MASKED_BIT_ENABLE(STOP_RING));
/*
-* Wa_22011802037 : gen12, Prior to doing a reset, ensure CS is
+* Wa_22011802037 : gen11, gen12, Prior to doing a reset, ensure CS is
* stopped, set ring stop bit and prefetch disable bit to halt CS
*/
- if (GRAPHICS_VER(engine->i915) == 12)
+ if (IS_GRAPHICS_VER(engine->i915, 11, 12))
intel_uncore_write_fw(uncore, RING_MODE_GEN7(engine->mmio_base),
_MASKED_BIT_ENABLE(GEN12_GFX_PREFETCH_DISABLE));
@@ -1308,6 +1308,18 @@ int intel_engine_stop_cs(struct intel_engine_cs *engine)
return -ENODEV;
ENGINE_TRACE(engine, "\n");
+ /*
+* TODO: Find out why occasionally stopping the CS times out. Seen
+* especially with gem_eio tests.
+*
+* Occasionally trying to stop the cs times out, but does not adversely
+* affect functionality. The timeout is set as a config parameter that
+* defaults to 100ms. In most cases the follow up operation is to wait
+* for pending MI_FORCE_WAKES. The assumption is that this timeout is
+* sufficient for any pending MI_FORCEWAKEs to complete. Once root
+* caused, the caller must check and handle the return from this
+* function.
+*/
if (__intel_engine_stop_cs(engine, 1000, stop_timeout(engine))) {
ENGINE_TRACE(engine,
"timed out on STOP_RING -> IDLE; HEAD:%04x,
TAIL:%04x\n",
@@ -1334,6 +1346,75 @@ void intel_engine_cancel_stop_cs(struct intel_engine_cs
*engine)
ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));
}
+static u32 __cs_pending_mi_force_wakes(struct intel_engine_cs *engine)
+{
+ static const i915_reg_t _reg[I915_NUM_ENGINES] = {
+ [RCS0] = MSG_IDLE_CS,
+ [BCS0] = MSG_IDLE_BCS,
+ [VCS0] = MSG_IDLE_VCS0,
+ [VCS1] = MSG_IDLE_VCS1,
+ [VCS2] = MSG_IDLE_VCS2,
+ [VCS3] = MSG_IDLE_VCS3,
+ [VCS4] = MSG_IDLE_VCS4,
+ [VCS5] = MSG_IDLE_VCS5,
+ [VCS6] = MSG_IDLE_VCS6,
+ [VCS7] = MSG_IDLE_VCS7,
+ [VECS0] = MSG_IDLE_VECS0,
+ [VECS1] = MSG_IDLE_VECS1,
+ [VECS2] = MSG_IDLE_VECS2,
+ [VECS3] = MSG_IDLE_VECS3,
+ [CCS0] = MSG_IDLE_CS,
+ [CCS1] = MSG_IDLE_CS,
+ [CCS2] = MSG_IDLE_CS,
+ [CCS3] = MSG_IDLE_CS,
+ };
+ u32 val;
+
+ if (!_reg[engine->id].reg)
+ return 0;
+
+ val = intel_uncore_read(engine->uncore, _reg[engine->id]);
+
+ /* bits[29:25] & bits[13:9] >> shift */
+ return (val & (val >> 16) & MSG_IDLE_FW_MASK) >> MSG_IDLE_FW_SHIFT;
+}
+
+static void __gpm_wait_for_fw_complete(struct intel_gt *gt, u32 fw_mask)
+{
+ int ret;
+
+ /* Ensure GPM receives fw up/down after
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: disable HPD workers before display driver unregister (rev2)
== Series Details == Series: drm/i915/display: disable HPD workers before display driver unregister (rev2) URL : https://patchwork.freedesktop.org/series/103811/ State : success == Summary == CI Bug Log - changes from CI_DRM_11630 -> Patchwork_103811v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/index.html Participating hosts (44 -> 42) -- Additional (3): fi-rkl-11600 fi-bdw-5557u bat-dg2-9 Missing(5): bat-dg1-5 fi-bsw-cyan fi-icl-u2 fi-ctg-p8600 fi-bdw-samus Known issues Here are the changes found in Patchwork_103811v2 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-rkl-11600: NOTRUN -> [SKIP][1] ([i915#2190]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-rkl-11600: NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@gem_lmem_swapp...@basic.html * igt@gem_tiled_pread_basic: - fi-rkl-11600: NOTRUN -> [SKIP][3] ([i915#3282]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@gem_tiled_pread_basic.html * igt@i915_pm_backlight@basic-brightness: - fi-rkl-11600: NOTRUN -> [SKIP][4] ([i915#3012]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@gem: - fi-blb-e6850: NOTRUN -> [DMESG-FAIL][5] ([i915#4528]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-blb-e6850/igt@i915_selftest@l...@gem.html * igt@i915_selftest@live@hangcheck: - fi-hsw-4770:[PASS][6] -> [INCOMPLETE][7] ([i915#4785]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html - fi-bdw-5557u: NOTRUN -> [INCOMPLETE][8] ([i915#3921]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-bdw-5557u/igt@i915_selftest@l...@hangcheck.html * igt@kms_chamelium@dp-crc-fast: - fi-rkl-11600: NOTRUN -> [SKIP][9] ([fdo#111827]) +8 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@kms_chamel...@dp-crc-fast.html - fi-bdw-5557u: NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +7 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-rkl-11600: NOTRUN -> [SKIP][11] ([i915#4070] / [i915#4103]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_force_connector_basic@force-load-detect: - fi-rkl-11600: NOTRUN -> [SKIP][12] ([fdo#109285] / [i915#4098]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-rkl-11600: NOTRUN -> [SKIP][13] ([i915#4070] / [i915#533]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html * igt@kms_psr@primary_mmap_gtt: - fi-rkl-11600: NOTRUN -> [SKIP][14] ([i915#1072]) +3 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@kms_psr@primary_mmap_gtt.html * igt@kms_setmode@basic-clone-single-crtc: - fi-bdw-5557u: NOTRUN -> [SKIP][15] ([fdo#109271]) +14 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-bdw-5557u/igt@kms_setm...@basic-clone-single-crtc.html - fi-rkl-11600: NOTRUN -> [SKIP][16] ([i915#3555] / [i915#4098]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-userptr: - fi-rkl-11600: NOTRUN -> [SKIP][17] ([i915#3301] / [i915#3708]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@prime_v...@basic-userptr.html * igt@prime_vgem@basic-write: - fi-rkl-11600: NOTRUN -> [SKIP][18] ([i915#3291] / [i915#3708]) +2 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v2/fi-rkl-11600/igt@prime_v...@basic-write.html * igt@runner@aborted: - fi-hsw-4770:NOTRUN -> [FAIL][19] ([fdo#109271] / [i915#4312] / [i915#5594]) [19]:
[Intel-gfx] [PATCH v2 3/3] drm/i915/gt: Skip TLB invalidation if the engine is not awake
We want to check if the engine is awake first before invalidating its cache. Suggested-by: Chris Wilson Signed-off-by: Andi Shyti --- drivers/gpu/drm/i915/gt/intel_gt.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c index 034182f85501b..de26fbe6b71dd 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt.c +++ b/drivers/gpu/drm/i915/gt/intel_gt.c @@ -1219,6 +1219,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) const unsigned int timeout_ms = 4; struct reg_and_bit rb; + if (!intel_engine_pm_is_awake(engine)) + continue; + rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num); if (!i915_mmio_reg_offset(rb.reg)) continue; -- 2.36.0
[Intel-gfx] [PATCH v2 2/3] drm/i915/gem: Flush TLBs for all the tiles when clearing an obj
During object cleanup we invalidate the TLBs but we do it only
for gt0. Invalidate the caches for all the tiles.
Reported-by: Chris Wilson
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +---
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 2 +-
2 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 97c820eee115a..37d23e328bd0c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -13,6 +13,7 @@
#include "i915_gem_mman.h"
#include "gt/intel_gt.h"
+#include "gt/intel_gt_pm.h"
void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
struct sg_table *pages,
@@ -217,10 +218,15 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object
*obj)
if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, >flags)) {
struct drm_i915_private *i915 = to_i915(obj->base.dev);
- intel_wakeref_t wakeref;
+ struct intel_gt *gt;
+ int i;
- with_intel_runtime_pm_if_active(>runtime_pm, wakeref)
- intel_gt_invalidate_tlbs(to_gt(i915));
+ for_each_gt(gt, i915, i) {
+ int tmp;
+
+ with_intel_gt_pm_if_awake(gt, tmp)
+ intel_gt_invalidate_tlbs(gt);
+ }
}
return pages;
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index 2654133b39f22..3b1fbce7ea369 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -55,7 +55,7 @@ static inline void intel_gt_pm_might_put(struct intel_gt *gt)
for (tmp = 1, intel_gt_pm_get(gt); tmp; \
intel_gt_pm_put(gt), tmp = 0)
-#define with_intel_gt_pm_if_awake(gt, wf) \
+#define with_intel_gt_pm_if_awake(gt, tmp) \
for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \
intel_gt_pm_put(gt), tmp = 0)
--
2.36.0
[Intel-gfx] [PATCH v2 1/3] drm/i915/gt: Ignore TLB invalidations on idle engines
From: Chris Wilson
As an extension of the current skip TLB invalidations if the device is
powered down, we recognised that prior to any engine activity, all the
TLBs are explicitly invalidated. Thus anytime we know the engine is
asleep, we can skip invalidating the TLBs on that engine.
Signed-off-by: Chris Wilson
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_pm.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index bc898df7a48cc..2654133b39f22 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -55,6 +55,10 @@ static inline void intel_gt_pm_might_put(struct intel_gt *gt)
for (tmp = 1, intel_gt_pm_get(gt); tmp; \
intel_gt_pm_put(gt), tmp = 0)
+#define with_intel_gt_pm_if_awake(gt, wf) \
+ for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \
+intel_gt_pm_put(gt), tmp = 0)
+
static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
{
return intel_wakeref_wait_for_idle(>wakeref);
--
2.36.0
[Intel-gfx] [PATCH v2 0/3] Clear TLB caches in all tiles when object is removed
Hi, The real fix is in patch 2. The rest is a helper that adds the with_intel_gt_pm_if_awake() (from Chris) and one more check on the status of the engine before accessing it for clearing the TLB. Andi Andi Shyti (2): drm/i915/gem: Flush TLBs for all the tiles when clearing an obj drm/i915/gt: Skip TLB invalidation if the engine is not awake Chris Wilson (1): drm/i915/gt: Ignore TLB invalidations on idle engines drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +--- drivers/gpu/drm/i915/gt/intel_gt.c| 3 +++ drivers/gpu/drm/i915/gt/intel_gt_pm.h | 4 3 files changed, 16 insertions(+), 3 deletions(-) -- 2.36.0
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: disable HPD workers before display driver unregister (rev2)
== Series Details == Series: drm/i915/display: disable HPD workers before display driver unregister (rev2) URL : https://patchwork.freedesktop.org/series/103811/ State : warning == Summary == Error: dim checkpatch failed b60c70c594dc drm/i915/display: disable HPD workers before display driver unregister -:9: WARNING:TYPO_SPELLING: 'deffered' may be misspelled - perhaps 'deferred'? #9: 1. Setup of deffered fbdev after fbdev unregistration. total: 0 errors, 1 warnings, 0 checks, 8 lines checked
[Intel-gfx] ✓ Fi.CI.BAT: success for ttm for internal (rev3)
== Series Details ==
Series: ttm for internal (rev3)
URL : https://patchwork.freedesktop.org/series/103492/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11630 -> Patchwork_103492v3
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/index.html
Participating hosts (44 -> 41)
--
Additional (2): fi-bdw-5557u bat-dg2-9
Missing(5): bat-dg1-5 fi-bsw-cyan fi-icl-u2 fi-ctg-p8600 fi-bdw-samus
Known issues
Here are the changes found in Patchwork_103492v3 that come from known issues:
### IGT changes ###
Issues hit
* igt@i915_selftest@live@gem:
- fi-pnv-d510:NOTRUN -> [DMESG-FAIL][1] ([i915#4528])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/fi-pnv-d510/igt@i915_selftest@l...@gem.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[PASS][2] -> [INCOMPLETE][3] ([i915#4785])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
- fi-bdw-5557u: NOTRUN -> [INCOMPLETE][4] ([i915#3921])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/fi-bdw-5557u/igt@i915_selftest@l...@hangcheck.html
* igt@kms_chamelium@dp-crc-fast:
- fi-bdw-5557u: NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827]) +7
similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/fi-bdw-5557u/igt@kms_chamel...@dp-crc-fast.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-bdw-5557u: NOTRUN -> [SKIP][6] ([fdo#109271]) +14 similar issues
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/fi-bdw-5557u/igt@kms_setm...@basic-clone-single-crtc.html
* igt@runner@aborted:
- fi-hsw-4770:NOTRUN -> [FAIL][7] ([fdo#109271] / [i915#4312] /
[i915#5594])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/fi-hsw-4770/igt@run...@aborted.html
Possible fixes
* igt@core_hotunplug@unbind-rebind:
- {bat-rpls-2}: [DMESG-WARN][8] ([i915#4391]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/bat-rpls-2/igt@core_hotunp...@unbind-rebind.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/bat-rpls-2/igt@core_hotunp...@unbind-rebind.html
* igt@gem_exec_suspend@basic-s0@smem:
- {fi-ehl-2}: [DMESG-WARN][10] ([i915#5122]) -> [PASS][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/fi-ehl-2/igt@gem_exec_suspend@basic...@smem.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/fi-ehl-2/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@requests:
- fi-pnv-d510:[DMESG-FAIL][12] ([i915#4528]) -> [PASS][13]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11630/fi-pnv-d510/igt@i915_selftest@l...@requests.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103492v3/fi-pnv-d510/igt@i915_selftest@l...@requests.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#5190]:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c (rev2)
== Series Details ==
Series: drm/i915: Fix 'mixing different enum types' warnings in
intel_display_power.c (rev2)
URL : https://patchwork.freedesktop.org/series/103803/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11628_full -> Patchwork_103803v2_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_103803v2_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_softpin@allocator-evict@bcs0:
- {shard-rkl}:[PASS][1] -> [INCOMPLETE][2] +1 similar issue
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-rkl-1/igt@gem_softpin@allocator-ev...@bcs0.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-rkl-5/igt@gem_softpin@allocator-ev...@bcs0.html
Known issues
Here are the changes found in Patchwork_103803v2_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@feature_discovery@psr2:
- shard-iclb: [PASS][3] -> [SKIP][4] ([i915#658])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-iclb2/igt@feature_discov...@psr2.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-iclb5/igt@feature_discov...@psr2.html
* igt@gem_ccs@ctrl-surf-copy-new-ctx:
- shard-iclb: NOTRUN -> [SKIP][5] ([i915#5327]) +1 similar issue
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-iclb5/igt@gem_...@ctrl-surf-copy-new-ctx.html
* igt@gem_create@create-massive:
- shard-skl: NOTRUN -> [DMESG-WARN][6] ([i915#4991])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-skl1/igt@gem_cre...@create-massive.html
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-kbl: NOTRUN -> [DMESG-WARN][7] ([i915#180]) +3 similar
issues
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-kbl1/igt@gem_ctx_isolation@preservation...@bcs0.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: NOTRUN -> [FAIL][8] ([i915#2846])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-glk6/igt@gem_exec_f...@basic-deadline.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-glk: NOTRUN -> [FAIL][9] ([i915#2842])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-glk3/igt@gem_exec_fair@basic-none-r...@rcs0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [PASS][10] -> [FAIL][11] ([i915#2842])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-apl8/igt@gem_exec_fair@basic-none-s...@rcs0.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-apl6/igt@gem_exec_fair@basic-none-s...@rcs0.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-iclb: NOTRUN -> [FAIL][12] ([i915#2842])
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-iclb8/igt@gem_exec_fair@basic-none-...@rcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-kbl: [PASS][13] -> [FAIL][14] ([i915#2842])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs1.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-kbl7/igt@gem_exec_fair@basic-n...@vcs1.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [PASS][15] -> [FAIL][16] ([i915#2842])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-glk4/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-glk6/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-tglb: [PASS][17] -> [FAIL][18] ([i915#2842]) +1 similar
issue
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-tglb6/igt@gem_exec_fair@basic-pace-s...@rcs0.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-tglb3/igt@gem_exec_fair@basic-pace-s...@rcs0.html
* igt@gem_exec_flush@basic-wb-ro-before-default:
- shard-snb: [PASS][19] -> [SKIP][20] ([fdo#109271]) +3 similar
issues
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-snb2/igt@gem_exec_fl...@basic-wb-ro-before-default.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/shard-snb6/igt@gem_exec_fl...@basic-wb-ro-before-default.html
* igt@gem_exec_params@secure-non-master:
- shard-iclb: NOTRUN -> [SKIP][21] ([fdo#112283])
[21]:
[Intel-gfx] [PATCH] drm/i915/gem: Flush TLBs for all the tiles
During object cleanup we invalidate the TLBs but we do it only
for gt0. Invalidate the caches for all the tiles.
Reported-by: Chris Wilson
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gem/i915_gem_pages.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 97c820eee115a..444b9f96ba77c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -217,10 +217,15 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object
*obj)
if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, >flags)) {
struct drm_i915_private *i915 = to_i915(obj->base.dev);
- intel_wakeref_t wakeref;
+ struct intel_gt *gt;
+ int i;
- with_intel_runtime_pm_if_active(>runtime_pm, wakeref)
- intel_gt_invalidate_tlbs(to_gt(i915));
+ for_each_gt(gt, i915, i) {
+ intel_wakeref_t w;
+
+ with_intel_runtime_pm_if_active(gt->uncore->rpm, w)
+ intel_gt_invalidate_tlbs(gt);
+ }
}
return pages;
--
2.36.0
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: disable HPD workers before display driver unregister
== Series Details == Series: drm/i915/display: disable HPD workers before display driver unregister URL : https://patchwork.freedesktop.org/series/103811/ State : success == Summary == CI Bug Log - changes from CI_DRM_11628_full -> Patchwork_103811v1_full Summary --- **SUCCESS** No regressions found. Participating hosts (13 -> 13) -- No changes in participating hosts Known issues Here are the changes found in Patchwork_103811v1_full that come from known issues: ### IGT changes ### Issues hit * igt@feature_discovery@psr2: - shard-iclb: [PASS][1] -> [SKIP][2] ([i915#658]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-iclb2/igt@feature_discov...@psr2.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-iclb8/igt@feature_discov...@psr2.html * igt@gem_ccs@ctrl-surf-copy-new-ctx: - shard-iclb: NOTRUN -> [SKIP][3] ([i915#5327]) +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-iclb7/igt@gem_...@ctrl-surf-copy-new-ctx.html * igt@gem_create@create-massive: - shard-skl: NOTRUN -> [DMESG-WARN][4] ([i915#4991]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-skl1/igt@gem_cre...@create-massive.html * igt@gem_eio@kms: - shard-skl: NOTRUN -> [TIMEOUT][5] ([i915#3063]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-skl10/igt@gem_...@kms.html * igt@gem_exec_balancer@parallel-contexts: - shard-kbl: NOTRUN -> [DMESG-WARN][6] ([i915#5076] / [i915#5614]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-kbl1/igt@gem_exec_balan...@parallel-contexts.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - shard-glk: NOTRUN -> [FAIL][7] ([i915#2842]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-glk1/igt@gem_exec_fair@basic-none-r...@rcs0.html * igt@gem_exec_fair@basic-none-vip@rcs0: - shard-iclb: NOTRUN -> [FAIL][8] ([i915#2842]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-iclb5/igt@gem_exec_fair@basic-none-...@rcs0.html * igt@gem_exec_fair@basic-none@vcs0: - shard-kbl: [PASS][9] -> [FAIL][10] ([i915#2842]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-kbl6/igt@gem_exec_fair@basic-n...@vcs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-kbl1/igt@gem_exec_fair@basic-n...@vcs0.html * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][11] -> [FAIL][12] ([i915#2842]) +1 similar issue [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-glk4/igt@gem_exec_fair@basic-pace-sh...@rcs0.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-glk8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html * igt@gem_exec_fair@basic-pace-solo@rcs0: - shard-kbl: NOTRUN -> [FAIL][13] ([i915#2842]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-kbl4/igt@gem_exec_fair@basic-pace-s...@rcs0.html - shard-tglb: [PASS][14] -> [FAIL][15] ([i915#2842]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-tglb6/igt@gem_exec_fair@basic-pace-s...@rcs0.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-tglb6/igt@gem_exec_fair@basic-pace-s...@rcs0.html * igt@gem_exec_flush@basic-batch-kernel-default-wb: - shard-snb: [PASS][16] -> [SKIP][17] ([fdo#109271]) +2 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-snb4/igt@gem_exec_fl...@basic-batch-kernel-default-wb.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-snb6/igt@gem_exec_fl...@basic-batch-kernel-default-wb.html * igt@gem_exec_params@secure-non-master: - shard-iclb: NOTRUN -> [SKIP][18] ([fdo#112283]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-iclb3/igt@gem_exec_par...@secure-non-master.html * igt@gem_huc_copy@huc-copy: - shard-skl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#2190]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-skl10/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - shard-iclb: NOTRUN -> [SKIP][20] ([i915#4613]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-iclb7/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@heavy-random: - shard-skl: NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4613]) +2 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/shard-skl4/igt@gem_lmem_swapp...@heavy-random.html * igt@gem_lmem_swapping@heavy-verify-random: - shard-kbl: NOTRUN -> [SKIP][22]
[Intel-gfx] [PATCH v2] drm/i915/display: disable HPD workers before display driver unregister
Handling HPD during driver removal is pointless, and can cause different use-after-free/concurrency issues: 1. Setup of deffered fbdev after fbdev unregistration. 2. Access to DP-AUX after DP-AUX removal. Below stacktraces of both cases observed on CI: [272.634530] general protection fault, probably for non-canonical address 0x6b6b6b6b6b6b6b6b: [#1] PREEMPT SMP NOPTI [272.634536] CPU: 0 PID: 6030 Comm: i915_selftest Tainted: G U 5.18.0-rc5-CI_DRM_11603-g12dccf4f5eef+ #1 [272.634541] Hardware name: Intel Corporation Raptor Lake Client Platform/RPL-S ADP-S DDR5 UDIMM CRB, BIOS RPLSFWI1.R00.2397.A01.2109300731 09/30/2021 [272.634545] RIP: 0010:fb_do_apertures_overlap.part.14+0x26/0x60 ... [272.634582] Call Trace: [272.634583] [272.634585] do_remove_conflicting_framebuffers+0x59/0xa0 [272.634589] remove_conflicting_framebuffers+0x2d/0xc0 [272.634592] remove_conflicting_pci_framebuffers+0xc8/0x110 [272.634595] drm_aperture_remove_conflicting_pci_framebuffers+0x52/0x70 [272.634604] i915_driver_probe+0x63a/0xdd0 [i915] [283.405824] cpu_latency_qos_update_request called for unknown object [283.405866] WARNING: CPU: 2 PID: 240 at kernel/power/qos.c:296 cpu_latency_qos_update_request+0x2d/0x100 [283.405912] CPU: 2 PID: 240 Comm: kworker/u64:9 Not tainted 5.18.0-rc6-Patchwork_103738v3-g1672d1c43e43+ #1 [283.405915] Hardware name: Intel Corporation Raptor Lake Client Platform/RPL-S ADP-S DDR5 UDIMM CRB, BIOS RPLSFWI1.R00.2397.A01.2109300731 09/30/2021 [283.405916] Workqueue: i915-dp i915_digport_work_func [i915] [283.406020] RIP: 0010:cpu_latency_qos_update_request+0x2d/0x100 ... [283.406040] Call Trace: [283.406041] [283.406044] intel_dp_aux_xfer+0x60e/0x8e0 [i915] [283.406131] ? finish_swait+0x80/0x80 [283.406139] intel_dp_aux_transfer+0xc5/0x2b0 [i915] [283.406218] drm_dp_dpcd_access+0x79/0x130 [drm_display_helper] [283.406227] drm_dp_dpcd_read+0xe2/0xf0 [drm_display_helper] [283.406233] intel_dp_hpd_pulse+0x134/0x570 [i915] [283.406308] ? __down_killable+0x70/0x140 [283.406313] i915_digport_work_func+0xba/0x150 [i915] Signed-off-by: Andrzej Hajda --- Hi all, This is my Nth attempt to solve some old CI bug[1]. v1: caused issues in kms code [2], v2: revealed that not only fbdev does not like HPD on removal [3], v3: lacks drm_kms_helper_poll_disable[4] Moreover this is quite rare bug, but due to specific configuration of one of CI machines it appears there very frequently. [1]: https://gitlab.freedesktop.org/drm/intel/-/issues/5329 [2]: https://patchwork.freedesktop.org/series/103621/ [3]: https://patchwork.freedesktop.org/series/103738/ [4]: https://patchwork.freedesktop.org/series/103811/ Regards Andrzej --- drivers/gpu/drm/i915/display/intel_display.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 806d50b302ab92..9c9232da61ff37 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -10584,6 +10584,8 @@ void intel_display_driver_unregister(struct drm_i915_private *i915) if (!HAS_DISPLAY(i915)) return; + intel_hpd_cancel_work(i915); + drm_kms_helper_poll_disable(>drm); intel_fbdev_unregister(i915); intel_audio_deinit(i915); -- 2.25.1
[Intel-gfx] ✓ Fi.CI.BAT: success for Fixes for selective fetch area calculation (rev3)
== Series Details ==
Series: Fixes for selective fetch area calculation (rev3)
URL : https://patchwork.freedesktop.org/series/103659/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11629 -> Patchwork_103659v3
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/index.html
Participating hosts (43 -> 42)
--
Additional (2): bat-adlm-1 fi-rkl-guc
Missing(3): fi-ctg-p8600 fi-rkl-11600 fi-bdw-samus
Known issues
Here are the changes found in Patchwork_103659v3 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_lmem_swapping@verify-random:
- fi-rkl-guc: NOTRUN -> [SKIP][1] ([i915#4613]) +3 similar issues
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@gem_lmem_swapp...@verify-random.html
* igt@gem_tiled_pread_basic:
- fi-rkl-guc: NOTRUN -> [SKIP][2] ([i915#3282])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- fi-rkl-guc: NOTRUN -> [SKIP][3] ([i915#3012])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@i915_pm_backli...@basic-brightness.html
* igt@i915_selftest@live@gtt:
- fi-bdw-5557u: [PASS][4] -> [DMESG-FAIL][5] ([i915#3674])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html
* igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][6] -> [DMESG-FAIL][7] ([i915#4528])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/fi-pnv-d510/igt@i915_selftest@l...@requests.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-pnv-d510/igt@i915_selftest@l...@requests.html
* igt@kms_chamelium@dp-edid-read:
- fi-rkl-guc: NOTRUN -> [SKIP][8] ([fdo#111827]) +8 similar issues
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@kms_chamel...@dp-edid-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-rkl-guc: NOTRUN -> [SKIP][9] ([i915#4070] / [i915#4103]) +1
similar issue
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-guc: NOTRUN -> [SKIP][10] ([fdo#109285])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@kms_force_connector_ba...@force-load-detect.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-rkl-guc: NOTRUN -> [SKIP][11] ([i915#4070] / [i915#533])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@kms_pipe_crc_ba...@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@sprite_plane_onoff:
- fi-rkl-guc: NOTRUN -> [SKIP][12] ([i915#1072]) +3 similar issues
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-guc: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#4098])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@kms_setm...@basic-clone-single-crtc.html
* igt@prime_vgem@basic-userptr:
- fi-rkl-guc: NOTRUN -> [SKIP][14] ([i915#3301] / [i915#3708])
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@prime_v...@basic-userptr.html
* igt@prime_vgem@basic-write:
- fi-rkl-guc: NOTRUN -> [SKIP][15] ([i915#3291] / [i915#3708]) +2
similar issues
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-rkl-guc/igt@prime_v...@basic-write.html
Possible fixes
* igt@gem_exec_suspend@basic-s0@smem:
- {fi-ehl-2}: [DMESG-WARN][16] ([i915#5122]) -> [PASS][17]
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/fi-ehl-2/igt@gem_exec_suspend@basic...@smem.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/fi-ehl-2/igt@gem_exec_suspend@basic...@smem.html
* igt@i915_selftest@live@gem_contexts:
- {bat-dg2-9}:[DMESG-FAIL][18] ([i915#5885]) -> [PASS][19]
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11629/bat-dg2-9/igt@i915_selftest@live@gem_contexts.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103659v3/bat-dg2-9/igt@i915_selftest@live@gem_contexts.html
* igt@kms_flip@basic-flip-vs-modeset@a-edp1:
- {bat-adlp-6}: [DMESG-WARN][20] ([i915#3576]) -> [PASS][21]
[20]:
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gt: Fix use of static in macro mismatch
== Series Details ==
Series: drm/i915/gt: Fix use of static in macro mismatch
URL : https://patchwork.freedesktop.org/series/103806/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11628_full -> Patchwork_103806v1_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_103806v1_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_workarounds@suspend-resume:
- {shard-dg1}:NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-dg1-19/igt@gem_workarou...@suspend-resume.html
New tests
-
New tests have been introduced between CI_DRM_11628_full and
Patchwork_103806v1_full:
### New IGT tests (4) ###
*
igt@kms_plane_scaling@downscale-with-modifier-factor-0-75@pipe-a-hdmi-a-3-downscale-with-modifier:
- Statuses : 1 pass(s)
- Exec time: [0.63] s
*
igt@kms_plane_scaling@downscale-with-modifier-factor-0-75@pipe-b-hdmi-a-3-downscale-with-modifier:
- Statuses : 1 pass(s)
- Exec time: [0.42] s
*
igt@kms_plane_scaling@downscale-with-modifier-factor-0-75@pipe-c-hdmi-a-3-downscale-with-modifier:
- Statuses : 1 pass(s)
- Exec time: [0.49] s
*
igt@kms_plane_scaling@downscale-with-modifier-factor-0-75@pipe-d-hdmi-a-3-downscale-with-modifier:
- Statuses : 1 pass(s)
- Exec time: [0.44] s
Known issues
Here are the changes found in Patchwork_103806v1_full that come from known
issues:
### CI changes ###
Possible fixes
* boot:
- shard-skl: ([PASS][2], [PASS][3], [PASS][4], [PASS][5],
[PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [FAIL][11], [PASS][12],
[PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18],
[PASS][19], [PASS][20], [PASS][21]) ([i915#5032]) -> ([PASS][22], [PASS][23],
[PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29],
[PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35],
[PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl2/boot.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl1/boot.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl6/boot.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl5/boot.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl5/boot.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl4/boot.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl4/boot.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl10/boot.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl3/boot.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl3/boot.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl10/boot.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl3/boot.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl1/boot.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl9/boot.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl9/boot.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl8/boot.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl7/boot.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl7/boot.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl7/boot.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/shard-skl6/boot.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-skl9/boot.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-skl9/boot.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-skl8/boot.html
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-skl7/boot.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-skl7/boot.html
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-skl6/boot.html
[28]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-skl6/boot.html
[29]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-skl6/boot.html
[30]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/shard-skl5/boot.html
[31]:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Fixes for selective fetch area calculation (rev3)
== Series Details == Series: Fixes for selective fetch area calculation (rev3) URL : https://patchwork.freedesktop.org/series/103659/ State : warning == Summary == Error: dim checkpatch failed ece060bdc2d4 drm/print: Add drm_debug_once* macros -:34: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #34: FILE: include/drm/drm_print.h:488: +#define drm_dbg_once_core(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_CORE, fmt, ##__VA_ARGS__) -:36: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #36: FILE: include/drm/drm_print.h:490: +#define drm_dbg_once(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_DRIVER, fmt, ##__VA_ARGS__) -:38: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #38: FILE: include/drm/drm_print.h:492: +#define drm_dbg_once_kms(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_KMS, fmt, ##__VA_ARGS__) -:40: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #40: FILE: include/drm/drm_print.h:494: +#define drm_dbg_once_prime(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_PRIME, fmt, ##__VA_ARGS__) -:42: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #42: FILE: include/drm/drm_print.h:496: +#define drm_dbg_once_atomic(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_ATOMIC, fmt, ##__VA_ARGS__) -:44: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #44: FILE: include/drm/drm_print.h:498: +#define drm_dbg_once_vbl(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_VBL, fmt, ##__VA_ARGS__) -:46: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #46: FILE: include/drm/drm_print.h:500: +#define drm_dbg_once_state(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_STATE, fmt, ##__VA_ARGS__) -:48: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #48: FILE: include/drm/drm_print.h:502: +#define drm_dbg_once_lease(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_LEASE, fmt, ##__VA_ARGS__) -:50: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #50: FILE: include/drm/drm_print.h:504: +#define drm_dbg_once_dp(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_DP, fmt, ##__VA_ARGS__) -:52: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'drm' - possible side-effects? #52: FILE: include/drm/drm_print.h:506: +#define drm_dbg_once_drmres(drm, fmt, ...) \ + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_DRMRES, fmt, ##__VA_ARGS__) total: 0 errors, 0 warnings, 10 checks, 35 lines checked cbb0b0954a2a drm/i915/psr: Use full update In case of area calculation fails 41e31dcdd4be drm/i915: Ensure damage clip area is within pipe area
Re: [Intel-gfx] [PATCH v3 1/3] drm/print: Add drm_debug_once* macros
On Tue, 2022-05-10 at 21:33 +0300, Jouni Högander wrote:
> Add drm_debug_once* macros to allow printing out one time debug
> messages which can be still controlled via drm.debug parameter.
Reviewed-by: José Roberto de Souza
>
> Cc: José Roberto de Souza
> Cc: Mika Kahola
> Cc: Mark Pearson
> Signed-off-by: Jouni Högander
> ---
> include/drm/drm_print.h | 29 +
> 1 file changed, 29 insertions(+)
>
> diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
> index 22fabdeed297..e339f47eeb6d 100644
> --- a/include/drm/drm_print.h
> +++ b/include/drm/drm_print.h
> @@ -476,6 +476,35 @@ void drm_dev_dbg(const struct device *dev, enum
> drm_debug_category category,
> #define drm_dbg_drmres(drm, fmt, ...)
> \
> drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_DRMRES, fmt,
> ##__VA_ARGS__)
>
> +#define drm_dev_dbg_once(dev, cat, fmt, ...) \
> +({ \
> + static bool __print_once __read_mostly; \
> + if (!__print_once) {\
> + __print_once = true;\
> + drm_dev_dbg(dev, cat, fmt, ##__VA_ARGS__); \
> + } \
> +})
> +
> +#define drm_dbg_once_core(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_CORE, fmt,
> ##__VA_ARGS__)
> +#define drm_dbg_once(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_DRIVER, fmt,
> ##__VA_ARGS__)
> +#define drm_dbg_once_kms(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_KMS, fmt,
> ##__VA_ARGS__)
> +#define drm_dbg_once_prime(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_PRIME, fmt,
> ##__VA_ARGS__)
> +#define drm_dbg_once_atomic(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_ATOMIC, fmt,
> ##__VA_ARGS__)
> +#define drm_dbg_once_vbl(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_VBL, fmt,
> ##__VA_ARGS__)
> +#define drm_dbg_once_state(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_STATE, fmt,
> ##__VA_ARGS__)
> +#define drm_dbg_once_lease(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_LEASE, fmt,
> ##__VA_ARGS__)
> +#define drm_dbg_once_dp(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_DP, fmt,
> ##__VA_ARGS__)
> +#define drm_dbg_once_drmres(drm, fmt, ...)
> \
> + drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_DRMRES, fmt,
> ##__VA_ARGS__)
>
> /*
> * printk based logging
Re: [Intel-gfx] [PATCH v3 3/3] drm/i915: Ensure damage clip area is within pipe area
On Tue, 2022-05-10 at 21:33 +0300, Jouni Högander wrote:
> Current update area calculation is not handling situation where
> e.g. cursor plane is fully or partially outside pipe area.
>
> Fix this by checking damage area against pipe_src area using
> drm_rect_intersect.
>
> v2: Set x1 and x2 in damaged_area initialization
> v3: Move drm_rect_intersect into clip_area_update
>
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5440
> Cc: José Roberto de Souza
> Cc: Mika Kahola
> Cc: Mark Pearson
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 24 +---
> 1 file changed, 17 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 3561c218cfb1..f4b4c1c83d2b 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1618,8 +1618,12 @@ static void psr2_man_trk_ctl_calc(struct
> intel_crtc_state *crtc_state,
> }
>
> static void clip_area_update(struct drm_rect *overlap_damage_area,
> - struct drm_rect *damage_area)
> + struct drm_rect *damage_area,
> + struct drm_rect *draw_area)
s/draw_area/pipe_src?
> {
> + if (!drm_rect_intersect(damage_area, draw_area))
> + return;
> +
> if (overlap_damage_area->y1 == -1) {
> overlap_damage_area->y1 = damage_area->y1;
> overlap_damage_area->y2 = damage_area->y2;
> @@ -1709,7 +1713,8 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>*/
> for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,
>new_plane_state, i) {
> - struct drm_rect src, damaged_area = { .y1 = -1 };
> + struct drm_rect src, damaged_area = { .x1 = 0, .y1 = -1,
> + .x2 = INT_MAX };
> struct drm_atomic_helper_damage_iter iter;
> struct drm_rect clip;
>
> @@ -1736,20 +1741,23 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> if (old_plane_state->uapi.visible) {
> damaged_area.y1 = old_plane_state->uapi.dst.y1;
> damaged_area.y2 = old_plane_state->uapi.dst.y2;
> - clip_area_update(_clip, _area);
> + clip_area_update(_clip, _area,
> + _state->pipe_src);
> }
>
> if (new_plane_state->uapi.visible) {
> damaged_area.y1 = new_plane_state->uapi.dst.y1;
> damaged_area.y2 = new_plane_state->uapi.dst.y2;
> - clip_area_update(_clip, _area);
> + clip_area_update(_clip, _area,
> + _state->pipe_src);
> }
> continue;
> } else if (new_plane_state->uapi.alpha !=
> old_plane_state->uapi.alpha) {
> /* If alpha changed mark the whole plane area as
> damaged */
> damaged_area.y1 = new_plane_state->uapi.dst.y1;
> damaged_area.y2 = new_plane_state->uapi.dst.y2;
> - clip_area_update(_clip, _area);
> + clip_area_update(_clip, _area,
> + _state->pipe_src);
> continue;
> }
>
> @@ -1760,7 +1768,8 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> _plane_state->uapi);
> drm_atomic_for_each_plane_damage(, ) {
> if (drm_rect_intersect(, ))
> - clip_area_update(_area, );
> + clip_area_update(_area, ,
> + _state->pipe_src);
> }
>
> if (damaged_area.y1 == -1)
> @@ -1768,7 +1777,8 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
>
> damaged_area.y1 += new_plane_state->uapi.dst.y1 - src.y1;
> damaged_area.y2 += new_plane_state->uapi.dst.y1 - src.y1;
> - clip_area_update(_clip, _area);
> +
> + clip_area_update(_clip, _area,
> _state->pipe_src);
white space ^
with those nits:
Reviewed-by: José Roberto de Souza
> }
>
> /*
Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/psr: Use full update In case of area calculation fails
On Tue, 2022-05-10 at 21:33 +0300, Jouni Högander wrote:
> Currently we have some corner cases where area calculation fails. For
> these sel fetch area calculation ends up having update area as y1 = 0,
> y2 = 4. Instead of these values safer option is full update.
>
> One of such for example is big fb with offset. We don't have usable
> offset in psr2_sel_fetch_update. Currently it's open what is the
> proper way to fix this corner case. Use full update for now.
>
> v2: Commit message modified
> v3: Print out debug info once when area calculation fails
>
> Cc: José Roberto de Souza
> Cc: Mika Kahola
> Cc: Mark Pearson
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 06db407e2749..3561c218cfb1 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1685,6 +1685,7 @@ static bool psr2_sel_fetch_pipe_state_supported(const
> struct intel_crtc_state *c
> int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> + struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> struct drm_rect pipe_clip = { .x1 = 0, .y1 = -1, .x2 = INT_MAX, .y2 =
> -1 };
> struct intel_plane_state *new_plane_state, *old_plane_state;
> @@ -1770,6 +1771,17 @@ int intel_psr2_sel_fetch_update(struct
> intel_atomic_state *state,
> clip_area_update(_clip, _area);
> }
>
> + /*
> + * TODO: For now we are just using full update in case
> + * selective fetch area calculation fails. To optimize this we
> + * should identify cases where this happens and fix the area
> + * calculation for those.
> + */
> + if (pipe_clip.y1 == -1) {
> + drm_dbg_once_kms(_priv->drm, "No selective fetch area,
> using full update");
The debug message is misleading, a better message would be: Selective fetch
area calculation failed in pipeA.
with that:
Reviewed-by: José Roberto de Souza
> + full_update = true;
> + }
> +
> if (full_update)
> goto skip_sel_fetch_set_loop;
>
[Intel-gfx] [PATCH v3 3/3] drm/i915: Ensure damage clip area is within pipe area
Current update area calculation is not handling situation where
e.g. cursor plane is fully or partially outside pipe area.
Fix this by checking damage area against pipe_src area using
drm_rect_intersect.
v2: Set x1 and x2 in damaged_area initialization
v3: Move drm_rect_intersect into clip_area_update
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5440
Cc: José Roberto de Souza
Cc: Mika Kahola
Cc: Mark Pearson
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 24 +---
1 file changed, 17 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 3561c218cfb1..f4b4c1c83d2b 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1618,8 +1618,12 @@ static void psr2_man_trk_ctl_calc(struct
intel_crtc_state *crtc_state,
}
static void clip_area_update(struct drm_rect *overlap_damage_area,
-struct drm_rect *damage_area)
+struct drm_rect *damage_area,
+struct drm_rect *draw_area)
{
+ if (!drm_rect_intersect(damage_area, draw_area))
+ return;
+
if (overlap_damage_area->y1 == -1) {
overlap_damage_area->y1 = damage_area->y1;
overlap_damage_area->y2 = damage_area->y2;
@@ -1709,7 +1713,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state
*state,
*/
for_each_oldnew_intel_plane_in_state(state, plane, old_plane_state,
new_plane_state, i) {
- struct drm_rect src, damaged_area = { .y1 = -1 };
+ struct drm_rect src, damaged_area = { .x1 = 0, .y1 = -1,
+ .x2 = INT_MAX };
struct drm_atomic_helper_damage_iter iter;
struct drm_rect clip;
@@ -1736,20 +1741,23 @@ int intel_psr2_sel_fetch_update(struct
intel_atomic_state *state,
if (old_plane_state->uapi.visible) {
damaged_area.y1 = old_plane_state->uapi.dst.y1;
damaged_area.y2 = old_plane_state->uapi.dst.y2;
- clip_area_update(_clip, _area);
+ clip_area_update(_clip, _area,
+_state->pipe_src);
}
if (new_plane_state->uapi.visible) {
damaged_area.y1 = new_plane_state->uapi.dst.y1;
damaged_area.y2 = new_plane_state->uapi.dst.y2;
- clip_area_update(_clip, _area);
+ clip_area_update(_clip, _area,
+_state->pipe_src);
}
continue;
} else if (new_plane_state->uapi.alpha !=
old_plane_state->uapi.alpha) {
/* If alpha changed mark the whole plane area as
damaged */
damaged_area.y1 = new_plane_state->uapi.dst.y1;
damaged_area.y2 = new_plane_state->uapi.dst.y2;
- clip_area_update(_clip, _area);
+ clip_area_update(_clip, _area,
+_state->pipe_src);
continue;
}
@@ -1760,7 +1768,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state
*state,
_plane_state->uapi);
drm_atomic_for_each_plane_damage(, ) {
if (drm_rect_intersect(, ))
- clip_area_update(_area, );
+ clip_area_update(_area, ,
+_state->pipe_src);
}
if (damaged_area.y1 == -1)
@@ -1768,7 +1777,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state
*state,
damaged_area.y1 += new_plane_state->uapi.dst.y1 - src.y1;
damaged_area.y2 += new_plane_state->uapi.dst.y1 - src.y1;
- clip_area_update(_clip, _area);
+
+ clip_area_update(_clip, _area,
_state->pipe_src);
}
/*
--
2.25.1
[Intel-gfx] [PATCH v3 2/3] drm/i915/psr: Use full update In case of area calculation fails
Currently we have some corner cases where area calculation fails. For
these sel fetch area calculation ends up having update area as y1 = 0,
y2 = 4. Instead of these values safer option is full update.
One of such for example is big fb with offset. We don't have usable
offset in psr2_sel_fetch_update. Currently it's open what is the
proper way to fix this corner case. Use full update for now.
v2: Commit message modified
v3: Print out debug info once when area calculation fails
Cc: José Roberto de Souza
Cc: Mika Kahola
Cc: Mark Pearson
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 06db407e2749..3561c218cfb1 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1685,6 +1685,7 @@ static bool psr2_sel_fetch_pipe_state_supported(const
struct intel_crtc_state *c
int intel_psr2_sel_fetch_update(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
+ struct drm_i915_private *dev_priv = to_i915(state->base.dev);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
struct drm_rect pipe_clip = { .x1 = 0, .y1 = -1, .x2 = INT_MAX, .y2 =
-1 };
struct intel_plane_state *new_plane_state, *old_plane_state;
@@ -1770,6 +1771,17 @@ int intel_psr2_sel_fetch_update(struct
intel_atomic_state *state,
clip_area_update(_clip, _area);
}
+ /*
+* TODO: For now we are just using full update in case
+* selective fetch area calculation fails. To optimize this we
+* should identify cases where this happens and fix the area
+* calculation for those.
+*/
+ if (pipe_clip.y1 == -1) {
+ drm_dbg_once_kms(_priv->drm, "No selective fetch area,
using full update");
+ full_update = true;
+ }
+
if (full_update)
goto skip_sel_fetch_set_loop;
--
2.25.1
[Intel-gfx] [PATCH v3 1/3] drm/print: Add drm_debug_once* macros
Add drm_debug_once* macros to allow printing out one time debug
messages which can be still controlled via drm.debug parameter.
Cc: José Roberto de Souza
Cc: Mika Kahola
Cc: Mark Pearson
Signed-off-by: Jouni Högander
---
include/drm/drm_print.h | 29 +
1 file changed, 29 insertions(+)
diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
index 22fabdeed297..e339f47eeb6d 100644
--- a/include/drm/drm_print.h
+++ b/include/drm/drm_print.h
@@ -476,6 +476,35 @@ void drm_dev_dbg(const struct device *dev, enum
drm_debug_category category,
#define drm_dbg_drmres(drm, fmt, ...) \
drm_dev_dbg((drm) ? (drm)->dev : NULL, DRM_UT_DRMRES, fmt,
##__VA_ARGS__)
+#define drm_dev_dbg_once(dev, cat, fmt, ...) \
+({ \
+ static bool __print_once __read_mostly; \
+ if (!__print_once) {\
+ __print_once = true;\
+ drm_dev_dbg(dev, cat, fmt, ##__VA_ARGS__); \
+ } \
+})
+
+#define drm_dbg_once_core(drm, fmt, ...)
\
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_CORE, fmt,
##__VA_ARGS__)
+#define drm_dbg_once(drm, fmt, ...)
\
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_DRIVER, fmt,
##__VA_ARGS__)
+#define drm_dbg_once_kms(drm, fmt, ...)
\
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_KMS, fmt,
##__VA_ARGS__)
+#define drm_dbg_once_prime(drm, fmt, ...)
\
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_PRIME, fmt,
##__VA_ARGS__)
+#define drm_dbg_once_atomic(drm, fmt, ...)
\
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_ATOMIC, fmt,
##__VA_ARGS__)
+#define drm_dbg_once_vbl(drm, fmt, ...)
\
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_VBL, fmt,
##__VA_ARGS__)
+#define drm_dbg_once_state(drm, fmt, ...)
\
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_STATE, fmt,
##__VA_ARGS__)
+#define drm_dbg_once_lease(drm, fmt, ...)
\
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_LEASE, fmt,
##__VA_ARGS__)
+#define drm_dbg_once_dp(drm, fmt, ...) \
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_DP, fmt,
##__VA_ARGS__)
+#define drm_dbg_once_drmres(drm, fmt, ...)
\
+ drm_dev_dbg_once((drm) ? (drm)->dev : NULL, DRM_UT_DRMRES, fmt,
##__VA_ARGS__)
/*
* printk based logging
--
2.25.1
[Intel-gfx] [PATCH v3 0/3] Fixes for selective fetch area calculation
Currently selective fetch area calculation ends up as bogus area in at least following cases: 1. Updated plane is partially or fully outside pipe area 2. Big fb with only part of memory area used for plane These end up as y1 = 0, y2 = 4 or y2 being outside pipe area. This patch set addresses these by ensuring update area is within pipe area or by falling back to full update. Patch set also adds drm_dbg_once* macros to print out debug message only once. drm_dbg_once_kms is used to printout debug message when selective fetch area calculation fails. v3: - Add drm_dbg_once* and use it when sel fetch area calculation fails - Move drm_rect_intersect to clip_area_update v2: - Update commit message of first patch - Set damaged_area x1 and x2 during initialization Cc: José Roberto de Souza Cc: Mika Kahola Cc: Mark Pearson Jouni Högander (3): drm/print: Add drm_debug_once* macros drm/i915/psr: Use full update In case of area calculation fails drm/i915: Ensure damage clip area is within pipe area drivers/gpu/drm/i915/display/intel_psr.c | 36 +++- include/drm/drm_print.h | 29 +++ 2 files changed, 58 insertions(+), 7 deletions(-) -- 2.25.1
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c (rev2)
== Series Details == Series: drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c (rev2) URL : https://patchwork.freedesktop.org/series/103803/ State : success == Summary == CI Bug Log - changes from CI_DRM_11628 -> Patchwork_103803v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/index.html Participating hosts (38 -> 42) -- Additional (5): fi-cfl-8700k fi-kbl-guc bat-adlp-4 fi-kbl-x1275 fi-bsw-nick Missing(1): fi-bsw-cyan Known issues Here are the changes found in Patchwork_103803v2 that come from known issues: ### CI changes ### Possible fixes * boot: - fi-ilk-650: [FAIL][1] ([i915#5710]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-ilk-650/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-ilk-650/boot.html ### IGT changes ### Issues hit * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-guc: NOTRUN -> [SKIP][3] ([fdo#109271]) +19 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-kbl-guc/igt@gem_exec_fence@basic-b...@bcs0.html * igt@gem_huc_copy@huc-copy: - fi-ilk-650: NOTRUN -> [SKIP][4] ([fdo#109271]) +22 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-ilk-650/igt@gem_huc_c...@huc-copy.html - fi-kbl-x1275: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-kbl-x1275/igt@gem_huc_c...@huc-copy.html - fi-cfl-8700k: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-cfl-8700k/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - bat-adlp-4: NOTRUN -> [SKIP][7] ([i915#4613]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/bat-adlp-4/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-cfl-8700k: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-cfl-8700k/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-kbl-x1275: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#4613]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-kbl-x1275/igt@gem_lmem_swapp...@verify-random.html * igt@gem_tiled_pread_basic: - bat-adlp-4: NOTRUN -> [SKIP][10] ([i915#3282]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/bat-adlp-4/igt@gem_tiled_pread_basic.html * igt@i915_selftest@live@gt_pm: - fi-tgl-1115g4: [PASS][11] -> [DMESG-FAIL][12] ([i915#3987]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-tgl-1115g4/igt@i915_selftest@live@gt_pm.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-tgl-1115g4/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@requests: - fi-blb-e6850: [PASS][13] -> [DMESG-FAIL][14] ([i915#4528]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-blb-e6850/igt@i915_selftest@l...@requests.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-blb-e6850/igt@i915_selftest@l...@requests.html * igt@kms_busy@basic: - fi-kbl-guc: NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#1845]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-kbl-guc/igt@kms_b...@basic.html * igt@kms_busy@basic@modeset: - bat-adlp-4: NOTRUN -> [DMESG-WARN][16] ([i915#3576]) +2 similar issues [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/bat-adlp-4/igt@kms_busy@ba...@modeset.html * igt@kms_chamelium@dp-crc-fast: - bat-adlp-4: NOTRUN -> [SKIP][17] ([fdo#111827]) +8 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/bat-adlp-4/igt@kms_chamel...@dp-crc-fast.html - fi-bsw-nick:NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +8 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-bsw-nick/igt@kms_chamel...@dp-crc-fast.html * igt@kms_chamelium@dp-hpd-fast: - fi-ilk-650: NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +8 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-ilk-650/igt@kms_chamel...@dp-hpd-fast.html * igt@kms_chamelium@hdmi-crc-fast: - fi-kbl-x1275: NOTRUN -> [SKIP][20] ([fdo#109271] / [fdo#111827]) +8 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v2/fi-kbl-x1275/igt@kms_chamel...@hdmi-crc-fast.html * igt@kms_chamelium@vga-edid-read:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c (rev2)
== Series Details == Series: drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c (rev2) URL : https://patchwork.freedesktop.org/series/103803/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -O:drivers/gpu/drm/i915/display/intel_display_power.c:2431:34:int enum port -O:drivers/gpu/drm/i915/display/intel_display_power.c:2431:34:unsigned int enum intel_display_power_domain -O:drivers/gpu/drm/i915/display/intel_display_power.c:2431:34: warning: mixing different enum types: -O:drivers/gpu/drm/i915/display/intel_display_power.c:2442:37:int enum port -O:drivers/gpu/drm/i915/display/intel_display_power.c:2442:37:unsigned int enum intel_display_power_domain -O:drivers/gpu/drm/i915/display/intel_display_power.c:2442:37: warning: mixing different enum types: -O:drivers/gpu/drm/i915/display/intel_display_power.c:2468:43:unsigned int enum aux_ch -O:drivers/gpu/drm/i915/display/intel_display_power.c:2468:43:unsigned int enum intel_display_power_domain -O:drivers/gpu/drm/i915/display/intel_display_power.c:2468:43: warning: mixing different enum types: -O:drivers/gpu/drm/i915/display/intel_display_power.c:2479:35:unsigned int enum aux_ch -O:drivers/gpu/drm/i915/display/intel_display_power.c:2479:35:unsigned int enum intel_display_power_domain -O:drivers/gpu/drm/i915/display/intel_display_power.c:2479:35: warning: mixing different enum types:
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: disable HPD workers before display driver unregister
== Series Details == Series: drm/i915/display: disable HPD workers before display driver unregister URL : https://patchwork.freedesktop.org/series/103811/ State : success == Summary == CI Bug Log - changes from CI_DRM_11628 -> Patchwork_103811v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/index.html Participating hosts (38 -> 42) -- Additional (8): fi-rkl-11600 bat-adlm-1 fi-icl-u2 fi-cfl-8700k bat-adlp-4 fi-kbl-guc fi-kbl-x1275 fi-bsw-nick Missing(4): fi-bsw-cyan bat-jsl-2 bat-jsl-1 bat-adlp-6 Known issues Here are the changes found in Patchwork_103811v1 that come from known issues: ### CI changes ### Possible fixes * boot: - fi-ilk-650: [FAIL][1] ([i915#5710]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-ilk-650/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-ilk-650/boot.html ### IGT changes ### Issues hit * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-guc: NOTRUN -> [SKIP][3] ([fdo#109271]) +19 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-kbl-guc/igt@gem_exec_fence@basic-b...@bcs0.html * igt@gem_huc_copy@huc-copy: - fi-ilk-650: NOTRUN -> [SKIP][4] ([fdo#109271]) +22 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-ilk-650/igt@gem_huc_c...@huc-copy.html - fi-kbl-x1275: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-kbl-x1275/igt@gem_huc_c...@huc-copy.html - fi-rkl-11600: NOTRUN -> [SKIP][6] ([i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-rkl-11600/igt@gem_huc_c...@huc-copy.html - fi-cfl-8700k: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2190]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-cfl-8700k/igt@gem_huc_c...@huc-copy.html - fi-icl-u2: NOTRUN -> [SKIP][8] ([i915#2190]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-icl-u2/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-rkl-11600: NOTRUN -> [SKIP][9] ([i915#4613]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-rkl-11600/igt@gem_lmem_swapp...@basic.html - bat-adlp-4: NOTRUN -> [SKIP][10] ([i915#4613]) +3 similar issues [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/bat-adlp-4/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-icl-u2: NOTRUN -> [SKIP][11] ([i915#4613]) +3 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-icl-u2/igt@gem_lmem_swapp...@parallel-random-engines.html - fi-cfl-8700k: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613]) +3 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-cfl-8700k/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-kbl-x1275: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-kbl-x1275/igt@gem_lmem_swapp...@verify-random.html * igt@gem_tiled_pread_basic: - bat-adlp-4: NOTRUN -> [SKIP][14] ([i915#3282]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/bat-adlp-4/igt@gem_tiled_pread_basic.html - fi-rkl-11600: NOTRUN -> [SKIP][15] ([i915#3282]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-rkl-11600/igt@gem_tiled_pread_basic.html * igt@i915_pm_backlight@basic-brightness: - fi-rkl-11600: NOTRUN -> [SKIP][16] ([i915#3012]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-rkl-11600/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@gem: - fi-pnv-d510:NOTRUN -> [DMESG-FAIL][17] ([i915#4528]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-pnv-d510/igt@i915_selftest@l...@gem.html * igt@i915_selftest@live@requests: - fi-blb-e6850: [PASS][18] -> [DMESG-FAIL][19] ([i915#4528]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-blb-e6850/igt@i915_selftest@l...@requests.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-blb-e6850/igt@i915_selftest@l...@requests.html * igt@kms_busy@basic: - fi-kbl-guc: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#1845]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103811v1/fi-kbl-guc/igt@kms_b...@basic.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-snb-2600:NOTRUN -> [SKIP][21] ([fdo#109271] / [fdo#111827])
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev5)
== Series Details ==
Series: drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev5)
URL : https://patchwork.freedesktop.org/series/102666/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11627_full -> Patchwork_102666v5_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (13 -> 12)
--
Missing(1): shard-dg1
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_102666v5_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_flush@basic-uc-pro-default:
- {shard-rkl}:[PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-rkl-6/igt@gem_exec_fl...@basic-uc-pro-default.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-rkl-5/igt@gem_exec_fl...@basic-uc-pro-default.html
* igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- {shard-rkl}:[SKIP][3] ([i915#1845] / [i915#4098]) ->
[INCOMPLETE][4]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-rkl-1/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-rkl-5/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
Known issues
Here are the changes found in Patchwork_102666v5_full that come from known
issues:
### CI changes ###
Possible fixes
* boot:
- shard-skl: ([PASS][5], [PASS][6], [PASS][7], [PASS][8],
[PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14],
[PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20],
[PASS][21], [PASS][22], [PASS][23], [FAIL][24], [PASS][25]) ([i915#5032]) ->
([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31],
[PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37],
[PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43],
[PASS][44], [PASS][45], [PASS][46], [PASS][47])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl3/boot.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl3/boot.html
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl2/boot.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl9/boot.html
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl6/boot.html
[28]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl9/boot.html
[29]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl9/boot.html
[30]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl7/boot.html
[31]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl8/boot.html
[32]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl8/boot.html
[33]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl7/boot.html
[34]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl10/boot.html
[35]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/shard-skl10/boot.html
[36]:
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/display: disable HPD workers before display driver unregister
== Series Details == Series: drm/i915/display: disable HPD workers before display driver unregister URL : https://patchwork.freedesktop.org/series/103811/ State : warning == Summary == Error: dim checkpatch failed ca003eeff722 drm/i915/display: disable HPD workers before display driver unregister -:9: WARNING:TYPO_SPELLING: 'deffered' may be misspelled - perhaps 'deferred'? #9: 1. Setup of deffered fbdev after fbdev unregistration. total: 0 errors, 1 warnings, 0 checks, 7 lines checked
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gt: Fix use of static in macro mismatch
== Series Details == Series: drm/i915/gt: Fix use of static in macro mismatch URL : https://patchwork.freedesktop.org/series/103806/ State : success == Summary == CI Bug Log - changes from CI_DRM_11628 -> Patchwork_103806v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/index.html Participating hosts (38 -> 41) -- Additional (5): fi-cfl-8700k fi-kbl-guc bat-adlp-4 fi-kbl-x1275 fi-bsw-nick Missing(2): fi-bsw-cyan bat-jsl-2 Known issues Here are the changes found in Patchwork_103806v1 that come from known issues: ### CI changes ### Possible fixes * boot: - fi-ilk-650: [FAIL][1] ([i915#5710]) -> [PASS][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-ilk-650/boot.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-ilk-650/boot.html ### IGT changes ### Issues hit * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-guc: NOTRUN -> [SKIP][3] ([fdo#109271]) +19 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-kbl-guc/igt@gem_exec_fence@basic-b...@bcs0.html * igt@gem_huc_copy@huc-copy: - fi-ilk-650: NOTRUN -> [SKIP][4] ([fdo#109271]) +22 similar issues [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-ilk-650/igt@gem_huc_c...@huc-copy.html - fi-kbl-x1275: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-kbl-x1275/igt@gem_huc_c...@huc-copy.html - fi-cfl-8700k: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#2190]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-cfl-8700k/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - bat-adlp-4: NOTRUN -> [SKIP][7] ([i915#4613]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/bat-adlp-4/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-cfl-8700k: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-cfl-8700k/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-kbl-x1275: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#4613]) +3 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-kbl-x1275/igt@gem_lmem_swapp...@verify-random.html * igt@gem_tiled_pread_basic: - bat-adlp-4: NOTRUN -> [SKIP][10] ([i915#3282]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/bat-adlp-4/igt@gem_tiled_pread_basic.html * igt@i915_module_load@reload: - fi-kbl-soraka: [PASS][11] -> [DMESG-WARN][12] ([i915#1982]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-kbl-soraka/igt@i915_module_l...@reload.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-kbl-soraka/igt@i915_module_l...@reload.html * igt@i915_selftest@live@gem: - fi-pnv-d510:NOTRUN -> [DMESG-FAIL][13] ([i915#4528]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-pnv-d510/igt@i915_selftest@l...@gem.html * igt@i915_selftest@live@hangcheck: - fi-hsw-4770:[PASS][14] -> [INCOMPLETE][15] ([i915#4785]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html * igt@kms_busy@basic: - fi-kbl-guc: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#1845]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-kbl-guc/igt@kms_b...@basic.html * igt@kms_chamelium@dp-crc-fast: - bat-adlp-4: NOTRUN -> [SKIP][17] ([fdo#111827]) +8 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/bat-adlp-4/igt@kms_chamel...@dp-crc-fast.html - fi-bsw-nick:NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +8 similar issues [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-bsw-nick/igt@kms_chamel...@dp-crc-fast.html * igt@kms_chamelium@dp-hpd-fast: - fi-ilk-650: NOTRUN -> [SKIP][19] ([fdo#109271] / [fdo#111827]) +8 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-ilk-650/igt@kms_chamel...@dp-hpd-fast.html * igt@kms_chamelium@hdmi-crc-fast: - fi-kbl-x1275: NOTRUN -> [SKIP][20] ([fdo#109271] / [fdo#111827]) +8 similar issues [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103806v1/fi-kbl-x1275/igt@kms_chamel...@hdmi-crc-fast.html * igt@kms_chamelium@vga-edid-read: - fi-cfl-8700k: NOTRUN -> [SKIP][21]
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/gt: Fix use of static in macro mismatch
== Series Details == Series: drm/i915/gt: Fix use of static in macro mismatch URL : https://patchwork.freedesktop.org/series/103806/ State : warning == Summary == Error: dim checkpatch failed 443b7d161fd5 drm/i915/gt: Fix use of static in macro mismatch -:27: WARNING:LONG_LINE: line length of 104 exceeds 100 columns #27: FILE: drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c:460: + static struct device_attribute dev_attr_gt_##_name = __ATTR(gt_##_name, _mode, _show, _store); \ -:28: WARNING:LONG_LINE: line length of 103 exceeds 100 columns #28: FILE: drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c:461: + static struct device_attribute dev_attr_rps_##_name = __ATTR(rps_##_name, _mode, _show, _store) -:49: CHECK:CAMELCASE: Avoid CamelCase: #49: FILE: drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c:474: +INTEL_GT_RPS_SYSFS_ATTR_RO(RPn_freq_mhz); total: 0 errors, 2 warnings, 1 checks, 33 lines checked
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: Make drop_pages() return bool (rev2)
== Series Details ==
Series: drm/i915/gem: Make drop_pages() return bool (rev2)
URL : https://patchwork.freedesktop.org/series/103466/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11627_full -> Patchwork_103466v2_full
Summary
---
**SUCCESS**
No regressions found.
Participating hosts (13 -> 13)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_103466v2_full:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_ctx_isolation@preservation-s3@rcs0:
- {shard-tglu}: NOTRUN -> [INCOMPLETE][1]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-tglu-8/igt@gem_ctx_isolation@preservation...@rcs0.html
* igt@gem_workarounds@suspend-resume-fd:
- {shard-dg1}:NOTRUN -> [INCOMPLETE][2]
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-dg1-17/igt@gem_workarou...@suspend-resume-fd.html
Known issues
Here are the changes found in Patchwork_103466v2_full that come from known
issues:
### CI changes ###
Possible fixes
* boot:
- shard-skl: ([PASS][3], [PASS][4], [PASS][5], [PASS][6],
[PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12],
[PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18],
[PASS][19], [PASS][20], [PASS][21], [FAIL][22], [PASS][23]) ([i915#5032]) ->
([PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29],
[PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35],
[PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41],
[PASS][42], [PASS][43])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl9/boot.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl7/boot.html
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[19]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[20]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl4/boot.html
[21]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl3/boot.html
[22]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl3/boot.html
[23]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/shard-skl2/boot.html
[24]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl9/boot.html
[25]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl9/boot.html
[26]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl8/boot.html
[27]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl8/boot.html
[28]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl8/boot.html
[29]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl7/boot.html
[30]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl7/boot.html
[31]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl6/boot.html
[32]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl6/boot.html
[33]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl6/boot.html
[34]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl5/boot.html
[35]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl4/boot.html
[36]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl4/boot.html
[37]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103466v2/shard-skl3/boot.html
[38]:
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c
== Series Details == Series: drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c URL : https://patchwork.freedesktop.org/series/103803/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11628 -> Patchwork_103803v1 Summary --- **FAILURE** Serious unknown changes coming with Patchwork_103803v1 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_103803v1, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/index.html Participating hosts (38 -> 42) -- Additional (6): fi-icl-u2 fi-cfl-8700k fi-kbl-guc bat-adlp-4 fi-kbl-x1275 fi-bsw-nick Missing(2): fi-bsw-cyan bat-dg2-9 Possible new issues --- Here are the unknown changes that may have been introduced in Patchwork_103803v1: ### IGT changes ### Possible regressions * igt@i915_selftest@live@hugepages: - fi-icl-u2: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-icl-u2/igt@i915_selftest@l...@hugepages.html * igt@kms_addfb_basic@addfb25-x-tiled-legacy: - fi-kbl-soraka: [PASS][2] -> [INCOMPLETE][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-kbl-soraka/igt@kms_addfb_ba...@addfb25-x-tiled-legacy.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-kbl-soraka/igt@kms_addfb_ba...@addfb25-x-tiled-legacy.html Known issues Here are the changes found in Patchwork_103803v1 that come from known issues: ### CI changes ### Possible fixes * boot: - fi-ilk-650: [FAIL][4] ([i915#5710]) -> [PASS][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-ilk-650/boot.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-ilk-650/boot.html ### IGT changes ### Issues hit * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-guc: NOTRUN -> [SKIP][6] ([fdo#109271]) +19 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-kbl-guc/igt@gem_exec_fence@basic-b...@bcs0.html * igt@gem_huc_copy@huc-copy: - fi-ilk-650: NOTRUN -> [SKIP][7] ([fdo#109271]) +22 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-ilk-650/igt@gem_huc_c...@huc-copy.html - fi-kbl-x1275: NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#2190]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-kbl-x1275/igt@gem_huc_c...@huc-copy.html - fi-cfl-8700k: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#2190]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-cfl-8700k/igt@gem_huc_c...@huc-copy.html - fi-icl-u2: NOTRUN -> [SKIP][10] ([i915#2190]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-icl-u2/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - bat-adlp-4: NOTRUN -> [SKIP][11] ([i915#4613]) +3 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/bat-adlp-4/igt@gem_lmem_swapp...@basic.html * igt@gem_lmem_swapping@parallel-random-engines: - fi-icl-u2: NOTRUN -> [SKIP][12] ([i915#4613]) +3 similar issues [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-icl-u2/igt@gem_lmem_swapp...@parallel-random-engines.html - fi-cfl-8700k: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613]) +3 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-cfl-8700k/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_lmem_swapping@verify-random: - fi-kbl-x1275: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613]) +3 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-kbl-x1275/igt@gem_lmem_swapp...@verify-random.html * igt@gem_tiled_pread_basic: - bat-adlp-4: NOTRUN -> [SKIP][15] ([i915#3282]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/bat-adlp-4/igt@gem_tiled_pread_basic.html * igt@i915_selftest@live@gtt: - fi-bdw-5557u: [PASS][16] -> [DMESG-FAIL][17] ([i915#3674]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103803v1/fi-bdw-5557u/igt@i915_selftest@l...@gtt.html * igt@i915_selftest@live@requests: - fi-blb-e6850: [PASS][18] -> [DMESG-FAIL][19] ([i915#4528]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11628/fi-blb-e6850/igt@i915_selftest@l...@requests.html [19]:
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c
== Series Details == Series: drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c URL : https://patchwork.freedesktop.org/series/103803/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -O:drivers/gpu/drm/i915/display/intel_display_power.c:2431:34:int enum port -O:drivers/gpu/drm/i915/display/intel_display_power.c:2431:34:unsigned int enum intel_display_power_domain -O:drivers/gpu/drm/i915/display/intel_display_power.c:2431:34: warning: mixing different enum types: -O:drivers/gpu/drm/i915/display/intel_display_power.c:2442:37:int enum port -O:drivers/gpu/drm/i915/display/intel_display_power.c:2442:37:unsigned int enum intel_display_power_domain -O:drivers/gpu/drm/i915/display/intel_display_power.c:2442:37: warning: mixing different enum types: -O:drivers/gpu/drm/i915/display/intel_display_power.c:2468:43:unsigned int enum aux_ch -O:drivers/gpu/drm/i915/display/intel_display_power.c:2468:43:unsigned int enum intel_display_power_domain -O:drivers/gpu/drm/i915/display/intel_display_power.c:2468:43: warning: mixing different enum types: -O:drivers/gpu/drm/i915/display/intel_display_power.c:2479:35:unsigned int enum aux_ch -O:drivers/gpu/drm/i915/display/intel_display_power.c:2479:35:unsigned int enum intel_display_power_domain -O:drivers/gpu/drm/i915/display/intel_display_power.c:2479:35: warning: mixing different enum types:
[Intel-gfx] [PATCH] drm/i915/display: disable HPD workers before display driver unregister
Handling HPD during driver removal is pointless, and can cause different use-after-free/concurrency issues: 1. Setup of deffered fbdev after fbdev unregistration. 2. Access to DP-AUX after DP-AUX removal. Below stacktraces of both cases observed on CI: [272.634530] general protection fault, probably for non-canonical address 0x6b6b6b6b6b6b6b6b: [#1] PREEMPT SMP NOPTI [272.634536] CPU: 0 PID: 6030 Comm: i915_selftest Tainted: G U 5.18.0-rc5-CI_DRM_11603-g12dccf4f5eef+ #1 [272.634541] Hardware name: Intel Corporation Raptor Lake Client Platform/RPL-S ADP-S DDR5 UDIMM CRB, BIOS RPLSFWI1.R00.2397.A01.2109300731 09/30/2021 [272.634545] RIP: 0010:fb_do_apertures_overlap.part.14+0x26/0x60 ... [272.634582] Call Trace: [272.634583] [272.634585] do_remove_conflicting_framebuffers+0x59/0xa0 [272.634589] remove_conflicting_framebuffers+0x2d/0xc0 [272.634592] remove_conflicting_pci_framebuffers+0xc8/0x110 [272.634595] drm_aperture_remove_conflicting_pci_framebuffers+0x52/0x70 [272.634604] i915_driver_probe+0x63a/0xdd0 [i915] [283.405824] cpu_latency_qos_update_request called for unknown object [283.405866] WARNING: CPU: 2 PID: 240 at kernel/power/qos.c:296 cpu_latency_qos_update_request+0x2d/0x100 [283.405912] CPU: 2 PID: 240 Comm: kworker/u64:9 Not tainted 5.18.0-rc6-Patchwork_103738v3-g1672d1c43e43+ #1 [283.405915] Hardware name: Intel Corporation Raptor Lake Client Platform/RPL-S ADP-S DDR5 UDIMM CRB, BIOS RPLSFWI1.R00.2397.A01.2109300731 09/30/2021 [283.405916] Workqueue: i915-dp i915_digport_work_func [i915] [283.406020] RIP: 0010:cpu_latency_qos_update_request+0x2d/0x100 ... [283.406040] Call Trace: [283.406041] [283.406044] intel_dp_aux_xfer+0x60e/0x8e0 [i915] [283.406131] ? finish_swait+0x80/0x80 [283.406139] intel_dp_aux_transfer+0xc5/0x2b0 [i915] [283.406218] drm_dp_dpcd_access+0x79/0x130 [drm_display_helper] [283.406227] drm_dp_dpcd_read+0xe2/0xf0 [drm_display_helper] [283.406233] intel_dp_hpd_pulse+0x134/0x570 [i915] [283.406308] ? __down_killable+0x70/0x140 [283.406313] i915_digport_work_func+0xba/0x150 [i915] Signed-off-by: Andrzej Hajda --- Hi all, This is my 3rd attempt to solve some old CI bug[1]. The first one caused issues in kms code [2], 2nd one revealed that not only fbdev does not like HPD on removal [3]. I hope this one will solve things definitely. Moreover this is quite rare bug, but due to specific configuration of one of CI machines it appears there very frequently. [1]: https://gitlab.freedesktop.org/drm/intel/-/issues/5329 [2]: https://patchwork.freedesktop.org/series/103621/ [3]: https://patchwork.freedesktop.org/series/103738/ Regards Andrzej --- drivers/gpu/drm/i915/display/intel_display.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 806d50b302ab92..d21bbcce80b016 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -10584,6 +10584,7 @@ void intel_display_driver_unregister(struct drm_i915_private *i915) if (!HAS_DISPLAY(i915)) return; + intel_hpd_cancel_work(i915); intel_fbdev_unregister(i915); intel_audio_deinit(i915); -- 2.25.1
[Intel-gfx] [PATCH] drm/i915/gt: Fix use of static in macro mismatch
The INTEL_GT_RPS_SYSFS_ATTR was creating to different structures
but. When called with the "static" keyword this is affecting only
the first structure, while the second is created as non static.
Move the static keyword inside the macros to affect both the
structures.
Reported-by: Jani Nikula
Fixes: 56a709cf77468 ("drm/i915/gt: Create per-tile RPS sysfs interfaces")
Signed-off-by: Andi Shyti
---
drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
index e92990d514b24..f76b6cf8040ec 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c
@@ -457,22 +457,23 @@ static ssize_t vlv_rpe_freq_mhz_show(struct device *dev,
}
#define INTEL_GT_RPS_SYSFS_ATTR(_name, _mode, _show, _store) \
- struct device_attribute dev_attr_gt_##_name = __ATTR(gt_##_name, _mode,
_show, _store); \
- struct device_attribute dev_attr_rps_##_name = __ATTR(rps_##_name,
_mode, _show, _store)
+ static struct device_attribute dev_attr_gt_##_name = __ATTR(gt_##_name,
_mode, _show, _store); \
+ static struct device_attribute dev_attr_rps_##_name =
__ATTR(rps_##_name, _mode, _show, _store)
#define INTEL_GT_RPS_SYSFS_ATTR_RO(_name) \
INTEL_GT_RPS_SYSFS_ATTR(_name, 0444, _name##_show, NULL)
#define INTEL_GT_RPS_SYSFS_ATTR_RW(_name) \
INTEL_GT_RPS_SYSFS_ATTR(_name, 0644, _name##_show,
_name##_store)
-static INTEL_GT_RPS_SYSFS_ATTR_RO(act_freq_mhz);
-static INTEL_GT_RPS_SYSFS_ATTR_RO(cur_freq_mhz);
-static INTEL_GT_RPS_SYSFS_ATTR_RW(boost_freq_mhz);
-static INTEL_GT_RPS_SYSFS_ATTR_RO(RP0_freq_mhz);
-static INTEL_GT_RPS_SYSFS_ATTR_RO(RP1_freq_mhz);
-static INTEL_GT_RPS_SYSFS_ATTR_RO(RPn_freq_mhz);
-static INTEL_GT_RPS_SYSFS_ATTR_RW(max_freq_mhz);
-static INTEL_GT_RPS_SYSFS_ATTR_RW(min_freq_mhz);
+/* The below macros generate static structures */
+INTEL_GT_RPS_SYSFS_ATTR_RO(act_freq_mhz);
+INTEL_GT_RPS_SYSFS_ATTR_RO(cur_freq_mhz);
+INTEL_GT_RPS_SYSFS_ATTR_RW(boost_freq_mhz);
+INTEL_GT_RPS_SYSFS_ATTR_RO(RP0_freq_mhz);
+INTEL_GT_RPS_SYSFS_ATTR_RO(RP1_freq_mhz);
+INTEL_GT_RPS_SYSFS_ATTR_RO(RPn_freq_mhz);
+INTEL_GT_RPS_SYSFS_ATTR_RW(max_freq_mhz);
+INTEL_GT_RPS_SYSFS_ATTR_RW(min_freq_mhz);
static DEVICE_ATTR_RO(vlv_rpe_freq_mhz);
--
2.36.0
Re: [Intel-gfx] [PATCH 6/8] drm/i915/gt: Fix memory leaks in per-gt sysfs
On 10/05/2022 11:41, Andrzej Hajda wrote:
On 10.05.2022 11:48, Tvrtko Ursulin wrote:
On 10/05/2022 10:39, Andrzej Hajda wrote:
On 10.05.2022 10:18, Tvrtko Ursulin wrote:
On 10/05/2022 08:58, Andrzej Hajda wrote:
Hi Tvrtko,
On 10.05.2022 09:28, Tvrtko Ursulin wrote:
On 29/04/2022 20:56, Ashutosh Dixit wrote:
All kmalloc'd kobjects need a kobject_put() to free memory. For
example in
previous code, kobj_gt_release() never gets called. The
requirement of
kobject_put() now results in a slightly different code organization.
v2: s/gtn/gt/ (Andi)
Cc: Andi Shyti
Cc: Andrzej Hajda
Fixes: b770bcfae9ad ("drm/i915/gt: create per-tile sysfs interface")
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/gt/intel_gt.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt_sysfs.c | 29
++--
drivers/gpu/drm/i915/gt/intel_gt_sysfs.h | 6 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +++
drivers/gpu/drm/i915/i915_sysfs.c | 2 ++
5 files changed, 19 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 92394f13b42f..9aede288eb86 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -785,6 +785,7 @@ void intel_gt_driver_unregister(struct
intel_gt *gt)
{
intel_wakeref_t wakeref;
+ intel_gt_sysfs_unregister(gt);
intel_rps_driver_unregister(>rps);
intel_gsc_fini(>gsc);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
index 8ec8bc660c8c..9e4ebf53379b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
@@ -24,7 +24,7 @@ bool is_object_gt(struct kobject *kobj)
static struct intel_gt *kobj_to_gt(struct kobject *kobj)
{
- return container_of(kobj, struct kobj_gt, base)->gt;
+ return container_of(kobj, struct intel_gt, sysfs_gt);
}
struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev,
@@ -72,9 +72,9 @@ static struct attribute *id_attrs[] = {
};
ATTRIBUTE_GROUPS(id);
+/* A kobject needs a release() method even if it does nothing */
static void kobj_gt_release(struct kobject *kobj)
{
- kfree(kobj);
}
static struct kobj_type kobj_gt_type = {
@@ -85,8 +85,6 @@ static struct kobj_type kobj_gt_type = {
void intel_gt_sysfs_register(struct intel_gt *gt)
{
- struct kobj_gt *kg;
-
/*
* We need to make things right with the
* ABI compatibility. The files were originally
@@ -98,25 +96,22 @@ void intel_gt_sysfs_register(struct intel_gt
*gt)
if (gt_is_root(gt))
intel_gt_sysfs_pm_init(gt, gt_get_parent_obj(gt));
- kg = kzalloc(sizeof(*kg), GFP_KERNEL);
- if (!kg)
+ /* init and xfer ownership to sysfs tree */
+ if (kobject_init_and_add(>sysfs_gt, _gt_type,
+ gt->i915->sysfs_gt, "gt%d", gt->info.id))
Was there closure/agreement on the matter of whether or not there
is a potential race between "kfree(gt)" and sysfs access (last put
from sysfs that is)? I've noticed Andrzej and Ashutosh were
discussing it but did not read all the details.
Not really :)
IMO docs are against this practice, Ashutosh shows examples of this
practice in code and according to his analysis it is safe.
I gave up looking for contradictions :) Either it is OK, kobject is
not fully shared object, docs are obsolete and needs update, either
the patch is wrong.
Anyway finally I tend to accept this solution, I failed to prove it
is wrong :)
Like a question of whether hotunplug can be triggered while
userspace is sitting in a sysfs hook? Final kfree then has to be
delayed until userspace exists.
Btw where is the "kfree(gt)" for the tiles on the PCI remove path? I
can't find it.. Do we have a leak?
intel_gt_tile_cleanup ?
Called from intel_gt_release_all, whose only caller is the failure
path of i915_driver_probe. Feels like something is missing?
This is final proof this patch is safe - no kfree, no UAF :)
Apparently it is broken in internal branch as well.
Should I take care of it?
Don't know - can you see with Andi?
I *think* even though the patch which added this code carries my name,
it is probably quite far from what I originally wrote. (I alluded to
that in a1a70e75-2068-fa69-e307-456d031b2...@linux.intel.com, maybe I
should have been more explicit that I don't think it should have
preserved my authorship.) At least I checked that my late 2019. version
and it did not seem to have the gt leak issue. If it did I would have
felt responsible to fix it. :) As it stands init/de-init paths are
always tricky and need more time to look into than I have at the moment.
Regards,
Tvrtko
Re: [Intel-gfx] [PATCH v2 25/25] drm/edid: convert version_greater() to drm_edid
LGTM
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere. Also make version_greater()
a function for type safety.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a44818f44718..429078bcf372 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -45,10 +45,6 @@
#include "drm_crtc_internal.h"
-#define version_greater(edid, maj, min) \
- (((edid)->version > (maj)) || \
-((edid)->version == (maj) && (edid)->revision > (min)))
-
static int oui(u8 first, u8 second, u8 third)
{
return (first << 16) | (second << 8) | third;
@@ -1576,6 +1572,15 @@ struct drm_edid {
const struct edid *edid;
};
+static bool version_greater(const struct drm_edid *drm_edid,
+ u8 version, u8 revision)
+{
+ const struct edid *edid = drm_edid->edid;
+
+ return edid->version > version ||
+ (edid->version == version && edid->revision > revision);
+}
+
static int edid_extension_block_count(const struct edid *edid)
{
return edid->extensions;
@@ -3232,7 +3237,7 @@ do_inferred_modes(const struct detailed_timing *timing,
void *c)
closure->drm_edid,
timing);
- if (!version_greater(closure->drm_edid->edid, 1, 1))
+ if (!version_greater(closure->drm_edid, 1, 1))
return; /* GTF not defined yet */
switch (range->flags) {
@@ -3243,7 +3248,7 @@ do_inferred_modes(const struct detailed_timing *timing,
void *c)
timing);
break;
case 0x04: /* cvt, only in 1.4+ */
- if (!version_greater(closure->drm_edid->edid, 1, 3))
+ if (!version_greater(closure->drm_edid, 1, 3))
break;
closure->modes += drm_cvt_modes_for_range(closure->connector,
@@ -3264,7 +3269,7 @@ static int add_inferred_modes(struct drm_connector
*connector,
.drm_edid = drm_edid,
};
- if (version_greater(drm_edid->edid, 1, 0))
+ if (version_greater(drm_edid, 1, 0))
drm_for_each_detailed_block(drm_edid, do_inferred_modes,
);
return closure.modes;
@@ -3341,7 +3346,7 @@ static int add_established_modes(struct drm_connector
*connector,
}
}
- if (version_greater(edid, 1, 0))
+ if (version_greater(drm_edid, 1, 0))
drm_for_each_detailed_block(drm_edid, do_established_modes,
);
@@ -3396,7 +3401,7 @@ static int add_standard_modes(struct drm_connector *connector,
}
}
- if (version_greater(drm_edid->edid, 1, 0))
+ if (version_greater(drm_edid, 1, 0))
drm_for_each_detailed_block(drm_edid, do_standard_modes,
);
@@ -3476,7 +3481,7 @@ add_cvt_modes(struct drm_connector *connector, const struct drm_edid *drm_edid)
.drm_edid = drm_edid,
};
- if (version_greater(drm_edid->edid, 1, 2))
+ if (version_greater(drm_edid, 1, 2))
drm_for_each_detailed_block(drm_edid, do_cvt_mode, );
/* XXX should also look for CVT codes in VTB blocks */
@@ -3532,7 +3537,7 @@ static int add_detailed_modes(struct drm_connector
*connector,
.quirks = quirks,
};
- if (closure.preferred && !version_greater(drm_edid->edid, 1, 3))
+ if (closure.preferred && !version_greater(drm_edid, 1, 3))
closure.preferred =
(drm_edid->edid->features &
DRM_EDID_FEATURE_PREFERRED_TIMING);
@@ -5591,7 +5596,7 @@ static void drm_get_monitor_range(struct drm_connector *connector,
{
struct drm_display_info *info = >display_info;
- if (!version_greater(drm_edid->edid, 1, 1))
+ if (!version_greater(drm_edid, 1, 1))
return;
drm_for_each_detailed_block(drm_edid, get_monitor_range,
Re: [Intel-gfx] [PATCH v2 24/25] drm/displayid: convert to drm_edid
LGTM
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
v2: Rebase
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_displayid.c | 16
drivers/gpu/drm/drm_edid.c | 17 ++---
include/drm/drm_displayid.h | 6 +++---
include/drm/drm_edid.h | 6 --
4 files changed, 25 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/drm_displayid.c b/drivers/gpu/drm/drm_displayid.c
index 32da557b960f..38ea8203df45 100644
--- a/drivers/gpu/drm/drm_displayid.c
+++ b/drivers/gpu/drm/drm_displayid.c
@@ -33,11 +33,11 @@ static int validate_displayid(const u8 *displayid, int
length, int idx)
return 0;
}
-static const u8 *drm_find_displayid_extension(const struct edid *edid,
+static const u8 *drm_find_displayid_extension(const struct drm_edid *drm_edid,
int *length, int *idx,
int *ext_index)
{
- const u8 *displayid = drm_find_edid_extension(edid, DISPLAYID_EXT,
ext_index);
+ const u8 *displayid = drm_find_edid_extension(drm_edid, DISPLAYID_EXT,
ext_index);
const struct displayid_header *base;
int ret;
@@ -58,12 +58,12 @@ static const u8 *drm_find_displayid_extension(const struct edid *edid,
return displayid;
}
-void displayid_iter_edid_begin(const struct edid *edid,
+void displayid_iter_edid_begin(const struct drm_edid *drm_edid,
struct displayid_iter *iter)
{
memset(iter, 0, sizeof(*iter));
- iter->edid = edid;
+ iter->drm_edid = drm_edid;
}
static const struct displayid_block *
@@ -88,7 +88,7 @@ __displayid_iter_next(struct displayid_iter *iter)
{
const struct displayid_block *block;
- if (!iter->edid)
+ if (!iter->drm_edid)
return NULL;
if (iter->section) {
@@ -96,7 +96,7 @@ __displayid_iter_next(struct displayid_iter *iter)
block = displayid_iter_block(iter);
if (WARN_ON(!block)) {
iter->section = NULL;
- iter->edid = NULL;
+ iter->drm_edid = NULL;
return NULL;
}
@@ -109,12 +109,12 @@ __displayid_iter_next(struct displayid_iter *iter)
}
for (;;) {
- iter->section = drm_find_displayid_extension(iter->edid,
+ iter->section = drm_find_displayid_extension(iter->drm_edid,
>length,
>idx,
>ext_index);
if (!iter->section) {
- iter->edid = NULL;
+ iter->drm_edid = NULL;
return NULL;
}
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 26ac4d262e31..a44818f44718 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3563,10 +3563,13 @@ static int add_detailed_modes(struct drm_connector
*connector,
/*
* Search EDID for CEA extension block.
+ *
+ * FIXME: Prefer not returning pointers to raw EDID data.
*/
-const u8 *drm_find_edid_extension(const struct edid *edid,
+const u8 *drm_find_edid_extension(const struct drm_edid *drm_edid,
int ext_id, int *ext_index)
{
+ const struct edid *edid = drm_edid ? drm_edid->edid : NULL;
const u8 *edid_ext = NULL;
int i;
@@ -3598,11 +3601,11 @@ static bool drm_edid_has_cta_extension(const struct drm_edid *drm_edid)
bool found = false;
/* Look for a top level CEA extension block */
- if (drm_find_edid_extension(drm_edid->edid, CEA_EXT, _index))
+ if (drm_find_edid_extension(drm_edid, CEA_EXT, _index))
return true;
/* CEA blocks can also be found embedded in a DisplayID block */
- displayid_iter_edid_begin(drm_edid->edid, );
+ displayid_iter_edid_begin(drm_edid, );
displayid_iter_for_each(block, ) {
if (block->tag == DATA_BLOCK_CTA) {
found = true;
@@ -4454,7 +4457,7 @@ static void cea_db_iter_edid_begin(const struct drm_edid
*drm_edid,
memset(iter, 0, sizeof(*iter));
drm_edid_iter_begin(drm_edid, >edid_iter);
- displayid_iter_edid_begin(drm_edid ? drm_edid->edid : NULL,
>displayid_iter);
+ displayid_iter_edid_begin(drm_edid, >displayid_iter);
}
static const struct cea_db *
@@ -5657,7 +5660,7 @@ static void drm_update_mso(struct drm_connector
*connector,
const struct displayid_block *block;
struct displayid_iter iter;
- displayid_iter_edid_begin(drm_edid->edid, );
+ displayid_iter_edid_begin(drm_edid, );
displayid_iter_for_each(block, )
[Intel-gfx] [PATCH] drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c
Fix the following sparse warnings:
drivers/gpu/drm/i915/display/intel_display_power.c:2431:34: warning: mixing
different enum types:
drivers/gpu/drm/i915/display/intel_display_power.c:2431:34:unsigned int
enum intel_display_power_domain
drivers/gpu/drm/i915/display/intel_display_power.c:2431:34:int enum port
drivers/gpu/drm/i915/display/intel_display_power.c:2442:37: warning: mixing
different enum types:
drivers/gpu/drm/i915/display/intel_display_power.c:2442:37:unsigned int
enum intel_display_power_domain
drivers/gpu/drm/i915/display/intel_display_power.c:2442:37:int enum port
drivers/gpu/drm/i915/display/intel_display_power.c:2468:43: warning: mixing
different enum types:
drivers/gpu/drm/i915/display/intel_display_power.c:2468:43:unsigned int
enum intel_display_power_domain
drivers/gpu/drm/i915/display/intel_display_power.c:2468:43:unsigned int
enum aux_ch
drivers/gpu/drm/i915/display/intel_display_power.c:2479:35: warning: mixing
different enum types:
drivers/gpu/drm/i915/display/intel_display_power.c:2479:35:unsigned int
enum intel_display_power_domain
drivers/gpu/drm/i915/display/intel_display_power.c:2479:35:unsigned int
enum aux_ch
Fixes: 979e1b32e0e2 ("drm/i915: Sanitize the port -> DDI/AUX power domain
mapping for each platform")
Reported-by: Jani Nikula
Cc: Jouni Högander
Signed-off-by: Imre Deak
---
drivers/gpu/drm/i915/display/intel_display_power.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c
b/drivers/gpu/drm/i915/display/intel_display_power.c
index 1d9bd5808849f..949edc983a169 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -2428,7 +2428,7 @@ intel_display_power_ddi_io_domain(struct drm_i915_private
*i915, enum port port)
if (drm_WARN_ON(>drm, !domains) || domains->ddi_io ==
POWER_DOMAIN_INVALID)
return POWER_DOMAIN_PORT_DDI_IO_A;
- return domains->ddi_io + port - domains->port_start;
+ return domains->ddi_io + (int)(port - domains->port_start);
}
enum intel_display_power_domain
@@ -2439,7 +2439,7 @@ intel_display_power_ddi_lanes_domain(struct
drm_i915_private *i915, enum port po
if (drm_WARN_ON(>drm, !domains) || domains->ddi_lanes ==
POWER_DOMAIN_INVALID)
return POWER_DOMAIN_PORT_DDI_LANES_A;
- return domains->ddi_lanes + port - domains->port_start;
+ return domains->ddi_lanes + (int)(port - domains->port_start);
}
static const struct intel_ddi_port_domains *
@@ -2465,7 +2465,7 @@ intel_display_power_legacy_aux_domain(struct
drm_i915_private *i915, enum aux_ch
if (drm_WARN_ON(>drm, !domains) || domains->aux_legacy_usbc ==
POWER_DOMAIN_INVALID)
return POWER_DOMAIN_AUX_A;
- return domains->aux_legacy_usbc + aux_ch - domains->aux_ch_start;
+ return domains->aux_legacy_usbc + (int)(aux_ch - domains->aux_ch_start);
}
enum intel_display_power_domain
@@ -2476,5 +2476,5 @@ intel_display_power_tbt_aux_domain(struct
drm_i915_private *i915, enum aux_ch au
if (drm_WARN_ON(>drm, !domains) || domains->aux_tbt ==
POWER_DOMAIN_INVALID)
return POWER_DOMAIN_AUX_TBT1;
- return domains->aux_tbt + aux_ch - domains->aux_ch_start;
+ return domains->aux_tbt + (int)(aux_ch - domains->aux_ch_start);
}
--
2.30.2
Re: [Intel-gfx] [V2 0/3] Expose max and current bpc via debugfs
Hi Jani, Can you please help to push this series to drm-next? CI result: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102502v7/index.html? I'll merge IGT changes [1] first, so that we won't break the CI. [1]: https://patchwork.freedesktop.org/series/102387/ - Bhanu On Mon-11-04-2022 03:21 pm, Bhanuprakash Modem wrote: This series will expose the Connector's max supported bpc via connector debugfs and Crtc's current bpc via crtc debugfs. Also move the existing vendor specific "output_bpc" logic to drm. Test-with: 20220411094147.1650859-2-bhanuprakash.mo...@intel.com Bhanuprakash Modem (3): drm/debug: Expose connector's max supported bpc via debugfs drm/i915/display/debug: Expose crtc current bpc via debugfs drm/amd/display: Move connector debugfs to drm .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 -- .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 38 +++ .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.h | 2 - drivers/gpu/drm/drm_debugfs.c | 21 ++ .../drm/i915/display/intel_display_debugfs.c | 28 ++ 5 files changed, 62 insertions(+), 31 deletions(-) -- 2.35.1
Re: [Intel-gfx] [PATCH 7/8] drm/i915/gt: Expose per-gt RPS defaults in sysfs
Hi Ashutosh,
> > +static ssize_t
> > +default_min_freq_mhz_show(struct kobject *kobj, struct kobj_attribute
> > *attr, char *buf)
> > +{
> > + struct intel_gt *gt = kobj_to_gt(kobj->parent);
> > +
> > + return sysfs_emit(buf, "%d\n", gt->rps_defaults.min_freq);
I guess this is %u.
> > +}
> > +
> > +static struct kobj_attribute default_min_freq_mhz =
> > +__ATTR(rps_min_freq_mhz, 0444, default_min_freq_mhz_show, NULL);
> > +
> > +static ssize_t
> > +default_max_freq_mhz_show(struct kobject *kobj, struct kobj_attribute
> > *attr, char *buf)
> > +{
> > + struct intel_gt *gt = kobj_to_gt(kobj->parent);
> > +
> > + return sysfs_emit(buf, "%d\n", gt->rps_defaults.max_freq);
> > +}
> > +
> > +static struct kobj_attribute default_max_freq_mhz =
> > +__ATTR(rps_max_freq_mhz, 0444, default_max_freq_mhz_show, NULL);
> > +
> > +static ssize_t
> > +default_boost_freq_mhz_show(struct kobject *kobj, struct kobj_attribute
> > *attr, char *buf)
> > +{
> > + struct intel_gt *gt = kobj_to_gt(kobj->parent);
> > +
> > + return sysfs_emit(buf, "%d\n", gt->rps_defaults.boost_freq);
> > +}
> > +
> > +static struct kobj_attribute default_boost_freq_mhz =
> > +__ATTR(rps_boost_freq_mhz, 0444, default_boost_freq_mhz_show, NULL);
> > +
> > +static const struct attribute * const rps_defaults_attrs[] = {
> > + _min_freq_mhz.attr,
> > + _max_freq_mhz.attr,
> > + _boost_freq_mhz.attr,
> > + NULL
> > +};
Do you think this in the default group of kobj_gt_type like the
gt_id?
[...]
> > +struct intel_rps_defaults {
> > + u32 min_freq;
> > + u32 max_freq;
> > + u32 boost_freq;
> > +};
> > +
> > enum intel_submission_method {
> > INTEL_SUBMISSION_RING,
> > INTEL_SUBMISSION_ELSP,
> > @@ -227,6 +233,10 @@ struct intel_gt {
> > /* gt/gtN sysfs */
> > struct kobject sysfs_gt;
> > +
> > + /* sysfs defaults per gt */
> > + struct intel_rps_defaults rps_defaults;
more of a matter of taste, but this looks natural to me to be in
rps rather then in the gt.
[...]
Andi
[Intel-gfx] [PATCH 14/15] drm/edid: Extract drm_edid_decode_mfg_id()
From: Ville Syrjälä
Make the PNPID decoding available for other users.
Cc: dri-de...@lists.freedesktop.org
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
include/drm/drm_edid.h | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index c3204a58fb09..e92385a13d2a 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -496,6 +496,22 @@ static inline u8 drm_eld_get_conn_type(const uint8_t *eld)
return eld[DRM_ELD_SAD_COUNT_CONN_TYPE] & DRM_ELD_CONN_TYPE_MASK;
}
+/**
+ * drm_edid_decode_mfg_id - Decode the manufacturer ID
+ * @mfg_id: The manufacturer ID
+ * @vend: A 4-byte buffer to store the 3-letter vendor string plus a '\0'
+ * termination
+ */
+static inline const char *drm_edid_decode_mfg_id(u16 mfg_id, char vend[4])
+{
+ vend[0] = '@' + ((mfg_id >> 10) & 0x1f);
+ vend[1] = '@' + ((mfg_id >> 5) & 0x1f);
+ vend[2] = '@' + ((mfg_id >> 0) & 0x1f);
+ vend[3] = '\0';
+
+ return vend;
+}
+
/**
* drm_edid_encode_panel_id - Encode an ID for matching against
drm_edid_get_panel_id()
* @vend_chr_0: First character of the vendor string.
@@ -536,10 +552,7 @@ static inline u8 drm_eld_get_conn_type(const uint8_t *eld)
static inline void drm_edid_decode_panel_id(u32 panel_id, char vend[4], u16
*product_id)
{
*product_id = (u16)(panel_id & 0x);
- vend[0] = '@' + ((panel_id >> 26) & 0x1f);
- vend[1] = '@' + ((panel_id >> 21) & 0x1f);
- vend[2] = '@' + ((panel_id >> 16) & 0x1f);
- vend[3] = '\0';
+ drm_edid_decode_mfg_id(panel_id >> 16, vend);
}
bool drm_probe_ddc(struct i2c_adapter *adapter);
--
2.35.1
[Intel-gfx] [PATCH 15/15] drm/i915/bios: Dump PNPID and panel name
From: Ville Syrjälä
Dump the panel PNPID and name from the VBT.
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c | 24 +++
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index a6d59b320888..f6a7ab703244 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -25,6 +25,7 @@
*
*/
+#include
#include
#include
@@ -603,6 +604,19 @@ get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
return NULL;
}
+static void dump_pnp_id(struct drm_i915_private *i915,
+ const struct lvds_pnp_id *pnp_id,
+ const char *name)
+{
+ u16 mfg_name = be16_to_cpu((__force __be16)pnp_id->mfg_name);
+ char vend[4];
+
+ drm_dbg_kms(>drm, "%s PNPID mfg: %s (0x%x), prod: %u, serial: %u,
week: %d, year: %d\n",
+ name, drm_edid_decode_mfg_id(mfg_name, vend),
+ pnp_id->mfg_name, pnp_id->product_code, pnp_id->serial,
+ pnp_id->mfg_week, pnp_id->mfg_year + 1990);
+}
+
static int opregion_get_panel_type(struct drm_i915_private *i915,
const struct edid *edid)
{
@@ -646,6 +660,8 @@ static int pnpid_get_panel_type(struct drm_i915_private
*i915,
edid_id_nodate.mfg_week = 0;
edid_id_nodate.mfg_year = 0;
+ dump_pnp_id(i915, edid_id, "EDID");
+
ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
if (!ptrs)
return -1;
@@ -836,6 +852,7 @@ parse_lfp_data(struct drm_i915_private *i915,
const struct bdb_lvds_lfp_data *data;
const struct bdb_lvds_lfp_data_tail *tail;
const struct bdb_lvds_lfp_data_ptrs *ptrs;
+ const struct lvds_pnp_id *pnp_id;
int panel_type = panel->vbt.panel_type;
ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
@@ -849,10 +866,17 @@ parse_lfp_data(struct drm_i915_private *i915,
if (!panel->vbt.lfp_lvds_vbt_mode)
parse_lfp_panel_dtd(i915, panel, data, ptrs);
+ pnp_id = get_lvds_pnp_id(data, ptrs, panel_type);
+ dump_pnp_id(i915, pnp_id, "Panel");
+
tail = get_lfp_data_tail(data, ptrs);
if (!tail)
return;
+ drm_dbg_kms(>drm, "Panel name: %.*s\n",
+ (int)sizeof(tail->panel_name[0].name),
+ tail->panel_name[panel_type].name);
+
if (i915->vbt.version >= 188) {
panel->vbt.seamless_drrs_min_refresh_rate =
tail->seamless_drrs_min_refresh_rate[panel_type];
--
2.35.1
[Intel-gfx] [PATCH 13/15] drm/i915/bios: Determine panel type via PNPID match
From: Ville Syrjälä
Apparently when the VBT panel_type==0xff we should trawl through
the PNPID table and check for a match against the EDID. If a
match is found the index gives us the panel_type.
Tried to match the Windows behaviour here with first looking
for an exact match, and if one isn't found we fall back to
looking for a match w/o the mfg year/week.
v2: Rebase due to vlv_dsi changes
v3: Adjust to .get_panel_type() vfunc
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/5545
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/icl_dsi.c| 2 +-
drivers/gpu/drm/i915/display/intel_bios.c | 98 ---
drivers/gpu/drm/i915/display/intel_bios.h | 4 +-
drivers/gpu/drm/i915/display/intel_dp.c | 3 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 3 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 2 +-
drivers/gpu/drm/i915/display/vlv_dsi.c| 2 +-
7 files changed, 95 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 2798c4af0c6d..3b5305c219ba 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -2050,7 +2050,7 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
/* attach connector to encoder */
intel_connector_attach_encoder(intel_connector, encoder);
- intel_bios_init_panel(dev_priv, _connector->panel);
+ intel_bios_init_panel(dev_priv, _connector->panel, NULL);
mutex_lock(>mode_config.mutex);
intel_panel_add_vbt_lfp_fixed_mode(intel_connector);
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index 68cff9ddd729..a6d59b320888 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -585,6 +585,14 @@ get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
return (const void *)data + ptrs->ptr[index].fp_timing.offset;
}
+static const struct lvds_pnp_id *
+get_lvds_pnp_id(const struct bdb_lvds_lfp_data *data,
+ const struct bdb_lvds_lfp_data_ptrs *ptrs,
+ int index)
+{
+ return (const void *)data + ptrs->ptr[index].panel_pnp_id.offset;
+}
+
static const struct bdb_lvds_lfp_data_tail *
get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
const struct bdb_lvds_lfp_data_ptrs *ptrs)
@@ -595,12 +603,14 @@ get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
return NULL;
}
-static int opregion_get_panel_type(struct drm_i915_private *i915)
+static int opregion_get_panel_type(struct drm_i915_private *i915,
+ const struct edid *edid)
{
return intel_opregion_get_panel_type(i915);
}
-static int vbt_get_panel_type(struct drm_i915_private *i915)
+static int vbt_get_panel_type(struct drm_i915_private *i915,
+ const struct edid *edid)
{
const struct bdb_lvds_options *lvds_options;
@@ -608,7 +618,8 @@ static int vbt_get_panel_type(struct drm_i915_private *i915)
if (!lvds_options)
return -1;
- if (lvds_options->panel_type > 0xf) {
+ if (lvds_options->panel_type > 0xf &&
+ lvds_options->panel_type != 0xff) {
drm_dbg_kms(>drm, "Invalid VBT panel type 0x%x\n",
lvds_options->panel_type);
return -1;
@@ -617,7 +628,54 @@ static int vbt_get_panel_type(struct drm_i915_private
*i915)
return lvds_options->panel_type;
}
-static int fallback_get_panel_type(struct drm_i915_private *i915)
+static int pnpid_get_panel_type(struct drm_i915_private *i915,
+ const struct edid *edid)
+{
+ const struct bdb_lvds_lfp_data *data;
+ const struct bdb_lvds_lfp_data_ptrs *ptrs;
+ const struct lvds_pnp_id *edid_id;
+ struct lvds_pnp_id edid_id_nodate;
+ int i, best = -1;
+
+ if (!edid)
+ return -1;
+
+ edid_id = (const void *)>mfg_id[0];
+
+ edid_id_nodate = *edid_id;
+ edid_id_nodate.mfg_week = 0;
+ edid_id_nodate.mfg_year = 0;
+
+ ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
+ if (!ptrs)
+ return -1;
+
+ data = find_section(i915, BDB_LVDS_LFP_DATA);
+ if (!data)
+ return -1;
+
+ for (i = 0; i < 16; i++) {
+ const struct lvds_pnp_id *vbt_id =
+ get_lvds_pnp_id(data, ptrs, i);
+
+ /* full match? */
+ if (!memcmp(vbt_id, edid_id, sizeof(*vbt_id)))
+ return i;
+
+ /*
+* Accept a match w/o date if no full match is found,
+* and the VBT entry does not specify a date.
+*/
+ if (best < 0 &&
+ !memcmp(vbt_id, _id_nodate, sizeof(*vbt_id)))
+ best = i;
+
[Intel-gfx] [PATCH 12/15] drm/i915/bios: Split VBT data into per-panel vs. global parts
From: Ville Syrjälä
Move the panel specific VBT parsing to happen during the
output probing stage. Needs to be done because the VBT
parsing will need to look at the EDID to determine
the correct panel_type on some machines.
We split the parsed VBT data (i915->vbt) along the same
boundary. For the moment we just hoist all the panel
specific stuff into connector->panel.vbt since that seems
like the most convenient place for eg. the backlight code.
TODO: Lot's of cleanup to be done in the future. Eg. most of
the DSI stuff could probably be eliminated entirely and just
parsed on demand during DSI init.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/icl_dsi.c| 11 +-
.../gpu/drm/i915/display/intel_backlight.c| 23 +-
drivers/gpu/drm/i915/display/intel_bios.c | 371 ++
drivers/gpu/drm/i915/display/intel_bios.h | 5 +-
.../drm/i915/display/intel_ddi_buf_trans.c| 9 +-
drivers/gpu/drm/i915/display/intel_display.c | 1 -
.../drm/i915/display/intel_display_types.h| 69
drivers/gpu/drm/i915/display/intel_dp.c | 21 +-
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
.../drm/i915/display/intel_dp_aux_backlight.c | 6 +-
drivers/gpu/drm/i915/display/intel_drrs.c | 3 -
drivers/gpu/drm/i915/display/intel_dsi.c | 2 +-
.../i915/display/intel_dsi_dcs_backlight.c| 9 +-
drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 56 +--
drivers/gpu/drm/i915/display/intel_lvds.c | 6 +-
drivers/gpu/drm/i915/display/intel_panel.c| 13 +-
drivers/gpu/drm/i915/display/intel_pps.c | 6 +-
drivers/gpu/drm/i915/display/intel_psr.c | 30 +-
drivers/gpu/drm/i915/display/intel_sdvo.c | 3 +
drivers/gpu/drm/i915/display/vlv_dsi.c| 14 +-
drivers/gpu/drm/i915/i915_drv.h | 63 ---
21 files changed, 391 insertions(+), 331 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
b/drivers/gpu/drm/i915/display/icl_dsi.c
index 19bf717fd4cb..2798c4af0c6d 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1862,7 +1862,8 @@ static void icl_dphy_param_init(struct intel_dsi
*intel_dsi)
{
struct drm_device *dev = intel_dsi->base.base.dev;
struct drm_i915_private *dev_priv = to_i915(dev);
- struct mipi_config *mipi_config = dev_priv->vbt.dsi.config;
+ struct intel_connector *connector = intel_dsi->attached_connector;
+ struct mipi_config *mipi_config = connector->panel.vbt.dsi.config;
u32 tlpx_ns;
u32 prepare_cnt, exit_zero_cnt, clk_zero_cnt, trail_cnt;
u32 ths_prepare_ns, tclk_trail_ns;
@@ -2049,6 +2050,8 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
/* attach connector to encoder */
intel_connector_attach_encoder(intel_connector, encoder);
+ intel_bios_init_panel(dev_priv, _connector->panel);
+
mutex_lock(>mode_config.mutex);
intel_panel_add_vbt_lfp_fixed_mode(intel_connector);
mutex_unlock(>mode_config.mutex);
@@ -2062,13 +2065,13 @@ void icl_dsi_init(struct drm_i915_private *dev_priv)
intel_backlight_setup(intel_connector, INVALID_PIPE);
- if (dev_priv->vbt.dsi.config->dual_link)
+ if (intel_connector->panel.vbt.dsi.config->dual_link)
intel_dsi->ports = BIT(PORT_A) | BIT(PORT_B);
else
intel_dsi->ports = BIT(port);
- intel_dsi->dcs_backlight_ports = dev_priv->vbt.dsi.bl_ports;
- intel_dsi->dcs_cabc_ports = dev_priv->vbt.dsi.cabc_ports;
+ intel_dsi->dcs_backlight_ports =
intel_connector->panel.vbt.dsi.bl_ports;
+ intel_dsi->dcs_cabc_ports = intel_connector->panel.vbt.dsi.cabc_ports;
for_each_dsi_port(port, intel_dsi->ports) {
struct intel_dsi_host *host;
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
b/drivers/gpu/drm/i915/display/intel_backlight.c
index c8e1fc53a881..68513206a66a 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -1159,9 +1159,10 @@ static u32 vlv_hz_to_pwm(struct intel_connector
*connector, u32 pwm_freq_hz)
return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
}
-static u16 get_vbt_pwm_freq(struct drm_i915_private *dev_priv)
+static u16 get_vbt_pwm_freq(struct intel_connector *connector)
{
- u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+ u16 pwm_freq_hz = connector->panel.vbt.backlight.pwm_freq_hz;
if (pwm_freq_hz) {
drm_dbg_kms(_priv->drm,
@@ -1181,7 +1182,7 @@ static u32 get_backlight_max_vbt(struct intel_connector
*connector)
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
struct intel_panel *panel = >panel;
- u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv);
+ u16 pwm_freq_hz = get_vbt_pwm_freq(connector);
u32 pwm;
[Intel-gfx] [PATCH 11/15] drm/i915/bios: Split VBT parsing to global vs. panel specific parts
From: Ville Syrjälä
Parsing the panel specific data (anything that depends on panel_type)
from VBT is currently happening too early. Split the whole thing
into global vs. panel specific parts so that we can start doing
the panel specific parsing at a later time.
v2: Clarify that this is about panel_type (Jani)
Split out the leak checks (Jani)
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c| 26 +++-
drivers/gpu/drm/i915/display/intel_bios.h| 1 +
drivers/gpu/drm/i915/display/intel_display.c | 1 +
3 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index 2ac0e91a5587..b1e34b02fdc2 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2962,18 +2962,7 @@ void intel_bios_init(struct drm_i915_private *i915)
/* Grab useful general definitions */
parse_general_features(i915);
parse_general_definitions(i915);
- parse_panel_options(i915);
- parse_generic_dtd(i915);
- parse_lfp_data(i915);
- parse_lfp_backlight(i915);
- parse_sdvo_panel_data(i915);
parse_driver_features(i915);
- parse_panel_driver_features(i915);
- parse_power_conservation_features(i915);
- parse_edp(i915);
- parse_psr(i915);
- parse_mipi_config(i915);
- parse_mipi_sequence(i915);
/* Depends on child device list */
parse_compression_parameters(i915);
@@ -2992,6 +2981,21 @@ void intel_bios_init(struct drm_i915_private *i915)
kfree(oprom_vbt);
}
+void intel_bios_init_panel(struct drm_i915_private *i915)
+{
+ parse_panel_options(i915);
+ parse_generic_dtd(i915);
+ parse_lfp_data(i915);
+ parse_lfp_backlight(i915);
+ parse_sdvo_panel_data(i915);
+ parse_panel_driver_features(i915);
+ parse_power_conservation_features(i915);
+ parse_edp(i915);
+ parse_psr(i915);
+ parse_mipi_config(i915);
+ parse_mipi_sequence(i915);
+}
+
/**
* intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
* @i915: i915 device instance
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h
b/drivers/gpu/drm/i915/display/intel_bios.h
index 4709c4d29805..c744d75fa435 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -230,6 +230,7 @@ struct mipi_pps_data {
} __packed;
void intel_bios_init(struct drm_i915_private *dev_priv);
+void intel_bios_init_panel(struct drm_i915_private *dev_priv);
void intel_bios_driver_remove(struct drm_i915_private *dev_priv);
bool intel_bios_is_valid_vbt(const void *buf, size_t size);
bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 806d50b302ab..e384db157f34 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -9580,6 +9580,7 @@ int intel_modeset_init_noirq(struct drm_i915_private
*i915)
}
intel_bios_init(i915);
+ intel_bios_init_panel(i915);
ret = intel_vga_register(i915);
if (ret)
--
2.35.1
[Intel-gfx] [PATCH 10/15] drm/i915/bios: Split parse_driver_features() into two parts
From: Ville Syrjälä
We use the "driver features" block for two different kinds
of data: global data, and per panel data. Split the function
into two parts along that line so that we can start doing the
parsing in two different locations.
Reviewed-by: Jani Nikula
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index 0c5638f5b72b..2ac0e91a5587 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1181,6 +1181,16 @@ parse_driver_features(struct drm_i915_private *i915)
driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
i915->vbt.int_lvds_support = 0;
}
+}
+
+static void
+parse_panel_driver_features(struct drm_i915_private *i915)
+{
+ const struct bdb_driver_features *driver;
+
+ driver = find_section(i915, BDB_DRIVER_FEATURES);
+ if (!driver)
+ return;
if (i915->vbt.version < 228) {
drm_dbg_kms(>drm, "DRRS State Enabled:%d\n",
@@ -2958,6 +2968,7 @@ void intel_bios_init(struct drm_i915_private *i915)
parse_lfp_backlight(i915);
parse_sdvo_panel_data(i915);
parse_driver_features(i915);
+ parse_panel_driver_features(i915);
parse_power_conservation_features(i915);
parse_edp(i915);
parse_psr(i915);
--
2.35.1
[Intel-gfx] [PATCH 09/15] drm/i915/pps: Keep VDD enabled during eDP probe
From: Ville Syrjälä
Disable the delayed VDD off work during the eDP probe.
If we never turn off the VDD then we can't violate the
panel's power sequencing delays despite not having read
them out yet from the VBT.
This is mostly a belt+suspenders type of thing since the
the timeout we'd use for the delayed work should be long
enough that this won't normally happen. But I don't really
like relying on timeouts for correctless so might as well
make sure.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_pps.c | 10 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 0c13208c952d..052ab0a4b329 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1474,6 +1474,7 @@ struct intel_pps {
int backlight_off_delay;
struct delayed_work panel_vdd_work;
bool want_panel_vdd;
+ bool initializing;
unsigned long last_power_on;
unsigned long last_backlight_off;
ktime_t panel_power_off_time;
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index 9ce09d85e0ab..04e60ddbcbea 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -722,6 +722,13 @@ static void edp_panel_vdd_schedule_off(struct intel_dp
*intel_dp)
{
unsigned long delay;
+ /*
+* We may not yet know the real power sequencing delays,
+* so keep VDD enabled until we're done with init.
+*/
+ if (intel_dp->pps.initializing)
+ return;
+
/*
* Queue the timer to fire a long time from now (relative to the power
* down delay) to keep the panel power up across a sequence of
@@ -1419,6 +1426,7 @@ void intel_pps_init(struct intel_dp *intel_dp)
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
intel_wakeref_t wakeref;
+ intel_dp->pps.initializing = true;
INIT_DELAYED_WORK(_dp->pps.panel_vdd_work, edp_panel_vdd_work);
pps_init_timestamps(intel_dp);
@@ -1443,6 +1451,8 @@ void intel_pps_init_late(struct intel_dp *intel_dp)
pps_init_delays(intel_dp);
pps_init_registers(intel_dp, false);
+ intel_dp->pps.initializing = false;
+
if (edp_have_panel_vdd(intel_dp))
edp_panel_vdd_schedule_off(intel_dp);
}
--
2.35.1
[Intel-gfx] [PATCH 08/15] drm/i915/pps: Reinit PPS delays after VBT has been fully parsed
From: Ville Syrjälä
During the eDP probe we may not yet know the panel_type used
to index the VBT panel tables. So the initial eDP probe will have
to be done without that, and thus we won't yet have the PPS delays
from the VBT. Once the VBT has been fully parse we should reinit
the PPS delays to make sure it's fully accounted for.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_pps.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index db3a12215269..9ce09d85e0ab 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1438,6 +1438,11 @@ void intel_pps_init_late(struct intel_dp *intel_dp)
intel_wakeref_t wakeref;
with_intel_pps_lock(intel_dp, wakeref) {
+ /* Reinit delays after per-panel info has been parsed from VBT
*/
+ memset(_dp->pps.pps_delays, 0,
sizeof(intel_dp->pps.pps_delays));
+ pps_init_delays(intel_dp);
+ pps_init_registers(intel_dp, false);
+
if (edp_have_panel_vdd(intel_dp))
edp_panel_vdd_schedule_off(intel_dp);
}
--
2.35.1
[Intel-gfx] [PATCH 07/15] drm/i915/pps: Split PPS init+sanitize in two
From: Ville Syrjälä
Split the PPS init to something we do at the start of the eDP
probe and a second part we do at the end.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 ++
drivers/gpu/drm/i915/display/intel_pps.c | 30
drivers/gpu/drm/i915/display/intel_pps.h | 1 +
3 files changed, 28 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 7db71bcd4c4a..53615c0ed869 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5253,6 +5253,8 @@ static bool intel_edp_init_connector(struct intel_dp
*intel_dp,
intel_edp_add_properties(intel_dp);
+ intel_pps_init_late(intel_dp);
+
return true;
out_vdd_off:
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index 9877c43a9f6f..db3a12215269 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1051,7 +1051,7 @@ void vlv_pps_init(struct intel_encoder *encoder,
pps_init_registers(intel_dp, true);
}
-static void intel_pps_vdd_sanitize(struct intel_dp *intel_dp)
+static void pps_vdd_init(struct intel_dp *intel_dp)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
@@ -1072,8 +1072,6 @@ static void intel_pps_vdd_sanitize(struct intel_dp
*intel_dp)
drm_WARN_ON(_priv->drm, intel_dp->pps.vdd_wakeref);
intel_dp->pps.vdd_wakeref = intel_display_power_get(dev_priv,
intel_aux_power_domain(dig_port));
-
- edp_panel_vdd_schedule_off(intel_dp);
}
bool intel_pps_have_panel_power_or_vdd(struct intel_dp *intel_dp)
@@ -1409,18 +1407,40 @@ void intel_pps_encoder_reset(struct intel_dp *intel_dp)
pps_init_delays(intel_dp);
pps_init_registers(intel_dp, false);
+ pps_vdd_init(intel_dp);
- intel_pps_vdd_sanitize(intel_dp);
+ if (edp_have_panel_vdd(intel_dp))
+ edp_panel_vdd_schedule_off(intel_dp);
}
}
void intel_pps_init(struct intel_dp *intel_dp)
{
+ struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+ intel_wakeref_t wakeref;
+
INIT_DELAYED_WORK(_dp->pps.panel_vdd_work, edp_panel_vdd_work);
pps_init_timestamps(intel_dp);
- intel_pps_encoder_reset(intel_dp);
+ with_intel_pps_lock(intel_dp, wakeref) {
+ if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915))
+ vlv_initial_power_sequencer_setup(intel_dp);
+
+ pps_init_delays(intel_dp);
+ pps_init_registers(intel_dp, false);
+ pps_vdd_init(intel_dp);
+ }
+}
+
+void intel_pps_init_late(struct intel_dp *intel_dp)
+{
+ intel_wakeref_t wakeref;
+
+ with_intel_pps_lock(intel_dp, wakeref) {
+ if (edp_have_panel_vdd(intel_dp))
+ edp_panel_vdd_schedule_off(intel_dp);
+ }
}
void intel_pps_unlock_regs_wa(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.h
b/drivers/gpu/drm/i915/display/intel_pps.h
index e64144659d31..a3a56f903f26 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.h
+++ b/drivers/gpu/drm/i915/display/intel_pps.h
@@ -41,6 +41,7 @@ bool intel_pps_have_panel_power_or_vdd(struct intel_dp
*intel_dp);
void intel_pps_wait_power_cycle(struct intel_dp *intel_dp);
void intel_pps_init(struct intel_dp *intel_dp);
+void intel_pps_init_late(struct intel_dp *intel_dp);
void intel_pps_encoder_reset(struct intel_dp *intel_dp);
void intel_pps_reset_all(struct drm_i915_private *i915);
--
2.35.1
[Intel-gfx] [PATCH 06/15] drm/i915/pps: Stash away original BIOS programmed PPS delays
From: Ville Syrjälä
In order to do the panel VBT parsing after the EDID read
(needed to determine panel_type from PNPID) we need to stash
away the original BIOS programmed PPS delays so that we
can consult them again when we reinit the PPS delays after
the VBT parsing has been done.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_pps.c | 13 -
2 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 408152f9f46a..0c13208c952d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1496,6 +1496,7 @@ struct intel_pps {
*/
bool pps_reset;
struct edp_power_seq pps_delays;
+ struct edp_power_seq bios_pps_delays;
};
struct intel_psr {
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index 25f1962dbddf..9877c43a9f6f 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1165,16 +1165,19 @@ static bool pps_delays_valid(struct edp_power_seq
*delays)
delays->t10 || delays->t11_t12;
}
-static void pps_init_delays_cur(struct intel_dp *intel_dp,
- struct edp_power_seq *cur)
+static void pps_init_delays_bios(struct intel_dp *intel_dp,
+struct edp_power_seq *bios)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
lockdep_assert_held(_priv->pps_mutex);
- intel_pps_readout_hw_state(intel_dp, cur);
+ if (!pps_delays_valid(_dp->pps.bios_pps_delays))
+ intel_pps_readout_hw_state(intel_dp,
_dp->pps.bios_pps_delays);
- intel_pps_dump_state(intel_dp, "cur", cur);
+ *bios = intel_dp->pps.bios_pps_delays;
+
+ intel_pps_dump_state(intel_dp, "bios", bios);
}
static void pps_init_delays_vbt(struct intel_dp *intel_dp,
@@ -1242,7 +1245,7 @@ static void pps_init_delays(struct intel_dp *intel_dp)
if (pps_delays_valid(final))
return;
- pps_init_delays_cur(intel_dp, );
+ pps_init_delays_bios(intel_dp, );
pps_init_delays_vbt(intel_dp, );
pps_init_delays_spec(intel_dp, );
--
2.35.1
[Intel-gfx] [PATCH 05/15] drm/i915/pps: Don't apply quirks/etc. to the VBT PPS delays if they haven't been initialized
From: Ville Syrjälä Skip QUIRK_INCREASE_T12_DELAY and the t11_t12 adjustment of the VBT PPS delays if we've not yet initialized them. Will be important later when the PPS delay init can happen before VBT parsing. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_pps.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_pps.c b/drivers/gpu/drm/i915/display/intel_pps.c index d1ce7dafce10..25f1962dbddf 100644 --- a/drivers/gpu/drm/i915/display/intel_pps.c +++ b/drivers/gpu/drm/i915/display/intel_pps.c @@ -1184,6 +1184,9 @@ static void pps_init_delays_vbt(struct intel_dp *intel_dp, *vbt = dev_priv->vbt.edp.pps; + if (!pps_delays_valid(vbt)) + return; + /* On Toshiba Satellite P50-C-18C system the VBT T12 delay * of 500ms appears to be too short. Ocassionally the panel * just fails to power back on. Increasing the delay to 800ms -- 2.35.1
[Intel-gfx] [PATCH 04/15] drm/i915/pps: Introduce pps_delays_valid()
From: Ville Syrjälä
Add a small helper that determines if the PPS delays have been
initialized or not.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_pps.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index 5b72c892a6f2..d1ce7dafce10 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1159,6 +1159,12 @@ intel_pps_verify_state(struct intel_dp *intel_dp)
}
}
+static bool pps_delays_valid(struct edp_power_seq *delays)
+{
+ return delays->t1_t3 || delays->t8 || delays->t9 ||
+ delays->t10 || delays->t11_t12;
+}
+
static void pps_init_delays_cur(struct intel_dp *intel_dp,
struct edp_power_seq *cur)
{
@@ -1230,7 +1236,7 @@ static void pps_init_delays(struct intel_dp *intel_dp)
lockdep_assert_held(_priv->pps_mutex);
/* already initialized? */
- if (final->t11_t12 != 0)
+ if (pps_delays_valid(final))
return;
pps_init_delays_cur(intel_dp, );
--
2.35.1
[Intel-gfx] [PATCH 03/15] drm/i915/pps: Split pps_init_delays() into distinct parts
From: Ville Syrjälä
Split each of the hw/vbt/spec PPS delay initialization into
separate functions to make the whole thing less cluttered.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_pps.c | 66 +---
1 file changed, 48 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index 5a598dd06039..5b72c892a6f2 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1159,53 +1159,83 @@ intel_pps_verify_state(struct intel_dp *intel_dp)
}
}
-static void pps_init_delays(struct intel_dp *intel_dp)
+static void pps_init_delays_cur(struct intel_dp *intel_dp,
+ struct edp_power_seq *cur)
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- struct edp_power_seq cur, vbt, spec,
- *final = _dp->pps.pps_delays;
lockdep_assert_held(_priv->pps_mutex);
- /* already initialized? */
- if (final->t11_t12 != 0)
- return;
+ intel_pps_readout_hw_state(intel_dp, cur);
- intel_pps_readout_hw_state(intel_dp, );
+ intel_pps_dump_state(intel_dp, "cur", cur);
+}
- intel_pps_dump_state(intel_dp, "cur", );
+static void pps_init_delays_vbt(struct intel_dp *intel_dp,
+ struct edp_power_seq *vbt)
+{
+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+ *vbt = dev_priv->vbt.edp.pps;
- vbt = dev_priv->vbt.edp.pps;
/* On Toshiba Satellite P50-C-18C system the VBT T12 delay
* of 500ms appears to be too short. Ocassionally the panel
* just fails to power back on. Increasing the delay to 800ms
* seems sufficient to avoid this problem.
*/
if (dev_priv->quirks & QUIRK_INCREASE_T12_DELAY) {
- vbt.t11_t12 = max_t(u16, vbt.t11_t12, 1300 * 10);
+ vbt->t11_t12 = max_t(u16, vbt->t11_t12, 1300 * 10);
drm_dbg_kms(_priv->drm,
"Increasing T12 panel delay as per the quirk to
%d\n",
- vbt.t11_t12);
+ vbt->t11_t12);
}
+
/* T11_T12 delay is special and actually in units of 100ms, but zero
* based in the hw (so we need to add 100 ms). But the sw vbt
* table multiplies it with 1000 to make it in units of 100usec,
* too. */
- vbt.t11_t12 += 100 * 10;
+ vbt->t11_t12 += 100 * 10;
+
+ intel_pps_dump_state(intel_dp, "vbt", vbt);
+}
+
+static void pps_init_delays_spec(struct intel_dp *intel_dp,
+struct edp_power_seq *spec)
+{
+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+ lockdep_assert_held(_priv->pps_mutex);
/* Upper limits from eDP 1.3 spec. Note that we use the clunky units of
* our hw here, which are all in 100usec. */
- spec.t1_t3 = 210 * 10;
- spec.t8 = 50 * 10; /* no limit for t8, use t7 instead */
- spec.t9 = 50 * 10; /* no limit for t9, make it symmetric with t8 */
- spec.t10 = 500 * 10;
+ spec->t1_t3 = 210 * 10;
+ spec->t8 = 50 * 10; /* no limit for t8, use t7 instead */
+ spec->t9 = 50 * 10; /* no limit for t9, make it symmetric with t8 */
+ spec->t10 = 500 * 10;
/* This one is special and actually in units of 100ms, but zero
* based in the hw (so we need to add 100 ms). But the sw vbt
* table multiplies it with 1000 to make it in units of 100usec,
* too. */
- spec.t11_t12 = (510 + 100) * 10;
+ spec->t11_t12 = (510 + 100) * 10;
- intel_pps_dump_state(intel_dp, "vbt", );
+ intel_pps_dump_state(intel_dp, "spec", spec);
+}
+
+static void pps_init_delays(struct intel_dp *intel_dp)
+{
+ struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+ struct edp_power_seq cur, vbt, spec,
+ *final = _dp->pps.pps_delays;
+
+ lockdep_assert_held(_priv->pps_mutex);
+
+ /* already initialized? */
+ if (final->t11_t12 != 0)
+ return;
+
+ pps_init_delays_cur(intel_dp, );
+ pps_init_delays_vbt(intel_dp, );
+ pps_init_delays_spec(intel_dp, );
/* Use the max of the register settings and vbt. If both are
* unset, fall back to the spec limits. */
--
2.35.1
[Intel-gfx] [PATCH 02/15] drm/i915: Extract intel_edp_fixup_vbt_bpp()
From: Ville Syrjälä
We have the same "override eDP VBT bpp with the current bpp" code
duplciated in two places. Extract it to a helper function.
TODO: Having this in .get_config() is pretty ugly. Should probably
try to move it somewhere else (setup_hw_state()/etc.)...
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/g4x_dp.c| 22 ++---
drivers/gpu/drm/i915/display/intel_ddi.c | 22 ++---
drivers/gpu/drm/i915/display/intel_dp.c | 25
drivers/gpu/drm/i915/display/intel_dp.h | 1 +
4 files changed, 30 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
b/drivers/gpu/drm/i915/display/g4x_dp.c
index 5a957acebfd6..82ad8fe7440c 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -395,26 +395,8 @@ static void intel_dp_get_config(struct intel_encoder
*encoder,
intel_dotclock_calculate(pipe_config->port_clock,
_config->dp_m_n);
- if (intel_dp_is_edp(intel_dp) && dev_priv->vbt.edp.bpp &&
- pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {
- /*
-* This is a big fat ugly hack.
-*
-* Some machines in UEFI boot mode provide us a VBT that has 18
-* bpp and 1.62 GHz link bandwidth for eDP, which for reasons
-* unknown we fail to light up. Yet the same BIOS boots up with
-* 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as
-* max, not what it tells us to use.
-*
-* Note: This will still be broken if the eDP panel is not lit
-* up by the BIOS, and thus we can't get the mode at module
-* load.
-*/
- drm_dbg_kms(_priv->drm,
- "pipe has %d bpp for eDP panel, overriding
BIOS-provided max %d bpp\n",
- pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp);
- dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
- }
+ if (intel_dp_is_edp(intel_dp))
+ intel_edp_fixup_vbt_bpp(encoder, pipe_config->pipe_bpp);
}
static void
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9e6fa59eabba..333871cf3a2c 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3433,26 +3433,8 @@ static void intel_ddi_get_config(struct intel_encoder
*encoder,
pipe_config->has_audio =
intel_ddi_is_audio_enabled(dev_priv, cpu_transcoder);
- if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp.bpp &&
- pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {
- /*
-* This is a big fat ugly hack.
-*
-* Some machines in UEFI boot mode provide us a VBT that has 18
-* bpp and 1.62 GHz link bandwidth for eDP, which for reasons
-* unknown we fail to light up. Yet the same BIOS boots up with
-* 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as
-* max, not what it tells us to use.
-*
-* Note: This will still be broken if the eDP panel is not lit
-* up by the BIOS, and thus we can't get the mode at module
-* load.
-*/
- drm_dbg_kms(_priv->drm,
- "pipe has %d bpp for eDP panel, overriding
BIOS-provided max %d bpp\n",
- pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp);
- dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
- }
+ if (encoder->type == INTEL_OUTPUT_EDP)
+ intel_edp_fixup_vbt_bpp(encoder, pipe_config->pipe_bpp);
ddi_dotclock_get(pipe_config);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 8637959b5de2..7db71bcd4c4a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2710,6 +2710,31 @@ static void intel_edp_mso_mode_fixup(struct
intel_connector *connector,
DRM_MODE_ARG(mode));
}
+void intel_edp_fixup_vbt_bpp(struct intel_encoder *encoder, int pipe_bpp)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+
+ if (dev_priv->vbt.edp.bpp && pipe_bpp > dev_priv->vbt.edp.bpp) {
+ /*
+* This is a big fat ugly hack.
+*
+* Some machines in UEFI boot mode provide us a VBT that has 18
+* bpp and 1.62 GHz link bandwidth for eDP, which for reasons
+* unknown we fail to light up. Yet the same BIOS boots up with
+* 24 bpp and 2.7 GHz link. Use the same bpp as the BIOS uses as
+* max, not what it
[Intel-gfx] [PATCH 01/15] drm/i915: Pass intel_connector to intel_vrr_is_capable()
From: Ville Syrjälä
Pass intel_connector instead of drm_connector to
intel_vrr_is_capable(). Will result in less ugly casts.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
drivers/gpu/drm/i915/display/intel_vrr.c | 14 +++---
drivers/gpu/drm/i915/display/intel_vrr.h | 4 ++--
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index e4a79c11fd25..8637959b5de2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4524,7 +4524,7 @@ intel_dp_set_edid(struct intel_dp *intel_dp)
edid = intel_dp_get_edid(intel_dp);
connector->detect_edid = edid;
- vrr_capable = intel_vrr_is_capable(>base);
+ vrr_capable = intel_vrr_is_capable(connector);
drm_dbg_kms(>drm, "[CONNECTOR:%d:%s] VRR capable: %s\n",
connector->base.base.id, connector->base.name,
str_yes_no(vrr_capable));
drm_connector_set_vrr_capable_property(>base, vrr_capable);
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c
b/drivers/gpu/drm/i915/display/intel_vrr.c
index 396f2f994fa0..081e52dd6c4e 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -9,17 +9,17 @@
#include "intel_display_types.h"
#include "intel_vrr.h"
-bool intel_vrr_is_capable(struct drm_connector *connector)
+bool intel_vrr_is_capable(struct intel_connector *connector)
{
+ const struct drm_display_info *info = >base.display_info;
+ struct drm_i915_private *i915 = to_i915(connector->base.dev);
struct intel_dp *intel_dp;
- const struct drm_display_info *info = >display_info;
- struct drm_i915_private *i915 = to_i915(connector->dev);
- if (connector->connector_type != DRM_MODE_CONNECTOR_eDP &&
- connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
+ if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
+ connector->base.connector_type != DRM_MODE_CONNECTOR_DisplayPort)
return false;
- intel_dp = intel_attached_dp(to_intel_connector(connector));
+ intel_dp = intel_attached_dp(connector);
/*
* DP Sink is capable of VRR video timings if
* Ignore MSA bit is set in DPCD.
@@ -97,7 +97,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
const struct drm_display_info *info = >base.display_info;
int vmin, vmax;
- if (!intel_vrr_is_capable(>base))
+ if (!intel_vrr_is_capable(connector))
return;
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h
b/drivers/gpu/drm/i915/display/intel_vrr.h
index 1c2da572693d..9fda1135b0dd 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.h
+++ b/drivers/gpu/drm/i915/display/intel_vrr.h
@@ -8,15 +8,15 @@
#include
-struct drm_connector;
struct drm_connector_state;
struct intel_atomic_state;
+struct intel_connector;
struct intel_crtc;
struct intel_crtc_state;
struct intel_dp;
struct intel_encoder;
-bool intel_vrr_is_capable(struct drm_connector *connector);
+bool intel_vrr_is_capable(struct intel_connector *connector);
void intel_vrr_check_modeset(struct intel_atomic_state *state);
void intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
struct drm_connector_state *conn_state);
--
2.35.1
[Intel-gfx] [PATCH 00/15] drm/i915/bios: PNPID->panel_type matching
From: Ville Syrjälä Handle VBT panel_type=0xff, ie. extract the panel PNPID from the EDID and match it againts the VBT panel PNPIDs to determine the actual panel_type. We need to massage the PPS init code a bit to make sure it works sensible without having access to the VBT power sequencing delays until the end of the eDP probe. I also started on the path to split the per-panel data from i915->vbt into its own thing. So should get us one step closer to supporting multiple internal panels. Ville Syrjälä (15): drm/i915: Pass intel_connector to intel_vrr_is_capable() drm/i915: Extract intel_edp_fixup_vbt_bpp() drm/i915/pps: Split pps_init_delays() into distinct parts drm/i915/pps: Introduce pps_delays_valid() drm/i915/pps: Don't apply quirks/etc. to the VBT PPS delays if they haven't been initialized drm/i915/pps: Stash away original BIOS programmed PPS delays drm/i915/pps: Split PPS init+sanitize in two drm/i915/pps: Reinit PPS delays after VBT has been fully parsed drm/i915/pps: Keep VDD enabled during eDP probe drm/i915/bios: Split parse_driver_features() into two parts drm/i915/bios: Split VBT parsing to global vs. panel specific parts drm/i915/bios: Split VBT data into per-panel vs. global parts drm/i915/bios: Determine panel type via PNPID match drm/edid: Extract drm_edid_decode_mfg_id() drm/i915/bios: Dump PNPID and panel name drivers/gpu/drm/i915/display/g4x_dp.c | 22 +- drivers/gpu/drm/i915/display/icl_dsi.c| 11 +- .../gpu/drm/i915/display/intel_backlight.c| 23 +- drivers/gpu/drm/i915/display/intel_bios.c | 496 +++--- drivers/gpu/drm/i915/display/intel_bios.h | 6 + drivers/gpu/drm/i915/display/intel_ddi.c | 22 +- .../drm/i915/display/intel_ddi_buf_trans.c| 9 +- .../drm/i915/display/intel_display_types.h| 71 +++ drivers/gpu/drm/i915/display/intel_dp.c | 45 +- drivers/gpu/drm/i915/display/intel_dp.h | 2 + .../drm/i915/display/intel_dp_aux_backlight.c | 6 +- drivers/gpu/drm/i915/display/intel_drrs.c | 3 - drivers/gpu/drm/i915/display/intel_dsi.c | 2 +- .../i915/display/intel_dsi_dcs_backlight.c| 9 +- drivers/gpu/drm/i915/display/intel_dsi_vbt.c | 56 +- drivers/gpu/drm/i915/display/intel_lvds.c | 7 +- drivers/gpu/drm/i915/display/intel_panel.c| 13 +- drivers/gpu/drm/i915/display/intel_pps.c | 129 - drivers/gpu/drm/i915/display/intel_pps.h | 1 + drivers/gpu/drm/i915/display/intel_psr.c | 30 +- drivers/gpu/drm/i915/display/intel_sdvo.c | 3 + drivers/gpu/drm/i915/display/intel_vrr.c | 14 +- drivers/gpu/drm/i915/display/intel_vrr.h | 4 +- drivers/gpu/drm/i915/display/vlv_dsi.c| 14 +- drivers/gpu/drm/i915/i915_drv.h | 63 --- include/drm/drm_edid.h| 21 +- 26 files changed, 672 insertions(+), 410 deletions(-) -- 2.35.1
Re: [Intel-gfx] [PATCH 6/8] drm/i915/gt: Fix memory leaks in per-gt sysfs
On 10.05.2022 11:48, Tvrtko Ursulin wrote:
On 10/05/2022 10:39, Andrzej Hajda wrote:
On 10.05.2022 10:18, Tvrtko Ursulin wrote:
On 10/05/2022 08:58, Andrzej Hajda wrote:
Hi Tvrtko,
On 10.05.2022 09:28, Tvrtko Ursulin wrote:
On 29/04/2022 20:56, Ashutosh Dixit wrote:
All kmalloc'd kobjects need a kobject_put() to free memory. For
example in
previous code, kobj_gt_release() never gets called. The
requirement of
kobject_put() now results in a slightly different code organization.
v2: s/gtn/gt/ (Andi)
Cc: Andi Shyti
Cc: Andrzej Hajda
Fixes: b770bcfae9ad ("drm/i915/gt: create per-tile sysfs interface")
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/gt/intel_gt.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt_sysfs.c | 29
++--
drivers/gpu/drm/i915/gt/intel_gt_sysfs.h | 6 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +++
drivers/gpu/drm/i915/i915_sysfs.c | 2 ++
5 files changed, 19 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 92394f13b42f..9aede288eb86 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -785,6 +785,7 @@ void intel_gt_driver_unregister(struct
intel_gt *gt)
{
intel_wakeref_t wakeref;
+ intel_gt_sysfs_unregister(gt);
intel_rps_driver_unregister(>rps);
intel_gsc_fini(>gsc);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
index 8ec8bc660c8c..9e4ebf53379b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
@@ -24,7 +24,7 @@ bool is_object_gt(struct kobject *kobj)
static struct intel_gt *kobj_to_gt(struct kobject *kobj)
{
- return container_of(kobj, struct kobj_gt, base)->gt;
+ return container_of(kobj, struct intel_gt, sysfs_gt);
}
struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev,
@@ -72,9 +72,9 @@ static struct attribute *id_attrs[] = {
};
ATTRIBUTE_GROUPS(id);
+/* A kobject needs a release() method even if it does nothing */
static void kobj_gt_release(struct kobject *kobj)
{
- kfree(kobj);
}
static struct kobj_type kobj_gt_type = {
@@ -85,8 +85,6 @@ static struct kobj_type kobj_gt_type = {
void intel_gt_sysfs_register(struct intel_gt *gt)
{
- struct kobj_gt *kg;
-
/*
* We need to make things right with the
* ABI compatibility. The files were originally
@@ -98,25 +96,22 @@ void intel_gt_sysfs_register(struct intel_gt
*gt)
if (gt_is_root(gt))
intel_gt_sysfs_pm_init(gt, gt_get_parent_obj(gt));
- kg = kzalloc(sizeof(*kg), GFP_KERNEL);
- if (!kg)
+ /* init and xfer ownership to sysfs tree */
+ if (kobject_init_and_add(>sysfs_gt, _gt_type,
+ gt->i915->sysfs_gt, "gt%d", gt->info.id))
Was there closure/agreement on the matter of whether or not there
is a potential race between "kfree(gt)" and sysfs access (last put
from sysfs that is)? I've noticed Andrzej and Ashutosh were
discussing it but did not read all the details.
Not really :)
IMO docs are against this practice, Ashutosh shows examples of this
practice in code and according to his analysis it is safe.
I gave up looking for contradictions :) Either it is OK, kobject is
not fully shared object, docs are obsolete and needs update, either
the patch is wrong.
Anyway finally I tend to accept this solution, I failed to prove it
is wrong :)
Like a question of whether hotunplug can be triggered while
userspace is sitting in a sysfs hook? Final kfree then has to be
delayed until userspace exists.
Btw where is the "kfree(gt)" for the tiles on the PCI remove path? I
can't find it.. Do we have a leak?
intel_gt_tile_cleanup ?
Called from intel_gt_release_all, whose only caller is the failure
path of i915_driver_probe. Feels like something is missing?
This is final proof this patch is safe - no kfree, no UAF :)
Apparently it is broken in internal branch as well.
Should I take care of it?
Regards
Andrzej
Regards,
Tvrtko
Re: [Intel-gfx] [PATCH v2 23/25] drm/edid: add drm_edid helper for drm_update_tile_info()
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
v2: Handle NULL EDID pointer (Ville, CI)
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 14 +++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index d857d1d74c82..26ac4d262e31 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6364,15 +6364,15 @@ static void drm_parse_tiled_block(struct drm_connector
*connector,
}
}
-void drm_update_tile_info(struct drm_connector *connector,
- const struct edid *edid)
+static void _drm_update_tile_info(struct drm_connector *connector,
+ const struct drm_edid *drm_edid)
{
const struct displayid_block *block;
struct displayid_iter iter;
connector->has_tile = false;
- displayid_iter_edid_begin(edid, );
+ displayid_iter_edid_begin(drm_edid ? drm_edid->edid : NULL, );
displayid_iter_for_each(block, ) {
if (block->tag == DATA_BLOCK_TILED_DISPLAY)
drm_parse_tiled_block(connector, block);
@@ -6384,3 +6384,11 @@ void drm_update_tile_info(struct drm_connector
*connector,
connector->tile_group = NULL;
}
}
+
+void drm_update_tile_info(struct drm_connector *connector,
+ const struct edid *edid)
+{
+ struct drm_edid drm_edid;
+
+ _drm_update_tile_info(connector, drm_edid_legacy_init(_edid, edid));
+}
Re: [Intel-gfx] [PATCH v2 22/25] drm/edid: convert drm_edid_iter_begin() to drm_edid
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
v2: Rebase
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index bd14010ed1c5..d857d1d74c82 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1632,36 +1632,36 @@ static const struct drm_edid
*drm_edid_legacy_init(struct drm_edid *drm_edid,
* struct drm_edid_iter iter;
* const u8 *block;
*
- * drm_edid_iter_begin(edid, );
+ * drm_edid_iter_begin(drm_edid, );
* drm_edid_iter_for_each(block, ) {
* // do stuff with block
* }
* drm_edid_iter_end();
*/
struct drm_edid_iter {
- const struct edid *edid;
+ const struct drm_edid *drm_edid;
/* Current block index. */
int index;
};
-static void drm_edid_iter_begin(const struct edid *edid,
+static void drm_edid_iter_begin(const struct drm_edid *drm_edid,
struct drm_edid_iter *iter)
{
memset(iter, 0, sizeof(*iter));
- iter->edid = edid;
+ iter->drm_edid = drm_edid;
}
static const void *__drm_edid_iter_next(struct drm_edid_iter *iter)
{
const void *block = NULL;
- if (!iter->edid)
+ if (!iter->drm_edid)
return NULL;
- if (iter->index < edid_block_count(iter->edid))
- block = edid_block_data(iter->edid, iter->index++);
+ if (iter->index < edid_block_count(iter->drm_edid->edid))
+ block = edid_block_data(iter->drm_edid->edid, iter->index++);
return block;
}
@@ -2611,7 +2611,7 @@ static void drm_for_each_detailed_block(const struct
drm_edid *drm_edid,
for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
cb(_edid->edid->detailed_timings[i], closure);
- drm_edid_iter_begin(drm_edid->edid, _iter);
+ drm_edid_iter_begin(drm_edid, _iter);
drm_edid_iter_for_each(ext, _iter) {
switch (*ext) {
case CEA_EXT:
@@ -4453,7 +4453,7 @@ static void cea_db_iter_edid_begin(const struct drm_edid
*drm_edid,
{
memset(iter, 0, sizeof(*iter));
- drm_edid_iter_begin(drm_edid ? drm_edid->edid : NULL, >edid_iter);
+ drm_edid_iter_begin(drm_edid, >edid_iter);
displayid_iter_edid_begin(drm_edid ? drm_edid->edid : NULL,
>displayid_iter);
}
@@ -5163,7 +5163,7 @@ static bool _drm_detect_monitor_audio(const struct drm_edid *drm_edid)
const u8 *edid_ext;
bool has_audio = false;
- drm_edid_iter_begin(drm_edid ? drm_edid->edid : NULL, _iter);
+ drm_edid_iter_begin(drm_edid, _iter);
drm_edid_iter_for_each(edid_ext, _iter) {
if (edid_ext[0] == CEA_EXT) {
has_audio = edid_ext[3] & EDID_BASIC_AUDIO;
@@ -5516,7 +5516,7 @@ static void drm_parse_cea_ext(struct drm_connector
*connector,
struct cea_db_iter iter;
const u8 *edid_ext;
- drm_edid_iter_begin(drm_edid->edid, _iter);
+ drm_edid_iter_begin(drm_edid, _iter);
drm_edid_iter_for_each(edid_ext, _iter) {
if (edid_ext[0] != CEA_EXT)
continue;
Re: [Intel-gfx] [PATCH v2 21/25] drm/edid: convert cea_db_iter_edid_begin() to drm_edid
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
v2: Handle NULL drm_edid
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index f072cfba9dd9..bd14010ed1c5 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4448,12 +4448,13 @@ static bool cea_db_is_vendor(const struct cea_db *db,
int vendor_oui)
oui(data[2], data[1], data[0]) == vendor_oui;
}
-static void cea_db_iter_edid_begin(const struct edid *edid, struct cea_db_iter *iter)
+static void cea_db_iter_edid_begin(const struct drm_edid *drm_edid,
+ struct cea_db_iter *iter)
{
memset(iter, 0, sizeof(*iter));
- drm_edid_iter_begin(edid, >edid_iter);
- displayid_iter_edid_begin(edid, >displayid_iter);
+ drm_edid_iter_begin(drm_edid ? drm_edid->edid : NULL, >edid_iter);
+ displayid_iter_edid_begin(drm_edid ? drm_edid->edid : NULL,
>displayid_iter);
}
static const struct cea_db *
@@ -4675,7 +4676,7 @@ static int add_cea_modes(struct drm_connector *connector,
struct cea_db_iter iter;
int modes = 0;
- cea_db_iter_edid_begin(drm_edid->edid, );
+ cea_db_iter_edid_begin(drm_edid, );
cea_db_iter_for_each(db, ) {
const u8 *hdmi = NULL, *video = NULL;
u8 hdmi_len = 0, video_len = 0;
@@ -4926,7 +4927,7 @@ static void drm_edid_to_eld(struct drm_connector
*connector,
eld[DRM_ELD_PRODUCT_CODE0] = drm_edid->edid->prod_code[0];
eld[DRM_ELD_PRODUCT_CODE1] = drm_edid->edid->prod_code[1];
- cea_db_iter_edid_begin(drm_edid->edid, );
+ cea_db_iter_edid_begin(drm_edid, );
cea_db_iter_for_each(db, ) {
const u8 *data = cea_db_data(db);
int len = cea_db_payload_len(db);
@@ -4979,7 +4980,7 @@ static int _drm_edid_to_sad(const struct drm_edid
*drm_edid,
struct cea_db_iter iter;
int count = 0;
- cea_db_iter_edid_begin(drm_edid ? drm_edid->edid : NULL, );
+ cea_db_iter_edid_begin(drm_edid, );
cea_db_iter_for_each(db, ) {
if (cea_db_tag(db) == CTA_DB_AUDIO) {
int j;
@@ -5032,7 +5033,7 @@ static int _drm_edid_to_speaker_allocation(const struct
drm_edid *drm_edid,
struct cea_db_iter iter;
int count = 0;
- cea_db_iter_edid_begin(drm_edid ? drm_edid->edid : NULL, );
+ cea_db_iter_edid_begin(drm_edid, );
cea_db_iter_for_each(db, ) {
if (cea_db_tag(db) == CTA_DB_SPEAKER &&
cea_db_payload_len(db) == 3) {
@@ -5123,7 +5124,7 @@ static bool _drm_detect_hdmi_monitor(const struct
drm_edid *drm_edid)
* Because HDMI identifier is in Vendor Specific Block,
* search it from all data blocks of CEA extension.
*/
- cea_db_iter_edid_begin(drm_edid ? drm_edid->edid : NULL, );
+ cea_db_iter_edid_begin(drm_edid, );
cea_db_iter_for_each(db, ) {
if (cea_db_is_hdmi_vsdb(db)) {
hdmi = true;
@@ -5177,7 +5178,7 @@ static bool _drm_detect_monitor_audio(const struct
drm_edid *drm_edid)
goto end;
}
- cea_db_iter_edid_begin(drm_edid ? drm_edid->edid : NULL, );
+ cea_db_iter_edid_begin(drm_edid, );
cea_db_iter_for_each(db, ) {
if (cea_db_tag(db) == CTA_DB_AUDIO) {
const u8 *data = cea_db_data(db);
@@ -5536,7 +5537,7 @@ static void drm_parse_cea_ext(struct drm_connector
*connector,
}
drm_edid_iter_end(_iter);
- cea_db_iter_edid_begin(drm_edid->edid, );
+ cea_db_iter_edid_begin(drm_edid, );
cea_db_iter_for_each(db, ) {
/* FIXME: convert parsers to use struct cea_db */
const u8 *data = (const u8 *)db;
Re: [Intel-gfx] [PATCH v2 20/25] drm/edid: add drm_edid helper for drm_detect_monitor_audio()
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
v2: Handle NULL EDID pointer (Ville, CI)
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 37 ++---
1 file changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index fc74159cd426..f072cfba9dd9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5154,19 +5154,7 @@ bool drm_detect_hdmi_monitor(const struct edid *edid)
}
EXPORT_SYMBOL(drm_detect_hdmi_monitor);
-/**
- * drm_detect_monitor_audio - check monitor audio capability
- * @edid: EDID block to scan
- *
- * Monitor should have CEA extension block.
- * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
- * audio' only. If there is any audio extension block and supported
- * audio format, assume at least 'basic audio' support, even if 'basic
- * audio' is not defined in EDID.
- *
- * Return: True if the monitor supports audio, false otherwise.
- */
-bool drm_detect_monitor_audio(const struct edid *edid)
+static bool _drm_detect_monitor_audio(const struct drm_edid *drm_edid)
{
struct drm_edid_iter edid_iter;
const struct cea_db *db;
@@ -5174,7 +5162,7 @@ bool drm_detect_monitor_audio(const struct edid *edid)
const u8 *edid_ext;
bool has_audio = false;
- drm_edid_iter_begin(edid, _iter);
+ drm_edid_iter_begin(drm_edid ? drm_edid->edid : NULL, _iter);
drm_edid_iter_for_each(edid_ext, _iter) {
if (edid_ext[0] == CEA_EXT) {
has_audio = edid_ext[3] & EDID_BASIC_AUDIO;
@@ -5189,7 +5177,7 @@ bool drm_detect_monitor_audio(const struct edid *edid)
goto end;
}
- cea_db_iter_edid_begin(edid, );
+ cea_db_iter_edid_begin(drm_edid ? drm_edid->edid : NULL, );
cea_db_iter_for_each(db, ) {
if (cea_db_tag(db) == CTA_DB_AUDIO) {
const u8 *data = cea_db_data(db);
@@ -5207,6 +5195,25 @@ bool drm_detect_monitor_audio(const struct edid *edid)
end:
return has_audio;
}
+
+/**
+ * drm_detect_monitor_audio - check monitor audio capability
+ * @edid: EDID block to scan
+ *
+ * Monitor should have CEA extension block.
+ * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
+ * audio' only. If there is any audio extension block and supported
+ * audio format, assume at least 'basic audio' support, even if 'basic
+ * audio' is not defined in EDID.
+ *
+ * Return: True if the monitor supports audio, false otherwise.
+ */
+bool drm_detect_monitor_audio(const struct edid *edid)
+{
+ struct drm_edid drm_edid;
+
+ return _drm_detect_monitor_audio(drm_edid_legacy_init(_edid, edid));
+}
EXPORT_SYMBOL(drm_detect_monitor_audio);
Re: [Intel-gfx] [PATCH v2 19/25] drm/edid: add drm_edid helper for drm_detect_hdmi_monitor()
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
v2: Handle NULL EDID pointer (Ville, CI)
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 33 -
1 file changed, 20 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 5cc851f6d3b3..fc74159cd426 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5113,18 +5113,7 @@ int drm_av_sync_delay(struct drm_connector *connector,
}
EXPORT_SYMBOL(drm_av_sync_delay);
-/**
- * drm_detect_hdmi_monitor - detect whether monitor is HDMI
- * @edid: monitor EDID information
- *
- * Parse the CEA extension according to CEA-861-B.
- *
- * Drivers that have added the modes parsed from EDID to drm_display_info
- * should use _display_info.is_hdmi instead of calling this function.
- *
- * Return: True if the monitor is HDMI, false if not or unknown.
- */
-bool drm_detect_hdmi_monitor(const struct edid *edid)
+static bool _drm_detect_hdmi_monitor(const struct drm_edid *drm_edid)
{
const struct cea_db *db;
struct cea_db_iter iter;
@@ -5134,7 +5123,7 @@ bool drm_detect_hdmi_monitor(const struct edid *edid)
* Because HDMI identifier is in Vendor Specific Block,
* search it from all data blocks of CEA extension.
*/
- cea_db_iter_edid_begin(edid, );
+ cea_db_iter_edid_begin(drm_edid ? drm_edid->edid : NULL, );
cea_db_iter_for_each(db, ) {
if (cea_db_is_hdmi_vsdb(db)) {
hdmi = true;
@@ -5145,6 +5134,24 @@ bool drm_detect_hdmi_monitor(const struct edid *edid)
return hdmi;
}
+
+/**
+ * drm_detect_hdmi_monitor - detect whether monitor is HDMI
+ * @edid: monitor EDID information
+ *
+ * Parse the CEA extension according to CEA-861-B.
+ *
+ * Drivers that have added the modes parsed from EDID to drm_display_info
+ * should use _display_info.is_hdmi instead of calling this function.
+ *
+ * Return: True if the monitor is HDMI, false if not or unknown.
+ */
+bool drm_detect_hdmi_monitor(const struct edid *edid)
+{
+ struct drm_edid drm_edid;
+
+ return _drm_detect_hdmi_monitor(drm_edid_legacy_init(_edid, edid));
+}
EXPORT_SYMBOL(drm_detect_hdmi_monitor);
/**
Re: [Intel-gfx] [PATCH v2 18/25] drm/edid: add drm_edid helper for drm_edid_to_speaker_allocation()
LGTM
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.'
v2: Handle NULL EDID pointer (Ville, CI)
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 37 +++--
1 file changed, 23 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index dee09359bbc3..5cc851f6d3b3 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5025,25 +5025,14 @@ int drm_edid_to_sad(const struct edid *edid, struct
cea_sad **sads)
}
EXPORT_SYMBOL(drm_edid_to_sad);
-/**
- * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks
from EDID
- * @edid: EDID to parse
- * @sadb: pointer to the speaker block
- *
- * Looks for CEA EDID block and extracts the Speaker Allocation Data Block
from it.
- *
- * Note: The returned pointer needs to be freed using kfree().
- *
- * Return: The number of found Speaker Allocation Blocks or negative number on
- * error.
- */
-int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb)
+static int _drm_edid_to_speaker_allocation(const struct drm_edid *drm_edid,
+ u8 **sadb)
{
const struct cea_db *db;
struct cea_db_iter iter;
int count = 0;
- cea_db_iter_edid_begin(edid, );
+ cea_db_iter_edid_begin(drm_edid ? drm_edid->edid : NULL, );
cea_db_iter_for_each(db, ) {
if (cea_db_tag(db) == CTA_DB_SPEAKER &&
cea_db_payload_len(db) == 3) {
@@ -5061,6 +5050,26 @@ int drm_edid_to_speaker_allocation(const struct edid
*edid, u8 **sadb)
return count;
}
+
+/**
+ * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks
from EDID
+ * @edid: EDID to parse
+ * @sadb: pointer to the speaker block
+ *
+ * Looks for CEA EDID block and extracts the Speaker Allocation Data Block
from it.
+ *
+ * Note: The returned pointer needs to be freed using kfree().
+ *
+ * Return: The number of found Speaker Allocation Blocks or negative number on
+ * error.
+ */
+int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb)
+{
+ struct drm_edid drm_edid;
+
+ return _drm_edid_to_speaker_allocation(drm_edid_legacy_init(_edid,
edid),
+ sadb);
+}
EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
/**
[Intel-gfx] ✗ Fi.CI.IGT: failure for Update GuC relay logging debugfs
== Series Details ==
Series: Update GuC relay logging debugfs
URL : https://patchwork.freedesktop.org/series/103767/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11626_full -> Patchwork_103767v1_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_103767v1_full absolutely need
to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_103767v1_full, please notify your bug team to allow
them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_103767v1_full:
### IGT changes ###
Possible regressions
* igt@i915_pm_dc@dc5-dpms:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11626/shard-skl7/igt@i915_pm...@dc5-dpms.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-skl3/igt@i915_pm...@dc5-dpms.html
* igt@i915_pm_dc@dc9-dpms:
- shard-skl: NOTRUN -> [INCOMPLETE][3]
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-skl7/igt@i915_pm...@dc9-dpms.html
* {igt@kms_concurrent@pipe-b@hdmi-a-3} (NEW):
- {shard-dg1}:NOTRUN -> [CRASH][4]
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-dg1-18/igt@kms_concurrent@pip...@hdmi-a-3.html
*
{igt@kms_plane_scaling@downscale-with-modifier-factor-0-25@pipe-c-hdmi-a-3-downscale-with-modifier}
(NEW):
- {shard-dg1}:NOTRUN -> [SKIP][5] +3 similar issues
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-dg1-18/igt@kms_plane_scaling@downscale-with-modifier-factor-0...@pipe-c-hdmi-a-3-downscale-with-modifier.html
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_eio@in-flight-suspend:
- {shard-dg1}:NOTRUN -> [INCOMPLETE][6]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-dg1-19/igt@gem_...@in-flight-suspend.html
* igt@kms_concurrent@pipe-c@hdmi-a-1:
- {shard-dg1}:[CRASH][7] ([i915#4886]) -> [FAIL][8]
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11626/shard-dg1-12/igt@kms_concurrent@pip...@hdmi-a-1.html
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-dg1-15/igt@kms_concurrent@pip...@hdmi-a-1.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- {shard-dg1}:NOTRUN -> [FAIL][9] +4 similar issues
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-dg1-15/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- {shard-dg1}:[PASS][10] -> [FAIL][11]
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11626/shard-dg1-18/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-dg1-15/igt@kms_cursor_leg...@flip-vs-cursor-atomic-transitions.html
* igt@kms_lease@empty_lease:
- {shard-dg1}:NOTRUN -> [WARN][12]
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-dg1-15/igt@kms_lease@empty_lease.html
*
igt@kms_plane_scaling@downscale-with-modifier-factor-0-25@pipe-d-hdmi-a-1-downscale-with-modifier:
- {shard-tglu}: NOTRUN -> [SKIP][13] +3 similar issues
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103767v1/shard-tglu-4/igt@kms_plane_scaling@downscale-with-modifier-factor-0...@pipe-d-hdmi-a-1-downscale-with-modifier.html
New tests
-
New tests have been introduced between CI_DRM_11626_full and
Patchwork_103767v1_full:
### New IGT tests (5) ###
* igt@kms_concurrent@pipe-b@hdmi-a-3:
- Statuses : 1 crash(s)
- Exec time: [0.03] s
*
igt@kms_plane_scaling@downscale-with-modifier-factor-0-25@pipe-a-hdmi-a-3-downscale-with-modifier:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
*
igt@kms_plane_scaling@downscale-with-modifier-factor-0-25@pipe-b-hdmi-a-3-downscale-with-modifier:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
*
igt@kms_plane_scaling@downscale-with-modifier-factor-0-25@pipe-c-hdmi-a-3-downscale-with-modifier:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
*
igt@kms_plane_scaling@downscale-with-modifier-factor-0-25@pipe-d-hdmi-a-3-downscale-with-modifier:
- Statuses : 1 skip(s)
- Exec time: [0.03] s
Known issues
Here are the changes found in Patchwork_103767v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@gem_create@create-massive:
- shard-kbl:
Re: [Intel-gfx] [PATCH v2 17/25] drm/edid: add drm_edid helper for drm_edid_to_sad()
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
v2: Handle NULL EDID pointer (Ville, CI)
Signed-off-by: Jani Nikula
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
---
drivers/gpu/drm/drm_edid.c | 34 +-
1 file changed, 21 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 61551ce0db88..dee09359bbc3 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4972,24 +4972,14 @@ static void drm_edid_to_eld(struct drm_connector
*connector,
drm_eld_size(eld), total_sad_count);
}
-/**
- * drm_edid_to_sad - extracts SADs from EDID
- * @edid: EDID to parse
- * @sads: pointer that will be set to the extracted SADs
- *
- * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from
it.
- *
- * Note: The returned pointer needs to be freed using kfree().
- *
- * Return: The number of found SADs or negative number on error.
- */
-int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads)
+static int _drm_edid_to_sad(const struct drm_edid *drm_edid,
+ struct cea_sad **sads)
{
const struct cea_db *db;
struct cea_db_iter iter;
int count = 0;
- cea_db_iter_edid_begin(edid, );
+ cea_db_iter_edid_begin(drm_edid ? drm_edid->edid : NULL, );
cea_db_iter_for_each(db, ) {
if (cea_db_tag(db) == CTA_DB_AUDIO) {
int j;
@@ -5015,6 +5005,24 @@ int drm_edid_to_sad(const struct edid *edid, struct
cea_sad **sads)
return count;
}
+
+/**
+ * drm_edid_to_sad - extracts SADs from EDID
+ * @edid: EDID to parse
+ * @sads: pointer that will be set to the extracted SADs
+ *
+ * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from
it.
+ *
+ * Note: The returned pointer needs to be freed using kfree().
+ *
+ * Return: The number of found SADs or negative number on error.
+ */
+int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads)
+{
+ struct drm_edid drm_edid;
+
+ return _drm_edid_to_sad(drm_edid_legacy_init(_edid, edid), sads);
+}
EXPORT_SYMBOL(drm_edid_to_sad);
/**
Re: [Intel-gfx] [PATCH 6/8] drm/i915/gt: Fix memory leaks in per-gt sysfs
On 10/05/2022 10:39, Andrzej Hajda wrote:
On 10.05.2022 10:18, Tvrtko Ursulin wrote:
On 10/05/2022 08:58, Andrzej Hajda wrote:
Hi Tvrtko,
On 10.05.2022 09:28, Tvrtko Ursulin wrote:
On 29/04/2022 20:56, Ashutosh Dixit wrote:
All kmalloc'd kobjects need a kobject_put() to free memory. For
example in
previous code, kobj_gt_release() never gets called. The requirement of
kobject_put() now results in a slightly different code organization.
v2: s/gtn/gt/ (Andi)
Cc: Andi Shyti
Cc: Andrzej Hajda
Fixes: b770bcfae9ad ("drm/i915/gt: create per-tile sysfs interface")
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/gt/intel_gt.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt_sysfs.c | 29
++--
drivers/gpu/drm/i915/gt/intel_gt_sysfs.h | 6 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +++
drivers/gpu/drm/i915/i915_sysfs.c | 2 ++
5 files changed, 19 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 92394f13b42f..9aede288eb86 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -785,6 +785,7 @@ void intel_gt_driver_unregister(struct intel_gt
*gt)
{
intel_wakeref_t wakeref;
+ intel_gt_sysfs_unregister(gt);
intel_rps_driver_unregister(>rps);
intel_gsc_fini(>gsc);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
index 8ec8bc660c8c..9e4ebf53379b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
@@ -24,7 +24,7 @@ bool is_object_gt(struct kobject *kobj)
static struct intel_gt *kobj_to_gt(struct kobject *kobj)
{
- return container_of(kobj, struct kobj_gt, base)->gt;
+ return container_of(kobj, struct intel_gt, sysfs_gt);
}
struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev,
@@ -72,9 +72,9 @@ static struct attribute *id_attrs[] = {
};
ATTRIBUTE_GROUPS(id);
+/* A kobject needs a release() method even if it does nothing */
static void kobj_gt_release(struct kobject *kobj)
{
- kfree(kobj);
}
static struct kobj_type kobj_gt_type = {
@@ -85,8 +85,6 @@ static struct kobj_type kobj_gt_type = {
void intel_gt_sysfs_register(struct intel_gt *gt)
{
- struct kobj_gt *kg;
-
/*
* We need to make things right with the
* ABI compatibility. The files were originally
@@ -98,25 +96,22 @@ void intel_gt_sysfs_register(struct intel_gt *gt)
if (gt_is_root(gt))
intel_gt_sysfs_pm_init(gt, gt_get_parent_obj(gt));
- kg = kzalloc(sizeof(*kg), GFP_KERNEL);
- if (!kg)
+ /* init and xfer ownership to sysfs tree */
+ if (kobject_init_and_add(>sysfs_gt, _gt_type,
+ gt->i915->sysfs_gt, "gt%d", gt->info.id))
Was there closure/agreement on the matter of whether or not there is
a potential race between "kfree(gt)" and sysfs access (last put from
sysfs that is)? I've noticed Andrzej and Ashutosh were discussing it
but did not read all the details.
Not really :)
IMO docs are against this practice, Ashutosh shows examples of this
practice in code and according to his analysis it is safe.
I gave up looking for contradictions :) Either it is OK, kobject is
not fully shared object, docs are obsolete and needs update, either
the patch is wrong.
Anyway finally I tend to accept this solution, I failed to prove it
is wrong :)
Like a question of whether hotunplug can be triggered while userspace
is sitting in a sysfs hook? Final kfree then has to be delayed until
userspace exists.
Btw where is the "kfree(gt)" for the tiles on the PCI remove path? I
can't find it.. Do we have a leak?
intel_gt_tile_cleanup ?
Called from intel_gt_release_all, whose only caller is the failure path
of i915_driver_probe. Feels like something is missing?
Regards,
Tvrtko
Re: [Intel-gfx] [PATCH 6/8] drm/i915/gt: Fix memory leaks in per-gt sysfs
On 10.05.2022 10:18, Tvrtko Ursulin wrote:
On 10/05/2022 08:58, Andrzej Hajda wrote:
Hi Tvrtko,
On 10.05.2022 09:28, Tvrtko Ursulin wrote:
On 29/04/2022 20:56, Ashutosh Dixit wrote:
All kmalloc'd kobjects need a kobject_put() to free memory. For
example in
previous code, kobj_gt_release() never gets called. The requirement of
kobject_put() now results in a slightly different code organization.
v2: s/gtn/gt/ (Andi)
Cc: Andi Shyti
Cc: Andrzej Hajda
Fixes: b770bcfae9ad ("drm/i915/gt: create per-tile sysfs interface")
Signed-off-by: Ashutosh Dixit
---
drivers/gpu/drm/i915/gt/intel_gt.c | 1 +
drivers/gpu/drm/i915/gt/intel_gt_sysfs.c | 29
++--
drivers/gpu/drm/i915/gt/intel_gt_sysfs.h | 6 +
drivers/gpu/drm/i915/gt/intel_gt_types.h | 3 +++
drivers/gpu/drm/i915/i915_sysfs.c | 2 ++
5 files changed, 19 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 92394f13b42f..9aede288eb86 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -785,6 +785,7 @@ void intel_gt_driver_unregister(struct intel_gt
*gt)
{
intel_wakeref_t wakeref;
+ intel_gt_sysfs_unregister(gt);
intel_rps_driver_unregister(>rps);
intel_gsc_fini(>gsc);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
index 8ec8bc660c8c..9e4ebf53379b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
@@ -24,7 +24,7 @@ bool is_object_gt(struct kobject *kobj)
static struct intel_gt *kobj_to_gt(struct kobject *kobj)
{
- return container_of(kobj, struct kobj_gt, base)->gt;
+ return container_of(kobj, struct intel_gt, sysfs_gt);
}
struct intel_gt *intel_gt_sysfs_get_drvdata(struct device *dev,
@@ -72,9 +72,9 @@ static struct attribute *id_attrs[] = {
};
ATTRIBUTE_GROUPS(id);
+/* A kobject needs a release() method even if it does nothing */
static void kobj_gt_release(struct kobject *kobj)
{
- kfree(kobj);
}
static struct kobj_type kobj_gt_type = {
@@ -85,8 +85,6 @@ static struct kobj_type kobj_gt_type = {
void intel_gt_sysfs_register(struct intel_gt *gt)
{
- struct kobj_gt *kg;
-
/*
* We need to make things right with the
* ABI compatibility. The files were originally
@@ -98,25 +96,22 @@ void intel_gt_sysfs_register(struct intel_gt *gt)
if (gt_is_root(gt))
intel_gt_sysfs_pm_init(gt, gt_get_parent_obj(gt));
- kg = kzalloc(sizeof(*kg), GFP_KERNEL);
- if (!kg)
+ /* init and xfer ownership to sysfs tree */
+ if (kobject_init_and_add(>sysfs_gt, _gt_type,
+ gt->i915->sysfs_gt, "gt%d", gt->info.id))
Was there closure/agreement on the matter of whether or not there is
a potential race between "kfree(gt)" and sysfs access (last put from
sysfs that is)? I've noticed Andrzej and Ashutosh were discussing it
but did not read all the details.
Not really :)
IMO docs are against this practice, Ashutosh shows examples of this
practice in code and according to his analysis it is safe.
I gave up looking for contradictions :) Either it is OK, kobject is
not fully shared object, docs are obsolete and needs update, either
the patch is wrong.
Anyway finally I tend to accept this solution, I failed to prove it
is wrong :)
Like a question of whether hotunplug can be triggered while userspace
is sitting in a sysfs hook? Final kfree then has to be delayed until
userspace exists.
Btw where is the "kfree(gt)" for the tiles on the PCI remove path? I
can't find it.. Do we have a leak?
intel_gt_tile_cleanup ?
Regards,
Tvrtko
Re: [Intel-gfx] [PATCH v2 16/25] drm/edid: convert drm_for_each_detailed_block() to drm_edid
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
v2: Fix checkpatch warning on superfluous parens
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 36 ++--
1 file changed, 18 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index e3ff0f31a614..61551ce0db88 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2598,20 +2598,20 @@ vtb_for_each_detailed_block(const u8 *ext, detailed_cb
*cb, void *closure)
cb((const struct detailed_timing *)(det_base + 18 * i),
closure);
}
-static void
-drm_for_each_detailed_block(const struct edid *edid, detailed_cb *cb, void
*closure)
+static void drm_for_each_detailed_block(const struct drm_edid *drm_edid,
+ detailed_cb *cb, void *closure)
{
struct drm_edid_iter edid_iter;
const u8 *ext;
int i;
- if (edid == NULL)
+ if (!drm_edid)
return;
for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
- cb(&(edid->detailed_timings[i]), closure);
+ cb(_edid->edid->detailed_timings[i], closure);
- drm_edid_iter_begin(edid, _iter);
+ drm_edid_iter_begin(drm_edid->edid, _iter);
drm_edid_iter_for_each(ext, _iter) {
switch (*ext) {
case CEA_EXT:
@@ -2650,7 +2650,7 @@ drm_monitor_supports_rb(const struct drm_edid *drm_edid)
if (drm_edid->edid->revision >= 4) {
bool ret = false;
- drm_for_each_detailed_block(drm_edid->edid, is_rb, );
+ drm_for_each_detailed_block(drm_edid, is_rb, );
return ret;
}
@@ -2677,7 +2677,7 @@ drm_gtf2_hbreak(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.hfreq_start_khz) != 12);
@@ -2689,7 +2689,7 @@ drm_gtf2_2c(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.c) != 13);
@@ -2701,7 +2701,7 @@ drm_gtf2_m(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.m) != 14);
@@ -2713,7 +2713,7 @@ drm_gtf2_k(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.k) != 16);
@@ -2725,7 +2725,7 @@ drm_gtf2_2j(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.j) != 17);
@@ -3265,7 +3265,7 @@ static int add_inferred_modes(struct drm_connector *connector,
};
if (version_greater(drm_edid->edid, 1, 0))
- drm_for_each_detailed_block(drm_edid->edid, do_inferred_modes,
);
+ drm_for_each_detailed_block(drm_edid, do_inferred_modes,
);
return closure.modes;
}
@@ -3342,7 +3342,7 @@ static int add_established_modes(struct drm_connector
*connector,
}
if (version_greater(edid, 1, 0))
- drm_for_each_detailed_block(drm_edid->edid,
do_established_modes,
+ drm_for_each_detailed_block(drm_edid, do_established_modes,
);
return modes + closure.modes;
@@ -3397,7 +3397,7 @@ static int add_standard_modes(struct drm_connector
*connector,
}
if (version_greater(drm_edid->edid, 1, 0))
- drm_for_each_detailed_block(drm_edid->edid, do_standard_modes,
+ drm_for_each_detailed_block(drm_edid, do_standard_modes,
);
/* XXX should also look for standard codes in VTB blocks */
@@ -3477,7 +3477,7 @@ add_cvt_modes(struct drm_connector *connector, const
struct drm_edid *drm_edid)
};
if (version_greater(drm_edid->edid, 1, 2))
- drm_for_each_detailed_block(drm_edid->edid, do_cvt_mode,
);
+
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev5)
== Series Details == Series: drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev5) URL : https://patchwork.freedesktop.org/series/102666/ State : success == Summary == CI Bug Log - changes from CI_DRM_11627 -> Patchwork_102666v5 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/index.html Participating hosts (39 -> 40) -- Additional (4): bat-dg2-8 fi-rkl-11600 bat-jsl-2 bat-adlp-4 Missing(3): bat-rpls-1 fi-bsw-cyan bat-dg1-5 Known issues Here are the changes found in Patchwork_102666v5 that come from known issues: ### IGT changes ### Issues hit * igt@gem_huc_copy@huc-copy: - fi-rkl-11600: NOTRUN -> [SKIP][1] ([i915#2190]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-rkl-11600/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-rkl-11600: NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-rkl-11600/igt@gem_lmem_swapp...@basic.html - bat-adlp-4: NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/bat-adlp-4/igt@gem_lmem_swapp...@basic.html * igt@gem_tiled_pread_basic: - bat-adlp-4: NOTRUN -> [SKIP][4] ([i915#3282]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/bat-adlp-4/igt@gem_tiled_pread_basic.html - fi-rkl-11600: NOTRUN -> [SKIP][5] ([i915#3282]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-rkl-11600/igt@gem_tiled_pread_basic.html * igt@i915_pm_backlight@basic-brightness: - fi-rkl-11600: NOTRUN -> [SKIP][6] ([i915#3012]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-rkl-11600/igt@i915_pm_backli...@basic-brightness.html * igt@i915_selftest@live@gem: - fi-pnv-d510:NOTRUN -> [DMESG-FAIL][7] ([i915#4528]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-pnv-d510/igt@i915_selftest@l...@gem.html * igt@i915_selftest@live@hangcheck: - fi-hsw-4770:[PASS][8] -> [INCOMPLETE][9] ([i915#4785]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html * igt@i915_selftest@live@requests: - fi-blb-e6850: [PASS][10] -> [DMESG-FAIL][11] ([i915#4528]) [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11627/fi-blb-e6850/igt@i915_selftest@l...@requests.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-blb-e6850/igt@i915_selftest@l...@requests.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-snb-2600:NOTRUN -> [SKIP][12] ([fdo#109271] / [fdo#111827]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-snb-2600/igt@kms_chamel...@common-hpd-after-suspend.html * igt@kms_chamelium@dp-crc-fast: - bat-adlp-4: NOTRUN -> [SKIP][13] ([fdo#111827]) +8 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/bat-adlp-4/igt@kms_chamel...@dp-crc-fast.html - fi-rkl-11600: NOTRUN -> [SKIP][14] ([fdo#111827]) +8 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-rkl-11600/igt@kms_chamel...@dp-crc-fast.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - fi-rkl-11600: NOTRUN -> [SKIP][15] ([i915#4070] / [i915#4103]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-adlp-4: NOTRUN -> [SKIP][16] ([i915#4103]) +1 similar issue [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/bat-adlp-4/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_flip@basic-flip-vs-modeset@b-edp1: - bat-adlp-4: NOTRUN -> [DMESG-WARN][17] ([i915#3576]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/bat-adlp-4/igt@kms_flip@basic-flip-vs-mode...@b-edp1.html * igt@kms_force_connector_basic@force-load-detect: - fi-rkl-11600: NOTRUN -> [SKIP][18] ([fdo#109285] / [i915#4098]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/fi-rkl-11600/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-adlp-4: NOTRUN -> [SKIP][19] ([i915#4093]) +3 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_102666v5/bat-adlp-4/igt@kms_force_connector_ba...@prune-stale-modes.html *
Re: [Intel-gfx] [PATCH v2 15/25] drm/edid: convert get_monitor_name() to drm_edid
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
v2: Drop incorrect NULL name check (Dan Carpenter)
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 24
1 file changed, 16 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 364949e146a9..e3ff0f31a614 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -4830,15 +4830,15 @@ monitor_name(const struct detailed_timing *timing, void
*data)
*res = timing->data.other_data.data.str.str;
}
-static int get_monitor_name(const struct edid *edid, char name[13])
+static int get_monitor_name(const struct drm_edid *drm_edid, char name[13])
{
const char *edid_name = NULL;
int mnl;
- if (!edid || !name)
+ if (!drm_edid || !name)
return 0;
- drm_for_each_detailed_block(edid, monitor_name, _name);
+ drm_for_each_detailed_block(drm_edid->edid, monitor_name, _name);
for (mnl = 0; edid_name && mnl < 13; mnl++) {
if (edid_name[mnl] == 0x0a)
break;
@@ -4858,14 +4858,22 @@ static int get_monitor_name(const struct edid *edid,
char name[13])
*/
void drm_edid_get_monitor_name(const struct edid *edid, char *name, int
bufsize)
{
- int name_length;
- char buf[13];
+ int name_length = 0;
if (bufsize <= 0)
return;
- name_length = min(get_monitor_name(edid, buf), bufsize - 1);
- memcpy(name, buf, name_length);
+ if (edid) {
+ char buf[13];
+ struct drm_edid drm_edid = {
+ .edid = edid,
+ .size = edid_size(edid),
+ };
+
+ name_length = min(get_monitor_name(_edid, buf), bufsize -
1);
+ memcpy(name, buf, name_length);
+ }
+
name[name_length] = '\0';
}
EXPORT_SYMBOL(drm_edid_get_monitor_name);
@@ -4905,7 +4913,7 @@ static void drm_edid_to_eld(struct drm_connector
*connector,
if (!drm_edid)
return;
- mnl = get_monitor_name(drm_edid->edid, [DRM_ELD_MONITOR_NAME_STRING]);
+ mnl = get_monitor_name(drm_edid, [DRM_ELD_MONITOR_NAME_STRING]);
DRM_DEBUG_KMS("ELD monitor %s\n", [DRM_ELD_MONITOR_NAME_STRING]);
eld[DRM_ELD_CEA_EDID_VER_MNL] = info->cea_rev << DRM_ELD_CEA_EDID_VER_SHIFT;
Re: [Intel-gfx] [PATCH 2/3] drm/i915: remove single-use GEM_DEBUG_EXEC()
On Thu, 05 May 2022, Tvrtko Ursulin wrote:
> On 04/05/2022 19:37, Jani Nikula wrote:
>> Reduce the magic of what's going on in GEM_DEBUG_EXEC() by expanding it
>> inline and being explicit about it. It's as single use case anyway, so
>> the macro feels overkill.
>>
>> Cc: Tvrtko Ursulin
>> Signed-off-by: Jani Nikula
>> ---
>> drivers/gpu/drm/i915/gt/intel_ring.c | 3 ++-
>> drivers/gpu/drm/i915/i915_gem.h | 2 --
>> 2 files changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_ring.c
>> b/drivers/gpu/drm/i915/gt/intel_ring.c
>> index 40ffcb94e379..15ec64d881c4 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_ring.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_ring.c
>> @@ -299,7 +299,8 @@ u32 *intel_ring_begin(struct i915_request *rq, unsigned
>> int num_dwords)
>> GEM_BUG_ON(ring->emit > ring->size - bytes);
>> GEM_BUG_ON(ring->space < bytes);
>> cs = ring->vaddr + ring->emit;
>> -GEM_DEBUG_EXEC(memset32(cs, POISON_INUSE, bytes / sizeof(*cs)));
>> +if (IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
>> +memset32(cs, POISON_INUSE, bytes / sizeof(*cs));
>> ring->emit += bytes;
>> ring->space -= bytes;
>>
>> diff --git a/drivers/gpu/drm/i915/i915_gem.h
>> b/drivers/gpu/drm/i915/i915_gem.h
>> index b7b257f54d2e..a2be323a4be5 100644
>> --- a/drivers/gpu/drm/i915/i915_gem.h
>> +++ b/drivers/gpu/drm/i915/i915_gem.h
>> @@ -54,7 +54,6 @@ struct drm_i915_private;
>> } while(0)
>> #define GEM_WARN_ON(expr) WARN_ON(expr)
>>
>> -#define GEM_DEBUG_EXEC(expr) expr
>> #define GEM_DEBUG_WARN_ON(expr) GEM_WARN_ON(expr)
>>
>> #else
>> @@ -64,7 +63,6 @@ struct drm_i915_private;
>> #define GEM_BUG_ON(expr) BUILD_BUG_ON_INVALID(expr)
>> #define GEM_WARN_ON(expr) ({ unlikely(!!(expr)); })
>>
>> -#define GEM_DEBUG_EXEC(expr) do { } while (0)
>> #define GEM_DEBUG_WARN_ON(expr) ({ BUILD_BUG_ON_INVALID(expr); 0; })
>> #endif
>>
>
> Yeah one user after time passed suggests removing is the right course of
> action.
>
> Reviewed-by: Tvrtko Ursulin
Thanks, pushed the first two to din.
BR,
Jani.
>
> Regards,
>
> Tvrtko
--
Jani Nikula, Intel Open Source Graphics Center
Re: [Intel-gfx] [PATCH v2 14/25] drm/edid: convert mode_in_range() and drm_monitor_supports_rb() to drm_edid
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index bea8f33c58ad..364949e146a9 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2645,16 +2645,16 @@ is_rb(const struct detailed_timing *descriptor, void
*data)
/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
static bool
-drm_monitor_supports_rb(const struct edid *edid)
+drm_monitor_supports_rb(const struct drm_edid *drm_edid)
{
- if (edid->revision >= 4) {
+ if (drm_edid->edid->revision >= 4) {
bool ret = false;
- drm_for_each_detailed_block(edid, is_rb, );
+ drm_for_each_detailed_block(drm_edid->edid, is_rb, );
return ret;
}
- return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
+ return ((drm_edid->edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
}
static void
@@ -2838,7 +2838,7 @@ static struct drm_display_mode *drm_mode_std(struct
drm_connector *connector,
}
/* check whether it can be found in default mode table */
- if (drm_monitor_supports_rb(drm_edid->edid)) {
+ if (drm_monitor_supports_rb(drm_edid)) {
mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
true);
if (mode)
@@ -3077,10 +3077,11 @@ range_pixel_clock(const struct edid *edid, const u8 *t)
return t[9] * 1 + 5001;
}
-static bool
-mode_in_range(const struct drm_display_mode *mode, const struct edid *edid,
- const struct detailed_timing *timing)
+static bool mode_in_range(const struct drm_display_mode *mode,
+ const struct drm_edid *drm_edid,
+ const struct detailed_timing *timing)
{
+ const struct edid *edid = drm_edid->edid;
u32 max_clock;
const u8 *t = (const u8 *)timing;
@@ -3099,7 +3100,7 @@ mode_in_range(const struct drm_display_mode *mode, const struct edid *edid,
if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3
return false;
- if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
+ if (mode_is_rb(mode) && !drm_monitor_supports_rb(drm_edid))
return false;
return true;
@@ -3132,7 +3133,7 @@ static int drm_dmt_modes_for_range(struct drm_connector
*connector,
struct drm_device *dev = connector->dev;
for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
- if (mode_in_range(drm_dmt_modes + i, drm_edid->edid, timing) &&
+ if (mode_in_range(drm_dmt_modes + i, drm_edid, timing) &&
valid_inferred_mode(connector, drm_dmt_modes + i)) {
newmode = drm_mode_duplicate(dev, _dmt_modes[i]);
if (newmode) {
@@ -3174,7 +3175,7 @@ static int drm_gtf_modes_for_range(struct drm_connector
*connector,
return modes;
drm_mode_fixup_1366x768(newmode);
- if (!mode_in_range(newmode, drm_edid->edid, timing) ||
+ if (!mode_in_range(newmode, drm_edid, timing) ||
!valid_inferred_mode(connector, newmode)) {
drm_mode_destroy(dev, newmode);
continue;
@@ -3194,7 +3195,7 @@ static int drm_cvt_modes_for_range(struct drm_connector
*connector,
int i, modes = 0;
struct drm_display_mode *newmode;
struct drm_device *dev = connector->dev;
- bool rb = drm_monitor_supports_rb(drm_edid->edid);
+ bool rb = drm_monitor_supports_rb(drm_edid);
for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
const struct minimode *m = _modes[i];
@@ -3204,7 +3205,7 @@ static int drm_cvt_modes_for_range(struct drm_connector
*connector,
return modes;
drm_mode_fixup_1366x768(newmode);
- if (!mode_in_range(newmode, drm_edid->edid, timing) ||
+ if (!mode_in_range(newmode, drm_edid, timing) ||
!valid_inferred_mode(connector, newmode)) {
drm_mode_destroy(dev, newmode);
continue;
Re: [Intel-gfx] [PATCH v2 13/25] drm/edid: convert drm_mode_std() and children to drm_edid
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 52 --
1 file changed, 27 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 51d918c66a26..bea8f33c58ad 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2673,11 +2673,11 @@ find_gtf2(const struct detailed_timing *descriptor,
void *data)
/* Secondary GTF curve kicks in above some break frequency */
static int
-drm_gtf2_hbreak(const struct edid *edid)
+drm_gtf2_hbreak(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.hfreq_start_khz) != 12);
@@ -2685,11 +2685,11 @@ drm_gtf2_hbreak(const struct edid *edid)
}
static int
-drm_gtf2_2c(const struct edid *edid)
+drm_gtf2_2c(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.c) != 13);
@@ -2697,11 +2697,11 @@ drm_gtf2_2c(const struct edid *edid)
}
static int
-drm_gtf2_m(const struct edid *edid)
+drm_gtf2_m(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.m) != 14);
@@ -2709,11 +2709,11 @@ drm_gtf2_m(const struct edid *edid)
}
static int
-drm_gtf2_k(const struct edid *edid)
+drm_gtf2_k(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.k) != 16);
@@ -2721,11 +2721,11 @@ drm_gtf2_k(const struct edid *edid)
}
static int
-drm_gtf2_2j(const struct edid *edid)
+drm_gtf2_2j(const struct drm_edid *drm_edid)
{
const struct detailed_timing *descriptor = NULL;
- drm_for_each_detailed_block(edid, find_gtf2, );
+ drm_for_each_detailed_block(drm_edid->edid, find_gtf2, );
BUILD_BUG_ON(offsetof(typeof(*descriptor), data.other_data.data.range.formula.gtf2.j) != 17);
@@ -2733,12 +2733,14 @@ drm_gtf2_2j(const struct edid *edid)
}
/* Get standard timing level (CVT/GTF/DMT). */
-static int standard_timing_level(const struct edid *edid)
+static int standard_timing_level(const struct drm_edid *drm_edid)
{
+ const struct edid *edid = drm_edid->edid;
+
if (edid->revision >= 2) {
if (edid->revision >= 4 && (edid->features &
DRM_EDID_FEATURE_DEFAULT_GTF))
return LEVEL_CVT;
- if (drm_gtf2_hbreak(edid))
+ if (drm_gtf2_hbreak(drm_edid))
return LEVEL_GTF2;
if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
return LEVEL_GTF;
@@ -2770,9 +2772,9 @@ static int drm_mode_hsync(const struct drm_display_mode
*mode)
* Take the standard timing params (in this case width, aspect, and refresh)
* and convert them into a real mode using CVT/GTF/DMT.
*/
-static struct drm_display_mode *
-drm_mode_std(struct drm_connector *connector, const struct edid *edid,
-const struct std_timing *t)
+static struct drm_display_mode *drm_mode_std(struct drm_connector *connector,
+const struct drm_edid *drm_edid,
+const struct std_timing *t)
{
struct drm_device *dev = connector->dev;
struct drm_display_mode *m, *mode = NULL;
@@ -2782,7 +2784,7 @@ drm_mode_std(struct drm_connector *connector, const
struct edid *edid,
>> EDID_TIMING_ASPECT_SHIFT;
unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
>> EDID_TIMING_VFREQ_SHIFT;
- int timing_level = standard_timing_level(edid);
+ int timing_level = standard_timing_level(drm_edid);
if (bad_std_timing(t->hsize, t->vfreq_aspect))
return NULL;
@@ -2793,7 +2795,7 @@ drm_mode_std(struct drm_connector *connector, const
struct edid *edid,
vrefresh_rate = vfreq + 60;
/* the vdisplay is calculated based on the aspect ratio */
if (aspect_ratio == 0) {
- if (edid->revision < 3)
+ if
Re: [Intel-gfx] [PATCH v2 12/25] drm/edid: convert drm_cvt_modes_for_range() to drm_edid
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 037102a4d0b5..51d918c66a26 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3185,14 +3185,14 @@ static int drm_gtf_modes_for_range(struct drm_connector
*connector,
return modes;
}
-static int
-drm_cvt_modes_for_range(struct drm_connector *connector, const struct edid
*edid,
- const struct detailed_timing *timing)
+static int drm_cvt_modes_for_range(struct drm_connector *connector,
+ const struct drm_edid *drm_edid,
+ const struct detailed_timing *timing)
{
int i, modes = 0;
struct drm_display_mode *newmode;
struct drm_device *dev = connector->dev;
- bool rb = drm_monitor_supports_rb(edid);
+ bool rb = drm_monitor_supports_rb(drm_edid->edid);
for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
const struct minimode *m = _modes[i];
@@ -3202,7 +3202,7 @@ drm_cvt_modes_for_range(struct drm_connector *connector,
const struct edid *edid
return modes;
drm_mode_fixup_1366x768(newmode);
- if (!mode_in_range(newmode, edid, timing) ||
+ if (!mode_in_range(newmode, drm_edid->edid, timing) ||
!valid_inferred_mode(connector, newmode)) {
drm_mode_destroy(dev, newmode);
continue;
@@ -3244,7 +3244,7 @@ do_inferred_modes(const struct detailed_timing *timing,
void *c)
break;
closure->modes += drm_cvt_modes_for_range(closure->connector,
-
closure->drm_edid->edid,
+ closure->drm_edid,
timing);
break;
case 0x01: /* just the ranges, no formula */
[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev5)
== Series Details == Series: drm/i915: Eliminate PIPECONF RMWs from .color_commit() (rev5) URL : https://patchwork.freedesktop.org/series/102666/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
Re: [Intel-gfx] [PATCH v2 11/25] drm/edid: convert drm_gtf_modes_for_range() to drm_edid
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 5d8744a7b62e..037102a4d0b5 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3156,9 +3156,9 @@ void drm_mode_fixup_1366x768(struct drm_display_mode
*mode)
}
}
-static int
-drm_gtf_modes_for_range(struct drm_connector *connector, const struct edid
*edid,
- const struct detailed_timing *timing)
+static int drm_gtf_modes_for_range(struct drm_connector *connector,
+ const struct drm_edid *drm_edid,
+ const struct detailed_timing *timing)
{
int i, modes = 0;
struct drm_display_mode *newmode;
@@ -3172,7 +3172,7 @@ drm_gtf_modes_for_range(struct drm_connector *connector,
const struct edid *edid
return modes;
drm_mode_fixup_1366x768(newmode);
- if (!mode_in_range(newmode, edid, timing) ||
+ if (!mode_in_range(newmode, drm_edid->edid, timing) ||
!valid_inferred_mode(connector, newmode)) {
drm_mode_destroy(dev, newmode);
continue;
@@ -3236,7 +3236,7 @@ do_inferred_modes(const struct detailed_timing *timing,
void *c)
case 0x02: /* secondary gtf, XXX could do more */
case 0x00: /* default gtf */
closure->modes += drm_gtf_modes_for_range(closure->connector,
-
closure->drm_edid->edid,
+ closure->drm_edid,
timing);
break;
case 0x04: /* cvt, only in 1.4+ */
Re: [Intel-gfx] [PATCH v2 10/25] drm/edid: convert drm_dmt_modes_for_range() to drm_edid
LGTM.
Reviewed-by: Ankit Nautiyal
Regards,
Ankit
On 5/9/2022 5:33 PM, Jani Nikula wrote:
We'll need to propagate drm_edid everywhere.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/drm_edid.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 8acdb08a8571..5d8744a7b62e 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3121,16 +3121,16 @@ static bool valid_inferred_mode(const struct
drm_connector *connector,
return ok;
}
-static int
-drm_dmt_modes_for_range(struct drm_connector *connector, const struct edid
*edid,
- const struct detailed_timing *timing)
+static int drm_dmt_modes_for_range(struct drm_connector *connector,
+ const struct drm_edid *drm_edid,
+ const struct detailed_timing *timing)
{
int i, modes = 0;
struct drm_display_mode *newmode;
struct drm_device *dev = connector->dev;
for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
- if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
+ if (mode_in_range(drm_dmt_modes + i, drm_edid->edid, timing) &&
valid_inferred_mode(connector, drm_dmt_modes + i)) {
newmode = drm_mode_duplicate(dev, _dmt_modes[i]);
if (newmode) {
@@ -3226,7 +3226,7 @@ do_inferred_modes(const struct detailed_timing *timing,
void *c)
return;
closure->modes += drm_dmt_modes_for_range(closure->connector,
- closure->drm_edid->edid,
+ closure->drm_edid,
timing);
if (!version_greater(closure->drm_edid->edid, 1, 1))
