[Intel-gfx] [PULL] gvt-fixes

[Zhenyu Wang]

Hi,

Here's one gvt fix for 5.19, from Dan for shmem_pin_map() return check bug.

Thanks!
---

The following changes since commit d72d69abfdb6e0375981cfdda8eb45143f12c77d:

  drm/i915/gvt: Make DRM_I915_GVT depend on X86 (2022-01-13 18:13:12 +)

are available in the Git repository at:

  https://github.com/intel/gvt-linux.git tags/gvt-fixes-2022-07-11

for you to fetch changes up to e87197fbd137c888fd6c871c72fe7e89445dd015:

  drm/i915/gvt: IS_ERR() vs NULL bug in intel_gvt_update_reg_whitelist() 
(2022-07-11 13:05:05 +0800)


gvt-fixes-2022-07-11

- Fix return value for shmem_pin_map()


Dan Carpenter (1):
  drm/i915/gvt: IS_ERR() vs NULL bug in intel_gvt_update_reg_whitelist()

 drivers/gpu/drm/i915/gvt/cmd_parser.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)


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Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Apply waitboosting before fence wait (rev2)

[Karolina Drobnik]

On 09.07.2022 04:00, Patchwork wrote:

*Patch Details*
*Series:*   drm/i915: Apply waitboosting before fence wait (rev2)
*URL:*	https://patchwork.freedesktop.org/series/105925/ 


*State:*failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105925v2/index.html 




  CI Bug Log - changes from CI_DRM_11862_full -> Patchwork_105925v2_full


Summary

*FAILURE*

Serious unknown changes coming with Patchwork_105925v2_full absolutely 
need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_105925v2_full, please notify your bug team to 
allow them

to document this new failure mode, which will reduce false positives in CI.


Participating hosts (10 -> 13)

Additional (3): shard-rkl shard-dg1 shard-tglu


Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_105925v2_full:



  IGT changes


Possible regressions

  *

igt@i915_pm_rc6_residency@rc6-idle@vcs0:

  o shard-apl: PASS


-> WARN


  *

igt@kms_vblank@pipe-d-wait-forked-busy-hang:

  o shard-tglb: PASS


-> INCOMPLETE


+1 similar issue



These issues are unrelated to the patchset changes


Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *

igt@kms_cursor_crc@cursor-offscreen:

  o {shard-rkl}: NOTRUN -> SKIP


+1 similar issue
  *

{igt@kms_invalid_mode@clock-too-high@edp-1-pipe-d}:

  o shard-tglb: NOTRUN -> SKIP


+3 similar issues


New tests

New tests have been introduced between CI_DRM_11862_full and 
Patchwork_105925v2_full:



  New IGT tests (1)

  * igt@kms_legacy_colorkey@basic:
  o Statuses : 1 skip(s)
  o Exec time: [0.0] s


Known issues

Here are the changes found in Patchwork_105925v2_full that come from 
known issues:



  CI changes


Issues hit

  * boot:
  o shard-glk: (PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

,
PASS

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Apply waitboosting before fence wait (rev2)

[Karolina Drobnik]

On 08.07.2022 16:55, Patchwork wrote:

== Series Details ==

Series: drm/i915: Apply waitboosting before fence wait (rev2)
URL   : https://patchwork.freedesktop.org/series/105925/
State : warning

== Summary ==

Error: dim checkpatch failed
e35c61e9e46c drm/i915/gem: Look for waitboosting across the whole object prior 
to individual waits
85a4558b5d11 drm/i915: Bump GT idling delay to 2 jiffies
0ec610488c77 drm/i915/gt: Only kick the signal worker if there's been an update
-:23: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description 
(prefer a maximum 75 chars per line)
#23:
References: 047a1b877ed4 ("dma-buf & drm/amdgpu: remove dma_resv workaround")


Tags shouldn't be wrapped


-:23: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> 
("")' - ie: 'commit 047a1b877ed4 ("dma-buf & drm/amdgpu: remove dma_resv 
workaround")'
#23:
References: 047a1b877ed4 ("dma-buf & drm/amdgpu: remove dma_resv workaround")


"References:" line doesn't need "commit" keyword, it's a false positive


total: 1 errors, 1 warnings, 0 checks, 9 lines checked

Re: [Intel-gfx] [PATCH] drm/i915/gvt: Fix kernel-doc

[Zhenyu Wang]

On 2022.06.02 15:35:19 +0800, Jiapeng Chong wrote:
> Fix the following W=1 kernel warnings:
> 
> drivers/gpu/drm/i915/gvt/aperture_gm.c:308: warning: expecting prototype
> for inte_gvt_free_vgpu_resource(). Prototype was for
> intel_vgpu_free_resource() instead.
> 
> drivers/gpu/drm/i915/gvt/aperture_gm.c:344: warning: expecting prototype
> for intel_alloc_vgpu_resource(). Prototype was for
> intel_vgpu_alloc_resource() instead.
> 
> Reported-by: Abaci Robot 
> Signed-off-by: Jiapeng Chong 
> ---
>  drivers/gpu/drm/i915/gvt/aperture_gm.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c 
> b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> index 557f3314291a..3b81a6d35a7b 100644
> --- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
> +++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> @@ -298,7 +298,7 @@ static int alloc_resource(struct intel_vgpu *vgpu,
>  }
>  
>  /**
> - * inte_gvt_free_vgpu_resource - free HW resource owned by a vGPU
> + * intel_vgpu_free_resource() - free HW resource owned by a vGPU
>   * @vgpu: a vGPU
>   *
>   * This function is used to free the HW resource owned by a vGPU.
> @@ -328,7 +328,7 @@ void intel_vgpu_reset_resource(struct intel_vgpu *vgpu)
>  }
>  
>  /**
> - * intel_alloc_vgpu_resource - allocate HW resource for a vGPU
> + * intel_vgpu_alloc_resource() - allocate HW resource for a vGPU
>   * @vgpu: vGPU
>   * @param: vGPU creation params
>   *
> -- 
> 2.20.1.7.g153144c
> 

Acked-by: Zhenyu Wang 

Thanks!


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Re: [Intel-gfx] [PATCH 2/2] drm/i915/gvt: Fix kernel-doc

[Zhenyu Wang]

On 2022.05.24 16:37:32 +0800, Jiapeng Chong wrote:
> Fix the following W=1 kernel warnings:
> 
> drivers/gpu/drm/i915/gvt/mmio_context.c:560: warning: expecting
> prototype for intel_gvt_switch_render_mmio(). Prototype was for
> intel_gvt_switch_mmio() instead.
> 
> Reported-by: Abaci Robot 
> Signed-off-by: Jiapeng Chong 
> ---
>  drivers/gpu/drm/i915/gvt/mmio_context.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/mmio_context.c 
> b/drivers/gpu/drm/i915/gvt/mmio_context.c
> index c85bafe7539e..1c6e941c9666 100644
> --- a/drivers/gpu/drm/i915/gvt/mmio_context.c
> +++ b/drivers/gpu/drm/i915/gvt/mmio_context.c
> @@ -546,7 +546,7 @@ static void switch_mmio(struct intel_vgpu *pre,
>  }
>  
>  /**
> - * intel_gvt_switch_render_mmio - switch mmio context of specific engine
> + * intel_gvt_switch_mmio - switch mmio context of specific engine
>   * @pre: the last vGPU that own the engine
>   * @next: the vGPU to switch to
>   * @engine: the engine
> -- 
> 2.20.1.7.g153144c
> 

Acked-by: Zhenyu Wang 

Thanks!


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Re: [Intel-gfx] [PATCH 1/2] drm/i915/gvt: Fix kernel-doc

[Zhenyu Wang]

On 2022.05.24 16:37:33 +0800, Jiapeng Chong wrote:
> Fix the following W=1 kernel warnings:
> 
> drivers/gpu/drm/i915/gvt/handlers.c:3066: warning: expecting prototype
> for intel_t_default_mmio_write(). Prototype was for
> intel_vgpu_default_mmio_write() instead.
> 
> Reported-by: Abaci Robot 
> Signed-off-by: Jiapeng Chong 
> ---
>  drivers/gpu/drm/i915/gvt/handlers.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c 
> b/drivers/gpu/drm/i915/gvt/handlers.c
> index beea5895e499..9c8dde079cb4 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -3052,7 +3052,7 @@ int intel_vgpu_default_mmio_read(struct intel_vgpu 
> *vgpu, unsigned int offset,
>  }
>  
>  /**
> - * intel_t_default_mmio_write - default MMIO write handler
> + * intel_vgpu_default_mmio_write() - default MMIO write handler
>   * @vgpu: a vGPU
>   * @offset: access offset
>   * @p_data: write data buffer
> -- 
> 2.20.1.7.g153144c
> 

Sorry for late reply!

Acked-by: Zhenyu Wang 


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Re: [Intel-gfx] [PATCH] drm/i915/gvt: fix typo in comment

[Zhenyu Wang]

On 2022.05.21 13:10:59 +0200, Julia Lawall wrote:
> Spelling mistake (triple letters) in comment.
> Detected with the help of Coccinelle.
> 
> Signed-off-by: Julia Lawall 
> 
> ---
>  drivers/gpu/drm/i915/gvt/gtt.c |2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/gtt.c b/drivers/gpu/drm/i915/gvt/gtt.c
> index 9c5cc2800975..c919f14c4fcb 100644
> --- a/drivers/gpu/drm/i915/gvt/gtt.c
> +++ b/drivers/gpu/drm/i915/gvt/gtt.c
> @@ -2341,7 +2341,7 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu 
> *vgpu, unsigned int off,
>   gvt_vgpu_err("fail to populate guest ggtt entry\n");
>   /* guest driver may read/write the entry when partial
>* update the entry in this situation p2m will fail
> -  * settting the shadow entry to point to a scratch page
> +  * setting the shadow entry to point to a scratch page
>*/
>   ops->set_pfn(, gvt->gtt.scratch_mfn);
>   } else
> 

Sorry for late reply!

Acked-by: Zhenyu Wang 



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Re: [Intel-gfx] [PATCH] drm/i915/gvt: IS_ERR() vs NULL bug in intel_gvt_update_reg_whitelist()

[Zhenyu Wang]

On 2022.07.08 10:55:52 +0200, Andrzej Hajda wrote:
> On 08.07.2022 10:41, Dan Carpenter wrote:
> > The shmem_pin_map() function returns NULL, it doesn't return error
> > pointers.
> > 
> > Fixes: 97ea656521c8 ("drm/i915/gvt: Parse default state to update reg 
> > whitelist")
> > Signed-off-by: Dan Carpenter 
> 
> Reviewed-by: Andrzej Hajda 
> 

Acked-by: Zhenyu Wang 

Thanks! Will push to -fixes.

> 
> > ---
> >   drivers/gpu/drm/i915/gvt/cmd_parser.c | 6 +++---
> >   1 file changed, 3 insertions(+), 3 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c 
> > b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> > index b9eb75a2b400..1c35a41620ae 100644
> > --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> > +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> > @@ -3117,9 +3117,9 @@ void intel_gvt_update_reg_whitelist(struct intel_vgpu 
> > *vgpu)
> > continue;
> > vaddr = shmem_pin_map(engine->default_state);
> > -   if (IS_ERR(vaddr)) {
> > -   gvt_err("failed to map %s->default state, err:%zd\n",
> > -   engine->name, PTR_ERR(vaddr));
> > +   if (!vaddr) {
> > +   gvt_err("failed to map %s->default state\n",
> > +   engine->name);
> > return;
> > }
> 


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[Intel-gfx] linux-next: manual merge of the drm tree with the drm-misc-fixes tree

[Stephen Rothwell]

Hi all,

Today's linux-next merge of the drm tree got a conflict in:

  drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c

between commit:

  925b6e59138c ("Revert "drm/amdgpu: add drm buddy support to amdgpu"")

from the drm-misc-fixes tree and commit:

  5e3f1e7729ec ("drm/amdgpu: fix start calculation in amdgpu_vram_mgr_new")

from the drm tree.

This is a mess :-(  I have just reverted the above revert before mergin
the drm tree for today, please fix it up.

-- 
Cheers,
Stephen Rothwell


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Re: [Intel-gfx] [PATCH v4 2/2] drm/i915: Add lmem_bar_size modparam

[kernel test robot]

Hi,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]

url:
https://github.com/intel-lab-lkp/linux/commits/priyanka-dandamudi-intel-com/Add-support-for-LMEM-PCIe-resizable-bar/20220711-014151
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-a004 
(https://download.01.org/0day-ci/archive/20220711/202207110435.swciztli-...@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 
6ce63e267aab79ca87bf63453d34dd3909ab978d)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/intel-lab-lkp/linux/commit/d47a4cf71ae8f491be93278f21adfec16dc00d5c
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review 
priyanka-dandamudi-intel-com/Add-support-for-LMEM-PCIe-resizable-bar/20220711-014151
git checkout d47a4cf71ae8f491be93278f21adfec16dc00d5c
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/i915/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/gt/intel_region_lmem.c:76:45: warning: format specifies 
>> type 'unsigned long long' but the argument has type 'resource_size_t' (aka 
>> 'unsigned int') [-Wformat]
"setting it to default: 
%llu\n", lmem_size);

 ^

%u
   include/drm/drm_print.h:429:36: note: expanded from macro 'drm_info'
   __drm_printk((drm), info,, fmt, ##__VA_ARGS__)
  ~~~^~~
   include/drm/drm_print.h:425:48: note: expanded from macro '__drm_printk'
   dev_##level##type((drm)->dev, "[drm] " fmt, ##__VA_ARGS__)
  ~~~^~~
   include/linux/dev_printk.h:150:67: note: expanded from macro 'dev_info'
   dev_printk_index_wrap(_dev_info, KERN_INFO, dev, dev_fmt(fmt), 
##__VA_ARGS__)
~~~ 
^~~
   include/linux/dev_printk.h:110:23: note: expanded from macro 
'dev_printk_index_wrap'
   _p_func(dev, fmt, ##__VA_ARGS__);   \
~~~^~~
   drivers/gpu/drm/i915/gt/intel_region_lmem.c:93:44: warning: result of 
comparison of constant 4294967296 with expression of type 'resource_size_t' 
(aka 'unsigned int') is always false 
[-Wtautological-constant-out-of-range-compare]
   IORESOURCE_MEM_64) && 
root_res->start > 0x1ull)
 
~~~ ^ ~~
   2 warnings generated.


vim +76 drivers/gpu/drm/i915/gt/intel_region_lmem.c

46  
47  #define LMEM_BAR_NUM 2
48  static void i915_resize_lmem_bar(struct drm_i915_private *i915, 
resource_size_t lmem_size)
49  {
50  struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
51  struct pci_bus *root = pdev->bus;
52  struct resource *root_res;
53  resource_size_t rebar_size;
54  resource_size_t current_size;
55  u32 pci_cmd;
56  int i;
57  
58  current_size = roundup_pow_of_two(pci_resource_len(pdev, 
LMEM_BAR_NUM));
59  
60  if (i915->params.lmem_bar_size) {
61  u32 bar_sizes;
62  
63  rebar_size = i915->params.lmem_bar_size *
64  (resource_size_t)SZ_1M;
65  bar_sizes = pci_rebar_get_possible_sizes(pdev,
66   LMEM_BAR_NUM);
67  
68  if (rebar_size == current_size)
69  return;
70  
71  if (!(bar_sizes & 
BIT(pci_rebar_bytes_to_size(rebar_size))) ||
72  rebar_size >= roundup_pow_of_two(lmem_size)) {
73  rebar_size = lmem_size;
74  
75  drm_info(>drm, "Given bar size is 
not within supported size,"
  > 76   "setting it to 
default: %llu\n", lmem_size);
77  }
78  } else {
79  rebar_size = current_size;
80  
81  if (rebar_size != roundup_pow_of_two(lmem_size))
82   

Re: [Intel-gfx] [PATCH v4 2/2] drm/i915: Add lmem_bar_size modparam

[kernel test robot]

Hi,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on drm-tip/drm-tip]

url:
https://github.com/intel-lab-lkp/linux/commits/priyanka-dandamudi-intel-com/Add-support-for-LMEM-PCIe-resizable-bar/20220711-014151
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-defconfig 
(https://download.01.org/0day-ci/archive/20220711/202207110302.5acxv8ak-...@intel.com/config)
compiler: gcc-11 (Debian 11.3.0-3) 11.3.0
reproduce (this is a W=1 build):
# 
https://github.com/intel-lab-lkp/linux/commit/d47a4cf71ae8f491be93278f21adfec16dc00d5c
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review 
priyanka-dandamudi-intel-com/Add-support-for-LMEM-PCIe-resizable-bar/20220711-014151
git checkout d47a4cf71ae8f491be93278f21adfec16dc00d5c
# save the config file
mkdir build_dir && cp config build_dir/.config
make W=1 O=build_dir ARCH=i386 SHELL=/bin/bash

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot 

All errors (new ones prefixed by >>):

   In file included from include/linux/device.h:15,
from include/linux/pm_qos.h:17,
from drivers/gpu/drm/i915/i915_drv.h:35,
from drivers/gpu/drm/i915/gt/intel_region_lmem.c:6:
   drivers/gpu/drm/i915/gt/intel_region_lmem.c: In function 
'i915_resize_lmem_bar':
>> include/drm/drm_print.h:425:39: error: format '%llu' expects argument of 
>> type 'long long unsigned int', but argument 3 has type 'resource_size_t' 
>> {aka 'unsigned int'} [-Werror=format=]
 425 | dev_##level##type((drm)->dev, "[drm] " fmt, ##__VA_ARGS__)
 |   ^~~~
   include/linux/dev_printk.h:110:30: note: in definition of macro 
'dev_printk_index_wrap'
 110 | _p_func(dev, fmt, ##__VA_ARGS__);
   \
 |  ^~~
   include/linux/dev_printk.h:150:58: note: in expansion of macro 'dev_fmt'
 150 | dev_printk_index_wrap(_dev_info, KERN_INFO, dev, 
dev_fmt(fmt), ##__VA_ARGS__)
 |  ^~~
   include/drm/drm_print.h:425:9: note: in expansion of macro 'dev_info'
 425 | dev_##level##type((drm)->dev, "[drm] " fmt, ##__VA_ARGS__)
 | ^~~~
   include/drm/drm_print.h:429:9: note: in expansion of macro '__drm_printk'
 429 | __drm_printk((drm), info,, fmt, ##__VA_ARGS__)
 | ^~~~
   drivers/gpu/drm/i915/gt/intel_region_lmem.c:75:33: note: in expansion of 
macro 'drm_info'
  75 | drm_info(>drm, "Given bar size 
is not within supported size,"
 | ^~~~
   cc1: all warnings being treated as errors


vim +425 include/drm/drm_print.h

02c9656b2f0d69 Haneen Mohammed   2017-10-17  385  
02c9656b2f0d69 Haneen Mohammed   2017-10-17  386  /**
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  387   * DRM_DEV_DEBUG() - 
Debug output for generic drm code
02c9656b2f0d69 Haneen Mohammed   2017-10-17  388   *
306589856399e1 Douglas Anderson  2021-09-21  389   * NOTE: this is 
deprecated in favor of drm_dbg_core().
306589856399e1 Douglas Anderson  2021-09-21  390   *
091756bbb1a961 Haneen Mohammed   2017-10-17  391   * @dev: device pointer
091756bbb1a961 Haneen Mohammed   2017-10-17  392   * @fmt: printf() like 
format string.
02c9656b2f0d69 Haneen Mohammed   2017-10-17  393   */
db87086492581c Joe Perches   2018-03-16  394  #define 
DRM_DEV_DEBUG(dev, fmt, ...)  \
db87086492581c Joe Perches   2018-03-16  395drm_dev_dbg(dev, 
DRM_UT_CORE, fmt, ##__VA_ARGS__)
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  396  /**
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  397   * DRM_DEV_DEBUG_DRIVER() 
- Debug output for vendor specific part of the driver
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  398   *
306589856399e1 Douglas Anderson  2021-09-21  399   * NOTE: this is 
deprecated in favor of drm_dbg() or dev_dbg().
306589856399e1 Douglas Anderson  2021-09-21  400   *
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  401   * @dev: device pointer
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  402   * @fmt: printf() like 
format string.
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  403   */
db87086492581c Joe Perches   2018-03-16  404  #define 
DRM_DEV_DEBUG_DRIVER(dev, fmt, ...)   \
db87086492581c Joe Perches   2018-03-16  405drm_dev_dbg(dev, 
DRM_UT_DRIVER, fmt, ##__VA_ARGS__)
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  406  /**
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  407   * DRM_DEV_DEBUG_KMS() - 
Debug output for modesetting code
b52817e9de06a3 Mauro Carvalho Chehab 2020-10-27  408   *
306589856399e1 

Re: [Intel-gfx] [PATCH v4 1/2] drm/i915: Add support for LMEM PCIe resizable bar

[kernel test robot]

Hi,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]

url:
https://github.com/intel-lab-lkp/linux/commits/priyanka-dandamudi-intel-com/Add-support-for-LMEM-PCIe-resizable-bar/20220711-014151
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-a013 
(https://download.01.org/0day-ci/archive/20220711/202207110340.zwofgduu-...@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 
6ce63e267aab79ca87bf63453d34dd3909ab978d)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/intel-lab-lkp/linux/commit/fb47ead5e629b3718d85fb2fb960e77ebe61
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review 
priyanka-dandamudi-intel-com/Add-support-for-LMEM-PCIe-resizable-bar/20220711-014151
git checkout fb47ead5e629b3718d85fb2fb960e77ebe61
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/i915/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/gt/intel_region_lmem.c:70:44: warning: result of 
>> comparison of constant 4294967296 with expression of type 'resource_size_t' 
>> (aka 'unsigned int') is always false 
>> [-Wtautological-constant-out-of-range-compare]
   IORESOURCE_MEM_64) && 
root_res->start > 0x1ull)
 
~~~ ^ ~~
   1 warning generated.


vim +70 drivers/gpu/drm/i915/gt/intel_region_lmem.c

46  
47  #define LMEM_BAR_NUM 2
48  static void i915_resize_lmem_bar(struct drm_i915_private *i915, 
resource_size_t lmem_size)
49  {
50  struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
51  struct pci_bus *root = pdev->bus;
52  struct resource *root_res;
53  resource_size_t rebar_size;
54  u32 pci_cmd;
55  int i;
56  
57  rebar_size = roundup_pow_of_two(pci_resource_len(pdev, 
LMEM_BAR_NUM));
58  
59  if (rebar_size != roundup_pow_of_two(lmem_size))
60  rebar_size = lmem_size;
61  else
62  return;
63  
64  /* Find out if root bus contains 64bit memory addressing */
65  while (root->parent)
66  root = root->parent;
67  
68  pci_bus_for_each_resource(root, root_res, i) {
69  if (root_res && root_res->flags & (IORESOURCE_MEM |
  > 70  IORESOURCE_MEM_64) && 
root_res->start > 0x1ull)
71  break;
72  }
73  
74  /* pci_resize_resource will fail anyways */
75  if (!root_res) {
76  drm_info(>drm, "Can't resize LMEM BAR - platform 
support is missing\n");
77  return;
78  }
79  
80  /* First disable PCI memory decoding references */
81  pci_read_config_dword(pdev, PCI_COMMAND, _cmd);
82  pci_write_config_dword(pdev, PCI_COMMAND,
83 pci_cmd & ~PCI_COMMAND_MEMORY);
84  
85  _resize_bar(i915, LMEM_BAR_NUM, rebar_size);
86  
87  pci_assign_unassigned_bus_resources(pdev->bus);
88  pci_write_config_dword(pdev, PCI_COMMAND, pci_cmd);
89  }
90  

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp

Re: [Intel-gfx] [PATCH v4 1/2] drm/i915: Add support for LMEM PCIe resizable bar

[kernel test robot]

Hi,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]

url:
https://github.com/intel-lab-lkp/linux/commits/priyanka-dandamudi-intel-com/Add-support-for-LMEM-PCIe-resizable-bar/20220711-014151
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-a004 
(https://download.01.org/0day-ci/archive/20220711/202207110323.aqxxz1kk-...@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 
6ce63e267aab79ca87bf63453d34dd3909ab978d)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/intel-lab-lkp/linux/commit/fb47ead5e629b3718d85fb2fb960e77ebe61
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review 
priyanka-dandamudi-intel-com/Add-support-for-LMEM-PCIe-resizable-bar/20220711-014151
git checkout fb47ead5e629b3718d85fb2fb960e77ebe61
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/i915/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/gt/intel_region_lmem.c:70:44: warning: result of 
>> comparison of constant 4294967296 with expression of type 'resource_size_t' 
>> (aka 'unsigned int') is always false 
>> [-Wtautological-constant-out-of-range-compare]
   IORESOURCE_MEM_64) && 
root_res->start > 0x1ull)
 
~~~ ^ ~~
   1 warning generated.


vim +70 drivers/gpu/drm/i915/gt/intel_region_lmem.c

46  
47  #define LMEM_BAR_NUM 2
48  static void i915_resize_lmem_bar(struct drm_i915_private *i915, 
resource_size_t lmem_size)
49  {
50  struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
51  struct pci_bus *root = pdev->bus;
52  struct resource *root_res;
53  resource_size_t rebar_size;
54  u32 pci_cmd;
55  int i;
56  
57  rebar_size = roundup_pow_of_two(pci_resource_len(pdev, 
LMEM_BAR_NUM));
58  
59  if (rebar_size != roundup_pow_of_two(lmem_size))
60  rebar_size = lmem_size;
61  else
62  return;
63  
64  /* Find out if root bus contains 64bit memory addressing */
65  while (root->parent)
66  root = root->parent;
67  
68  pci_bus_for_each_resource(root, root_res, i) {
69  if (root_res && root_res->flags & (IORESOURCE_MEM |
  > 70  IORESOURCE_MEM_64) && 
root_res->start > 0x1ull)
71  break;
72  }
73  
74  /* pci_resize_resource will fail anyways */
75  if (!root_res) {
76  drm_info(>drm, "Can't resize LMEM BAR - platform 
support is missing\n");
77  return;
78  }
79  
80  /* First disable PCI memory decoding references */
81  pci_read_config_dword(pdev, PCI_COMMAND, _cmd);
82  pci_write_config_dword(pdev, PCI_COMMAND,
83 pci_cmd & ~PCI_COMMAND_MEMORY);
84  
85  _resize_bar(i915, LMEM_BAR_NUM, rebar_size);
86  
87  pci_assign_unassigned_bus_resources(pdev->bus);
88  pci_write_config_dword(pdev, PCI_COMMAND, pci_cmd);
89  }
90  

-- 
0-DAY CI Kernel Test Service
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[Intel-gfx] ✗ Fi.CI.IGT: failure for Add support for LMEM PCIe resizable bar

[Patchwork]

== Series Details ==

Series: Add support for LMEM PCIe resizable bar
URL   : https://patchwork.freedesktop.org/series/106160/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11862_full -> Patchwork_106160v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_106160v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_106160v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 13)
--

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106160v1_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_invalid_mode@clock-too-high@edp-1-pipe-d:
- shard-tglb: NOTRUN -> [SKIP][1] +3 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-tglb7/igt@kms_invalid_mode@clock-too-h...@edp-1-pipe-d.html

  
Known issues


  Here are the changes found in Patchwork_106160v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_ctx_persistence@engines-hostile-preempt:
- shard-snb:  NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#1099])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-snb5/igt@gem_ctx_persiste...@engines-hostile-preempt.html

  * igt@gem_ctx_persistence@hostile:
- shard-tglb: NOTRUN -> [FAIL][3] ([i915#2410])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-tglb7/igt@gem_ctx_persiste...@hostile.html

  * igt@gem_exec_balancer@parallel-balancer:
- shard-snb:  NOTRUN -> [SKIP][4] ([fdo#109271]) +18 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-snb5/igt@gem_exec_balan...@parallel-balancer.html

  * igt@gem_exec_balancer@parallel-contexts:
- shard-iclb: [PASS][5] -> [SKIP][6] ([i915#4525])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-iclb4/igt@gem_exec_balan...@parallel-contexts.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-iclb6/igt@gem_exec_balan...@parallel-contexts.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk:  NOTRUN -> [FAIL][7] ([i915#2842])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-glk1/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-kbl:  [PASS][8] -> [FAIL][9] ([i915#2842]) +1 similar issue
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-kbl7/igt@gem_exec_fair@basic-p...@rcs0.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-kbl6/igt@gem_exec_fair@basic-p...@rcs0.html
- shard-glk:  [PASS][10] -> [FAIL][11] ([i915#2842])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-glk9/igt@gem_exec_fair@basic-p...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-glk5/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_whisper@basic-queues-priority-all:
- shard-glk:  [PASS][12] -> [DMESG-WARN][13] ([i915#118])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-glk2/igt@gem_exec_whis...@basic-queues-priority-all.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-glk8/igt@gem_exec_whis...@basic-queues-priority-all.html

  * igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][14] -> [SKIP][15] ([i915#2190])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/shard-tglb8/igt@gem_huc_c...@huc-copy.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-tglb7/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@verify:
- shard-kbl:  NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613]) +1 
similar issue
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-kbl6/igt@gem_lmem_swapp...@verify.html

  * igt@gem_lmem_swapping@verify-ccs:
- shard-skl:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#4613]) +2 
similar issues
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-skl6/igt@gem_lmem_swapp...@verify-ccs.html

  * igt@gem_pxp@create-regular-context-1:
- shard-tglb: NOTRUN -> [SKIP][18] ([i915#4270])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/shard-tglb7/igt@gem_...@create-regular-context-1.html

  * igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
- shard-skl:  NOTRUN -> [SKIP][19] ([fdo#109271]) +143 similar 
issues
   [19]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for Add support for LMEM PCIe resizable bar

[Patchwork]

== Series Details ==

Series: Add support for LMEM PCIe resizable bar
URL   : https://patchwork.freedesktop.org/series/106160/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11862 -> Patchwork_106160v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/index.html

Participating hosts (45 -> 42)
--

  Additional (1): bat-dg2-9 
  Missing(4): fi-ctg-p8600 fi-cml-u2 fi-icl-u2 fi-hsw-4200u 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106160v1:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@migrate:
- {bat-adln-1}:   NOTRUN -> [DMESG-FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/bat-adln-1/igt@i915_selftest@l...@migrate.html

  
Known issues


  Here are the changes found in Patchwork_106160v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_busy@basic@flip:
- bat-adlp-4: [PASS][2] -> [DMESG-WARN][3] ([i915#3576])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/bat-adlp-4/igt@kms_busy@ba...@flip.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/bat-adlp-4/igt@kms_busy@ba...@flip.html

  * 
igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka:   [PASS][4] -> [FAIL][5] ([i915#6298])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html

  
 Possible fixes 

  * igt@i915_module_load@reload:
- {bat-adln-1}:   [DMESG-WARN][6] ([i915#6297]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/bat-adln-1/igt@i915_module_l...@reload.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/bat-adln-1/igt@i915_module_l...@reload.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg1-6:  [DMESG-FAIL][8] ([i915#4494] / [i915#4957]) -> 
[PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/bat-dg1-6/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_flip@basic-flip-vs-modeset@a-edp1:
- bat-adlp-4: [DMESG-WARN][10] ([i915#3576]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/bat-adlp-4/igt@kms_flip@basic-flip-vs-mode...@a-edp1.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/bat-adlp-4/igt@kms_flip@basic-flip-vs-mode...@a-edp1.html

  * igt@kms_flip@basic-flip-vs-modeset@b-edp1:
- {bat-adlp-6}:   [DMESG-WARN][12] ([i915#3576]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/bat-adlp-6/igt@kms_flip@basic-flip-vs-mode...@b-edp1.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/bat-adlp-6/igt@kms_flip@basic-flip-vs-mode...@b-edp1.html

  * igt@vgem_basic@setversion:
- fi-kbl-soraka:  [INCOMPLETE][14] -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11862/fi-kbl-soraka/igt@vgem_ba...@setversion.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106160v1/fi-kbl-soraka/igt@vgem_ba...@setversion.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: 

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for LMEM PCIe resizable bar

[Patchwork]

== Series Details ==

Series: Add support for LMEM PCIe resizable bar
URL   : https://patchwork.freedesktop.org/series/106160/
State : warning

== Summary ==

Error: dim checkpatch failed
f56a085e66b5 drm/i915: Add support for LMEM PCIe resizable bar
d4d1f141dc3c drm/i915: Add lmem_bar_size modparam
-:55: WARNING:SUSPECT_CODE_INDENT: suspect code indent for conditional 
statements (16, 32)
#55: FILE: drivers/gpu/drm/i915/gt/intel_region_lmem.c:71:
+   if (!(bar_sizes & BIT(pci_rebar_bytes_to_size(rebar_size))) ||
[...]
+   rebar_size = lmem_size;

total: 0 errors, 1 warnings, 0 checks, 58 lines checked

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add support for LMEM PCIe resizable bar

[Patchwork]

== Series Details ==

Series: Add support for LMEM PCIe resizable bar
URL   : https://patchwork.freedesktop.org/series/106160/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] [PATCH v4 1/2] drm/i915: Add support for LMEM PCIe resizable bar

[priyanka . dandamudi]

From: Akeem G Abodunrin 

Add support for the local memory PICe resizable bar, so that
local memory can be resized to the maximum size supported by the device,
and mapped correctly to the PCIe memory bar. It is usual that GPU
devices expose only 256MB BARs primarily to be compatible with 32-bit
systems. So, those devices cannot claim larger memory BAR windows size due
to the system BIOS limitation. With this change, it would be possible to
reprogram the windows of the bridge directly above the requesting device
on the same BAR type.

v2:Moved code to gt/intel_region_lmem.c and used only
single underscore for function names.(Jani)

v3: Optimised code.

Signed-off-by: Akeem G Abodunrin 
Signed-off-by: Michał Winiarski 
Cc: Stuart Summers 
Cc: Michael J Ruhl 
Cc: Prathap Kumar Valsan 
Cc: Jani Nikula 
Signed-off-by: Priyanka Dandamudi 
Reviewed-by: Matthew Auld 
---
 drivers/gpu/drm/i915/gt/intel_region_lmem.c | 75 +
 1 file changed, 75 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c 
b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index fa7b86f83e7b..129e5d8b080d 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -15,6 +15,79 @@
 #include "gt/intel_gt_mcr.h"
 #include "gt/intel_gt_regs.h"
 
+static void _release_bars(struct pci_dev *pdev)
+{
+   int resno;
+
+   for (resno = PCI_STD_RESOURCES; resno < PCI_STD_RESOURCE_END; resno++) {
+   if (pci_resource_len(pdev, resno))
+   pci_release_resource(pdev, resno);
+   }
+}
+
+static void
+_resize_bar(struct drm_i915_private *i915, int resno, resource_size_t size)
+{
+   struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+   int bar_size = pci_rebar_bytes_to_size(size);
+   int ret;
+
+   _release_bars(pdev);
+
+   ret = pci_resize_resource(pdev, resno, bar_size);
+   if (ret) {
+   drm_info(>drm, "Failed to resize BAR%d to %dM (%pe)\n",
+resno, 1 << bar_size, ERR_PTR(ret));
+   return;
+   }
+
+   drm_info(>drm, "BAR%d resized to %dM\n", resno, 1 << bar_size);
+}
+
+#define LMEM_BAR_NUM 2
+static void i915_resize_lmem_bar(struct drm_i915_private *i915, 
resource_size_t lmem_size)
+{
+   struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
+   struct pci_bus *root = pdev->bus;
+   struct resource *root_res;
+   resource_size_t rebar_size;
+   u32 pci_cmd;
+   int i;
+
+   rebar_size = roundup_pow_of_two(pci_resource_len(pdev, LMEM_BAR_NUM));
+
+   if (rebar_size != roundup_pow_of_two(lmem_size))
+   rebar_size = lmem_size;
+   else
+   return;
+
+   /* Find out if root bus contains 64bit memory addressing */
+   while (root->parent)
+   root = root->parent;
+
+   pci_bus_for_each_resource(root, root_res, i) {
+   if (root_res && root_res->flags & (IORESOURCE_MEM |
+   IORESOURCE_MEM_64) && root_res->start > 
0x1ull)
+   break;
+   }
+
+   /* pci_resize_resource will fail anyways */
+   if (!root_res) {
+   drm_info(>drm, "Can't resize LMEM BAR - platform support 
is missing\n");
+   return;
+   }
+
+   /* First disable PCI memory decoding references */
+   pci_read_config_dword(pdev, PCI_COMMAND, _cmd);
+   pci_write_config_dword(pdev, PCI_COMMAND,
+  pci_cmd & ~PCI_COMMAND_MEMORY);
+
+   _resize_bar(i915, LMEM_BAR_NUM, rebar_size);
+
+   pci_assign_unassigned_bus_resources(pdev->bus);
+   pci_write_config_dword(pdev, PCI_COMMAND, pci_cmd);
+}
+
 static int
 region_lmem_release(struct intel_memory_region *mem)
 {
@@ -128,6 +201,8 @@ static struct intel_memory_region *setup_lmem(struct 
intel_gt *gt)
lmem_size = intel_uncore_read64(>uncore, GEN12_GSMBASE);
}
 
+   i915_resize_lmem_bar(i915, lmem_size);
+
if (i915->params.lmem_size > 0) {
lmem_size = min_t(resource_size_t, lmem_size,
  mul_u32_u32(i915->params.lmem_size, SZ_1M));
-- 
2.27.0

[Intel-gfx] [PATCH v4 2/2] drm/i915: Add lmem_bar_size modparam

[priyanka . dandamudi]

From: Priyanka Dandamudi 

For testing purposes, support forcing the lmem_bar_size through a new
modparam. In CI we only have a limited number of configurations for DG2,
but we still need to be reasonably sure we get a usable device (also
verifying we report the correct values for things like
probed_cpu_visible_size etc) with all the potential lmem_bar sizes that
we might expect see in the wild.

v2: Update commit message and a minor modification.(Matt)

v3: Optimised lmem bar size code and modified code to resize
bar maximum upto lmem_size instead of maximum supported size.(Nirmoy)

v4: Optimised lmem bar size code.(Nirmoy)

Cc: Matthew Auld 
Cc: Nirmoy Das 

Signed-off-by: Priyanka Dandamudi 
---
 drivers/gpu/drm/i915/gt/intel_region_lmem.c | 33 +
 drivers/gpu/drm/i915/i915_params.c  |  2 ++
 drivers/gpu/drm/i915/i915_params.h  |  1 +
 3 files changed, 31 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c 
b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
index 129e5d8b080d..22dbf986217c 100644
--- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c
+++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c
@@ -51,15 +51,38 @@ static void i915_resize_lmem_bar(struct drm_i915_private 
*i915, resource_size_t
struct pci_bus *root = pdev->bus;
struct resource *root_res;
resource_size_t rebar_size;
+   resource_size_t current_size;
u32 pci_cmd;
int i;
 
-   rebar_size = roundup_pow_of_two(pci_resource_len(pdev, LMEM_BAR_NUM));
+   current_size = roundup_pow_of_two(pci_resource_len(pdev, LMEM_BAR_NUM));
 
-   if (rebar_size != roundup_pow_of_two(lmem_size))
-   rebar_size = lmem_size;
-   else
-   return;
+   if (i915->params.lmem_bar_size) {
+   u32 bar_sizes;
+
+   rebar_size = i915->params.lmem_bar_size *
+   (resource_size_t)SZ_1M;
+   bar_sizes = pci_rebar_get_possible_sizes(pdev,
+LMEM_BAR_NUM);
+
+   if (rebar_size == current_size)
+   return;
+
+   if (!(bar_sizes & BIT(pci_rebar_bytes_to_size(rebar_size))) ||
+   rebar_size >= roundup_pow_of_two(lmem_size)) {
+   rebar_size = lmem_size;
+
+   drm_info(>drm, "Given bar size is not 
within supported size,"
+"setting it to default: 
%llu\n", lmem_size);
+   }
+   } else {
+   rebar_size = current_size;
+
+   if (rebar_size != roundup_pow_of_two(lmem_size))
+   rebar_size = lmem_size;
+   else
+   return;
+   }
 
/* Find out if root bus contains 64bit memory addressing */
while (root->parent)
diff --git a/drivers/gpu/drm/i915/i915_params.c 
b/drivers/gpu/drm/i915/i915_params.c
index 701fbc98afa0..6fc475a5db61 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -204,6 +204,8 @@ i915_param_named_unsafe(request_timeout_ms, uint, 0600,
 
 i915_param_named_unsafe(lmem_size, uint, 0400,
"Set the lmem size(in MiB) for each region. (default: 
0, all memory)");
+i915_param_named_unsafe(lmem_bar_size, uint, 0400,
+   "Set the lmem bar size(in MiB).");
 
 static __always_inline void _print_param(struct drm_printer *p,
 const char *name,
diff --git a/drivers/gpu/drm/i915/i915_params.h 
b/drivers/gpu/drm/i915/i915_params.h
index b5e7ea45d191..2733cb6cfe09 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -74,6 +74,7 @@ struct drm_printer;
param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE, 0400) \
param(unsigned int, request_timeout_ms, 
CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
param(unsigned int, lmem_size, 0, 0400) \
+   param(unsigned int, lmem_bar_size, 0, 0400) \
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, load_detect_test, false, 0600) \
-- 
2.27.0

[Intel-gfx] [PATCH v4 0/2] Add support for LMEM PCIe resizable bar

[priyanka . dandamudi]

From: Priyanka Dandamudi 

Added support to resize the bar to maximum supported.
Also, added new modparam lmem_bar_size which can resize the bar to one of the 
supported sizes.

Akeem G Abodunrin (1):
  drm/i915: Add support for LMEM PCIe resizable bar

Priyanka Dandamudi (1):
  drm/i915: Add lmem_bar_size modparam

 drivers/gpu/drm/i915/gt/intel_region_lmem.c | 98 +
 drivers/gpu/drm/i915/i915_params.c  |  2 +
 drivers/gpu/drm/i915/i915_params.h  |  1 +
 3 files changed, 101 insertions(+)

-- 
2.27.0