[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: support v69 in parallel to v70

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915/guc: support v69 in parallel to v70
URL   : https://patchwork.freedesktop.org/series/106406/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11900_full -> Patchwork_106406v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_106406v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_106406v1_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (12 -> 12)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106406v1_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@torture-move@pipe-b:
- shard-skl:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl2/igt@kms_cursor_legacy@torture-m...@pipe-b.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-skl3/igt@kms_cursor_legacy@torture-m...@pipe-b.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-iclb: [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-iclb1/igt@kms_frontbuffer_track...@fbc-suspend.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-iclb4/igt@kms_frontbuffer_track...@fbc-suspend.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_ctx_persistence@many-contexts:
- {shard-rkl}:[PASS][5] -> [TIMEOUT][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-rkl-5/igt@gem_ctx_persiste...@many-contexts.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-rkl-6/igt@gem_ctx_persiste...@many-contexts.html

  
Known issues


  Here are the changes found in Patchwork_106406v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_create@create-massive:
- shard-apl:  NOTRUN -> [DMESG-WARN][7] ([i915#4991])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-apl3/igt@gem_cre...@create-massive.html

  * igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#6268])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-tglb7/igt@gem_ctx_e...@basic-nohangcheck.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-tglb5/igt@gem_ctx_e...@basic-nohangcheck.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][10] -> [FAIL][11] ([i915#2842])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-iclb8/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-iclb2/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk:  [PASS][12] -> [FAIL][13] ([i915#2842])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-glk2/igt@gem_exec_fair@basic-p...@rcs0.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-glk5/igt@gem_exec_fair@basic-p...@rcs0.html
- shard-kbl:  [PASS][14] -> [FAIL][15] ([i915#2842]) +1 similar 
issue
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-kbl6/igt@gem_exec_fair@basic-p...@rcs0.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-kbl4/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_lmem_swapping@basic:
- shard-glk:  NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-glk5/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-multi:
- shard-skl:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#4613]) +1 
similar issue
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-skl1/igt@gem_lmem_swapp...@parallel-multi.html

  * igt@gem_lmem_swapping@parallel-random-verify:
- shard-kbl:  NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-kbl7/igt@gem_lmem_swapp...@parallel-random-verify.html

  * igt@gem_lmem_swapping@verify:
- shard-apl:  NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4613]) +3 
similar issues
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/shard-apl1/igt@gem_lmem_swapp...@verify.html

  * igt@gen3_render_tiledy_blits:
- shard-skl:  NOTRUN -> [SKIP][20] ([fdo#109271]) +101 similar 
issues
   [20]: 

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: More VBT stuff

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915: More VBT stuff
URL   : https://patchwork.freedesktop.org/series/106399/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11900_full -> Patchwork_106399v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 12)
--

  No changes in participating hosts

Known issues


  Here are the changes found in Patchwork_106399v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@gem_create@create-massive:
- shard-apl:  NOTRUN -> [DMESG-WARN][1] ([i915#4991])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-apl7/igt@gem_cre...@create-massive.html

  * igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [PASS][2] -> [FAIL][3] ([i915#6268])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-tglb7/igt@gem_ctx_e...@basic-nohangcheck.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-tglb8/igt@gem_ctx_e...@basic-nohangcheck.html

  * igt@gem_ctx_isolation@preservation-s3@vcs0:
- shard-kbl:  [PASS][4] -> [DMESG-WARN][5] ([i915#180]) +9 similar 
issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-kbl4/igt@gem_ctx_isolation@preservation...@vcs0.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-kbl7/igt@gem_ctx_isolation@preservation...@vcs0.html

  * igt@gem_ctx_persistence@engines-hang@bcs0:
- shard-skl:  NOTRUN -> [SKIP][6] ([fdo#109271]) +80 similar issues
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-skl10/igt@gem_ctx_persistence@engines-h...@bcs0.html

  * igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [PASS][7] -> [SKIP][8] ([i915#4525])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-iclb2/igt@gem_exec_balan...@parallel-bb-first.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-iclb3/igt@gem_exec_balan...@parallel-bb-first.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-kbl:  [PASS][9] -> [FAIL][10] ([i915#2842])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-kbl6/igt@gem_exec_fair@basic-pace-s...@rcs0.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-kbl6/igt@gem_exec_fair@basic-pace-s...@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
- shard-glk:  [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-glk2/igt@gem_exec_fair@basic-p...@rcs0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-glk5/igt@gem_exec_fair@basic-p...@rcs0.html
- shard-iclb: [PASS][13] -> [FAIL][14] ([i915#2842])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-iclb6/igt@gem_exec_fair@basic-p...@rcs0.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-iclb2/igt@gem_exec_fair@basic-p...@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
- shard-iclb: NOTRUN -> [FAIL][15] ([i915#2842])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-iclb2/igt@gem_exec_fair@basic-p...@vcs1.html

  * igt@gem_lmem_swapping@parallel-random-verify:
- shard-kbl:  NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#4613])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-kbl7/igt@gem_lmem_swapp...@parallel-random-verify.html

  * igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-skl:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#4613]) +1 
similar issue
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-skl10/igt@gem_lmem_swapp...@parallel-random-verify-ccs.html

  * igt@gem_lmem_swapping@verify:
- shard-apl:  NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) +2 
similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-apl6/igt@gem_lmem_swapp...@verify.html

  * igt@i915_pm_dc@dc6-dpms:
- shard-kbl:  NOTRUN -> [FAIL][19] ([i915#454])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-kbl7/igt@i915_pm...@dc6-dpms.html

  * igt@i915_suspend@fence-restore-untiled:
- shard-skl:  [PASS][20] -> [INCOMPLETE][21] ([i915#4817] / 
[i915#4939])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl4/igt@i915_susp...@fence-restore-untiled.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/shard-skl7/igt@i915_susp...@fence-restore-untiled.html

  * igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
- shard-kbl:  NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#3886]) +3 
similar issues
   [22]: 

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/guc: Check for ct enabled while waiting for response (rev2)

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915/guc: Check for ct enabled while waiting for response (rev2)
URL   : https://patchwork.freedesktop.org/series/105258/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11900_full -> Patchwork_105258v2_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_105258v2_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_105258v2_full, please notify your bug team to allow 
them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (12 -> 12)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105258v2_full:

### IGT changes ###

 Possible regressions 

  * igt@i915_pm_rpm@i2c:
- shard-iclb: [PASS][1] -> [SKIP][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-iclb3/igt@i915_pm_...@i2c.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/shard-iclb1/igt@i915_pm_...@i2c.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_ctx_persistence@many-contexts:
- {shard-rkl}:[PASS][3] -> [TIMEOUT][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-rkl-5/igt@gem_ctx_persiste...@many-contexts.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/shard-rkl-6/igt@gem_ctx_persiste...@many-contexts.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- {shard-rkl}:NOTRUN -> [INCOMPLETE][5]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/shard-rkl-6/igt@kms_rotation_...@primary-y-tiled-reflect-x-90.html

  
Known issues


  Here are the changes found in Patchwork_105258v2_full that come from known 
issues:

### CI changes ###

 Issues hit 

  * boot:
- shard-skl:  ([PASS][6], [PASS][7], [PASS][8], [PASS][9], 
[PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], 
[PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], 
[PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27]) -> 
([PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], 
[PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [FAIL][39], 
[PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], 
[PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50]) ([i915#5032])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl3/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl10/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl10/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl10/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl1/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl1/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl1/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl9/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl2/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl2/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl9/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl9/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl7/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl7/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl7/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl6/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl6/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl5/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl4/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl4/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl4/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/shard-skl2/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/shard-skl9/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/shard-skl9/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/shard-skl9/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/shard-skl7/boot.html
   [32]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: support v69 in parallel to v70

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915/guc: support v69 in parallel to v70
URL   : https://patchwork.freedesktop.org/series/106406/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11900 -> Patchwork_106406v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/index.html

Participating hosts (43 -> 41)
--

  Additional (2): fi-rkl-11600 bat-jsl-3 
  Missing(4): fi-bxt-dsi bat-dg2-9 fi-cfl-guc fi-pnv-d510 

Known issues


  Here are the changes found in Patchwork_106406v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_huc_copy@huc-copy:
- fi-rkl-11600:   NOTRUN -> [SKIP][1] ([i915#2190])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@gem_lmem_swapp...@basic.html

  * igt@gem_tiled_pread_basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][3] ([i915#3282])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600:   NOTRUN -> [SKIP][4] ([i915#3012])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[PASS][5] -> [INCOMPLETE][6] ([i915#4785])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600:   NOTRUN -> [INCOMPLETE][7] ([i915#5982])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-snb-2600:NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-snb-2600/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-edid-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][9] ([fdo#111827]) +7 similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@kms_chamel...@hdmi-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600:   NOTRUN -> [SKIP][10] ([i915#4103])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor.html

  * 
igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
- fi-bsw-kefka:   [PASS][11] -> [FAIL][12] ([i915#6298])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cur...@atomic-transitions-varying-size.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600:   NOTRUN -> [SKIP][13] ([fdo#109285] / [i915#4098])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_psr@primary_page_flip:
- fi-rkl-11600:   NOTRUN -> [SKIP][14] ([i915#1072]) +3 similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@kms_psr@primary_page_flip.html

  * igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600:   NOTRUN -> [SKIP][15] ([i915#3555] / [i915#4098])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][16] ([fdo#109295] / [i915#3291] / 
[i915#3708]) +2 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@prime_v...@basic-read.html

  * igt@prime_vgem@basic-userptr:
- fi-rkl-11600:   NOTRUN -> [SKIP][17] ([fdo#109295] / [i915#3301] / 
[i915#3708])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-rkl-11600/igt@prime_v...@basic-userptr.html

  * igt@runner@aborted:
- fi-hsw-4770:NOTRUN -> [FAIL][18] ([fdo#109271] / [i915#4312] / 
[i915#5594] / [i915#6246])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106406v1/fi-hsw-4770/igt@run...@aborted.html

  
 Possible fixes 

  * igt@gem_exec_suspend@basic-s0@smem:
- 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/guc: support v69 in parallel to v70

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915/guc: support v69 in parallel to v70
URL   : https://patchwork.freedesktop.org/series/106406/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.




[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: support v69 in parallel to v70

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915/guc: support v69 in parallel to v70
URL   : https://patchwork.freedesktop.org/series/106406/
State : warning

== Summary ==

Error: dim checkpatch failed
ef841c4deadb drm/i915/guc: support v69 in parallel to v70
-:391: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#391: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:2161:
+static int __guc_action_register_multi_lrc_v69(struct intel_guc *guc,
   struct intel_context *ce,

-:731: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in 
parentheses
#731: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:73:
+#define INTEL_GUC_FIRMWARE_DEFS_FALLBACK(fw_def, guc_def) \
+   fw_def(ALDERLAKE_P,  0, guc_def(adlp, 69, 0, 3)) \
+   fw_def(ALDERLAKE_S,  0, guc_def(tgl,  69, 0, 3)) \
+   fw_def(DG1,  0, guc_def(dg1,  69, 0, 3)) \
+   fw_def(ROCKETLAKE,   0, guc_def(tgl,  69, 0, 3)) \
+   fw_def(TIGERLAKE,0, guc_def(tgl,  69, 0, 3)) \
+   fw_def(JASPERLAKE,   0, guc_def(ehl,  69, 0, 3)) \
+   fw_def(ELKHARTLAKE,  0, guc_def(ehl,  69, 0, 3)) \
+   fw_def(ICELAKE,  0, guc_def(icl,  69, 0, 3)) \
+   fw_def(COMETLAKE,5, guc_def(cml,  69, 0, 3)) \
+   fw_def(COMETLAKE,0, guc_def(kbl,  69, 0, 3)) \
+   fw_def(COFFEELAKE,   0, guc_def(kbl,  69, 0, 3)) \
+   fw_def(GEMINILAKE,   0, guc_def(glk,  69, 0, 3)) \
+   fw_def(KABYLAKE, 0, guc_def(kbl,  69, 0, 3)) \
+   fw_def(BROXTON,  0, guc_def(bxt,  69, 0, 3)) \
+   fw_def(SKYLAKE,  0, guc_def(skl,  69, 0, 3))

-:731: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'fw_def' - possible 
side-effects?
#731: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:73:
+#define INTEL_GUC_FIRMWARE_DEFS_FALLBACK(fw_def, guc_def) \
+   fw_def(ALDERLAKE_P,  0, guc_def(adlp, 69, 0, 3)) \
+   fw_def(ALDERLAKE_S,  0, guc_def(tgl,  69, 0, 3)) \
+   fw_def(DG1,  0, guc_def(dg1,  69, 0, 3)) \
+   fw_def(ROCKETLAKE,   0, guc_def(tgl,  69, 0, 3)) \
+   fw_def(TIGERLAKE,0, guc_def(tgl,  69, 0, 3)) \
+   fw_def(JASPERLAKE,   0, guc_def(ehl,  69, 0, 3)) \
+   fw_def(ELKHARTLAKE,  0, guc_def(ehl,  69, 0, 3)) \
+   fw_def(ICELAKE,  0, guc_def(icl,  69, 0, 3)) \
+   fw_def(COMETLAKE,5, guc_def(cml,  69, 0, 3)) \
+   fw_def(COMETLAKE,0, guc_def(kbl,  69, 0, 3)) \
+   fw_def(COFFEELAKE,   0, guc_def(kbl,  69, 0, 3)) \
+   fw_def(GEMINILAKE,   0, guc_def(glk,  69, 0, 3)) \
+   fw_def(KABYLAKE, 0, guc_def(kbl,  69, 0, 3)) \
+   fw_def(BROXTON,  0, guc_def(bxt,  69, 0, 3)) \
+   fw_def(SKYLAKE,  0, guc_def(skl,  69, 0, 3))

-:731: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'guc_def' - possible 
side-effects?
#731: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:73:
+#define INTEL_GUC_FIRMWARE_DEFS_FALLBACK(fw_def, guc_def) \
+   fw_def(ALDERLAKE_P,  0, guc_def(adlp, 69, 0, 3)) \
+   fw_def(ALDERLAKE_S,  0, guc_def(tgl,  69, 0, 3)) \
+   fw_def(DG1,  0, guc_def(dg1,  69, 0, 3)) \
+   fw_def(ROCKETLAKE,   0, guc_def(tgl,  69, 0, 3)) \
+   fw_def(TIGERLAKE,0, guc_def(tgl,  69, 0, 3)) \
+   fw_def(JASPERLAKE,   0, guc_def(ehl,  69, 0, 3)) \
+   fw_def(ELKHARTLAKE,  0, guc_def(ehl,  69, 0, 3)) \
+   fw_def(ICELAKE,  0, guc_def(icl,  69, 0, 3)) \
+   fw_def(COMETLAKE,5, guc_def(cml,  69, 0, 3)) \
+   fw_def(COMETLAKE,0, guc_def(kbl,  69, 0, 3)) \
+   fw_def(COFFEELAKE,   0, guc_def(kbl,  69, 0, 3)) \
+   fw_def(GEMINILAKE,   0, guc_def(glk,  69, 0, 3)) \
+   fw_def(KABYLAKE, 0, guc_def(kbl,  69, 0, 3)) \
+   fw_def(BROXTON,  0, guc_def(bxt,  69, 0, 3)) \
+   fw_def(SKYLAKE,  0, guc_def(skl,  69, 0, 3))

-:787: WARNING:LINE_SPACING: Missing a blank line after declarations
#787: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:217:
+   const struct uc_fw_blob *blob = [i].blob;
+   uc_fw->fallback.path = blob->path;

-:806: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#806: FILE: drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c:457:
+   drm_warn(>drm, "%s firmware %s not found, falling 
back to %s\n",
+intel_uc_fw_type_repr(uc_fw->type),

total: 1 errors, 1 warnings, 4 checks, 764 lines checked




[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: More VBT stuff

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915: More VBT stuff
URL   : https://patchwork.freedesktop.org/series/106399/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11900 -> Patchwork_106399v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/index.html

Participating hosts (43 -> 41)
--

  Additional (2): fi-rkl-11600 bat-jsl-3 
  Missing(4): fi-hsw-4770 fi-bxt-dsi fi-icl-u2 fi-cfl-guc 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_106399v1:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3:
- {bat-dg2-9}:[DMESG-WARN][1] ([i915#5763]) -> [FAIL][2] +2 similar 
issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-3.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-dp-3.html

  
Known issues


  Here are the changes found in Patchwork_106399v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_huc_copy@huc-copy:
- fi-rkl-11600:   NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][4] ([i915#4613]) +3 similar issues
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@gem_lmem_swapp...@basic.html

  * igt@gem_tiled_pread_basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][5] ([i915#3282])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600:   NOTRUN -> [SKIP][6] ([i915#3012])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][7] -> [DMESG-FAIL][8] ([i915#4528])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600:   NOTRUN -> [INCOMPLETE][9] ([i915#5982])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-snb-2600:NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-snb-2600/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-edid-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][11] ([fdo#111827]) +7 similar issues
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@kms_chamel...@hdmi-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600:   NOTRUN -> [SKIP][12] ([i915#4103])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600:   NOTRUN -> [SKIP][13] ([fdo#109285] / [i915#4098])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_psr@primary_page_flip:
- fi-rkl-11600:   NOTRUN -> [SKIP][14] ([i915#1072]) +3 similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@kms_psr@primary_page_flip.html

  * igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600:   NOTRUN -> [SKIP][15] ([i915#3555] / [i915#4098])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][16] ([fdo#109295] / [i915#3291] / 
[i915#3708]) +2 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@prime_v...@basic-read.html

  * igt@prime_vgem@basic-userptr:
- fi-rkl-11600:   NOTRUN -> [SKIP][17] ([fdo#109295] / [i915#3301] / 
[i915#3708])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106399v1/fi-rkl-11600/igt@prime_v...@basic-userptr.html

  * igt@runner@aborted:
- fi-pnv-d510:NOTRUN -> [FAIL][18] ([fdo#109271] / [i915#2403] / 
[i915#4312])
   [18]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/guc: Check for ct enabled while waiting for response (rev2)

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915/guc: Check for ct enabled while waiting for response (rev2)
URL   : https://patchwork.freedesktop.org/series/105258/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11900 -> Patchwork_105258v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/index.html

Participating hosts (43 -> 40)
--

  Additional (1): fi-rkl-11600 
  Missing(4): bat-rpls-1 bat-adlm-1 fi-icl-u2 fi-cfl-guc 

Known issues


  Here are the changes found in Patchwork_105258v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_huc_copy@huc-copy:
- fi-rkl-11600:   NOTRUN -> [SKIP][1] ([i915#2190])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@gem_lmem_swapp...@basic.html

  * igt@gem_tiled_pread_basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][3] ([i915#3282])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600:   NOTRUN -> [SKIP][4] ([i915#3012])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@gt_lrc:
- fi-rkl-guc: [PASS][5] -> [INCOMPLETE][6] ([i915#4983])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-guc/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@hangcheck:
- fi-hsw-4770:[PASS][7] -> [INCOMPLETE][8] ([i915#4785])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-hsw-4770/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][9] -> [DMESG-FAIL][10] ([i915#4528])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600:   NOTRUN -> [INCOMPLETE][11] ([i915#5982])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-snb-2600:NOTRUN -> [SKIP][12] ([fdo#109271] / [fdo#111827])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-snb-2600/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-edid-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][13] ([fdo#111827]) +7 similar issues
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@kms_chamel...@hdmi-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600:   NOTRUN -> [SKIP][14] ([i915#4103])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600:   NOTRUN -> [SKIP][15] ([fdo#109285] / [i915#4098])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_psr@primary_page_flip:
- fi-rkl-11600:   NOTRUN -> [SKIP][16] ([i915#1072]) +3 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@kms_psr@primary_page_flip.html

  * igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600:   NOTRUN -> [SKIP][17] ([i915#3555] / [i915#4098])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][18] ([fdo#109295] / [i915#3291] / 
[i915#3708]) +2 similar issues
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@prime_v...@basic-read.html

  * igt@prime_vgem@basic-userptr:
- fi-rkl-11600:   NOTRUN -> [SKIP][19] ([fdo#109295] / [i915#3301] / 
[i915#3708])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105258v2/fi-rkl-11600/igt@prime_v...@basic-userptr.html

  * igt@runner@aborted:
- fi-hsw-4770:NOTRUN -> [FAIL][20] ([fdo#109271] / [i915#4312] / 
[i915#5594] / 

Re: [Intel-gfx] [v3] drm/i915/ttm: fix sg_table construction

2022-07-16 Thread Guenter Roeck
On Mon, Jul 11, 2022 at 09:58:59AM +0100, Matthew Auld wrote:
> If we encounter some monster sized local-memory page that exceeds the
> maximum sg length (UINT32_MAX), ensure that don't end up with some
> misaligned address in the entry that follows, leading to fireworks
> later. Also ensure we have some coverage of this in the selftests.
> 
> v2(Chris):
>   - Use round_down consistently to avoid udiv errors
> v3(Nirmoy):
>   - Also update the max_segment in the selftest
> 
> Fixes: f701b16d4cc5 ("drm/i915/ttm: add i915_sg_from_buddy_resource")
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/6379
> Signed-off-by: Matthew Auld 
> Cc: Thomas Hellström 
> Cc: Nirmoy Das 
> Reviewed-by: Nirmoy Das 

Building i386:defconfig ... failed
--
Error log:
x86_64-linux-ld: drivers/gpu/drm/i915/i915_scatterlist.o: in function 
`i915_rsgt_from_mm_node':
i915_scatterlist.c:(.text+0x196): undefined reference to `__udivdi3'

Bisect log attached.

Guenter

---
# bad: [9b59ec8d50a1f28747ceff9a4f39af5deba9540e] Merge tag 
'riscv-for-linus-5.19-rc7' of 
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
# good: [e5d523f1ae8f2cef01f8e071aeee432654166708] ubsan: disable 
UBSAN_DIV_ZERO for clang
git bisect start 'HEAD' 'e5d523f1ae8f'
# bad: [2a347a06ebb1b186a5cb919c9f5ab6e040554be7] Merge tag 
'platform-drivers-x86-v5.19-4' of 
git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86
git bisect bad 2a347a06ebb1b186a5cb919c9f5ab6e040554be7
# bad: [093f8d8f10aa22935bc8bf7100700f714ebaba9c] Merge tag 
'amd-drm-fixes-5.19-2022-07-13' of https://gitlab.freedesktop.org/agd5f/linux 
into drm-fixes
git bisect bad 093f8d8f10aa22935bc8bf7100700f714ebaba9c
# bad: [ad765fae792e16ce3c1d0b69ce939e3f7dba40ab] drm/i915/gem: Look for 
waitboosting across the whole object prior to individual waits
git bisect bad ad765fae792e16ce3c1d0b69ce939e3f7dba40ab
# good: [f99546298a4537965b75d518c210742f641be389] Merge tag 
'gvt-fixes-2022-07-11' of https://github.com/intel/gvt-linux into 
drm-intel-fixes
git bisect good f99546298a4537965b75d518c210742f641be389
# bad: [aff1e0b09b54b64944b7fe32997229552737b9e9] drm/i915/ttm: fix sg_table 
construction
git bisect bad aff1e0b09b54b64944b7fe32997229552737b9e9
# good: [896dcabd1f8f613c533d948df17408c41f8929f5] drm/i915/selftests: fix a 
couple IS_ERR() vs NULL tests
git bisect good 896dcabd1f8f613c533d948df17408c41f8929f5
# first bad commit: [aff1e0b09b54b64944b7fe32997229552737b9e9] drm/i915/ttm: 
fix sg_table construction


[Intel-gfx] ✓ Fi.CI.BAT: success for Fixes for damage clips handling

2022-07-16 Thread Patchwork
== Series Details ==

Series: Fixes for damage clips handling
URL   : https://patchwork.freedesktop.org/series/106388/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11900 -> Patchwork_106388v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/index.html

Participating hosts (43 -> 33)
--

  Additional (2): fi-rkl-11600 bat-jsl-3 
  Missing(12): fi-bxt-dsi bat-dg1-5 bat-dg2-8 bat-adlm-1 bat-dg2-9 
fi-cfl-guc bat-adlp-6 bat-adlp-4 bat-adln-1 bat-rpls-1 bat-rpls-2 bat-jsl-1 

Known issues


  Here are the changes found in Patchwork_106388v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_huc_copy@huc-copy:
- fi-rkl-11600:   NOTRUN -> [SKIP][1] ([i915#2190])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-rkl-11600:   NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_tiled_pread_basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][3] ([i915#3282])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600:   NOTRUN -> [SKIP][4] ([i915#3012])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][5] -> [DMESG-FAIL][6] ([i915#4528])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600:   NOTRUN -> [INCOMPLETE][7] ([i915#5982])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-snb-2600:NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-snb-2600/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-hpd-fast:
- fi-rkl-11600:   NOTRUN -> [SKIP][9] ([fdo#111827]) +7 similar issues
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@kms_chamel...@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600:   NOTRUN -> [SKIP][10] ([i915#4103])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600:   NOTRUN -> [SKIP][11] ([fdo#109285] / [i915#4098])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-rkl-11600:   NOTRUN -> [SKIP][12] ([i915#1072]) +3 similar issues
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600:   NOTRUN -> [SKIP][13] ([i915#3555] / [i915#4098])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][14] ([fdo#109295] / [i915#3291] / 
[i915#3708]) +2 similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@prime_v...@basic-read.html

  * igt@prime_vgem@basic-userptr:
- fi-rkl-11600:   NOTRUN -> [SKIP][15] ([fdo#109295] / [i915#3301] / 
[i915#3708])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-rkl-11600/igt@prime_v...@basic-userptr.html

  * igt@runner@aborted:
- fi-pnv-d510:NOTRUN -> [FAIL][16] ([fdo#109271] / [i915#2403] / 
[i915#4312])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-pnv-d510/igt@run...@aborted.html

  
 Possible fixes 

  * igt@i915_selftest@live@hangcheck:
- fi-snb-2600:[INCOMPLETE][17] ([i915#3921]) -> [PASS][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106388v1/fi-snb-2600/igt@i915_selftest@l...@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: stop HPD workers before display driver unregister (rev7)

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915/display: stop HPD workers before display driver unregister 
(rev7)
URL   : https://patchwork.freedesktop.org/series/105557/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.




[Intel-gfx] [PATCH] drm/i915/guc: support v69 in parallel to v70

2022-07-16 Thread Daniele Ceraolo Spurio
This patch re-introduces support for GuC v69 in parallel to v70. As this
is a quick fix, v69 has been re-introduced as the single "fallback" guc
version in case v70 is not available on disk. All v69 specific code has
been labeled as such for easy identification, and the same was done for
all v70 functions for which there is a separate v69 version, to avoid
accidentally calling the wrong version via the unlabeled name.

When the fallback mode kicks in, a drm_warn message is printed in dmesg
to warn the user of the required update.

The plan is to follow this up with a more complex rework to allow for
multiple different GuC versions to be supported at the same time.

Fixes: 2584b3549f4c ("drm/i915/guc: Update to GuC version 70.1.1")
Link: https://lists.freedesktop.org/archives/intel-gfx/2022-July/301640.html
Signed-off-by: Daniele Ceraolo Spurio 
Cc: John Harrison 
Cc: Matthew Brost 
Cc: Matt Roper 
Cc: Dave Airlie 
---
 drivers/gpu/drm/i915/gt/intel_context_types.h |  11 +-
 .../gpu/drm/i915/gt/uc/abi/guc_actions_abi.h  |   3 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|   5 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  45 +++
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 348 +++---
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c  |  57 ++-
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h  |   7 +
 7 files changed, 419 insertions(+), 57 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h 
b/drivers/gpu/drm/i915/gt/intel_context_types.h
index d2d75d9c0c8d..04eacae1aca5 100644
--- a/drivers/gpu/drm/i915/gt/intel_context_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_context_types.h
@@ -275,10 +275,17 @@ struct intel_context {
u8 child_index;
/** @guc: GuC specific members for parallel submission */
struct {
-   /** @wqi_head: head pointer in work queue */
+   /** @wqi_head: cached head pointer in work queue */
u16 wqi_head;
-   /** @wqi_tail: tail pointer in work queue */
+   /** @wqi_tail: cached tail pointer in work queue */
u16 wqi_tail;
+   /** @wq_head: pointer to the actual head in work queue 
*/
+   u32 *wq_head;
+   /** @wq_tail: pointer to the actual head in work queue 
*/
+   u32 *wq_tail;
+   /** @wq_status: pointer to the status in work queue */
+   u32 *wq_status;
+
/**
 * @parent_page: page in context state (ce->state) used
 * by parent for work queue, process descriptor
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h 
b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
index 4ef9990ed7f8..29ef8afc8c2e 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h
@@ -122,6 +122,9 @@ enum intel_guc_action {
INTEL_GUC_ACTION_SCHED_CONTEXT_MODE_DONE = 0x1002,
INTEL_GUC_ACTION_SCHED_ENGINE_MODE_SET = 0x1003,
INTEL_GUC_ACTION_SCHED_ENGINE_MODE_DONE = 0x1004,
+   INTEL_GUC_ACTION_V69_SET_CONTEXT_PRIORITY = 0x1005,
+   INTEL_GUC_ACTION_V69_SET_CONTEXT_EXECUTION_QUANTUM = 0x1006,
+   INTEL_GUC_ACTION_V69_SET_CONTEXT_PREEMPTION_TIMEOUT = 0x1007,
INTEL_GUC_ACTION_CONTEXT_RESET_NOTIFICATION = 0x1008,
INTEL_GUC_ACTION_ENGINE_FAILURE_NOTIFICATION = 0x1009,
INTEL_GUC_ACTION_HOST2GUC_UPDATE_CONTEXT_POLICIES = 0x100B,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index d0d99f178f2d..a7acffbf15d1 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -170,6 +170,11 @@ struct intel_guc {
/** @ads_engine_usage_size: size of engine usage in the ADS */
u32 ads_engine_usage_size;
 
+   /** @lrc_desc_pool_v69: object allocated to hold the GuC LRC descriptor 
pool */
+   struct i915_vma *lrc_desc_pool_v69;
+   /** @lrc_desc_pool_vaddr_v69: contents of the GuC LRC descriptor pool */
+   void *lrc_desc_pool_vaddr_v69;
+
/**
 * @context_lookup: used to resolve intel_context from guc_id, if a
 * context is present in this structure it is registered with the GuC
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index b3c9a9327f76..323b055e5db9 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -204,6 +204,20 @@ struct guc_wq_item {
u32 fence_id;
 } __packed;
 
+struct guc_process_desc_v69 {
+   u32 stage_id;
+   u64 db_base_addr;
+   u32 head;
+   u32 tail;
+   u32 error_offset;
+   u64 wq_base_addr;
+   u32 wq_size_bytes;
+   u32 wq_status;
+   u32 engine_presence;
+   u32 priority;
+   

Re: [Intel-gfx] [PATCH v2 27/39] drm/i915: i915_scatterlist.h: fix some kernel-doc markups

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:15AM +0100, Mauro Carvalho Chehab wrote:
> Building docs currently produces this warning:
> 
>   Documentation/foo/i915:159: 
> ./drivers/gpu/drm/i915/i915_scatterlist.h:73: WARNING: Inline strong 
> start-string without end-string.
> 
> That's because @foo evaluates into **foo**, and placing anything
> after it without spaces cause Sphinx to warn and do the wrong
> thing.. So, replace them by a different Sphinx-compatible tag.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/i915_scatterlist.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h 
> b/drivers/gpu/drm/i915/i915_scatterlist.h
> index 0b8bf4be4330..5b5c4eee0f44 100644
> --- a/drivers/gpu/drm/i915/i915_scatterlist.h
> +++ b/drivers/gpu/drm/i915/i915_scatterlist.h
> @@ -70,7 +70,7 @@ static inline struct scatterlist *sg_next(struct 
> scatterlist *sg)
>   *
>   * Description:
>   *   If the entry is the last, return NULL; otherwise, step to the next
> - *   element in the array (@sg@+1). If that's a chain pointer, follow it;
> + *   element in the array (``sg@+1``). If that's a chain pointer, follow it;
>   *   otherwise just return the pointer to the current element.
>   **/
>  static inline struct scatterlist *__sg_next(struct scatterlist *sg)
> -- 
> 2.36.1
> 


Re: [Intel-gfx] [PATCH v2 22/39] drm/i915: stop using kernel-doc markups for something else

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:10AM +0100, Mauro Carvalho Chehab wrote:
> There are some occurrences of "/**" that aren't actually part of
> a kernel-doc markup. Replace them by "/*", in order to make easier
> to identify what i915 files contain kernel-doc markups.
> 
> Signed-off-by: Mauro Carvalho Chehab 

\o/

Reviewed-by: Rodrigo Vivi 



> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/display/dvo_ch7017.c | 26 
>  drivers/gpu/drm/i915/display/dvo_ch7xxx.c |  6 +-
>  .../drm/i915/display/intel_display_types.h|  2 +-
>  drivers/gpu/drm/i915/display/intel_dvo_dev.h  |  6 +-
>  drivers/gpu/drm/i915/display/intel_sdvo.c |  4 +-
>  drivers/gpu/drm/i915/display/intel_tv.c   |  2 +-
>  drivers/gpu/drm/i915/gt/intel_context_types.h | 63 +--
>  drivers/gpu/drm/i915/gt/intel_ggtt_fencing.h  |  2 +-
>  drivers/gpu/drm/i915/gt/intel_gt_types.h  | 12 ++--
>  drivers/gpu/drm/i915/gt/intel_reset_types.h   |  4 +-
>  .../gpu/drm/i915/gt/intel_timeline_types.h|  6 +-
>  .../drm/i915/gt/shaders/clear_kernel/hsw.asm  |  4 +-
>  .../drm/i915/gt/shaders/clear_kernel/ivb.asm  |  4 +-
>  drivers/gpu/drm/i915/gt/uc/guc_capture_fwif.h | 10 +--
>  drivers/gpu/drm/i915/i915_drm_client.h|  2 +-
>  drivers/gpu/drm/i915/i915_drv.h   | 30 -
>  drivers/gpu/drm/i915/i915_file_private.h  |  8 +--
>  drivers/gpu/drm/i915/i915_gpu_error.h |  4 +-
>  drivers/gpu/drm/i915/i915_pmu.h   | 32 +-
>  drivers/gpu/drm/i915/intel_uncore.h   |  4 +-
>  20 files changed, 115 insertions(+), 116 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/dvo_ch7017.c 
> b/drivers/gpu/drm/i915/display/dvo_ch7017.c
> index 0589994dde11..581e29ab77e4 100644
> --- a/drivers/gpu/drm/i915/display/dvo_ch7017.c
> +++ b/drivers/gpu/drm/i915/display/dvo_ch7017.c
> @@ -55,13 +55,13 @@
>  #define CH7017_TEST_PATTERN  0x48
>  
>  #define CH7017_POWER_MANAGEMENT  0x49
> -/** Enables the TV output path. */
> +/* Enables the TV output path. */
>  #define CH7017_TV_EN (1 << 0)
>  #define CH7017_DAC0_POWER_DOWN   (1 << 1)
>  #define CH7017_DAC1_POWER_DOWN   (1 << 2)
>  #define CH7017_DAC2_POWER_DOWN   (1 << 3)
>  #define CH7017_DAC3_POWER_DOWN   (1 << 4)
> -/** Powers down the TV out block, and DAC0-3 */
> +/* Powers down the TV out block, and DAC0-3 */
>  #define CH7017_TV_POWER_DOWN_EN  (1 << 5)
>  
>  #define CH7017_VERSION_ID0x4a
> @@ -84,26 +84,26 @@
>  #define CH7017_UP_SCALER_HORIZONTAL_INC_10x5e
>  
>  #define CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT 0x5f
> -/**< Low bits of horizontal active pixel input */
> +/* Low bits of horizontal active pixel input */
>  
>  #define CH7017_ACTIVE_INPUT_LINE_OUTPUT  0x60
> -/** High bits of horizontal active pixel input */
> +/* High bits of horizontal active pixel input */
>  #define CH7017_LVDS_HAP_INPUT_MASK   (0x7 << 0)
> -/** High bits of vertical active line output */
> +/* High bits of vertical active line output */
>  #define CH7017_LVDS_VAL_HIGH_MASK(0x7 << 3)
>  
>  #define CH7017_VERTICAL_ACTIVE_LINE_OUTPUT   0x61
> -/**< Low bits of vertical active line output */
> +/* Low bits of vertical active line output */
>  
>  #define CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT0x62
> -/**< Low bits of horizontal active pixel output */
> +/* Low bits of horizontal active pixel output */
>  
>  #define CH7017_LVDS_POWER_DOWN   0x63
> -/** High bits of horizontal active pixel output */
> +/* High bits of horizontal active pixel output */
>  #define CH7017_LVDS_HAP_HIGH_MASK(0x7 << 0)
> -/** Enables the LVDS power down state transition */
> +/* Enables the LVDS power down state transition */
>  #define CH7017_LVDS_POWER_DOWN_EN(1 << 6)
> -/** Enables the LVDS upscaler */
> +/* Enables the LVDS upscaler */
>  #define CH7017_LVDS_UPSCALER_EN  (1 << 7)
>  #define CH7017_LVDS_POWER_DOWN_DEFAULT_RESERVED 0x08
>  
> @@ -116,9 +116,9 @@
>  #define CH7017_LVDS_ENCODING_2   0x65
>  
>  #define CH7017_LVDS_PLL_CONTROL  0x66
> -/** Enables the LVDS panel output path */
> +/* Enables the LVDS panel output path */
>  #define CH7017_LVDS_PANEN(1 << 0)
> -/** Enables the LVDS panel backlight */
> +/* Enables the LVDS panel backlight */
>  #define CH7017_LVDS_BKLEN(1 << 3)
>  
>  #define CH7017_POWER_SEQUENCING_T1   0x67
> @@ -197,7 +197,7 @@ static bool ch7017_write(struct intel_dvo_device *dvo, u8 
> addr, u8 val)
>   return i2c_transfer(dvo->i2c_bus, , 1) == 1;
>  }
>  
> -/** Probes for a CH7017 on the given bus and slave address. */
> +/* Probes for a CH7017 on the given bus and slave address. */
>  static bool ch7017_init(struct 

Re: [Intel-gfx] [PATCH v2 26/39] drm/i915: i915_gem.c fix a kernel-doc issue

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:14AM +0100, Mauro Carvalho Chehab wrote:
> Prevent this Sphinx warning:
> 
>   Documentation/foo/i915:728: ./drivers/gpu/drm/i915/i915_gem.c:447: 
> WARNING: Inline emphasis start-string without end-string.
> 
> By using @data to identify the data field, as expected by kernel-doc.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/i915_gem.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 41e83d078a70..0ca4bb08ea78 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -444,7 +444,7 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
>   * @data: ioctl data blob
>   * @file: drm file pointer
>   *
> - * On error, the contents of *data are undefined.
> + * On error, the contents of @data is undefined.
>   */
>  int
>  i915_gem_pread_ioctl(struct drm_device *dev, void *data,
> -- 
> 2.36.1
> 


[Intel-gfx] [PATCH 11/12] drm/i915: WARN if a port should use VBT provided vswing tables

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

We don't parse the VBT vswing/preemphassis tables at all currently.
Let's WARN if a port wants to use them so we get a heads up that
whether we really need to implement this stuff or not. My
current stash contains no VBTs with this bit set.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_bios.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index 51dde5bfd956..cd86b65055ef 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2661,6 +2661,10 @@ static void parse_ddi_port(struct 
intel_bios_encoder_data *devdata)
return;
}
 
+   drm_WARN(>drm, child->use_vbt_vswing,
+"Port %c asks to use VBT vswing/preemph tables\n",
+port_name(port));
+
if (i915->vbt.ports[port]) {
drm_dbg_kms(>drm,
"More than one child device for port %c in VBT, 
using the first.\n",
-- 
2.35.1



[Intel-gfx] [PATCH 12/12] drm/i915: Parse DP/eDP max lane count from VBT

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

Limit the DP lane count based on the new VBT DP/eDP max
lane count field.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_bios.c | 16 
 drivers/gpu/drm/i915/display/intel_bios.h |  1 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 13 -
 3 files changed, 29 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index cd86b65055ef..d8063c329b3a 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2489,6 +2489,14 @@ static int _intel_bios_dp_max_link_rate(const struct 
intel_bios_encoder_data *de
return 
parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
 }
 
+static int _intel_bios_dp_max_lane_count(const struct intel_bios_encoder_data 
*devdata)
+{
+   if (!devdata || devdata->i915->vbt.version < 244)
+   return 0;
+
+   return devdata->child.dp_max_lane_count + 1;
+}
+
 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
 enum port port)
 {
@@ -3674,6 +3682,14 @@ int intel_bios_dp_max_link_rate(struct intel_encoder 
*encoder)
return _intel_bios_dp_max_link_rate(devdata);
 }
 
+int intel_bios_dp_max_lane_count(struct intel_encoder *encoder)
+{
+   struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+   const struct intel_bios_encoder_data *devdata = 
i915->vbt.ports[encoder->port];
+
+   return _intel_bios_dp_max_lane_count(devdata);
+}
+
 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
 {
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h 
b/drivers/gpu/drm/i915/display/intel_bios.h
index e47582b0de0a..e375405a7828 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -258,6 +258,7 @@ bool intel_bios_get_dsc_params(struct intel_encoder 
*encoder,
 int intel_bios_max_tmds_clock(struct intel_encoder *encoder);
 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder);
 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder);
+int intel_bios_dp_max_lane_count(struct intel_encoder *encoder);
 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder);
 bool intel_bios_port_supports_typec_usb(struct drm_i915_private *i915, enum 
port port);
 bool intel_bios_port_supports_tbt(struct drm_i915_private *i915, enum port 
port);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 32292c0be2bd..0370c4c105dc 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -286,11 +286,22 @@ static int intel_dp_max_common_rate(struct intel_dp 
*intel_dp)
return intel_dp_common_rate(intel_dp, intel_dp->num_common_rates - 1);
 }
 
+static int intel_dp_max_source_lane_count(struct intel_digital_port *dig_port)
+{
+   int vbt_max_lanes = intel_bios_dp_max_lane_count(_port->base);
+   int max_lanes = dig_port->max_lanes;
+
+   if (vbt_max_lanes)
+   max_lanes = min(max_lanes, vbt_max_lanes);
+
+   return max_lanes;
+}
+
 /* Theoretical max between source and sink */
 static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)
 {
struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-   int source_max = dig_port->max_lanes;
+   int source_max = intel_dp_max_source_lane_count(dig_port);
int sink_max = intel_dp->max_sink_lane_count;
int fia_max = intel_tc_port_fia_max_lane_count(dig_port);
int lttpr_max = 
drm_dp_lttpr_max_lane_count(intel_dp->lttpr_common_caps);
-- 
2.35.1



[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: stop HPD workers before display driver unregister (rev7)

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915/display: stop HPD workers before display driver unregister 
(rev7)
URL   : https://patchwork.freedesktop.org/series/105557/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11900_full -> Patchwork_105557v7_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (12 -> 13)
--

  Additional (1): shard-dg1 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105557v7_full:

### IGT changes ###

 Possible regressions 

  * {igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-512x170} (NEW):
- {shard-dg1}:NOTRUN -> [SKIP][1] +15 similar issues
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/shard-dg1-15/igt@kms_cursor_crc@cursor-slid...@pipe-b-hdmi-a-4-512x170.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@i915_module_load@resize-bar}:
- {shard-dg1}:NOTRUN -> [FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/shard-dg1-15/igt@i915_module_l...@resize-bar.html

  
New tests
-

  New tests have been introduced between CI_DRM_11900_full and 
Patchwork_105557v7_full:

### New IGT tests (85) ###

  * igt@kms_async_flips@test-time-stamp@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.34] s

  * igt@kms_async_flips@test-time-stamp@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.20] s

  * igt@kms_async_flips@test-time-stamp@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.19] s

  * igt@kms_async_flips@test-time-stamp@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.18] s

  * igt@kms_color@ctm-0-75@pipe-a-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.57] s

  * igt@kms_color@ctm-0-75@pipe-b-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.39] s

  * igt@kms_color@ctm-0-75@pipe-c-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.40] s

  * igt@kms_color@ctm-0-75@pipe-d-hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.42] s

  * igt@kms_concurrent@pipe-c@hdmi-a-4:
- Statuses : 1 pass(s)
- Exec time: [0.35] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-128x128:
- Statuses : 1 pass(s)
- Exec time: [5.49] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-128x42:
- Statuses : 1 pass(s)
- Exec time: [5.49] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-256x256:
- Statuses : 1 pass(s)
- Exec time: [5.49] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-256x85:
- Statuses : 1 pass(s)
- Exec time: [5.55] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-64x21:
- Statuses : 1 pass(s)
- Exec time: [5.50] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-a-hdmi-a-4-64x64:
- Statuses : 1 pass(s)
- Exec time: [5.53] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-128x128:
- Statuses : 1 pass(s)
- Exec time: [5.53] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-128x42:
- Statuses : 1 pass(s)
- Exec time: [5.51] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-256x256:
- Statuses : 1 pass(s)
- Exec time: [5.50] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-256x85:
- Statuses : 1 pass(s)
- Exec time: [5.50] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-32x10:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-32x32:
- Statuses : 1 skip(s)
- Exec time: [0.01] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-512x170:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-512x512:
- Statuses : 1 skip(s)
- Exec time: [0.0] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-64x21:
- Statuses : 1 pass(s)
- Exec time: [5.38] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-b-hdmi-a-4-64x64:
- Statuses : 1 pass(s)
- Exec time: [5.48] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-4-128x128:
- Statuses : 1 pass(s)
- Exec time: [5.51] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-4-128x42:
- Statuses : 1 pass(s)
- Exec time: [5.60] s

  * igt@kms_cursor_crc@cursor-sliding@pipe-c-hdmi-a-4-256x256:
- Statuses : 1 pass(s)
 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: stop HPD workers before display driver unregister (rev7)

2022-07-16 Thread Patchwork
== Series Details ==

Series: drm/i915/display: stop HPD workers before display driver unregister 
(rev7)
URL   : https://patchwork.freedesktop.org/series/105557/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11900 -> Patchwork_105557v7


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/index.html

Participating hosts (43 -> 43)
--

  Additional (2): fi-rkl-11600 bat-jsl-3 
  Missing(2): bat-rpls-1 fi-cfl-guc 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_105557v7:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@migrate:
- {bat-adln-1}:   NOTRUN -> [DMESG-FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/bat-adln-1/igt@i915_selftest@l...@migrate.html

  
Known issues


  Here are the changes found in Patchwork_105557v7 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_huc_copy@huc-copy:
- fi-rkl-11600:   NOTRUN -> [SKIP][2] ([i915#2190])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@gem_lmem_swapp...@basic.html

  * igt@gem_tiled_pread_basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][4] ([i915#3282])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600:   NOTRUN -> [SKIP][5] ([i915#3012])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@i915_pm_backli...@basic-brightness.html

  * igt@i915_selftest@live@requests:
- fi-pnv-d510:[PASS][6] -> [DMESG-FAIL][7] ([i915#4528])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11900/fi-pnv-d510/igt@i915_selftest@l...@requests.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-pnv-d510/igt@i915_selftest@l...@requests.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600:   NOTRUN -> [INCOMPLETE][8] ([i915#5982])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
- fi-snb-2600:NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-snb-2600/igt@kms_chamel...@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-edid-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][10] ([fdo#111827]) +7 similar issues
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@kms_chamel...@hdmi-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600:   NOTRUN -> [SKIP][11] ([i915#4103])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600:   NOTRUN -> [SKIP][12] ([fdo#109285] / [i915#4098])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_frontbuffer_tracking@basic:
- fi-kbl-guc: NOTRUN -> [SKIP][13] ([fdo#109271])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-kbl-guc/igt@kms_frontbuffer_track...@basic.html

  * igt@kms_psr@primary_page_flip:
- fi-rkl-11600:   NOTRUN -> [SKIP][14] ([i915#1072]) +3 similar issues
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@kms_psr@primary_page_flip.html

  * igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600:   NOTRUN -> [SKIP][15] ([i915#3555] / [i915#4098])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][16] ([fdo#109295] / [i915#3291] / 
[i915#3708]) +2 similar issues
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@prime_v...@basic-read.html

  * igt@prime_vgem@basic-userptr:
- fi-rkl-11600:   NOTRUN -> [SKIP][17] ([fdo#109295] / [i915#3301] / 
[i915#3708])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_105557v7/fi-rkl-11600/igt@prime_v...@basic-userptr.html

  * igt@runner@aborted:
- fi-pnv-d510:NOTRUN -> [FAIL][18] ([fdo#109271] 

Re: [Intel-gfx] [PATCH v3 5/7] drm/i915: Check if the size is too big while creating shmem file

2022-07-16 Thread kernel test robot
Hi Gwan-gyeong,

Thank you for the patch! Perhaps something to improve:

[auto build test WARNING on drm-tip/drm-tip]

url:
https://github.com/intel-lab-lkp/linux/commits/Gwan-gyeong-Mun/Fixes-integer-overflow-or-integer-truncation-issues-in-page-lookups-ttm-place-configuration-and-scatterlist-creation/20220714-171019
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
config: i386-randconfig-a004 
(https://download.01.org/0day-ci/archive/20220716/202207161058.dmozoqzg-...@intel.com/config)
compiler: clang version 15.0.0 (https://github.com/llvm/llvm-project 
2da550140aa98cf6a3e96417c87f1e89e3a26047)
reproduce (this is a W=1 build):
wget 
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O 
~/bin/make.cross
chmod +x ~/bin/make.cross
# 
https://github.com/intel-lab-lkp/linux/commit/2938379499047baf3189503913f438fda6ea92eb
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review 
Gwan-gyeong-Mun/Fixes-integer-overflow-or-integer-truncation-issues-in-page-lookups-ttm-place-configuration-and-scatterlist-creation/20220714-171019
git checkout 2938379499047baf3189503913f438fda6ea92eb
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross W=1 
O=build_dir ARCH=i386 SHELL=/bin/bash drivers/gpu/drm/i915/

If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot 

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/gem/i915_gem_shmem.c:550:11: warning: result of 
>> comparison of constant 17592186040320 with expression of type 
>> 'resource_size_t' (aka 'unsigned int') is always false 
>> [-Wtautological-constant-out-of-range-compare]
   if (size > MAX_LFS_FILESIZE)
    ^ 
   1 warning generated.


vim +550 drivers/gpu/drm/i915/gem/i915_gem_shmem.c

   534  
   535  static int __create_shmem(struct drm_i915_private *i915,
   536struct drm_gem_object *obj,
   537resource_size_t size)
   538  {
   539  unsigned long flags = VM_NORESERVE;
   540  struct file *filp;
   541  
   542  drm_gem_private_object_init(>drm, obj, size);
   543  
   544  /* XXX: The __shmem_file_setup() function returns -EINVAL if 
size is
   545   * greater than MAX_LFS_FILESIZE.
   546   * To handle the same error as other code that returns -E2BIG 
when
   547   * the size is too large, we add a code that returns -E2BIG 
when the
   548   * size is larger than the size that can be handled.
   549   */
 > 550  if (size > MAX_LFS_FILESIZE)
   551  return -E2BIG;
   552  
   553  if (i915->mm.gemfs)
   554  filp = shmem_file_setup_with_mnt(i915->mm.gemfs, 
"i915", size,
   555   flags);
   556  else
   557  filp = shmem_file_setup("i915", size, flags);
   558  if (IS_ERR(filp))
   559  return PTR_ERR(filp);
   560  
   561  obj->filp = filp;
   562  return 0;
   563  }
   564  

-- 
0-DAY CI Kernel Test Service
https://01.org/lkp


Re: [Intel-gfx] [PATCH v2 17/39] drm/i915: skl_scaler: fix return value kernel-doc markup

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:05AM +0100, Mauro Carvalho Chehab wrote:
> The way it is, it produces this warning:
> 
>   Documentation/gpu/i915:150: 
> ./drivers/gpu/drm/i915/display/skl_scaler.c:213: WARNING: Block quote ends 
> without a blank line; unexpected unindent.
> 
> Use list markups to suppress the warning.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/display/skl_scaler.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c 
> b/drivers/gpu/drm/i915/display/skl_scaler.c
> index 4092679be21e..59099f793d3e 100644
> --- a/drivers/gpu/drm/i915/display/skl_scaler.c
> +++ b/drivers/gpu/drm/i915/display/skl_scaler.c
> @@ -208,9 +208,9 @@ int skl_update_scaler_crtc(struct intel_crtc_state 
> *crtc_state)
>   * @crtc_state: crtc's scaler state
>   * @plane_state: atomic plane state to update
>   *
> - * Return
> - * 0 - scaler_usage updated successfully
> - *error - requested scaling cannot be supported or other error condition
> + * Return:
> + * * 0 - scaler_usage updated successfully
> + * * error - requested scaling cannot be supported or other error condition
>   */
>  int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
>   struct intel_plane_state *plane_state)
> -- 
> 2.36.1
> 


Re: [Intel-gfx] [PATCH v2 21/39] drm/i915: fix i915_gem_ttm_move.c DOC: markup

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:09AM +0100, Mauro Carvalho Chehab wrote:
> The doc markup should not end with ":", as it would generate a
> warning on Sphinx while generating the cross-reference tag.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c 
> b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> index 56217d324a9b..16dd4991d527 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c
> @@ -20,7 +20,7 @@
>  #include "gt/intel_migrate.h"
>  
>  /**
> - * DOC: Selftest failure modes for failsafe migration:
> + * DOC: Selftest failure modes for failsafe migration
>   *
>   * For fail_gpu_migration, the gpu blit scheduled is always a clear blit
>   * rather than a copy blit, and then we force the failure paths as if
> -- 
> 2.36.1
> 


Re: [Intel-gfx] [PATCH v2 13/39] drm/i915: i915_gpu_error.c: document dump_flags

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:01AM +0100, Mauro Carvalho Chehab wrote:
> Kernel-doc dump_flags parameter is missing at i915_capture_error_state().
> Document it.
> 
> Fixes: a6f0f9cf330a ("drm/i915/guc: Plumb GuC-capture into gpu_coredump")

Why the fix here and not in the i915_vma_destroy_locked one?
That was also a new introduction. Should we bother with the Fixes
anyway since there were many broken already? And if we do, shouldn't
we add to the others?

But anyway, just trying to understand the differences and reasons,
because the patch is correct:


Reviewed-by: Rodrigo Vivi 



> Signed-off-by: Mauro Carvalho Chehab 
> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/i915_gpu_error.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
> b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 32e92651ef7c..7790f97b26db 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -2096,7 +2096,8 @@ void i915_error_state_store(struct i915_gpu_coredump 
> *error)
>   * i915_capture_error_state - capture an error record for later analysis
>   * @gt: intel_gt which originated the hang
>   * @engine_mask: hung engines
> - *
> + * @dump_flags: bitmap flags. When %CORE_DUMP_FLAG_IS_GUC_CAPTURE is used,
> + *   dump engine record registers and execlists.
>   *
>   * Should be called when an error is detected (either a hang or an error
>   * interrupt) to capture error state from the time of the error.  Fills
> -- 
> 2.36.1
> 


Re: [Intel-gfx] [PATCH v2 16/39] drm/i915: intel_fb: fix a kernel-doc issue with Sphinx

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:04AM +0100, Mauro Carvalho Chehab wrote:
> We can't use %foo[] as this produces a bad markup.
> Use instead, the emphasis markup directly.
> 
> Fix this issue:
>   Documentation/gpu/i915:136: 
> ./drivers/gpu/drm/i915/display/intel_fb.c:280: WARNING: Inline strong 
> start-string without end-string.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Just trying to understand as well on why in a few you had chosen ```foo```
and here **foo**. why?

anyway, not a blocker:

Reviewed-by: Rodrigo Vivi 



> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> b/drivers/gpu/drm/i915/display/intel_fb.c
> index b191915ab351..fe72c75a9c79 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -276,7 +276,7 @@ lookup_format_info(const struct drm_format_info formats[],
>   * @cmd: FB add command structure
>   *
>   * Returns:
> - * Returns the format information for @cmd->pixel_format specific to 
> @cmd->modifier[0],
> + * Returns the format information for @cmd->pixel_format specific to 
> **cmd->modifier[0]**,
>   * or %NULL if the modifier doesn't override the format.
>   */
>  const struct drm_format_info *
> -- 
> 2.36.1
> 


[Intel-gfx] [PATCH] drm/i915/guc: Check for ct enabled while waiting for response

2022-07-16 Thread Zhanjun Dong
We are seeing error message of "No response for request". Some cases
happened while waiting for response and reset/suspend action was triggered.
In this case, no response is not an error, active requests will be
cancelled.

This patch will handle this condition and change the error message into
debug message.

Signed-off-by: Zhanjun Dong 
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 27 +--
 1 file changed, 20 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f01325cd1b62..74194c11234d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -455,6 +455,7 @@ static int ct_write(struct intel_guc_ct *ct,
 
 /**
  * wait_for_ct_request_update - Wait for CT request state update.
+ * @ct:pointer to CT
  * @req:   pointer to pending request
  * @status:placeholder for status
  *
@@ -467,9 +468,10 @@ static int ct_write(struct intel_guc_ct *ct,
  * *   0 response received (status is valid)
  * *   -ETIMEDOUT no response within hardcoded timeout
  */
-static int wait_for_ct_request_update(struct ct_request *req, u32 *status)
+static int wait_for_ct_request_update(struct intel_guc_ct *ct, struct 
ct_request *req, u32 *status)
 {
int err;
+   bool ct_enabled;
 
/*
 * Fast commands should complete in less than 10us, so sample quickly
@@ -481,12 +483,15 @@ static int wait_for_ct_request_update(struct ct_request 
*req, u32 *status)
 #define GUC_CTB_RESPONSE_TIMEOUT_SHORT_MS 10
 #define GUC_CTB_RESPONSE_TIMEOUT_LONG_MS 1000
 #define done \
-   (FIELD_GET(GUC_HXG_MSG_0_ORIGIN, READ_ONCE(req->status)) == \
+   (!(ct_enabled = intel_guc_ct_enabled(ct)) || \
+FIELD_GET(GUC_HXG_MSG_0_ORIGIN, READ_ONCE(req->status)) == \
 GUC_HXG_ORIGIN_GUC)
err = wait_for_us(done, GUC_CTB_RESPONSE_TIMEOUT_SHORT_MS);
if (err)
err = wait_for(done, GUC_CTB_RESPONSE_TIMEOUT_LONG_MS);
 #undef done
+   if (!ct_enabled)
+   err = -ENODEV;
 
*status = req->status;
return err;
@@ -703,11 +708,18 @@ static int ct_send(struct intel_guc_ct *ct,
 
intel_guc_notify(ct_to_guc(ct));
 
-   err = wait_for_ct_request_update(, status);
+   err = wait_for_ct_request_update(ct, , status);
g2h_release_space(ct, GUC_CTB_HXG_MSG_MAX_LEN);
if (unlikely(err)) {
-   CT_ERROR(ct, "No response for request %#x (fence %u)\n",
-action[0], request.fence);
+   if (err == -ENODEV)
+   /* wait_for_ct_request_update returns -ENODEV on 
reset/suspend in progress.
+* In this case, output is debug rather than error info
+*/
+   CT_DEBUG(ct, "Request %#x (fence %u) cancelled as CTB 
is disabled\n",
+action[0], request.fence);
+   else
+   CT_ERROR(ct, "No response for request %#x (fence %u)\n",
+action[0], request.fence);
goto unlink;
}
 
@@ -771,8 +783,9 @@ int intel_guc_ct_send(struct intel_guc_ct *ct, const u32 
*action, u32 len,
 
ret = ct_send(ct, action, len, response_buf, response_buf_size, 
);
if (unlikely(ret < 0)) {
-   CT_ERROR(ct, "Sending action %#x failed (%pe) status=%#X\n",
-action[0], ERR_PTR(ret), status);
+   if (ret != -ENODEV)
+   CT_ERROR(ct, "Sending action %#x failed (%pe) 
status=%#X\n",
+action[0], ERR_PTR(ret), status);
} else if (unlikely(ret)) {
CT_DEBUG(ct, "send action %#x returned %d (%#x)\n",
 action[0], ret, ret);
-- 
2.36.0



[Intel-gfx] [PATCH 05/12] drm/i915: Add the VBT LTTPR transparent vs. non-transparent bits

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

VBT gained a bit to indicate whether LTTPRs should use transparent
or non-transparent mode. Dunno if we should actually look at this...

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index d583bb085913..b15e29509fac 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -408,7 +408,8 @@ struct child_device_config {
u8 compression_enable:1;/* 198+ */
u8 compression_method_cps:1;/* 198+ */
u8 ganged_edp:1;/* 202+ */
-   u8 reserved2:4;
+   u8 lttpr_non_transparent:1; /* 235+ */
+   u8 reserved2:3;
u8 compression_structure_index:4;   /* 198+ */
u8 reserved3:4;
u8 slave_port;  /* 202+ */
-- 
2.35.1



Re: [Intel-gfx] [PATCH RFC] drm/i915/gt: Retry RING_HEAD reset until it sticks

2022-07-16 Thread Rodrigo Vivi
On Fri, Jul 15, 2022 at 09:26:16AM +0100, Mauro Carvalho Chehab wrote:
> From: Chris Wilson 
> 
> On Haswell, in particular, we see an issue where resets fails because

Can we then make this platform specific?
Only because some older hw doesn't behave like expected we shouldn't
make this a default & global workaround.

> the engine resumes from an incorrect RING_HEAD. Since the RING_HEAD
> doesn't point to the remaining requests to re-run, but may instead point
> into the uninitialised portion of the ring, the GPU may be then fed
> invalid instructions from a privileged context, oft pushing the GPU into
> an unrecoverable hang.
> 
> If at first the write doesn't succeed, try, try again.
> 
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/5432
> Testcase: igt/i915_selftest/hangcheck
> Signed-off-by: Chris Wilson 
> Cc: Andrzej Hajda 
> Cc: Mika Kuoppala 
> Signed-off-by: Mauro Carvalho Chehab 
> ---
>  .../gpu/drm/i915/gt/intel_ring_submission.c   | 44 +--
>  drivers/gpu/drm/i915/i915_utils.h | 10 +
>  2 files changed, 40 insertions(+), 14 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c 
> b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> index d5d6f1fadcae..cc53feb1f8ed 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> @@ -190,6 +190,7 @@ static bool stop_ring(struct intel_engine_cs *engine)
>  static int xcs_resume(struct intel_engine_cs *engine)
>  {
>   struct intel_ring *ring = engine->legacy.ring;
> + ktime_t kt;
>  
>   ENGINE_TRACE(engine, "ring:{HEAD:%04x, TAIL:%04x}\n",
>ring->head, ring->tail);
> @@ -228,9 +229,20 @@ static int xcs_resume(struct intel_engine_cs *engine)
>   set_pp_dir(engine);
>  
>   /* First wake the ring up to an empty/idle ring */
> - ENGINE_WRITE_FW(engine, RING_HEAD, ring->head);
> + until_timeout_ns(kt, 2 * NSEC_PER_MSEC) {
> + ENGINE_WRITE_FW(engine, RING_HEAD, ring->head);
> + if (ENGINE_READ_FW(engine, RING_HEAD) == ring->head)
> + break;
> + }
> +
>   ENGINE_WRITE_FW(engine, RING_TAIL, ring->head);
> - ENGINE_POSTING_READ(engine, RING_TAIL);
> + if (ENGINE_READ_FW(engine, RING_HEAD) != ENGINE_READ_FW(engine, 
> RING_TAIL)) {
> + ENGINE_TRACE(engine, "failed to reset empty ring: [%x, %x]: 
> %x\n",
> +  ENGINE_READ_FW(engine, RING_HEAD),
> +  ENGINE_READ_FW(engine, RING_TAIL),
> +  ring->head);
> + goto err;
> + }

commit message mentions until this point I'm afraid... everything below
(except the new until_timeout_ns) looks like a different patch to me,
or deserves some mention in the commit msg.

>  
>   ENGINE_WRITE_FW(engine, RING_CTL,
>   RING_CTL_SIZE(ring->size) | RING_VALID);
> @@ -239,12 +251,16 @@ static int xcs_resume(struct intel_engine_cs *engine)
>   if (__intel_wait_for_register_fw(engine->uncore,
>RING_CTL(engine->mmio_base),
>RING_VALID, RING_VALID,
> -  5000, 0, NULL))
> +  5000, 0, NULL)) {
> + ENGINE_TRACE(engine, "failed to restart\n");
>   goto err;
> + }
>  
> - if (GRAPHICS_VER(engine->i915) > 2)
> + if (GRAPHICS_VER(engine->i915) > 2) {
>   ENGINE_WRITE_FW(engine,
>   RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING));
> + ENGINE_POSTING_READ(engine, RING_MI_MODE);
> + }
>  
>   /* Now awake, let it get started */
>   if (ring->tail != ring->head) {
> @@ -257,16 +273,16 @@ static int xcs_resume(struct intel_engine_cs *engine)
>   return 0;
>  
>  err:
> - drm_err(>i915->drm,
> - "%s initialization failed; "
> - "ctl %08x (valid? %d) head %08x [%08x] tail %08x [%08x] start 
> %08x [expected %08x]\n",
> - engine->name,
> - ENGINE_READ(engine, RING_CTL),
> - ENGINE_READ(engine, RING_CTL) & RING_VALID,
> - ENGINE_READ(engine, RING_HEAD), ring->head,
> - ENGINE_READ(engine, RING_TAIL), ring->tail,
> - ENGINE_READ(engine, RING_START),
> - i915_ggtt_offset(ring->vma));
> + ENGINE_TRACE(engine,
> +  "initialization failed; "
> +  "ctl %08x (valid? %d) head %08x [%08x] tail %08x [%08x] 
> start %08x [expected %08x]\n",
> +  ENGINE_READ(engine, RING_CTL),
> +  ENGINE_READ(engine, RING_CTL) & RING_VALID,
> +  ENGINE_READ(engine, RING_HEAD), ring->head,
> +  ENGINE_READ(engine, RING_TAIL), ring->tail,
> +  ENGINE_READ(engine, RING_START),
> +  i915_ggtt_offset(ring->vma));
> + 

[Intel-gfx] [PATCH 01/12] drm/i915: Unify VBT version number comments

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

Use a more standard form for the VT version number comments.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 206 ++
 1 file changed, 110 insertions(+), 96 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 509b0a419c20..ba328d130991 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -75,6 +75,20 @@ struct bdb_header {
u16 bdb_size;
 } __packed;
 
+/*
+ * BDB version number dependencies are documented as:
+ *
+ * +
+ *indicates the field was introduced in version 
+ *and is still valid
+ *
+ * -
+ *indicates the field was introduced in version 
+ *and obsoleted in version +1.
+ *
+ * ??? indicates the specific version number is unknown
+ */
+
 /*
  * There are several types of BIOS data blocks (BDBs), each block has
  * an ID and size in the first 3 bytes (ID in first, size in next 2).
@@ -144,12 +158,12 @@ struct bdb_general_features {
 /* bits 3 */
u8 disable_smooth_vision:1;
u8 single_dvi:1;
-   u8 rotate_180:1;/* 181 */
+   u8 rotate_180:1;/* 181+ */
u8 fdi_rx_polarity_inverted:1;
-   u8 vbios_extended_mode:1;   /* 160 */
-   u8 copy_ilfp_dtd_to_sdvo_lvds_dtd:1;/* 160 */
-   u8 panel_best_fit_timing:1; /* 160 */
-   u8 ignore_strap_state:1;/* 160 */
+   u8 vbios_extended_mode:1;   /* 160+ */
+   u8 copy_ilfp_dtd_to_sdvo_lvds_dtd:1;/* 160+ */
+   u8 panel_best_fit_timing:1; /* 160+ */
+   u8 ignore_strap_state:1;/* 160+ */
 
 /* bits 4 */
u8 legacy_monitor_detect;
@@ -164,11 +178,11 @@ struct bdb_general_features {
u8 rsvd11:2; /* finish byte */
 
/* bits 6 */
-   u8 tc_hpd_retry_timeout:7; /* 242 */
+   u8 tc_hpd_retry_timeout:7;  /* 242+ */
u8 rsvd12:1;
 
/* bits 7 */
-   u8 afc_startup_config:2;/* 249 */
+   u8 afc_startup_config:2;/* 249+ */
u8 rsvd13:6;
 } __packed;
 
@@ -275,27 +289,27 @@ struct bdb_general_features {
 #define DVO_PORT_DPC   8
 #define DVO_PORT_DPD   9
 #define DVO_PORT_DPA   10
-#define DVO_PORT_DPE   11  /* 193 */
-#define DVO_PORT_HDMIE 12  /* 193 */
+#define DVO_PORT_DPE   11  /* 193+ */
+#define DVO_PORT_HDMIE 12  /* 193+ */
 #define DVO_PORT_DPF   13  /* N/A */
 #define DVO_PORT_HDMIF 14  /* N/A */
-#define DVO_PORT_DPG   15  /* 217 */
-#define DVO_PORT_HDMIG 16  /* 217 */
-#define DVO_PORT_DPH   17  /* 217 */
-#define DVO_PORT_HDMIH 18  /* 217 */
-#define DVO_PORT_DPI   19  /* 217 */
-#define DVO_PORT_HDMII 20  /* 217 */
-#define DVO_PORT_MIPIA 21  /* 171 */
-#define DVO_PORT_MIPIB 22  /* 171 */
-#define DVO_PORT_MIPIC 23  /* 171 */
-#define DVO_PORT_MIPID 24  /* 171 */
+#define DVO_PORT_DPG   15  /* 217+ */
+#define DVO_PORT_HDMIG 16  /* 217+ */
+#define DVO_PORT_DPH   17  /* 217+ */
+#define DVO_PORT_HDMIH 18  /* 217+ */
+#define DVO_PORT_DPI   19  /* 217+ */
+#define DVO_PORT_HDMII 20  /* 217+ */
+#define DVO_PORT_MIPIA 21  /* 171+ */
+#define DVO_PORT_MIPIB 22  /* 171+ */
+#define DVO_PORT_MIPIC 23  /* 171+ */
+#define DVO_PORT_MIPID 24  /* 171+ */
 
-#define HDMI_MAX_DATA_RATE_PLATFORM0   /* 204 */
-#define HDMI_MAX_DATA_RATE_297 1   /* 204 */
-#define HDMI_MAX_DATA_RATE_165 2   /* 204 */
-#define HDMI_MAX_DATA_RATE_594 3   /* 249 */
-#define HDMI_MAX_DATA_RATE_340 4   /* 249 */
-#define HDMI_MAX_DATA_RATE_300 5   /* 249 */
+#define 

[Intel-gfx] [PATCH 07/12] drm/i915: Document the sets of bits in the driver features block

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

Add a few comment documenting the sets of bits in the driver
features block. Might make it a bit easier to check against
the spec.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 8bdb533b5304..c04937aa75b2 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -542,6 +542,7 @@ struct bdb_psr {
 #define BDB_DRIVER_FEATURE_INT_SDVO_LVDS   3
 
 struct bdb_driver_features {
+   /* Driver bits */
u8 boot_dev_algorithm:1;
u8 block_display_switch:1;
u8 allow_display_switch:1;
@@ -556,6 +557,7 @@ struct bdb_driver_features {
u8 boot_mode_bpp;
u8 boot_mode_refresh;
 
+   /* Extended Driver Bits 1 */
u16 enable_lfp_primary:1;
u16 selective_mode_pruning:1;
u16 dual_frequency:1;
@@ -571,6 +573,7 @@ struct bdb_driver_features {
u16 tv_hotplug:1;
u16 hdmi_config:2;
 
+   /* Driver Flags 1 */
u8 static_display:1;/* 163+ */
u8 reserved2:7;
 
@@ -578,8 +581,12 @@ struct bdb_driver_features {
u16 legacy_crt_max_y;
u8 legacy_crt_max_refresh;
 
+   /* Extended Driver Bits 2 */
u8 hdmi_termination;
+
u8 custom_vbt_version;  /* 165+ */
+
+   /* Driver Feature Flags */
u16 rmpm_enabled:1; /* 165+ */
u16 s2ddt_enabled:1;/* 165+ */
u16 dpst_enabled:1; /* 165-227 */
-- 
2.35.1



Re: [Intel-gfx] [PATCH v2 24/39] drm/i915: dvo_sil164.c: use SPDX header

2022-07-16 Thread Joe Perches
On Fri, 2022-07-15 at 17:35 -0400, Rodrigo Vivi wrote:
> On Wed, Jul 13, 2022 at 09:12:12AM +0100, Mauro Carvalho Chehab wrote:
> > This file is licensed with MIT license. Change its license text
> > to use SPDX.
> > 
> > Signed-off-by: Mauro Carvalho Chehab 
> 
> Reviewed-by: Rodrigo Vivi 

Not exactly the MIT license as it's missing "or copyright holders"
> 
> > ---
> > 
> > To avoid mailbombing on a large number of people, only mailing lists were 
> > C/C on the cover.
> > See [PATCH v2 00/39] at: 
> > https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> > 
> >  drivers/gpu/drm/i915/display/dvo_sil164.c | 32 +--
> >  1 file changed, 6 insertions(+), 26 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/dvo_sil164.c 
> > b/drivers/gpu/drm/i915/display/dvo_sil164.c
> > index 0dfa0a0209ff..12974f7c9dc1 100644
> > --- a/drivers/gpu/drm/i915/display/dvo_sil164.c
> > +++ b/drivers/gpu/drm/i915/display/dvo_sil164.c
> > @@ -1,30 +1,10 @@
> > -/**
> > +// SPDX-License-Identifier: MIT
> >  
> > -Copyright © 2006 Dave Airlie
> > -
> > -All Rights Reserved.
> > -
> > -Permission is hereby granted, free of charge, to any person obtaining a
> > -copy of this software and associated documentation files (the
> > -"Software"), to deal in the Software without restriction, including
> > -without limitation the rights to use, copy, modify, merge, publish,
> > -distribute, sub license, and/or sell copies of the Software, and to
> > -permit persons to whom the Software is furnished to do so, subject to
> > -the following conditions:
> > -
> > -The above copyright notice and this permission notice (including the
> > -next paragraph) shall be included in all copies or substantial portions
> > -of the Software.
> > -
> > -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> > -OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> > -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
> > -IN NO EVENT SHALL THE AUTHOR

Missing "Authors or copyright holders"

> > BE LIABLE FOR
> > -ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
> > -TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> > -SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> > -
> > -**/
> > +/*
> > + * Copyright © 2006 Dave Airlie
> > + *
> > + * All Rights Reserved.
> > + */
> >  
> >  #include "intel_display_types.h"
> >  #include "intel_dvo_dev.h"
> > -- 
> > 2.36.1
> > 



Re: [Intel-gfx] [PATCH v2 23/39] drm/i915: dvo_ch7xxx.c: use SPDX header

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:11AM +0100, Mauro Carvalho Chehab wrote:
> This file is licensed with MIT license. Change its license text
> to use SPDX.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/display/dvo_ch7xxx.c | 33 +--
>  1 file changed, 6 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c 
> b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> index 1c1fe1f29675..b4d94a565fdb 100644
> --- a/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> +++ b/drivers/gpu/drm/i915/display/dvo_ch7xxx.c
> @@ -1,30 +1,9 @@
> -/**
> -
> -Copyright © 2006 Dave Airlie
> -
> -All Rights Reserved.
> -
> -Permission is hereby granted, free of charge, to any person obtaining a
> -copy of this software and associated documentation files (the
> -"Software"), to deal in the Software without restriction, including
> -without limitation the rights to use, copy, modify, merge, publish,
> -distribute, sub license, and/or sell copies of the Software, and to
> -permit persons to whom the Software is furnished to do so, subject to
> -the following conditions:
> -
> -The above copyright notice and this permission notice (including the
> -next paragraph) shall be included in all copies or substantial portions
> -of the Software.
> -
> -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> -OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
> -IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> -ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
> -TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> -SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> -
> -**/
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2006 Dave Airlie
> + *
> + * All Rights Reserved.
> + */
>  
>  #include "intel_display_types.h"
>  #include "intel_dvo_dev.h"
> -- 
> 2.36.1
> 


[Intel-gfx] [PATCH 06/12] drm/i915: Define VBT max HDMI FRL rate bits

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

The VBT gained some bits to inidicate the max FRL rate for
HDMI 2.1, define them.

These just outright replaced the slave_port bits for ganged eDP.
Apparently that feature was never actually used so someone decided
that reusing the bits is fine. Although the actual ganged eDP
enable bit was still left defined elsewhere for some reason.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index b15e29509fac..8bdb533b5304 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -412,8 +412,10 @@ struct child_device_config {
u8 reserved2:3;
u8 compression_structure_index:4;   /* 198+ */
u8 reserved3:4;
-   u8 slave_port;  /* 202+ */
-   u8 reserved4;
+   u8 hdmi_max_frl_rate:4; /* 237+ */
+   u8 hdmi_max_frl_rate_valid:1;   /* 237+ */
+   u8 reserved4:3; /* 237+ */
+   u8 reserved5;
} __packed;
} __packed;
 
-- 
2.35.1



[Intel-gfx] [PATCH 04/12] drm/i915: Define VBT eDP/DP max lane count bits

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

Since version 244 the VBT can llimt the eDP/DP max lane count.
Add the bits.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index a88c5ef51cd8..d583bb085913 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -438,7 +438,7 @@ struct child_device_config {
u8 iboost:1;/* 196+ */
u8 hpd_invert:1;/* 196+ */
u8 use_vbt_vswing:1;/* 218+ */
-   u8 flag_reserved:2;
+   u8 dp_max_lane_count:2; /* 244+ */
u8 hdmi_support:1;  /* 158+ */
u8 dp_support:1;/* 158+ */
u8 tmds_support:1;  /* 158+ */
-- 
2.35.1



Re: [Intel-gfx] [PATCH v2 14/39] drm/i915: document kernel-doc trivial issues

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:02AM +0100, Mauro Carvalho Chehab wrote:
> Fix those kernel-doc warnings:
>   drivers/gpu/drm/i915/intel_region_ttm.c:199: warning: Function 
> parameter or member 'offset' not described in 
> 'intel_region_ttm_resource_alloc'
>   drivers/gpu/drm/i915/i915_vma_resource.h:123: warning: Function 
> parameter or member 'wakeref' not described in 'i915_vma_resource'
>   drivers/gpu/drm/i915/i915_vma.c:1703: warning: Function parameter or 
> member 'vma' not described in 'i915_vma_destroy_locked'
>   drivers/gpu/drm/i915/i915_vma.c:751: warning: Function parameter or 
> member 'ww' not described in 'i915_vma_insert'
>   drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:159: warning: Function 
> parameter or member 'gt' not described in 'intel_gt_fini_hwconfig'
>   drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:146: warning: Function 
> parameter or member 'gt' not described in 'intel_gt_init_hwconfig'
>   drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:113: warning: expecting 
> prototype for intel_guc_hwconfig_init(). Prototype was for 
> guc_hwconfig_init() instead
>   drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c:113: warning: Function 
> parameter or member 'gt' not described in 'guc_hwconfig_init'
>   drivers/gpu/drm/i915/gt/intel_engine_types.h:276: warning: Function 
> parameter or member 'preempt_hang' not described in 'intel_engine_execlists'
> 
> That are due undocumented parameters.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/gt/intel_engine_types.h| 1 +
>  drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c | 5 -
>  drivers/gpu/drm/i915/i915_vma.c | 2 ++
>  drivers/gpu/drm/i915/i915_vma_resource.h| 1 +
>  drivers/gpu/drm/i915/intel_region_ttm.c | 3 ++-
>  5 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h 
> b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> index 633a7e5dba3b..7c5ad9071fe7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
> @@ -271,6 +271,7 @@ struct intel_engine_execlists {
>*/
>   u8 csb_head;
>  
> + /* private: Used only in selftests */
>   I915_SELFTEST_DECLARE(struct st_preempt_hang preempt_hang;)
>  };
>  
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c 
> b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
> index 4781fccc2687..76f7447302a6 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.c
> @@ -103,7 +103,8 @@ static bool has_table(struct drm_i915_private *i915)
>  }
>  
>  /**
> - * intel_guc_hwconfig_init - Initialize the HWConfig
> + * guc_hwconfig_init - Initialize the HWConfig
> + * @gt: GT structure
>   *
>   * Retrieve the HWConfig table from the GuC and save it locally.
>   * It can then be queried on demand by other users later on.
> @@ -138,6 +139,7 @@ static int guc_hwconfig_init(struct intel_gt *gt)
>  
>  /**
>   * intel_gt_init_hwconfig - Initialize the HWConfig if available
> + * @gt: GT structure
>   *
>   * Retrieve the HWConfig table if available on the current platform.
>   */
> @@ -151,6 +153,7 @@ int intel_gt_init_hwconfig(struct intel_gt *gt)
>  
>  /**
>   * intel_gt_fini_hwconfig - Finalize the HWConfig
> + * @gt: GT structure
>   *
>   * Free up the memory allocation holding the table.
>   */
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index ef3b04c7e153..ddf348c597b0 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -733,6 +733,7 @@ bool i915_gem_valid_gtt_space(struct i915_vma *vma, 
> unsigned long color)
>  /**
>   * i915_vma_insert - finds a slot for the vma in its address space
>   * @vma: the vma
> + * @ww: An optional struct i915_gem_ww_ctx
>   * @size: requested size in bytes (can be larger than the VMA)
>   * @alignment: required alignment
>   * @flags: mask of PIN_* flags to use
> @@ -1675,6 +1676,7 @@ static void release_references(struct i915_vma *vma, 
> struct intel_gt *gt,
>  /**
>   * i915_vma_destroy_locked - Remove all weak reference to the vma and put
>   * the initial reference.
> + * @vma: VMA to destroy
>   *
>   * This function should be called when it's decided the vma isn't needed
>   * anymore. The caller must assure that it doesn't race with another lookup
> diff --git a/drivers/gpu/drm/i915/i915_vma_resource.h 
> b/drivers/gpu/drm/i915/i915_vma_resource.h
> index 14a0327b2080..a15271d96b7e 100644
> --- a/drivers/gpu/drm/i915/i915_vma_resource.h
> +++ b/drivers/gpu/drm/i915/i915_vma_resource.h
> @@ -49,6 +49,7 @@ struct i915_page_sizes {
>   * @__subtree_last: 

[Intel-gfx] [PATCH 03/12] drm/i915: Properly define the DP redriver VBT bits

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

Split the DP redriver bytes into bitfields.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 16 +++-
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index e997b8bcc6b8..a88c5ef51cd8 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -393,8 +393,14 @@ struct child_device_config {
u8  device_id[10]; /* ascii string */
struct {
u8 i2c_speed;
-   u8 dp_onboard_redriver; /* 158+ */
-   u8 dp_ondock_redriver;  /* 158+ */
+   u8 dp_onboard_redriver_preemph:3;   /* 158+ */
+   u8 dp_onboard_redriver_vswing:3;/* 158+ */
+   u8 dp_onboard_redriver_present:1;   /* 158+ */
+   u8 reserved0:1;
+   u8 dp_ondock_redriver_preemph:3;/* 158+ */
+   u8 dp_ondock_redriver_vswing:3; /* 158+ */
+   u8 dp_ondock_redriver_present:1;/* 158+ */
+   u8 reserved1:1;
u8 hdmi_level_shifter_value:5;  /* 158+ */
u8 hdmi_max_data_rate:3;/* 204+ */
u16 dtd_buf_ptr;/* 161+ */
@@ -402,11 +408,11 @@ struct child_device_config {
u8 compression_enable:1;/* 198+ */
u8 compression_method_cps:1;/* 198+ */
u8 ganged_edp:1;/* 202+ */
-   u8 reserved0:4;
+   u8 reserved2:4;
u8 compression_structure_index:4;   /* 198+ */
-   u8 reserved1:4;
+   u8 reserved3:4;
u8 slave_port;  /* 202+ */
-   u8 reserved2;
+   u8 reserved4;
} __packed;
} __packed;
 
-- 
2.35.1



Re: [Intel-gfx] [PATCH v2 25/39] drm/i915: i915_vma_resource.c: fix some kernel-doc markups

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:13AM +0100, Mauro Carvalho Chehab wrote:
> Building docs currently produces two warnings:
> 
> Documentation/foo/i915:71: 
> ./drivers/gpu/drm/i915/i915_vma_resource.c:286: WARNING: Inline strong 
> start-string without end-string.
> Documentation/foo/i915:71: 
> ./drivers/gpu/drm/i915/i915_vma_resource.c:370: WARNING: Inline strong 
> start-string without end-string.
> 
> That's because @foo evaluates into **foo**, and placing anything
> after it without spaces cause Sphinx to warn and do the wrong
> thing.. So, replace them by a different Sphinx-compatible tag.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/i915_vma_resource.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_vma_resource.c 
> b/drivers/gpu/drm/i915/i915_vma_resource.c
> index 27c55027387a..fa5a678018d9 100644
> --- a/drivers/gpu/drm/i915/i915_vma_resource.c
> +++ b/drivers/gpu/drm/i915/i915_vma_resource.c
> @@ -283,7 +283,7 @@ i915_vma_resource_color_adjust_range(struct 
> i915_address_space *vm,
>   *
>   * The function needs to be called with the vm lock held.
>   *
> - * Return: Zero on success, -ERESTARTSYS if interrupted and @intr==true
> + * Return: Zero on success, -ERESTARTSYS if interrupted and ``intr==true``
>   */
>  int i915_vma_resource_bind_dep_sync(struct i915_address_space *vm,
>   u64 offset,
> @@ -367,7 +367,7 @@ void i915_vma_resource_bind_dep_sync_all(struct 
> i915_address_space *vm)
>   * this means that during heavy memory pressure, we will sync in this
>   * function.
>   *
> - * Return: Zero on success, -ERESTARTSYS if interrupted and @intr==true
> + * Return: Zero on success, -ERESTARTSYS if interrupted and ``intr==true``
>   */
>  int i915_vma_resource_bind_dep_await(struct i915_address_space *vm,
>struct i915_sw_fence *sw_fence,
> -- 
> 2.36.1
> 


[Intel-gfx] [PATCH 08/12] drm/i915: Define more VBT driver features block bits

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

Define some additoonal bits in the driver features VBT block.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 14 ++
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index c04937aa75b2..2feba1e69a6d 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -575,14 +575,19 @@ struct bdb_driver_features {
 
/* Driver Flags 1 */
u8 static_display:1;/* 163+ */
-   u8 reserved2:7;
+   u8 embedded_platform:1; /* 163+ */
+   u8 display_subsystem_enable:1;  /* 163+ */
+   u8 reserved0:5;
 
u16 legacy_crt_max_x;
u16 legacy_crt_max_y;
u8 legacy_crt_max_refresh;
 
/* Extended Driver Bits 2 */
-   u8 hdmi_termination;
+   u8 hdmi_termination:1;
+   u8 cea861d_hdmi_support:1;
+   u8 self_refresh_enable:1;
+   u8 reserved1:5;
 
u8 custom_vbt_version;  /* 165+ */
 
@@ -598,9 +603,10 @@ struct bdb_driver_features {
u16 tbt_enabled:1;  /* 165+ */
u16 psr_enabled:1;  /* 165-227 */
u16 ips_enabled:1;  /* 165+ */
-   u16 reserved3:1;
+   u16 dpfs_enabled:1; /* 165+ */
u16 dmrrs_enabled:1;/* 174-227 */
-   u16 reserved4:2;
+   u16 adt_enabled:1;  /* ???-228 */
+   u16 hpd_wake:1; /* 201-240 */
u16 pc_feature_valid:1;
 } __packed;
 
-- 
2.35.1



[Intel-gfx] [PATCH 10/12] drm/i915: Rename some VBT bits

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

The allow vs. block display switch bits are named rather
inconsistently. Fix it up.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index f56c869e106f..62183c6bdc10 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -553,8 +553,8 @@ struct bdb_psr {
 struct bdb_driver_features {
/* Driver bits */
u8 boot_dev_algorithm:1;
-   u8 block_display_switch:1;
-   u8 allow_display_switch:1;
+   u8 allow_display_switch_dvd:1;
+   u8 allow_display_switch_dos:1;
u8 hotplug_dvo:1;
u8 dual_view_zoom:1;
u8 int15h_hook:1;
-- 
2.35.1



Re: [Intel-gfx] [PATCH v2 24/39] drm/i915: dvo_sil164.c: use SPDX header

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:12AM +0100, Mauro Carvalho Chehab wrote:
> This file is licensed with MIT license.   Change its license text
> to use SPDX.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/display/dvo_sil164.c | 32 +--
>  1 file changed, 6 insertions(+), 26 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/dvo_sil164.c 
> b/drivers/gpu/drm/i915/display/dvo_sil164.c
> index 0dfa0a0209ff..12974f7c9dc1 100644
> --- a/drivers/gpu/drm/i915/display/dvo_sil164.c
> +++ b/drivers/gpu/drm/i915/display/dvo_sil164.c
> @@ -1,30 +1,10 @@
> -/**
> +// SPDX-License-Identifier: MIT
>  
> -Copyright © 2006 Dave Airlie
> -
> -All Rights Reserved.
> -
> -Permission is hereby granted, free of charge, to any person obtaining a
> -copy of this software and associated documentation files (the
> -"Software"), to deal in the Software without restriction, including
> -without limitation the rights to use, copy, modify, merge, publish,
> -distribute, sub license, and/or sell copies of the Software, and to
> -permit persons to whom the Software is furnished to do so, subject to
> -the following conditions:
> -
> -The above copyright notice and this permission notice (including the
> -next paragraph) shall be included in all copies or substantial portions
> -of the Software.
> -
> -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
> -OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> -MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
> -IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> -ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
> -TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
> -SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> -
> -**/
> +/*
> + * Copyright © 2006 Dave Airlie
> + *
> + * All Rights Reserved.
> + */
>  
>  #include "intel_display_types.h"
>  #include "intel_dvo_dev.h"
> -- 
> 2.36.1
> 


Re: [Intel-gfx] [PATCH v2 20/39] drm/i915: i915_gem_wait.c: fix a kernel-doc markup

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:08AM +0100, Mauro Carvalho Chehab wrote:
> The return codes for i915_gem_wait_ioctl() have identation issues,
> and will be displayed on a very confusing way. Use lists to improve
> its output.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/gem/i915_gem_wait.c | 24 +---
>  1 file changed, 13 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_wait.c 
> b/drivers/gpu/drm/i915/gem/i915_gem_wait.c
> index 4a33ad2d122b..1fd5cff552ed 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_wait.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_wait.c
> @@ -210,23 +210,25 @@ static unsigned long to_wait_timeout(s64 timeout_ns)
>   * @data: ioctl data blob
>   * @file: drm file pointer
>   *
> - * Returns 0 if successful, else an error is returned with the remaining 
> time in
> - * the timeout parameter.
> - *  -ETIME: object is still busy after timeout
> - *  -ERESTARTSYS: signal interrupted the wait
> - *  -ENONENT: object doesn't exist
> - * Also possible, but rare:
> - *  -EAGAIN: incomplete, restart syscall
> - *  -ENOMEM: damn
> - *  -ENODEV: Internal IRQ fail
> - *  -E?: The add request failed
> - *
>   * The wait ioctl with a timeout of 0 reimplements the busy ioctl. With any
>   * non-zero timeout parameter the wait ioctl will wait for the given number 
> of
>   * nanoseconds on an object becoming unbusy. Since the wait itself does so
>   * without holding struct_mutex the object may become re-busied before this
>   * function completes. A similar but shorter * race condition exists in the 
> busy
>   * ioctl
> + *
> + * Returns:
> + * 0 if successful, else an error is returned with the remaining time in
> + * the timeout parameter.
> + * * -ETIME: object is still busy after timeout
> + * * -ERESTARTSYS: signal interrupted the wait
> + * * -ENONENT: object doesn't exist
> + *
> + * Also possible, but rare:
> + * * -EAGAIN: incomplete, restart syscall
> + * * -ENOMEM: damn
> + * * -ENODEV: Internal IRQ fail
> + * * -E?: The add request failed
>   */
>  int
>  i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file 
> *file)
> -- 
> 2.36.1
> 


Re: [Intel-gfx] [PATCH 07/12] drm/i915/guc: Route semaphores to GuC for Gen12+

2022-07-16 Thread Ceraolo Spurio, Daniele




On 7/12/2022 4:31 PM, john.c.harri...@intel.com wrote:

From: Michał Winiarski 

Since we're going to use semaphores in selftests (and eventually in
regular GuC submission), let's route semaphores to GuC.


I'd specify that this interrupt is only relevant for semaphores that 
context switch out when their condition is not satisfied, which is not 
something we currently allow (but we do plan to as you mentioned). Also, 
the routing only happens when in GuC submission mode.


Reviewed-by: Daniele Ceraolo Spurio 

Daniele



Signed-off-by: Michał Winiarski 
---
  drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h|  4 
  drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 14 ++
  2 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
index 8dc063f087eb1..a7092f711e9cd 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_reg.h
@@ -102,6 +102,10 @@
  #define   GUC_SEND_TRIGGER  (1<<0)
  #define GEN11_GUC_HOST_INTERRUPT  _MMIO(0x1901f0)
  
+#define GEN12_GUC_SEM_INTR_ENABLES	_MMIO(0xc71c)

+#define   GUC_SEM_INTR_ROUTE_TO_GUCBIT(31)
+#define   GUC_SEM_INTR_ENABLE_ALL  (0xff)
+
  #define GUC_NUM_DOORBELLS 256
  
  /* format of the HW-monitored doorbell cacheline */

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index 40f726c61e951..7537459080278 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -3953,13 +3953,27 @@ int intel_guc_submission_setup(struct intel_engine_cs 
*engine)
  
  void intel_guc_submission_enable(struct intel_guc *guc)

  {
+   struct intel_gt *gt = guc_to_gt(guc);
+
+   /* Enable and route to GuC */
+   if (GRAPHICS_VER(gt->i915) >= 12)
+   intel_uncore_write(gt->uncore, GEN12_GUC_SEM_INTR_ENABLES,
+  GUC_SEM_INTR_ROUTE_TO_GUC |
+  GUC_SEM_INTR_ENABLE_ALL);
+
guc_init_lrc_mapping(guc);
guc_init_engine_stats(guc);
  }
  
  void intel_guc_submission_disable(struct intel_guc *guc)

  {
+   struct intel_gt *gt = guc_to_gt(guc);
+
/* Note: By the time we're here, GuC may have already been reset */
+
+   /* Disable and route to host */
+   if (GRAPHICS_VER(gt->i915) >= 12)
+   intel_uncore_write(gt->uncore, GEN12_GUC_SEM_INTR_ENABLES, 0x0);
  }
  
  static bool __guc_submission_supported(struct intel_guc *guc)




[Intel-gfx] [PATCH 09/12] drm/i915: Define all possible VBT device handles

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

We already have LFP1 and LFP2 device handles define. Just
add all the rest as well.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 2feba1e69a6d..f56c869e106f 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -197,6 +197,15 @@ struct bdb_general_features {
 #define GPIO_PIN_ADD_DDC_I2C   0x06 /* "ADDCARD DDC/I2C GPIO pins" */
 
 /* Device handle */
+#define DEVICE_HANDLE_CRT  0x0001
+#define DEVICE_HANDLE_EFP1 0x0004
+#define DEVICE_HANDLE_EFP2 0x0040
+#define DEVICE_HANDLE_EFP3 0x0020
+#define DEVICE_HANDLE_EFP4 0x0010 /* 194+ */
+#define DEVICE_HANDLE_EFP5 0x0002 /* 215+ */
+#define DEVICE_HANDLE_EFP6 0x0001 /* 217+ */
+#define DEVICE_HANDLE_EFP7 0x0100 /* 217+ */
+#define DEVICE_HANDLE_EFP8 0x0200 /* 217+ */
 #define DEVICE_HANDLE_LFP1 0x0008
 #define DEVICE_HANDLE_LFP2 0x0080
 
-- 
2.35.1



[Intel-gfx] [PATCH 00/12] drm/i915: More VBT stuff

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

Bunch of VBT work:
- cleanup of version number comments
- document more bits
- rename a few misnamed things
- warn if any port wants to use the VBT vswing tables
- parse the new DP lane count limit

Ville Syrjälä (12):
  drm/i915: Unify VBT version number comments
  drm/i915: Add some more VBT version number comments
  drm/i915: Properly define the DP redriver VBT bits
  drm/i915: Define VBT eDP/DP max lane count bits
  drm/i915: Add the VBT LTTPR transparent vs. non-transparent bits
  drm/i915: Define VBT max HDMI FRL rate bits
  drm/i915: Document the sets of bits in the driver features block
  drm/i915: Define more VBT driver features block bits
  drm/i915: Define all possible VBT device handles
  drm/i915: Rename some VBT bits
  drm/i915: WARN if a port should use VBT provided vswing tables
  drm/i915: Parse DP/eDP max lane count from VBT

 drivers/gpu/drm/i915/display/intel_bios.c |  20 ++
 drivers/gpu/drm/i915/display/intel_bios.h |   1 +
 drivers/gpu/drm/i915/display/intel_dp.c   |  13 +-
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 333 ++
 4 files changed, 222 insertions(+), 145 deletions(-)

-- 
2.35.1



Re: [Intel-gfx] [PATCH v2 28/39] drm/i915: i915_deps: use a shorter title markup

2022-07-16 Thread Rodrigo Vivi
On Wed, Jul 13, 2022 at 09:12:16AM +0100, Mauro Carvalho Chehab wrote:
> The DOC: tag waits for a one-line short title for the doc
> section. Using multiple lines will produce a weird output.
> So, add a shorter description for the title, while keeping
> the current content below it.
> 
> Signed-off-by: Mauro Carvalho Chehab 

Reviewed-by: Rodrigo Vivi 

> ---
> 
> To avoid mailbombing on a large number of people, only mailing lists were C/C 
> on the cover.
> See [PATCH v2 00/39] at: 
> https://lore.kernel.org/all/cover.1657699522.git.mche...@kernel.org/
> 
>  drivers/gpu/drm/i915/i915_deps.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_deps.c 
> b/drivers/gpu/drm/i915/i915_deps.c
> index 297b8e4e42ee..df6af832e3f2 100644
> --- a/drivers/gpu/drm/i915/i915_deps.c
> +++ b/drivers/gpu/drm/i915/i915_deps.c
> @@ -11,7 +11,9 @@
>  #include "i915_deps.h"
>  
>  /**
> - * DOC: Set of utilities to dynamically collect dependencies into a
> + * DOC: Utilities to collect dependencies for GT migration code
> + *
> + * Set of utilities to dynamically collect dependencies into a
>   * structure which is fed into the GT migration code.
>   *
>   * Once we can do async unbinding, this is also needed to coalesce
> -- 
> 2.36.1
> 


[Intel-gfx] [PATCH 02/12] drm/i915: Add some more VBT version number comments

2022-07-16 Thread Ville Syrjala
From: Ville Syrjälä 

Document the VBT version dependency of several other fields.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vbt_defs.h | 76 +--
 1 file changed, 38 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h 
b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index ba328d130991..e997b8bcc6b8 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -502,25 +502,25 @@ struct bdb_general_definitions {
 
 struct psr_table {
/* Feature bits */
-   u8 full_link:1;
-   u8 require_aux_to_wakeup:1;
+   u8 full_link:1; /* 165+ */
+   u8 require_aux_to_wakeup:1; /* 165+ */
u8 feature_bits_rsvd:6;
 
/* Wait times */
-   u8 idle_frames:4;
-   u8 lines_to_wait:3;
+   u8 idle_frames:4;   /* 165+ */
+   u8 lines_to_wait:3; /* 165+ */
u8 wait_times_rsvd:1;
 
/* TP wake up time in multiple of 100 */
-   u16 tp1_wakeup_time;
-   u16 tp2_tp3_wakeup_time;
+   u16 tp1_wakeup_time;/* 165+ */
+   u16 tp2_tp3_wakeup_time;/* 165+ */
 } __packed;
 
 struct bdb_psr {
struct psr_table psr_table[16];
 
/* PSR2 TP2/TP3 wakeup time for 16 panels */
-   u32 psr2_tp2_tp3_wakeup_time;
+   u32 psr2_tp2_tp3_wakeup_time;   /* 226+ */
 } __packed;
 
 /*
@@ -562,28 +562,28 @@ struct bdb_driver_features {
u16 tv_hotplug:1;
u16 hdmi_config:2;
 
-   u8 static_display:1;
+   u8 static_display:1;/* 163+ */
u8 reserved2:7;
+
u16 legacy_crt_max_x;
u16 legacy_crt_max_y;
u8 legacy_crt_max_refresh;
 
u8 hdmi_termination;
-   u8 custom_vbt_version;
-   /* Driver features data block */
-   u16 rmpm_enabled:1;
-   u16 s2ddt_enabled:1;
-   u16 dpst_enabled:1;
-   u16 bltclt_enabled:1;
-   u16 adb_enabled:1;
-   u16 drrs_enabled:1;
-   u16 grs_enabled:1;
-   u16 gpmt_enabled:1;
-   u16 tbt_enabled:1;
-   u16 psr_enabled:1;
-   u16 ips_enabled:1;
+   u8 custom_vbt_version;  /* 165+ */
+   u16 rmpm_enabled:1; /* 165+ */
+   u16 s2ddt_enabled:1;/* 165+ */
+   u16 dpst_enabled:1; /* 165-227 */
+   u16 bltclt_enabled:1;   /* 165+ */
+   u16 adb_enabled:1;  /* 165-227 */
+   u16 drrs_enabled:1; /* 165-227 */
+   u16 grs_enabled:1;  /* 165+ */
+   u16 gpmt_enabled:1; /* 165+ */
+   u16 tbt_enabled:1;  /* 165+ */
+   u16 psr_enabled:1;  /* 165-227 */
+   u16 ips_enabled:1;  /* 165+ */
u16 reserved3:1;
-   u16 dmrrs_enabled:1;
+   u16 dmrrs_enabled:1;/* 174-227 */
u16 reserved4:2;
u16 pc_feature_valid:1;
 } __packed;
@@ -671,7 +671,7 @@ struct bdb_sdvo_panel_dtds {
 
 
 struct edp_fast_link_params {
-   u8 rate:4;
+   u8 rate:4;  /* ???-223 */
u8 lanes:4;
u8 preemphasis:4;
u8 vswing:4;
@@ -731,7 +731,7 @@ struct bdb_lvds_options {
u8 pfit_gfx_mode_enhanced:1;
u8 pfit_ratio_auto:1;
u8 pixel_dither:1;
-   u8 lvds_edid:1;
+   u8 lvds_edid:1; /* ???-240 */
u8 rsvd2:1;
u8 rsvd4;
/* LVDS Panel channel bits stored here */
@@ -745,7 +745,7 @@ struct bdb_lvds_options {
/* LVDS panel type bits stored here */
u32 dps_panel_type_bits;
/* LVDS backlight control type bits stored here */
-   u32 blt_control_type_bits;
+   u32 blt_control_type_bits;  /* ???-240 */
 
u16 lcdvcc_s0_enable;   /* 200+ */
u32 rotation;   /* 228+ */
@@ -888,8 +888,8 @@ struct lfp_power_features {
u8 reserved1:1;
u8 power_conservation_pref:3;
u8 reserved2:1;
-   u8 lace_enabled_status:1;
-   u8 lace_support:1;
+   u8 lace_enabled_status:1;   /* 210+ 
*/
+   u8 lace_support:1;  /* 210+ 
*/
u8 als_enable:1;
 } __packed;
 
@@ -909,19 +909,19 @@ struct aggressiveness_profile2_entry {
 } __packed;
 
 struct 

Re: [Intel-gfx] [PATCH v2 16/29] ACPI: video: Add Nvidia WMI EC brightness control detection

2022-07-16 Thread Hans de Goede
Hi,

On 7/15/22 17:32, Daniel Dadap wrote:
> 
> 
>> On Jul 15, 2022, at 06:59, Hans de Goede  wrote:
>>
>> Hi Daniel,
>>
>>> On 7/12/22 22:13, Daniel Dadap wrote:
>>> Thanks, Hans:
>>>
 On 7/12/22 14:38, Hans de Goede wrote:
 On some new laptop designs a new Nvidia specific WMI interface is present
 which gives info about panel brightness control and may allow controlling
 the brightness through this interface when the embedded controller is used
 for brightness control.

 When this WMI interface is present and indicates that the EC is used,
 then this interface should be used for brightness control.

 Signed-off-by: Hans de Goede 
 ---
   drivers/acpi/Kconfig   |  1 +
   drivers/acpi/video_detect.c| 35 ++
   drivers/gpu/drm/gma500/Kconfig |  2 ++
   drivers/gpu/drm/i915/Kconfig   |  2 ++
   include/acpi/video.h   |  1 +
   5 files changed, 41 insertions(+)

 diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
 index 1e34f846508f..c372385cfc3f 100644
 --- a/drivers/acpi/Kconfig
 +++ b/drivers/acpi/Kconfig
 @@ -212,6 +212,7 @@ config ACPI_VIDEO
   tristate "Video"
   depends on X86 && BACKLIGHT_CLASS_DEVICE
   depends on INPUT
 +depends on ACPI_WMI
   select THERMAL
   help
 This driver implements the ACPI Extensions For Display Adapters
 diff --git a/drivers/acpi/video_detect.c b/drivers/acpi/video_detect.c
 index 8c2863403040..7b89dc9a04a2 100644
 --- a/drivers/acpi/video_detect.c
 +++ b/drivers/acpi/video_detect.c
 @@ -75,6 +75,35 @@ find_video(acpi_handle handle, u32 lvl, void *context, 
 void **rv)
   return AE_OK;
   }
   +#define WMI_BRIGHTNESS_METHOD_SOURCE2
 +#define WMI_BRIGHTNESS_MODE_GET0
 +#define WMI_BRIGHTNESS_SOURCE_EC2
 +
 +struct wmi_brightness_args {
 +u32 mode;
 +u32 val;
 +u32 ret;
 +u32 ignored[3];
 +};
 +
 +static bool nvidia_wmi_ec_supported(void)
 +{
 +struct wmi_brightness_args args = {
 +.mode = WMI_BRIGHTNESS_MODE_GET,
 +.val = 0,
 +.ret = 0,
 +};
 +struct acpi_buffer buf = { (acpi_size)sizeof(args),  };
 +acpi_status status;
 +
 +status = wmi_evaluate_method("603E9613-EF25-4338-A3D0-C46177516DB7", 
 0,
 + WMI_BRIGHTNESS_METHOD_SOURCE, , );
 +if (ACPI_FAILURE(status))
 +return false;
 +
 +return args.ret == WMI_BRIGHTNESS_SOURCE_EC;
 +}
 +
>>>
>>>
>>> The code duplication here with nvidia-wmi-ec-backlight.c is a little 
>>> unfortunate. Can we move the constants, struct definition, and WMI GUID 
>>> from that file to a header file that's used both by the EC backlight driver 
>>> and the ACPI video driver?
>>
>> Yes that is a good idea. I suggest using 
>> include/linux/platform_data/x86/nvidia-wmi-ec-backlight.h
>> to move the shared definitions there.
>>
>> If you can submit 2 patches on top of this series:
>>
>> 1. Moving the definitions from 
>> drivers/platform/x86/nvidia-wmi-ec-backlight.c to
>>   include/linux/platform_data/x86/nvidia-wmi-ec-backlight.h
>>
>> 2. Switching the code from this patch over to using the new 
>> nvidia-wmi-ec-backlight.h
>>
>> Then for the next version I'll add patch 1. to the series and squash patch 2.
>> into this one.
>>
>>> I was thinking it might be nice to add a wrapper around 
>>> wmi_brightness_notify() in nvidia-wmi-ec-backlight.c that does this source 
>>> == WMI_BRIGHTNESS_SOURCE_EC test, and then export it so that it can be 
>>> called both here and in the EC backlight driver's probe routine, but then I 
>>> guess that would make video.ko depend on nvidia-wmi-ec-backlight.ko, which 
>>> seems wrong. It also seems wrong to implement the WMI plumbing in the ACPI 
>>> video driver, and export it so that the EC backlight driver can use it, so 
>>> I guess I can live with the duplication of the relatively simple WMI stuff 
>>> here, it would just be nice to not have to define all of the API constants, 
>>> structure, and GUID twice.
>>
>> Agreed.
>>
>>>
>>>
   /* Force to use vendor driver when the ACPI device is known to be
* buggy */
   static int video_detect_force_vendor(const struct dmi_system_id *d)
 @@ -518,6 +547,7 @@ static const struct dmi_system_id 
 video_detect_dmi_table[] = {
   static enum acpi_backlight_type __acpi_video_get_backlight_type(bool 
 native)
   {
   static DEFINE_MUTEX(init_mutex);
 +static bool nvidia_wmi_ec_present;
   static bool native_available;
   static bool init_done;
   static long video_caps;
 @@ -530,6 +560,7 @@ static enum acpi_backlight_type 
 __acpi_video_get_backlight_type(bool native)
   

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/kms: Stop registering multiple /sys/class/backlight devs for a single display (rev2)

2022-07-16 Thread Rodrigo Vivi
On Tue, Jul 12, 2022 at 08:39:32PM -, Patchwork wrote:
>Patch Details
> 
>Series: drm/kms: Stop registering multiple /sys/class/backlight devs
>for a single display (rev2)
>URL: [1]https://patchwork.freedesktop.org/series/104084/
>State: failure
>Details:
>[2]https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104084v2/index.ht
>ml
> 
>   CI Bug Log - changes from CI_DRM_11877 -> Patchwork_104084v2
> 
> Summary
> 
>FAILURE
> 
>Serious unknown changes coming with Patchwork_104084v2 absolutely need
>to be
>verified manually.
> 
>If you think the reported changes have nothing to do with the changes
>introduced in Patchwork_104084v2, please notify your bug team to allow
>them
>to document this new failure mode, which will reduce false positives in
>CI.
> 
>External URL:
>https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_104084v2/index.html
> 
> Participating hosts (39 -> 33)
> 
>Missing (6): bat-dg1-5 bat-dg2-8 bat-adlp-6 bat-adln-1 bat-rpls-2
>bat-jsl-1
> 
> Possible new issues
> 
>Here are the unknown changes that may have been introduced in
>Patchwork_104084v2:
> 
>   IGT changes
> 
> Possible regressions
> 
>  * igt@i915_selftest@live@evict:
>   + fi-bdw-5557u: [3]PASS -> [4]INCOMPLETE
> 
> Known issues
> 
>Here are the changes found in Patchwork_104084v2 that come from known
>issues:
> 
>   CI changes
> 
> Issues hit
> 
>  * boot:
>   + fi-bxt-dsi: [5]PASS -> [6]FAIL ([7]i915#6003)
> 
>   IGT changes
> 
> Issues hit
> 
>  * igt@i915_pm_backlight@basic-brightness:
>   + fi-bsw-kefka: [8]PASS -> [9]SKIP ([10]fdo#109271)
>   + fi-kbl-soraka: [11]PASS -> [12]SKIP ([13]fdo#109271)

Hans, did you have a change to check this?

>  * igt@i915_selftest@live@gtt:
>   + fi-bdw-5557u: [14]PASS -> [15]INCOMPLETE ([16]i915#5685)
>  * igt@kms_chamelium@common-hpd-after-suspend:
>   + fi-pnv-d510: NOTRUN -> [17]SKIP ([18]fdo#109271)
> 
> Possible fixes
> 
>  * igt@i915_module_load@load:
>   + {fi-tgl-dsi}: [19]DMESG-WARN ([20]i915#1982) -> [21]PASS
>  * igt@i915_selftest@live@requests:
>   + fi-pnv-d510: [22]DMESG-FAIL ([23]i915#4528) -> [24]PASS
> 
>{name}: This element is suppressed. This means it is ignored when
>computing
>the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
> Build changes
> 
>  * Linux: CI_DRM_11877 -> Patchwork_104084v2
> 
>CI-20190529: 20190529
>CI_DRM_11877: e55cefc370de5a38ee848aa96082d9d9f4cacdb9 @
>git://anongit.freedesktop.org/gfx-ci/linux
>IGT_6578: 7d289d89131ec37c1145bcdb86149914587d7406 @
>https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>Patchwork_104084v2: e55cefc370de5a38ee848aa96082d9d9f4cacdb9 @
>git://anongit.freedesktop.org/gfx-ci/linux
> 
>   Linux commits
> 
>03434f3a9b5d drm/todo: Add entry about dealing with brightness control
>on devices with > 1 panel
>f60a678ae3cb ACPI: video: Fix indentation of video_detect_dmi_table[]
>entries
>997c977f175b ACPI: video: Drop Clevo/TUXEDO NL5xRU and NL5xNU
>acpi_backlight=native quirks
>d1d4384a3f9c ACPI: video: Drop "Samsung X360" acpi_backlight=native
>quirk
>6c3fca7964c0 ACPI: video: Remove acpi_video_set_dmi_backlight_type()
>337df08b0d51 platform/x86: samsung-laptop: Move
>acpi_backlight=[vendor|native] quirks to ACPI video_detect.c
>88a0cccaf8a5 platform/x86: asus-wmi: Move acpi_backlight=native quirks
>to ACPI video_detect.c
>2c02ab2a967a platform/x86: asus-wmi: Move acpi_backlight=vendor quirks
>to ACPI video_detect.c
>b544046af222 platform/x86: asus-wmi: Drop DMI chassis-type check from
>backlight handling
>47ec79e43441 platform/x86: acer-wmi: Move backlight DMI quirks to
>acpi/video_detect.c
>8ac54c7cc01a platform/x86: toshiba_acpi: Stop using
>acpi_video_set_dmi_backlight_type()
>2c9a9d9c994e platform/x86: apple-gmux: Stop calling acpi/video.h
>functions
>b8f094cb3d41 ACPI: video: Add Apple GMUX brightness control detection
>94c7368718d0 ACPI: video: Add Nvidia WMI EC brightness control
>detection
>76f5965ce704 ACPI: video: Refactor acpi_video_get_backlight_type() a
>bit
>18c8318ff838 drm/radeon: Register ACPI video backlight when skipping
>radeon backlight registration
>55191d4ed5dd drm/amdgpu: Register ACPI video backlight when skipping
>amdgpu backlight registration
>6bf61ef3e8c1 drm/nouveau: Register ACPI video backlight when
>nv_backlight registration fails
>c4b53a8741ca drm/i915: Call acpi_video_register_backlight() (v2)
>2632beb4f21e ACPI: video: Remove code to unregister acpi_video
>backlight when a native backlight registers
>f50e9be5558a ACPI: video: Make backlight class device registration a
>separate step
>f488f7b8b479 ACPI: video: Simplify acpi_video_unregister_backlight()
>

[Intel-gfx] [PATCH 0/3] Fixes for damage clips handling

2022-07-16 Thread Jouni Högander
Currently damage clips handling is broken for planes when using big
framebuffer + offset in case kms driver adjusts drm_plane_state.src
coords. This is because damage clips are using coords relative to
original coords from user-space.

This patchset is fixing this by using original
coords from user-space instead of drm_plane_state.src when iterating
damage_clips.

Cc: Daniel Vetter 
Cc: Maarten Lankhorst 
Cc: Jani Nikula 
Cc: Ville Syrjälä 
Cc: José Roberto de Souza 
Cc: Mika Kahola 

Jouni Högander (3):
  drm: Use original src rect while initializing damage iterator
  drm/i915/display: Use original src in psr2 sel fetch area calculation
  drm/i915/display: Use drm helper instead of own loop for damage clips

 drivers/gpu/drm/drm_damage_helper.c  | 11 +++
 drivers/gpu/drm/i915/display/intel_psr.c | 20 +++-
 2 files changed, 14 insertions(+), 17 deletions(-)

-- 
2.25.1



[Intel-gfx] [PATCH 1/3] drm: Use original src rect while initializing damage iterator

2022-07-16 Thread Jouni Högander
drm_plane_state->src might be modified by the driver. This is done
e.g. in i915 driver when there is bigger framebuffer than the plane
and there is some offset within framebuffer. I915 driver calculates
separate offset and adjusts src rect coords to be relative to this
offset. Damage clips are still relative to original src coords
provided by user-space.

This patch ensures original coordinates provided by user-space are
used when initiliazing damage iterator.

Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/drm_damage_helper.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/drm_damage_helper.c 
b/drivers/gpu/drm/drm_damage_helper.c
index 937b699ac2a8..d8b2955e88fd 100644
--- a/drivers/gpu/drm/drm_damage_helper.c
+++ b/drivers/gpu/drm/drm_damage_helper.c
@@ -224,6 +224,7 @@ drm_atomic_helper_damage_iter_init(struct 
drm_atomic_helper_damage_iter *iter,
   const struct drm_plane_state *old_state,
   const struct drm_plane_state *state)
 {
+   struct drm_rect src;
memset(iter, 0, sizeof(*iter));
 
if (!state || !state->crtc || !state->fb || !state->visible)
@@ -233,10 +234,12 @@ drm_atomic_helper_damage_iter_init(struct 
drm_atomic_helper_damage_iter *iter,
iter->num_clips = drm_plane_get_damage_clips_count(state);
 
/* Round down for x1/y1 and round up for x2/y2 to catch all pixels */
-   iter->plane_src.x1 = state->src.x1 >> 16;
-   iter->plane_src.y1 = state->src.y1 >> 16;
-   iter->plane_src.x2 = (state->src.x2 >> 16) + !!(state->src.x2 & 0x);
-   iter->plane_src.y2 = (state->src.y2 >> 16) + !!(state->src.y2 & 0x);
+   src = drm_plane_state_src(state);
+
+   iter->plane_src.x1 = src.x1 >> 16;
+   iter->plane_src.y1 = src.y1 >> 16;
+   iter->plane_src.x2 = (src.x2 >> 16) + !!(src.x2 & 0x);
+   iter->plane_src.y2 = (src.y2 >> 16) + !!(src.y2 & 0x);
 
if (!iter->clips || !drm_rect_equals(>src, _state->src)) {
iter->clips = NULL;
-- 
2.25.1



[Intel-gfx] [PATCH 2/3] drm/i915/display: Use original src in psr2 sel fetch area calculation

2022-07-16 Thread Jouni Högander
drm_plane_state->src is modified when offset is calculated:

before calculation:
src.x1 = 8192, src.y1 = 8192

after calculation (pitch = 65536, cpp = 4, alignment = 262144)
src.x1 = 8192, src.y1 = 0, offset = 0x2000

Damage clips are relative to original coodrdinates provided by
user-space. To compare these against src coordinates we need to use
original coordinates as provided by user-space. These can be obtained
by using drm_plane_state_src.

Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 90599dd1cb1b..5c95e24dc8d6 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1767,7 +1767,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state 
*state,
continue;
}
 
-   drm_rect_fp_to_int(, _plane_state->uapi.src);
+   src = drm_plane_state_src(_plane_state->uapi);
+   drm_rect_fp_to_int(, );
 
drm_atomic_helper_damage_iter_init(,
   _plane_state->uapi,
-- 
2.25.1



Re: [Intel-gfx] [PATCH 2/2] drm/i915/psr: Disable PSR before disable pipe

2022-07-16 Thread Souza, Jose
On Fri, 2022-07-15 at 11:39 +0300, Lisovskiy, Stanislav wrote:
> On Fri, Jul 15, 2022 at 08:33:43AM +0300, Hogander, Jouni wrote:
> > On Thu, 2022-07-14 at 08:07 -0700, José Roberto de Souza wrote:
> > > The issue here was on for_each_intel_encoder_mask_with_psr() over the
> > > new_crtc_state encoder mask, so if the CRTC was being disabled mask
> > > would be zero and it would not have any chance to disable PSR.
> > > 
> > > So here doing for_each_intel_encoder_mask_with_psr() over the
> > > old_crtc_state encoder mask and then using the new_crtc_state to
> > > check if PSR needs to be disabled.
> 
> Are we sure that using old_crtc_state mask is safe here?
> Because currently we would be basically mixing a usage of 
> encoder from old_crtc_state mask with new_crtc_state.
> 
> If you mention a specific scenario, when this happens(i.e crtc
> is being disabled and new mask is 0) should we add a specific check 
> instructing us to use old_crtc_state mask only?
> 

This scenario were new_crtc_state is being disabled(ie encoder_mask = 0) is 
handled by intel_crtc_needs_modeset() check.
This same check will handle more complicated cases like pipe A(with PSR) now 
will drive a different port...

> Because currently you might be touching some other scenarios as
> well, that is what I'm concerned about.
> 
> 
> Stan
> 
> > > 
> > > Cc: Jouni Högander 
> > > Cc: Stanislav Lisovskiy 
> > > Signed-off-by: José Roberto de Souza 
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 14 --
> > >  1 file changed, 8 insertions(+), 6 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index e6a870641cd25..98c3c8015a5c4 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -1863,7 +1863,9 @@ void intel_psr_pre_plane_update(struct
> > > intel_atomic_state *state,
> > >   struct intel_crtc *crtc)
> > >  {
> > >   struct drm_i915_private *i915 = to_i915(state->base.dev);
> > > - const struct intel_crtc_state *crtc_state =
> > > + const struct intel_crtc_state *old_crtc_state =
> > > + intel_atomic_get_old_crtc_state(state, crtc);
> > > + const struct intel_crtc_state *new_crtc_state =
> > >   intel_atomic_get_new_crtc_state(state, crtc);
> > >   struct intel_encoder *encoder;
> > > 
> > > @@ -1871,7 +1873,7 @@ void intel_psr_pre_plane_update(struct
> > > intel_atomic_state *state,
> > >   return;
> > > 
> > >   for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
> > > -  crtc_state-
> > > > uapi.encoder_mask) {
> > > +  old_crtc_state-
> > > > uapi.encoder_mask) {
> > 
> > I would add comment here explaining why using encoder mask from
> > old_crtc_state, but using new_crtc_state inside the loop. It's up to
> > you:
> > 
> > Reviewed-by: Jouni Högander 
> > 
> > >   struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> > >   struct intel_psr *psr = _dp->psr;
> > >   bool needs_to_disable = false;
> > > @@ -1884,10 +1886,10 @@ void intel_psr_pre_plane_update(struct
> > > intel_atomic_state *state,
> > >* - All planes will go inactive
> > >* - Changing between PSR versions
> > >*/
> > > - needs_to_disable |=
> > > intel_crtc_needs_modeset(crtc_state);
> > > - needs_to_disable |= !crtc_state->has_psr;
> > > - needs_to_disable |= !crtc_state->active_planes;
> > > - needs_to_disable |= crtc_state->has_psr2 != psr-
> > > > psr2_enabled;
> > > + needs_to_disable |=
> > > intel_crtc_needs_modeset(new_crtc_state);
> > > + needs_to_disable |= !new_crtc_state->has_psr;
> > > + needs_to_disable |= !new_crtc_state->active_planes;
> > > + needs_to_disable |= new_crtc_state->has_psr2 != psr-
> > > > psr2_enabled;
> > > 
> > >   if (psr->enabled && needs_to_disable)
> > >   intel_psr_disable_locked(intel_dp);
> > 



[Intel-gfx] [PATCH 3/3] drm/i915/display: Use drm helper instead of own loop for damage clips

2022-07-16 Thread Jouni Högander
Use existing drm_atomic_helper_damage_merged from generic drm code
instead of implementing own loop to iterate over damage_clips.

Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 17 +
 1 file changed, 5 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 5c95e24dc8d6..d44662f19b53 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1721,8 +1721,6 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state 
*state,
 new_plane_state, i) {
struct drm_rect src, damaged_area = { .x1 = 0, .y1 = -1,
  .x2 = INT_MAX };
-   struct drm_atomic_helper_damage_iter iter;
-   struct drm_rect clip;
 
if (new_plane_state->uapi.crtc != crtc_state->uapi.crtc)
continue;
@@ -1770,20 +1768,15 @@ int intel_psr2_sel_fetch_update(struct 
intel_atomic_state *state,
src = drm_plane_state_src(_plane_state->uapi);
drm_rect_fp_to_int(, );
 
-   drm_atomic_helper_damage_iter_init(,
-  _plane_state->uapi,
-  _plane_state->uapi);
-   drm_atomic_for_each_plane_damage(, ) {
-   if (drm_rect_intersect(, ))
-   clip_area_update(_area, ,
-_state->pipe_src);
-   }
-
-   if (damaged_area.y1 == -1)
+   if (!drm_atomic_helper_damage_merged(_plane_state->uapi,
+_plane_state->uapi, 
_area))
continue;
 
damaged_area.y1 += new_plane_state->uapi.dst.y1 - src.y1;
damaged_area.y2 += new_plane_state->uapi.dst.y1 - src.y1;
+   damaged_area.x1 += new_plane_state->uapi.dst.x1 - src.x1;
+   damaged_area.x2 += new_plane_state->uapi.dst.x1 - src.x1;
+
clip_area_update(_clip, _area, 
_state->pipe_src);
}
 
-- 
2.25.1