[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: 
entries (rev2)
URL   : https://patchwork.freedesktop.org/series/126268/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13865 -> Patchwork_126268v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/index.html

Participating hosts (33 -> 34)
--

  Additional (2): fi-hsw-4770 bat-dg2-9 
  Missing(1): fi-kbl-soraka 

Known issues


  Here are the changes found in Patchwork_126268v2 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- fi-hsw-4770:NOTRUN -> [FAIL][1] ([i915#8293])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/fi-hsw-4770/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@gem_mmap@basic:
- bat-dg2-9:  NOTRUN -> [SKIP][2] ([i915#4083])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-dg2-9:  NOTRUN -> [SKIP][3] ([i915#4077]) +2 other tests skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-dg2-9:  NOTRUN -> [SKIP][4] ([i915#4079]) +1 other test skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@gem_render_tiled_bl...@basic.html

  * igt@i915_pm_rps@basic-api:
- bat-dg2-9:  NOTRUN -> [SKIP][5] ([i915#6621])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-9:  NOTRUN -> [SKIP][6] ([i915#5190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg2-9:  NOTRUN -> [SKIP][7] ([i915#4215] / [i915#5190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-9:  NOTRUN -> [SKIP][8] ([i915#4212]) +6 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html

  * igt@kms_addfb_basic@tile-pitch-mismatch:
- bat-dg2-9:  NOTRUN -> [SKIP][9] ([i915#4212] / [i915#5608])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@kms_addfb_ba...@tile-pitch-mismatch.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-dg2-9:  NOTRUN -> [SKIP][10] ([i915#4103] / [i915#4213] / 
[i915#5608]) +1 other test skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-dg2-9:  NOTRUN -> [SKIP][11] ([fdo#109285])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
- bat-dg2-9:  NOTRUN -> [SKIP][12] ([i915#5274])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@kms_force_connector_ba...@prune-stale-modes.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][13] -> [FAIL][14] ([IGT#3])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13865/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_psr@sprite_plane_onoff:
- bat-dg2-9:  NOTRUN -> [SKIP][15] ([i915#1072]) +3 other tests skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-dg2-9:  NOTRUN -> [SKIP][16] ([i915#3555] / [i915#4098])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
- bat-dg2-9:  NOTRUN -> [SKIP][17] ([i915#3708])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@prime_v...@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-mmap:
- bat-dg2-9:  NOTRUN -> [SKIP][18] ([i915#3708] / [i915#4077]) +1 
other test skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v2/bat-dg2-9/igt@prime_v...@basic-fence-mmap.html

  * igt@prime_vgem@basic-write:
- bat-dg2-9:  NOTRUN -> [SKIP][19] ([i915#3291] / 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: 
entries (rev2)
URL   : https://patchwork.freedesktop.org/series/126268/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] [drm-intel:drm-intel-gt-next 6/6] drivers/gpu/drm/i915/i915_drm_client.c:92:9: sparse: sparse: incompatible types in comparison expression (different address spaces):

[kernel test robot]

tree:   git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
head:   968853033d8aa4dbb80fbafa6f5d9b6a0ea21272
commit: 968853033d8aa4dbb80fbafa6f5d9b6a0ea21272 [6/6] drm/i915: Implement 
fdinfo memory stats printing
config: x86_64-randconfig-122-2023 
(https://download.01.org/0day-ci/archive/2023/20230610.h0m6ydi5-...@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/2023/20230610.h0m6ydi5-...@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-kbuild-all/20230610.h0m6ydi5-...@intel.com/

sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/i915_drm_client.c:92:9: sparse: sparse: incompatible 
>> types in comparison expression (different address spaces):
>> drivers/gpu/drm/i915/i915_drm_client.c:92:9: sparse:struct list_head 
>> [noderef] __rcu *
>> drivers/gpu/drm/i915/i915_drm_client.c:92:9: sparse:struct list_head *
>> drivers/gpu/drm/i915/i915_drm_client.c:92:9: sparse: sparse: incompatible 
>> types in comparison expression (different address spaces):
>> drivers/gpu/drm/i915/i915_drm_client.c:92:9: sparse:struct list_head 
>> [noderef] __rcu *
>> drivers/gpu/drm/i915/i915_drm_client.c:92:9: sparse:struct list_head *

vim +92 drivers/gpu/drm/i915/i915_drm_client.c

72  
73  static void show_meminfo(struct drm_printer *p, struct drm_file *file)
74  {
75  struct drm_memory_stats stats[INTEL_REGION_UNKNOWN] = {};
76  struct drm_i915_file_private *fpriv = file->driver_priv;
77  struct i915_drm_client *client = fpriv->client;
78  struct drm_i915_private *i915 = fpriv->i915;
79  struct drm_i915_gem_object *obj;
80  struct intel_memory_region *mr;
81  struct list_head *pos;
82  unsigned int id;
83  
84  /* Public objects. */
85  spin_lock(>table_lock);
86  idr_for_each_entry(>object_idr, obj, id)
87  obj_meminfo(obj, stats);
88  spin_unlock(>table_lock);
89  
90  /* Internal objects. */
91  rcu_read_lock();
  > 92  list_for_each_rcu(pos, >objects_list) {
93  obj = i915_gem_object_get_rcu(list_entry(pos, 
typeof(*obj),
94   client_link));
95  if (!obj)
96  continue;
97  obj_meminfo(obj, stats);
98  i915_gem_object_put(obj);
99  }
   100  rcu_read_unlock();
   101  
   102  for_each_memory_region(mr, i915, id)
   103  drm_print_memory_stats(p,
   104 [id],
   105 DRM_GEM_OBJECT_RESIDENT |
   106 DRM_GEM_OBJECT_PURGEABLE,
   107 mr->uabi_name);
   108  }
   109  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/quirk: Add quirk for devices with incorrect PWM frequency (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/quirk: Add quirk for devices with incorrect PWM frequency 
(rev2)
URL   : https://patchwork.freedesktop.org/series/125243/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13864 -> Patchwork_125243v2


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_125243v2 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_125243v2, please notify your bug team 
(lgci.bug.fil...@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/index.html

Participating hosts (31 -> 32)
--

  Additional (2): fi-hsw-4770 bat-adlp-11 
  Missing(1): fi-pnv-d510 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_125243v2:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@gem_migrate:
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/fi-hsw-4770/igt@i915_selftest@live@gem_migrate.html

  * igt@i915_selftest@live@gt_timelines:
- bat-rpls-1: [PASS][2] -> [INCOMPLETE][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13864/bat-rpls-1/igt@i915_selftest@live@gt_timelines.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-rpls-1/igt@i915_selftest@live@gt_timelines.html

  
Known issues


  Here are the changes found in Patchwork_125243v2 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-adlp-11:NOTRUN -> [FAIL][4] ([i915#8293])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-adlp-11/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-adlp-6: NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-adlp-6/igt@debugfs_t...@basic-hwmon.html
- bat-jsl-3:  NOTRUN -> [SKIP][6] ([i915#9318])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-jsl-3/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- bat-jsl-3:  NOTRUN -> [SKIP][7] ([i915#2190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-jsl-3/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- bat-jsl-3:  NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-jsl-3/igt@gem_lmem_swapp...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-adlp-6: NOTRUN -> [SKIP][9] ([i915#3282])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-adlp-6/igt@gem_tiled_pread_basic.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#5190])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-jsl-3:  NOTRUN -> [SKIP][11] ([i915#4103]) +1 other test skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-jsl-3/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- bat-adlp-6: NOTRUN -> [SKIP][12] ([i915#4103] / [i915#5608]) +1 
other test skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-adlp-6/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-adlp-6: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#3840])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-adlp-6/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-jsl-3:  NOTRUN -> [SKIP][14] ([fdo#109285])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-jsl-3/igt@kms_force_connector_ba...@force-load-detect.html
- bat-adlp-6: NOTRUN -> [SKIP][15] ([fdo#109285])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/bat-adlp-6/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][16] -> [FAIL][17] ([IGT#3])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13864/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_125243v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][18] ([fdo#109271]) +12 other tests 
skip
   [18]: 

[Intel-gfx] ✗ Fi.CI.BAT: failure for Remove custom dumb_map_offset implementations in i915 driver (rev2)

[Patchwork]

== Series Details ==

Series: Remove custom dumb_map_offset implementations in i915 driver (rev2)
URL   : https://patchwork.freedesktop.org/series/126264/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13863 -> Patchwork_126264v2


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_126264v2 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_126264v2, please notify your bug team 
(lgci.bug.fil...@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/index.html

Participating hosts (33 -> 34)
--

  Additional (1): fi-hsw-4770 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_126264v2:

### IGT changes ###

 Possible regressions 

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-elk-e7500:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/fi-elk-e7500/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/fi-elk-e7500/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-bsw-nick:[PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/fi-bsw-nick/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/fi-bsw-nick/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][5]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/fi-hsw-4770/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
- fi-ivb-3770:[PASS][6] -> [INCOMPLETE][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/fi-ivb-3770/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/fi-ivb-3770/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-blb-e6850:   [PASS][8] -> [INCOMPLETE][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/fi-blb-e6850/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/fi-blb-e6850/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- fi-pnv-d510:[PASS][10] -> [ABORT][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/fi-pnv-d510/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/fi-pnv-d510/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- bat-jsl-3:  [PASS][12] -> [INCOMPLETE][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-jsl-3/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/bat-jsl-3/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
- bat-adlp-11:[PASS][14] -> [ABORT][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-adlp-11/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/bat-adlp-11/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
- fi-cfl-8109u:   [PASS][16] -> [INCOMPLETE][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/fi-cfl-8109u/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/fi-cfl-8109u/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
- fi-kbl-7567u:   [PASS][18] -> [INCOMPLETE][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/fi-kbl-7567u/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/fi-kbl-7567u/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
- bat-adln-1: [PASS][20] -> [INCOMPLETE][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-adln-1/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126264v2/bat-adln-1/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
- fi-tgl-1115g4:  [PASS][22] -> [INCOMPLETE][23]
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/fi-tgl-1115g4/igt@kms_cursor_leg...@basic-flip-after-cursor-atomic.html
   [23]: 

Re: [Intel-gfx] [PULL] drm-misc-fixes

[Daniel Vetter]

On Wed, Nov 08, 2023 at 02:18:28PM +0100, Maarten Lankhorst wrote:
> Hi Dave, Daniel,
> 
> drm-misc-next-fixes is empty, have a pull request for drm-misc-fixes.
> 
> Cheers,
> ~Maarten
> 
> drm-misc-fixes-2023-11-08:
> drm-misc-fixes for v6.7-rc1:
> 
> - drm-misc-fixes from 2023-11-02 + a single qxl memory leak fix.
> The following changes since commit 8f5ad367e8b884772945c6c9fb622ac94b7d3e32:
> 
>   accel/ivpu: Extend address range for MMU mmap (2023-10-19 08:01:20 +0200)
> 
> are available in the Git repository at:
> 
>   git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2023-11-08

Merged to drm-next, thanks.
-Sima
> 
> for you to fetch changes up to 0e8b9f258baed25f1c5672613699247c76b007b5:
> 
>   drm/qxl: prevent memory leak (2023-11-06 09:37:03 +0100)
> 
> 
> drm-misc-fixes for v6.7-rc1:
> 
> - drm-misc-fixes from 2023-11-02 + a single qxl memory leak fix.
> 
> 
> Christian König (2):
>   drm/amdgpu: ignore duplicate BOs again
>   drm/amdkfd: reserve a fence slot while locking the BO
> 
> Erik Kurzinger (1):
>   drm/syncobj: fix DRM_SYNCOBJ_WAIT_FLAGS_WAIT_AVAILABLE
> 
> Karol Wachowski (1):
>   accel/ivpu/37xx: Fix missing VPUIP interrupts
> 
> Luben Tuikov (1):
>   drm/amdgpu: Remove redundant call to priority_is_valid()
> 
> Lukasz Majczak (1):
>   drm/dp_mst: Fix NULL deref in get_mst_branch_device_by_guid_helper()
> 
> Maxime Ripard (1):
>   drm/vc4: tests: Fix UAF in the mock helpers
> 
> Sui Jingfeng (1):
>   drm/logicvc: Kconfig: select REGMAP and REGMAP_MMIO
> 
> Zongmin Zhou (1):
>   drm/qxl: prevent memory leak
> 
>  drivers/accel/ivpu/ivpu_hw_37xx.c| 11 +--
>  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c |  2 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c   |  3 ++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c  | 15 ---
>  drivers/gpu/drm/display/drm_dp_mst_topology.c|  6 +++---
>  drivers/gpu/drm/drm_syncobj.c|  3 ++-
>  drivers/gpu/drm/logicvc/Kconfig  |  2 ++
>  drivers/gpu/drm/qxl/qxl_display.c|  3 +++
>  drivers/gpu/drm/vc4/tests/vc4_mock_crtc.c|  2 +-
>  drivers/gpu/drm/vc4/tests/vc4_mock_output.c  |  2 +-
>  10 files changed, 28 insertions(+), 21 deletions(-)

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries

[Patchwork]

== Series Details ==

Series: series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: 
entries
URL   : https://patchwork.freedesktop.org/series/126268/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13863 -> Patchwork_126268v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_126268v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_126268v1, please notify your bug team 
(lgci.bug.fil...@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/index.html

Participating hosts (33 -> 34)
--

  Additional (2): fi-kbl-soraka fi-hsw-4770 
  Missing(1): fi-pnv-d510 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_126268v1:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@gt_tlb:
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/fi-hsw-4770/igt@i915_selftest@live@gt_tlb.html

  * igt@i915_selftest@live@ring_submission:
- fi-kbl-soraka:  NOTRUN -> [ABORT][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/fi-kbl-soraka/igt@i915_selftest@live@ring_submission.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-5:
- bat-adlp-11:[PASS][3] -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html

  
Known issues


  Here are the changes found in Patchwork_126268v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s0@smem:
- bat-jsl-3:  [PASS][5] -> [INCOMPLETE][6] ([i915#9275])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/bat-jsl-3/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-kbl-soraka:  NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html

  * igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka:  NOTRUN -> [DMESG-FAIL][9] ([i915#1886])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-jsl-3:  [PASS][10] -> [FAIL][11] ([fdo#103375])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/bat-jsl-3/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#5190])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_dsc@dsc-basic:
- fi-kbl-soraka:  NOTRUN -> [SKIP][13] ([fdo#109271]) +9 other tests 
skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/fi-kbl-soraka/igt@kms_...@dsc-basic.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][14] -> [FAIL][15] ([IGT#3])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][16] ([fdo#109271]) +12 other tests 
skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126268v1/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-dp-5:
- bat-adlp-11:[PASS][17] -> [DMESG-FAIL][18] ([i915#6868])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html
   [18]: 

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries

[Patchwork]

== Series Details ==

Series: series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: 
entries
URL   : https://patchwork.freedesktop.org/series/126268/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for Add DSC fractional bpp support (rev10)

[Patchwork]

== Series Details ==

Series: Add DSC fractional bpp support (rev10)
URL   : https://patchwork.freedesktop.org/series/111391/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13863 -> Patchwork_111391v10


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/index.html

Participating hosts (33 -> 34)
--

  Additional (2): fi-kbl-soraka fi-hsw-4770 
  Missing(1): bat-atsm-1 

Known issues


  Here are the changes found in Patchwork_111391v10 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@read_all_entries:
- bat-adlp-11:[PASS][1] -> [DMESG-WARN][2] ([i915#7507]) +28 other 
tests dmesg-warn
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-adlp-11/igt@debugfs_test@read_all_entries.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/bat-adlp-11/igt@debugfs_test@read_all_entries.html

  * igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka:  NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/fi-kbl-soraka/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-kbl-soraka:  NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/fi-kbl-soraka/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- bat-adlp-11:NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/bat-adlp-11/igt@gem_lmem_swapp...@verify-random.html

  * igt@i915_pm_rpm@module-reload:
- bat-adlp-11:NOTRUN -> [DMESG-WARN][6] ([i915#7507]) +3 other 
tests dmesg-warn
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/bat-adlp-11/igt@i915_pm_...@module-reload.html

  * igt@i915_pm_rps@basic-api:
- bat-adlp-11:NOTRUN -> [SKIP][7] ([i915#6621])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/bat-adlp-11/igt@i915_pm_...@basic-api.html

  * igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka:  NOTRUN -> [DMESG-FAIL][8] ([i915#1886])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@mman:
- fi-hsw-4770:NOTRUN -> [INCOMPLETE][9] ([i915#9527])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/fi-hsw-4770/igt@i915_selftest@l...@mman.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#5190])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_dsc@dsc-basic:
- fi-kbl-soraka:  NOTRUN -> [SKIP][11] ([fdo#109271]) +9 other tests 
skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/fi-kbl-soraka/igt@kms_...@dsc-basic.html

  * igt@kms_frontbuffer_tracking@basic:
- bat-adlp-11:[PASS][12] -> [DMESG-FAIL][13] ([i915#7507]) +22 
other tests dmesg-fail
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-adlp-11/igt@kms_frontbuffer_track...@basic.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/bat-adlp-11/igt@kms_frontbuffer_track...@basic.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][14] ([fdo#109271]) +12 other tests 
skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][15] ([i915#1845] / [i915#9197]) +3 
other tests skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-5:
- bat-adlp-11:NOTRUN -> [DMESG-FAIL][16] ([i915#7507]) +4 other 
tests dmesg-fail
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/bat-adlp-11/igt@kms_pipe_crc_basic@suspend-read-...@pipe-b-dp-5.html

  * igt@kms_psr@primary_page_flip:
- bat-adlp-11:NOTRUN -> [SKIP][17] ([i915#1072]) +3 other tests skip
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111391v10/bat-adlp-11/igt@kms_psr@primary_page_flip.html

  * igt@kms_psr@sprite_plane_onoff:
- bat-jsl-3:  [PASS][18] -> [SKIP][19] ([i915#9648]) +3 other tests 
skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13863/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
   [19]: 

[Intel-gfx] [PATCH v2] drm/i915/quirk: Add quirk for devices with incorrect PWM frequency

[Allen Ballway]

Cyernet T10C has a bad default PWM frequency causing the display to
strobe when the brightness is less than 100%. Create a new quirk to use
the value from the BIOS rather than the default register value.

Signed-off-by: Allen Ballway 
---
V1 -> V2: Fix style issues.

 .../gpu/drm/i915/display/intel_backlight.c|  6 +++--
 drivers/gpu/drm/i915/display/intel_quirks.c   | 26 +++
 drivers/gpu/drm/i915/display/intel_quirks.h   |  1 +
 3 files changed, 31 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c 
b/drivers/gpu/drm/i915/display/intel_backlight.c
index 2e8f17c045222..b4171952343eb 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -1385,8 +1385,10 @@ static int vlv_setup_backlight(struct intel_connector 
*connector, enum pipe pipe
ctl2 = intel_de_read(i915, VLV_BLC_PWM_CTL2(pipe));
panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;

-   ctl = intel_de_read(i915, VLV_BLC_PWM_CTL(pipe));
-   panel->backlight.pwm_level_max = ctl >> 16;
+   if (!intel_has_quirk(i915, QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY)) {
+   ctl = intel_de_read(i915, VLV_BLC_PWM_CTL(pipe));
+   panel->backlight.pwm_level_max = ctl >> 16;
+   }

if (!panel->backlight.pwm_level_max)
panel->backlight.pwm_level_max = 
get_backlight_max_vbt(connector);
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.c 
b/drivers/gpu/drm/i915/display/intel_quirks.c
index a280448df771a..ff6cb499428ce 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.c
+++ b/drivers/gpu/drm/i915/display/intel_quirks.c
@@ -65,6 +65,12 @@ static void quirk_no_pps_backlight_power_hook(struct 
drm_i915_private *i915)
drm_info(>drm, "Applying no pps backlight power quirk\n");
 }

+static void quirk_ignore_default_pwm_frequency(struct drm_i915_private *i915)
+{
+   intel_set_quirk(i915, QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY);
+   drm_info(>drm, "Applying ignore default pwm frequency quirk");
+}
+
 struct intel_quirk {
int device;
int subsystem_vendor;
@@ -90,6 +96,12 @@ static int intel_dmi_no_pps_backlight(const struct 
dmi_system_id *id)
return 1;
 }

+static int intel_dmi_ignore_default_pwm_frequency(const struct dmi_system_id 
*id)
+{
+   DRM_INFO("Default PWM frequency is incorrect and is overridden on 
%s\n", id->ident);
+   return 1;
+}
+
 static const struct intel_dmi_quirk intel_dmi_quirks[] = {
{
.dmi_id_list = &(const struct dmi_system_id[]) {
@@ -136,6 +148,20 @@ static const struct intel_dmi_quirk intel_dmi_quirks[] = {
},
.hook = quirk_no_pps_backlight_power_hook,
},
+   {
+   .dmi_id_list = &(const struct dmi_system_id[]) {
+   {
+   .callback = 
intel_dmi_ignore_default_pwm_frequency,
+   .ident = "Cybernet T10C Tablet",
+   .matches = {DMI_EXACT_MATCH(DMI_BOARD_VENDOR,
+   "Cybernet 
Manufacturing Inc."),
+   DMI_EXACT_MATCH(DMI_BOARD_NAME, 
"T10C Tablet"),
+   },
+   },
+   { }
+   },
+   .hook = quirk_ignore_default_pwm_frequency,
+   },
 };

 static struct intel_quirk intel_quirks[] = {
diff --git a/drivers/gpu/drm/i915/display/intel_quirks.h 
b/drivers/gpu/drm/i915/display/intel_quirks.h
index 10a4d163149fd..ca34dacf0c242 100644
--- a/drivers/gpu/drm/i915/display/intel_quirks.h
+++ b/drivers/gpu/drm/i915/display/intel_quirks.h
@@ -17,6 +17,7 @@ enum intel_quirk_id {
QUIRK_INVERT_BRIGHTNESS,
QUIRK_LVDS_SSC_DISABLE,
QUIRK_NO_PPS_BACKLIGHT_POWER_HOOK,
+   QUIRK_IGNORE_DEFAULT_PWM_FREQUENCY,
 };

 void intel_init_quirks(struct drm_i915_private *i915);
--
2.42.0.869.gea05f2083d-goog

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add DSC fractional bpp support (rev10)

[Patchwork]

== Series Details ==

Series: Add DSC fractional bpp support (rev10)
URL   : https://patchwork.freedesktop.org/series/111391/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DSC fractional bpp support (rev10)

[Patchwork]

== Series Details ==

Series: Add DSC fractional bpp support (rev10)
URL   : https://patchwork.freedesktop.org/series/111391/
State : warning

== Summary ==

Error: dim checkpatch failed
83db4cff drm/display/dp: Add helper function to get DSC bpp precision
f72f3f2aa067 drm/i915/display: Store compressed bpp in U6.4 format
-:190: WARNING:MISSING_SPACE: break quoted strings at a space character
#190: FILE: drivers/gpu/drm/i915/display/intel_dp.c:2216:
+   "Cannot compute valid DSC parameters for Input Bpp 
= %d"
+   "Compressed BPP = " BPP_X16_FMT "\n",

-:222: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#222: FILE: drivers/gpu/drm/i915/display/intel_dp.c:2407:
+  
to_bpp_int_roundup(pipe_config->dsc.compressed_bpp_x16)),

total: 0 errors, 2 warnings, 0 checks, 188 lines checked
01fb8003d41c drm/i915/display: Consider fractional vdsc bpp while computing m_n 
values
57ed990aae02 drm/i915/audio: Consider fractional vdsc bpp while computing 
tu_data
2740e517bfd7 drm/i915/dsc/mtl: Add support for fractional bpp
63e6de65f109 drm/i915/dp: Iterate over output bpp with fractional step size
8dfd5cbd96cf drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp
c5cf2099ecf2 drm/i915/dsc: Allow DSC only with fractional bpp when forced from 
debugfs
0cb1cafe567e drm/i915/dp_mst: Use precision of 1/16 for computing bpp
-:68: WARNING:LONG_LINE: line length of 111 exceeds 100 columns
#68: FILE: drivers/gpu/drm/i915/display/intel_dp_mst.c:169:
+   drm_dbg_kms(>drm, "Looking for slots in range min bpp " 
BPP_X16_FMT " max bpp " BPP_X16_FMT "\n",

total: 0 errors, 1 warnings, 0 checks, 119 lines checked
513f074fefef drm/i916/dp_mst: Iterate over the DSC bpps as per DSC precision 
support
da4e0d8b6686 drm/i915/dp_mst: Add support for forcing dsc fractional bpp via 
debugfs

[Intel-gfx] [PATCH v2] Remove custom dumb_map_offset implementations in i915 driver

[Dipam Turkar]

Making i915 use drm_gem_create_mmap_offset() instead of its custom
implementations for associating GEM object with a fake offset.

Signed-off-by: Dipam Turkar 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 -
 drivers/gpu/drm/i915/gem/i915_gem_mman.h |  4 
 drivers/gpu/drm/i915/i915_driver.c   |  3 ++-
 3 files changed, 2 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index aa4d842d4c5a..71d621a1f249 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -771,27 +771,6 @@ __assign_mmap_offset_handle(struct drm_file *file,
return err;
 }
 
-int
-i915_gem_dumb_mmap_offset(struct drm_file *file,
- struct drm_device *dev,
- u32 handle,
- u64 *offset)
-{
-   struct drm_i915_private *i915 = to_i915(dev);
-   enum i915_mmap_type mmap_type;
-
-   if (HAS_LMEM(to_i915(dev)))
-   mmap_type = I915_MMAP_TYPE_FIXED;
-   else if (pat_enabled())
-   mmap_type = I915_MMAP_TYPE_WC;
-   else if (!i915_ggtt_has_aperture(to_gt(i915)->ggtt))
-   return -ENODEV;
-   else
-   mmap_type = I915_MMAP_TYPE_GTT;
-
-   return __assign_mmap_offset_handle(file, handle, mmap_type, offset);
-}
-
 /**
  * i915_gem_mmap_offset_ioctl - prepare an object for GTT mmap'ing
  * @dev: DRM device
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.h 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
index 196417fd0f5c..253435795caf 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.h
@@ -20,10 +20,6 @@ struct mutex;
 int i915_gem_mmap_gtt_version(void);
 int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma);
 
-int i915_gem_dumb_mmap_offset(struct drm_file *file_priv,
- struct drm_device *dev,
- u32 handle, u64 *offset);
-
 void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
 void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj);
 
diff --git a/drivers/gpu/drm/i915/i915_driver.c 
b/drivers/gpu/drm/i915/i915_driver.c
index d50347e5773a..48d7e53c49d6 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -42,6 +42,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -1826,7 +1827,7 @@ static const struct drm_driver i915_drm_driver = {
.gem_prime_import = i915_gem_prime_import,
 
.dumb_create = i915_gem_dumb_create,
-   .dumb_map_offset = i915_gem_dumb_mmap_offset,
+   .dumb_map_offset = drm_gem_dumb_map_offset,
 
.ioctls = i915_ioctls,
.num_ioctls = ARRAY_SIZE(i915_ioctls),
-- 
2.34.1

Re: [Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

[kernel test robot]

Hi Dipam,

kernel test robot noticed the following build warnings:

[auto build test WARNING on drm-tip/drm-tip]

url:
https://github.com/intel-lab-lkp/linux/commits/Dipam-Turkar/Remove-custom-dumb_map_offset-implementations-in-i915-driver/20231110-185942
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20231110105811.380646-1-dipamt1729%40gmail.com
patch subject: [Intel-gfx] [PATCH] Remove custom dumb_map_offset 
implementations in i915 driver
config: x86_64-randconfig-001-20231110 
(https://download.01.org/0day-ci/archive/2023/20230226.csxs1u1i-...@intel.com/config)
compiler: gcc-7 (Ubuntu 7.5.0-6ubuntu2) 7.5.0
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/2023/20230226.csxs1u1i-...@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-kbuild-all/20230226.csxs1u1i-...@intel.com/

All warnings (new ones prefixed by >>):

   drivers/gpu/drm/i915/gem/i915_gem_mman.c: In function 
'i915_gem_mmap_offset_ioctl':
   drivers/gpu/drm/i915/gem/i915_gem_mman.c:673:9: error: implicit declaration 
of function '__assign_mmap_offset_handle'; did you mean 
'i915_gem_mmap_offset_ioctl'? [-Werror=implicit-function-declaration]
 return __assign_mmap_offset_handle(file, args->handle, type, 
>offset);
^~~
i915_gem_mmap_offset_ioctl
   drivers/gpu/drm/i915/gem/i915_gem_mman.c: In function 'i915_gem_fb_mmap':
   drivers/gpu/drm/i915/gem/i915_gem_mman.c:896:9: error: implicit declaration 
of function 'mmap_offset_attach'; did you mean 'dma_free_attrs'? 
[-Werror=implicit-function-declaration]
  mmo = mmap_offset_attach(obj, mmap_type, NULL);
^~
dma_free_attrs
>> drivers/gpu/drm/i915/gem/i915_gem_mman.c:896:7: warning: assignment makes 
>> pointer from integer without a cast [-Wint-conversion]
  mmo = mmap_offset_attach(obj, mmap_type, NULL);
  ^
   cc1: some warnings being treated as errors


vim +896 drivers/gpu/drm/i915/gem/i915_gem_mman.c

eaee1c085863951 Nirmoy Das2023-04-04  874  
eaee1c085863951 Nirmoy Das2023-04-04  875  int i915_gem_fb_mmap(struct 
drm_i915_gem_object *obj, struct vm_area_struct *vma)
eaee1c085863951 Nirmoy Das2023-04-04  876  {
eaee1c085863951 Nirmoy Das2023-04-04  877   struct drm_i915_private *i915 = 
to_i915(obj->base.dev);
eaee1c085863951 Nirmoy Das2023-04-04  878   struct drm_device *dev = 
>drm;
eaee1c085863951 Nirmoy Das2023-04-04  879   struct i915_mmap_offset *mmo = 
NULL;
eaee1c085863951 Nirmoy Das2023-04-04  880   enum i915_mmap_type mmap_type;
eaee1c085863951 Nirmoy Das2023-04-04  881   struct i915_ggtt *ggtt = 
to_gt(i915)->ggtt;
eaee1c085863951 Nirmoy Das2023-04-04  882  
eaee1c085863951 Nirmoy Das2023-04-04  883   if (drm_dev_is_unplugged(dev))
eaee1c085863951 Nirmoy Das2023-04-04  884   return -ENODEV;
eaee1c085863951 Nirmoy Das2023-04-04  885  
eaee1c085863951 Nirmoy Das2023-04-04  886   /* handle ttm object */
eaee1c085863951 Nirmoy Das2023-04-04  887   if (obj->ops->mmap_ops) {
eaee1c085863951 Nirmoy Das2023-04-04  888   /*
eaee1c085863951 Nirmoy Das2023-04-04  889* ttm fault handler, 
ttm_bo_vm_fault_reserved() uses fake offset
eaee1c085863951 Nirmoy Das2023-04-04  890* to calculate page 
offset so set that up.
eaee1c085863951 Nirmoy Das2023-04-04  891*/
eaee1c085863951 Nirmoy Das2023-04-04  892   vma->vm_pgoff += 
drm_vma_node_start(>base.vma_node);
eaee1c085863951 Nirmoy Das2023-04-04  893   } else {
eaee1c085863951 Nirmoy Das2023-04-04  894   /* handle stolen and 
smem objects */
eaee1c085863951 Nirmoy Das2023-04-04  895   mmap_type = 
i915_ggtt_has_aperture(ggtt) ? I915_MMAP_TYPE_GTT : I915_MMAP_TYPE_WC;
eaee1c085863951 Nirmoy Das2023-04-04 @896   mmo = 
mmap_offset_attach(obj, mmap_type, NULL);
274d4b96b12f78c Dan Carpenter 2023-06-06  897   if (IS_ERR(mmo))
274d4b96b12f78c Dan Carpenter 2023-06-06  898   return 
PTR_ERR(mmo);
eaee1c085863951 Nirmoy Das2023-04-04  899   }
eaee1c085863951 Nirmoy Das2023-04-04  900  
eaee1c085863951 Nirmoy Das2023-04-04  901   /*
eaee1c085863951 Nirmoy Das2023-04-04  902* When we install vm_ops for 
mmap we are too late for
eaee1c085863951 Nirmoy Das2023-04-04  903* the vm_ops->open() which 
increases the ref_count of
eaee1c085863951 Nirmoy Das2023-04-04  904* this obj and then it gets 
decreased by the vm_ops->close().
eaee1c085863951 Nirmoy Das2023-04-04  905* To balance this increase the 
obj ref_count here.
eaee1c085863951 Nirmoy Das2023-04-04  906*/

Re: [Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

[kernel test robot]

Hi Dipam,

kernel test robot noticed the following build errors:

[auto build test ERROR on drm-tip/drm-tip]

url:
https://github.com/intel-lab-lkp/linux/commits/Dipam-Turkar/Remove-custom-dumb_map_offset-implementations-in-i915-driver/20231110-185942
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20231110105811.380646-1-dipamt1729%40gmail.com
patch subject: [Intel-gfx] [PATCH] Remove custom dumb_map_offset 
implementations in i915 driver
config: x86_64-randconfig-014-20231110 
(https://download.01.org/0day-ci/archive/2023/20230234.qjyxc2bv-...@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/2023/20230234.qjyxc2bv-...@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-kbuild-all/20230234.qjyxc2bv-...@intel.com/

All errors (new ones prefixed by >>):

   drivers/gpu/drm/i915/gem/i915_gem_mman.c: In function 
'i915_gem_mmap_offset_ioctl':
   drivers/gpu/drm/i915/gem/i915_gem_mman.c:673:16: error: implicit declaration 
of function '__assign_mmap_offset_handle' 
[-Werror=implicit-function-declaration]
 673 | return __assign_mmap_offset_handle(file, args->handle, type, 
>offset);
 |^~~
   drivers/gpu/drm/i915/gem/i915_gem_mman.c: In function 'i915_gem_fb_mmap':
   drivers/gpu/drm/i915/gem/i915_gem_mman.c:896:23: error: implicit declaration 
of function 'mmap_offset_attach' [-Werror=implicit-function-declaration]
 896 | mmo = mmap_offset_attach(obj, mmap_type, NULL);
 |   ^~
   drivers/gpu/drm/i915/gem/i915_gem_mman.c:896:21: warning: assignment to 
'struct i915_mmap_offset *' from 'int' makes pointer from integer without a 
cast [-Wint-conversion]
 896 | mmo = mmap_offset_attach(obj, mmap_type, NULL);
 | ^
   In file included from drivers/gpu/drm/i915/gem/i915_gem_mman.c:912:
   drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c: In function 
'assert_mmap_offset':
>> drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c:624:15: error: implicit 
>> declaration of function '__assign_mmap_offset'; did you mean 
>> 'assert_mmap_offset'? [-Werror=implicit-function-declaration]
 624 | ret = __assign_mmap_offset(obj, default_mapping(i915), 
, NULL);
 |   ^~~~
 |   assert_mmap_offset
   cc1: some warnings being treated as errors

Kconfig warnings: (for reference only)
   WARNING: unmet direct dependencies detected for DRM_I915_DEBUG_GEM
   Depends on [n]: HAS_IOMEM [=y] && DRM_I915 [=y] && EXPERT [=y] && 
DRM_I915_WERROR [=n]
   Selected by [y]:
   - DRM_I915_DEBUG [=y] && HAS_IOMEM [=y] && DRM_I915 [=y] && EXPERT [=y] && 
!COMPILE_TEST [=n]


vim +624 drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c

450cede7f3804c Thomas Hellström  2021-08-31  611  
b414fcd5be0b00 Chris Wilson  2019-05-28  612  static bool 
assert_mmap_offset(struct drm_i915_private *i915,
b414fcd5be0b00 Chris Wilson  2019-05-28  613   
unsigned long size,
b414fcd5be0b00 Chris Wilson  2019-05-28  614   
int expected)
b414fcd5be0b00 Chris Wilson  2019-05-28  615  {
b414fcd5be0b00 Chris Wilson  2019-05-28  616struct 
drm_i915_gem_object *obj;
cf3e3e86d77970 Maarten Lankhorst 2021-06-10  617u64 offset;
cf3e3e86d77970 Maarten Lankhorst 2021-06-10  618int ret;
b414fcd5be0b00 Chris Wilson  2019-05-28  619  
450cede7f3804c Thomas Hellström  2021-08-31  620obj = 
create_sys_or_internal(i915, size);
b414fcd5be0b00 Chris Wilson  2019-05-28  621if (IS_ERR(obj))
cf3e3e86d77970 Maarten Lankhorst 2021-06-10  622return expected 
&& expected == PTR_ERR(obj);
b414fcd5be0b00 Chris Wilson  2019-05-28  623  
7961c5b60f23df Maarten Lankhorst 2021-07-14 @624ret = 
__assign_mmap_offset(obj, default_mapping(i915), , NULL);
b414fcd5be0b00 Chris Wilson  2019-05-28  625
i915_gem_object_put(obj);
b414fcd5be0b00 Chris Wilson  2019-05-28  626  
cf3e3e86d77970 Maarten Lankhorst 2021-06-10  627return ret == expected;
b414fcd5be0b00 Chris Wilson  2019-05-28  628  }
b414fcd5be0b00 Chris Wilson  2019-05-28  629  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

[Intel-gfx] [drm-intel:drm-intel-gt-next 1/6] drivers/gpu/drm/i915/i915_drm_client.h:81:1: warning: no return statement in function returning non-void

[kernel test robot]

tree:   git://anongit.freedesktop.org/drm-intel drm-intel-gt-next
head:   968853033d8aa4dbb80fbafa6f5d9b6a0ea21272
commit: e4ae85e364fc652ea15d85b0f3a6da304c9b5ce7 [1/6] drm/i915: Add ability 
for tracking buffer objects per client
config: x86_64-buildonly-randconfig-001-20231110 
(https://download.01.org/0day-ci/archive/2023/20230104.8tlhvxui-...@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/2023/20230104.8tlhvxui-...@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-kbuild-all/20230104.8tlhvxui-...@intel.com/

All warnings (new ones prefixed by >>):

   In file included from drivers/gpu/drm/i915/i915_drv.h:54,
from drivers/gpu/drm/i915/gt/intel_context.h:14,
from drivers/gpu/drm/i915/gem/i915_gem_context.h:12,
from drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:8:
   drivers/gpu/drm/i915/i915_drm_client.h: In function 
'i915_drm_client_remove_object':
>> drivers/gpu/drm/i915/i915_drm_client.h:81:1: warning: no return statement in 
>> function returning non-void [-Wreturn-type]
  81 | }
 | ^
--
   In file included from drivers/gpu/drm/i915/selftests/../i915_drv.h:54,
from drivers/gpu/drm/i915/selftests/igt_reset.c:12:
   drivers/gpu/drm/i915/selftests/../i915_drm_client.h: In function 
'i915_drm_client_remove_object':
>> drivers/gpu/drm/i915/selftests/../i915_drm_client.h:81:1: warning: no return 
>> statement in function returning non-void [-Wreturn-type]
  81 | }
 | ^


vim +81 drivers/gpu/drm/i915/i915_drm_client.h

78  
79  static inline bool i915_drm_client_remove_object(struct 
drm_i915_gem_object *obj)
80  {
  > 81  }
82  #endif
83  

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

[kernel test robot]

Hi Dipam,

kernel test robot noticed the following build errors:

[auto build test ERROR on drm-tip/drm-tip]

url:
https://github.com/intel-lab-lkp/linux/commits/Dipam-Turkar/Remove-custom-dumb_map_offset-implementations-in-i915-driver/20231110-185942
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:
https://lore.kernel.org/r/20231110105811.380646-1-dipamt1729%40gmail.com
patch subject: [Intel-gfx] [PATCH] Remove custom dumb_map_offset 
implementations in i915 driver
config: x86_64-randconfig-012-20231110 
(https://download.01.org/0day-ci/archive/2023/20230053.k5lnjn1w-...@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): 
(https://download.01.org/0day-ci/archive/2023/20230053.k5lnjn1w-...@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-kbuild-all/20230053.k5lnjn1w-...@intel.com/

All error/warnings (new ones prefixed by >>):

   drivers/gpu/drm/i915/gem/i915_gem_mman.c: In function 
'i915_gem_mmap_offset_ioctl':
>> drivers/gpu/drm/i915/gem/i915_gem_mman.c:673:16: error: implicit declaration 
>> of function '__assign_mmap_offset_handle' 
>> [-Werror=implicit-function-declaration]
 673 | return __assign_mmap_offset_handle(file, args->handle, type, 
>offset);
 |^~~
   drivers/gpu/drm/i915/gem/i915_gem_mman.c: In function 'i915_gem_fb_mmap':
>> drivers/gpu/drm/i915/gem/i915_gem_mman.c:896:23: error: implicit declaration 
>> of function 'mmap_offset_attach' [-Werror=implicit-function-declaration]
 896 | mmo = mmap_offset_attach(obj, mmap_type, NULL);
 |   ^~
>> drivers/gpu/drm/i915/gem/i915_gem_mman.c:896:21: warning: assignment to 
>> 'struct i915_mmap_offset *' from 'int' makes pointer from integer without a 
>> cast [-Wint-conversion]
 896 | mmo = mmap_offset_attach(obj, mmap_type, NULL);
 | ^
   cc1: some warnings being treated as errors
--
>> drivers/gpu/drm/i915/i915_driver.c:1826:28: error: 
>> 'drm_gem_dumb_mmap_offset' undeclared here (not in a function); did you mean 
>> 'drm_gem_dumb_map_offset'?
1826 | .dumb_map_offset = drm_gem_dumb_mmap_offset,
 |^~~~
 |drm_gem_dumb_map_offset


vim +/__assign_mmap_offset_handle +673 drivers/gpu/drm/i915/gem/i915_gem_mman.c

cc662126b4134e Abdiel Janulgue   2019-12-04  603  
b414fcd5be0b00 Chris Wilson  2019-05-28  604  /**
cc662126b4134e Abdiel Janulgue   2019-12-04  605   * i915_gem_mmap_offset_ioctl 
- prepare an object for GTT mmap'ing
b414fcd5be0b00 Chris Wilson  2019-05-28  606   * @dev: DRM device
b414fcd5be0b00 Chris Wilson  2019-05-28  607   * @data: GTT mapping ioctl 
data
b414fcd5be0b00 Chris Wilson  2019-05-28  608   * @file: GEM object info
b414fcd5be0b00 Chris Wilson  2019-05-28  609   *
b414fcd5be0b00 Chris Wilson  2019-05-28  610   * Simply returns the fake 
offset to userspace so it can mmap it.
b414fcd5be0b00 Chris Wilson  2019-05-28  611   * The mmap call will end up 
in drm_gem_mmap(), which will set things
b414fcd5be0b00 Chris Wilson  2019-05-28  612   * up so we can get faults in 
the handler above.
b414fcd5be0b00 Chris Wilson  2019-05-28  613   *
b414fcd5be0b00 Chris Wilson  2019-05-28  614   * The fault handler will 
take care of binding the object into the GTT
b414fcd5be0b00 Chris Wilson  2019-05-28  615   * (since it may have been 
evicted to make room for something), allocating
b414fcd5be0b00 Chris Wilson  2019-05-28  616   * a fence register, and 
mapping the appropriate aperture address into
b414fcd5be0b00 Chris Wilson  2019-05-28  617   * userspace.
b414fcd5be0b00 Chris Wilson  2019-05-28  618   */
b414fcd5be0b00 Chris Wilson  2019-05-28  619  int
cc662126b4134e Abdiel Janulgue   2019-12-04  620  
i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
b414fcd5be0b00 Chris Wilson  2019-05-28  621   
struct drm_file *file)
b414fcd5be0b00 Chris Wilson  2019-05-28  622  {
cc662126b4134e Abdiel Janulgue   2019-12-04  623struct drm_i915_private 
*i915 = to_i915(dev);
cc662126b4134e Abdiel Janulgue   2019-12-04  624struct 
drm_i915_gem_mmap_offset *args = data;
cc662126b4134e Abdiel Janulgue   2019-12-04  625enum i915_mmap_type 
type;
126d5de38542d4 Chris Wilson  2019-12-04  626int err;
cc662126b4134e Abdiel Janulgue   2019-12-04  627  
8d65859a4cbae9 Chris Wilson  2019-12-07  628/*
8d65859a4cbae9 Chris Wilson  2019-12-07  629 * Historically we 
failed to c

Re: [Intel-gfx] Getting black screen with stable kernel 6.6

[Saarinen, Jani]

Hi,
Please report with these instructions: 
https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html 

> -Original Message-
> From: Intel-gfx  On Behalf Of VDRU
> VDRU
> Sent: Friday, November 10, 2023 4:59 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] Getting black screen with stable kernel 6.6
> 
> Hi,
> I've been using kernel 6.5.10 on Debian Sid without issue. I just tried 
> kernel 6.6,
> (and consequently 6.6.1) but only get a black screen. The system doesn't run a
> desktop environment but runs as a Kodi client using GBM for display output. 
> The
> system is a Beelink Mini
> S12 Pro (12th gen Alder Lake N100 cpu w/integrated gpu Alder Lake-N [UHD
> Graphics] [8086:46D1]) connected to an LG tv.
> 
> I'm not sure if the issue is the i915 driver itself or something else that was
> changed between 6.5.10 and 6.6 and am hoping someone more knowledgeable
> can help/point me in the right direction to finding that out. If it is an 
> i915 driver
> bug, I'd like to get it reported correctly.
> 
> If this isn't the appropriate place for reporting this, please let me know.
> 
> Thanks,
> Derek

Re: [Intel-gfx] [PULL] drm-intel-next-fixes

[Daniel Vetter]

On Wed, Nov 08, 2023 at 04:04:14PM +0200, Jani Nikula wrote:
> 
> Hi Dave & Daniel -
> 
> I see Dave already sent the pull request for v6.7-rc1 fixes, but here's
> some more.
> 
> drm-intel-next-fixes-2023-11-08:
> drm/i915 fixes for v6.7-rc1:
> - Fix null dereference when perf interface is not available
> - Fix a -Wstringop-overflow warning
> - Fix a -Wformat-truncation warning in intel_tc_port_init
> - Flush WC GGTT only on required platforms
> - Fix MTL HBR3 rate support on C10 phy and eDP
> - Fix MTL notify_guc for multi-GT
> - Bump GLK CDCLK frequency when driving multiple pipes
> - Fix potential spectre vulnerability
> 
> BR,
> Jani.
> 
> The following changes since commit 5258dfd4a6adb5f45f046b0dd2e73c680f880d9d:
> 
>   usb: typec: altmodes/displayport: fixup drm internal api change vs new 
> user. (2023-10-27 07:55:41 +1000)
> 
> are available in the Git repository at:
> 
>   git://anongit.freedesktop.org/drm/drm-intel 
> tags/drm-intel-next-fixes-2023-11-08

Pulled into drm-next, thanks.
-Sima

> 
> for you to fetch changes up to 9506fba463fcbdf8c8b7af3ec9ee34360df843fe:
> 
>   drm/i915/tc: Fix -Wformat-truncation in intel_tc_port_init (2023-11-06 
> 14:42:58 +0200)
> 
> 
> drm/i915 fixes for v6.7-rc1:
> - Fix null dereference when perf interface is not available
> - Fix a -Wstringop-overflow warning
> - Fix a -Wformat-truncation warning in intel_tc_port_init
> - Flush WC GGTT only on required platforms
> - Fix MTL HBR3 rate support on C10 phy and eDP
> - Fix MTL notify_guc for multi-GT
> - Bump GLK CDCLK frequency when driving multiple pipes
> - Fix potential spectre vulnerability
> 
> 
> Arnd Bergmann (1):
>   drm/i915/mtl: avoid stringop-overflow warning
> 
> Chaitanya Kumar Borah (1):
>   drm/i915/mtl: Support HBR3 rate with C10 phy and eDP in MTL
> 
> Harshit Mogalapalli (1):
>   i915/perf: Fix NULL deref bugs with drm_dbg() calls
> 
> Kunwu Chan (1):
>   drm/i915: Fix potential spectre vulnerability
> 
> Nirmoy Das (3):
>   drm/i915: Flush WC GGTT only on required platforms
>   drm/i915/mtl: Apply notify_guc to all GTs
>   drm/i915/tc: Fix -Wformat-truncation in intel_tc_port_init
> 
> Ville Syrjälä (1):
>   drm/i915: Bump GLK CDCLK frequency when driving multiple pipes
> 
>  drivers/gpu/drm/i915/display/intel_cdclk.c  | 12 ++
>  drivers/gpu/drm/i915/display/intel_dp.c |  2 +-
>  drivers/gpu/drm/i915/display/intel_tc.c | 11 ++---
>  drivers/gpu/drm/i915/gem/i915_gem_context.c |  1 +
>  drivers/gpu/drm/i915/gt/intel_ggtt.c| 35 
> -
>  drivers/gpu/drm/i915/gt/intel_rc6.c | 16 -
>  drivers/gpu/drm/i915/i915_debugfs_params.c  |  9 +---
>  drivers/gpu/drm/i915/i915_perf.c| 15 +++--
>  8 files changed, 65 insertions(+), 36 deletions(-)
> 
> -- 
> Jani Nikula, Intel

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch

Re: [Intel-gfx] [PATCH 1/2] MAINTAINERS: update drm/i915 W: and B: entries

[Rodrigo Vivi]

On Fri, Nov 10, 2023 at 01:48:06PM +0200, Jani Nikula wrote:
> The 01.org page has ceased to exist, and the relevant documentation is
> now hosted at https://drm.pages.freedesktop.org/intel-docs/
> 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: Tvrtko Ursulin 
> Signed-off-by: Jani Nikula 

Reviewed-by: Rodrigo Vivi 

> ---
>  MAINTAINERS | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index db78e674282f..fda92c15f687 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -10516,9 +10516,9 @@ M:Rodrigo Vivi 
>  M:   Tvrtko Ursulin 
>  L:   intel-gfx@lists.freedesktop.org
>  S:   Supported
> -W:   https://01.org/linuxgraphics/
> +W:   https://drm.pages.freedesktop.org/intel-docs/
>  Q:   http://patchwork.freedesktop.org/project/intel-gfx/
> -B:   https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs
> +B:   https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html
>  C:   irc://irc.oftc.net/intel-gfx
>  T:   git git://anongit.freedesktop.org/drm-intel
>  F:   Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon
> -- 
> 2.39.2
> 

Re: [Intel-gfx] [PATCH 2/2] drm/i915: update in-source bug filing URLs

[Rodrigo Vivi]

On Fri, Nov 10, 2023 at 01:48:07PM +0200, Jani Nikula wrote:
> The bug filing documentation has been moved from the gitlab wiki to
> gitlab pages at https://drm.pages.freedesktop.org/intel-docs/.
> 
> Cc: Joonas Lahtinen 
> Cc: Rodrigo Vivi 
> Cc: Tvrtko Ursulin 
> Signed-off-by: Jani Nikula 

Reviewed-by: Rodrigo Vivi 

> ---
>  drivers/gpu/drm/i915/Kconfig  | 2 +-
>  drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
>  drivers/gpu/drm/i915/i915_utils.h | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
> index ce397a8797f7..b5d6e3352071 100644
> --- a/drivers/gpu/drm/i915/Kconfig
> +++ b/drivers/gpu/drm/i915/Kconfig
> @@ -94,7 +94,7 @@ config DRM_I915_CAPTURE_ERROR
> This option enables capturing the GPU state when a hang is detected.
> This information is vital for triaging hangs and assists in debugging.
> Please report any hang for triaging according to:
> - 
> https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs
> + 
> https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html
>  
> If in doubt, say "Y".
>  
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
> b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 00559a75b798..d04660b60046 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -2178,7 +2178,7 @@ void i915_error_state_store(struct i915_gpu_coredump 
> *error)
>   ktime_get_real_seconds() - DRIVER_TIMESTAMP < DAY_AS_SECONDS(180)) {
>   pr_info("GPU hangs can indicate a bug anywhere in the entire 
> gfx stack, including userspace.\n");
>   pr_info("Please file a _new_ bug report at 
> https://gitlab.freedesktop.org/drm/intel/issues/new.\n;);
> - pr_info("Please see 
> https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs for 
> details.\n");
> + pr_info("Please see 
> https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html for 
> details.\n");
>   pr_info("drm/i915 developers can then reassign to the right 
> component if it's not a kernel issue.\n");
>   pr_info("The GPU crash dump is required to analyze GPU hangs, 
> so please always attach it.\n");
>   pr_info("GPU crash dump saved to /sys/class/drm/card%d/error\n",
> diff --git a/drivers/gpu/drm/i915/i915_utils.h 
> b/drivers/gpu/drm/i915/i915_utils.h
> index c61066498bf2..f98577967b7f 100644
> --- a/drivers/gpu/drm/i915/i915_utils.h
> +++ b/drivers/gpu/drm/i915/i915_utils.h
> @@ -40,7 +40,7 @@
>  struct drm_i915_private;
>  struct timer_list;
>  
> -#define FDO_BUG_URL 
> "https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs;
> +#define FDO_BUG_URL 
> "https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html;
>  
>  #define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
>__stringify(x), (long)(x))
> -- 
> 2.39.2
> 

[Intel-gfx] Getting black screen with stable kernel 6.6

[VDRU VDRU]

Hi,
I've been using kernel 6.5.10 on Debian Sid without issue. I just
tried kernel 6.6, (and consequently 6.6.1) but only get a black
screen. The system doesn't run a desktop environment but runs as a
Kodi client using GBM for display output. The system is a Beelink Mini
S12 Pro (12th gen Alder Lake N100 cpu w/integrated gpu Alder Lake-N
[UHD Graphics] [8086:46D1]) connected to an LG tv.

I'm not sure if the issue is the i915 driver itself or something else
that was changed between 6.5.10 and 6.6 and am hoping someone more
knowledgeable can help/point me in the right direction to finding that
out. If it is an i915 driver bug, I'd like to get it reported
correctly.

If this isn't the appropriate place for reporting this, please let me know.

Thanks,
Derek

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/xe2lpd: remove FBC restriction if PSR2 is enabled

[Patchwork]

== Series Details ==

Series: drm/i915/xe2lpd: remove FBC restriction if PSR2 is enabled
URL   : https://patchwork.freedesktop.org/series/126256/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13860 -> Patchwork_126256v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/index.html

Participating hosts (33 -> 32)
--

  Additional (1): fi-rkl-11600 
  Missing(2): fi-hsw-4770 bat-adlp-11 

Known issues


  Here are the changes found in Patchwork_126256v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- fi-rkl-11600:   NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- fi-rkl-11600:   NOTRUN -> [SKIP][2] ([i915#2190])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-rkl-11600:   NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_tiled_pread_basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][4] ([i915#3282])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@gem_tiled_pread_basic.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-glk-j4005:   [PASS][5] -> [DMESG-FAIL][6] ([i915#5334])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13860/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-rkl-11600:   NOTRUN -> [SKIP][7] ([i915#4103]) +1 other test skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- fi-rkl-11600:   NOTRUN -> [SKIP][8] ([i915#3555] / [i915#3840])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600:   NOTRUN -> [SKIP][9] ([fdo#109285] / [i915#4098])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][10] -> [FAIL][11] ([IGT#3])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13860/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-rpls-1: NOTRUN -> [SKIP][12] ([i915#1845])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/bat-rpls-1/igt@kms_pipe_crc_ba...@suspend-read-crc.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-rkl-11600:   NOTRUN -> [SKIP][13] ([i915#1072]) +3 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600:   NOTRUN -> [SKIP][14] ([i915#3555] / [i915#4098])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-read:
- fi-rkl-11600:   NOTRUN -> [SKIP][15] ([fdo#109295] / [i915#3291] / 
[i915#3708]) +2 other tests skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/fi-rkl-11600/igt@prime_v...@basic-read.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_contexts:
- bat-rpls-1: [INCOMPLETE][16] -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13860/bat-rpls-1/igt@i915_selftest@live@gt_contexts.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126256v1/bat-rpls-1/igt@i915_selftest@live@gt_contexts.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3282]: 

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Remove dead code around intel_atomic_helper->free_list

[Patchwork]

== Series Details ==

Series: drm/i915/display: Remove dead code around intel_atomic_helper->free_list
URL   : https://patchwork.freedesktop.org/series/126250/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13859 -> Patchwork_126250v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/index.html

Participating hosts (33 -> 34)
--

  Additional (1): fi-hsw-4770 

Known issues


  Here are the changes found in Patchwork_126250v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@gt_heartbeat:
- fi-glk-j4005:   [PASS][1] -> [DMESG-FAIL][2] ([i915#5334])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#5190])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][4] ([fdo#109271]) +12 other tests 
skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][5] ([i915#1845] / [i915#9197]) +3 
other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-vga-1:
- fi-hsw-4770:NOTRUN -> [DMESG-WARN][6] ([i915#8841]) +6 other 
tests dmesg-warn
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/fi-hsw-4770/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-vga-1.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1072]) +3 
other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html

  
 Possible fixes 

  * igt@i915_selftest@live@hangcheck:
- bat-dg2-11: [DMESG-FAIL][8] ([i915#7651]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-dg2-11/igt@i915_selftest@l...@hangcheck.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/bat-dg2-11/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][10] ([i915#8668]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
  [i915#9197]: https://gitlab.freedesktop.org/drm/intel/issues/9197


Build changes
-

  * Linux: CI_DRM_13859 -> Patchwork_126250v1

  CI-20190529: 20190529
  CI_DRM_13859: 9155ae0ae05f320d84eaf2c4e81413bf937a5f3c @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7581: 7581
  Patchwork_126250v1: 9155ae0ae05f320d84eaf2c4e81413bf937a5f3c @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

cd92fb99584f drm/i915/display: Remove dead code around 
intel_atomic_helper->free_list

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126250v1/index.html

Re: [Intel-gfx] [PATCH] drm/i915/display: Remove dead code around intel_atomic_helper->free_list

[Jani Nikula]

On Fri, 10 Nov 2023, Jouni Högander  wrote:
> After switching to directly using dma_fence instead of i915_sw_fence we
> have left some dead code around intel_atomic_helper->free_list. Remove that
> dead code.

Yay,

Reviewed-by: Jani Nikula 

>
> Signed-off-by: Jouni Högander 
> ---
>  drivers/gpu/drm/i915/display/intel_display.c  | 20 ---
>  .../gpu/drm/i915/display/intel_display_core.h |  6 --
>  .../drm/i915/display/intel_display_driver.c   |  7 ---
>  3 files changed, 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 3effafcbb411..387acf21b794 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -7086,24 +7086,6 @@ static void skl_commit_modeset_enables(struct 
> intel_atomic_state *state)
>   drm_WARN_ON(_priv->drm, update_pipes);
>  }
>  
> -static void intel_atomic_helper_free_state(struct drm_i915_private *dev_priv)
> -{
> - struct intel_atomic_state *state, *next;
> - struct llist_node *freed;
> -
> - freed = llist_del_all(_priv->display.atomic_helper.free_list);
> - llist_for_each_entry_safe(state, next, freed, freed)
> - drm_atomic_state_put(>base);
> -}
> -
> -void intel_atomic_helper_free_state_worker(struct work_struct *work)
> -{
> - struct drm_i915_private *dev_priv =
> - container_of(work, typeof(*dev_priv), 
> display.atomic_helper.free_work);
> -
> - intel_atomic_helper_free_state(dev_priv);
> -}
> -
>  static void intel_atomic_commit_fence_wait(struct intel_atomic_state 
> *intel_state)
>  {
>   struct drm_i915_private *i915 = to_i915(intel_state->base.dev);
> @@ -7139,8 +7121,6 @@ static void intel_atomic_cleanup_work(struct 
> work_struct *work)
>   drm_atomic_helper_cleanup_planes(>drm, >base);
>   drm_atomic_helper_commit_cleanup_done(>base);
>   drm_atomic_state_put(>base);
> -
> - intel_atomic_helper_free_state(i915);
>  }
>  
>  static void intel_atomic_prepare_plane_clear_colors(struct 
> intel_atomic_state *state)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h 
> b/drivers/gpu/drm/i915/display/intel_display_core.h
> index aa8be02c9e54..34945f733a97 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -298,12 +298,6 @@ struct intel_display {
>   const struct intel_audio_funcs *audio;
>   } funcs;
>  
> - /* Grouping using anonymous structs. Keep sorted. */
> - struct intel_atomic_helper {
> - struct llist_head free_list;
> - struct work_struct free_work;
> - } atomic_helper;
> -
>   struct {
>   /* backlight registers and fields in struct intel_panel */
>   struct mutex lock;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c 
> b/drivers/gpu/drm/i915/display/intel_display_driver.c
> index 62f7b10484be..9df9097a0255 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_driver.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
> @@ -259,10 +259,6 @@ int intel_display_driver_probe_noirq(struct 
> drm_i915_private *i915)
>   if (ret)
>   goto cleanup_vga_client_pw_domain_dmc;
>  
> - init_llist_head(>display.atomic_helper.free_list);
> - INIT_WORK(>display.atomic_helper.free_work,
> -   intel_atomic_helper_free_state_worker);
> -
>   intel_init_quirks(i915);
>  
>   intel_fbc_init(i915);
> @@ -430,9 +426,6 @@ void intel_display_driver_remove(struct drm_i915_private 
> *i915)
>   flush_workqueue(i915->display.wq.flip);
>   flush_workqueue(i915->display.wq.modeset);
>  
> - flush_work(>display.atomic_helper.free_work);
> - drm_WARN_ON(>drm, 
> !llist_empty(>display.atomic_helper.free_list));
> -
>   /*
>* MST topology needs to be suspended so we don't have any calls to
>* fbdev after it's finalized. MST will be destroyed later as part of

-- 
Jani Nikula, Intel

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: Remove dead code around intel_atomic_helper->free_list

[Patchwork]

== Series Details ==

Series: drm/i915/display: Remove dead code around intel_atomic_helper->free_list
URL   : https://patchwork.freedesktop.org/series/126250/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH] drm/i915/gsc: Assign a uabi class number to the GSC CS

[Tvrtko Ursulin]

On 09/11/2023 23:53, Daniele Ceraolo Spurio wrote:

The GSC CS is not exposed to the user, so we skipped assigning a uabi
class number for it. However, the trace logs use the uabi class and
instance to identify the engine, so leaving uabi class unset makes the
GSC CS show up as the RCS in those logs.
Given that the engine is not exposed to the user, we can't add a new
case in the uabi enum, so we insted internally define a kernel
reserved class using the next free number.

Fixes: 194babe26bdc ("drm/i915/mtl: don't expose GSC command streamer to the 
user")
Signed-off-by: Daniele Ceraolo Spurio 
Cc: Tvrtko Ursulin 
Cc: Alan Previn 
Cc: Matt Roper 
---
  drivers/gpu/drm/i915/gt/intel_engine_user.c | 17 -
  drivers/gpu/drm/i915/gt/intel_engine_user.h |  4 
  drivers/gpu/drm/i915/i915_drm_client.h  |  2 +-
  drivers/gpu/drm/i915/i915_drv.h |  2 +-
  4 files changed, 14 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.c 
b/drivers/gpu/drm/i915/gt/intel_engine_user.c
index 118164ddbb2e..3fd32bedd6e7 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.c
@@ -47,6 +47,7 @@ static const u8 uabi_classes[] = {
[VIDEO_DECODE_CLASS] = I915_ENGINE_CLASS_VIDEO,
[VIDEO_ENHANCEMENT_CLASS] = I915_ENGINE_CLASS_VIDEO_ENHANCE,
[COMPUTE_CLASS] = I915_ENGINE_CLASS_COMPUTE,
+   [OTHER_CLASS] = I915_KERNEL_RSVD_CLASS,


Could we set it to -1 (aka no uabi class) to avoid needing to maintain 
the new macros?


And then just teach intel_engines_driver_register to skip -1. Would also 
need teaching engine_rename to handle -1.


Might end up a smaller and more maintainable patch - worth a try do you 
think?



  };
  
  static int engine_cmp(void *priv, const struct list_head *A,

@@ -138,7 +139,7 @@ const char *intel_engine_class_repr(u8 class)
[COPY_ENGINE_CLASS] = "bcs",
[VIDEO_DECODE_CLASS] = "vcs",
[VIDEO_ENHANCEMENT_CLASS] = "vecs",
-   [OTHER_CLASS] = "other",
+   [OTHER_CLASS] = "gsc",


Maybe unrelated?

Regards,

Tvrtko


[COMPUTE_CLASS] = "ccs",
};
  
@@ -216,14 +217,8 @@ void intel_engines_driver_register(struct drm_i915_private *i915)

if (intel_gt_has_unrecoverable_error(engine->gt))
continue; /* ignore incomplete engines */
  
-		/*

-* We don't want to expose the GSC engine to the users, but we
-* still rename it so it is easier to identify in the debug logs
-*/
-   if (engine->id == GSC0) {
-   engine_rename(engine, "gsc", 0);
-   continue;
-   }
+   /* The only engine we expect in OTHER_CLASS is GSC0 */
+   GEM_WARN_ON(engine->class == OTHER_CLASS && engine->id != GSC0);
  
  		GEM_BUG_ON(engine->class >= ARRAY_SIZE(uabi_classes));

engine->uabi_class = uabi_classes[engine->class];
@@ -238,6 +233,10 @@ void intel_engines_driver_register(struct drm_i915_private 
*i915)
  intel_engine_class_repr(engine->class),
  engine->uabi_instance);
  
+		/* We don't want to expose the GSC engine to the users */

+   if (engine->id == GSC0)
+   continue;
+
rb_link_node(>uabi_node, prev, p);
rb_insert_color(>uabi_node, >uabi_engines);
  
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_user.h b/drivers/gpu/drm/i915/gt/intel_engine_user.h

index 3dc7e8ab9fbc..dd31805b2a5a 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_user.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_user.h
@@ -11,6 +11,10 @@
  struct drm_i915_private;
  struct intel_engine_cs;
  
+#define I915_LAST_UABI_ENGINE_CLASS I915_ENGINE_CLASS_COMPUTE

+#define I915_KERNEL_RSVD_CLASS (I915_LAST_UABI_ENGINE_CLASS + 1)
+#define I915_MAX_UABI_CLASSES (I915_KERNEL_RSVD_CLASS + 1)
+
  struct intel_engine_cs *
  intel_engine_lookup_user(struct drm_i915_private *i915, u8 class, u8 
instance);
  
diff --git a/drivers/gpu/drm/i915/i915_drm_client.h b/drivers/gpu/drm/i915/i915_drm_client.h

index 67816c912bca..c42cb2511348 100644
--- a/drivers/gpu/drm/i915/i915_drm_client.h
+++ b/drivers/gpu/drm/i915/i915_drm_client.h
@@ -12,7 +12,7 @@
  
  #include 
  
-#define I915_LAST_UABI_ENGINE_CLASS I915_ENGINE_CLASS_COMPUTE

+#include "gt/intel_engine_user.h"
  
  struct drm_file;

  struct drm_printer;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f3be9033a93f..a718b4cb5a2d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -238,7 +238,7 @@ struct drm_i915_private {
struct list_head uabi_engines_list;
struct rb_root uabi_engines;
};
-   unsigned int engine_uabi_class_count[I915_LAST_UABI_ENGINE_CLASS + 1];
+   

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/6] drm/i915: Add ability for tracking buffer objects per client (rev5)

[Tvrtko Ursulin]

On 09/11/2023 23:54, Patchwork wrote:

*Patch Details*
*Series:*	series starting with [CI,1/6] drm/i915: Add ability for 
tracking buffer objects per client (rev5)
*URL:*	https://patchwork.freedesktop.org/series/126064/ 


*State:*failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/index.html 




  CI Bug Log - changes from CI_DRM_13856_full -> Patchwork_126064v5_full


Summary

*FAILURE*

Serious unknown changes coming with Patchwork_126064v5_full absolutely 
need to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_126064v5_full, please notify your bug team 
(lgci.bug.fil...@intel.com) to allow them

to document this new failure mode, which will reduce false positives in CI.

External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126064v5/index.html



Participating hosts (10 -> 10)

No changes in participating hosts


Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_126064v5_full:



  IGT changes


Possible regressions

  * igt@gem_exec_suspend@basic-s3@smem:
  o shard-dg2: PASS


 -> INCOMPLETE 



This is failing on DG2 in general so it is unrelated.

Regards,

Tvrtko




Suppressed

The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.

  *

{igt@kms_flip_tiling@flip-change-tiling@pipe-b-dp-1-y-ccs-to-x}:

  o shard-apl: PASS


 -> INCOMPLETE 

  *

{igt@kms_pm_rpm@fences-dpms}:

  o shard-rkl: PASS


 -> INCOMPLETE 



Known issues

Here are the changes found in Patchwork_126064v5_full that come from 
known issues:



  IGT changes


Issues hit

  *

igt@gem_bad_reloc@negative-reloc-lut:

  o shard-dg2: NOTRUN -> SKIP


 (i915#3281 )
  *

igt@gem_ctx_persistence@processes:

  o shard-snb: NOTRUN -> SKIP


 (fdo#109271  / i915#1099 
)
  *

igt@gem_ctx_sseu@invalid-args:

  o shard-rkl: NOTRUN -> SKIP


 (i915#280 )
  *

igt@gem_eio@hibernate:

  o shard-dg2: NOTRUN -> ABORT


 (i915#7975  / i915#8213 
)
  *

igt@gem_eio@kms:

  o shard-dg1: PASS

 
-> FAIL 

 (i915#5784 )
  *

igt@gem_eio@reset-stress:

  o shard-snb: NOTRUN -> FAIL


 (i915#8898 )
  *

igt@gem_exec_balancer@bonded-false-hang:

  o shard-dg2: NOTRUN -> SKIP


 (i915#4812 )
  *

igt@gem_exec_balancer@parallel-contexts:

  o shard-rkl: NOTRUN -> SKIP


 (i915#4525 )
  *

igt@gem_exec_capture@capture-invisible@lmem0:

  o 

Re: [Intel-gfx] [PATCH v3 1/1] drm/i915/xe2lpd: implement WA for underruns while enabling FBC

[Kahola, Mika]

> -Original Message-
> From: Intel-gfx  On Behalf Of Vinod 
> Govindapillai
> Sent: Thursday, November 9, 2023 12:25 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Syrjala, Ville 
> Subject: [Intel-gfx] [PATCH v3 1/1] drm/i915/xe2lpd: implement WA for 
> underruns while enabling FBC
> 
> FIFO underruns are observed when FBC is enabled on plane 2 or 3.
> This is root caused to a HW bug and the recommended WA is to update the FBC 
> enabling sequence. The plane binding register bits
> need to be updated separately before programming the FBC enable bit.
> 
> HSD: 16021232047
> Signed-off-by: Vinod Govindapillai 

To me the patch seems to do what WA suggests.

Reviewed-by: Mika Kahola 

> ---
>  drivers/gpu/drm/i915/display/intel_fbc.c | 13 -
>  1 file changed, 12 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index bde12fe62275..8a3594e4d992 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -608,6 +608,7 @@ static u32 ivb_dpfc_ctl(struct intel_fbc *fbc)  static 
> void ivb_fbc_activate(struct intel_fbc *fbc)  {
>   struct drm_i915_private *i915 = fbc->i915;
> + u32 dpfc_ctl;
> 
>   if (DISPLAY_VER(i915) >= 10)
>   glk_fbc_program_cfb_stride(fbc);
> @@ -617,8 +618,18 @@ static void ivb_fbc_activate(struct intel_fbc *fbc)
>   if (intel_gt_support_legacy_fencing(to_gt(i915)))
>   snb_fbc_program_fence(fbc);
> 
> + /*
> +  * xe2lpd: WA for FIFO underruns while enabling FBC on planes 2 or 3
> +  * 1.Write FBC_CTL with Plane binding set correctly with FBC enable = 0
> +  * 2.Write FBC_CTL with Plane binding set correctly with FBC enable = 1
> +  * HSD: 16021232047
> +  */
> + dpfc_ctl = ivb_dpfc_ctl(fbc);
> + if (DISPLAY_VER(i915) >= 20)
> + intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id), dpfc_ctl);
> +
>   intel_de_write(i915, ILK_DPFC_CONTROL(fbc->id),
> -DPFC_CTL_EN | ivb_dpfc_ctl(fbc));
> +DPFC_CTL_EN | dpfc_ctl);
>  }
> 
>  static bool ivb_fbc_is_compressing(struct intel_fbc *fbc)
> --
> 2.34.1

[Intel-gfx] [PATCH 2/2] drm/i915: update in-source bug filing URLs

[Jani Nikula]

The bug filing documentation has been moved from the gitlab wiki to
gitlab pages at https://drm.pages.freedesktop.org/intel-docs/.

Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: Tvrtko Ursulin 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/Kconfig  | 2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
 drivers/gpu/drm/i915/i915_utils.h | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index ce397a8797f7..b5d6e3352071 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -94,7 +94,7 @@ config DRM_I915_CAPTURE_ERROR
  This option enables capturing the GPU state when a hang is detected.
  This information is vital for triaging hangs and assists in debugging.
  Please report any hang for triaging according to:
-   
https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs
+   
https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html
 
  If in doubt, say "Y".
 
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c 
b/drivers/gpu/drm/i915/i915_gpu_error.c
index 00559a75b798..d04660b60046 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -2178,7 +2178,7 @@ void i915_error_state_store(struct i915_gpu_coredump 
*error)
ktime_get_real_seconds() - DRIVER_TIMESTAMP < DAY_AS_SECONDS(180)) {
pr_info("GPU hangs can indicate a bug anywhere in the entire 
gfx stack, including userspace.\n");
pr_info("Please file a _new_ bug report at 
https://gitlab.freedesktop.org/drm/intel/issues/new.\n;);
-   pr_info("Please see 
https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs for 
details.\n");
+   pr_info("Please see 
https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html for 
details.\n");
pr_info("drm/i915 developers can then reassign to the right 
component if it's not a kernel issue.\n");
pr_info("The GPU crash dump is required to analyze GPU hangs, 
so please always attach it.\n");
pr_info("GPU crash dump saved to /sys/class/drm/card%d/error\n",
diff --git a/drivers/gpu/drm/i915/i915_utils.h 
b/drivers/gpu/drm/i915/i915_utils.h
index c61066498bf2..f98577967b7f 100644
--- a/drivers/gpu/drm/i915/i915_utils.h
+++ b/drivers/gpu/drm/i915/i915_utils.h
@@ -40,7 +40,7 @@
 struct drm_i915_private;
 struct timer_list;
 
-#define FDO_BUG_URL 
"https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs;
+#define FDO_BUG_URL 
"https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html;
 
 #define MISSING_CASE(x) WARN(1, "Missing case (%s == %ld)\n", \
 __stringify(x), (long)(x))
-- 
2.39.2

[Intel-gfx] [PATCH 1/2] MAINTAINERS: update drm/i915 W: and B: entries

[Jani Nikula]

The 01.org page has ceased to exist, and the relevant documentation is
now hosted at https://drm.pages.freedesktop.org/intel-docs/

Cc: Joonas Lahtinen 
Cc: Rodrigo Vivi 
Cc: Tvrtko Ursulin 
Signed-off-by: Jani Nikula 
---
 MAINTAINERS | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/MAINTAINERS b/MAINTAINERS
index db78e674282f..fda92c15f687 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10516,9 +10516,9 @@ M:  Rodrigo Vivi 
 M: Tvrtko Ursulin 
 L: intel-gfx@lists.freedesktop.org
 S: Supported
-W: https://01.org/linuxgraphics/
+W: https://drm.pages.freedesktop.org/intel-docs/
 Q: http://patchwork.freedesktop.org/project/intel-gfx/
-B: https://gitlab.freedesktop.org/drm/intel/-/wikis/How-to-file-i915-bugs
+B: https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html
 C: irc://irc.oftc.net/intel-gfx
 T: git git://anongit.freedesktop.org/drm-intel
 F: Documentation/ABI/testing/sysfs-driver-intel-i915-hwmon
-- 
2.39.2

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: abstract plane protection check (rev3)

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915: abstract plane protection check 
(rev3)
URL   : https://patchwork.freedesktop.org/series/126205/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13859 -> Patchwork_126205v3


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/index.html

Participating hosts (33 -> 34)
--

  Additional (1): bat-dg2-9 

Known issues


  Here are the changes found in Patchwork_126205v3 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_mmap@basic:
- bat-dg2-9:  NOTRUN -> [SKIP][1] ([i915#4083])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-dg2-9:  NOTRUN -> [SKIP][2] ([i915#4077]) +2 other tests skip
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-dg2-9:  NOTRUN -> [SKIP][3] ([i915#4079]) +1 other test skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@gem_render_tiled_bl...@basic.html

  * igt@i915_pm_rps@basic-api:
- bat-dg2-9:  NOTRUN -> [SKIP][4] ([i915#6621])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-dg2-9:  NOTRUN -> [SKIP][5] ([i915#5190])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg2-9:  NOTRUN -> [SKIP][6] ([i915#4215] / [i915#5190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-9:  NOTRUN -> [SKIP][7] ([i915#4212]) +6 other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html

  * igt@kms_addfb_basic@tile-pitch-mismatch:
- bat-dg2-9:  NOTRUN -> [SKIP][8] ([i915#4212] / [i915#5608])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@kms_addfb_ba...@tile-pitch-mismatch.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-dg2-9:  NOTRUN -> [SKIP][9] ([i915#4103] / [i915#4213] / 
[i915#5608]) +1 other test skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-dg2-9:  NOTRUN -> [SKIP][10] ([fdo#109285])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
- bat-dg2-9:  NOTRUN -> [SKIP][11] ([i915#5274])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@kms_force_connector_ba...@prune-stale-modes.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][12] ([i915#1845] / [i915#9197]) +3 
other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  * igt@kms_psr@sprite_plane_onoff:
- bat-jsl-3:  [PASS][13] -> [SKIP][14] ([i915#9648]) +3 other tests 
skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
- bat-dg2-9:  NOTRUN -> [SKIP][15] ([i915#1072]) +3 other tests skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-dg2-9:  NOTRUN -> [SKIP][16] ([i915#3555] / [i915#4098])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@kms_setm...@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
- bat-dg2-9:  NOTRUN -> [SKIP][17] ([i915#3708])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@prime_v...@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-mmap:
- bat-dg2-9:  NOTRUN -> [SKIP][18] ([i915#3708] / [i915#4077]) +1 
other test skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126205v3/bat-dg2-9/igt@prime_v...@basic-fence-mmap.html

  * igt@prime_vgem@basic-write:
- bat-dg2-9:  NOTRUN -> [SKIP][19] 

Re: [Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

[Tvrtko Ursulin]

On 10/11/2023 10:58, Dipam Turkar wrote:

Making i915 use drm_gem_create_mmap_offset() instead of its custom
implementations for associating GEM object with a fake offset.


Does it compile?

Regards,

Tvrtko


Signed-off-by: Dipam Turkar 
---
  drivers/gpu/drm/i915/gem/i915_gem_mman.c | 192 ---
  drivers/gpu/drm/i915/gem/i915_gem_mman.h |   4 -
  drivers/gpu/drm/i915/i915_driver.c   |   3 +-
  3 files changed, 2 insertions(+), 197 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index aa4d842d4c5a..6b73fe509270 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -600,198 +600,6 @@ void i915_gem_object_release_mmap_offset(struct 
drm_i915_gem_object *obj)
spin_unlock(>mmo.lock);
  }
  
-static struct i915_mmap_offset *

-lookup_mmo(struct drm_i915_gem_object *obj,
-  enum i915_mmap_type mmap_type)
-{
-   struct rb_node *rb;
-
-   spin_lock(>mmo.lock);
-   rb = obj->mmo.offsets.rb_node;
-   while (rb) {
-   struct i915_mmap_offset *mmo =
-   rb_entry(rb, typeof(*mmo), offset);
-
-   if (mmo->mmap_type == mmap_type) {
-   spin_unlock(>mmo.lock);
-   return mmo;
-   }
-
-   if (mmo->mmap_type < mmap_type)
-   rb = rb->rb_right;
-   else
-   rb = rb->rb_left;
-   }
-   spin_unlock(>mmo.lock);
-
-   return NULL;
-}
-
-static struct i915_mmap_offset *
-insert_mmo(struct drm_i915_gem_object *obj, struct i915_mmap_offset *mmo)
-{
-   struct rb_node *rb, **p;
-
-   spin_lock(>mmo.lock);
-   rb = NULL;
-   p = >mmo.offsets.rb_node;
-   while (*p) {
-   struct i915_mmap_offset *pos;
-
-   rb = *p;
-   pos = rb_entry(rb, typeof(*pos), offset);
-
-   if (pos->mmap_type == mmo->mmap_type) {
-   spin_unlock(>mmo.lock);
-   drm_vma_offset_remove(obj->base.dev->vma_offset_manager,
- >vma_node);
-   kfree(mmo);
-   return pos;
-   }
-
-   if (pos->mmap_type < mmo->mmap_type)
-   p = >rb_right;
-   else
-   p = >rb_left;
-   }
-   rb_link_node(>offset, rb, p);
-   rb_insert_color(>offset, >mmo.offsets);
-   spin_unlock(>mmo.lock);
-
-   return mmo;
-}
-
-static struct i915_mmap_offset *
-mmap_offset_attach(struct drm_i915_gem_object *obj,
-  enum i915_mmap_type mmap_type,
-  struct drm_file *file)
-{
-   struct drm_i915_private *i915 = to_i915(obj->base.dev);
-   struct i915_mmap_offset *mmo;
-   int err;
-
-   GEM_BUG_ON(obj->ops->mmap_offset || obj->ops->mmap_ops);
-
-   mmo = lookup_mmo(obj, mmap_type);
-   if (mmo)
-   goto out;
-
-   mmo = kmalloc(sizeof(*mmo), GFP_KERNEL);
-   if (!mmo)
-   return ERR_PTR(-ENOMEM);
-
-   mmo->obj = obj;
-   mmo->mmap_type = mmap_type;
-   drm_vma_node_reset(>vma_node);
-
-   err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
->vma_node, obj->base.size / PAGE_SIZE);
-   if (likely(!err))
-   goto insert;
-
-   /* Attempt to reap some mmap space from dead objects */
-   err = intel_gt_retire_requests_timeout(to_gt(i915), 
MAX_SCHEDULE_TIMEOUT,
-  NULL);
-   if (err)
-   goto err;
-
-   i915_gem_drain_freed_objects(i915);
-   err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
->vma_node, obj->base.size / PAGE_SIZE);
-   if (err)
-   goto err;
-
-insert:
-   mmo = insert_mmo(obj, mmo);
-   GEM_BUG_ON(lookup_mmo(obj, mmap_type) != mmo);
-out:
-   if (file)
-   drm_vma_node_allow_once(>vma_node, file);
-   return mmo;
-
-err:
-   kfree(mmo);
-   return ERR_PTR(err);
-}
-
-static int
-__assign_mmap_offset(struct drm_i915_gem_object *obj,
-enum i915_mmap_type mmap_type,
-u64 *offset, struct drm_file *file)
-{
-   struct i915_mmap_offset *mmo;
-
-   if (i915_gem_object_never_mmap(obj))
-   return -ENODEV;
-
-   if (obj->ops->mmap_offset)  {
-   if (mmap_type != I915_MMAP_TYPE_FIXED)
-   return -ENODEV;
-
-   *offset = obj->ops->mmap_offset(obj);
-   return 0;
-   }
-
-   if (mmap_type == I915_MMAP_TYPE_FIXED)
-   return -ENODEV;
-
-   if (mmap_type != I915_MMAP_TYPE_GTT &&
-   !i915_gem_object_has_struct_page(obj) &&
-   !i915_gem_object_has_iomem(obj))
-   return -ENODEV;
-
-

[Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

[Dipam Turkar]

Making i915 use drm_gem_create_mmap_offset() instead of its custom
implementations for associating GEM object with a fake offset.

Signed-off-by: Dipam Turkar 
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 192 ---
 drivers/gpu/drm/i915/gem/i915_gem_mman.h |   4 -
 drivers/gpu/drm/i915/i915_driver.c   |   3 +-
 3 files changed, 2 insertions(+), 197 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c 
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index aa4d842d4c5a..6b73fe509270 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -600,198 +600,6 @@ void i915_gem_object_release_mmap_offset(struct 
drm_i915_gem_object *obj)
spin_unlock(>mmo.lock);
 }
 
-static struct i915_mmap_offset *
-lookup_mmo(struct drm_i915_gem_object *obj,
-  enum i915_mmap_type mmap_type)
-{
-   struct rb_node *rb;
-
-   spin_lock(>mmo.lock);
-   rb = obj->mmo.offsets.rb_node;
-   while (rb) {
-   struct i915_mmap_offset *mmo =
-   rb_entry(rb, typeof(*mmo), offset);
-
-   if (mmo->mmap_type == mmap_type) {
-   spin_unlock(>mmo.lock);
-   return mmo;
-   }
-
-   if (mmo->mmap_type < mmap_type)
-   rb = rb->rb_right;
-   else
-   rb = rb->rb_left;
-   }
-   spin_unlock(>mmo.lock);
-
-   return NULL;
-}
-
-static struct i915_mmap_offset *
-insert_mmo(struct drm_i915_gem_object *obj, struct i915_mmap_offset *mmo)
-{
-   struct rb_node *rb, **p;
-
-   spin_lock(>mmo.lock);
-   rb = NULL;
-   p = >mmo.offsets.rb_node;
-   while (*p) {
-   struct i915_mmap_offset *pos;
-
-   rb = *p;
-   pos = rb_entry(rb, typeof(*pos), offset);
-
-   if (pos->mmap_type == mmo->mmap_type) {
-   spin_unlock(>mmo.lock);
-   drm_vma_offset_remove(obj->base.dev->vma_offset_manager,
- >vma_node);
-   kfree(mmo);
-   return pos;
-   }
-
-   if (pos->mmap_type < mmo->mmap_type)
-   p = >rb_right;
-   else
-   p = >rb_left;
-   }
-   rb_link_node(>offset, rb, p);
-   rb_insert_color(>offset, >mmo.offsets);
-   spin_unlock(>mmo.lock);
-
-   return mmo;
-}
-
-static struct i915_mmap_offset *
-mmap_offset_attach(struct drm_i915_gem_object *obj,
-  enum i915_mmap_type mmap_type,
-  struct drm_file *file)
-{
-   struct drm_i915_private *i915 = to_i915(obj->base.dev);
-   struct i915_mmap_offset *mmo;
-   int err;
-
-   GEM_BUG_ON(obj->ops->mmap_offset || obj->ops->mmap_ops);
-
-   mmo = lookup_mmo(obj, mmap_type);
-   if (mmo)
-   goto out;
-
-   mmo = kmalloc(sizeof(*mmo), GFP_KERNEL);
-   if (!mmo)
-   return ERR_PTR(-ENOMEM);
-
-   mmo->obj = obj;
-   mmo->mmap_type = mmap_type;
-   drm_vma_node_reset(>vma_node);
-
-   err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
->vma_node, obj->base.size / PAGE_SIZE);
-   if (likely(!err))
-   goto insert;
-
-   /* Attempt to reap some mmap space from dead objects */
-   err = intel_gt_retire_requests_timeout(to_gt(i915), 
MAX_SCHEDULE_TIMEOUT,
-  NULL);
-   if (err)
-   goto err;
-
-   i915_gem_drain_freed_objects(i915);
-   err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
->vma_node, obj->base.size / PAGE_SIZE);
-   if (err)
-   goto err;
-
-insert:
-   mmo = insert_mmo(obj, mmo);
-   GEM_BUG_ON(lookup_mmo(obj, mmap_type) != mmo);
-out:
-   if (file)
-   drm_vma_node_allow_once(>vma_node, file);
-   return mmo;
-
-err:
-   kfree(mmo);
-   return ERR_PTR(err);
-}
-
-static int
-__assign_mmap_offset(struct drm_i915_gem_object *obj,
-enum i915_mmap_type mmap_type,
-u64 *offset, struct drm_file *file)
-{
-   struct i915_mmap_offset *mmo;
-
-   if (i915_gem_object_never_mmap(obj))
-   return -ENODEV;
-
-   if (obj->ops->mmap_offset)  {
-   if (mmap_type != I915_MMAP_TYPE_FIXED)
-   return -ENODEV;
-
-   *offset = obj->ops->mmap_offset(obj);
-   return 0;
-   }
-
-   if (mmap_type == I915_MMAP_TYPE_FIXED)
-   return -ENODEV;
-
-   if (mmap_type != I915_MMAP_TYPE_GTT &&
-   !i915_gem_object_has_struct_page(obj) &&
-   !i915_gem_object_has_iomem(obj))
-   return -ENODEV;
-
-   mmo = mmap_offset_attach(obj, mmap_type, file);
-   if (IS_ERR(mmo))
- 

[Intel-gfx] [PATCH 11/11] drm/i915/dp_mst: Add support for forcing dsc fractional bpp via debugfs

[Ankit Nautiyal]

If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
compressed bpp is fractional. Continue if the computed compressed bpp
turns out to be a integer.

Signed-off-by: Ankit Nautiyal 
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 14 +++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 322046bb7d42..26b51ba6871d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -172,6 +172,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct 
intel_encoder *encoder,
struct intel_link_m_n remote_m_n;
int link_bpp_x16;
 
+   if (dsc && intel_dp->force_dsc_fractional_bpp_en &&
+   !to_bpp_frac(bpp_x16))
+   continue;
+
drm_dbg_kms(>drm, "Trying bpp " BPP_X16_FMT "\n", 
BPP_X16_ARGS(bpp_x16));
 
ret = intel_dp_mst_check_constraints(i915, bpp_x16, 
adjusted_mode, crtc_state, dsc);
@@ -225,12 +229,16 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct 
intel_encoder *encoder,
drm_dbg_kms(>drm, "failed finding vcpi slots:%d\n",
slots);
} else {
-   if (!dsc)
-   crtc_state->pipe_bpp = to_bpp_int(bpp_x16);
-   else
+   if (dsc) {
crtc_state->dsc.compressed_bpp_x16 = bpp_x16;
+   if (intel_dp->force_dsc_fractional_bpp_en && 
to_bpp_frac(bpp_x16))
+   drm_dbg_kms(>drm, "Forcing DSC fractional 
bpp\n");
+   } else {
+   crtc_state->pipe_bpp = to_bpp_int(bpp_x16);
+   }
drm_dbg_kms(>drm, "Got %d slots for pipe bpp " 
BPP_X16_FMT " dsc %d\n",
slots, BPP_X16_ARGS(bpp_x16), dsc);
+
}
 
return slots;
-- 
2.40.1

[Intel-gfx] [PATCH 10/11] drm/i916/dp_mst: Iterate over the DSC bpps as per DSC precision support

[Ankit Nautiyal]

Currently we iterate over the bpp_x16 in step of 16.
Use DSC fractional bpp precision supported by the sink to compute
the appropriate steps to iterate over the bpps.

Signed-off-by: Ankit Nautiyal 
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index e7806fe11b9d..322046bb7d42 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -273,6 +273,8 @@ static int intel_dp_dsc_mst_compute_link_config(struct 
intel_encoder *encoder,
int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
u8 dsc_max_bpc;
int min_compressed_bpp, max_compressed_bpp;
+   int bppx16_incr = drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd);
+   int bppx16_step;
 
/* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */
if (DISPLAY_VER(i915) >= 12)
@@ -327,11 +329,16 @@ static int intel_dp_dsc_mst_compute_link_config(struct 
intel_encoder *encoder,
min_compressed_bpp = intel_dp_dsc_nearest_valid_bpp(i915, 
min_compressed_bpp,

crtc_state->pipe_bpp);
 
+   if (DISPLAY_VER(i915) < 14 || bppx16_incr <= 1)
+   bppx16_step = 16;
+   else
+   bppx16_step = 16 / bppx16_incr;
+
slots = intel_dp_mst_find_vcpi_slots_for_bpp(encoder, crtc_state,
 
to_bpp_x16(max_compressed_bpp),
 
to_bpp_x16(min_compressed_bpp),
 limits,
-conn_state, 16, true);
+conn_state, bppx16_step, 
true);
 
if (slots < 0)
return slots;
-- 
2.40.1

[Intel-gfx] [PATCH 09/11] drm/i915/dp_mst: Use precision of 1/16 for computing bpp

[Ankit Nautiyal]

Modify the functions to deal with bpps with 1/16 precision.
This will make way for cases when DSC with fractional bpp is used.
For bpp without DSC, there is no change, as we still use whole numbers.

Signed-off-by: Ankit Nautiyal 
---
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 56 +++--
 1 file changed, 30 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 5c7e9d296483..e7806fe11b9d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -47,20 +47,21 @@
 #include "intel_vdsc.h"
 #include "skl_scaler.h"
 
-static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int 
bpp,
+static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int 
bpp_x16,
  const struct drm_display_mode 
*adjusted_mode,
  struct intel_crtc_state *crtc_state,
  bool dsc)
 {
if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) <= 13 && dsc) {
-   int output_bpp = bpp;
+   int output_bpp_x16 = bpp_x16;
/* DisplayPort 2 128b/132b, bits per lane is always 32 */
int symbol_clock = crtc_state->port_clock / 32;
 
-   if (output_bpp * adjusted_mode->crtc_clock >=
+   if (DIV_ROUND_UP(output_bpp_x16 * adjusted_mode->crtc_clock, 
16) >=
symbol_clock * 72) {
drm_dbg_kms(>drm, "UHBR check failed(required bw 
%d available %d)\n",
-   output_bpp * adjusted_mode->crtc_clock, 
symbol_clock * 72);
+   DIV_ROUND_UP(output_bpp_x16 * 
adjusted_mode->crtc_clock, 16),
+   symbol_clock * 72);
return -EINVAL;
}
}
@@ -127,8 +128,8 @@ static void intel_dp_mst_compute_m_n(const struct 
intel_crtc_state *crtc_state,
 
 static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder,
struct intel_crtc_state 
*crtc_state,
-   int max_bpp,
-   int min_bpp,
+   int max_bpp_x16,
+   int min_bpp_x16,
struct link_config_limits 
*limits,
struct drm_connector_state 
*conn_state,
int step,
@@ -143,7 +144,7 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct 
intel_encoder *encoder,
struct drm_i915_private *i915 = to_i915(connector->base.dev);
const struct drm_display_mode *adjusted_mode =
_state->hw.adjusted_mode;
-   int bpp, slots = -EINVAL;
+   int bpp_x16, slots = -EINVAL;
int ret = 0;
 
mst_state = drm_atomic_get_mst_topology_state(state, 
_dp->mst_mgr);
@@ -164,25 +165,25 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct 
intel_encoder *encoder,
  crtc_state->port_clock,
  crtc_state->lane_count);
 
-   drm_dbg_kms(>drm, "Looking for slots in range min bpp %d max bpp 
%d\n",
-   min_bpp, max_bpp);
+   drm_dbg_kms(>drm, "Looking for slots in range min bpp " 
BPP_X16_FMT " max bpp " BPP_X16_FMT "\n",
+   BPP_X16_ARGS(min_bpp_x16), BPP_X16_ARGS(max_bpp_x16));
 
-   for (bpp = max_bpp; bpp >= min_bpp; bpp -= step) {
+   for (bpp_x16 = max_bpp_x16; bpp_x16 >= min_bpp_x16; bpp_x16 -= step) {
struct intel_link_m_n remote_m_n;
-   int link_bpp;
+   int link_bpp_x16;
 
-   drm_dbg_kms(>drm, "Trying bpp %d\n", bpp);
+   drm_dbg_kms(>drm, "Trying bpp " BPP_X16_FMT "\n", 
BPP_X16_ARGS(bpp_x16));
 
-   ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, 
crtc_state, dsc);
+   ret = intel_dp_mst_check_constraints(i915, bpp_x16, 
adjusted_mode, crtc_state, dsc);
if (ret)
continue;
 
-   link_bpp = dsc ? bpp :
-   intel_dp_output_bpp(crtc_state->output_format, bpp);
+   link_bpp_x16 = dsc ? bpp_x16 :
+   intel_dp_output_bpp(crtc_state->output_format, 
to_bpp_int(bpp_x16));
 
-   intel_dp_mst_compute_m_n(crtc_state, connector, false, dsc, 
to_bpp_x16(link_bpp),
+   intel_dp_mst_compute_m_n(crtc_state, connector, false, dsc, 
link_bpp_x16,
 _state->dp_m_n);
-   intel_dp_mst_compute_m_n(crtc_state, connector, true, dsc, 

[Intel-gfx] [PATCH 08/11] drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfs

[Ankit Nautiyal]

From: Swati Sharma 

If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff
compressed bpp is fractional. Continue if the computed compressed bpp
turns out to be a integer.

v2:
-Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)
-Fix comment (Suraj)

Signed-off-by: Swati Sharma 
Reviewed-by: Suraj Kandpal 
Reviewed-by: Sui Jingfeng 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index e53c87825194..607d03382db8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1928,6 +1928,9 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp,
for (compressed_bppx16 = dsc_max_bpp;
 compressed_bppx16 >= dsc_min_bpp;
 compressed_bppx16 -= bppx16_step) {
+   if (intel_dp->force_dsc_fractional_bpp_en &&
+   !to_bpp_frac(compressed_bppx16))
+   continue;
ret = dsc_compute_link_config(intel_dp,
  pipe_config,
  limits,
@@ -1935,6 +1938,10 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp,
  timeslots);
if (ret == 0) {
pipe_config->dsc.compressed_bpp_x16 = compressed_bppx16;
+   if (intel_dp->force_dsc_fractional_bpp_en &&
+   to_bpp_frac(compressed_bppx16))
+   drm_dbg_kms(>drm, "Forcing DSC fractional 
bpp\n");
+
return 0;
}
}
-- 
2.40.1

[Intel-gfx] [PATCH 07/11] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp

[Ankit Nautiyal]

From: Swati Sharma 

DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show
to depict sink's precision.
Also, new debugfs entry is created to enforce fractional bpp.
If Force_DSC_Fractional_BPP_en is set then while iterating over
output bpp with fractional step size we will continue if output_bpp is
computed as integer. With this approach, we will be able to validate
DSC with fractional bpp.

v2:
Add drm_modeset_unlock to new line(Suraj)

Signed-off-by: Swati Sharma 
Signed-off-by: Ankit Nautiyal 
Signed-off-by: Mitul Golani 
Reviewed-by: Suraj Kandpal 
Reviewed-by: Sui Jingfeng 
---
 .../drm/i915/display/intel_display_debugfs.c  | 84 +++
 .../drm/i915/display/intel_display_types.h|  1 +
 2 files changed, 85 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c 
b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index f3700c18d685..915420d0cef8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -1256,6 +1256,8 @@ static int i915_dsc_fec_support_show(struct seq_file *m, 
void *data)
  
DP_DSC_YCbCr420_Native)),
   
str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
  
DP_DSC_YCbCr444)));
+   seq_printf(m, "DSC_Sink_BPP_Precision: %d\n",
+  drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd));
seq_printf(m, "Force_DSC_Enable: %s\n",
   str_yes_no(intel_dp->force_dsc_en));
if (!intel_dp_is_edp(intel_dp))
@@ -1448,6 +1450,85 @@ static const struct file_operations 
i915_dsc_output_format_fops = {
.write = i915_dsc_output_format_write
 };
 
+static int i915_dsc_fractional_bpp_show(struct seq_file *m, void *data)
+{
+   struct drm_connector *connector = m->private;
+   struct drm_device *dev = connector->dev;
+   struct drm_crtc *crtc;
+   struct intel_dp *intel_dp;
+   struct intel_connector *intel_connector = to_intel_connector(connector);
+   struct intel_encoder *encoder = intel_attached_encoder(intel_connector);
+   int ret;
+
+   if (!encoder)
+   return -ENODEV;
+
+   ret = 
drm_modeset_lock_single_interruptible(>mode_config.connection_mutex);
+   if (ret)
+   return ret;
+
+   crtc = connector->state->crtc;
+   if (connector->status != connector_status_connected || !crtc) {
+   ret = -ENODEV;
+   goto out;
+   }
+
+   intel_dp = intel_attached_dp(intel_connector);
+   seq_printf(m, "Force_DSC_Fractional_BPP_Enable: %s\n",
+  str_yes_no(intel_dp->force_dsc_fractional_bpp_en));
+
+out:
+   drm_modeset_unlock(>mode_config.connection_mutex);
+
+   return ret;
+}
+
+static ssize_t i915_dsc_fractional_bpp_write(struct file *file,
+const char __user *ubuf,
+size_t len, loff_t *offp)
+{
+   struct drm_connector *connector =
+   ((struct seq_file *)file->private_data)->private;
+   struct intel_encoder *encoder = 
intel_attached_encoder(to_intel_connector(connector));
+   struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+   struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
+   bool dsc_fractional_bpp_enable = false;
+   int ret;
+
+   if (len == 0)
+   return 0;
+
+   drm_dbg(>drm,
+   "Copied %zu bytes from user to force fractional bpp for DSC\n", 
len);
+
+   ret = kstrtobool_from_user(ubuf, len, _fractional_bpp_enable);
+   if (ret < 0)
+   return ret;
+
+   drm_dbg(>drm, "Got %s for DSC Fractional BPP Enable\n",
+   (dsc_fractional_bpp_enable) ? "true" : "false");
+   intel_dp->force_dsc_fractional_bpp_en = dsc_fractional_bpp_enable;
+
+   *offp += len;
+
+   return len;
+}
+
+static int i915_dsc_fractional_bpp_open(struct inode *inode,
+   struct file *file)
+{
+   return single_open(file, i915_dsc_fractional_bpp_show, 
inode->i_private);
+}
+
+static const struct file_operations i915_dsc_fractional_bpp_fops = {
+   .owner = THIS_MODULE,
+   .open = i915_dsc_fractional_bpp_open,
+   .read = seq_read,
+   .llseek = seq_lseek,
+   .release = single_release,
+   .write = i915_dsc_fractional_bpp_write
+};
+
 /*
  * Returns the Current CRTC's bpc.
  * Example usage: cat /sys/kernel/debug/dri/0/crtc-0/i915_current_bpc
@@ -1525,6 +1606,9 @@ void intel_connector_debugfs_add(struct intel_connector 
*intel_connector)
 
debugfs_create_file("i915_dsc_output_format", 0644, root,
connector, _dsc_output_format_fops);
+
+   

[Intel-gfx] [PATCH 05/11] drm/i915/dsc/mtl: Add support for fractional bpp

[Ankit Nautiyal]

From: Vandita Kulkarni 

Consider the fractional bpp while reading the qp values.

v2: Use helpers for fractional, integral bits of bits_per_pixel. (Suraj)

Signed-off-by: Vandita Kulkarni 
Signed-off-by: Ankit Nautiyal 
Reviewed-by: Suraj Kandpal 
Reviewed-by: Sui Jingfeng 
---
 .../gpu/drm/i915/display/intel_qp_tables.c|  3 ---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 25 +++
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_qp_tables.c 
b/drivers/gpu/drm/i915/display/intel_qp_tables.c
index 543cdc46aa1d..600c815e37e4 100644
--- a/drivers/gpu/drm/i915/display/intel_qp_tables.c
+++ b/drivers/gpu/drm/i915/display/intel_qp_tables.c
@@ -34,9 +34,6 @@
  * These qp tables are as per the C model
  * and it has the rows pointing to bpps which increment
  * in steps of 0.5
- * We do not support fractional bpps as of today,
- * hence we would skip the fractional bpps during
- * our references for qp calclulations.
  */
 static const u8 
rc_range_minqp444_8bpc[DSC_NUM_BUF_RANGES][RC_RANGE_QP444_8BPC_MAX_NUM_BPP] = {
{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 3a1ed574edbb..5f2fb702e367 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -77,8 +77,8 @@ intel_vdsc_set_min_max_qp(struct drm_dsc_config *vdsc_cfg, 
int buf,
 static void
 calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
 {
+   int bpp = to_bpp_int(vdsc_cfg->bits_per_pixel);
int bpc = vdsc_cfg->bits_per_component;
-   int bpp = vdsc_cfg->bits_per_pixel >> 4;
int qp_bpc_modifier = (bpc - 8) * 2;
int uncompressed_bpg_rate;
int first_line_bpg_offset;
@@ -148,7 +148,13 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
static const s8 ofs_und8[] = {
10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, 
-12
};
-
+   /*
+* For 420 format since bits_per_pixel (bpp) is set to target 
bpp * 2,
+* QP table values for target bpp 4.0 to 4.4375 (rounded to 
4.0) are
+* actually for bpp 8 to 8.875 (rounded to 4.0 * 2 i.e 8).
+* Similarly values for target bpp 4.5 to 4.8375 (rounded to 
4.5)
+* are for bpp 9 to 9.875 (rounded to 4.5 * 2 i.e 9), and so on.
+*/
bpp_i  = bpp - 8;
for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
u8 range_bpg_offset;
@@ -178,6 +184,9 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
range_bpg_offset & DSC_RANGE_BPG_OFFSET_MASK;
}
} else {
+   /* fractional bpp part * 1 (for precision up to 4 decimal 
places) */
+   int fractional_bits = to_bpp_frac(vdsc_cfg->bits_per_pixel);
+
static const s8 ofs_und6[] = {
0, -2, -2, -4, -6, -6, -8, -8, -8, -10, -10, -12, -12, 
-12, -12
};
@@ -191,7 +200,14 @@ calculate_rc_params(struct drm_dsc_config *vdsc_cfg)
10, 8, 6, 4, 2, 0, -2, -4, -6, -8, -10, -10, -12, -12, 
-12
};
 
-   bpp_i  = (2 * (bpp - 6));
+   /*
+* QP table rows have values in increment of 0.5.
+* So 6.0 bpp to 6.4375 will have index 0, 6.5 to 6.9375 will 
have index 1,
+* and so on.
+* 0.5 fractional part with 4 decimal precision becomes 5000
+*/
+   bpp_i  = ((bpp - 6) + (fractional_bits < 5000 ? 0 : 1));
+
for (buf_i = 0; buf_i < DSC_NUM_BUF_RANGES; buf_i++) {
u8 range_bpg_offset;
 
@@ -279,8 +295,7 @@ int intel_dsc_compute_params(struct intel_crtc_state 
*pipe_config)
/* Gen 11 does not support VBR */
vdsc_cfg->vbr_enable = false;
 
-   /* Gen 11 only supports integral values of bpp */
-   vdsc_cfg->bits_per_pixel = compressed_bpp << 4;
+   vdsc_cfg->bits_per_pixel = pipe_config->dsc.compressed_bpp_x16;
 
/*
 * According to DSC 1.2 specs in Section 4.1 if native_420 is set
-- 
2.40.1

[Intel-gfx] [PATCH 06/11] drm/i915/dp: Iterate over output bpp with fractional step size

[Ankit Nautiyal]

This patch adds support to iterate over compressed output bpp as per the
fractional step, supported by DP sink.

v2:
-Avoid ending up with compressed bpp, same as pipe bpp. (Stan)

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Suraj Kandpal 
Reviewed-by: Sui Jingfeng 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 41 +++--
 1 file changed, 25 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 246f50d1f030..e53c87825194 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1737,15 +1737,15 @@ static bool intel_dp_dsc_supports_format(const struct 
intel_connector *connector
return drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd, 
sink_dsc_format);
 }
 
-static bool is_bw_sufficient_for_dsc_config(u16 compressed_bpp, u32 link_clock,
+static bool is_bw_sufficient_for_dsc_config(u16 compressed_bppx16, u32 
link_clock,
u32 lane_count, u32 mode_clock,
enum intel_output_format 
output_format,
int timeslots)
 {
u32 available_bw, required_bw;
 
-   available_bw = (link_clock * lane_count * timeslots)  / 8;
-   required_bw = compressed_bpp * (intel_dp_mode_to_fec_clock(mode_clock));
+   available_bw = (link_clock * lane_count * timeslots * 16)  / 8;
+   required_bw = compressed_bppx16 * 
(intel_dp_mode_to_fec_clock(mode_clock));
 
return available_bw > required_bw;
 }
@@ -1753,7 +1753,7 @@ static bool is_bw_sufficient_for_dsc_config(u16 
compressed_bpp, u32 link_clock,
 static int dsc_compute_link_config(struct intel_dp *intel_dp,
   struct intel_crtc_state *pipe_config,
   struct link_config_limits *limits,
-  u16 compressed_bpp,
+  u16 compressed_bppx16,
   int timeslots)
 {
const struct drm_display_mode *adjusted_mode = 
_config->hw.adjusted_mode;
@@ -1768,8 +1768,8 @@ static int dsc_compute_link_config(struct intel_dp 
*intel_dp,
for (lane_count = limits->min_lane_count;
 lane_count <= limits->max_lane_count;
 lane_count <<= 1) {
-   if (!is_bw_sufficient_for_dsc_config(compressed_bpp, 
link_rate, lane_count,
-
adjusted_mode->clock,
+   if (!is_bw_sufficient_for_dsc_config(compressed_bppx16, 
link_rate,
+lane_count, 
adjusted_mode->clock,
 
pipe_config->output_format,
 timeslots))
continue;
@@ -1882,7 +1882,7 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp,
ret = dsc_compute_link_config(intel_dp,
  pipe_config,
  limits,
- valid_dsc_bpp[i],
+ valid_dsc_bpp[i] << 4,
  timeslots);
if (ret == 0) {
pipe_config->dsc.compressed_bpp_x16 =
@@ -1902,6 +1902,7 @@ icl_dsc_compute_link_config(struct intel_dp *intel_dp,
  */
 static int
 xelpd_dsc_compute_link_config(struct intel_dp *intel_dp,
+ const struct intel_connector *connector,
  struct intel_crtc_state *pipe_config,
  struct link_config_limits *limits,
  int dsc_max_bpp,
@@ -1909,23 +1910,31 @@ xelpd_dsc_compute_link_config(struct intel_dp *intel_dp,
  int pipe_bpp,
  int timeslots)
 {
-   u16 compressed_bpp;
+   u8 bppx16_incr = drm_dp_dsc_sink_bpp_incr(connector->dp.dsc_dpcd);
+   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+   u16 compressed_bppx16;
+   u8 bppx16_step;
int ret;
 
+   if (DISPLAY_VER(i915) < 14 || bppx16_incr <= 1)
+   bppx16_step = 16;
+   else
+   bppx16_step = 16 / bppx16_incr;
+
/* Compressed BPP should be less than the Input DSC bpp */
-   dsc_max_bpp = min(dsc_max_bpp, pipe_bpp - 1);
+   dsc_max_bpp = min(dsc_max_bpp << 4, (pipe_bpp << 4) - bppx16_step);
+   dsc_min_bpp = dsc_min_bpp << 4;
 
-   for (compressed_bpp = dsc_max_bpp;
-compressed_bpp >= dsc_min_bpp;
-compressed_bpp--) {
+   for (compressed_bppx16 = dsc_max_bpp;
+compressed_bppx16 >= dsc_min_bpp;
+compressed_bppx16 -= bppx16_step) {
 

[Intel-gfx] [PATCH 04/11] drm/i915/audio: Consider fractional vdsc bpp while computing tu_data

[Ankit Nautiyal]

MTL+ supports fractional compressed bits_per_pixel, with precision of
1/16. This compressed bpp is stored in U6.4 format.
Accommodate the precision during calculation of transfer unit data
for hblank_early calculation.

v2:
-Fix tu_data calculation while dealing with U6.4 format. (Stan)

v3:
-Use BPP_X16_FMT to print vdsc bpp.

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Suraj Kandpal 
Reviewed-by: Sui Jingfeng 
---
 drivers/gpu/drm/i915/display/intel_audio.c | 16 
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_audio.c 
b/drivers/gpu/drm/i915/display/intel_audio.c
index aa93ccd6c2aa..8796d90c46a6 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -521,25 +521,25 @@ static unsigned int calc_hblank_early_prog(struct 
intel_encoder *encoder,
unsigned int link_clks_available, link_clks_required;
unsigned int tu_data, tu_line, link_clks_active;
unsigned int h_active, h_total, hblank_delta, pixel_clk;
-   unsigned int fec_coeff, cdclk, vdsc_bpp;
+   unsigned int fec_coeff, cdclk, vdsc_bppx16;
unsigned int link_clk, lanes;
unsigned int hblank_rise;
 
h_active = crtc_state->hw.adjusted_mode.crtc_hdisplay;
h_total = crtc_state->hw.adjusted_mode.crtc_htotal;
pixel_clk = crtc_state->hw.adjusted_mode.crtc_clock;
-   vdsc_bpp = to_bpp_int(crtc_state->dsc.compressed_bpp_x16);
+   vdsc_bppx16 = crtc_state->dsc.compressed_bpp_x16;
cdclk = i915->display.cdclk.hw.cdclk;
/* fec= 0.972261, using rounding multiplier of 100 */
fec_coeff = 972261;
link_clk = crtc_state->port_clock;
lanes = crtc_state->lane_count;
 
-   drm_dbg_kms(>drm, "h_active = %u link_clk = %u :"
-   "lanes = %u vdsc_bpp = %u cdclk = %u\n",
-   h_active, link_clk, lanes, vdsc_bpp, cdclk);
+   drm_dbg_kms(>drm,
+   "h_active = %u link_clk = %u : lanes = %u vdsc_bpp = " 
BPP_X16_FMT " cdclk = %u\n",
+   h_active, link_clk, lanes, BPP_X16_ARGS(vdsc_bppx16), 
cdclk);
 
-   if (WARN_ON(!link_clk || !pixel_clk || !lanes || !vdsc_bpp || !cdclk))
+   if (WARN_ON(!link_clk || !pixel_clk || !lanes || !vdsc_bppx16 || 
!cdclk))
return 0;
 
link_clks_available = (h_total - h_active) * link_clk / pixel_clk - 28;
@@ -551,8 +551,8 @@ static unsigned int calc_hblank_early_prog(struct 
intel_encoder *encoder,
hblank_delta = DIV64_U64_ROUND_UP(mul_u32_u32(5 * (link_clk + 
cdclk), pixel_clk),
  mul_u32_u32(link_clk, cdclk));
 
-   tu_data = div64_u64(mul_u32_u32(pixel_clk * vdsc_bpp * 8, 100),
-   mul_u32_u32(link_clk * lanes, fec_coeff));
+   tu_data = div64_u64(mul_u32_u32(pixel_clk * vdsc_bppx16 * 8, 100),
+   mul_u32_u32(link_clk * lanes * 16, fec_coeff));
tu_line = div64_u64(h_active * mul_u32_u32(link_clk, fec_coeff),
mul_u32_u32(64 * pixel_clk, 100));
link_clks_active  = (tu_line - 1) * 64 + tu_data;
-- 
2.40.1

[Intel-gfx] [PATCH 03/11] drm/i915/display: Consider fractional vdsc bpp while computing m_n values

[Ankit Nautiyal]

MTL+ supports fractional compressed bits_per_pixel, with precision of
1/16. This compressed bpp is stored in U6.4 format.
Accommodate this precision while computing m_n values.

v1:
Replace the computation of 'data_clock' with 'data_clock =
DIV_ROUND_UP(data_clock, 16).' (Sui Jingfeng).

v2:
Rebase and pass bits_per_pixel in U6.4 format.

Signed-off-by: Ankit Nautiyal 
Signed-off-by: Mitul Golani 
Reviewed-by: Suraj Kandpal 
Reviewed-by: Sui Jingfeng 
---
 drivers/gpu/drm/i915/display/intel_display.c |  4 ++--
 drivers/gpu/drm/i915/display/intel_dp.c  | 16 
 drivers/gpu/drm/i915/display/intel_dp_mst.c  | 14 +++---
 drivers/gpu/drm/i915/display/intel_fdi.c |  3 ++-
 4 files changed, 19 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index b4a8e3087e50..125903007a29 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -2415,12 +2415,12 @@ add_bw_alloc_overhead(int link_clock, int bw_overhead,
 }
 
 void
-intel_link_compute_m_n(u16 bits_per_pixel, int nlanes,
+intel_link_compute_m_n(u16 bits_per_pixel_x16, int nlanes,
   int pixel_clock, int link_clock,
   int bw_overhead,
   struct intel_link_m_n *m_n)
 {
-   u32 data_clock = bits_per_pixel * pixel_clock;
+   u32 data_clock = DIV_ROUND_UP(bits_per_pixel_x16 * pixel_clock, 16);
u32 data_m;
u32 data_n;
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 4ad3718c3c7d..246f50d1f030 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2663,7 +2663,7 @@ static bool can_enable_drrs(struct intel_connector 
*connector,
 static void
 intel_dp_drrs_compute_config(struct intel_connector *connector,
 struct intel_crtc_state *pipe_config,
-int link_bpp)
+int link_bpp_x16)
 {
struct drm_i915_private *i915 = to_i915(connector->base.dev);
const struct drm_display_mode *downclock_mode =
@@ -2688,7 +2688,7 @@ intel_dp_drrs_compute_config(struct intel_connector 
*connector,
if (pipe_config->splitter.enable)
pixel_clock /= pipe_config->splitter.link_count;
 
-   intel_link_compute_m_n(link_bpp, pipe_config->lane_count, pixel_clock,
+   intel_link_compute_m_n(link_bpp_x16, pipe_config->lane_count, 
pixel_clock,
   pipe_config->port_clock,
   
intel_dp_bw_fec_overhead(pipe_config->fec_enable),
   _config->dp_m2_n2);
@@ -2792,7 +2792,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
const struct drm_display_mode *fixed_mode;
struct intel_connector *connector = intel_dp->attached_connector;
-   int ret = 0, link_bpp;
+   int ret = 0, link_bpp_x16;
 
if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && encoder->port != 
PORT_A)
pipe_config->has_pch_encoder = true;
@@ -2841,10 +2841,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
drm_dp_enhanced_frame_cap(intel_dp->dpcd);
 
if (pipe_config->dsc.compression_enable)
-   link_bpp = to_bpp_int(pipe_config->dsc.compressed_bpp_x16);
+   link_bpp_x16 = pipe_config->dsc.compressed_bpp_x16;
else
-   link_bpp = intel_dp_output_bpp(pipe_config->output_format,
-  pipe_config->pipe_bpp);
+   link_bpp_x16 = 
to_bpp_x16(intel_dp_output_bpp(pipe_config->output_format,
+ 
pipe_config->pipe_bpp));
 
if (intel_dp->mso_link_count) {
int n = intel_dp->mso_link_count;
@@ -2868,7 +2868,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 
intel_dp_audio_compute_config(encoder, pipe_config, conn_state);
 
-   intel_link_compute_m_n(link_bpp,
+   intel_link_compute_m_n(link_bpp_x16,
   pipe_config->lane_count,
   adjusted_mode->crtc_clock,
   pipe_config->port_clock,
@@ -2884,7 +2884,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 
intel_vrr_compute_config(pipe_config, conn_state);
intel_psr_compute_config(intel_dp, pipe_config, conn_state);
-   intel_dp_drrs_compute_config(connector, pipe_config, link_bpp);
+   intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
intel_dp_compute_hdr_metadata_infoframe_sdp(intel_dp, pipe_config, 
conn_state);
 
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 

[Intel-gfx] [PATCH 02/11] drm/i915/display: Store compressed bpp in U6.4 format

[Ankit Nautiyal]

DSC parameter bits_per_pixel is stored in U6.4 format.
The 4 bits represent the fractional part of the bpp.
Currently we use compressed_bpp member of dsc structure to store
only the integral part of the bits_per_pixel.
To store the full bits_per_pixel along with the fractional part,
compressed_bpp is changed to store bpp in U6.4 formats. Intergral
part is retrieved by simply right shifting the member compressed_bpp by 4.

v2:
-Use to_bpp_int, to_bpp_frac_dec, to_bpp_x16 helpers while dealing
 with compressed bpp. (Suraj)
-Fix comment styling. (Suraj)

v3:
-Add separate file for 6.4 fixed point helper(Jani, Nikula)
-Add comment for magic values(Suraj)

v4:
-Fix checkpatch warnings caused by renaming(Suraj)

v5:
-Rebase.
-Use existing helpers for conversion of bpp_int to bpp_x16
 and vice versa.

Signed-off-by: Ankit Nautiyal 
Signed-off-by: Mitul Golani 
Reviewed-by: Suraj Kandpal 
Reviewed-by: Sui Jingfeng 
---
 drivers/gpu/drm/i915/display/icl_dsi.c| 10 +++
 drivers/gpu/drm/i915/display/intel_audio.c|  2 +-
 drivers/gpu/drm/i915/display/intel_bios.c |  4 +--
 drivers/gpu/drm/i915/display/intel_cdclk.c|  5 ++--
 drivers/gpu/drm/i915/display/intel_display.c  |  2 +-
 .../drm/i915/display/intel_display_types.h|  3 ++-
 drivers/gpu/drm/i915/display/intel_dp.c   | 27 ++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_link_bw.c  |  2 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c |  4 +--
 10 files changed, 33 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c 
b/drivers/gpu/drm/i915/display/icl_dsi.c
index c4585e445198..481fcb650850 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -330,7 +330,7 @@ static int afe_clk(struct intel_encoder *encoder,
int bpp;
 
if (crtc_state->dsc.compression_enable)
-   bpp = crtc_state->dsc.compressed_bpp;
+   bpp = to_bpp_int(crtc_state->dsc.compressed_bpp_x16);
else
bpp = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
 
@@ -860,7 +860,7 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder 
*encoder,
 * compressed and non-compressed bpp.
 */
if (crtc_state->dsc.compression_enable) {
-   mul = crtc_state->dsc.compressed_bpp;
+   mul = to_bpp_int(crtc_state->dsc.compressed_bpp_x16);
div = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
}
 
@@ -884,7 +884,7 @@ gen11_dsi_set_transcoder_timings(struct intel_encoder 
*encoder,
int bpp, line_time_us, byte_clk_period_ns;
 
if (crtc_state->dsc.compression_enable)
-   bpp = crtc_state->dsc.compressed_bpp;
+   bpp = to_bpp_int(crtc_state->dsc.compressed_bpp_x16);
else
bpp = 
mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
 
@@ -1451,8 +1451,8 @@ static void gen11_dsi_get_timings(struct intel_encoder 
*encoder,
struct drm_display_mode *adjusted_mode =
_config->hw.adjusted_mode;
 
-   if (pipe_config->dsc.compressed_bpp) {
-   int div = pipe_config->dsc.compressed_bpp;
+   if (pipe_config->dsc.compressed_bpp_x16) {
+   int div = to_bpp_int(pipe_config->dsc.compressed_bpp_x16);
int mul = mipi_dsi_pixel_format_to_bpp(intel_dsi->pixel_format);
 
adjusted_mode->crtc_htotal =
diff --git a/drivers/gpu/drm/i915/display/intel_audio.c 
b/drivers/gpu/drm/i915/display/intel_audio.c
index 19605264a35c..aa93ccd6c2aa 100644
--- a/drivers/gpu/drm/i915/display/intel_audio.c
+++ b/drivers/gpu/drm/i915/display/intel_audio.c
@@ -528,7 +528,7 @@ static unsigned int calc_hblank_early_prog(struct 
intel_encoder *encoder,
h_active = crtc_state->hw.adjusted_mode.crtc_hdisplay;
h_total = crtc_state->hw.adjusted_mode.crtc_htotal;
pixel_clk = crtc_state->hw.adjusted_mode.crtc_clock;
-   vdsc_bpp = crtc_state->dsc.compressed_bpp;
+   vdsc_bpp = to_bpp_int(crtc_state->dsc.compressed_bpp_x16);
cdclk = i915->display.cdclk.hw.cdclk;
/* fec= 0.972261, using rounding multiplier of 100 */
fec_coeff = 972261;
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index 719fb550342b..2fd72b2fd109 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3414,8 +3414,8 @@ static void fill_dsc(struct intel_crtc_state *crtc_state,
 
crtc_state->pipe_bpp = bpc * 3;
 
-   crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
-VBT_DSC_MAX_BPP(dsc->max_bpp));
+   crtc_state->dsc.compressed_bpp_x16 = 
to_bpp_x16(min(crtc_state->pipe_bpp,
+   

[Intel-gfx] [PATCH 01/11] drm/display/dp: Add helper function to get DSC bpp precision

[Ankit Nautiyal]

Add helper to get the DSC bits_per_pixel precision for the DP sink.

Signed-off-by: Ankit Nautiyal 
Reviewed-by: Suraj Kandpal 
Reviewed-by: Sui Jingfeng 
Acked-by: Maxime Ripard 
---
 drivers/gpu/drm/display/drm_dp_helper.c | 27 +
 include/drm/display/drm_dp_helper.h |  1 +
 2 files changed, 28 insertions(+)

diff --git a/drivers/gpu/drm/display/drm_dp_helper.c 
b/drivers/gpu/drm/display/drm_dp_helper.c
index 72ba9ae89f86..d72b6f9a352c 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2328,6 +2328,33 @@ int drm_dp_read_desc(struct drm_dp_aux *aux, struct 
drm_dp_desc *desc,
 }
 EXPORT_SYMBOL(drm_dp_read_desc);
 
+/**
+ * drm_dp_dsc_sink_bpp_incr() - Get bits per pixel increment
+ * @dsc_dpcd: DSC capabilities from DPCD
+ *
+ * Returns the bpp precision supported by the DP sink.
+ */
+u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
+{
+   u8 bpp_increment_dpcd = dsc_dpcd[DP_DSC_BITS_PER_PIXEL_INC - 
DP_DSC_SUPPORT];
+
+   switch (bpp_increment_dpcd) {
+   case DP_DSC_BITS_PER_PIXEL_1_16:
+   return 16;
+   case DP_DSC_BITS_PER_PIXEL_1_8:
+   return 8;
+   case DP_DSC_BITS_PER_PIXEL_1_4:
+   return 4;
+   case DP_DSC_BITS_PER_PIXEL_1_2:
+   return 2;
+   case DP_DSC_BITS_PER_PIXEL_1_1:
+   return 1;
+   }
+
+   return 0;
+}
+EXPORT_SYMBOL(drm_dp_dsc_sink_bpp_incr);
+
 /**
  * drm_dp_dsc_sink_max_slice_count() - Get the max slice count
  * supported by the DSC sink.
diff --git a/include/drm/display/drm_dp_helper.h 
b/include/drm/display/drm_dp_helper.h
index caee29d28463..c5f1079acb3b 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -164,6 +164,7 @@ drm_dp_is_branch(const u8 dpcd[DP_RECEIVER_CAP_SIZE])
 }
 
 /* DP/eDP DSC support */
+u8 drm_dp_dsc_sink_bpp_incr(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
 u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
   bool is_edp);
 u8 drm_dp_dsc_sink_line_buf_depth(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE]);
-- 
2.40.1

[Intel-gfx] [PATCH 00/11] Add DSC fractional bpp support

[Ankit Nautiyal]

This patch series adds support for DSC fractional compressed bpp
for MTL+. The series starts with some fixes, followed by patches that
lay groundwork to iterate over valid compressed bpps to select the
'best' compressed bpp with optimal link configuration (taken from
upstream series: https://patchwork.freedesktop.org/series/105200/).

The later patches, add changes to accommodate compressed bpp with
fractional part, including changes to QP calculations.
To get the 'best' compressed bpp, we iterate over the valid compressed
bpp values, but with fractional step size 1/16, 1/8, 1/4 or 1/2 as per
sink support.

The last 2 patches add support to depict DSC sink's fractional support,
and debugfs to enforce use of fractional bpp, while choosing an
appropriate compressed bpp.

Rev10: Rebased and added DSC Fractional support for DP MST.

Ankit Nautiyal (8):
  drm/display/dp: Add helper function to get DSC bpp precision
  drm/i915/display: Store compressed bpp in U6.4 format
  drm/i915/display: Consider fractional vdsc bpp while computing m_n
values
  drm/i915/audio: Consider fractional vdsc bpp while computing tu_data
  drm/i915/dp: Iterate over output bpp with fractional step size
  drm/i915/dp_mst: Use precision of 1/16 for computing bpp
  drm/i916/dp_mst: Iterate over the DSC bpps as per DSC precision
support
  drm/i915/dp_mst: Add support for forcing dsc fractional bpp via
debugfs

Swati Sharma (2):
  drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp
  drm/i915/dsc: Allow DSC only with fractional bpp when forced from
debugfs

Vandita Kulkarni (1):
  drm/i915/dsc/mtl: Add support for fractional bpp

 drivers/gpu/drm/display/drm_dp_helper.c   | 27 ++
 drivers/gpu/drm/i915/display/icl_dsi.c| 10 +--
 drivers/gpu/drm/i915/display/intel_audio.c| 16 ++--
 drivers/gpu/drm/i915/display/intel_bios.c |  4 +-
 drivers/gpu/drm/i915/display/intel_cdclk.c|  5 +-
 drivers/gpu/drm/i915/display/intel_display.c  |  6 +-
 .../drm/i915/display/intel_display_debugfs.c  | 84 ++
 .../drm/i915/display/intel_display_types.h|  4 +-
 drivers/gpu/drm/i915/display/intel_dp.c   | 87 +++
 drivers/gpu/drm/i915/display/intel_dp_mst.c   | 85 +++---
 drivers/gpu/drm/i915/display/intel_fdi.c  |  3 +-
 drivers/gpu/drm/i915/display/intel_link_bw.c  |  2 +-
 .../gpu/drm/i915/display/intel_qp_tables.c|  3 -
 drivers/gpu/drm/i915/display/intel_vdsc.c | 29 +--
 include/drm/display/drm_dp_helper.h   |  1 +
 15 files changed, 266 insertions(+), 100 deletions(-)

-- 
2.40.1

Re: [Intel-gfx] [PATCH v9 1/6] drm/panelreplay: dpcd register definition for panelreplay

[Manna, Animesh]

> -Original Message-
> From: Nikula, Jani 
> Sent: Thursday, November 9, 2023 6:37 PM
> To: Manna, Animesh ; intel-
> g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org
> Cc: Manna, Animesh ; Hogander, Jouni
> ; Murthy, Arun R 
> Subject: Re: [PATCH v9 1/6] drm/panelreplay: dpcd register definition for
> panelreplay
> 
> On Wed, 08 Nov 2023, Animesh Manna  wrote:
> > Add DPCD register definition for discovering, enabling and checking
> > status of panel replay of the sink.
> >
> > Cc: Jouni Högander 
> > Cc: Arun R Murthy 
> > Cc: Jani Nikula 
> > Reviewed-by: Arun R Murthy 
> > Signed-off-by: Animesh Manna 
> 
> You got the ack, please keep track of it.
> 
> https://lore.kernel.org/r/elcebygxs432bcj7oez7ndlfvb3lru7m7yznyqp2ei4ocjk
> vxp@23lf2rh45fmt

Thanks Jani and everyone who helped in review.
Pushed the initial 5 patches of this series. As 6th patch has dependency on igt 
changes, will push after igt changes get merged.

Regards,
Animesh 
> 
> > ---
> >  include/drm/display/drm_dp.h | 23 +++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/include/drm/display/drm_dp.h
> > b/include/drm/display/drm_dp.h index e69cece404b3..fc42b622ef32
> 100644
> > --- a/include/drm/display/drm_dp.h
> > +++ b/include/drm/display/drm_dp.h
> > @@ -543,6 +543,10 @@
> >  /* DFP Capability Extension */
> >  #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT0x0a3   /* 2.0 */
> >
> > +#define DP_PANEL_REPLAY_CAP 0x0b0  /* DP 2.0 */
> > +# define DP_PANEL_REPLAY_SUPPORT(1 << 0)
> > +# define DP_PANEL_REPLAY_SU_SUPPORT (1 << 1)
> > +
> >  /* Link Configuration */
> >  #defineDP_LINK_BW_SET  0x100
> >  # define DP_LINK_RATE_TABLE0x00/* eDP 1.4 */
> > @@ -716,6 +720,13 @@
> >  #define DP_BRANCH_DEVICE_CTRL  0x1a1
> >  # define DP_BRANCH_DEVICE_IRQ_HPD  (1 << 0)
> >
> > +#define PANEL_REPLAY_CONFIG 0x1b0  /* DP 2.0 */
> > +# define DP_PANEL_REPLAY_ENABLE (1 << 0)
> > +# define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN (1 << 3)
> > +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN   (1 << 4)
> > +# define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN  (1 << 5)
> > +# define DP_PANEL_REPLAY_SU_ENABLE  (1 << 6)
> > +
> >  #define DP_PAYLOAD_ALLOCATE_SET0x1c0
> >  #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1  #define
> > DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2 @@ -1105,6 +1116,18
> @@
> >  #define DP_LANE_ALIGN_STATUS_UPDATED_ESI   0x200e /* status same
> as 0x204 */
> >  #define DP_SINK_STATUS_ESI 0x200f /* status same as 
> > 0x205 */
> >
> > +#define DP_PANEL_REPLAY_ERROR_STATUS   0x2020  /* DP 2.1*/
> > +# define DP_PANEL_REPLAY_LINK_CRC_ERROR(1 << 0)
> > +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR (1 << 1)
> > +# define DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR   (1 << 2)
> > +
> > +#define DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS0x2022  /*
> DP 2.1 */
> > +# define DP_SINK_DEVICE_PANEL_REPLAY_STATUS_MASK   (7 << 0)
> > +# define DP_SINK_FRAME_LOCKED_SHIFT3
> > +# define DP_SINK_FRAME_LOCKED_MASK (3 << 3)
> > +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_SHIFT   5
> > +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_MASK(1 << 5)
> > +
> >  /* Extended Receiver Capability: See DP_DPCD_REV for definitions */
> >  #define DP_DP13_DPCD_REV0x2200
> 
> --
> Jani Nikula, Intel

[Intel-gfx] [PATCH v1 1/1] drm/i915/xe2lpd: remove the FBC restriction if PSR2 is enabled

[Vinod Govindapillai]

In earlier versions, FBC was restricted if PSR2 is enabled. From
xe2lpd onwards no such restrictions are needed anymore.

HSD: 14014305387
Signed-off-by: Vinod Govindapillai 
---
 drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c 
b/drivers/gpu/drm/i915/display/intel_fbc.c
index bde12fe62275..f3d572d54e82 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1201,7 +1201,7 @@ static int intel_fbc_check_plane(struct 
intel_atomic_state *state,
 * Recommendation is to keep this combination disabled
 * Bspec: 50422 HSD: 14010260002
 */
-   if (DISPLAY_VER(i915) >= 12 && crtc_state->has_psr2) {
+   if (IS_DISPLAY_VER(i915, 12, 14) && crtc_state->has_psr2) {
plane_state->no_fbc_reason = "PSR2 enabled";
return 0;
}
-- 
2.34.1

[Intel-gfx] [PATCH v1 0/1] drm/i915/xe2lpd: remove FBC restriction if PSR2 is enabled

[Vinod Govindapillai]

FBC restriction when PSR2 is enabled can be removed in xe2lpd

Vinod Govindapillai (1):
  drm/i915/xe2lpd: remove the FBC restriction if PSR2 is enabled

 drivers/gpu/drm/i915/display/intel_fbc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.34.1

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dsb: DSB code refactoring (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/dsb: DSB code refactoring (rev6)
URL   : https://patchwork.freedesktop.org/series/124141/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13859 -> Patchwork_124141v6


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_124141v6 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_124141v6, please notify your bug team 
(lgci.bug.fil...@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/index.html

Participating hosts (33 -> 33)
--

  Additional (1): fi-hsw-4770 
  Missing(1): fi-kbl-soraka 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_124141v6:

### IGT changes ###

 Possible regressions 

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-5:
- bat-adlp-11:[PASS][1] -> [FAIL][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html

  
Known issues


  Here are the changes found in Patchwork_124141v6 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [PASS][3] -> [DMESG-FAIL][4] ([i915#5334])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
- fi-glk-j4005:   [PASS][5] -> [DMESG-FAIL][6] ([i915#5334])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/fi-glk-j4005/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@mman:
- bat-rpls-1: [PASS][7] -> [INCOMPLETE][8] ([i915#7392])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-rpls-1/igt@i915_selftest@l...@mman.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/bat-rpls-1/igt@i915_selftest@l...@mman.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- fi-hsw-4770:NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#5190])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/fi-hsw-4770/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-a-vga-1:
- fi-hsw-4770:NOTRUN -> [SKIP][10] ([fdo#109271]) +12 other tests 
skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-a-vga-1.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-dp-5:
- bat-adlp-11:[PASS][11] -> [DMESG-FAIL][12] ([i915#6868])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][13] ([i915#1845] / [i915#9197]) +3 
other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-vga-1:
- fi-hsw-4770:NOTRUN -> [DMESG-WARN][14] ([i915#8841]) +6 other 
tests dmesg-warn
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/fi-hsw-4770/igt@kms_pipe_crc_basic@suspend-read-...@pipe-c-vga-1.html

  * igt@kms_psr@sprite_plane_onoff:
- fi-hsw-4770:NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#1072]) +3 
other tests skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/fi-hsw-4770/igt@kms_psr@sprite_plane_onoff.html

  
 Possible fixes 

  * igt@i915_selftest@live@hangcheck:
- bat-dg2-11: [DMESG-FAIL][16] ([i915#7651]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13859/bat-dg2-11/igt@i915_selftest@l...@hangcheck.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124141v6/bat-dg2-11/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][18] ([i915#8668]) -> [PASS][19]
   [18]: 

[Intel-gfx] [PATCH] drm/i915/display: Remove dead code around intel_atomic_helper->free_list

[Jouni Högander]

After switching to directly using dma_fence instead of i915_sw_fence we
have left some dead code around intel_atomic_helper->free_list. Remove that
dead code.

Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/i915/display/intel_display.c  | 20 ---
 .../gpu/drm/i915/display/intel_display_core.h |  6 --
 .../drm/i915/display/intel_display_driver.c   |  7 ---
 3 files changed, 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 3effafcbb411..387acf21b794 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7086,24 +7086,6 @@ static void skl_commit_modeset_enables(struct 
intel_atomic_state *state)
drm_WARN_ON(_priv->drm, update_pipes);
 }
 
-static void intel_atomic_helper_free_state(struct drm_i915_private *dev_priv)
-{
-   struct intel_atomic_state *state, *next;
-   struct llist_node *freed;
-
-   freed = llist_del_all(_priv->display.atomic_helper.free_list);
-   llist_for_each_entry_safe(state, next, freed, freed)
-   drm_atomic_state_put(>base);
-}
-
-void intel_atomic_helper_free_state_worker(struct work_struct *work)
-{
-   struct drm_i915_private *dev_priv =
-   container_of(work, typeof(*dev_priv), 
display.atomic_helper.free_work);
-
-   intel_atomic_helper_free_state(dev_priv);
-}
-
 static void intel_atomic_commit_fence_wait(struct intel_atomic_state 
*intel_state)
 {
struct drm_i915_private *i915 = to_i915(intel_state->base.dev);
@@ -7139,8 +7121,6 @@ static void intel_atomic_cleanup_work(struct work_struct 
*work)
drm_atomic_helper_cleanup_planes(>drm, >base);
drm_atomic_helper_commit_cleanup_done(>base);
drm_atomic_state_put(>base);
-
-   intel_atomic_helper_free_state(i915);
 }
 
 static void intel_atomic_prepare_plane_clear_colors(struct intel_atomic_state 
*state)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h 
b/drivers/gpu/drm/i915/display/intel_display_core.h
index aa8be02c9e54..34945f733a97 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -298,12 +298,6 @@ struct intel_display {
const struct intel_audio_funcs *audio;
} funcs;
 
-   /* Grouping using anonymous structs. Keep sorted. */
-   struct intel_atomic_helper {
-   struct llist_head free_list;
-   struct work_struct free_work;
-   } atomic_helper;
-
struct {
/* backlight registers and fields in struct intel_panel */
struct mutex lock;
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c 
b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 62f7b10484be..9df9097a0255 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -259,10 +259,6 @@ int intel_display_driver_probe_noirq(struct 
drm_i915_private *i915)
if (ret)
goto cleanup_vga_client_pw_domain_dmc;
 
-   init_llist_head(>display.atomic_helper.free_list);
-   INIT_WORK(>display.atomic_helper.free_work,
- intel_atomic_helper_free_state_worker);
-
intel_init_quirks(i915);
 
intel_fbc_init(i915);
@@ -430,9 +426,6 @@ void intel_display_driver_remove(struct drm_i915_private 
*i915)
flush_workqueue(i915->display.wq.flip);
flush_workqueue(i915->display.wq.modeset);
 
-   flush_work(>display.atomic_helper.free_work);
-   drm_WARN_ON(>drm, 
!llist_empty(>display.atomic_helper.free_list));
-
/*
 * MST topology needs to be suspended so we don't have any calls to
 * fbdev after it's finalized. MST will be destroyed later as part of
-- 
2.34.1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/dsb: DSB code refactoring (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/dsb: DSB code refactoring (rev6)
URL   : https://patchwork.freedesktop.org/series/124141/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:117:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:148:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:150:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:154:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:156:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:174:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:176:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:180:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:182:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:186:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:188:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:192:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:195:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:237:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:239:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced 
symbol 'mask'

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsb: DSB code refactoring (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/dsb: DSB code refactoring (rev6)
URL   : https://patchwork.freedesktop.org/series/124141/
State : warning

== Summary ==

Error: dim checkpatch failed
90ae7c5b3904 drm/i915/dsb: DSB code refactoring
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in 
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in 
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:292: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#292: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 356 lines checked