✗ Fi.CI.IGT: failure for ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro

[Patchwork]

== Series Details ==

Series: ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro
URL   : https://patchwork.freedesktop.org/series/127515/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13995_full -> Patchwork_127515v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_127515v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_127515v1_full, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (8 -> 7)
--

  Missing(1): shard-glk-0 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_127515v1_full:

### IGT changes ###

 Possible regressions 

  * igt@kms_flip@2x-flip-vs-panning@ab-hdmi-a1-hdmi-a2:
- shard-glk:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk9/igt@kms_flip@2x-flip-vs-pann...@ab-hdmi-a1-hdmi-a2.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/shard-glk1/igt@kms_flip@2x-flip-vs-pann...@ab-hdmi-a1-hdmi-a2.html

  
 Warnings 

  * igt@kms_content_protection@mei-interface:
- shard-snb:  [SKIP][3] ([fdo#109271]) -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-snb6/igt@kms_content_protect...@mei-interface.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/shard-snb7/igt@kms_content_protect...@mei-interface.html

  
Known issues


  Here are the changes found in Patchwork_127515v1_full that come from known 
issues:

### CI changes ###

 Possible fixes 

  * boot:
- shard-glk:  ([FAIL][5], [PASS][6], [PASS][7], [PASS][8], 
[PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], 
[PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], 
[PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], 
[PASS][27], [PASS][28], [PASS][29]) ([i915#8293]) -> ([PASS][30], [PASS][31], 
[PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], 
[PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], 
[PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], 
[PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk1/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk1/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk2/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk2/boot.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk3/boot.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk3/boot.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk3/boot.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk4/boot.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk4/boot.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk4/boot.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk5/boot.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk5/boot.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk5/boot.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk6/boot.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk6/boot.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk6/boot.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk7/boot.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk7/boot.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk7/boot.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk8/boot.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk8/boot.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk8/boot.html
   [27]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk9/boot.html
   [28]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk9/boot.html
   [29]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/shard-glk9/boot.html
   [30]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/shard-glk9/boot.html
   [31]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/shard-glk9/boot.html
   [32]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/shard-glk9/boot.html
   [33]: 

RE: ✓ Fi.CI.BAT: success for ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro

[Saarinen, Jani]

Hi, 

> -Original Message-
> From: Intel-gfx  On Behalf Of 
> Patchwork
> Sent: Friday, December 8, 2023 2:20 AM
> To: Kai Vehmanen 
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✓ Fi.CI.BAT: success for ALSA: hda/hdmi: add force-connect quirk for
> ASUSTeK Z170M Pro
> 
> Patch Details
> Series:   ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro
> URL:  https://patchwork.freedesktop.org/series/127515/
> State:success
> Details:  
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/index.html
This now passes on that kbl-guc so is this now ok? See below for Possible fixes 
section too
I assume we need this too on topic: core-for-ci after full CI results. 
> 
> CI Bug Log - changes from CI_DRM_13995 -> Patchwork_127515v1
> 
> 
> Summary
> 
> 
> SUCCESS
> 
> No regressions found.
> 
> External URL: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_127515v1/index.html
> 
> 
> Participating hosts (34 -> 34)
> 
> 
> Additional (2): bat-mtlp-8 bat-dg1-5
> Missing (2): bat-dg2-9 fi-snb-2520m
> 
> 
> New tests
> 
> 
> New tests have been introduced between CI_DRM_13995 and Patchwork_127515v1:
> 
> 
> New IGT tests (12)
> 
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-a-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [1.95] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.98] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.93] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-a-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [2.13] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.81] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.99] s
> 
> * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-7:
> 
>   *   Statuses : 1 abort(s)
>   *   Exec time: [1.99] s
> 
> * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.77] s
> 
> * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.86] s
> 
> * igt@kms_pipe_crc_basic@read-crc@pipe-a-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [2.04] s
> 
> * igt@kms_pipe_crc_basic@read-crc@pipe-c-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.86] s
> 
> * igt@kms_pipe_crc_basic@read-crc@pipe-d-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.77] s
> 
> 
> Known issues
> 
> 
> Here are the changes found in Patchwork_127515v1 that come from known issues:
> 
> 
> CI changes
> 
> 
> Possible fixes
> 
> 
> * boot:
> 
>   *   bat-adlp-11: FAIL  tip/CI_DRM_13995/bat-adlp-11/boot.html>  (i915#8293
>  ) -> PASS 
>  ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-adlp-11/boot.html>
> 
> 
> IGT changes
> 
> 
> Issues hit
> 
> 
> * igt@debugfs_test@basic-hwmon:
> 
>   *   bat-mtlp-8: NOTRUN -> SKIP 
>  tip/Patchwork_127515v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html>
> (i915#9318  )
> 
>   *   bat-adlp-11: NOTRUN -> SKIP 
>  tip/Patchwork_127515v1/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html>
> (i915#9318  )
> 
> * igt@gem_lmem_swapping@verify-random:
> 
>   *   bat-mtlp-8: NOTRUN -> SKIP 
>  tip/Patchwork_127515v1/bat-mtlp-8/igt@gem_lmem_swapping@verify-
> random.html>  (i915#4613 
>  )
> +3 other tests skip
> 
> * igt@gem_mmap@basic:
> 
>   *   bat-dg1-5: NOTRUN -> SKIP  tip/Patchwork_127515v1/bat-dg1-5/igt@gem_m...@basic.html>  (i915#4083
>  )
> 
>   *   bat-mtlp-8: NOTRUN -> SKIP 
>  tip/Patchwork_127515v1/bat-mtlp-8/igt@gem_m...@basic.html>  (i915#4083
>  )
> 
> * igt@gem_mmap_gtt@basic:
> 
>   *   bat-mtlp-8: NOTRUN -> SKIP 
>  tip/Patchwork_127515v1/bat-mtlp-8/igt@gem_mmap_...@basic.html>  (i915#4077
>  ) +2 other tests skip
> 
> * 

[PATCH 1/3] drm: Add Adaptive Sync SDP logging

[Mitul Golani]

Add structure representing Adaptive Sync Secondary Data
Packet (AS SDP). Also, add Adaptive Sync SDP logging in
drm_dp_helper.c to facilitate debugging.

--v2:
- Update logging. [Jani, Ankit]
- use as_sdp instead of async [Ankit]
- Correct define placeholders to where it is being actually used. [Jani]
- Update members in as_sdp structure and make it uniform. [Jani]

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/display/drm_dp_helper.c   | 12 
 .../drm/i915/display/intel_crtc_state_dump.c  | 12 
 .../drm/i915/display/intel_display_types.h|  1 +
 include/drm/display/drm_dp.h  |  2 ++
 include/drm/display/drm_dp_helper.h   | 30 +++
 5 files changed, 57 insertions(+)

diff --git a/drivers/gpu/drm/display/drm_dp_helper.c 
b/drivers/gpu/drm/display/drm_dp_helper.c
index d72b6f9a352c..8edd328b6bb8 100644
--- a/drivers/gpu/drm/display/drm_dp_helper.c
+++ b/drivers/gpu/drm/display/drm_dp_helper.c
@@ -2917,6 +2917,18 @@ void drm_dp_vsc_sdp_log(const char *level, struct device 
*dev,
 }
 EXPORT_SYMBOL(drm_dp_vsc_sdp_log);
 
+void drm_dp_as_sdp_log(struct drm_printer *p, const struct drm_dp_as_sdp 
*as_sdp)
+{
+   drm_printf(p, "DP SDP: AS_SDP, revision %u, length %u\n",
+  as_sdp->revision, as_sdp->length);
+   drm_printf(p, " vtotal: %d\n", as_sdp->vtotal);
+   drm_printf(p, "target_rr: %d\n", as_sdp->target_rr);
+   drm_printf(p, "duration_incr_ms: %d\n", as_sdp->duration_incr_ms);
+   drm_printf(p, "duration_decr_ms: %d\n", as_sdp->duration_decr_ms);
+   drm_printf(p, "operation_mode: %d\n", as_sdp->operation_mode);
+}
+EXPORT_SYMBOL(drm_dp_as_sdp_log);
+
 /**
  * drm_dp_get_pcon_max_frl_bw() - maximum frl supported by PCON
  * @dpcd: DisplayPort configuration data
diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c 
b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
index 49fd100ec98a..2b40dee19bfb 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c
@@ -61,6 +61,15 @@ intel_dump_dp_vsc_sdp(struct drm_i915_private *i915,
drm_dp_vsc_sdp_log(KERN_DEBUG, i915->drm.dev, vsc);
 }
 
+static void
+intel_dump_dp_as_sdp(struct drm_i915_private *i915,
+const struct drm_dp_as_sdp *as_sdp)
+{
+   struct drm_printer p = drm_debug_printer("AS_SDP");
+
+   drm_dp_as_sdp_log(, as_sdp);
+}
+
 static void
 intel_dump_buffer(struct drm_i915_private *i915,
  const char *prefix, const u8 *buf, size_t len)
@@ -300,6 +309,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state 
*pipe_config,
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA))
intel_dump_infoframe(i915, _config->infoframes.drm);
+   if (pipe_config->infoframes.enable &
+   intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC))
+   intel_dump_dp_as_sdp(i915, _config->infoframes.as_sdp);
if (pipe_config->infoframes.enable &
intel_hdmi_infoframe_enable(DP_SDP_VSC))
intel_dump_dp_vsc_sdp(i915, _config->infoframes.vsc);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h 
b/drivers/gpu/drm/i915/display/intel_display_types.h
index b3e942f2eeb0..0c430baefbeb 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1331,6 +1331,7 @@ struct intel_crtc_state {
union hdmi_infoframe hdmi;
union hdmi_infoframe drm;
struct drm_dp_vsc_sdp vsc;
+   struct drm_dp_as_sdp as_sdp;
} infoframes;
 
u8 eld[MAX_ELD_BYTES];
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 3731828825bd..051f75e09920 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -1577,10 +1577,12 @@ enum drm_dp_phy {
 #define DP_SDP_AUDIO_COPYMANAGEMENT0x05 /* DP 1.2 */
 #define DP_SDP_ISRC0x06 /* DP 1.2 */
 #define DP_SDP_VSC 0x07 /* DP 1.2 */
+#define DP_SDP_ADAPTIVE_SYNC0x22 /* DP 1.4 */
 #define DP_SDP_CAMERA_GENERIC(i)   (0x08 + (i)) /* 0-7, DP 1.3 */
 #define DP_SDP_PPS 0x10 /* DP 1.4 */
 #define DP_SDP_VSC_EXT_VESA0x20 /* DP 1.4 */
 #define DP_SDP_VSC_EXT_CEA 0x21 /* DP 1.4 */
+
 /* 0x80+ CEA-861 infoframe types */
 
 #define DP_SDP_AUDIO_INFOFRAME_HB2 0x1b
diff --git a/include/drm/display/drm_dp_helper.h 
b/include/drm/display/drm_dp_helper.h
index 863b2e7add29..ab75b421fdf8 100644
--- a/include/drm/display/drm_dp_helper.h
+++ b/include/drm/display/drm_dp_helper.h
@@ -98,6 +98,36 @@ struct drm_dp_vsc_sdp {
enum dp_content_type content_type;
 };
 
+/**
+ * struct drm_dp_as_sdp - drm DP Adaptive Sync SDP
+ *
+ * This structure represents a DP AS SDP of drm
+ * It is based on DP 2.1 spec [Table 

[PATCH 3/3] drm/i915/display: Compute and Enable AS SDP

[Mitul Golani]

Add necessary functions definitions to enable
and compute AS SDP data. The new `intel_dp_compute_as_sdp`
function computes AS SDP values based on the display
configuration, ensuring proper handling of Variable Refresh
Rate (VRR).

--v2:
- Add DP_SDP_ADAPTIVE_SYNC to infoframe_type_to_idx().[Ankit]
- separate patch for intel_read/write_dp_sdp [Ankit].
- _HSW_VIDEO_DIP_ASYNC_DATA_A should be from ADL onward [Ankit]
- To fix indentation [Ankit]

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  3 +++
 drivers/gpu/drm/i915/display/intel_dp.c  | 25 +++-
 drivers/gpu/drm/i915/i915_reg.h  |  2 +-
 3 files changed, 28 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 38f28c480b38..628725611dbe 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3918,6 +3918,9 @@ static void intel_ddi_get_config(struct intel_encoder 
*encoder,
intel_read_dp_sdp(encoder, pipe_config, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
intel_read_dp_sdp(encoder, pipe_config, DP_SDP_VSC);
 
+   if (DISPLAY_VER(dev_priv) >= 13)
+   intel_read_dp_sdp(encoder, pipe_config, DP_SDP_ADAPTIVE_SYNC);
+
intel_psr_get_config(encoder, pipe_config);
 
intel_audio_codec_get_config(encoder, pipe_config);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index cd23d33cb901..a4d813ebefa8 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2630,6 +2630,25 @@ static void intel_dp_compute_vsc_sdp(struct intel_dp 
*intel_dp,
 _state->infoframes.vsc);
 }
 
+static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,
+   struct intel_crtc_state *crtc_state,
+   const struct drm_connector_state 
*conn_state)
+{
+   struct drm_dp_as_sdp *as_sdp = _state->infoframes.as_sdp;
+   struct intel_connector *connector = intel_dp->attached_connector;
+   const struct drm_display_mode *adjusted_mode =
+   _state->hw.adjusted_mode;
+   int vrefresh = drm_mode_vrefresh(adjusted_mode);
+
+   if (!intel_vrr_is_in_range(connector, vrefresh))
+   return;
+
+   crtc_state->infoframes.enable |= 
intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC);
+   as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC;
+   as_sdp->length = 0x9;
+   as_sdp->vtotal = adjusted_mode->vtotal;
+}
+
 void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
  const struct intel_crtc_state *crtc_state,
  const struct drm_connector_state *conn_state,
@@ -2956,6 +2975,7 @@ intel_dp_compute_config(struct intel_encoder *encoder,
g4x_dp_set_clock(encoder, pipe_config);
 
intel_vrr_compute_config(pipe_config, conn_state);
+   intel_dp_compute_as_sdp(intel_dp, pipe_config, conn_state);
intel_psr_compute_config(intel_dp, pipe_config, conn_state);
intel_dp_drrs_compute_config(connector, pipe_config, link_bpp_x16);
intel_dp_compute_vsc_sdp(intel_dp, pipe_config, conn_state);
@@ -4119,7 +4139,7 @@ static ssize_t intel_dp_as_sdp_pack(const struct 
drm_dp_as_sdp *as_sdp,
 
memset(sdp, 0, size);
 
-   /* Prepare AS (Adaptive Sync) VSC Header */
+   /* Prepare Adaptive Sync SDP Header */
sdp->sdp_header.HB0 = 0;
sdp->sdp_header.HB1 = as_sdp->sdp_type;
sdp->sdp_header.HB2 = 0x02;
@@ -4367,6 +4387,9 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
if (!crtc_state->has_psr)
intel_write_dp_sdp(encoder, crtc_state, DP_SDP_VSC);
 
+   if (DISPLAY_VER(dev_priv) >= 13)
+   intel_write_dp_sdp(encoder, crtc_state, DP_SDP_ADAPTIVE_SYNC);
+
intel_write_dp_sdp(encoder, crtc_state, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index faacb5ac0afe..b13cddc0f09d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2312,7 +2312,7 @@
  * (Haswell and newer) to see which VIDEO_DIP_DATA byte corresponds to each 
byte
  * of the infoframe structure specified by CEA-861. */
 #define   VIDEO_DIP_DATA_SIZE  32
-#define   VIDEO_DIP_ASYNC_DATA_SIZE32
+#define   VIDEO_DIP_ASYNC_DATA_SIZE36
 #define   VIDEO_DIP_GMP_DATA_SIZE  36
 #define   VIDEO_DIP_VSC_DATA_SIZE  36
 #define   VIDEO_DIP_PPS_DATA_SIZE  132
-- 
2.25.1

[PATCH 2/3] drm/i915/dp: Add Read/Write support for Adaptive Sync SDP

[Mitul Golani]

Add the necessary structures and functions to handle reading and
unpacking Adaptive Sync Secondary Data Packets. Also add support
to write and pack AS SDP.

--v2:
- Correct use of REG_BIT and REG_GENMASK. [Jani]
- Use as_sdp instead of async. [Jani]
- Remove unrelated comments and changes. [Jani]
- Correct code indent. [Jani]

Signed-off-by: Mitul Golani 
---
 drivers/gpu/drm/i915/display/intel_dp.c   | 92 ++-
 drivers/gpu/drm/i915/display/intel_hdmi.c | 12 ++-
 drivers/gpu/drm/i915/i915_reg.h   |  6 ++
 include/drm/display/drm_dp_helper.h   |  3 +
 4 files changed, 110 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 3b2482bf683f..cd23d33cb901 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -94,7 +94,6 @@
 #define INTEL_DP_RESOLUTION_STANDARD   (2 << INTEL_DP_RESOLUTION_SHIFT_MASK)
 #define INTEL_DP_RESOLUTION_FAILSAFE   (3 << INTEL_DP_RESOLUTION_SHIFT_MASK)
 
-
 /* Constants for DP DSC configurations */
 static const u8 valid_dsc_bpp[] = {6, 8, 10, 12, 15};
 
@@ -4110,6 +4109,34 @@ intel_dp_needs_vsc_sdp(const struct intel_crtc_state 
*crtc_state,
return false;
 }
 
+static ssize_t intel_dp_as_sdp_pack(const struct drm_dp_as_sdp *as_sdp,
+   struct dp_sdp *sdp, size_t size)
+{
+   size_t length = sizeof(struct dp_sdp);
+
+   if (size < length)
+   return -ENOSPC;
+
+   memset(sdp, 0, size);
+
+   /* Prepare AS (Adaptive Sync) VSC Header */
+   sdp->sdp_header.HB0 = 0;
+   sdp->sdp_header.HB1 = as_sdp->sdp_type;
+   sdp->sdp_header.HB2 = 0x02;
+   sdp->sdp_header.HB3 = as_sdp->length;
+
+   /* Fill AS (Adaptive Sync) SDP Payload */
+   sdp->db[1] = 0x0;
+   sdp->db[1] = as_sdp->vtotal & 0xFF;
+   sdp->db[2] = (as_sdp->vtotal >> 8) & 0xF;
+   sdp->db[3] = 0x0;
+   sdp->db[4] = 0x0;
+   sdp->db[7] = 0x0;
+   sdp->db[8] = 0x0;
+
+   return length;
+}
+
 static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc,
 struct dp_sdp *sdp, size_t size)
 {
@@ -4277,6 +4304,10 @@ static void intel_write_dp_sdp(struct intel_encoder 
*encoder,
   
_state->infoframes.drm.drm,
   , 
sizeof(sdp));
break;
+   case DP_SDP_ADAPTIVE_SYNC:
+   len = intel_dp_as_sdp_pack(_state->infoframes.as_sdp, ,
+  sizeof(sdp));
+   break;
default:
MISSING_CASE(type);
return;
@@ -4339,6 +4370,40 @@ void intel_dp_set_infoframes(struct intel_encoder 
*encoder,
intel_write_dp_sdp(encoder, crtc_state, 
HDMI_PACKET_TYPE_GAMUT_METADATA);
 }
 
+static
+int intel_dp_as_sdp_unpack(struct drm_dp_as_sdp *as_sdp,
+  const void *buffer, size_t size)
+{
+   const struct dp_sdp *sdp = buffer;
+
+   if (size < sizeof(struct dp_sdp))
+   return -EINVAL;
+
+   memset(as_sdp, 0, sizeof(*as_sdp));
+
+   if (sdp->sdp_header.HB0 != 0)
+   return -EINVAL;
+
+   if (sdp->sdp_header.HB1 != DP_SDP_ADAPTIVE_SYNC)
+   return -EINVAL;
+
+   if (sdp->sdp_header.HB2 != 0x02)
+   return -EINVAL;
+
+   if ((sdp->sdp_header.HB3 & 0x3F) != 9)
+   return -EINVAL;
+
+   if ((sdp->db[0] & AS_SDP_OP_MODE) != 0x0)
+   return -EINVAL;
+
+   as_sdp->vtotal = ((u64)sdp->db[2] << 32) | (u64)sdp->db[1];
+   as_sdp->target_rr = 0;
+   as_sdp->duration_incr_ms = 0;
+   as_sdp->duration_decr_ms = 0;
+
+   return 0;
+}
+
 static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp *vsc,
   const void *buffer, size_t size)
 {
@@ -4409,6 +4474,27 @@ static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp 
*vsc,
return 0;
 }
 
+static int
+intel_read_dp_metadata_infoframe_as_sdp(struct intel_encoder *encoder,
+   struct intel_crtc_state *crtc_state,
+   struct drm_dp_as_sdp *as_sdp)
+{
+   struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+   struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+   unsigned int type = DP_SDP_ADAPTIVE_SYNC;
+   struct dp_sdp sdp = {};
+   int ret;
+
+   dig_port->read_infoframe(encoder, crtc_state, type, ,
+sizeof(sdp));
+
+   ret = intel_dp_as_sdp_unpack(as_sdp, , sizeof(sdp));
+   if (ret)
+   drm_dbg_kms(_priv->drm, "Failed to unpack DP AS SDP\n");
+
+   return ret;
+}
+
 static int
 intel_dp_hdr_metadata_infoframe_sdp_unpack(struct hdmi_drm_infoframe 
*drm_infoframe,
   const void 

[PATCH 0/3] Enable Adaptive Sync SDP Support for DP

[Mitul Golani]

An Adaptive Sync SDP allows a DP protocol converter to
forward Adaptive Sync video with minimal buffering overhead
within the converter. An Adaptive-Sync-capable DP protocol
converter indicates its support by setting the related bit
in the DPCD register.

Computes AS SDP values based on the display configuration,
ensuring proper handling of Variable Refresh Rate (VRR)
in the context of Adaptive Sync.

--v2:
- Update logging to Patch-1
- use as_sdp instead of async
- Put definitions to correct placeholders from where it is defined.
- Update member types of as_sdp for uniformity.
- Correct use of REG_BIT and REG_GENMASK.
- Remove unrelated comments and changes.
- Correct code indents.
- separate out patch changes for intel_read/write_dp_sdp.

Mitul Golani (3):
  drm: Add Adaptive Sync SDP logging
  drm/i915/dp: Add Read/Write support for Adaptive Sync SDP
  drm/i915/display: Compute and Enable AS SDP

 drivers/gpu/drm/display/drm_dp_helper.c   |  12 ++
 .../drm/i915/display/intel_crtc_state_dump.c  |  12 ++
 drivers/gpu/drm/i915/display/intel_ddi.c  |   3 +
 .../drm/i915/display/intel_display_types.h|   1 +
 drivers/gpu/drm/i915/display/intel_dp.c   | 115 +-
 drivers/gpu/drm/i915/display/intel_hdmi.c |  12 +-
 drivers/gpu/drm/i915/i915_reg.h   |   6 +
 include/drm/display/drm_dp.h  |   2 +
 include/drm/display/drm_dp_helper.h   |  33 +
 9 files changed, 193 insertions(+), 3 deletions(-)

-- 
2.25.1

RE: [Intel-gfx] [PATCH 1/2] drm/i915: Stop accessing crtc->state from the flip done irq

[Murthy, Arun R]

> -Original Message-
> From: Ville Syrjälä 
> Sent: Thursday, December 7, 2023 7:50 PM
> To: Murthy, Arun R 
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: Stop accessing crtc->state from
> the flip done irq
> 
> On Tue, Dec 05, 2023 at 11:16:58PM +, Murthy, Arun R wrote:
> >
> > > -Original Message-
> > > From: Intel-gfx  On Behalf
> > > Of Ville Syrjälä
> > > Sent: Tuesday, November 21, 2023 7:21 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: Stop accessing
> > > crtc->state from the flip done irq
> > >
> > > On Thu, Sep 28, 2023 at 06:24:49PM +0300, Ville Syrjala wrote:
> > > > From: Ville Syrjälä 
> > > >
> > > > Assuming crtc->state is pointing at the correct thing for the
> > > > async flip commit is nonsense. If we had already queued up
> > > > multiple commits this would point at the very lates crtc state
> > > > even if the older commits hadn't even happened yet.
> > > >
> > > > Instead properly stage/arm the event like we do for async flips.
> > > > Since we don't need to arm multiple of these at the same time we
> > > > don't need a list like the normal vblank even processing uses.
> > > >
> > > > Signed-off-by: Ville Syrjälä 
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_crtc.c  | 9 -
> > > >  drivers/gpu/drm/i915/display/intel_display_irq.c   | 9 -
> > > >  drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++
> > > >  3 files changed, 15 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
> > > > b/drivers/gpu/drm/i915/display/intel_crtc.c
> > > > index 1fd068e6e26c..8a84a31c7b48 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> > > > @@ -553,8 +553,15 @@ void intel_pipe_update_start(struct
> > > > intel_atomic_state *state,
> > > >
> > > > intel_psr_lock(new_crtc_state);
> > > >
> > > > -   if (new_crtc_state->do_async_flip)
> > > > +   if (new_crtc_state->do_async_flip) {
> > > > +   spin_lock_irq(>base.dev->event_lock);
> >
> >
> > Would it be better to use irqsave since we are dealing with events.
> 
> One uses irqsave/restore when the we must protect against irq handlers, and
> the code can be called both with irqs enabled and irqs disabled.
> Here we are always called with irqs enabled, so the save/restore would be
> pointless.
> 
That's right, I didn't notice the next patch where irq_save/restore is removed 
and added this comment.

Reviewed-by: Arun R Murthy 

Thanks and Regards,
Arun R Murthy


> >
> > > > +   /* arm the event for the flip done irq handler */
> > > > +   crtc->flip_done_event = new_crtc_state->uapi.event;
> > > > +   spin_unlock_irq(>base.dev->event_lock);
> > > > +
> > > > +   new_crtc_state->uapi.event = NULL;
> > > > return;
> > > > +   }
> > > >
> > > > if (intel_crtc_needs_vblank_work(new_crtc_state))
> > > > intel_crtc_vblank_work_init(new_crtc_state);
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > > > b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > > > index bff4a76310c0..d3df615f0e48 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > > > @@ -340,16 +340,15 @@ static void flip_done_handler(struct
> > > drm_i915_private *i915,
> > > >   enum pipe pipe)
> > > >  {
> > > > struct intel_crtc *crtc = intel_crtc_for_pipe(i915, pipe);
> > > > -   struct drm_crtc_state *crtc_state = crtc->base.state;
> > > > -   struct drm_pending_vblank_event *e = crtc_state->event;
> > > > struct drm_device *dev = >drm;
> > > > unsigned long irqflags;
> > > >
> > > > spin_lock_irqsave(>event_lock, irqflags);
> > > >
> > > > -   crtc_state->event = NULL;
> > > > -
> > > > -   drm_crtc_send_vblank_event(>base, e);
> > > > +   if (crtc->flip_done_event) {
> > > > +   drm_crtc_send_vblank_event(>base, crtc-
> > > >flip_done_event);
> > > > +   crtc->flip_done_event = NULL;
> > > > +   }
> > >
> > > I just observed an oops here due to e==NULL with the current code.
> > > I *think* I've seen it once before as well. Pstore also caught what
> > > seemed to some kind of spurious DE interrupt, which might explain
> > > the oops. But not really sure what happened as the machine died before I
> could poke at it more.
> > >
> >
> > Earlier the event was set to NULL and then drm_crtc_send_vblank_event()
> was called.
> 
> The question is "how was this called when the event was NULL?".
> 
> The possible answers are:
> - spurious flip done irq
> - some kind of race with multiple commits, but can't immediately
>   think how that would happen as we still signal hw_done 

Re: [PATCH] drm/i915/hdcp: Fail Repeater authentication if Type1 device not present

[Nautiyal, Ankit K]

LGTM.

Reviewed-by: Ankit Nautiyal 

Regards,

Ankit

On 12/7/2023 11:05 AM, Suraj Kandpal wrote:

Fail repeater authentication step in case RX_INFO indicates
HDCP1.x or HDCP2.0/2.1 device is present downstream in repeater
topology and content type set by userspace is Type1.

--v2
-Fix build error.

Signed-off-by: Suraj Kandpal 
---
  drivers/gpu/drm/i915/display/intel_hdcp.c | 7 +++
  1 file changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c 
b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 39b3f7c0c77c..07d110c5841d 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1633,6 +1633,13 @@ int hdcp2_authenticate_repeater_topology(struct 
intel_connector *connector)
!HDCP_2_2_HDCP1_DEVICE_CONNECTED(rx_info[1]) &&
!HDCP_2_2_HDCP_2_0_REP_CONNECTED(rx_info[1]);
  
+	if (!dig_port->hdcp_mst_type1_capable && hdcp->content_type &&

+   !intel_encoder_is_mst(connector->encoder)) {
+   drm_dbg_kms(>drm,
+   "HDCP1.x or 2.0 Legacy Device Downstream\n");
+   return -EINVAL;
+   }
+
/* Converting and Storing the seq_num_v to local variable as DWORD */
seq_num_v =
drm_hdcp_be24_to_cpu((const u8 *)msgs.recvid_list.seq_num_v);

✓ Fi.CI.BAT: success for Cleanup C20 pll state

[Patchwork]

== Series Details ==

Series: Cleanup C20 pll state
URL   : https://patchwork.freedesktop.org/series/127530/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13995 -> Patchwork_127530v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/index.html

Participating hosts (34 -> 34)
--

  Additional (2): bat-kbl-2 bat-dg1-5 
  Missing(2): bat-dg2-9 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_127530v1 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-jsl-1:  [PASS][1] -> [FAIL][2] ([i915#8293])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-jsl-1/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-jsl-1/boot.html

  
 Possible fixes 

  * boot:
- bat-adlp-11:[FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-adlp-11/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-adlp-11/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-adlp-11:NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html

  * igt@fbdev@info:
- bat-kbl-2:  NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#1849])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-kbl-2/igt@fb...@info.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2:  NOTRUN -> [SKIP][7] ([fdo#109271]) +40 other tests 
skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][8] ([i915#4083])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#4079]) +1 other test skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-11:NOTRUN -> [SKIP][11] ([i915#3282])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-adlp-11/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
- bat-dg1-5:  NOTRUN -> [SKIP][12] ([i915#6621])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-dg1-5/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][13] ([i915#4212]) +7 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][14] ([i915#4215])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-11:NOTRUN -> [SKIP][15] ([i915#4103] / [i915#5608]) +1 
other test skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-adlp-11/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- bat-dg1-5:  NOTRUN -> [SKIP][16] ([i915#4103] / [i915#4213]) +1 
other test skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-dg1-5/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-adlp-11:NOTRUN -> [SKIP][17] ([i915#3555] / [i915#3840])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-adlp-11/igt@kms_...@dsc-basic.html
- bat-dg1-5:  NOTRUN -> [SKIP][18] ([i915#3555] / [i915#3840])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-dg1-5/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-dg1-5:  NOTRUN -> [SKIP][19] ([fdo#109285])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-dg1-5/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
- bat-adlp-11:NOTRUN -> [SKIP][20] ([i915#4093]) +3 other tests skip
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127530v1/bat-adlp-11/igt@kms_force_connector_ba...@prune-stale-modes.html

  * igt@kms_hdmi_inject@inject-audio:
- bat-dg1-5:  NOTRUN -> [SKIP][21] 

✓ Fi.CI.BAT: success for drm/i915: Drop pointless null checks and fix a scaler bug

[Patchwork]

== Series Details ==

Series: drm/i915: Drop pointless null checks and fix a scaler bug
URL   : https://patchwork.freedesktop.org/series/127525/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13995 -> Patchwork_127525v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/index.html

Participating hosts (34 -> 34)
--

  Additional (2): bat-kbl-2 bat-dg1-5 
  Missing(2): bat-dg2-9 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_127525v1 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-adlp-11:[FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-adlp-11/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-adlp-11/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-adlp-11:NOTRUN -> [SKIP][3] ([i915#9318])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html

  * igt@fbdev@info:
- bat-kbl-2:  NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1849])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-kbl-2/igt@fb...@info.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2:  NOTRUN -> [SKIP][5] ([fdo#109271]) +40 other tests 
skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][6] ([i915#4083])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][7] ([i915#4077]) +2 other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][8] ([i915#4079]) +1 other test skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-11:NOTRUN -> [SKIP][9] ([i915#3282])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-adlp-11/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#6621])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@i915_pm_...@basic-api.html

  * igt@i915_selftest@live@gt_lrc:
- bat-dg1-5:  NOTRUN -> [ABORT][11] ([i915#9413])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@i915_selftest@live@gt_lrc.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][12] ([i915#4212]) +7 other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][13] ([i915#4215])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-11:NOTRUN -> [SKIP][14] ([i915#4103] / [i915#5608]) +1 
other test skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-adlp-11/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- bat-dg1-5:  NOTRUN -> [SKIP][15] ([i915#4103] / [i915#4213]) +1 
other test skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-adlp-11:NOTRUN -> [SKIP][16] ([i915#3555] / [i915#3840])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-adlp-11/igt@kms_...@dsc-basic.html
- bat-dg1-5:  NOTRUN -> [SKIP][17] ([i915#3555] / [i915#3840])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-dg1-5:  NOTRUN -> [SKIP][18] ([fdo#109285])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-dg1-5/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
- bat-adlp-11:NOTRUN -> [SKIP][19] ([i915#4093]) +3 other tests skip
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127525v1/bat-adlp-11/igt@kms_force_connector_ba...@prune-stale-modes.html

  * igt@kms_hdmi_inject@inject-audio:
- bat-dg1-5:  NOTRUN -> [SKIP][20] ([i915#433])
   [20]: 

✗ Fi.CI.SPARSE: warning for drm/i915: Drop pointless null checks and fix a scaler bug

[Patchwork]

== Series Details ==

Series: drm/i915: Drop pointless null checks and fix a scaler bug
URL   : https://patchwork.freedesktop.org/series/127525/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:181:9: warning: 

Re: [Intel-gfx] [PATCH] [v2] drm/i915/display: Check GGTT to determine phys_base

[Almahallawy, Khaled]

Thank You for the patch. We noticed a break in the customer board with
the latest GOP + this patch.


Thank You
Khaled  

On Wed, 2023-12-06 at 18:46 +, Paz Zcharya wrote:
> There was an assumption that for iGPU there should be a 1:1 mapping
> of GGTT to physical address pointing to the framebuffer.
> This assumption is not strictly true effective generation 8 or newer.
> Fix that by checking GGTT to determine the phys address on gen8+.
> 
> The following algorithm for phys_base should be valid for all
> platforms:
> 1. Find pte
> 2. if(IS_DGFX(i915) && pte & GEN12_GGTT_PTE_LM) mem =
> i915->mm.regions[INTEL_REGION_LMEM_0] else mem = i915-
> >mm.stolen_region
> 3. phys_base = (pte & I915_GTT_PAGE_MASK) - mem->region.start;
> 
> - On older platforms, stolen_region points to system memory, starting
> at 0
> - on DG2, it uses lmem region which starts at 0 as well
> - on MTL, stolen_region points to stolen-local which starts at
> 0x80
> 
> Changes from v1:
>   - Add an if statement for gen7-, where there is a 1:1 mapping
> 
> Signed-off-by: Paz Zcharya 
> ---
> 
>  .../drm/i915/display/intel_plane_initial.c| 64 +++
> 
>  1 file changed, 39 insertions(+), 25 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_plane_initial.c
> b/drivers/gpu/drm/i915/display/intel_plane_initial.c
> index a55c09cbd0e4..7d9bb631b93b 100644
> --- a/drivers/gpu/drm/i915/display/intel_plane_initial.c
> +++ b/drivers/gpu/drm/i915/display/intel_plane_initial.c
> @@ -59,44 +59,58 @@ initial_plane_vma(struct drm_i915_private *i915,
>   return NULL;
>  
>   base = round_down(plane_config->base, I915_GTT_MIN_ALIGNMENT);
> - if (IS_DGFX(i915)) {
> +
> + if (GRAPHICS_VER(i915) < 8) {
> + /*
> +  * In gen7-, there is a 1:1 mapping
> +  * between GSM and physical address.
> +  */
> + phys_base = base;
> + mem = i915->mm.stolen_region;
> + } else {
> + /*
> +  * In gen8+, there is no 1:1 mapping between
> +  * GSM and physical address, so we need to
> +  * check GGTT to determine the physical address.
> +  */
>   gen8_pte_t __iomem *gte = to_gt(i915)->ggtt->gsm;
>   gen8_pte_t pte;
>  
>   gte += base / I915_GTT_PAGE_SIZE;
> -
>   pte = ioread64(gte);
> - if (!(pte & GEN12_GGTT_PTE_LM)) {
> - drm_err(>drm,
> - "Initial plane programming missing
> PTE_LM bit\n");
> - return NULL;
> - }
> -
> - phys_base = pte & I915_GTT_PAGE_MASK;
> - mem = i915->mm.regions[INTEL_REGION_LMEM_0];
>  
> - /*
> -  * We don't currently expect this to ever be placed in
> the
> -  * stolen portion.
> -  */
> - if (phys_base >= resource_size(>region)) {
> - drm_err(>drm,
> - "Initial plane programming using
> invalid range, phys_base=%pa\n",
> - _base);
> - return NULL;
> + if (IS_DGFX(i915)) {
> + if (!(pte & GEN12_GGTT_PTE_LM)) {
> + drm_err(>drm,
> + "Initial plane programming
> missing PTE_LM bit\n");
> + return NULL;
> + }
> + mem = i915->mm.regions[INTEL_REGION_LMEM_0];
> + } else {
> + mem = i915->mm.stolen_region;
>   }
>  
> - drm_dbg(>drm,
> - "Using phys_base=%pa, based on initial plane
> programming\n",
> - _base);
> - } else {
> - phys_base = base;
> - mem = i915->mm.stolen_region;
> + phys_base = (pte & I915_GTT_PAGE_MASK) - mem-
> >region.start;
>   }
>  
>   if (!mem)
>   return NULL;
>  
> + /*
> +  * We don't currently expect this to ever be placed in the
> +  * stolen portion.
> +  */
> + if (phys_base >= resource_size(>region)) {
> + drm_err(>drm,
> + "Initial plane programming using invalid range,
> phys_base=%pa\n",
> + _base);
> + return NULL;
> + }
> +
> + drm_dbg(>drm,
> + "Using phys_base=%pa, based on initial plane
> programming\n",
> + _base);
> +
>   size = round_up(plane_config->base + plane_config->size,
>   mem->min_page_size);
>   size -= base;

✓ Fi.CI.BAT: success for drm/i915: Fix remapped stride with CCS on ADL+ (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix remapped stride with CCS on ADL+ (rev2)
URL   : https://patchwork.freedesktop.org/series/127375/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13995 -> Patchwork_127375v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/index.html

Participating hosts (34 -> 35)
--

  Additional (2): bat-mtlp-8 bat-dg1-5 
  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_127375v2 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-adlp-11:[FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-adlp-11/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-adlp-11/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][3] ([i915#9318])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html
- bat-adlp-11:NOTRUN -> [SKIP][4] ([i915#9318])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_lmem_swapping@verify-random:
- bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][6] ([i915#4083])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-dg1-5/igt@gem_m...@basic.html
- bat-mtlp-8: NOTRUN -> [SKIP][7] ([i915#4083])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-mtlp-8/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#4077]) +2 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-mtlp-8/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#4079]) +1 other test skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#4077]) +2 other tests skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][11] ([i915#4079]) +1 other test skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-11:NOTRUN -> [SKIP][12] ([i915#3282])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-adlp-11/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
- bat-dg1-5:  NOTRUN -> [SKIP][13] ([i915#6621])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-dg1-5/igt@i915_pm_...@basic-api.html
- bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#6621])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-mtlp-8/igt@i915_pm_...@basic-api.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#6645])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-mtlp-8/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#5190])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][17] ([i915#4212]) +7 other tests skip
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][18] ([i915#4212]) +8 other tests skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html
- bat-dg1-5:  NOTRUN -> [SKIP][19] ([i915#4215])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-11:NOTRUN -> [SKIP][20] ([i915#4103] / [i915#5608]) +1 
other test skip
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127375v2/bat-adlp-11/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- bat-mtlp-8: NOTRUN -> [SKIP][21] 

✓ Fi.CI.BAT: success for ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro

[Patchwork]

== Series Details ==

Series: ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro
URL   : https://patchwork.freedesktop.org/series/127515/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13995 -> Patchwork_127515v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/index.html

Participating hosts (34 -> 34)
--

  Additional (2): bat-mtlp-8 bat-dg1-5 
  Missing(2): bat-dg2-9 fi-snb-2520m 

New tests
-

  New tests have been introduced between CI_DRM_13995 and Patchwork_127515v1:

### New IGT tests (12) ###

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-a-dp-7:
- Statuses : 1 pass(s)
- Exec time: [1.95] s

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.98] s

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.93] s

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-a-dp-7:
- Statuses : 1 pass(s)
- Exec time: [2.13] s

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.81] s

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.99] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-7:
- Statuses : 1 abort(s)
- Exec time: [1.99] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.77] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.86] s

  * igt@kms_pipe_crc_basic@read-crc@pipe-a-dp-7:
- Statuses : 1 pass(s)
- Exec time: [2.04] s

  * igt@kms_pipe_crc_basic@read-crc@pipe-c-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.86] s

  * igt@kms_pipe_crc_basic@read-crc@pipe-d-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.77] s

  

Known issues


  Here are the changes found in Patchwork_127515v1 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-adlp-11:[FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-adlp-11/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-adlp-11/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][3] ([i915#9318])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html
- bat-adlp-11:NOTRUN -> [SKIP][4] ([i915#9318])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_lmem_swapping@verify-random:
- bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][6] ([i915#4083])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-dg1-5/igt@gem_m...@basic.html
- bat-mtlp-8: NOTRUN -> [SKIP][7] ([i915#4083])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-mtlp-8/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#4077]) +2 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-mtlp-8/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#4079]) +1 other test skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#4077]) +2 other tests skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][11] ([i915#4079]) +1 other test skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-11:NOTRUN -> [SKIP][12] ([i915#3282])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-adlp-11/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
- bat-dg1-5:  NOTRUN -> [SKIP][13] ([i915#6621])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-dg1-5/igt@i915_pm_...@basic-api.html
- bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#6621])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127515v1/bat-mtlp-8/igt@i915_pm_...@basic-api.html

  * 

✗ Fi.CI.CHECKPATCH: warning for ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro

[Patchwork]

== Series Details ==

Series: ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro
URL   : https://patchwork.freedesktop.org/series/127515/
State : warning

== Summary ==

Error: dim checkpatch failed
107b189e592f ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro
-:9: WARNING:REPEATED_WORD: Possible repeated word: 'all'
#9: 
finds all all three connectors on the system, so the two drivers are not

total: 0 errors, 1 warnings, 0 checks, 7 lines checked

✓ Fi.CI.BAT: success for drm/i915/guc: Create the guc_to_i915() wrapper (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Create the guc_to_i915() wrapper (rev5)
URL   : https://patchwork.freedesktop.org/series/124686/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13995 -> Patchwork_124686v5


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/index.html

Participating hosts (34 -> 34)
--

  Additional (2): bat-kbl-2 bat-dg1-5 
  Missing(2): bat-dg2-9 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_124686v5 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-adlp-11:[FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-adlp-11/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-adlp-11/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-adlp-11:NOTRUN -> [SKIP][3] ([i915#9318])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html

  * igt@fbdev@info:
- bat-kbl-2:  NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1849])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-kbl-2/igt@fb...@info.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2:  NOTRUN -> [SKIP][5] ([fdo#109271]) +40 other tests 
skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][6] ([i915#4083])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][7] ([i915#4077]) +2 other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][8] ([i915#4079]) +1 other test skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-11:NOTRUN -> [SKIP][9] ([i915#3282])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-adlp-11/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#6621])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][11] ([i915#4212]) +7 other tests skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][12] ([i915#4215])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-11:NOTRUN -> [SKIP][13] ([i915#4103] / [i915#5608]) +1 
other test skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-adlp-11/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- bat-dg1-5:  NOTRUN -> [SKIP][14] ([i915#4103] / [i915#4213]) +1 
other test skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-adlp-11:NOTRUN -> [SKIP][15] ([i915#3555] / [i915#3840])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-adlp-11/igt@kms_...@dsc-basic.html
- bat-dg1-5:  NOTRUN -> [SKIP][16] ([i915#3555] / [i915#3840])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-dg1-5:  NOTRUN -> [SKIP][17] ([fdo#109285])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
- bat-adlp-11:NOTRUN -> [SKIP][18] ([i915#4093]) +3 other tests skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-adlp-11/igt@kms_force_connector_ba...@prune-stale-modes.html

  * igt@kms_hdmi_inject@inject-audio:
- bat-dg1-5:  NOTRUN -> [SKIP][19] ([i915#433])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v5/bat-dg1-5/igt@kms_hdmi_inj...@inject-audio.html
- bat-adlp-11:NOTRUN -> [SKIP][20] ([i915#4369])
   [20]: 

✗ Fi.CI.SPARSE: warning for drm/i915/guc: Create the guc_to_i915() wrapper (rev5)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Create the guc_to_i915() wrapper (rev5)
URL   : https://patchwork.freedesktop.org/series/124686/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ Fi.CI.BAT: success for series starting with [1/3] drm: Add drm_vblank_work_flush_all(). (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm: Add drm_vblank_work_flush_all(). (rev2)
URL   : https://patchwork.freedesktop.org/series/126934/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13995 -> Patchwork_126934v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/index.html

Participating hosts (34 -> 35)
--

  Additional (2): bat-kbl-2 bat-dg1-5 
  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_126934v2 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-adlp-11:[FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-adlp-11/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-adlp-11/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-adlp-11:NOTRUN -> [SKIP][3] ([i915#9318])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html

  * igt@fbdev@info:
- bat-kbl-2:  NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1849])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-kbl-2/igt@fb...@info.html

  * igt@gem_exec_suspend@basic-s0@smem:
- bat-dg2-9:  [PASS][5] -> [INCOMPLETE][6] ([i915#9275])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg2-9/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2:  NOTRUN -> [SKIP][7] ([fdo#109271]) +40 other tests 
skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][8] ([i915#4083])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg1-5/igt@gem_m...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#4079]) +1 other test skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-11:NOTRUN -> [SKIP][11] ([i915#3282])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-adlp-11/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
- bat-dg1-5:  NOTRUN -> [SKIP][12] ([i915#6621])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg1-5/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@basic-x-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][13] ([i915#4212]) +7 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg1-5/igt@kms_addfb_ba...@basic-x-tiled-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-dg1-5:  NOTRUN -> [SKIP][14] ([i915#4215])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg1-5/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-adlp-11:NOTRUN -> [SKIP][15] ([i915#4103] / [i915#5608]) +1 
other test skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-adlp-11/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- bat-dg1-5:  NOTRUN -> [SKIP][16] ([i915#4103] / [i915#4213]) +1 
other test skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg1-5/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-adlp-11:NOTRUN -> [SKIP][17] ([i915#3555] / [i915#3840])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-adlp-11/igt@kms_...@dsc-basic.html
- bat-dg1-5:  NOTRUN -> [SKIP][18] ([i915#3555] / [i915#3840])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg1-5/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-dg1-5:  NOTRUN -> [SKIP][19] ([fdo#109285])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126934v2/bat-dg1-5/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
- bat-adlp-11:NOTRUN -> [SKIP][20] ([i915#4093]) +3 other tests skip
   [20]: 

✗ Fi.CI.SPARSE: warning for series starting with [1/3] drm: Add drm_vblank_work_flush_all(). (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm: Add drm_vblank_work_flush_all(). (rev2)
URL   : https://patchwork.freedesktop.org/series/126934/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 

✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm: Add drm_vblank_work_flush_all(). (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm: Add drm_vblank_work_flush_all(). (rev2)
URL   : https://patchwork.freedesktop.org/series/126934/
State : warning

== Summary ==

Error: dim checkpatch failed
84e07173e672 drm: Add drm_vblank_work_flush_all().
-:33: WARNING:WAITQUEUE_ACTIVE: waitqueue_active without comment
#33: FILE: drivers/gpu/drm/drm_vblank_work.c:249:
+   waitqueue_active(>work_wait_queue),

total: 0 errors, 1 warnings, 0 checks, 41 lines checked
e56a10b87a81 drm/i915: Use vblank worker to unpin old legacy cursor fb safely
4d4e377ec291 drm/i915: Use the same vblank worker for atomic unpin
-:37: WARNING:TYPO_SPELLING: 'succesful' may be misspelled - perhaps 
'successful'?
#37: FILE: drivers/gpu/drm/i915/display/intel_atomic_plane.c:1168:
+* This branch can only ever be called after plane update is succesful,
 ^

-:118: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#118: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:746:
+
drm_crtc_accurate_vblank_count(>base) + 1,

total: 0 errors, 2 warnings, 0 checks, 110 lines checked

✗ Fi.CI.BAT: failure for drm/i915/gem: Atomically invalidate userptr on mmu-notifier (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/gem: Atomically invalidate userptr on mmu-notifier (rev6)
URL   : https://patchwork.freedesktop.org/series/126998/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13995 -> Patchwork_126998v6


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_126998v6 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_126998v6, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/index.html

Participating hosts (34 -> 35)
--

  Additional (3): bat-kbl-2 bat-mtlp-8 bat-dg1-5 
  Missing(2): fi-snb-2520m fi-pnv-d510 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_126998v6:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@hangcheck:
- bat-atsm-1: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-atsm-1/igt@i915_selftest@l...@hangcheck.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-atsm-1/igt@i915_selftest@l...@hangcheck.html

  
Known issues


  Here are the changes found in Patchwork_126998v6 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-adlp-11:[FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13995/bat-adlp-11/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-adlp-11/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html
- bat-adlp-11:NOTRUN -> [SKIP][6] ([i915#9318])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-adlp-11/igt@debugfs_t...@basic-hwmon.html

  * igt@fbdev@info:
- bat-kbl-2:  NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#1849])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-kbl-2/igt@fb...@info.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2:  NOTRUN -> [SKIP][8] ([fdo#109271]) +40 other tests 
skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_lmem_swapping@verify-random:
- bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][10] ([i915#4083])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-dg1-5/igt@gem_m...@basic.html
- bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4083])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-mtlp-8/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4077]) +2 other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-mtlp-8/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#4079]) +1 other test skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-dg1-5:  NOTRUN -> [SKIP][14] ([i915#4077]) +2 other tests skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-dg1-5/igt@gem_tiled_fence_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg1-5:  NOTRUN -> [SKIP][15] ([i915#4079]) +1 other test skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-dg1-5/igt@gem_tiled_pread_basic.html
- bat-adlp-11:NOTRUN -> [SKIP][16] ([i915#3282])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-adlp-11/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
- bat-dg1-5:  NOTRUN -> [SKIP][17] ([i915#6621])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-dg1-5/igt@i915_pm_...@basic-api.html
- bat-mtlp-8: NOTRUN -> [SKIP][18] ([i915#6621])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126998v6/bat-mtlp-8/igt@i915_pm_...@basic-api.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-mtlp-8: NOTRUN -> [SKIP][19] ([i915#6645])
   [19]: 

✗ Fi.CI.SPARSE: warning for drm/i915/gem: Atomically invalidate userptr on mmu-notifier (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/gem: Atomically invalidate userptr on mmu-notifier (rev6)
URL   : https://patchwork.freedesktop.org/series/126998/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.CHECKPATCH: warning for drm/i915/gem: Atomically invalidate userptr on mmu-notifier (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/gem: Atomically invalidate userptr on mmu-notifier (rev6)
URL   : https://patchwork.freedesktop.org/series/126998/
State : warning

== Summary ==

Error: dim checkpatch failed
fe2f62676c34 drm/i915/gem: Atomically invalidate userptr on mmu-notifier
-:117: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#117: 
deleted file mode 100644

total: 0 errors, 1 warnings, 0 checks, 97 lines checked

[PATCH 1/3] drm/i915/mtl: Use port clock compatible numbers for C20 phy

[Radhakrishna Sripada]

In C20 pll_state link_bit_rate and clock fields are bit redundant. Since
many of the helpers assume the clock values, which are different from
link_bit_rate for dp2.0, convert the helpers to use the numbers that
are compatible with link_bit_rate.

Currently link_bit_rate is compatible with crtc_state->port_clock. The
function intel_c20pll_calc_port_clock returns the number which is
compatible with crtc_state->port_clock. In order to avoid extra
conversions b/ween clock and link_bit_rate, remove "clock" field from the
C20 pll_state and then rename "link_bit_rate" as "clock".

While at it rely on crtc_state->port_clock during C20 Pll programming.

Cc: Clint Taylor 
Cc: Mika Kahola 
Signed-off-by: Radhakrishna Sripada 
---
 drivers/gpu/drm/i915/display/intel_cx0_phy.c | 43 ++--
 1 file changed, 22 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c 
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 5fbec5784b83..7d412be996ea 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -2117,7 +2117,7 @@ int intel_cx0pll_calc_state(struct intel_crtc_state 
*crtc_state,
 static bool intel_c20_use_mplla(u32 clock)
 {
/* 10G and 20G rates use MPLLA */
-   if (clock == 312500 || clock == 625000)
+   if (clock == 100 || clock == 200)
return true;
 
return false;
@@ -2192,7 +2192,7 @@ void intel_c20pll_dump_hw_state(struct drm_i915_private 
*i915,
drm_dbg_kms(>drm, "cmn[0] = 0x%.4x, cmn[1] = 0x%.4x, cmn[2] = 
0x%.4x, cmn[3] = 0x%.4x\n",
hw_state->cmn[0], hw_state->cmn[1], hw_state->cmn[2], 
hw_state->cmn[3]);
 
-   if (intel_c20_use_mplla(hw_state->clock)) {
+   if (intel_c20_use_mplla(hw_state->link_bit_rate)) {
for (i = 0; i < ARRAY_SIZE(hw_state->mplla); i++)
drm_dbg_kms(>drm, "mplla[%d] = 0x%.4x\n", i, 
hw_state->mplla[i]);
} else {
@@ -2220,11 +2220,11 @@ static u8 intel_c20_get_dp_rate(u32 clock)
return 6;
case 432000: /* 4.32 Gbps eDP */
return 7;
-   case 312500: /* 10 Gbps DP2.0 */
+   case 100: /* 10 Gbps DP2.0 */
return 8;
-   case 421875: /* 13.5 Gbps DP2.0 */
+   case 135: /* 13.5 Gbps DP2.0 */
return 9;
-   case 625000: /* 20 Gbps DP2.0*/
+   case 200: /* 20 Gbps DP2.0 */
return 10;
case 648000: /* 6.48 Gbps eDP*/
return 11;
@@ -2242,13 +2242,13 @@ static u8 intel_c20_get_hdmi_rate(u32 clock)
return 0;
 
switch (clock) {
-   case 166670: /* 3 Gbps */
-   case 30: /* 6 Gbps */
-   case 70: /* 12 Gbps */
+   case 30: /* 3 Gbps */
+   case 60: /* 6 Gbps */
+   case 120: /* 12 Gbps */
return 1;
-   case 40: /* 8 Gbps */
+   case 80: /* 8 Gbps */
return 2;
-   case 60: /* 10 Gbps */
+   case 100: /* 10 Gbps */
return 3;
default:
MISSING_CASE(clock);
@@ -2259,7 +2259,7 @@ static u8 intel_c20_get_hdmi_rate(u32 clock)
 static bool is_dp2(u32 clock)
 {
/* DP2.0 clock rates */
-   if (clock == 312500 || clock == 421875 || clock  == 625000)
+   if (clock == 100 || clock == 135 || clock  == 200)
return true;
 
return false;
@@ -2268,11 +2268,11 @@ static bool is_dp2(u32 clock)
 static bool is_hdmi_frl(u32 clock)
 {
switch (clock) {
-   case 166670: /* 3 Gbps */
-   case 30: /* 6 Gbps */
-   case 40: /* 8 Gbps */
-   case 60: /* 10 Gbps */
-   case 70: /* 12 Gbps */
+   case 30: /* 3 Gbps */
+   case 60: /* 6 Gbps */
+   case 80: /* 8 Gbps */
+   case 100: /* 10 Gbps */
+   case 120: /* 12 Gbps */
return true;
default:
return false;
@@ -2305,6 +2305,7 @@ static void intel_c20_pll_program(struct drm_i915_private 
*i915,
const struct intel_c20pll_state *pll_state = 
_state->cx0pll_state.c20;
bool dp = false;
int lane = crtc_state->lane_count > 2 ? INTEL_CX0_BOTH_LANES : 
INTEL_CX0_LANE0;
+   u32 clock = crtc_state->port_clock;
bool cntx;
int i;
 
@@ -2343,7 +2344,7 @@ static void intel_c20_pll_program(struct drm_i915_private 
*i915,
}
 
/* 3.3 mpllb or mplla configuration */
-   if (intel_c20_use_mplla(pll_state->clock)) {
+   if (intel_c20_use_mplla(clock)) {
for (i = 0; i < ARRAY_SIZE(pll_state->mplla); i++) {
if (cntx)
intel_c20_sram_write(i915, encoder->port, 
INTEL_CX0_LANE0,
@@ -2370,23 +2371,23 @@ static void intel_c20_pll_program(struct 
drm_i915_private *i915,
/* 4. Program custom width to match the link protocol */

[PATCH 3/3] drm/i915/mtl: Rename the link_bit_rate to clock in C20 pll_state

[Radhakrishna Sripada]

With the cleanup of the misleading clock value to avoid extra
calculations to convert between link_bit_rate and clock, use
one standard "clock" field for the c20 pll which works with
crtc_state->port_clock field.

Cc: Clint Taylor 
Cc: Mika Kahola 
Signed-off-by: Radhakrishna Sripada 
---
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 42 +--
 .../drm/i915/display/intel_display_types.h|  2 +-
 2 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c 
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index d518b55d5150..4e6ea71ff629 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -745,7 +745,7 @@ static const struct intel_c10pll_state * const 
mtl_c10_edp_tables[] = {
 
 /* C20 basic DP 1.4 tables */
 static const struct intel_c20pll_state mtl_c20_dp_rbr = {
-   .link_bit_rate = 162000,
+   .clock = 162000,
.tx = { 0xbe88, /* tx cfg0 */
0x5800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -770,7 +770,7 @@ static const struct intel_c20pll_state mtl_c20_dp_rbr = {
 };
 
 static const struct intel_c20pll_state mtl_c20_dp_hbr1 = {
-   .link_bit_rate = 27,
+   .clock = 27,
.tx = { 0xbe88, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -795,7 +795,7 @@ static const struct intel_c20pll_state mtl_c20_dp_hbr1 = {
 };
 
 static const struct intel_c20pll_state mtl_c20_dp_hbr2 = {
-   .link_bit_rate = 54,
+   .clock = 54,
.tx = { 0xbe88, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -820,7 +820,7 @@ static const struct intel_c20pll_state mtl_c20_dp_hbr2 = {
 };
 
 static const struct intel_c20pll_state mtl_c20_dp_hbr3 = {
-   .link_bit_rate = 81,
+   .clock = 81,
.tx = { 0xbe88, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -846,7 +846,7 @@ static const struct intel_c20pll_state mtl_c20_dp_hbr3 = {
 
 /* C20 basic DP 2.0 tables */
 static const struct intel_c20pll_state mtl_c20_dp_uhbr10 = {
-   .link_bit_rate = 100, /* 10 Gbps */
+   .clock = 100, /* 10 Gbps */
.tx = { 0xbe21, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -870,7 +870,7 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr10 = {
 };
 
 static const struct intel_c20pll_state mtl_c20_dp_uhbr13_5 = {
-   .link_bit_rate = 135, /* 13.5 Gbps */
+   .clock = 135, /* 13.5 Gbps */
.tx = { 0xbea0, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -895,7 +895,7 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr13_5 
= {
 };
 
 static const struct intel_c20pll_state mtl_c20_dp_uhbr20 = {
-   .link_bit_rate = 200, /* 20 Gbps */
+   .clock = 200, /* 20 Gbps */
.tx = { 0xbe20, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -1514,7 +1514,7 @@ static const struct intel_c10pll_state * const 
mtl_c10_hdmi_tables[] = {
 };
 
 static const struct intel_c20pll_state mtl_c20_hdmi_25_175 = {
-   .link_bit_rate = 25175,
+   .clock = 25175,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1539,7 +1539,7 @@ static const struct intel_c20pll_state 
mtl_c20_hdmi_25_175 = {
 };
 
 static const struct intel_c20pll_state mtl_c20_hdmi_27_0 = {
-   .link_bit_rate = 27000,
+   .clock = 27000,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1564,7 +1564,7 @@ static const struct intel_c20pll_state mtl_c20_hdmi_27_0 
= {
 };
 
 static const struct intel_c20pll_state mtl_c20_hdmi_74_25 = {
-   .link_bit_rate = 74250,
+   .clock = 74250,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1589,7 +1589,7 @@ static const struct intel_c20pll_state mtl_c20_hdmi_74_25 
= {
 };
 
 static const struct intel_c20pll_state mtl_c20_hdmi_148_5 = {
-   .link_bit_rate = 148500,
+   .clock = 148500,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1614,7 +1614,7 @@ static const struct intel_c20pll_state mtl_c20_hdmi_148_5 
= {
 };
 
 static const struct intel_c20pll_state mtl_c20_hdmi_594 = {
-   .link_bit_rate = 594000,
+   .clock = 594000,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1639,7 +1639,7 @@ static const struct intel_c20pll_state mtl_c20_hdmi_594 = 
{
 };
 
 static const struct intel_c20pll_state mtl_c20_hdmi_300 = {
-   .link_bit_rate = 300,
+   .clock = 300,
.tx = {  

[PATCH 2/3] drm/i915/mtl: Remove misleading "clock" field from C20 pll_state

[Radhakrishna Sripada]

The field link_bit_rate serves as the actual clock value for the C20
pll_state structure. Remove the misleading clock field. The subsequent
patch would rename the link_bit_rate as the clock field.

Cc: Clint Taylor 
Cc: Mika Kahola 
Signed-off-by: Radhakrishna Sripada 
---
 drivers/gpu/drm/i915/display/intel_cx0_phy.c   | 18 --
 .../gpu/drm/i915/display/intel_display_types.h |  3 +--
 2 files changed, 1 insertion(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c 
b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 7d412be996ea..d518b55d5150 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -746,7 +746,6 @@ static const struct intel_c10pll_state * const 
mtl_c10_edp_tables[] = {
 /* C20 basic DP 1.4 tables */
 static const struct intel_c20pll_state mtl_c20_dp_rbr = {
.link_bit_rate = 162000,
-   .clock = 162000,
.tx = { 0xbe88, /* tx cfg0 */
0x5800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -772,7 +771,6 @@ static const struct intel_c20pll_state mtl_c20_dp_rbr = {
 
 static const struct intel_c20pll_state mtl_c20_dp_hbr1 = {
.link_bit_rate = 27,
-   .clock = 27,
.tx = { 0xbe88, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -798,7 +796,6 @@ static const struct intel_c20pll_state mtl_c20_dp_hbr1 = {
 
 static const struct intel_c20pll_state mtl_c20_dp_hbr2 = {
.link_bit_rate = 54,
-   .clock = 54,
.tx = { 0xbe88, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -824,7 +821,6 @@ static const struct intel_c20pll_state mtl_c20_dp_hbr2 = {
 
 static const struct intel_c20pll_state mtl_c20_dp_hbr3 = {
.link_bit_rate = 81,
-   .clock = 81,
.tx = { 0xbe88, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -851,7 +847,6 @@ static const struct intel_c20pll_state mtl_c20_dp_hbr3 = {
 /* C20 basic DP 2.0 tables */
 static const struct intel_c20pll_state mtl_c20_dp_uhbr10 = {
.link_bit_rate = 100, /* 10 Gbps */
-   .clock = 312500,
.tx = { 0xbe21, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -876,7 +871,6 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr10 = {
 
 static const struct intel_c20pll_state mtl_c20_dp_uhbr13_5 = {
.link_bit_rate = 135, /* 13.5 Gbps */
-   .clock = 421875,
.tx = { 0xbea0, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -902,7 +896,6 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr13_5 
= {
 
 static const struct intel_c20pll_state mtl_c20_dp_uhbr20 = {
.link_bit_rate = 200, /* 20 Gbps */
-   .clock = 625000,
.tx = { 0xbe20, /* tx cfg0 */
0x4800, /* tx cfg1 */
0x, /* tx cfg2 */
@@ -1522,7 +1515,6 @@ static const struct intel_c10pll_state * const 
mtl_c10_hdmi_tables[] = {
 
 static const struct intel_c20pll_state mtl_c20_hdmi_25_175 = {
.link_bit_rate = 25175,
-   .clock = 25175,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1548,7 +1540,6 @@ static const struct intel_c20pll_state 
mtl_c20_hdmi_25_175 = {
 
 static const struct intel_c20pll_state mtl_c20_hdmi_27_0 = {
.link_bit_rate = 27000,
-   .clock = 27000,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1574,7 +1565,6 @@ static const struct intel_c20pll_state mtl_c20_hdmi_27_0 
= {
 
 static const struct intel_c20pll_state mtl_c20_hdmi_74_25 = {
.link_bit_rate = 74250,
-   .clock = 74250,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1600,7 +1590,6 @@ static const struct intel_c20pll_state mtl_c20_hdmi_74_25 
= {
 
 static const struct intel_c20pll_state mtl_c20_hdmi_148_5 = {
.link_bit_rate = 148500,
-   .clock = 148500,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1626,7 +1615,6 @@ static const struct intel_c20pll_state mtl_c20_hdmi_148_5 
= {
 
 static const struct intel_c20pll_state mtl_c20_hdmi_594 = {
.link_bit_rate = 594000,
-   .clock = 594000,
.tx = {  0xbe88, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1652,7 +1640,6 @@ static const struct intel_c20pll_state mtl_c20_hdmi_594 = 
{
 
 static const struct intel_c20pll_state mtl_c20_hdmi_300 = {
.link_bit_rate = 300,
-   .clock = 166670,
.tx = {  0xbe98, /* tx cfg0 */
  0x9800, /* tx cfg1 */
  0x, /* tx cfg2 */
@@ -1678,7 

[PATCH 0/3] Cleanup C20 pll state

[Radhakrishna Sripada]

C20 pll state has both link_bit_rate and clock fields to represent
the clocks. Both have the same values for DP 1.4 they difer for
DP2.0. Stick to the numbers that are compatible with other clock
numbers like the port_clock in crtc_state

Radhakrishna Sripada (3):
  drm/i915/mtl: Use port clock compatible numbers for C20 phy
  drm/i915/mtl: Remove misleading "clock" field from C20 pll_state
  drm/i915/mtl: Rename the link_bit_rate to clock in C20 pll_state

 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 79 ---
 .../drm/i915/display/intel_display_types.h|  1 -
 2 files changed, 31 insertions(+), 49 deletions(-)

-- 
2.34.1

[PATCH 8/8] drm/i915/tv: Drop redundant null checks

[Ville Syrjala]

From: Ville Syrjälä 

Neither 'tv_mode' or 'color_conversion' can be NULL,
so drop the pointless checks.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_tv.c | 6 --
 1 file changed, 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tv.c 
b/drivers/gpu/drm/i915/display/intel_tv.c
index 2ee4f0d95851..d4386cb3569e 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1417,9 +1417,6 @@ set_tv_mode_timings(struct drm_i915_private *dev_priv,
 static void set_color_conversion(struct drm_i915_private *dev_priv,
 const struct color_conversion 
*color_conversion)
 {
-   if (!color_conversion)
-   return;
-
intel_de_write(dev_priv, TV_CSC_Y,
   (color_conversion->ry << 16) | color_conversion->gy);
intel_de_write(dev_priv, TV_CSC_Y2,
@@ -1454,9 +1451,6 @@ static void intel_tv_pre_enable(struct intel_atomic_state 
*state,
int xpos, ypos;
unsigned int xsize, ysize;
 
-   if (!tv_mode)
-   return; /* can't happen (mode_prepare prevents this) */
-
tv_ctl = intel_de_read(dev_priv, TV_CTL);
tv_ctl &= TV_CTL_SAVE;
 
-- 
2.41.0

[PATCH 7/8] drm/i915: s/cstate/crtc_state/ in intel_get_frame_time_us()

[Ville Syrjala]

From: Ville Syrjälä 

Use standard variable name 'crtc_state' instead of 'cstate'.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 0058b07a7cda..b6e2e70e1290 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -891,13 +891,13 @@ transcoder_has_psr2(struct drm_i915_private *dev_priv, 
enum transcoder cpu_trans
return false;
 }
 
-static u32 intel_get_frame_time_us(const struct intel_crtc_state *cstate)
+static u32 intel_get_frame_time_us(const struct intel_crtc_state *crtc_state)
 {
-   if (!cstate->hw.active)
+   if (!crtc_state->hw.active)
return 0;
 
return DIV_ROUND_UP(1000 * 1000,
-   drm_mode_vrefresh(>hw.adjusted_mode));
+   drm_mode_vrefresh(_state->hw.adjusted_mode));
 }
 
 static void psr2_program_idle_frames(struct intel_dp *intel_dp,
-- 
2.41.0

[PATCH 6/8] drm/i915: Clean up intel_get_frame_time_us()

[Ville Syrjala]

From: Ville Syrjälä 

intel_get_frame_time_us() is never called with a NULL crtc_state so
drop the redundant check.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 6029bb71276c..0058b07a7cda 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -893,7 +893,7 @@ transcoder_has_psr2(struct drm_i915_private *dev_priv, enum 
transcoder cpu_trans
 
 static u32 intel_get_frame_time_us(const struct intel_crtc_state *cstate)
 {
-   if (!cstate || !cstate->hw.active)
+   if (!cstate->hw.active)
return 0;
 
return DIV_ROUND_UP(1000 * 1000,
-- 
2.41.0

[PATCH 3/8] drm/i915: Drop redundant NULL check

[Ville Syrjala]

From: Ville Syrjälä 

intel_bios_get_dsc_params() is only called from
gen11_dsi_dsc_compute_config() and it always passes a non-NULL
crtc_state in. Drop the redundant check.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_bios.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c 
b/drivers/gpu/drm/i915/display/intel_bios.c
index 3e7e96acb24a..aa169b0055e9 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -3475,8 +3475,7 @@ bool intel_bios_get_dsc_params(struct intel_encoder 
*encoder,
if (!devdata->dsc)
return false;
 
-   if (crtc_state)
-   fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
+   fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
 
return true;
}
-- 
2.41.0

[PATCH 5/8] drm/i915: Drop NULL fb check from intel_fb_uses_dpt()

[Ville Syrjala]

From: Ville Syrjälä 

intel_fb_uses_dpt() should not be called with a NULL fb, so
drop the check.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index 69c3cfe3120e..85dbb8a5abf3 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -771,7 +771,7 @@ bool intel_fb_modifier_uses_dpt(struct drm_i915_private 
*i915, u64 modifier)
 
 bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)
 {
-   return fb && to_i915(fb->dev)->display.params.enable_dpt &&
+   return to_i915(fb->dev)->display.params.enable_dpt &&
intel_fb_modifier_uses_dpt(to_i915(fb->dev), fb->modifier);
 }
 
-- 
2.41.0

[PATCH 4/8] drm/i915: Drop crtc NULL check from intel_crtc_active()

[Ville Syrjala]

From: Ville Syrjälä 

intel_crtc_active() is never called with a NULL crtc. Drop
the redundant NULL check.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c 
b/drivers/gpu/drm/i915/display/i9xx_wm.c
index 03e8fb6caa83..11ca9572e8b3 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -608,7 +608,7 @@ static bool intel_crtc_active(struct intel_crtc *crtc)
 * crtc->state->active once we have proper CRTC states wired up
 * for atomic.
 */
-   return crtc && crtc->active && crtc->base.primary->state->fb &&
+   return crtc->active && crtc->base.primary->state->fb &&
crtc->config->hw.adjusted_mode.crtc_clock;
 }
 
-- 
2.41.0

[PATCH 2/8] drm/i915: Streamline intel_dsc_pps_read()

[Ville Syrjala]

From: Ville Syrjälä 

intel_dsc_pps_read() is rather convoluted. Make it legible.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 21 +++--
 1 file changed, 7 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c 
b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 5f2fb702e367..17d6572f9d0a 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -812,13 +812,13 @@ void intel_dsc_disable(const struct intel_crtc_state 
*old_crtc_state)
 }
 
 static u32 intel_dsc_pps_read(struct intel_crtc_state *crtc_state, int pps,
- bool *check_equal)
+ bool *all_equal)
 {
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
i915_reg_t dsc_reg[2];
int i, vdsc_per_pipe, dsc_reg_num;
-   u32 val = 0;
+   u32 val;
 
vdsc_per_pipe = intel_dsc_get_vdsc_per_pipe(crtc_state);
dsc_reg_num = min_t(int, ARRAY_SIZE(dsc_reg), vdsc_per_pipe);
@@ -827,20 +827,13 @@ static u32 intel_dsc_pps_read(struct intel_crtc_state 
*crtc_state, int pps,
 
intel_dsc_get_pps_reg(crtc_state, pps, dsc_reg, dsc_reg_num);
 
-   if (check_equal)
-   *check_equal = true;
+   *all_equal = true;
 
-   for (i = 0; i < dsc_reg_num; i++) {
-   u32 tmp;
+   val = intel_de_read(i915, dsc_reg[0]);
 
-   tmp = intel_de_read(i915, dsc_reg[i]);
-
-   if (i == 0) {
-   val = tmp;
-   } else if (check_equal && tmp != val) {
-   *check_equal = false;
-   break;
-   } else if (!check_equal) {
+   for (i = 1; i < dsc_reg_num; i++) {
+   if (intel_de_read(i915, dsc_reg[i]) != val) {
+   *all_equal = false;
break;
}
}
-- 
2.41.0

[PATCH 1/8] drm/i915: Fix intel_atomic_setup_scalers() plane_state handling

[Ville Syrjala]

From: Ville Syrjälä 

Since the plane_state variable is declared outside the scaler_users
loop in intel_atomic_setup_scalers(), and it's never reset back to
NULL inside the loop we may end up calling intel_atomic_setup_scaler()
with a non-NULL plane state for the pipe scaling case. That is bad
because intel_atomic_setup_scaler() determines whether we are doing
plane scaling or pipe scaling based on plane_state!=NULL. The end
result is that we may miscalculate the scaler mode for pipe scaling.

The hardware becomes somewhat upset if we end up in this situation
when scanning out a planar format on a SDR plane. We end up
programming the pipe scaler into planar mode as well, and the
result is a screenfull of garbage.

Fix the situation by making sure we pass the correct plane_state==NULL
when calculating the scaler mode for pipe scaling.

Cc: sta...@vger.kernel.org
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/skl_scaler.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c 
b/drivers/gpu/drm/i915/display/skl_scaler.c
index 1e7c97243fcf..8a934bada624 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -504,7 +504,6 @@ int intel_atomic_setup_scalers(struct drm_i915_private 
*dev_priv,
 {
struct drm_plane *plane = NULL;
struct intel_plane *intel_plane;
-   struct intel_plane_state *plane_state = NULL;
struct intel_crtc_scaler_state *scaler_state =
_state->scaler_state;
struct drm_atomic_state *drm_state = crtc_state->uapi.state;
@@ -536,6 +535,7 @@ int intel_atomic_setup_scalers(struct drm_i915_private 
*dev_priv,
 
/* walkthrough scaler_users bits and start assigning scalers */
for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
+   struct intel_plane_state *plane_state = NULL;
int *scaler_id;
const char *name;
int idx, ret;
-- 
2.41.0

[PATCH 0/8] drm/i915: Drop pointless null checks and fix a scaler bug

[Ville Syrjala]

From: Ville Syrjälä 

Mostly just dropping a bunch of redundant null checks that I ran
into while playing around with __attribute__((nonnull)).

And I also ended up discovering an actual bug in the scaler code.

Ville Syrjälä (8):
  drm/i915: Fix intel_atomic_setup_scalers() plane_state handling
  drm/i915: Streamline intel_dsc_pps_read()
  drm/i915: Drop redundant NULL check
  drm/i915: Drop crtc NULL check from intel_crtc_active()
  drm/i915: Drop NULL fb check from intel_fb_uses_dpt()
  drm/i915: Clean up intel_get_frame_time_us()
  drm/i915: s/cstate/crtc_state/ in intel_get_frame_time_us()
  drm/i915/tv: Drop redundant null checks

 drivers/gpu/drm/i915/display/i9xx_wm.c|  2 +-
 drivers/gpu/drm/i915/display/intel_bios.c |  3 +--
 drivers/gpu/drm/i915/display/intel_fb.c   |  2 +-
 drivers/gpu/drm/i915/display/intel_psr.c  |  6 +++---
 drivers/gpu/drm/i915/display/intel_tv.c   |  6 --
 drivers/gpu/drm/i915/display/intel_vdsc.c | 21 +++--
 drivers/gpu/drm/i915/display/skl_scaler.c |  2 +-
 7 files changed, 14 insertions(+), 28 deletions(-)

-- 
2.41.0

[PULL] drm-intel-next

[Rodrigo Vivi]

Hi Dave and Daniel,

Here goes another pull-request towards 6.8.
We are likely going to send another one in 2 weeks,
but I'd like to get this in right now so we can
get a clean drm-xe-next on top of drm-next for our
first Xe pull request.

Thanks,
Rodrigo.

drm-intel-next-2023-12-07:
- Improve display debug msgs and other general clean-ups (Ville, Rahuul)
- PSR fixes and improvements around selective fetch (Jouni, Ville)
- Remove FBC restrictions for Xe2LPD displays (Vinod)
- Skip some timing checks on BXT/GLK DSI transcoders (Ville)
- DP MST Fixes (Ville)
- Correct the input parameter on _intel_dsb_commit (heminhong)
- Fix IP version of the display WAs (Bala)
- DGFX uses direct VBT pin mapping (Clint)
- Proper handling of bool on PIPE_CONF_CHECK macros (Jani)
- Skip state verification with TBT-ALT mod (Mika Kahona)
- General organization of display code for reusage with Xe
  (Jouni, Luca, Jani, Maarten)
- Squelch a sparse warning (Jani)
- Don't use "proxy" headers (Andy Shevchenko)
- Use devm_gpiod_get() for all GPIOs (Hans)
- Fix ADL+ tiled plane stride (Ville)
- Use octal permissions in display debugfs (Jani)

Thanks,
Rodrigo.

The following changes since commit deac453244d309ad7a94d0501eb5e0f9d8d1f1df:

  drm/i915: Fix glk+ degamma LUT conversions (2023-11-23 15:11:47 +0200)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-2023-12-07

for you to fetch changes up to 10690b8a49bceafb1badf0ad91842a359e796d8b:

  drm/i915/display: Add intel_fb_bo_framebuffer_fini (2023-12-07 17:31:02 +0200)


- Improve display debug msgs and other general clean-ups (Ville, Rahuul)
- PSR fixes and improvements around selective fetch (Jouni, Ville)
- Remove FBC restrictions for Xe2LPD displays (Vinod)
- Skip some timing checks on BXT/GLK DSI transcoders (Ville)
- DP MST Fixes (Ville)
- Correct the input parameter on _intel_dsb_commit (heminhong)
- Fix IP version of the display WAs (Bala)
- DGFX uses direct VBT pin mapping (Clint)
- Proper handling of bool on PIPE_CONF_CHECK macros (Jani)
- Skip state verification with TBT-ALT mod (Mika Kahona)
- General organization of display code for reusage with Xe
  (Jouni, Luca, Jani, Maarten)
- Squelch a sparse warning (Jani)
- Don't use "proxy" headers (Andy Shevchenko)
- Use devm_gpiod_get() for all GPIOs (Hans)
- Fix ADL+ tiled plane stride (Ville)
- Use octal permissions in display debugfs (Jani)


Andy Shevchenko (1):
  drm/i915/display: Don't use "proxy" headers

Balasubramani Vivekanandan (1):
  drm/i915/display: Fix IP version of the WAs

Clint Taylor (1):
  drm/i915/dgfx: DGFX uses direct VBT pin mapping

Hans de Goede (1):
  drm/i915/dsi: Use devm_gpiod_get() for all GPIOs

Jani Nikula (7):
  drm/i915: use PIPE_CONF_CHECK_BOOL() for bool members
  drm/i915: add bool type checks in PIPE_CONF_CHECK_*
  drm/i915/syncmap: squelch a sparse warning
  drm/i915/rpm: add rpm_to_i915() helper around container_of()
  drm/i915: use intel_connector in intel_connector_debugfs_add()
  drm/i915: pass struct intel_connector to connector debugfs fops
  drm/i915: use octal permissions in display debugfs

Jouni Högander (9):
  drm/i915/psr: Move plane sel fetch configuration into plane source files
  drm/i915/psr: Add proper handling for disabling sel fetch for planes
  drm/i915/display: split i915 specific code from intel_fbdev
  drm/i915/display: use intel_bo_to_drm_bo in intel_fbdev
  drm/i915/display: use intel_bo_to_drm_bo in intel_fb.c
  drm/i915/display: Convert intel_fb_modifier_to_tiling as non-static
  drm/i915/display: Handle invalid fb_modifier in 
intel_fb_modifier_to_tiling
  drm/i915/display: Split i915 specific code away from intel_fb.c
  drm/i915/display: Add intel_fb_bo_framebuffer_fini

Luca Coelho (1):
  drm/i915: handle uncore spinlock when not available

Maarten Lankhorst (1):
  drm/i915/display: Use i915_gem_object_get_dma_address to get dma address

Mika Kahola (1):
  drm/i915/display: Skip state verification with TBT-ALT mode

Rahul Rameshbabu (1):
  drm/i915/irq: Improve error logging for unexpected DE Misc interrupts

Ville Syrjälä (8):
  drm/i915: Stop printing pipe name as hex
  drm/i915: Move the SDP split debug spew to the correct place
  drm/i915/psr: Include some basic PSR information in the state dump
  drm/i915: Skip some timing checks on BXT/GLK DSI transcoders
  drm/i915/mst: Fix .mode_valid_ctx() return values
  drm/i915/mst: Reject modes that require the bigjoiner
  drm/i915: Clean up some DISPLAY_VER checks
  drm/i915: Fix ADL+ tiled plane stride when the POT stride is smaller than 
the original

Vinod Govindapillai (1):
  drm/i915/xe2lpd: remove the FBC restriction if PSR2 is enabled

heminhong (1):
  drm/i915: correct the input 

[PATCH] ALSA: hda/hdmi: add force-connect quirk for ASUSTeK Z170M Pro

[Kai Vehmanen]

On ASUSTeK Z170M PRO GAMING + Intel Kaby Lake system the display codec
pins are not registered properly without the force-connect quirk. The
codec will report only one pin as having external connectivity, but i915
finds all all three connectors on the system, so the two drivers are not
in sync.

Link: https://gitlab.freedesktop.org/drm/intel/-/issues/9801
Signed-off-by: Kai Vehmanen 
---
 sound/pci/hda/patch_hdmi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/sound/pci/hda/patch_hdmi.c b/sound/pci/hda/patch_hdmi.c
index 3d7f8f510ec7..8bf91fe25c65 100644
--- a/sound/pci/hda/patch_hdmi.c
+++ b/sound/pci/hda/patch_hdmi.c
@@ -1995,6 +1995,7 @@ static const struct snd_pci_quirk force_connect_list[] = {
SND_PCI_QUIRK(0x103c, 0x8715, "HP", 1),
SND_PCI_QUIRK(0x1043, 0x8694, "ASUS", 1),  /* SKL/KBL + PRIME B560M-A */
SND_PCI_QUIRK(0x1043, 0x86ae, "ASUS", 1),  /* SKL + Z170 PRO */
+   SND_PCI_QUIRK(0x1043, 0x86c7, "ASUS", 1),  /* KBL + Z170M PRO */
SND_PCI_QUIRK(0x1462, 0xec94, "MS-7C94", 1),
SND_PCI_QUIRK(0x8086, 0x2060, "Intel NUC5CPYB", 1),
SND_PCI_QUIRK(0x8086, 0x2081, "Intel NUC 10", 1),
-- 
2.43.0

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Suppress old PLL pipe_mask checks for MG/TC/TBT PLLs

[Imre Deak]

On Thu, Dec 07, 2023 at 06:06:38PM +0200, Ville Syrjälä wrote:
> On Thu, Dec 07, 2023 at 05:47:02PM +0200, Imre Deak wrote:
> > On Thu, Dec 07, 2023 at 05:24:44PM +0200, Ville Syrjälä wrote:
> > > On Thu, Dec 07, 2023 at 04:55:02PM +0200, Imre Deak wrote:
> > > > On Fri, Nov 24, 2023 at 10:27:34AM +0200, Ville Syrjala wrote:
> > > > > From: Ville Syrjälä 
> > > > > 
> > > > > TC ports have both the MG/TC and TBT PLLs selected simultanously (so
> > > > > that we can switch from MG/TC to TBT as a fallback). This doesn't play
> > > > > well with the state checker that assumes that the old PLL shouldn't
> > > > > have the pipe in its pipe_mask anymore. Suppress that check for these
> > > > > PLLs to avoid spurious WARNs when you disconnect a TC port and a
> > > > > non-disabling modeset happens before actually disabling the port.
> > > > > 
> > > > > Signed-off-by: Ville Syrjälä 
> > > > 
> > > > Looks ok to me:
> > > > Reviewed-by: Imre Deak 
> > > > 
> > > > I suppose the check would be still valid for MG PLLs, but the port
> > > > PLL stuff makes doing that cumbersome.
> > > 
> > > You mean for legacy ports?
> > 
> > Yes, I suppose in that case too, but in general the state check doesn't
> > work only if the shared_dpll in either the the old or new crtc state is
> > the TBT PLL and in the other state it's MG PLL. If the PLL in both
> > states are MG PLL the state check would be still valid, if I didn't miss
> > something.
> 
> Oh you mean switching from one MG PLL to another MG PLL?
> Yeah, that in theory we'd still want to check.
> 
> Hmm. Maybe if we flag only the TBT PLL as special and
> then skip the assert only when either the old or new PLL
> is the TBT PLL?

Yes, I guess that would work.

> > > > > ---
> > > > >  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 56 
> > > > > +--
> > > > >  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  4 ++
> > > > >  2 files changed, 42 insertions(+), 18 deletions(-)
> > > > > 
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> > > > > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > > > index d86b02de2923..5c6c4fc50b1d 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > > > @@ -4023,11 +4023,16 @@ static const struct intel_shared_dpll_funcs 
> > > > > mg_pll_funcs = {
> > > > >  static const struct dpll_info icl_plls[] = {
> > > > >   { .name = "DPLL 0", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_DPLL0, },
> > > > >   { .name = "DPLL 1", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_DPLL1, },
> > > > > - { .name = "TBT PLL", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_TBTPLL, },
> > > > > - { .name = "MG PLL 1", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL1, },
> > > > > - { .name = "MG PLL 2", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL2, },
> > > > > - { .name = "MG PLL 3", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL3, },
> > > > > - { .name = "MG PLL 4", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL4, },
> > > > > + { .name = "TBT PLL", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_TBTPLL,
> > > > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > > + { .name = "MG PLL 1", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL1,
> > > > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > > + { .name = "MG PLL 2", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL2,
> > > > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > > + { .name = "MG PLL 3", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL3,
> > > > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > > + { .name = "MG PLL 4", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL4,
> > > > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > >   {}
> > > > >  };
> > > > >  
> > > > > @@ -4068,13 +4073,20 @@ static const struct intel_shared_dpll_funcs 
> > > > > dkl_pll_funcs = {
> > > > >  static const struct dpll_info tgl_plls[] = {
> > > > >   { .name = "DPLL 0", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_DPLL0, },
> > > > >   { .name = "DPLL 1", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_DPLL1, },
> > > > > - { .name = "TBT PLL", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_TBTPLL, },
> > > > > - { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL1, },
> > > > > - { .name = "TC PLL 2", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL2, },
> > > > > - { .name = "TC PLL 3", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL3, },
> > > > > - { .name = "TC PLL 4", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_ICL_MGPLL4, },
> > > > > - { .name = "TC PLL 5", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_TGL_MGPLL5, },
> > > > > - { .name = "TC PLL 6", .funcs = _pll_funcs, .id = 
> > > > > DPLL_ID_TGL_MGPLL6, },
> > > > 

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Suppress old PLL pipe_mask checks for MG/TC/TBT PLLs

[Ville Syrjälä]

On Thu, Dec 07, 2023 at 05:47:02PM +0200, Imre Deak wrote:
> On Thu, Dec 07, 2023 at 05:24:44PM +0200, Ville Syrjälä wrote:
> > On Thu, Dec 07, 2023 at 04:55:02PM +0200, Imre Deak wrote:
> > > On Fri, Nov 24, 2023 at 10:27:34AM +0200, Ville Syrjala wrote:
> > > > From: Ville Syrjälä 
> > > > 
> > > > TC ports have both the MG/TC and TBT PLLs selected simultanously (so
> > > > that we can switch from MG/TC to TBT as a fallback). This doesn't play
> > > > well with the state checker that assumes that the old PLL shouldn't
> > > > have the pipe in its pipe_mask anymore. Suppress that check for these
> > > > PLLs to avoid spurious WARNs when you disconnect a TC port and a
> > > > non-disabling modeset happens before actually disabling the port.
> > > > 
> > > > Signed-off-by: Ville Syrjälä 
> > > 
> > > Looks ok to me:
> > > Reviewed-by: Imre Deak 
> > > 
> > > I suppose the check would be still valid for MG PLLs, but the port
> > > PLL stuff makes doing that cumbersome.
> > 
> > You mean for legacy ports?
> 
> Yes, I suppose in that case too, but in general the state check doesn't
> work only if the shared_dpll in either the the old or new crtc state is
> the TBT PLL and in the other state it's MG PLL. If the PLL in both
> states are MG PLL the state check would be still valid, if I didn't miss
> something.

Oh you mean switching from one MG PLL to another MG PLL?
Yeah, that in theory we'd still want to check.

Hmm. Maybe if we flag only the TBT PLL as special and
then skip the assert only when either the old or new PLL
is the TBT PLL?

> 
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 56 +--
> > > >  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  4 ++
> > > >  2 files changed, 42 insertions(+), 18 deletions(-)
> > > > 
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> > > > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > > index d86b02de2923..5c6c4fc50b1d 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > > @@ -4023,11 +4023,16 @@ static const struct intel_shared_dpll_funcs 
> > > > mg_pll_funcs = {
> > > >  static const struct dpll_info icl_plls[] = {
> > > > { .name = "DPLL 0", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_DPLL0, },
> > > > { .name = "DPLL 1", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_DPLL1, },
> > > > -   { .name = "TBT PLL", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_TBTPLL, },
> > > > -   { .name = "MG PLL 1", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL1, },
> > > > -   { .name = "MG PLL 2", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL2, },
> > > > -   { .name = "MG PLL 3", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL3, },
> > > > -   { .name = "MG PLL 4", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL4, },
> > > > +   { .name = "TBT PLL", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_TBTPLL,
> > > > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > +   { .name = "MG PLL 1", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL1,
> > > > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > +   { .name = "MG PLL 2", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL2,
> > > > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > +   { .name = "MG PLL 3", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL3,
> > > > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > +   { .name = "MG PLL 4", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL4,
> > > > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > {}
> > > >  };
> > > >  
> > > > @@ -4068,13 +4073,20 @@ static const struct intel_shared_dpll_funcs 
> > > > dkl_pll_funcs = {
> > > >  static const struct dpll_info tgl_plls[] = {
> > > > { .name = "DPLL 0", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_DPLL0, },
> > > > { .name = "DPLL 1", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_DPLL1, },
> > > > -   { .name = "TBT PLL", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_TBTPLL, },
> > > > -   { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL1, },
> > > > -   { .name = "TC PLL 2", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL2, },
> > > > -   { .name = "TC PLL 3", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL3, },
> > > > -   { .name = "TC PLL 4", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL4, },
> > > > -   { .name = "TC PLL 5", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_TGL_MGPLL5, },
> > > > -   { .name = "TC PLL 6", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_TGL_MGPLL6, },
> > > > +   { .name = "TBT PLL", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_TBTPLL,
> > > > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > > +   { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> > > > DPLL_ID_ICL_MGPLL1,
> > > > +   

✓ Fi.CI.BAT: success for drm/edid: also call add modes in EDID connector update fallback (rev2)

[Patchwork]

== Series Details ==

Series: drm/edid: also call add modes in EDID connector update fallback (rev2)
URL   : https://patchwork.freedesktop.org/series/127486/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13993 -> Patchwork_127486v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v2/index.html

Participating hosts (38 -> 35)
--

  Missing(3): bat-dg2-8 fi-snb-2520m fi-pnv-d510 

Known issues


  Here are the changes found in Patchwork_127486v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s0@lmem0:
- bat-dg2-9:  [PASS][1] -> [INCOMPLETE][2] ([i915#9275])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13993/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v2/bat-dg2-9/igt@gem_exec_suspend@basic...@lmem0.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [PASS][3] -> [FAIL][4] ([IGT#3])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13993/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v2/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][5] ([i915#8668])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v2/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.html

  
 Possible fixes 

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][6] ([i915#8668]) -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13993/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v2/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  
  [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275


Build changes
-

  * Linux: CI_DRM_13993 -> Patchwork_127486v2

  CI-20190529: 20190529
  CI_DRM_13993: e2049c65f1620526f113f6f88f7a274d030f622b @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7626: 154b7288552cd7ed3033f8ef396e88d0bd1b7646 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_127486v2: e2049c65f1620526f113f6f88f7a274d030f622b @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

b900ac1c2ef5 drm/edid: also call add modes in EDID connector update fallback

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v2/index.html

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Suppress old PLL pipe_mask checks for MG/TC/TBT PLLs

[Imre Deak]

On Thu, Dec 07, 2023 at 05:24:44PM +0200, Ville Syrjälä wrote:
> On Thu, Dec 07, 2023 at 04:55:02PM +0200, Imre Deak wrote:
> > On Fri, Nov 24, 2023 at 10:27:34AM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä 
> > > 
> > > TC ports have both the MG/TC and TBT PLLs selected simultanously (so
> > > that we can switch from MG/TC to TBT as a fallback). This doesn't play
> > > well with the state checker that assumes that the old PLL shouldn't
> > > have the pipe in its pipe_mask anymore. Suppress that check for these
> > > PLLs to avoid spurious WARNs when you disconnect a TC port and a
> > > non-disabling modeset happens before actually disabling the port.
> > > 
> > > Signed-off-by: Ville Syrjälä 
> > 
> > Looks ok to me:
> > Reviewed-by: Imre Deak 
> > 
> > I suppose the check would be still valid for MG PLLs, but the port
> > PLL stuff makes doing that cumbersome.
> 
> You mean for legacy ports?

Yes, I suppose in that case too, but in general the state check doesn't
work only if the shared_dpll in either the the old or new crtc state is
the TBT PLL and in the other state it's MG PLL. If the PLL in both
states are MG PLL the state check would be still valid, if I didn't miss
something.

> > > ---
> > >  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 56 +--
> > >  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  4 ++
> > >  2 files changed, 42 insertions(+), 18 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> > > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > index d86b02de2923..5c6c4fc50b1d 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > @@ -4023,11 +4023,16 @@ static const struct intel_shared_dpll_funcs 
> > > mg_pll_funcs = {
> > >  static const struct dpll_info icl_plls[] = {
> > >   { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> > > },
> > >   { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> > > },
> > > - { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> > > },
> > > - { .name = "MG PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1, 
> > > },
> > > - { .name = "MG PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2, 
> > > },
> > > - { .name = "MG PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3, 
> > > },
> > > - { .name = "MG PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4, 
> > > },
> > > + { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "MG PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "MG PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "MG PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "MG PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > >   {}
> > >  };
> > >  
> > > @@ -4068,13 +4073,20 @@ static const struct intel_shared_dpll_funcs 
> > > dkl_pll_funcs = {
> > >  static const struct dpll_info tgl_plls[] = {
> > >   { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> > > },
> > >   { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> > > },
> > > - { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> > > },
> > > - { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> > > DPLL_ID_ICL_MGPLL1, },
> > > - { .name = "TC PLL 2", .funcs = _pll_funcs, .id = 
> > > DPLL_ID_ICL_MGPLL2, },
> > > - { .name = "TC PLL 3", .funcs = _pll_funcs, .id = 
> > > DPLL_ID_ICL_MGPLL3, },
> > > - { .name = "TC PLL 4", .funcs = _pll_funcs, .id = 
> > > DPLL_ID_ICL_MGPLL4, },
> > > - { .name = "TC PLL 5", .funcs = _pll_funcs, .id = 
> > > DPLL_ID_TGL_MGPLL5, },
> > > - { .name = "TC PLL 6", .funcs = _pll_funcs, .id = 
> > > DPLL_ID_TGL_MGPLL6, },
> > > + { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "TC PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "TC PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "TC PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "TC PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "TC PLL 5", .funcs = _pll_funcs, .id = DPLL_ID_TGL_MGPLL5,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > > + { .name = "TC PLL 6", .funcs = _pll_funcs, .id = DPLL_ID_TGL_MGPLL6,
> > > +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > >   {}
> > >  };
> > >  
> > > 

Re: [PATCH] drm/i915/display: Add intel_fb_bo_framebuffer_fini

[Hogander, Jouni]

On Thu, 2023-12-07 at 10:34 +0200, Jouni Högander wrote:
> Xe needs intel_fb_bo_framebuffer_fini for taking care of unpinning
> the fb
> and taking reference.  In i915 this can be empty.
> 
> Also move intel_frontbuffer_get to be done after
> intel_fb_bo_framebuffer_init to have reasonable sequences:
> 
> intel_fb_bo_framebuffer_init
> intel_frontbuffer_get
> ...
> intel_frontbuffer_put
> intel_fb_bo_framebuffer_fini
> 
> v2: Empty function instead of define
> 
> Signed-off-by: Jouni Högander 

I got rb tag from Maarten in intel...@lists.freedesktop.org:

Reviewed-by: Maarten Lankhorst 

This is now pushed to drm-intel-next.

> ---
>  drivers/gpu/drm/i915/display/intel_fb.c    | 32 +---
> --
>  drivers/gpu/drm/i915/display/intel_fb_bo.c |  5 
>  drivers/gpu/drm/i915/display/intel_fb_bo.h |  2 ++
>  3 files changed, 26 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c
> b/drivers/gpu/drm/i915/display/intel_fb.c
> index ab634a4c86d1..69c3cfe3120e 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -1889,6 +1889,8 @@ static void
> intel_user_framebuffer_destroy(struct drm_framebuffer *fb)
>  
> intel_frontbuffer_put(intel_fb->frontbuffer);
>  
> +   intel_fb_bo_framebuffer_fini(intel_fb_obj(fb));
> +
> kfree(intel_fb);
>  }
>  
> @@ -1989,13 +1991,15 @@ int intel_framebuffer_init(struct
> intel_framebuffer *intel_fb,
> int ret = -EINVAL;
> int i;
>  
> -   intel_fb->frontbuffer = intel_frontbuffer_get(obj);
> -   if (!intel_fb->frontbuffer)
> -   return -ENOMEM;
> -
> ret = intel_fb_bo_framebuffer_init(intel_fb, obj, mode_cmd);
> if (ret)
> +   return ret;
> +
> +   intel_fb->frontbuffer = intel_frontbuffer_get(obj);
> +   if (!intel_fb->frontbuffer) {
> +   ret = -ENOMEM;
> goto err;
> +   }
>  
> ret = -EINVAL;
> if (!drm_any_plane_has_format(_priv->drm,
> @@ -2004,7 +2008,7 @@ int intel_framebuffer_init(struct
> intel_framebuffer *intel_fb,
> drm_dbg_kms(_priv->drm,
>     "unsupported pixel format %p4cc /
> modifier 0x%llx\n",
>     _cmd->pixel_format, mode_cmd-
> >modifier[0]);
> -   goto err;
> +   goto err_frontbuffer_put;
> }
>  
> max_stride = intel_fb_max_stride(dev_priv, mode_cmd-
> >pixel_format,
> @@ -2015,7 +2019,7 @@ int intel_framebuffer_init(struct
> intel_framebuffer *intel_fb,
>     mode_cmd->modifier[0] !=
> DRM_FORMAT_MOD_LINEAR ?
>     "tiled" : "linear",
>     mode_cmd->pitches[0], max_stride);
> -   goto err;
> +   goto err_frontbuffer_put;
> }
>  
> /* FIXME need to adjust LINOFF/TILEOFF accordingly. */
> @@ -2023,7 +2027,7 @@ int intel_framebuffer_init(struct
> intel_framebuffer *intel_fb,
> drm_dbg_kms(_priv->drm,
>     "plane 0 offset (0x%08x) must be 0\n",
>     mode_cmd->offsets[0]);
> -   goto err;
> +   goto err_frontbuffer_put;
> }
>  
> drm_helper_mode_fill_fb_struct(_priv->drm, fb, mode_cmd);
> @@ -2034,7 +2038,7 @@ int intel_framebuffer_init(struct
> intel_framebuffer *intel_fb,
> if (mode_cmd->handles[i] != mode_cmd->handles[0]) {
> drm_dbg_kms(_priv->drm, "bad plane %d
> handle\n",
>     i);
> -   goto err;
> +   goto err_frontbuffer_put;
> }
>  
> stride_alignment = intel_fb_stride_alignment(fb, i);
> @@ -2042,7 +2046,7 @@ int intel_framebuffer_init(struct
> intel_framebuffer *intel_fb,
> drm_dbg_kms(_priv->drm,
>     "plane %d pitch (%d) must be at
> least %u byte aligned\n",
>     i, fb->pitches[i],
> stride_alignment);
> -   goto err;
> +   goto err_frontbuffer_put;
> }
>  
> if (intel_fb_is_gen12_ccs_aux_plane(fb, i)) {
> @@ -2053,7 +2057,7 @@ int intel_framebuffer_init(struct
> intel_framebuffer *intel_fb,
>     "ccs aux plane %d pitch
> (%d) must be %d\n",
>     i,
>     fb->pitches[i],
> ccs_aux_stride);
> -   goto err;
> +   goto err_frontbuffer_put;
> }
> }
>  
> @@ -2062,7 +2066,7 @@ int intel_framebuffer_init(struct
> intel_framebuffer *intel_fb,
>  
> ret = intel_fill_fb_info(dev_priv, intel_fb);
> if (ret)
> -   goto err;
> +   goto 

Re: [PATCH] drm/i915: Fix remapped stride with CCS on ADL+

[Imre Deak]

On Thu, Dec 07, 2023 at 05:20:51PM +0200, Ville Syrjälä wrote:
> On Thu, Dec 07, 2023 at 04:51:30PM +0200, Imre Deak wrote:
> > On Tue, Dec 05, 2023 at 08:03:08PM +0200, Ville Syrjala wrote:
> > > From: Ville Syrjälä 
> > > 
> > > On ADL+ the hardware automagically calculates the CCS AUX surface
> > > stride from the main surface stride, so when remapping we can't
> > > really play a lot of tricks with the main surface stride, or else
> > > the AUX surface stride would get miscalculated and no longer
> > > match the actual data layout in memory.
> > > 
> > > Supposedly we could remap in 256 main surface tile units
> > > (AUX page(4096)/cachline(64)*4(4x1 main surface tiles per
> > > AUX cacheline)=256 main surface tiles), but the extra complexity
> > > is probably not worth the hassle.
> > > 
> > > So let's just make sure our mapping stride is calculated from
> > > the full framebuffer stride (instead of the framebuffer width).
> > > This way the stride we program into PLANE_STRIDE will be the
> > > original framebuffer stride, and thus there will be no change
> > > to the AUX stride/layout.
> > > 
> > > Cc: Imre Deak 
> > > Cc: Juha-Pekka Heikkila 
> > > Signed-off-by: Ville Syrjälä 
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_fb.c | 16 ++--
> > >  1 file changed, 14 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> > > b/drivers/gpu/drm/i915/display/intel_fb.c
> > > index ab634a4c86d1..9f35bdce3eb8 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > > @@ -1509,8 +1509,20 @@ static u32 calc_plane_remap_info(const struct 
> > > intel_framebuffer *fb, int color_p
> > >  
> > >   size += remap_info->size;
> > >   } else {
> > > - unsigned int dst_stride = 
> > > plane_view_dst_stride_tiles(fb, color_plane,
> > > -   
> > > remap_info->width);
> > > + unsigned int dst_stride;
> > > +
> > > + /*
> > > +  * The hardware automagically calculates the CCS AUX 
> > > surface
> > > +  * stride from the main surface stride so can't really 
> > > remap a
> > > +  * smaller subset (unless we'd remap in whole AUX page 
> > > units).
> > > +  */
> > > + if (intel_fb_needs_pot_stride_remap(fb) &&
> > 
> > This fix also applies at least to all !FLAT_CSS platforms. Since
> > the stride remapping is disabled anyway on all platforms for CCS
> > modifiers, the same should be done here as well?
> 
> We'll never get here for the ccs+!pot_stride_remap cases. So
> I suppose it doesn't really matter how we express this.

Ah right, I missed that point.

> But I think this check is the most correct one in the sense that
> if we did want to come up with a way to do CCS remapping in the
> !pot_stride_remap cases this simple approach wouldn't work anyway.
> We'd end up here exactly because the original stride was too big
> to begin with, so using to the original stride would solve
> absolutely nothing.

Yes, in that case the AUX surface should be tweaked instead.
The patch looks ok:
Reviewed-by: Imre Deak 

> 
> > 
> > > + intel_fb_is_ccs_modifier(fb->base.modifier))
> > > + dst_stride = remap_info->src_stride;
> > > + else
> > > + dst_stride = remap_info->width;
> > > +
> > > + dst_stride = plane_view_dst_stride_tiles(fb, 
> > > color_plane, dst_stride);
> > >  
> > >   assign_chk_ovf(i915, remap_info->dst_stride, 
> > > dst_stride);
> > >   color_plane_info->mapping_stride = dst_stride *
> > > -- 
> > > 2.41.0
> > > 
> 
> -- 
> Ville Syrjälä
> Intel

✗ Fi.CI.BAT: failure for drm/i915/guc: Create the guc_to_i915() wrapper (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Create the guc_to_i915() wrapper (rev4)
URL   : https://patchwork.freedesktop.org/series/124686/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13993 -> Patchwork_124686v4


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_124686v4 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_124686v4, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v4/index.html

Participating hosts (38 -> 34)
--

  Missing(4): bat-dg2-8 bat-mtlp-8 fi-snb-2520m bat-dg1-5 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_124686v4:

### IGT changes ###

 Possible regressions 

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-a-dp-5:
- bat-adlp-11:[PASS][1] -> [DMESG-WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13993/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-x...@pipe-a-dp-5.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v4/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-x...@pipe-a-dp-5.html

  
Known issues


  Here are the changes found in Patchwork_124686v4 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_exec_suspend@basic-s3@smem:
- fi-rkl-11600:   [PASS][3] -> [FAIL][4] ([fdo#103375])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13993/fi-rkl-11600/igt@gem_exec_suspend@basic...@smem.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v4/fi-rkl-11600/igt@gem_exec_suspend@basic...@smem.html

  
  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375


Build changes
-

  * Linux: CI_DRM_13993 -> Patchwork_124686v4

  CI-20190529: 20190529
  CI_DRM_13993: e2049c65f1620526f113f6f88f7a274d030f622b @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7626: 154b7288552cd7ed3033f8ef396e88d0bd1b7646 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_124686v4: e2049c65f1620526f113f6f88f7a274d030f622b @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

1114d4793ae4 drm/i915/guc: Create the guc_to_i915() wrapper

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124686v4/index.html

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Suppress old PLL pipe_mask checks for MG/TC/TBT PLLs

[Ville Syrjälä]

On Thu, Dec 07, 2023 at 04:55:02PM +0200, Imre Deak wrote:
> On Fri, Nov 24, 2023 at 10:27:34AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä 
> > 
> > TC ports have both the MG/TC and TBT PLLs selected simultanously (so
> > that we can switch from MG/TC to TBT as a fallback). This doesn't play
> > well with the state checker that assumes that the old PLL shouldn't
> > have the pipe in its pipe_mask anymore. Suppress that check for these
> > PLLs to avoid spurious WARNs when you disconnect a TC port and a
> > non-disabling modeset happens before actually disabling the port.
> > 
> > Signed-off-by: Ville Syrjälä 
> 
> Looks ok to me:
> Reviewed-by: Imre Deak 
> 
> I suppose the check would be still valid for MG PLLs, but the port
> PLL stuff makes doing that cumbersome.

You mean for legacy ports?

> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 56 +--
> >  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  4 ++
> >  2 files changed, 42 insertions(+), 18 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > index d86b02de2923..5c6c4fc50b1d 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > @@ -4023,11 +4023,16 @@ static const struct intel_shared_dpll_funcs 
> > mg_pll_funcs = {
> >  static const struct dpll_info icl_plls[] = {
> > { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> > },
> > { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> > },
> > -   { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> > },
> > -   { .name = "MG PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1, 
> > },
> > -   { .name = "MG PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2, 
> > },
> > -   { .name = "MG PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3, 
> > },
> > -   { .name = "MG PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4, 
> > },
> > +   { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "MG PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "MG PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "MG PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "MG PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > {}
> >  };
> >  
> > @@ -4068,13 +4073,20 @@ static const struct intel_shared_dpll_funcs 
> > dkl_pll_funcs = {
> >  static const struct dpll_info tgl_plls[] = {
> > { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> > },
> > { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> > },
> > -   { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> > },
> > -   { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> > DPLL_ID_ICL_MGPLL1, },
> > -   { .name = "TC PLL 2", .funcs = _pll_funcs, .id = 
> > DPLL_ID_ICL_MGPLL2, },
> > -   { .name = "TC PLL 3", .funcs = _pll_funcs, .id = 
> > DPLL_ID_ICL_MGPLL3, },
> > -   { .name = "TC PLL 4", .funcs = _pll_funcs, .id = 
> > DPLL_ID_ICL_MGPLL4, },
> > -   { .name = "TC PLL 5", .funcs = _pll_funcs, .id = 
> > DPLL_ID_TGL_MGPLL5, },
> > -   { .name = "TC PLL 6", .funcs = _pll_funcs, .id = 
> > DPLL_ID_TGL_MGPLL6, },
> > +   { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "TC PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "TC PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "TC PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "TC PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "TC PLL 5", .funcs = _pll_funcs, .id = DPLL_ID_TGL_MGPLL5,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > +   { .name = "TC PLL 6", .funcs = _pll_funcs, .id = DPLL_ID_TGL_MGPLL6,
> > + .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> > {}
> >  };
> >  
> > @@ -4141,11 +4153,16 @@ static const struct intel_dpll_mgr adls_pll_mgr = {
> >  static const struct dpll_info adlp_plls[] = {
> > { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> > },
> > { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> > },
> > -   { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> > },
> > -   { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> > DPLL_ID_ICL_MGPLL1, },
> > -   { 

Re: [PATCH] drm/i915: Fix remapped stride with CCS on ADL+

[Ville Syrjälä]

On Thu, Dec 07, 2023 at 04:51:30PM +0200, Imre Deak wrote:
> On Tue, Dec 05, 2023 at 08:03:08PM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä 
> > 
> > On ADL+ the hardware automagically calculates the CCS AUX surface
> > stride from the main surface stride, so when remapping we can't
> > really play a lot of tricks with the main surface stride, or else
> > the AUX surface stride would get miscalculated and no longer
> > match the actual data layout in memory.
> > 
> > Supposedly we could remap in 256 main surface tile units
> > (AUX page(4096)/cachline(64)*4(4x1 main surface tiles per
> > AUX cacheline)=256 main surface tiles), but the extra complexity
> > is probably not worth the hassle.
> > 
> > So let's just make sure our mapping stride is calculated from
> > the full framebuffer stride (instead of the framebuffer width).
> > This way the stride we program into PLANE_STRIDE will be the
> > original framebuffer stride, and thus there will be no change
> > to the AUX stride/layout.
> > 
> > Cc: Imre Deak 
> > Cc: Juha-Pekka Heikkila 
> > Signed-off-by: Ville Syrjälä 
> > ---
> >  drivers/gpu/drm/i915/display/intel_fb.c | 16 ++--
> >  1 file changed, 14 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> > b/drivers/gpu/drm/i915/display/intel_fb.c
> > index ab634a4c86d1..9f35bdce3eb8 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fb.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> > @@ -1509,8 +1509,20 @@ static u32 calc_plane_remap_info(const struct 
> > intel_framebuffer *fb, int color_p
> >  
> > size += remap_info->size;
> > } else {
> > -   unsigned int dst_stride = 
> > plane_view_dst_stride_tiles(fb, color_plane,
> > - 
> > remap_info->width);
> > +   unsigned int dst_stride;
> > +
> > +   /*
> > +* The hardware automagically calculates the CCS AUX 
> > surface
> > +* stride from the main surface stride so can't really 
> > remap a
> > +* smaller subset (unless we'd remap in whole AUX page 
> > units).
> > +*/
> > +   if (intel_fb_needs_pot_stride_remap(fb) &&
> 
> This fix also applies at least to all !FLAT_CSS platforms. Since
> the stride remapping is disabled anyway on all platforms for CCS
> modifiers, the same should be done here as well?

We'll never get here for the ccs+!pot_stride_remap cases. So
I suppose it doesn't really matter how we express this.

But I think this check is the most correct one in the sense that
if we did want to come up with a way to do CCS remapping in the
!pot_stride_remap cases this simple approach wouldn't work anyway.
We'd end up here exactly because the original stride was too big
to begin with, so using to the original stride would solve
absolutely nothing.

> 
> > +   intel_fb_is_ccs_modifier(fb->base.modifier))
> > +   dst_stride = remap_info->src_stride;
> > +   else
> > +   dst_stride = remap_info->width;
> > +
> > +   dst_stride = plane_view_dst_stride_tiles(fb, 
> > color_plane, dst_stride);
> >  
> > assign_chk_ovf(i915, remap_info->dst_stride, 
> > dst_stride);
> > color_plane_info->mapping_stride = dst_stride *
> > -- 
> > 2.41.0
> > 

-- 
Ville Syrjälä
Intel

✗ Fi.CI.SPARSE: warning for drm/i915/guc: Create the guc_to_i915() wrapper (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Create the guc_to_i915() wrapper (rev4)
URL   : https://patchwork.freedesktop.org/series/124686/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Suppress old PLL pipe_mask checks for MG/TC/TBT PLLs

[Imre Deak]

On Fri, Nov 24, 2023 at 10:27:34AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> TC ports have both the MG/TC and TBT PLLs selected simultanously (so
> that we can switch from MG/TC to TBT as a fallback). This doesn't play
> well with the state checker that assumes that the old PLL shouldn't
> have the pipe in its pipe_mask anymore. Suppress that check for these
> PLLs to avoid spurious WARNs when you disconnect a TC port and a
> non-disabling modeset happens before actually disabling the port.
> 
> Signed-off-by: Ville Syrjälä 

Looks ok to me:
Reviewed-by: Imre Deak 

I suppose the check would be still valid for MG PLLs, but the port
PLL stuff makes doing that cumbersome.

> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 56 +--
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  4 ++
>  2 files changed, 42 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index d86b02de2923..5c6c4fc50b1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -4023,11 +4023,16 @@ static const struct intel_shared_dpll_funcs 
> mg_pll_funcs = {
>  static const struct dpll_info icl_plls[] = {
>   { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> },
>   { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> },
> - { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> },
> - { .name = "MG PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1, 
> },
> - { .name = "MG PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2, 
> },
> - { .name = "MG PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3, 
> },
> - { .name = "MG PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4, 
> },
> + { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "MG PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "MG PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "MG PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "MG PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
>   {}
>  };
>  
> @@ -4068,13 +4073,20 @@ static const struct intel_shared_dpll_funcs 
> dkl_pll_funcs = {
>  static const struct dpll_info tgl_plls[] = {
>   { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> },
>   { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> },
> - { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> },
> - { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL1, },
> - { .name = "TC PLL 2", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL2, },
> - { .name = "TC PLL 3", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL3, },
> - { .name = "TC PLL 4", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL4, },
> - { .name = "TC PLL 5", .funcs = _pll_funcs, .id = 
> DPLL_ID_TGL_MGPLL5, },
> - { .name = "TC PLL 6", .funcs = _pll_funcs, .id = 
> DPLL_ID_TGL_MGPLL6, },
> + { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 5", .funcs = _pll_funcs, .id = DPLL_ID_TGL_MGPLL5,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 6", .funcs = _pll_funcs, .id = DPLL_ID_TGL_MGPLL6,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
>   {}
>  };
>  
> @@ -4141,11 +4153,16 @@ static const struct intel_dpll_mgr adls_pll_mgr = {
>  static const struct dpll_info adlp_plls[] = {
>   { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> },
>   { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> },
> - { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> },
> - { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL1, },
> - { .name = "TC PLL 2", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL2, },
> - { .name = "TC PLL 3", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL3, },
> - { .name = "TC PLL 4", .funcs = _pll_funcs, 

Re: [PATCH] drm/i915: Fix remapped stride with CCS on ADL+

[Imre Deak]

On Tue, Dec 05, 2023 at 08:03:08PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> On ADL+ the hardware automagically calculates the CCS AUX surface
> stride from the main surface stride, so when remapping we can't
> really play a lot of tricks with the main surface stride, or else
> the AUX surface stride would get miscalculated and no longer
> match the actual data layout in memory.
> 
> Supposedly we could remap in 256 main surface tile units
> (AUX page(4096)/cachline(64)*4(4x1 main surface tiles per
> AUX cacheline)=256 main surface tiles), but the extra complexity
> is probably not worth the hassle.
> 
> So let's just make sure our mapping stride is calculated from
> the full framebuffer stride (instead of the framebuffer width).
> This way the stride we program into PLANE_STRIDE will be the
> original framebuffer stride, and thus there will be no change
> to the AUX stride/layout.
> 
> Cc: Imre Deak 
> Cc: Juha-Pekka Heikkila 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/display/intel_fb.c | 16 ++--
>  1 file changed, 14 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
> b/drivers/gpu/drm/i915/display/intel_fb.c
> index ab634a4c86d1..9f35bdce3eb8 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -1509,8 +1509,20 @@ static u32 calc_plane_remap_info(const struct 
> intel_framebuffer *fb, int color_p
>  
>   size += remap_info->size;
>   } else {
> - unsigned int dst_stride = 
> plane_view_dst_stride_tiles(fb, color_plane,
> -   
> remap_info->width);
> + unsigned int dst_stride;
> +
> + /*
> +  * The hardware automagically calculates the CCS AUX 
> surface
> +  * stride from the main surface stride so can't really 
> remap a
> +  * smaller subset (unless we'd remap in whole AUX page 
> units).
> +  */
> + if (intel_fb_needs_pot_stride_remap(fb) &&

This fix also applies at least to all !FLAT_CSS platforms. Since
the stride remapping is disabled anyway on all platforms for CCS
modifiers, the same should be done here as well?

> + intel_fb_is_ccs_modifier(fb->base.modifier))
> + dst_stride = remap_info->src_stride;
> + else
> + dst_stride = remap_info->width;
> +
> + dst_stride = plane_view_dst_stride_tiles(fb, 
> color_plane, dst_stride);
>  
>   assign_chk_ovf(i915, remap_info->dst_stride, 
> dst_stride);
>   color_plane_info->mapping_stride = dst_stride *
> -- 
> 2.41.0
> 

Re: [Intel-gfx] [PATCH 1/2] drm/i915: Stop accessing crtc->state from the flip done irq

[Ville Syrjälä]

On Tue, Dec 05, 2023 at 11:16:58PM +, Murthy, Arun R wrote:
> 
> > -Original Message-
> > From: Intel-gfx  On Behalf Of Ville
> > Syrjälä
> > Sent: Tuesday, November 21, 2023 7:21 PM
> > To: intel-gfx@lists.freedesktop.org
> > Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: Stop accessing crtc->state 
> > from
> > the flip done irq
> > 
> > On Thu, Sep 28, 2023 at 06:24:49PM +0300, Ville Syrjala wrote:
> > > From: Ville Syrjälä 
> > >
> > > Assuming crtc->state is pointing at the correct thing for the async
> > > flip commit is nonsense. If we had already queued up multiple commits
> > > this would point at the very lates crtc state even if the older
> > > commits hadn't even happened yet.
> > >
> > > Instead properly stage/arm the event like we do for async flips.
> > > Since we don't need to arm multiple of these at the same time we don't
> > > need a list like the normal vblank even processing uses.
> > >
> > > Signed-off-by: Ville Syrjälä 
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_crtc.c  | 9 -
> > >  drivers/gpu/drm/i915/display/intel_display_irq.c   | 9 -
> > >  drivers/gpu/drm/i915/display/intel_display_types.h | 3 +++
> > >  3 files changed, 15 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
> > > b/drivers/gpu/drm/i915/display/intel_crtc.c
> > > index 1fd068e6e26c..8a84a31c7b48 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_crtc.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_crtc.c
> > > @@ -553,8 +553,15 @@ void intel_pipe_update_start(struct
> > > intel_atomic_state *state,
> > >
> > >   intel_psr_lock(new_crtc_state);
> > >
> > > - if (new_crtc_state->do_async_flip)
> > > + if (new_crtc_state->do_async_flip) {
> > > + spin_lock_irq(>base.dev->event_lock);
> 
> 
> Would it be better to use irqsave since we are dealing with events.

One uses irqsave/restore when the we must protect against irq handlers,
and the code can be called both with irqs enabled and irqs disabled.
Here we are always called with irqs enabled, so the save/restore would
be pointless.

> 
> > > + /* arm the event for the flip done irq handler */
> > > + crtc->flip_done_event = new_crtc_state->uapi.event;
> > > + spin_unlock_irq(>base.dev->event_lock);
> > > +
> > > + new_crtc_state->uapi.event = NULL;
> > >   return;
> > > + }
> > >
> > >   if (intel_crtc_needs_vblank_work(new_crtc_state))
> > >   intel_crtc_vblank_work_init(new_crtc_state);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > > b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > > index bff4a76310c0..d3df615f0e48 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > > @@ -340,16 +340,15 @@ static void flip_done_handler(struct
> > drm_i915_private *i915,
> > > enum pipe pipe)
> > >  {
> > >   struct intel_crtc *crtc = intel_crtc_for_pipe(i915, pipe);
> > > - struct drm_crtc_state *crtc_state = crtc->base.state;
> > > - struct drm_pending_vblank_event *e = crtc_state->event;
> > >   struct drm_device *dev = >drm;
> > >   unsigned long irqflags;
> > >
> > >   spin_lock_irqsave(>event_lock, irqflags);
> > >
> > > - crtc_state->event = NULL;
> > > -
> > > - drm_crtc_send_vblank_event(>base, e);
> > > + if (crtc->flip_done_event) {
> > > + drm_crtc_send_vblank_event(>base, crtc-
> > >flip_done_event);
> > > + crtc->flip_done_event = NULL;
> > > + }
> > 
> > I just observed an oops here due to e==NULL with the current code.
> > I *think* I've seen it once before as well. Pstore also caught what seemed 
> > to
> > some kind of spurious DE interrupt, which might explain the oops. But not
> > really sure what happened as the machine died before I could poke at it 
> > more.
> > 
> 
> Earlier the event was set to NULL and then drm_crtc_send_vblank_event() was 
> called.

The question is "how was this called when the event was NULL?".

The possible answers are:
- spurious flip done irq
- some kind of race with multiple commits, but can't immediately
  think how that would happen as we still signal hw_done after
  flip_done, and drm_atomic_helper_swap_state() will block on
  hw_done, and the flip_done irq will not be enabled otherwise

> 
> > >
> > >   spin_unlock_irqrestore(>event_lock, irqflags);  } diff --git
> > > a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index 8d8b2f8d37a9..a8ae1a25a550 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -1461,6 +1461,9 @@ struct intel_crtc {
> > >
> > >   struct intel_crtc_state *config;
> > >
> > > + /* armed event for async flip */
> > > + struct drm_pending_vblank_event *flip_done_event;
> > > +
> > >   /* Access to these should be protected by dev_priv->irq_lock. */
> > 

Re: [PATCH 4/5] drm/i915: Suppress old PLL pipe_mask checks for MG/TC/TBT PLLs

[Ville Syrjälä]

On Fri, Nov 24, 2023 at 10:27:34AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä 
> 
> TC ports have both the MG/TC and TBT PLLs selected simultanously (so
> that we can switch from MG/TC to TBT as a fallback). This doesn't play
> well with the state checker that assumes that the old PLL shouldn't
> have the pipe in its pipe_mask anymore. Suppress that check for these
> PLLs to avoid spurious WARNs when you disconnect a TC port and a
> non-disabling modeset happens before actually disabling the port.
> 
> Signed-off-by: Ville Syrjälä 

Presumably
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9816

> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 56 +--
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.h |  4 ++
>  2 files changed, 42 insertions(+), 18 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index d86b02de2923..5c6c4fc50b1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -4023,11 +4023,16 @@ static const struct intel_shared_dpll_funcs 
> mg_pll_funcs = {
>  static const struct dpll_info icl_plls[] = {
>   { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> },
>   { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> },
> - { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> },
> - { .name = "MG PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1, 
> },
> - { .name = "MG PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2, 
> },
> - { .name = "MG PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3, 
> },
> - { .name = "MG PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4, 
> },
> + { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "MG PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "MG PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "MG PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "MG PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
>   {}
>  };
>  
> @@ -4068,13 +4073,20 @@ static const struct intel_shared_dpll_funcs 
> dkl_pll_funcs = {
>  static const struct dpll_info tgl_plls[] = {
>   { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> },
>   { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> },
> - { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> },
> - { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL1, },
> - { .name = "TC PLL 2", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL2, },
> - { .name = "TC PLL 3", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL3, },
> - { .name = "TC PLL 4", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL4, },
> - { .name = "TC PLL 5", .funcs = _pll_funcs, .id = 
> DPLL_ID_TGL_MGPLL5, },
> - { .name = "TC PLL 6", .funcs = _pll_funcs, .id = 
> DPLL_ID_TGL_MGPLL6, },
> + { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL1,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 2", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL2,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 3", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL3,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 4", .funcs = _pll_funcs, .id = DPLL_ID_ICL_MGPLL4,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 5", .funcs = _pll_funcs, .id = DPLL_ID_TGL_MGPLL5,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
> + { .name = "TC PLL 6", .funcs = _pll_funcs, .id = DPLL_ID_TGL_MGPLL6,
> +   .flags = INTEL_DPLL_HAS_ALT_PORT_DPLL, },
>   {}
>  };
>  
> @@ -4141,11 +4153,16 @@ static const struct intel_dpll_mgr adls_pll_mgr = {
>  static const struct dpll_info adlp_plls[] = {
>   { .name = "DPLL 0", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL0, 
> },
>   { .name = "DPLL 1", .funcs = _pll_funcs, .id = DPLL_ID_ICL_DPLL1, 
> },
> - { .name = "TBT PLL", .funcs = _pll_funcs, .id = DPLL_ID_ICL_TBTPLL, 
> },
> - { .name = "TC PLL 1", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL1, },
> - { .name = "TC PLL 2", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL2, },
> - { .name = "TC PLL 3", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL3, },
> - { .name = "TC PLL 4", .funcs = _pll_funcs, .id = 
> DPLL_ID_ICL_MGPLL4, },
> + { .name = "TBT PLL", .funcs = 

Re: [PATCH 1/2] drm/i915/selftests: Fix engine reset count storage for multi-tile

[Tvrtko Ursulin]

On 07/12/2023 11:46, Andi Shyti wrote:

On Thu, Dec 07, 2023 at 11:43:28AM +, Tvrtko Ursulin wrote:


On 07/12/2023 11:26, Andi Shyti wrote:

Hi Tvrtko,


Engine->id namespace is per-tile so struct igt_live_test->reset_engine[]
needs to be two-dimensional so engine reset counts from all tiles can be
stored with no aliasing. With aliasing, if we had a real multi-tile
platform, the reset counts would be incorrect for same engine instance on
different tiles.

Signed-off-by: Tvrtko Ursulin 
Fixes: 0c29efa23f5c ("drm/i915/selftests: Consider multi-gt instead of to_gt()")
Reported-by: Alan Previn Teres Alexis 
Cc: Tejas Upadhyay 
Cc: Andi Shyti 
Cc: Daniele Ceraolo Spurio 


sorry for being late here... the patch makes sense to me and the
CI failures don't look related.

Reviewed-by: Andi Shyti 


Thanks pushed!

There is more work to be done with the fact i915_reset_engine_count has it's
own aliasing when used like this, but I opted to leave that for some other
time.


feel free to share if you have some preparatory work done already
and I can try to help out. Otherwise I can take a look at it, as
well.


I don't have any patches I was just noticed when doing this that even 
though i915_reset_engine_count takes the engine as parameter, the 
i915->gpu_error is a single gt construct and as such I think using 
i915_reset_engine_count from per gt selftests is a mismatch.


I thought options were to add engine reset counts in the engine itself 
and use that from selftests. Leaving i915_reset_engine_count to be used 
from error capture paths. And it probably needs to be renamed 
accordingly so it is not misleading.


But then there may be issues around virtual engines though which this 
helper conveniently and quietly side stepped.


At that point I stopped thinking about it, given how real multi-tile for 
i915 is not happening, I didn't see it worth the effort. Still the sour 
taste of a mess remains so if you can think of an elegant and relatively 
cheap solution I think it would be good to tidy.


Regards,

Tvrtko

RE: [Intel-gfx] [PATCH 2/3] drm/i915/display: Convert link bitrate to corresponding PLL clock

[Kahola, Mika]

> -Original Message-
> From: Sripada, Radhakrishna 
> Sent: Tuesday, December 5, 2023 8:09 PM
> To: Kahola, Mika ; intel-gfx@lists.freedesktop.org
> Subject: RE: [Intel-gfx] [PATCH 2/3] drm/i915/display: Convert link bitrate 
> to corresponding PLL clock
> 
> Hi Mika,
> 
> > -Original Message-
> > From: Kahola, Mika 
> > Sent: Tuesday, December 5, 2023 12:28 AM
> > To: Sripada, Radhakrishna ; intel-
> > g...@lists.freedesktop.org
> > Subject: RE: [Intel-gfx] [PATCH 2/3] drm/i915/display: Convert link
> > bitrate to corresponding PLL clock
> >
> > > -Original Message-
> > > From: Sripada, Radhakrishna 
> > > Sent: Tuesday, December 5, 2023 3:36 AM
> > > To: Kahola, Mika ;
> > > intel-gfx@lists.freedesktop.org
> > > Subject: RE: [Intel-gfx] [PATCH 2/3] drm/i915/display: Convert link
> > > bitrate to
> > corresponding PLL clock
> > >
> > > Hi Mika,
> > >
> > > > -Original Message-
> > > > From: Intel-gfx  On
> > > > Behalf Of Mika Kahola
> > > > Sent: Monday, December 4, 2023 3:59 AM
> > > > To: intel-gfx@lists.freedesktop.org
> > > > Subject: [Intel-gfx] [PATCH 2/3] drm/i915/display: Convert link
> > > > bitrate to corresponding PLL clock
> > > >
> > > > Compute clock during PLL readout. This prevents warn when only c20
> > > > phy is connected during modprobe. The
> > > > intel_c20pll_calc_port_clock() function returns link bitrate which
> > > > in DP2.0 and HDMI cases does not match with the clock rate. Hence,
> > > > conversion function is needed to convert link bitrate to corresponding 
> > > > PLL clock rate.
> > > >
> > > > while at it, update clock on C10 pll state as well.
> > > >
> > > > Signed-off-by: Clint Taylor 
> > > > Signed-off-by: Mika Kahola 
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_cx0_phy.c | 38
> > > > ++--  drivers/gpu/drm/i915/display/intel_cx0_phy.h
> > > > ++|  1 +
> > > >  drivers/gpu/drm/i915/display/intel_ddi.c |  2 +-
> > > >  3 files changed, 37 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> > > > b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> > > > index 2e6412fc2258..02efe2786c6a 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
> > > > @@ -1871,6 +1871,7 @@ static int intel_c10pll_calc_state(struct
> > > > intel_crtc_state *crtc_state,  }
> > > >
> > > >  static void intel_c10pll_readout_hw_state(struct intel_encoder
> > > > *encoder,
> > > > + struct intel_crtc_state 
> > > > *crtc_state,
> > > >   struct intel_c10pll_state 
> > > > *pll_state)  {
> > > > struct drm_i915_private *i915 = to_i915(encoder->base.dev); @@
> > > > -1894,6 +1895,7 @@ static void
> > > > intel_c10pll_readout_hw_state(struct
> > > > intel_encoder *encoder,
> > > >
> > > > pll_state->cmn = intel_cx0_read(i915, encoder->port, lane,
> > > > PHY_C10_VDR_CMN(0));
> > > > pll_state->tx = intel_cx0_read(i915, encoder->port, lane,
> > > > PHY_C10_VDR_TX(0));
> > > > +   pll_state->clock = crtc_state->port_clock;
> > > >
> > > > intel_cx0_phy_transaction_end(encoder, wakeref);  } @@ -2445,12
> > > > +2447,33 @@ static void intel_program_port_clock_ctl(struct
> > > > intel_encoder *encoder,
> > > >  XELPDP_SSC_ENABLE_PLLB, val);  }
> > > >
> > > > +static int intel_link_bitrate_to_clock(struct intel_encoder *encoder,
> > > > +  struct intel_crtc_state 
> > > > *crtc_state,
> > > > +  int link_bit_rate)
> > > > +{
> > > > +   const struct intel_c20pll_state * const *tables;
> > > > +   int i;
> > > > +
> > > > +   tables = intel_c20_pll_tables_get(crtc_state, encoder);
> > > This will produce incorrect result. intel_c20_pll_tables_get depends
> > > on
> > intel_crtc_has_{dp_encoder,hdmi..} which depends
> > > crtc_state->output_types to determine edp/dp/hdmi table which is not
> > initialized until later in mtl_ddi_init_config under
> > > intel_ddi_get_config -> intel_ddi_read_func_ctl
> > >
> > > We might be needing a separate sanitization of initial pll state to
> > > be done after
> > intel_ddi_get_config. Or a special case to handle
> > > initial modeset.
> > I actually noticed this while testing it that at first we don't even
> > get the tables and function returns with -EINVAL. Eventually we do get the 
> > correct table and clock.
> > Maybe it would be better to simply use the if-else ladder for those
> > cases that differs from link bitrate vs. clock?
> I am skeptical about making 2 different entries for the same data. Why don’t 
> we make intel_c20_get_dp_rate work on link bit rate
> numbers which is what intel_c20pll_calc_port_clock returns and that is what 
> is stored in crtc_state/pipe_config->port_clock and
> use this field to program instead of relying on 

Re: [PATCH RESEND AGAIN v2 0/2] Add drm_dbg_ratelimited()

[Maxime Ripard]

On Thu, Dec 07, 2023 at 10:23:08AM +0100, Andi Shyti wrote:
> Hi Thomas and Maxime,
> 
> thanks for the answer,
> 
> On Thu, Dec 07, 2023 at 10:10:55AM +0100, Maxime Ripard wrote:
> > On Wed, Dec 06, 2023 at 10:09:46PM +0100, Andi Shyti wrote:
> > > This is the second time I am resending this series in its v2. It
> > > has been reviewd, acked, blessed, discussed, rectified, assessed,
> > > authorized, validated, glorified, praised, demanded, approved,
> > > and yet, I don't understand why no one is merging it.
> > 
> > $ ./scripts/get_maintainer.pl -f drivers/gpu/drm/i915/
> > Jani Nikula  (supporter:INTEL DRM DRIVERS 
> > (excluding Poulsbo, Moorestow...)
> > Joonas Lahtinen  (supporter:INTEL DRM 
> > DRIVERS (excluding Poulsbo, Moorestow...)
> > Rodrigo Vivi  (supporter:INTEL DRM DRIVERS 
> > (excluding Poulsbo, Moorestow...)
> > Tvrtko Ursulin  (supporter:INTEL DRM 
> > DRIVERS (excluding Poulsbo, Moorestow...)
> > David Airlie  (maintainer:DRM DRIVERS)
> > Daniel Vetter  (maintainer:DRM DRIVERS)
> > intel-gfx@lists.freedesktop.org (open list:INTEL DRM DRIVERS (excluding 
> > Poulsbo, Moorestow...)
> > dri-de...@lists.freedesktop.org (open list:DRM DRIVERS)
> > linux-ker...@vger.kernel.org (open list)
> > 
> > You've Cc'd none of the i915 maintainers, that's why it's been stuck.
> > 
> > Jani, Joonas, Rodrigo, Tvrtko, could you have a look at this?
> 
> The main change here is in drm_print.h, though and there is just
> an example of usage in i915. I though this should go through the
> drm branch.
> 
> Is it OK if I push it in drm-intel-next?

Sure, and you can add my acked-by on the first

Maxime


signature.asc
Description: PGP signature

[PULL] drm-misc-fixes

[Maarten Lankhorst]

Hi Dave, Daniel,

Pull request for v6.7-rc5.

Cheers,
~Maarten

drm-misc-fixes-2023-12-07:
drm-misc-fixes for v6.7-rc5:
- Document nouveau's GSP-RM.
- Flush vmm harder on nouveau tu102.
- Panfrost fix for imported dma-buf objects, and device frequency.
- Kconfig Build fix for tc358768.
- Call end_fb_access after atomic commit.
The following changes since commit fb18fe0fdf22a2f4512a8b644bb5ea1473829cda:

  drm/panel: nt36523: fix return value check in nt36523_probe() 
(2023-11-29 16:54:23 +0100)


are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-fixes-2023-12-07

for you to fetch changes up to e0f04e41e8eedd4e5a1275f2318df7e1841855f2:

  drm/atomic-helpers: Invoke end_fb_access while owning plane state 
(2023-12-06 10:51:27 +0100)



drm-misc-fixes for v6.7-rc5:
- Document nouveau's GSP-RM.
- Flush vmm harder on nouveau tu102.
- Panfrost fix for imported dma-buf objects, and device frequency.
- Kconfig Build fix for tc358768.
- Call end_fb_access after atomic commit.


Adrián Larumbe (2):
  drm/panfrost: Consider dma-buf imported objects as resident
  drm/panfrost: Fix incorrect updating of current device frequency

Arnd Bergmann (1):
  drm/bridge: tc358768: select CONFIG_VIDEOMODE_HELPERS

Dave Airlie (1):
  nouveau/tu102: flush all pdbs on vmm flush

Thomas Zimmermann (1):
  drm/atomic-helpers: Invoke end_fb_access while owning plane state

Timur Tabi (1):
  nouveau/gsp: document some aspects of GSP-RM

 drivers/gpu/drm/bridge/Kconfig |  1 +
 drivers/gpu/drm/drm_atomic_helper.c| 78 
+---

 drivers/gpu/drm/i915/display/intel_display.c   |  2 +-
 drivers/gpu/drm/nouveau/dispnv50/disp.c|  2 +-
 .../common/shared/msgq/inc/msgq/msgq_priv.h| 51 ++
 drivers/gpu/drm/nouveau/nvkm/subdev/gsp/r535.c | 82 
++

 drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c |  2 +-
 drivers/gpu/drm/panfrost/panfrost_devfreq.c| 17 -
 drivers/gpu/drm/panfrost/panfrost_gem.c|  2 +-
 include/drm/drm_atomic_helper.h|  2 +
 10 files changed, 207 insertions(+), 32 deletions(-)

Re: [Intel-gfx] â Fi.CI.BAT: failure for drm/i915/display: Check GGTT to determine phys_base (rev2)

[Imre Deak]

On Thu, Dec 07, 2023 at 12:26:25PM +0100, Andrzej Hajda wrote:
> 
> 
> On 07.12.2023 11:10, Andrzej Hajda wrote:
> > On 07.12.2023 01:18, Patchwork wrote:
> > > *Patch Details*
> > > *Series:*    drm/i915/display: Check GGTT to determine phys_base (rev2)
> > > *URL:*    https://patchwork.freedesktop.org/series/127130/
> > > 
> > > *State:*    failure
> > > *Details:*
> > > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127130v2/index.html
> > > 
> > > 
> > > 
> > >   CI Bug Log - changes from CI_DRM_13990 -> Patchwork_127130v2
> > > 
> > > 
> > >     Summary
> > > 
> > > *FAILURE*
> > > 
> > > Serious unknown changes coming with Patchwork_127130v2 absolutely
> > > need to be
> > > verified manually.
> > > 
> > > If you think the reported changes have nothing to do with the changes
> > > introduced in Patchwork_127130v2, please notify your bug team
> > > (i915-ci-in...@lists.freedesktop.org) to allow them
> > > to document this new failure mode, which will reduce false positives
> > > in CI.
> > > 
> > > External URL:
> > > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127130v2/index.html
> > > 
> > > 
> > >     Participating hosts (37 -> 34)
> > > 
> > > Missing (3): fi-pnv-d510 fi-snb-2520m bat-dg1-5
> > > 
> > > 
> > >     Possible new issues
> > > 
> > > Here are the unknown changes that may have been introduced in
> > > Patchwork_127130v2:
> > > 
> > > 
> > >   IGT changes
> > > 
> > > 
> > >     Possible regressions
> > > 
> > >   * igt@i915_module_load@load:
> > >   o bat-mtlp-8: PASS
> > > 
> > >  -> INCOMPLETE 
> > > 
> > 
> > 
> > It seems related. I think the patch is correct but it just unveils other
> > display take-over issues.
> > Ie with this patch initial_plane_vma returns valid buffer, but
> > subsequent display code fails miserably with kernel panic.
> > 
> > So until this is not solved, we shouldn't merge the patch, IMO.
> > 
> > CC: i915 maintainers and display developers
> 
> 
> After taking a look on panic log [1], I have found:
> [drm:i915_init_ggtt [i915]] Failed to reserve top of GGTT for GuC
> 
> I don't know why it is only debug level? It seems serious failure, as a
> result i915_init_ggtt fails and probe fails.
> 
> The cause is that initial framebuffer is located at the end of GGTT and it
> overlaps with reserved area (see ggtt_reserve_guc_top).
> 
> I am not sure how it can be properly fixed, I guess dirty fix could be
> just relocation of vma (hopefully into free area), sth like:
> new_gte = gsm + (ggtt->vm.total - GUC_TOP_RESERVE_SIZE - size) /
> I915_GTT_PAGE_SIZE;
> memmove(new_gte, gte, size / I915_GTT_PAGE_SIZE);
> 
> but I have no idea of possible side effects :)
> 
> [1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127130v2/bat-mtlp-8/pstore0-2849851684_Panic_1.txt

fwiw, the following hack should fix the error path:
@@ -822,6 +823,8 @@ int i915_driver_probe(struct pci_dev *pdev, const struct 
pci_device_id *ent)
i915_gem_driver_release(i915);
 out_cleanup_modeset2:
/* FIXME clean up the error path */
+   if (HAS_DISPLAY(i915))
+   drm_atomic_helper_shutdown(>drm);
intel_display_driver_remove(i915);
intel_irq_uninstall(i915);
intel_display_driver_remove_noirq(i915);

> Regards
> Andrzej
> 
> 
> > 
> > Regards
> > Andrzej
> > 
> > > 
> > > 
> > >     Known issues
> > > 
> > > Here are the changes found in Patchwork_127130v2 that come from
> > > known issues:
> > > 
> > > 
> > >   IGT changes
> > > 
> > > 
> > >     Issues hit
> > > 
> > >   * igt@kms_pm_backlight@basic-brightness@edp-1:
> > >   o bat-rplp-1: NOTRUN -> ABORT
> > > 
> > >  (i915#8668 )
> > > 
> > > 
> > >     Possible fixes
> > > 
> > >   *
> > > 
> > >     igt@gem_exec_suspend@basic-s0@lmem0:
> > > 
> > >   o bat-dg2-9: INCOMPLETE
> > > 
> > >  (i915#9275 ) -> 
> > > PASS 
> > > 
> > >   *
> > > 
> > >     igt@kms_flip@basic-flip-vs-dpms@d-dp6:
> > > 
> > >   o bat-adlp-11: DMESG-FAIL
> > > 
> > >  (i915#6868 ) -> 
> > > PASS 
> > > 

✗ Fi.CI.IGT: failure for drm/i915/display: Add intel_fb_bo_framebuffer_fini

[Patchwork]

== Series Details ==

Series: drm/i915/display: Add intel_fb_bo_framebuffer_fini
URL   : https://patchwork.freedesktop.org/series/127482/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13991_full -> Patchwork_127482v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_127482v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_127482v1_full, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (7 -> 8)
--

  Additional (1): shard-glk-0 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_127482v1_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_ppgtt@blt-vs-render-ctx0:
- shard-glk:  [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/shard-glk6/igt@gem_pp...@blt-vs-render-ctx0.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-glk1/igt@gem_pp...@blt-vs-render-ctx0.html

  
Known issues


  Here are the changes found in Patchwork_127482v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@drm_fdinfo@busy-check-all@ccs3:
- shard-dg2:  NOTRUN -> [SKIP][3] ([i915#8414]) +10 other tests skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-dg2-2/igt@drm_fdinfo@busy-check-...@ccs3.html

  * igt@drm_fdinfo@virtual-busy-hang:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#8414])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-mtlp-7/igt@drm_fdi...@virtual-busy-hang.html

  * igt@fbdev@pan:
- shard-snb:  [PASS][5] -> [FAIL][6] ([i915#4435])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/shard-snb2/igt@fb...@pan.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-snb7/igt@fb...@pan.html

  * igt@gem_ccs@block-multicopy-compressed:
- shard-rkl:  NOTRUN -> [SKIP][7] ([i915#9323])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-rkl-1/igt@gem_...@block-multicopy-compressed.html

  * igt@gem_create@create-ext-cpu-access-big:
- shard-dg2:  NOTRUN -> [INCOMPLETE][8] ([i915#9364])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-dg2-2/igt@gem_cre...@create-ext-cpu-access-big.html

  * igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglu: [PASS][9] -> [FAIL][10] ([i915#6268])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/shard-tglu-3/igt@gem_ctx_e...@basic-nohangcheck.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-tglu-3/igt@gem_ctx_e...@basic-nohangcheck.html

  * igt@gem_ctx_persistence@engines-persistence:
- shard-snb:  NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1099])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-snb1/igt@gem_ctx_persiste...@engines-persistence.html

  * igt@gem_ctx_persistence@hang:
- shard-dg2:  NOTRUN -> [SKIP][12] ([i915#8555])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-dg2-5/igt@gem_ctx_persiste...@hang.html

  * igt@gem_ctx_sseu@invalid-sseu:
- shard-dg2:  NOTRUN -> [SKIP][13] ([i915#280]) +1 other test skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-dg2-2/igt@gem_ctx_s...@invalid-sseu.html

  * igt@gem_eio@hibernate:
- shard-dg1:  [PASS][14] -> [ABORT][15] ([i915#7975] / [i915#8213])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/shard-dg1-19/igt@gem_...@hibernate.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-dg1-14/igt@gem_...@hibernate.html

  * igt@gem_eio@reset-stress:
- shard-dg2:  NOTRUN -> [FAIL][16] ([i915#5784])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-dg2-5/igt@gem_...@reset-stress.html

  * igt@gem_exec_balancer@invalid-bonds:
- shard-mtlp: NOTRUN -> [SKIP][17] ([i915#4036])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-mtlp-7/igt@gem_exec_balan...@invalid-bonds.html

  * igt@gem_exec_capture@many-4k-zero:
- shard-dg2:  NOTRUN -> [FAIL][18] ([i915#9606])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-dg2-2/igt@gem_exec_capt...@many-4k-zero.html

  * igt@gem_exec_fair@basic-none-rrul:
- shard-mtlp: NOTRUN -> [SKIP][19] ([i915#4473] / [i915#4771])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/shard-mtlp-7/igt@gem_exec_f...@basic-none-rrul.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- 

Re: [PATCH 1/2] drm/i915/selftests: Fix engine reset count storage for multi-tile

[Andi Shyti]

On Thu, Dec 07, 2023 at 11:43:28AM +, Tvrtko Ursulin wrote:
> 
> On 07/12/2023 11:26, Andi Shyti wrote:
> > Hi Tvrtko,
> > 
> > > Engine->id namespace is per-tile so struct igt_live_test->reset_engine[]
> > > needs to be two-dimensional so engine reset counts from all tiles can be
> > > stored with no aliasing. With aliasing, if we had a real multi-tile
> > > platform, the reset counts would be incorrect for same engine instance on
> > > different tiles.
> > > 
> > > Signed-off-by: Tvrtko Ursulin 
> > > Fixes: 0c29efa23f5c ("drm/i915/selftests: Consider multi-gt instead of 
> > > to_gt()")
> > > Reported-by: Alan Previn Teres Alexis 
> > > Cc: Tejas Upadhyay 
> > > Cc: Andi Shyti 
> > > Cc: Daniele Ceraolo Spurio 
> > 
> > sorry for being late here... the patch makes sense to me and the
> > CI failures don't look related.
> > 
> > Reviewed-by: Andi Shyti 
> 
> Thanks pushed!
> 
> There is more work to be done with the fact i915_reset_engine_count has it's
> own aliasing when used like this, but I opted to leave that for some other
> time.

feel free to share if you have some preparatory work done already
and I can try to help out. Otherwise I can take a look at it, as
well.

Andi

Re: [PATCH 1/2] drm/i915/selftests: Fix engine reset count storage for multi-tile

[Tvrtko Ursulin]

On 07/12/2023 11:26, Andi Shyti wrote:

Hi Tvrtko,


Engine->id namespace is per-tile so struct igt_live_test->reset_engine[]
needs to be two-dimensional so engine reset counts from all tiles can be
stored with no aliasing. With aliasing, if we had a real multi-tile
platform, the reset counts would be incorrect for same engine instance on
different tiles.

Signed-off-by: Tvrtko Ursulin 
Fixes: 0c29efa23f5c ("drm/i915/selftests: Consider multi-gt instead of to_gt()")
Reported-by: Alan Previn Teres Alexis 
Cc: Tejas Upadhyay 
Cc: Andi Shyti 
Cc: Daniele Ceraolo Spurio 


sorry for being late here... the patch makes sense to me and the
CI failures don't look related.

Reviewed-by: Andi Shyti 


Thanks pushed!

There is more work to be done with the fact i915_reset_engine_count has 
it's own aliasing when used like this, but I opted to leave that for 
some other time.


Regards,

Tvrtko

Re: [PATCH 1/2] drm/i915/selftests: Fix engine reset count storage for multi-tile

[Andi Shyti]

Hi Tvrtko,

> Engine->id namespace is per-tile so struct igt_live_test->reset_engine[]
> needs to be two-dimensional so engine reset counts from all tiles can be
> stored with no aliasing. With aliasing, if we had a real multi-tile
> platform, the reset counts would be incorrect for same engine instance on
> different tiles.
> 
> Signed-off-by: Tvrtko Ursulin 
> Fixes: 0c29efa23f5c ("drm/i915/selftests: Consider multi-gt instead of 
> to_gt()")
> Reported-by: Alan Previn Teres Alexis 
> Cc: Tejas Upadhyay 
> Cc: Andi Shyti 
> Cc: Daniele Ceraolo Spurio 

sorry for being late here... the patch makes sense to me and the
CI failures don't look related.

Reviewed-by: Andi Shyti 

Thanks,
Andi

Re: [Intel-gfx] â Fi.CI.BAT: failure for drm/i915/display: Check GGTT to determine phys_base (rev2)

[Andrzej Hajda]

On 07.12.2023 11:10, Andrzej Hajda wrote:

On 07.12.2023 01:18, Patchwork wrote:

*Patch Details*
*Series:*    drm/i915/display: Check GGTT to determine phys_base (rev2)
*URL:*    https://patchwork.freedesktop.org/series/127130/ 


*State:*    failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127130v2/index.html 




  CI Bug Log - changes from CI_DRM_13990 -> Patchwork_127130v2


    Summary

*FAILURE*

Serious unknown changes coming with Patchwork_127130v2 absolutely need 
to be

verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_127130v2, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives 
in CI.


External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127130v2/index.html



    Participating hosts (37 -> 34)

Missing (3): fi-pnv-d510 fi-snb-2520m bat-dg1-5


    Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_127130v2:



  IGT changes


    Possible regressions

  * igt@i915_module_load@load:
  o bat-mtlp-8: PASS

 -> INCOMPLETE 



It seems related. I think the patch is correct but it just unveils other 
display take-over issues.
Ie with this patch initial_plane_vma returns valid buffer, but 
subsequent display code fails miserably with kernel panic.


So until this is not solved, we shouldn't merge the patch, IMO.

CC: i915 maintainers and display developers



After taking a look on panic log [1], I have found:
[drm:i915_init_ggtt [i915]] Failed to reserve top of GGTT for GuC

I don't know why it is only debug level? It seems serious failure, as a 
result i915_init_ggtt fails and probe fails.


The cause is that initial framebuffer is located at the end of GGTT and 
it overlaps with reserved area (see ggtt_reserve_guc_top).


I am not sure how it can be properly fixed, I guess dirty fix could be
just relocation of vma (hopefully into free area), sth like:
new_gte = gsm + (ggtt->vm.total - GUC_TOP_RESERVE_SIZE - size) / 
I915_GTT_PAGE_SIZE;

memmove(new_gte, gte, size / I915_GTT_PAGE_SIZE);

but I have no idea of possible side effects :)

[1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127130v2/bat-mtlp-8/pstore0-2849851684_Panic_1.txt


Regards
Andrzej




Regards
Andrzej




    Known issues

Here are the changes found in Patchwork_127130v2 that come from known 
issues:



  IGT changes


    Issues hit

  * igt@kms_pm_backlight@basic-brightness@edp-1:
  o bat-rplp-1: NOTRUN -> ABORT

 (i915#8668 )



    Possible fixes

  *

    igt@gem_exec_suspend@basic-s0@lmem0:

  o bat-dg2-9: INCOMPLETE

 (i915#9275 ) -> PASS 

  *

    igt@kms_flip@basic-flip-vs-dpms@d-dp6:

  o bat-adlp-11: DMESG-FAIL

 (i915#6868 ) -> PASS 

  *

    igt@kms_flip@basic-flip-vs-modeset@d-dp6:

  o bat-adlp-11: DMESG-WARN

 -> PASS 

  *

    igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:

  o bat-rplp-1: ABORT

 (i915#8668 ) -> PASS 



    Build changes

  * Linux: CI_DRM_13990 -> Patchwork_127130v2

CI-20190529: 20190529
CI_DRM_13990: 85d33d0ad82a5c1a71492f14a5ceb67ada6a22d8 @ 
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7626: 154b7288552cd7ed3033f8ef396e88d0bd1b7646 @ 

Re: [Intel-gfx] [PATCH] drm/i915/rpm: add rpm_to_i915() helper around container_of()

[Jani Nikula]

On Wed, 06 Dec 2023, Gustavo Sousa  wrote:
> Quoting Jani Nikula (2023-12-05 09:15:45-03:00)
>>Reduce the duplication.
>
> By the way, is it too ambitious to dream of a to_i915() using generics?

I'm not fundamentally opposed, but there are a few open questions here.

_Generic() has been slowly cropping up since commit e8c07082a810
("Kbuild: move to -std=gnu11"). Well, maybe even before that in some
cases. But there are only 30 or so users. I'm kind of uneasy about going
"all in" with it in this fashion before there's more general approval
that it's fine. Dave, Sima, thoughts?

The other thing is that with i915 and xe display integration, we're not
sure yet where it'll go. It's possible the display code will cease to
use i915 and switch to some other device struct. See [1] for some draft
ideas. At least for display code, I'd prefer not embarking on this kind
of changes yet so we don't have to churn many times in a row.


BR,
Jani.


[1] https://patchwork.freedesktop.org/series/124286/


-- 
Jani Nikula, Intel

Re: [PATCH 2/2] drm/i915: Use internal class when counting engine resets

[Tvrtko Ursulin]

On 06/12/2023 00:52, Daniele Ceraolo Spurio wrote:



On 12/1/2023 4:21 AM, Tvrtko Ursulin wrote:

From: Tvrtko Ursulin 

Commit 503579448db9 ("drm/i915/gsc: Mark internal GSC engine with 
reserved uabi class")

made the GSC0 engine not have a valid uabi class and so broke the engine
reset counting, which in turn was made class based in cb823ed9915b 
("drm/i915/gt: Use intel_gt as the primary object for handling resets").


Despite the title and commit text of the latter is not mentioning it (and
has left the storage array incorrectly sized), tracking by class, despite
it adding aliasing in hypthotetical multi-tile systems, is handy for
virtual engines which for instance do not have a valid engine->id.

Therefore we keep that but just change it to use the internal class which
is always valid. We also add a helper to increment the count, which
aligns with the existing getter.

What was broken without this fix were out of bounds reads every time a
reset would happen on the GSC0 engine, or during selftests when storing
and cross-checking the counts in igt_live_test_begin and
igt_live_test_end.

Signed-off-by: Tvrtko Ursulin 
Fixes: 503579448db9 ("drm/i915/gsc: Mark internal GSC engine with 
reserved uabi class")
Reported-by: Alan Previn Teres Alexis 


Cc: Daniele Ceraolo Spurio 


Reviewed-by: Daniele Ceraolo Spurio 


Thanks! Lets see if 1/2 gets some attention so I don't have to split out 
2/2 just for CI.


Regards,

Tvrtko



Daniele


---
  drivers/gpu/drm/i915/gt/intel_reset.c |  2 +-
  drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c |  5 +++--
  drivers/gpu/drm/i915/i915_gpu_error.h | 12 ++--
  3 files changed, 14 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c 
b/drivers/gpu/drm/i915/gt/intel_reset.c

index d5ed904f355d..6801f8b95c53 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1293,7 +1293,7 @@ int __intel_engine_reset_bh(struct 
intel_engine_cs *engine, const char *msg)

  if (msg)
  drm_notice(>i915->drm,
 "Resetting %s for %s\n", engine->name, msg);
-
atomic_inc(>i915->gpu_error.reset_engine_count[engine->uabi_class]);

+    i915_increase_reset_engine_count(>i915->gpu_error, engine);
  ret = intel_gt_reset_engine(engine);
  if (ret) {
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

index 04f8377fd7a3..58ea285c51d4 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -5003,7 +5003,8 @@ static void capture_error_state(struct intel_guc 
*guc,

  if (match) {
  intel_engine_set_hung_context(e, ce);
  engine_mask |= e->mask;
-
atomic_inc(>gpu_error.reset_engine_count[e->uabi_class]);

+    i915_increase_reset_engine_count(>gpu_error,
+ e);
  }
  }
@@ -5015,7 +5016,7 @@ static void capture_error_state(struct intel_guc 
*guc,

  } else {
  intel_engine_set_hung_context(ce->engine, ce);
  engine_mask = ce->engine->mask;
-
atomic_inc(>gpu_error.reset_engine_count[ce->engine->uabi_class]);

+    i915_increase_reset_engine_count(>gpu_error, ce->engine);
  }
  with_intel_runtime_pm(>runtime_pm, wakeref)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h 
b/drivers/gpu/drm/i915/i915_gpu_error.h

index fa886620d3f8..7c255bb1c319 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -17,6 +17,7 @@
  #include "display/intel_display_device.h"
  #include "display/intel_display_params.h"
  #include "gt/intel_engine.h"
+#include "gt/intel_engine_types.h"
  #include "gt/intel_gt_types.h"
  #include "gt/uc/intel_uc_fw.h"
@@ -234,7 +235,7 @@ struct i915_gpu_error {
  atomic_t reset_count;
  /** Number of times an engine has been reset */
-    atomic_t reset_engine_count[I915_NUM_ENGINES];
+    atomic_t reset_engine_count[MAX_ENGINE_CLASS];
  };
  struct drm_i915_error_state_buf {
@@ -257,7 +258,14 @@ static inline u32 i915_reset_count(struct 
i915_gpu_error *error)

  static inline u32 i915_reset_engine_count(struct i915_gpu_error *error,
    const struct intel_engine_cs *engine)
  {
-    return atomic_read(>reset_engine_count[engine->uabi_class]);
+    return atomic_read(>reset_engine_count[engine->class]);
+}
+
+static inline void
+i915_increase_reset_engine_count(struct i915_gpu_error *error,
+ const struct intel_engine_cs *engine)
+{
+    atomic_inc(>reset_engine_count[engine->class]);
  }
  #define CORE_DUMP_FLAG_NONE   0x0

Re: [Intel-gfx] [PATCH 1/3] drm/i915: use intel_connector in intel_connector_debugfs_add()

[Jani Nikula]

On Tue, 05 Dec 2023, Ville Syrjälä  wrote:
> On Tue, Dec 05, 2023 at 03:41:41PM +0200, Jani Nikula wrote:
>> Prefer struct intel_connector over struct drm_connector.
>> 
>> Signed-off-by: Jani Nikula 
>
> Series is
> Reviewed-by: Ville Syrjälä 

Thanks, pushed.

BR,
Jani.

-- 
Jani Nikula, Intel

Re: [Intel-gfx] [PATCH] drm/i915/rpm: add rpm_to_i915() helper around container_of()

[Jani Nikula]

On Tue, 05 Dec 2023, Rodrigo Vivi  wrote:
> On Tue, Dec 05, 2023 at 02:15:45PM +0200, Jani Nikula wrote:
>> Reduce the duplication.
>> 
>> Signed-off-by: Jani Nikula 
>
> Reviewed-by: Rodrigo Vivi 

Thanks, pushed to din.

BR,
Jani.


-- 
Jani Nikula, Intel

✗ Fi.CI.BAT: failure for drm/edid: also call add modes in EDID connector update fallback

[Patchwork]

== Series Details ==

Series: drm/edid: also call add modes in EDID connector update fallback
URL   : https://patchwork.freedesktop.org/series/127486/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13991 -> Patchwork_127486v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_127486v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_127486v1, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/index.html

Participating hosts (36 -> 34)
--

  Additional (1): fi-pnv-d510 
  Missing(3): bat-kbl-2 fi-snb-2520m bat-dg1-5 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_127486v1:

### IGT changes ###

 Possible regressions 

  * igt@kms_flip@basic-flip-vs-modeset@b-dp6:
- bat-adlp-11:[PASS][1] -> [DMESG-WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@b-dp6.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-mode...@b-dp6.html

  * igt@kms_pipe_crc_basic@nonblocking-crc:
- bat-adlp-11:NOTRUN -> [SKIP][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/bat-adlp-11/igt@kms_pipe_crc_ba...@nonblocking-crc.html

  
Known issues


  Here are the changes found in Patchwork_127486v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@basic:
- fi-pnv-d510:NOTRUN -> [SKIP][4] ([fdo#109271]) +32 other tests 
skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/fi-pnv-d510/igt@gem_lmem_swapp...@basic.html

  * igt@kms_flip@basic-flip-vs-dpms@d-dp6:
- bat-adlp-11:[PASS][5] -> [FAIL][6] ([i915#6121]) +4 other tests 
fail
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-adlp-11/igt@kms_flip@basic-flip-vs-d...@d-dp6.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/bat-adlp-11/igt@kms_flip@basic-flip-vs-d...@d-dp6.html

  * igt@kms_pipe_crc_basic@hang-read-crc@pipe-d-dp-5:
- bat-adlp-11:[PASS][7] -> [DMESG-WARN][8] ([i915#6868]) +1 other 
test dmesg-warn
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-adlp-11/igt@kms_pipe_crc_basic@hang-read-...@pipe-d-dp-5.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/bat-adlp-11/igt@kms_pipe_crc_basic@hang-read-...@pipe-d-dp-5.html

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][9] ([i915#8668])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_heartbeat:
- fi-cfl-8109u:   [DMESG-FAIL][10] ([i915#5334]) -> [PASS][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-dp-5:
- bat-adlp-11:[DMESG-FAIL][12] ([i915#6868]) -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-5:
- bat-adlp-11:[FAIL][14] ([i915#9666]) -> [PASS][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][16] ([i915#8668]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127486v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6121]: https://gitlab.freedesktop.org/drm/intel/issues/6121
  [i915#6868]: 

✗ Fi.CI.IGT: failure for Implement CMRR Support (rev6)

[Patchwork]

== Series Details ==

Series: Implement CMRR Support (rev6)
URL   : https://patchwork.freedesktop.org/series/126443/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13983_full -> Patchwork_126443v6_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_126443v6_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_126443v6_full, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (8 -> 8)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_126443v6_full:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@perf@region:
- shard-mtlp: [PASS][1] -> [DMESG-WARN][2] +1 other test dmesg-warn
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13983/shard-mtlp-4/igt@i915_selftest@p...@region.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-2/igt@i915_selftest@p...@region.html

  * igt@kms_display_modes@extended-mode-basic@pipe-a-hdmi-a-1-pipe-b-vga-1:
- shard-snb:  NOTRUN -> [FAIL][3] +3 other tests fail
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-snb7/igt@kms_display_modes@extended-mode-ba...@pipe-a-hdmi-a-1-pipe-b-vga-1.html

  
Known issues


  Here are the changes found in Patchwork_126443v6_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@api_intel_bb@object-reloc-purge-cache:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#8411])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@api_intel...@object-reloc-purge-cache.html

  * igt@device_reset@cold-reset-bound:
- shard-mtlp: NOTRUN -> [SKIP][5] ([i915#7701])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@device_re...@cold-reset-bound.html

  * igt@device_reset@unbind-reset-rebind:
- shard-dg2:  NOTRUN -> [ABORT][6] ([i915#8668])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-dg2-10/igt@device_re...@unbind-reset-rebind.html
- shard-mtlp: NOTRUN -> [ABORT][7] ([i915#8668])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-4/igt@device_re...@unbind-reset-rebind.html

  * igt@drm_fdinfo@virtual-busy-idle:
- shard-mtlp: NOTRUN -> [SKIP][8] ([i915#8414]) +6 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@drm_fdi...@virtual-busy-idle.html

  * igt@gem_caching@reads:
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#4873])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-6/igt@gem_cach...@reads.html

  * igt@gem_ccs@block-multicopy-compressed:
- shard-rkl:  NOTRUN -> [SKIP][10] ([i915#9323])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-rkl-4/igt@gem_...@block-multicopy-compressed.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-mtlp: NOTRUN -> [SKIP][11] ([i915#6335])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-6/igt@gem_cre...@create-ext-cpu-access-sanity-check.html

  * igt@gem_eio@kms:
- shard-dg1:  NOTRUN -> [FAIL][12] ([i915#5784])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-dg1-13/igt@gem_...@kms.html

  * igt@gem_exec_balancer@bonded-semaphore:
- shard-dg2:  NOTRUN -> [SKIP][13] ([i915#4812])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-dg2-6/igt@gem_exec_balan...@bonded-semaphore.html

  * igt@gem_exec_balancer@invalid-bonds:
- shard-mtlp: NOTRUN -> [SKIP][14] ([i915#4036])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@gem_exec_balan...@invalid-bonds.html

  * igt@gem_exec_balancer@parallel-contexts:
- shard-rkl:  NOTRUN -> [SKIP][15] ([i915#4525])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-rkl-4/igt@gem_exec_balan...@parallel-contexts.html

  * igt@gem_exec_capture@many-4k-incremental:
- shard-mtlp: NOTRUN -> [FAIL][16] ([i915#9606])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@gem_exec_capt...@many-4k-incremental.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-rkl:  NOTRUN -> [FAIL][17] ([i915#2842])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-rkl-4/igt@gem_exec_fair@basic-none-r...@rcs0.html

  * igt@gem_exec_fair@basic-none-solo:
- shard-mtlp: NOTRUN -> 

Re: [Intel-xe] [Intel-gfx] [PATCH v7] drm/i915: handle uncore spinlock when not available

[Hogander, Jouni]

On Thu, 2023-12-07 at 09:30 +, Coelho, Luciano wrote:
> On Thu, 2023-12-07 at 08:24 +, Hogander, Jouni wrote:
> > On Fri, 2023-12-01 at 12:00 +0200, Luca Coelho wrote:
> > > The uncore code may not always be available (e.g. when we build
> > > the
> > > display code with Xe), so we can't always rely on having the
> > > uncore's
> > > spinlock.
> > > 
> > > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > > spin_lock/unlock() followed by a call to local_irq_save/restore()
> > > and
> > > create wrapper functions for locking and unlocking the uncore's
> > > spinlock.  In these functions, we have a condition check and only
> > > actually try to lock/unlock the spinlock when I915 is defined,
> > > and
> > > thus uncore is available.
> > > 
> > > This keeps the ifdefs contained in these new functions and all
> > > such
> > > logic inside the display code.
> > > 
> > > Cc: Tvrtko Ursulin 
> > > Cc: Jani Nikula 
> > > Cc: Ville Syrjala 
> > > Cc: Rodrigo Vivi 
> > > Signed-off-by: Luca Coelho 
> > > ---
> > > 
> > > 
> > > In v2:
> > > 
> > >    * Renamed uncore_spin_*() to intel_spin_*()
> > >    * Corrected the order: save, lock, unlock, restore
> > > 
> > > In v3:
> > > 
> > >    * Undid the change to pass drm_i915_private instead of the
> > > lock
> > >  itself, since we would have to include i915_drv.h and that
> > > pulls
> > >  in a truckload of other includes.
> > > 
> > > In v4:
> > > 
> > >    * After a brief attempt to replace this with a different
> > > patch,
> > >  we're back to this one;
> > >    * Pass drm_i195_private again, and move the functions to
> > >  intel_vblank.c, so we don't need to include i915_drv.h in a
> > >  header file and it's already included in intel_vblank.c;
> > > 
> > > In v5:
> > > 
> > >    * Remove stray include in intel_display.h;
> > >    * Remove unnecessary inline modifiers in the new functions.
> > > 
> > > In v6:
> > > 
> > >    * Just removed the umlauts from Ville's name, because
> > > patchwork
> > >  didn't catch my patch and I suspect it was some UTF-8
> > > confusion.
> > > 
> > > In v7:
> > > 
> > >    * Add __acquires()/__releases() annotation to resolve sparse
> > >  warnings.
> > > 
> > >  drivers/gpu/drm/i915/display/intel_vblank.c | 51
> > > +--
> > > --
> > >  1 file changed, 41 insertions(+), 10 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > index 2cec2abf9746..fe256bf7b485 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > @@ -265,6 +265,32 @@ int intel_crtc_scanline_to_hw(struct
> > > intel_crtc
> > > *crtc, int scanline)
> > > return (scanline + vtotal - crtc->scanline_offset) %
> > > vtotal;
> > >  }
> > >  
> > > +/*
> > > + * The uncore version of the spin lock functions is used to
> > > decide
> > > + * whether we need to lock the uncore lock or not.  This is only
> > > + * needed in i915, not in Xe.
> > > + *
> > > + * This lock in i915 is needed because some old platforms (at
> > > least
> > > + * IVB and possibly HSW as well), which are not supported in Xe,
> > > need
> > > + * all register accesses to the same cacheline to be serialized,
> > > + * otherwise they may hang.
> > > + */
> > > +static void intel_vblank_section_enter(struct drm_i915_private
> > > *i915)
> > > +   __acquires(i915->uncore.lock)
> > > +{
> > > +#ifdef I915
> > > +   spin_lock(>uncore.lock);
> > > +#endif
> > > +}
> > > +
> > > +static void intel_vblank_section_exit(struct drm_i915_private
> > > *i915)
> > > +   __releases(i915->uncore.lock)
> > > +{
> > > +#ifdef I915
> > > +   spin_unlock(>uncore.lock);
> > > +#endif
> > > +}
> > > +
> > 
> > Why don't you move these into gpu/drm/i915/intel_uncore.c/h? Then
> > you
> > could have empty defines/functions for these in gpu/drm/xe/compat-
> > i915-
> > headers/intel_uncore.h. That way you don't need these ifdefs. If
> > you
> > move them as I proposed you should rename them as well.
> 
> We already went forth and back with this for some time.  In the end
> we
> agreed that this is not related to uncore directly, so we decided to
> keep it here.
> 
> We also agreed that I'll make a follow-up patch where it won't be
> only
> the lock that will be handled by this, but also enabling/disabling
> interrupts, which doesn't have anything to do with uncore, thus the
> name of the function.

Thank you Luca for the patch. This is now pushed to drm-intel-next.

BR,

Jouni Högander
> 
> 
> --
> Cheers,
> Luca.

Re: [Intel-gfx] â Fi.CI.BAT: failure for drm/i915/display: Check GGTT to determine phys_base (rev2)

[Andrzej Hajda]

On 07.12.2023 01:18, Patchwork wrote:

*Patch Details*
*Series:*   drm/i915/display: Check GGTT to determine phys_base (rev2)
*URL:*	https://patchwork.freedesktop.org/series/127130/ 


*State:*failure
*Details:* 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127130v2/index.html 




  CI Bug Log - changes from CI_DRM_13990 -> Patchwork_127130v2


Summary

*FAILURE*

Serious unknown changes coming with Patchwork_127130v2 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_127130v2, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them

to document this new failure mode, which will reduce false positives in CI.

External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127130v2/index.html



Participating hosts (37 -> 34)

Missing (3): fi-pnv-d510 fi-snb-2520m bat-dg1-5


Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_127130v2:



  IGT changes


Possible regressions

  * igt@i915_module_load@load:
  o bat-mtlp-8: PASS


 -> INCOMPLETE 




It seems related. I think the patch is correct but it just unveils other 
display take-over issues.
Ie with this patch initial_plane_vma returns valid buffer, but 
subsequent display code fails miserably with kernel panic.


So until this is not solved, we shouldn't merge the patch, IMO.

CC: i915 maintainers and display developers

Regards
Andrzej




Known issues

Here are the changes found in Patchwork_127130v2 that come from known 
issues:



  IGT changes


Issues hit

  * igt@kms_pm_backlight@basic-brightness@edp-1:
  o bat-rplp-1: NOTRUN -> ABORT


 (i915#8668 )


Possible fixes

  *

igt@gem_exec_suspend@basic-s0@lmem0:

  o bat-dg2-9: INCOMPLETE


 (i915#9275 ) -> PASS 

  *

igt@kms_flip@basic-flip-vs-dpms@d-dp6:

  o bat-adlp-11: DMESG-FAIL


 (i915#6868 ) -> PASS 

  *

igt@kms_flip@basic-flip-vs-modeset@d-dp6:

  o bat-adlp-11: DMESG-WARN


 -> PASS 

  *

igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:

  o bat-rplp-1: ABORT


 (i915#8668 ) -> PASS 



Build changes

  * Linux: CI_DRM_13990 -> Patchwork_127130v2

CI-20190529: 20190529
CI_DRM_13990: 85d33d0ad82a5c1a71492f14a5ceb67ada6a22d8 @ 
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7626: 154b7288552cd7ed3033f8ef396e88d0bd1b7646 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_127130v2: 85d33d0ad82a5c1a71492f14a5ceb67ada6a22d8 @ 
git://anongit.freedesktop.org/gfx-ci/linux



  Linux commits

43f210e851cd drm/i915/display: Check GGTT to determine phys_base

✓ Fi.CI.BAT: success for drm/i915/edp: don't write to DP_LINK_BW_SET when using rate select (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/edp: don't write to DP_LINK_BW_SET when using rate select 
(rev3)
URL   : https://patchwork.freedesktop.org/series/127194/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13991 -> Patchwork_127194v3


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127194v3/index.html

Participating hosts (36 -> 35)
--

  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_127194v3 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@hangcheck:
- fi-skl-guc: [PASS][1] -> [DMESG-FAIL][2] ([i915#9549])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/fi-skl-guc/igt@i915_selftest@l...@hangcheck.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127194v3/fi-skl-guc/igt@i915_selftest@l...@hangcheck.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_heartbeat:
- fi-cfl-8109u:   [DMESG-FAIL][3] ([i915#5334]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127194v3/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-dp-5:
- bat-adlp-11:[DMESG-FAIL][5] ([i915#6868]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127194v3/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-5:
- bat-adlp-11:[FAIL][7] ([i915#9666]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127194v3/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html

  
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
  [i915#9549]: https://gitlab.freedesktop.org/drm/intel/issues/9549
  [i915#9666]: https://gitlab.freedesktop.org/drm/intel/issues/9666


Build changes
-

  * Linux: CI_DRM_13991 -> Patchwork_127194v3

  CI-20190529: 20190529
  CI_DRM_13991: f13e9802d9ba176a81962cfa3aa2799a84418b15 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7626: 154b7288552cd7ed3033f8ef396e88d0bd1b7646 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_127194v3: f13e9802d9ba176a81962cfa3aa2799a84418b15 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

da4a443e61d0 drm/i915/edp: don't write to DP_LINK_BW_SET when using rate select

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127194v3/index.html

Re: [Intel-gfx] [Intel-xe] [PATCH v7] drm/i915: handle uncore spinlock when not available

[Hogander, Jouni]

On Thu, 2023-12-07 at 09:30 +, Coelho, Luciano wrote:
> On Thu, 2023-12-07 at 08:24 +, Hogander, Jouni wrote:
> > On Fri, 2023-12-01 at 12:00 +0200, Luca Coelho wrote:
> > > The uncore code may not always be available (e.g. when we build
> > > the
> > > display code with Xe), so we can't always rely on having the
> > > uncore's
> > > spinlock.
> > > 
> > > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > > spin_lock/unlock() followed by a call to local_irq_save/restore()
> > > and
> > > create wrapper functions for locking and unlocking the uncore's
> > > spinlock.  In these functions, we have a condition check and only
> > > actually try to lock/unlock the spinlock when I915 is defined,
> > > and
> > > thus uncore is available.
> > > 
> > > This keeps the ifdefs contained in these new functions and all
> > > such
> > > logic inside the display code.
> > > 
> > > Cc: Tvrtko Ursulin 
> > > Cc: Jani Nikula 
> > > Cc: Ville Syrjala 
> > > Cc: Rodrigo Vivi 
> > > Signed-off-by: Luca Coelho 
> > > ---
> > > 
> > > 
> > > In v2:
> > > 
> > >    * Renamed uncore_spin_*() to intel_spin_*()
> > >    * Corrected the order: save, lock, unlock, restore
> > > 
> > > In v3:
> > > 
> > >    * Undid the change to pass drm_i915_private instead of the
> > > lock
> > >  itself, since we would have to include i915_drv.h and that
> > > pulls
> > >  in a truckload of other includes.
> > > 
> > > In v4:
> > > 
> > >    * After a brief attempt to replace this with a different
> > > patch,
> > >  we're back to this one;
> > >    * Pass drm_i195_private again, and move the functions to
> > >  intel_vblank.c, so we don't need to include i915_drv.h in a
> > >  header file and it's already included in intel_vblank.c;
> > > 
> > > In v5:
> > > 
> > >    * Remove stray include in intel_display.h;
> > >    * Remove unnecessary inline modifiers in the new functions.
> > > 
> > > In v6:
> > > 
> > >    * Just removed the umlauts from Ville's name, because
> > > patchwork
> > >  didn't catch my patch and I suspect it was some UTF-8
> > > confusion.
> > > 
> > > In v7:
> > > 
> > >    * Add __acquires()/__releases() annotation to resolve sparse
> > >  warnings.
> > > 
> > >  drivers/gpu/drm/i915/display/intel_vblank.c | 51
> > > +--
> > > --
> > >  1 file changed, 41 insertions(+), 10 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > index 2cec2abf9746..fe256bf7b485 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > > @@ -265,6 +265,32 @@ int intel_crtc_scanline_to_hw(struct
> > > intel_crtc
> > > *crtc, int scanline)
> > > return (scanline + vtotal - crtc->scanline_offset) %
> > > vtotal;
> > >  }
> > >  
> > > +/*
> > > + * The uncore version of the spin lock functions is used to
> > > decide
> > > + * whether we need to lock the uncore lock or not.  This is only
> > > + * needed in i915, not in Xe.
> > > + *
> > > + * This lock in i915 is needed because some old platforms (at
> > > least
> > > + * IVB and possibly HSW as well), which are not supported in Xe,
> > > need
> > > + * all register accesses to the same cacheline to be serialized,
> > > + * otherwise they may hang.
> > > + */
> > > +static void intel_vblank_section_enter(struct drm_i915_private
> > > *i915)
> > > +   __acquires(i915->uncore.lock)
> > > +{
> > > +#ifdef I915
> > > +   spin_lock(>uncore.lock);
> > > +#endif
> > > +}
> > > +
> > > +static void intel_vblank_section_exit(struct drm_i915_private
> > > *i915)
> > > +   __releases(i915->uncore.lock)
> > > +{
> > > +#ifdef I915
> > > +   spin_unlock(>uncore.lock);
> > > +#endif
> > > +}
> > > +
> > 
> > Why don't you move these into gpu/drm/i915/intel_uncore.c/h? Then
> > you
> > could have empty defines/functions for these in gpu/drm/xe/compat-
> > i915-
> > headers/intel_uncore.h. That way you don't need these ifdefs. If
> > you
> > move them as I proposed you should rename them as well.
> 
> We already went forth and back with this for some time.  In the end
> we
> agreed that this is not related to uncore directly, so we decided to
> keep it here.
> 
> We also agreed that I'll make a follow-up patch where it won't be
> only
> the lock that will be handled by this, but also enabling/disabling
> interrupts, which doesn't have anything to do with uncore, thus the
> name of the function.

Ok, thank you for the clarification:

Reviewed-by: Jouni Högander 

> 
> 
> --
> Cheers,
> Luca.

[Intel-gfx] [PULL] drm-misc-next

[Maxime Ripard]

Hi Dave, Sima,

Here's this week drm-misc-next PR

Maxime

drm-misc-next-2023-12-07:
drm-misc-next for 6.8:

UAPI Changes:
  - Remove Userspace Mode-Setting ioctls
  - v3d: New uapi to handle jobs involving the CPU

Cross-subsystem Changes:

Core Changes:
  - atomic: Add support for FB-less planes which got reverted a bit
later for lack of IGT tests and userspace code, Dump private objects
state in drm_state_dump.
  - dma-buf: Add fence deadline support
  - encoder: Create per-encoder debugfs directory, move the bridge chain
file to that directory

Driver Changes:
  - Include drm_auth.h in driver that use it but don't include it, Drop
drm_plane_helper.h from drivers that include it but don't use it
  - imagination: Plenty of small fixes
  - panfrost: Improve interrupt handling at poweroff
  - qaic: Convert to persistent DRM devices
  - tidss: Support for the AM62A7, a few probe improvements, some cleanups
  - v3d: Support for jobs involving the CPU

  - bridge:
- Create transparent aux-bridge for DP/USB-C
- lt8912b: Add suspend/resume support and power regulator support

  - panel:
- himax-hx8394: Drop prepare, unprepare and shutdown logic, Support
  panel rotation
- New panels: BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G,
  Evervision VGG644804, SDC ATNA45AF01
The following changes since commit a13fee31f56449fc600d9e064c7b32302f92dcef:

  Merge v6.7-rc3 into drm-next (2023-11-28 11:55:56 +0100)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-2023-12-07

for you to fetch changes up to 90d50b8d85834e73536fdccd5aa913b30494fef0:

  drm/mipi-dsi: Fix detach call without attach (2023-12-07 09:22:47 +0200)


drm-misc-next for 6.8:

UAPI Changes:
  - Remove Userspace Mode-Setting ioctls
  - v3d: New uapi to handle jobs involving the CPU

Cross-subsystem Changes:

Core Changes:
  - atomic: Add support for FB-less planes which got reverted a bit
later for lack of IGT tests and userspace code, Dump private objects
state in drm_state_dump.
  - dma-buf: Add fence deadline support
  - encoder: Create per-encoder debugfs directory, move the bridge chain
file to that directory

Driver Changes:
  - Include drm_auth.h in driver that use it but don't include it, Drop
drm_plane_helper.h from drivers that include it but don't use it
  - imagination: Plenty of small fixes
  - panfrost: Improve interrupt handling at poweroff
  - qaic: Convert to persistent DRM devices
  - tidss: Support for the AM62A7, a few probe improvements, some cleanups
  - v3d: Support for jobs involving the CPU

  - bridge:
- Create transparent aux-bridge for DP/USB-C
- lt8912b: Add suspend/resume support and power regulator support

  - panel:
- himax-hx8394: Drop prepare, unprepare and shutdown logic, Support
  panel rotation
- New panels: BOE BP101WX1-100, Powkiddy X55, Ampire AM8001280G,
  Evervision VGG644804, SDC ATNA45AF01


Abel Vesa (1):
  drm/panel-edp: Add SDC ATNA45AF01

Abhinav Kumar (2):
  drm: improve the documentation of connector hpd ops
  drm: remove drm_bridge_hpd_disable() from drm_bridge_connector_destroy()

Alex Bee (1):
  dt-bindings: gpu: mali-utgard: Add Rockchip RK3128 compatible

Andrew Davis (1):
  drm/omapdrm: Improve check for contiguous buffers

André Almeida (1):
  drm: Refuse to async flip with atomic prop changes

AngeloGioacchino Del Regno (3):
  drm/panfrost: Ignore core_mask for poweroff and disable PWRTRANS irq
  drm/panfrost: Add gpu_irq, mmu_irq to struct panfrost_device
  drm/panfrost: Synchronize and disable interrupts before powering off

Aradhya Bhatia (2):
  dt-bindings: display: ti: Add support for am62a7 dss
  drm/tidss: Add support for AM62A7 DSS

Arnd Bergmann (1):
  drm/imagination: move update_logtype() into ifdef section

Bert Karwatzki (1):
  drm/sched: Partial revert of "Qualify drm_sched_wakeup() by 
drm_sched_entity_is_ready()"

Boris Brezillon (1):
  drm/gpuvm: Let drm_gpuvm_bo_put() report when the vm_bo object is 
destroyed

Carl Vanderlip (2):
  accel/qaic: Increase number of in_reset states
  accel/qaic: Expand DRM device lifecycle

Chris Morgan (6):
  drm/panel: himax-hx8394: Drop prepare/unprepare tracking
  drm/panel: himax-hx8394: Drop shutdown logic
  dt-bindings: display: Document Himax HX8394 panel rotation
  drm/panel: himax-hx8394: Add Panel Rotation Support
  dt-bindings: display: himax-hx8394: Add Powkiddy X55 panel
  drm/panel: himax-hx8394: Add Support for Powkiddy X55 panel

Colin Ian King (1):
  drm/imagination: Fix a couple of spelling mistakes in literal strings

Dan Carpenter (5):
  drm/imagination: Fix error codes in pvr_device_clk_init()
  drm/imagination: Fix IS_ERR() vs NULL bug in pvr_request_firmware()
   

[Intel-gfx] [PATCH] drm/edid: also call add modes in EDID connector update fallback

[Jani Nikula]

When the separate add modes call was added back in commit c533b5167c7e
("drm/edid: add separate drm_edid_connector_add_modes()"), it failed to
address drm_edid_override_connector_update(). Also call add modes there.

Reported-by: bbaa 
Closes: 
https://lore.kernel.org/r/930e9b4c7d91fdff+29b34d89-8658-4910-966a-c772f320e...@bbaa.fun
Fixes: c533b5167c7e ("drm/edid: add separate drm_edid_connector_add_modes()")
Cc:  # v6.3+
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/drm_edid.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index cb4031d5dcbb..69c68804023f 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2311,7 +2311,8 @@ int drm_edid_override_connector_update(struct 
drm_connector *connector)
 
override = drm_edid_override_get(connector);
if (override) {
-   num_modes = drm_edid_connector_update(connector, override);
+   if (drm_edid_connector_update(connector, override) == 0)
+   num_modes = drm_edid_connector_add_modes(connector);
 
drm_edid_free(override);
 
-- 
2.39.2

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Add intel_fb_bo_framebuffer_fini

[Patchwork]

== Series Details ==

Series: drm/i915/display: Add intel_fb_bo_framebuffer_fini
URL   : https://patchwork.freedesktop.org/series/127482/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13991 -> Patchwork_127482v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/index.html

Participating hosts (36 -> 36)
--

  Additional (1): fi-pnv-d510 
  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_127482v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@basic:
- fi-pnv-d510:NOTRUN -> [SKIP][1] ([fdo#109271]) +32 other tests 
skip
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/fi-pnv-d510/igt@gem_lmem_swapp...@basic.html

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][2] ([i915#8668])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_heartbeat:
- fi-cfl-8109u:   [DMESG-FAIL][3] ([i915#5334]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/fi-cfl-8109u/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_hdmi_inject@inject-audio:
- fi-kbl-guc: [FAIL][5] ([IGT#3]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/fi-kbl-guc/igt@kms_hdmi_inj...@inject-audio.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-c-dp-5:
- bat-adlp-11:[DMESG-FAIL][7] ([i915#6868]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-c-dp-5.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-nv12@pipe-d-dp-5:
- bat-adlp-11:[FAIL][9] ([i915#9666]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-n...@pipe-d-dp-5.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][11] ([i915#8668]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13991/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  
  [IGT#3]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/3
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9666]: https://gitlab.freedesktop.org/drm/intel/issues/9666


Build changes
-

  * Linux: CI_DRM_13991 -> Patchwork_127482v1

  CI-20190529: 20190529
  CI_DRM_13991: f13e9802d9ba176a81962cfa3aa2799a84418b15 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7626: 154b7288552cd7ed3033f8ef396e88d0bd1b7646 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_127482v1: f13e9802d9ba176a81962cfa3aa2799a84418b15 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

14073961a0b3 drm/i915/display: Add intel_fb_bo_framebuffer_fini

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127482v1/index.html

Re: [Intel-gfx] [Intel-xe] [PATCH v7] drm/i915: handle uncore spinlock when not available

[Coelho, Luciano]

On Thu, 2023-12-07 at 08:24 +, Hogander, Jouni wrote:
> On Fri, 2023-12-01 at 12:00 +0200, Luca Coelho wrote:
> > The uncore code may not always be available (e.g. when we build the
> > display code with Xe), so we can't always rely on having the uncore's
> > spinlock.
> > 
> > To handle this, split the spin_lock/unlock_irqsave/restore() into
> > spin_lock/unlock() followed by a call to local_irq_save/restore() and
> > create wrapper functions for locking and unlocking the uncore's
> > spinlock.  In these functions, we have a condition check and only
> > actually try to lock/unlock the spinlock when I915 is defined, and
> > thus uncore is available.
> > 
> > This keeps the ifdefs contained in these new functions and all such
> > logic inside the display code.
> > 
> > Cc: Tvrtko Ursulin 
> > Cc: Jani Nikula 
> > Cc: Ville Syrjala 
> > Cc: Rodrigo Vivi 
> > Signed-off-by: Luca Coelho 
> > ---
> > 
> > 
> > In v2:
> > 
> >    * Renamed uncore_spin_*() to intel_spin_*()
> >    * Corrected the order: save, lock, unlock, restore
> > 
> > In v3:
> > 
> >    * Undid the change to pass drm_i915_private instead of the lock
> >  itself, since we would have to include i915_drv.h and that pulls
> >  in a truckload of other includes.
> > 
> > In v4:
> > 
> >    * After a brief attempt to replace this with a different patch,
> >  we're back to this one;
> >    * Pass drm_i195_private again, and move the functions to
> >  intel_vblank.c, so we don't need to include i915_drv.h in a
> >  header file and it's already included in intel_vblank.c;
> > 
> > In v5:
> > 
> >    * Remove stray include in intel_display.h;
> >    * Remove unnecessary inline modifiers in the new functions.
> > 
> > In v6:
> > 
> >    * Just removed the umlauts from Ville's name, because patchwork
> >  didn't catch my patch and I suspect it was some UTF-8 confusion.
> > 
> > In v7:
> > 
> >    * Add __acquires()/__releases() annotation to resolve sparse
> >  warnings.
> > 
> >  drivers/gpu/drm/i915/display/intel_vblank.c | 51 +--
> > --
> >  1 file changed, 41 insertions(+), 10 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
> > b/drivers/gpu/drm/i915/display/intel_vblank.c
> > index 2cec2abf9746..fe256bf7b485 100644
> > --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> > +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> > @@ -265,6 +265,32 @@ int intel_crtc_scanline_to_hw(struct intel_crtc
> > *crtc, int scanline)
> > return (scanline + vtotal - crtc->scanline_offset) % vtotal;
> >  }
> >  
> > +/*
> > + * The uncore version of the spin lock functions is used to decide
> > + * whether we need to lock the uncore lock or not.  This is only
> > + * needed in i915, not in Xe.
> > + *
> > + * This lock in i915 is needed because some old platforms (at least
> > + * IVB and possibly HSW as well), which are not supported in Xe,
> > need
> > + * all register accesses to the same cacheline to be serialized,
> > + * otherwise they may hang.
> > + */
> > +static void intel_vblank_section_enter(struct drm_i915_private
> > *i915)
> > +   __acquires(i915->uncore.lock)
> > +{
> > +#ifdef I915
> > +   spin_lock(>uncore.lock);
> > +#endif
> > +}
> > +
> > +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> > +   __releases(i915->uncore.lock)
> > +{
> > +#ifdef I915
> > +   spin_unlock(>uncore.lock);
> > +#endif
> > +}
> > +
> 
> Why don't you move these into gpu/drm/i915/intel_uncore.c/h? Then you
> could have empty defines/functions for these in gpu/drm/xe/compat-i915-
> headers/intel_uncore.h. That way you don't need these ifdefs. If you
> move them as I proposed you should rename them as well.

We already went forth and back with this for some time.  In the end we
agreed that this is not related to uncore directly, so we decided to
keep it here.

We also agreed that I'll make a follow-up patch where it won't be only
the lock that will be handled by this, but also enabling/disabling
interrupts, which doesn't have anything to do with uncore, thus the
name of the function.


--
Cheers,
Luca.

[Intel-gfx] [PULL] drm-intel-fixes

[Jani Nikula]

Hi Dave & Sima -

Fixes for -rc5. This includes [1] from last week.

BR,
Jani.


[1] https://lore.kernel.org/r/87fs0m48ol@intel.com




drm-intel-fixes-2023-12-07:
drm/i915 fixes for v6.7-rc5:
- d21a3962d304 ("drm/i915: Call intel_pre_plane_updates() also for pipes
  getting enabled") in the previous fixes pull depends on a change that
  wasn't included. Pick it up.
- Relax BXT/GLK DSI transcoder hblank limits
- Fix DP MST .mode_valid_ctx() return values
- Reject DP MST modes that require bigjoiner (as it's not yet supported on DP 
MST)
- Fix _intel_dsb_commit() variable type to allow negative values

BR,
Jani.

The following changes since commit d21a3962d3042e6f56ad324cf18bdd64a1e6ecfa:

  drm/i915: Call intel_pre_plane_updates() also for pipes getting enabled 
(2023-11-29 10:23:25 +0200)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-fixes-2023-12-07

for you to fetch changes up to 9f269070abe9c45dc60abc84e29326f855317eac:

  drm/i915: correct the input parameter on _intel_dsb_commit() (2023-12-05 
10:43:07 +0200)


drm/i915 fixes for v6.7-rc5:
- d21a3962d304 ("drm/i915: Call intel_pre_plane_updates() also for pipes
  getting enabled") in the previous fixes pull depends on a change that
  wasn't included. Pick it up.
- Relax BXT/GLK DSI transcoder hblank limits
- Fix DP MST .mode_valid_ctx() return values
- Reject DP MST modes that require bigjoiner (as it's not yet supported on DP 
MST)
- Fix _intel_dsb_commit() variable type to allow negative values


Ville Syrjälä (4):
  drm/i915: Check pipe active state in {planes,vrr}_{enabling,disabling}()
  drm/i915: Skip some timing checks on BXT/GLK DSI transcoders
  drm/i915/mst: Fix .mode_valid_ctx() return values
  drm/i915/mst: Reject modes that require the bigjoiner

heminhong (1):
  drm/i915: correct the input parameter on _intel_dsb_commit()

 drivers/gpu/drm/i915/display/icl_dsi.c   |  7 +++
 drivers/gpu/drm/i915/display/intel_crt.c |  5 +
 drivers/gpu/drm/i915/display/intel_display.c | 22 ++
 drivers/gpu/drm/i915/display/intel_display.h |  3 +++
 drivers/gpu/drm/i915/display/intel_dp.c  |  4 
 drivers/gpu/drm/i915/display/intel_dp_mst.c  | 20 
 drivers/gpu/drm/i915/display/intel_dsb.c |  2 +-
 drivers/gpu/drm/i915/display/intel_dvo.c |  6 ++
 drivers/gpu/drm/i915/display/intel_hdmi.c|  4 
 drivers/gpu/drm/i915/display/intel_lvds.c|  5 +
 drivers/gpu/drm/i915/display/intel_sdvo.c|  8 +++-
 drivers/gpu/drm/i915/display/intel_tv.c  |  8 +++-
 drivers/gpu/drm/i915/display/vlv_dsi.c   | 18 +-
 13 files changed, 104 insertions(+), 8 deletions(-)

-- 
Jani Nikula, Intel

Re: [Intel-gfx] [PATCH RESEND AGAIN v2 0/2] Add drm_dbg_ratelimited()

[Andi Shyti]

Hi Thomas and Maxime,

thanks for the answer,

On Thu, Dec 07, 2023 at 10:10:55AM +0100, Maxime Ripard wrote:
> On Wed, Dec 06, 2023 at 10:09:46PM +0100, Andi Shyti wrote:
> > This is the second time I am resending this series in its v2. It
> > has been reviewd, acked, blessed, discussed, rectified, assessed,
> > authorized, validated, glorified, praised, demanded, approved,
> > and yet, I don't understand why no one is merging it.
> 
> $ ./scripts/get_maintainer.pl -f drivers/gpu/drm/i915/
> Jani Nikula  (supporter:INTEL DRM DRIVERS 
> (excluding Poulsbo, Moorestow...)
> Joonas Lahtinen  (supporter:INTEL DRM 
> DRIVERS (excluding Poulsbo, Moorestow...)
> Rodrigo Vivi  (supporter:INTEL DRM DRIVERS (excluding 
> Poulsbo, Moorestow...)
> Tvrtko Ursulin  (supporter:INTEL DRM DRIVERS 
> (excluding Poulsbo, Moorestow...)
> David Airlie  (maintainer:DRM DRIVERS)
> Daniel Vetter  (maintainer:DRM DRIVERS)
> intel-gfx@lists.freedesktop.org (open list:INTEL DRM DRIVERS (excluding 
> Poulsbo, Moorestow...)
> dri-de...@lists.freedesktop.org (open list:DRM DRIVERS)
> linux-ker...@vger.kernel.org (open list)
> 
> You've Cc'd none of the i915 maintainers, that's why it's been stuck.
> 
> Jani, Joonas, Rodrigo, Tvrtko, could you have a look at this?

The main change here is in drm_print.h, though and there is just
an example of usage in i915. I though this should go through the
drm branch.

Is it OK if I push it in drm-intel-next?

Thanks,
Andi

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Revert "debugfs: annotate debugfs handlers vs. removal with lockdep" (rev2)

[Illipilli, TejasreeX]

Hi, 

https://patchwork.freedesktop.org/series/127359/ - Re-reported

Thanks,
Tejasree

-Original Message-
From: Saarinen, Jani  
Sent: Thursday, December 7, 2023 1:04 AM
To: intel-gfx@lists.freedesktop.org; Borah, Chaitanya Kumar 
; LGCI Bug Filing 
Subject: RE: [Intel-gfx] ✗ Fi.CI.BAT: failure for Revert "debugfs: annotate 
debugfs handlers vs. removal with lockdep" (rev2)

Hi. 

> -Original Message-
> From: Intel-gfx  On Behalf Of 
> Patchwork
> Sent: Wednesday, December 6, 2023 9:58 AM
> To: Borah, Chaitanya Kumar 
> Cc: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] ✗ Fi.CI.BAT: failure for Revert "debugfs: 
> annotate debugfs handlers vs. removal with lockdep" (rev2)
> 
> Patch Details
> Series:   Revert "debugfs: annotate debugfs handlers vs. removal with 
> lockdep"
> (rev2)
> URL:  https://patchwork.freedesktop.org/series/127359/
> State:failure
> Details:  
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/index.html
> 
> 
> CI Bug Log - changes from CI_DRM_13983 -> Patchwork_127359v2
> 
> 
> Summary
> 
> 
> FAILURE
> 
> Serious unknown changes coming with Patchwork_127359v2 absolutely need 
> to be verified manually.
> 
> If you think the reported changes have nothing to do with the changes 
> introduced in Patchwork_127359v2, please notify your bug team 
> (I915-ci-
> in...@lists.freedesktop.org) to allow them to document this new 
> failure mode, which will reduce false positives in CI.
> 
> External URL: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_127359v2/index.html
> 
> 
> Participating hosts (35 -> 36)
> 
> 
> Additional (2): bat-dg2-8 bat-mtlp-8
> Missing (1): fi-snb-2520m
> 
> 
> Possible new issues
> 
> 
> Here are the unknown changes that may have been introduced in
> Patchwork_127359v2:
> 
> 
> IGT changes
> 
> 
> Possible regressions
> 
> 
> * igt@kms_pipe_crc_basic@suspend-read-crc:
> 
>   *   bat-mtlp-6: NOTRUN -> SKIP  ci.01.org/tree/drm-tip/Patchwork_127359v2/bat-mtlp-
> 6/igt@kms_pipe_crc_ba...@suspend-read-crc.html>
> 
> * igt@kms_psr@psr_cursor_plane_move:
Has been always skipping: 
https://intel-gfx-ci.01.org/tree/drm-tip/bat-all.html?testfilter=suspend-read-crc=mtlp-6
 
> 
>   *   bat-mtlp-8: NOTRUN -> SKIP  ci.01.org/tree/drm-tip/Patchwork_127359v2/bat-mtlp-
> 8/igt@kms_psr@psr_cursor_plane_move.html>  +3 other tests skip
Has been always skipping: 
https://intel-gfx-ci.01.org/tree/drm-tip/bat-all.html?testfilter=psr_cursor_plane_move=mtlp-8
 

No issues caused by patch. Bug-filing team, please report

> 
> 
> New tests
> 
> 
> New tests have been introduced between CI_DRM_13983 and
> Patchwork_127359v2:
> 
> 
> New IGT tests (12)
> 
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-a-dp-
> 7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-
> 7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-
> 7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-a-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-7:
> 
>   *   Statuses : 1 abort(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@read-crc@pipe-a-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@read-crc@pipe-c-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> * igt@kms_pipe_crc_basic@read-crc@pipe-d-dp-7:
> 
>   *   Statuses : 1 pass(s)
>   *   Exec time: [0.0] s
> 
> 
> Known issues
> 
> 
> Here are the changes found in Patchwork_127359v2 that come from known
> issues:
> 
> 
> IGT changes
> 
> 
> Issues hit
> 
> 
> * igt@debugfs_test@basic-hwmon:
> 
>   *   bat-mtlp-8: NOTRUN -> SKIP  ci.01.org/tree/drm-tip/Patchwork_127359v2/bat-mtlp-
> 8/igt@debugfs_t...@basic-hwmon.html>  (i915#9318 
>  )
> 
> * igt@gem_lmem_swapping@basic:
> 
>   *   fi-apl-guc: NOTRUN -> SKIP 
> 

[Intel-gfx] ✓ Fi.CI.BAT: success for Revert "debugfs: annotate debugfs handlers vs. removal with lockdep" (rev2)

[Patchwork]

== Series Details ==

Series: Revert "debugfs: annotate debugfs handlers vs. removal with lockdep" 
(rev2)
URL   : https://patchwork.freedesktop.org/series/127359/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13983 -> Patchwork_127359v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/index.html

Participating hosts (35 -> 36)
--

  Additional (2): bat-dg2-8 bat-mtlp-8 
  Missing(1): fi-snb-2520m 

New tests
-

  New tests have been introduced between CI_DRM_13983 and Patchwork_127359v2:

### New IGT tests (12) ###

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-a-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-c-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence@pipe-d-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-a-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-c-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@nonblocking-crc@pipe-d-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-a-dp-7:
- Statuses : 1 abort(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-c-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@read-crc@pipe-a-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@read-crc@pipe-c-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  * igt@kms_pipe_crc_basic@read-crc@pipe-d-dp-7:
- Statuses : 1 pass(s)
- Exec time: [0.0] s

  

Known issues


  Here are the changes found in Patchwork_127359v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_lmem_swapping@basic:
- fi-apl-guc: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/fi-apl-guc/igt@gem_lmem_swapp...@basic.html
- bat-jsl-3:  NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/bat-jsl-3/igt@gem_lmem_swapp...@basic.html
- fi-glk-j4005:   NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html
- bat-adlp-9: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/bat-adlp-9/igt@gem_lmem_swapp...@basic.html
- fi-skl-guc: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/fi-skl-guc/igt@gem_lmem_swapp...@basic.html
- fi-kbl-7567u:   NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/fi-kbl-7567u/igt@gem_lmem_swapp...@basic.html
- fi-cfl-8700k:   NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 
other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/fi-cfl-8700k/igt@gem_lmem_swapp...@basic.html
- fi-elk-e7500:   NOTRUN -> [SKIP][9] ([fdo#109271]) +4 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/fi-elk-e7500/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-bsw-nick:NOTRUN -> [SKIP][10] ([fdo#109271]) +3 other tests 
skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/fi-bsw-nick/igt@gem_lmem_swapp...@parallel-random-engines.html
- bat-kbl-2:  NOTRUN -> [SKIP][11] ([fdo#109271]) +4 other tests 
skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html
- fi-rkl-11600:   NOTRUN -> [SKIP][12] ([i915#4613]) +3 other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127359v2/fi-rkl-11600/igt@gem_lmem_swapp...@parallel-random-engines.html
- fi-tgl-1115g4:  NOTRUN -> [SKIP][13] ([i915#4613]) +3 other tests skip
   [13]: 

[Intel-gfx] ✗ Fi.CI.IGT: failure for Implement CMRR Support (rev6)

[Patchwork]

== Series Details ==

Series: Implement CMRR Support (rev6)
URL   : https://patchwork.freedesktop.org/series/126443/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13983_full -> Patchwork_126443v6_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_126443v6_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_126443v6_full, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (8 -> 8)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_126443v6_full:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@perf@region:
- shard-mtlp: [PASS][1] -> [DMESG-WARN][2] +1 other test dmesg-warn
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13983/shard-mtlp-4/igt@i915_selftest@p...@region.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-2/igt@i915_selftest@p...@region.html

  * igt@kms_display_modes@extended-mode-basic@pipe-a-hdmi-a-1-pipe-b-vga-1:
- shard-snb:  NOTRUN -> [FAIL][3] +3 other tests fail
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-snb7/igt@kms_display_modes@extended-mode-ba...@pipe-a-hdmi-a-1-pipe-b-vga-1.html

  
Known issues


  Here are the changes found in Patchwork_126443v6_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@api_intel_bb@object-reloc-purge-cache:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#8411])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@api_intel...@object-reloc-purge-cache.html

  * igt@device_reset@cold-reset-bound:
- shard-mtlp: NOTRUN -> [SKIP][5] ([i915#7701])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@device_re...@cold-reset-bound.html

  * igt@device_reset@unbind-reset-rebind:
- shard-dg2:  NOTRUN -> [ABORT][6] ([i915#8668])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-dg2-10/igt@device_re...@unbind-reset-rebind.html
- shard-mtlp: NOTRUN -> [ABORT][7] ([i915#8668])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-4/igt@device_re...@unbind-reset-rebind.html

  * igt@drm_fdinfo@virtual-busy-idle:
- shard-mtlp: NOTRUN -> [SKIP][8] ([i915#8414]) +6 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@drm_fdi...@virtual-busy-idle.html

  * igt@gem_caching@reads:
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#4873])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-6/igt@gem_cach...@reads.html

  * igt@gem_ccs@block-multicopy-compressed:
- shard-rkl:  NOTRUN -> [SKIP][10] ([i915#9323])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-rkl-4/igt@gem_...@block-multicopy-compressed.html

  * igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-mtlp: NOTRUN -> [SKIP][11] ([i915#6335])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-6/igt@gem_cre...@create-ext-cpu-access-sanity-check.html

  * igt@gem_eio@kms:
- shard-dg1:  NOTRUN -> [FAIL][12] ([i915#5784])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-dg1-13/igt@gem_...@kms.html

  * igt@gem_exec_balancer@bonded-semaphore:
- shard-dg2:  NOTRUN -> [SKIP][13] ([i915#4812])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-dg2-6/igt@gem_exec_balan...@bonded-semaphore.html

  * igt@gem_exec_balancer@invalid-bonds:
- shard-mtlp: NOTRUN -> [SKIP][14] ([i915#4036])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@gem_exec_balan...@invalid-bonds.html

  * igt@gem_exec_balancer@parallel-contexts:
- shard-rkl:  NOTRUN -> [SKIP][15] ([i915#4525])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-rkl-4/igt@gem_exec_balan...@parallel-contexts.html

  * igt@gem_exec_capture@many-4k-incremental:
- shard-mtlp: NOTRUN -> [FAIL][16] ([i915#9606])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-mtlp-5/igt@gem_exec_capt...@many-4k-incremental.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-rkl:  NOTRUN -> [FAIL][17] ([i915#2842])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/shard-rkl-4/igt@gem_exec_fair@basic-none-r...@rcs0.html

  * igt@gem_exec_fair@basic-none-solo:
- shard-mtlp: NOTRUN -> 

Re: [Intel-gfx] [PATCH RESEND AGAIN v2 0/2] Add drm_dbg_ratelimited()

[Maxime Ripard]

On Wed, Dec 06, 2023 at 10:09:46PM +0100, Andi Shyti wrote:
> This is the second time I am resending this series in its v2. It
> has been reviewd, acked, blessed, discussed, rectified, assessed,
> authorized, validated, glorified, praised, demanded, approved,
> and yet, I don't understand why no one is merging it.

$ ./scripts/get_maintainer.pl -f drivers/gpu/drm/i915/
Jani Nikula  (supporter:INTEL DRM DRIVERS 
(excluding Poulsbo, Moorestow...)
Joonas Lahtinen  (supporter:INTEL DRM DRIVERS 
(excluding Poulsbo, Moorestow...)
Rodrigo Vivi  (supporter:INTEL DRM DRIVERS (excluding 
Poulsbo, Moorestow...)
Tvrtko Ursulin  (supporter:INTEL DRM DRIVERS 
(excluding Poulsbo, Moorestow...)
David Airlie  (maintainer:DRM DRIVERS)
Daniel Vetter  (maintainer:DRM DRIVERS)
intel-gfx@lists.freedesktop.org (open list:INTEL DRM DRIVERS (excluding 
Poulsbo, Moorestow...)
dri-de...@lists.freedesktop.org (open list:DRM DRIVERS)
linux-ker...@vger.kernel.org (open list)

You've Cc'd none of the i915 maintainers, that's why it's been stuck.

Jani, Joonas, Rodrigo, Tvrtko, could you have a look at this?

Maxime


signature.asc
Description: PGP signature

Re: [Intel-gfx] [PATCH RESEND AGAIN v2 0/2] Add drm_dbg_ratelimited()

[Thomas Zimmermann]

Hi

Am 06.12.23 um 22:09 schrieb Andi Shyti:

Hi,

This is the second time I am resending this series in its v2. It
has been reviewd, acked, blessed, discussed, rectified, assessed,
authorized, validated, glorified, praised, demanded, approved,
and yet, I don't understand why no one is merging it.


I think it should go through the Intel tree.

Best regards
Thomas



Thanks,
Andi

v2:
pick the right patch with the following changes:
  - add more r-b's
  - add a patch 2 where the drm_dbg_ratelimited is actually used.

Nirmoy Das (2):
   drm/print: Add drm_dbg_ratelimited
   drm/i915: Ratelimit debug log in vm_fault_ttm

  drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 5 +++--
  include/drm/drm_print.h | 3 +++
  2 files changed, 6 insertions(+), 2 deletions(-)



--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstrasse 146, 90461 Nuernberg, Germany
GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman
HRB 36809 (AG Nuernberg)


OpenPGP_signature.asc
Description: OpenPGP digital signature

[Intel-gfx] [drm-intel:drm-intel-gt-next] [drm/i915] [confidence: ] 9bb66c179f: assertion_failure

[kernel test robot]

Hello,

kernel test robot noticed "assertion_failure" on:

commit: 9bb66c179f50e61df20ba13c9b34ca17d00b05fb ("drm/i915: Reserve some 
kernel space per vm")
git://anongit.freedesktop.org/drm-intel drm-intel-gt-next

in testcase: igt
version: igt-x86_64-0f075441-1_20230520
with following parameters:

group: group-04



compiler: gcc-12
test machine: 20 threads 1 sockets (Commet Lake) with 16G memory

(please refer to attached dmesg/kmsg for entire log/backtrace)


we also observed below tests failed upon this commit while pass on parent.

8aa519f17512da50 9bb66c179f50e61df20ba13c9b3
 ---
   fail:runs  %reproductionfail:runs
   | | |
   :6  100%   6:6 
igt.api_intel_bb.bb-with-allocator.fail
   :6  100%   6:6 
igt.api_intel_bb.blit-noreloc-keep-cache.fail
   :6  100%   6:6 
igt.api_intel_bb.blit-noreloc-purge-cache.fail
   :6  100%   6:6 
igt.api_intel_bb.blit-reloc-purge-cache.fail
   :6  100%   6:6 igt.api_intel_bb.delta-check.fail
   :6  100%   6:6 
igt.api_intel_bb.object-noreloc-keep-cache-simple.fail
   :6  100%   6:6 
igt.api_intel_bb.object-noreloc-purge-cache-simple.fail
   :6   83%   5:6 
igt.api_intel_bb.object-reloc-purge-cache.fail
   :6  100%   6:6 
igt.api_intel_bb.simple-bb-ctx.fail
   :6  100%   6:6 igt.api_intel_bb.simple-bb.fail



If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot 
| Closes: 
https://lore.kernel.org/oe-lkp/202312071643.321205c6-oliver.s...@intel.com


[   43.922756][  T447]
[   43.935008][  T447] IGT-Version: 1.27.1-g0f075441 (x86_64) (Linux: 
6.6.0-rc7-01579-g9bb66c179f50 x86_64)
[   43.935018][  T447]
[   43.947248][  T447] Starting subtest: bb-with-allocator
[   43.947258][  T447]
[   43.956752][  T447] (api_intel_bb:857) intel_batchbuffer-CRITICAL: Test 
assertion failure function __intel_bb_add_object, file 
../lib/intel_batchbuffer.c:1673:
[   43.956762][  T447]
[   43.974467][  T447] (api_intel_bb:857) intel_batchbuffer-CRITICAL: Failed 
assertion: allocated || reserved
[   43.974477][  T447]
[   43.987691][  T447] (api_intel_bb:857) intel_batchbuffer-CRITICAL: Can't get 
offset, allocated: 0, reserved: 0
[   43.987706][  T447]


The kernel config and materials to reproduce are available at:
https://download.01.org/0day-ci/archive/20231207/202312071643.321205c6-oliver.s...@intel.com



-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

[Intel-gfx] [PATCH] drm/i915/display: Add intel_fb_bo_framebuffer_fini

[Jouni Högander]

Xe needs intel_fb_bo_framebuffer_fini for taking care of unpinning the fb
and taking reference.  In i915 this can be empty.

Also move intel_frontbuffer_get to be done after
intel_fb_bo_framebuffer_init to have reasonable sequences:

intel_fb_bo_framebuffer_init
intel_frontbuffer_get
...
intel_frontbuffer_put
intel_fb_bo_framebuffer_fini

v2: Empty function instead of define

Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/i915/display/intel_fb.c| 32 +-
 drivers/gpu/drm/i915/display/intel_fb_bo.c |  5 
 drivers/gpu/drm/i915/display/intel_fb_bo.h |  2 ++
 3 files changed, 26 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_fb.c 
b/drivers/gpu/drm/i915/display/intel_fb.c
index ab634a4c86d1..69c3cfe3120e 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -1889,6 +1889,8 @@ static void intel_user_framebuffer_destroy(struct 
drm_framebuffer *fb)
 
intel_frontbuffer_put(intel_fb->frontbuffer);
 
+   intel_fb_bo_framebuffer_fini(intel_fb_obj(fb));
+
kfree(intel_fb);
 }
 
@@ -1989,13 +1991,15 @@ int intel_framebuffer_init(struct intel_framebuffer 
*intel_fb,
int ret = -EINVAL;
int i;
 
-   intel_fb->frontbuffer = intel_frontbuffer_get(obj);
-   if (!intel_fb->frontbuffer)
-   return -ENOMEM;
-
ret = intel_fb_bo_framebuffer_init(intel_fb, obj, mode_cmd);
if (ret)
+   return ret;
+
+   intel_fb->frontbuffer = intel_frontbuffer_get(obj);
+   if (!intel_fb->frontbuffer) {
+   ret = -ENOMEM;
goto err;
+   }
 
ret = -EINVAL;
if (!drm_any_plane_has_format(_priv->drm,
@@ -2004,7 +2008,7 @@ int intel_framebuffer_init(struct intel_framebuffer 
*intel_fb,
drm_dbg_kms(_priv->drm,
"unsupported pixel format %p4cc / modifier 
0x%llx\n",
_cmd->pixel_format, mode_cmd->modifier[0]);
-   goto err;
+   goto err_frontbuffer_put;
}
 
max_stride = intel_fb_max_stride(dev_priv, mode_cmd->pixel_format,
@@ -2015,7 +2019,7 @@ int intel_framebuffer_init(struct intel_framebuffer 
*intel_fb,
mode_cmd->modifier[0] != DRM_FORMAT_MOD_LINEAR ?
"tiled" : "linear",
mode_cmd->pitches[0], max_stride);
-   goto err;
+   goto err_frontbuffer_put;
}
 
/* FIXME need to adjust LINOFF/TILEOFF accordingly. */
@@ -2023,7 +2027,7 @@ int intel_framebuffer_init(struct intel_framebuffer 
*intel_fb,
drm_dbg_kms(_priv->drm,
"plane 0 offset (0x%08x) must be 0\n",
mode_cmd->offsets[0]);
-   goto err;
+   goto err_frontbuffer_put;
}
 
drm_helper_mode_fill_fb_struct(_priv->drm, fb, mode_cmd);
@@ -2034,7 +2038,7 @@ int intel_framebuffer_init(struct intel_framebuffer 
*intel_fb,
if (mode_cmd->handles[i] != mode_cmd->handles[0]) {
drm_dbg_kms(_priv->drm, "bad plane %d handle\n",
i);
-   goto err;
+   goto err_frontbuffer_put;
}
 
stride_alignment = intel_fb_stride_alignment(fb, i);
@@ -2042,7 +2046,7 @@ int intel_framebuffer_init(struct intel_framebuffer 
*intel_fb,
drm_dbg_kms(_priv->drm,
"plane %d pitch (%d) must be at least %u 
byte aligned\n",
i, fb->pitches[i], stride_alignment);
-   goto err;
+   goto err_frontbuffer_put;
}
 
if (intel_fb_is_gen12_ccs_aux_plane(fb, i)) {
@@ -2053,7 +2057,7 @@ int intel_framebuffer_init(struct intel_framebuffer 
*intel_fb,
"ccs aux plane %d pitch (%d) must 
be %d\n",
i,
fb->pitches[i], ccs_aux_stride);
-   goto err;
+   goto err_frontbuffer_put;
}
}
 
@@ -2062,7 +2066,7 @@ int intel_framebuffer_init(struct intel_framebuffer 
*intel_fb,
 
ret = intel_fill_fb_info(dev_priv, intel_fb);
if (ret)
-   goto err;
+   goto err_frontbuffer_put;
 
if (intel_fb_uses_dpt(fb)) {
struct i915_address_space *vm;
@@ -2071,7 +2075,7 @@ int intel_framebuffer_init(struct intel_framebuffer 
*intel_fb,
if (IS_ERR(vm)) {
drm_dbg_kms(_priv->drm, "failed to create DPT\n");
ret = PTR_ERR(vm);
-   goto err;
+   goto err_frontbuffer_put;
}
 

Re: [Intel-gfx] [PATCH v7] drm/i915: handle uncore spinlock when not available

[Hogander, Jouni]

On Fri, 2023-12-01 at 12:00 +0200, Luca Coelho wrote:
> The uncore code may not always be available (e.g. when we build the
> display code with Xe), so we can't always rely on having the uncore's
> spinlock.
> 
> To handle this, split the spin_lock/unlock_irqsave/restore() into
> spin_lock/unlock() followed by a call to local_irq_save/restore() and
> create wrapper functions for locking and unlocking the uncore's
> spinlock.  In these functions, we have a condition check and only
> actually try to lock/unlock the spinlock when I915 is defined, and
> thus uncore is available.
> 
> This keeps the ifdefs contained in these new functions and all such
> logic inside the display code.
> 
> Cc: Tvrtko Ursulin 
> Cc: Jani Nikula 
> Cc: Ville Syrjala 
> Cc: Rodrigo Vivi 
> Signed-off-by: Luca Coelho 
> ---
> 
> 
> In v2:
> 
>    * Renamed uncore_spin_*() to intel_spin_*()
>    * Corrected the order: save, lock, unlock, restore
> 
> In v3:
> 
>    * Undid the change to pass drm_i915_private instead of the lock
>  itself, since we would have to include i915_drv.h and that pulls
>  in a truckload of other includes.
> 
> In v4:
> 
>    * After a brief attempt to replace this with a different patch,
>  we're back to this one;
>    * Pass drm_i195_private again, and move the functions to
>  intel_vblank.c, so we don't need to include i915_drv.h in a
>  header file and it's already included in intel_vblank.c;
> 
> In v5:
> 
>    * Remove stray include in intel_display.h;
>    * Remove unnecessary inline modifiers in the new functions.
> 
> In v6:
> 
>    * Just removed the umlauts from Ville's name, because patchwork
>  didn't catch my patch and I suspect it was some UTF-8 confusion.
> 
> In v7:
> 
>    * Add __acquires()/__releases() annotation to resolve sparse
>  warnings.
> 
>  drivers/gpu/drm/i915/display/intel_vblank.c | 51 +--
> --
>  1 file changed, 41 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
> b/drivers/gpu/drm/i915/display/intel_vblank.c
> index 2cec2abf9746..fe256bf7b485 100644
> --- a/drivers/gpu/drm/i915/display/intel_vblank.c
> +++ b/drivers/gpu/drm/i915/display/intel_vblank.c
> @@ -265,6 +265,32 @@ int intel_crtc_scanline_to_hw(struct intel_crtc
> *crtc, int scanline)
> return (scanline + vtotal - crtc->scanline_offset) % vtotal;
>  }
>  
> +/*
> + * The uncore version of the spin lock functions is used to decide
> + * whether we need to lock the uncore lock or not.  This is only
> + * needed in i915, not in Xe.
> + *
> + * This lock in i915 is needed because some old platforms (at least
> + * IVB and possibly HSW as well), which are not supported in Xe,
> need
> + * all register accesses to the same cacheline to be serialized,
> + * otherwise they may hang.
> + */
> +static void intel_vblank_section_enter(struct drm_i915_private
> *i915)
> +   __acquires(i915->uncore.lock)
> +{
> +#ifdef I915
> +   spin_lock(>uncore.lock);
> +#endif
> +}
> +
> +static void intel_vblank_section_exit(struct drm_i915_private *i915)
> +   __releases(i915->uncore.lock)
> +{
> +#ifdef I915
> +   spin_unlock(>uncore.lock);
> +#endif
> +}
> +

Why don't you move these into gpu/drm/i915/intel_uncore.c/h? Then you
could have empty defines/functions for these in gpu/drm/xe/compat-i915-
headers/intel_uncore.h. That way you don't need these ifdefs. If you
move them as I proposed you should rename them as well.


BR,

Jouni Högander

>  static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
>  bool in_vblank_irq,
>  int *vpos, int *hpos,
> @@ -302,11 +328,12 @@ static bool i915_get_crtc_scanoutpos(struct
> drm_crtc *_crtc,
> }
>  
> /*
> -    * Lock uncore.lock, as we will do multiple timing critical
> raw
> -    * register reads, potentially with preemption disabled, so
> the
> -    * following code must not block on uncore.lock.
> +    * Enter vblank critical section, as we will do multiple
> +    * timing critical raw register reads, potentially with
> +    * preemption disabled, so the following code must not block.
>  */
> -   spin_lock_irqsave(_priv->uncore.lock, irqflags);
> +   local_irq_save(irqflags);
> +   intel_vblank_section_enter(dev_priv);
>  
> /* preempt_disable_rt() should go right here in PREEMPT_RT
> patchset. */
>  
> @@ -374,7 +401,8 @@ static bool i915_get_crtc_scanoutpos(struct
> drm_crtc *_crtc,
>  
> /* preempt_enable_rt() should go right here in PREEMPT_RT
> patchset. */
>  
> -   spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
> +   intel_vblank_section_exit(dev_priv);
> +   local_irq_restore(irqflags);
>  
> /*
>  * While in vblank, position will be negative
> @@ -412,9 +440,13 @@ int intel_get_crtc_scanline(struct intel_crtc
> *crtc)
> unsigned long irqflags;
> int position;
>  
> -   

[Intel-gfx] ✓ Fi.CI.BAT: success for Implement CMRR Support (rev6)

[Patchwork]

== Series Details ==

Series: Implement CMRR Support (rev6)
URL   : https://patchwork.freedesktop.org/series/126443/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13983 -> Patchwork_126443v6


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/index.html

Participating hosts (35 -> 35)
--

  Additional (2): bat-dg2-8 bat-mtlp-8 
  Missing(2): fi-apl-guc fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_126443v6 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-adlp-11:[PASS][1] -> [FAIL][2] ([i915#8293])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13983/bat-adlp-11/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-adlp-11/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@core_hotunplug@unbind-rebind:
- bat-mtlp-8: NOTRUN -> [ABORT][3] ([i915#8213] / [i915#8668])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-mtlp-8/igt@core_hotunp...@unbind-rebind.html
- bat-dg2-8:  NOTRUN -> [ABORT][4] ([i915#8213])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-dg2-8/igt@core_hotunp...@unbind-rebind.html

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_mmap@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][6] ([i915#4083])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-mtlp-8/igt@gem_m...@basic.html
- bat-dg2-8:  NOTRUN -> [SKIP][7] ([i915#4083])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-dg2-8/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#4077]) +2 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-mtlp-8/igt@gem_mmap_...@basic.html
- bat-dg2-8:  NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-dg2-8/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4079]) +1 other test skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html

  * igt@gem_tiled_pread_basic:
- bat-dg2-8:  NOTRUN -> [SKIP][11] ([i915#4079]) +1 other test skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-dg2-8/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
- bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#6621])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-mtlp-8/igt@i915_pm_...@basic-api.html
- bat-dg2-8:  NOTRUN -> [SKIP][13] ([i915#6621])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-dg2-8/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#5190])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html
- bat-dg2-8:  NOTRUN -> [SKIP][15] ([i915#5190])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-dg2-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#4212]) +8 other tests skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html
- bat-dg2-8:  NOTRUN -> [SKIP][17] ([i915#4215] / [i915#5190])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-dg2-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- bat-dg2-8:  NOTRUN -> [SKIP][18] ([i915#4212]) +6 other tests skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-dg2-8/igt@kms_addfb_ba...@framebuffer-vs-set-tiling.html

  * igt@kms_addfb_basic@tile-pitch-mismatch:
- bat-dg2-8:  NOTRUN -> [SKIP][19] ([i915#4212] / [i915#5608])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-dg2-8/igt@kms_addfb_ba...@tile-pitch-mismatch.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][20] ([i915#4213]) +1 other test skip
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_126443v6/bat-mtlp-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
- bat-dg2-8:  NOTRUN -> [SKIP][21] ([i915#4103] / [i915#4213] /