RE: ✗ Fi.CI.BAT: failure for drm/i915: Fix HPD handling during driver init/shutdown (rev2)

[Illipilli, TejasreeX]

Hi,

https://patchwork.freedesktop.org/series/128186/ - Re-reported .

Thanks,
Tejasree

-Original Message-
From: Intel-gfx  On Behalf Of Imre Deak
Sent: Thursday, January 4, 2024 9:31 PM
To: intel-gfx@lists.freedesktop.org; i915-ci-in...@lists.freedesktop.org
Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915: Fix HPD handling during driver 
init/shutdown (rev2)

On Thu, Jan 04, 2024 at 02:08:32PM +, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Fix HPD handling during driver init/shutdown (rev2)
> URL   : https://patchwork.freedesktop.org/series/128186/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_14078 -> Patchwork_128186v2 
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_128186v2 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_128186v2, please notify your bug team 
> (i915-ci-in...@lists.freedesktop.org) to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/index.html
> 
> Participating hosts (38 -> 37)
> --
> 
>   Additional (2): bat-rpls-2 fi-pnv-d510 
>   Missing(3): bat-dg2-8 bat-dg2-9 fi-snb-2520m 
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_128186v2:
> 
> ### IGT changes ###
> 
>  Possible regressions 
> 
>   * igt@i915_pm_rpm@module-reload:
> - fi-kbl-7567u:   [PASS][1] -> [DMESG-WARN][2]
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_pm_...@module-reload.html
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-756
> 7u/igt@i915_pm_...@module-reload.html

<7>[  358.803569] i915 :00:02.0: [drm:lspcon_wake_native_aux_ch [i915]] 
Native AUX CH up, DPCD version: 1.2 <7>[  358.804571] i915 :00:02.0: 
[drm:drm_dp_i2c_do_msg [drm_display_helper]] AUX B/DDI B/PHY B: native defer 
<7>[  358.805995] i915 :00:02.0: [drm:drm_dp_i2c_do_msg 
[drm_display_helper]] AUX B/DDI B/PHY B: native defer ...
<7>[  358.823684] i915 :00:02.0: [drm:drm_dp_dual_mode_detect 
[drm_display_helper]] DP dual mode HDMI ID:  (err -121) ...
<7>[  358.925347] i915 :00:02.0: [drm:drm_dp_dual_mode_detect 
[drm_display_helper]] DP dual mode HDMI ID:  (err -121) <7>[  358.925360] i915 
:00:02.0: [drm:lspcon_init [i915]] No LSPCON detected, found unknown <3>[  
358.925619] i915 :00:02.0: [drm] *ERROR* Failed to probe lspcon

Repeating many times, across multiple driver reloads, and then recovering after 
a system suspend/resume:

<7>[  541.293689] [IGT] i915_suspend: executing <7>[  541.302373] [IGT] 
i915_suspend: starting subtest basic-s3-without-i915 ...
<7>[  541.323944] [IGT] Unloading i915
<7>[  542.504357] i915 :00:02.0: [drm:verify_connector_state [i915]] 
[CONNECTOR:121:DP-4] <7>[  544.783852] [IGT] Re-loading i915 ...
<7>[  545.658165] i915 :00:02.0: [drm:lspcon_wake_native_aux_ch [i915]] 
Native AUX CH up, DPCD version: 1.2 <7>[  545.659690] i915 :00:02.0: 
[drm:drm_dp_i2c_do_msg [drm_display_helper]] AUX B/DDI B/PHY B: native defer 
<7>[  545.666846] i915 :00:02.0: [drm:drm_dp_i2c_do_msg 
[drm_display_helper]] AUX B/DDI B/PHY B: native defer ...
<7>[  545.667750] i915 :00:02.0: [drm:drm_dp_dual_mode_detect 
[drm_display_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0) ...
<7>[  545.678538] i915 :00:02.0: [drm:lspcon_init [i915]] LSPCON detected 
...
<7>[  545.679409] i915 :00:02.0: [drm:drm_dp_i2c_do_msg 
[drm_display_helper]] AUX B/DDI B/PHY B: native defer <7>[  545.681121] i915 
:00:02.0: [drm:drm_dp_i2c_do_msg [drm_display_helper]] AUX B/DDI B/PHY B: 
native defer ...
<7>[  545.696955] i915 :00:02.0: [drm:lspcon_init [i915]] Vendor: Mega 
Chips <7>[  545.697221] i915 :00:02.0: [drm:lspcon_init [i915]] Success: 
LSPCON init <7>[  545.697953] i915 :00:02.0: 
[drm:lspcon_detect_hdr_capability [i915]] LSPCON capable of HDR

Looks either the LSPCON FW breaking for some reason after a while, deferring 
all the AUX responses similarly to the working scenarios, but never actually 
completing the AUX request as it does in the working scenarios. This state 
persists across multiple driver reloads and eventually recovering after a 
system suspend/resume. Possible root causes are:

- Some required LSPCON programming done by BIOS/GOP but unknown to i915 getting
  lost across power state transitions
- LSPCON getting confused by some i915 programming (via AUX DPCD)
- Firmware bug, missing FW update on the KBL system

The same issues happened already earlier in the following CI runs:
Patchwork_127966v3/fi-kbl-7567u
Patchwork_128147v2/fi-kbl-7567u
IGTPW_10469/fi-kbl-7567u

I could

✓ Fi.CI.BAT: success for drm/i915: Fix HPD handling during driver init/shutdown (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix HPD handling during driver init/shutdown (rev2)
URL   : https://patchwork.freedesktop.org/series/128186/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14078 -> Patchwork_128186v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/index.html

Participating hosts (38 -> 37)
--

  Additional (2): bat-rpls-2 fi-pnv-d510 
  Missing(3): bat-dg2-8 bat-dg2-9 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_128186v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-rpls-2: NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_exec_suspend@basic-s3@smem:
- fi-apl-guc: [PASS][2] -> [DMESG-WARN][3] ([i915#8703])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-apl-guc/igt@gem_exec_suspend@basic...@smem.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-apl-guc/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_lmem_swapping@basic:
- fi-pnv-d510:NOTRUN -> [SKIP][4] ([fdo#109271]) +28 other tests 
skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-pnv-d510/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlm-1: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-adlm-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_tiled_pread_basic:
- bat-rpls-2: NOTRUN -> [SKIP][6] ([i915#3282])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@gem_tiled_pread_basic.html

  * igt@i915_module_load@reload:
- fi-kbl-7567u:   [PASS][7] -> [DMESG-WARN][8] ([i915#8585]) +1 other 
test dmesg-warn
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_module_l...@reload.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_module_l...@reload.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-7567u:   [PASS][9] -> [DMESG-WARN][10] ([i915#9730]) +31 other 
tests dmesg-warn
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- fi-kbl-7567u:   [PASS][11] -> [DMESG-WARN][12] ([i915#180])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_susp...@basic-s2idle-without-i915.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-kbl-7567u:   [PASS][13] -> [DMESG-WARN][14] ([i915#1982])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_susp...@basic-s3-without-i915.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-rpls-2: NOTRUN -> [SKIP][15] ([i915#4103]) +1 other test skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-rpls-2: NOTRUN -> [SKIP][16] ([i915#3555] / [i915#3840] / 
[i915#9886])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-rpls-2: NOTRUN -> [SKIP][17] ([fdo#109285])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][18] ([i915#9197]) +1 other test skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-adlm-1: NOTRUN -> [SKIP][19] ([i915#9875] / [i915#9900])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-adlm-1/igt@kms_pipe_crc_ba...@suspend-read-crc.html

  * igt@kms_pm_backlight@basic-brightness:
- bat-rpls-2: NOTRUN -> [SKIP][20] ([i915#5354])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@kms_pm_backli...@basic-brightness.html

  *

✗ Fi.CI.IGT: failure for drm/edid: prefer forward declarations over includes in drm_edid.h (rev2)

[Patchwork]

== Series Details ==

Series: drm/edid: prefer forward declarations over includes in drm_edid.h (rev2)
URL   : https://patchwork.freedesktop.org/series/127695/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14080_full -> Patchwork_127695v2_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_127695v2_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_127695v2_full, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (8 -> 8)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_127695v2_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt:
- shard-dg2:  NOTRUN -> [TIMEOUT][1] +3 other tests timeout
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/shard-dg2-11/igt@gem_ctx_persiste...@saturated-hostile-nopreempt.html

  * igt@gem_flink_race@flink_close:
- shard-dg2:  [PASS][2] -> [TIMEOUT][3] +5 other tests timeout
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg2-11/igt@gem_flink_race@flink_close.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/shard-dg2-10/igt@gem_flink_race@flink_close.html

  * igt@i915_pm_rpm@reg-read-ioctl:
- shard-dg2:  [PASS][4] -> [SKIP][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg2-11/igt@i915_pm_...@reg-read-ioctl.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/shard-dg2-10/igt@i915_pm_...@reg-read-ioctl.html

  
 Warnings 

  * igt@kms_ccs@pipe-b-bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-dg2:  [SKIP][6] ([i915#5354]) -> [TIMEOUT][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg2-2/igt@kms_...@pipe-b-bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/shard-dg2-11/igt@kms_...@pipe-b-bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_flip@2x-flip-vs-fences-interruptible:
- shard-dg2:  [SKIP][8] ([i915#8381]) -> [TIMEOUT][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg2-11/igt@kms_f...@2x-flip-vs-fences-interruptible.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/shard-dg2-10/igt@kms_f...@2x-flip-vs-fences-interruptible.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-gtt:
- shard-dg2:  [SKIP][10] ([i915#8708]) -> [TIMEOUT][11]
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg2-11/igt@kms_frontbuffer_track...@psr-2p-primscrn-spr-indfb-draw-mmap-gtt.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/shard-dg2-10/igt@kms_frontbuffer_track...@psr-2p-primscrn-spr-indfb-draw-mmap-gtt.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
- shard-dg2:  [SKIP][12] ([i915#2437] / [i915#9412]) -> 
[TIMEOUT][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg2-2/igt@kms_writeb...@writeback-check-output-xrgb2101010.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/shard-dg2-11/igt@kms_writeb...@writeback-check-output-xrgb2101010.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_psr@fbc-pr-cursor-mmap-cpu}:
- shard-dg2:  [SKIP][14] ([i915#9732]) -> [TIMEOUT][15]
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg2-2/igt@kms_...@fbc-pr-cursor-mmap-cpu.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/shard-dg2-11/igt@kms_...@fbc-pr-cursor-mmap-cpu.html

  
Known issues


  Here are the changes found in Patchwork_127695v2_full that come from known 
issues:

### CI changes ###

 Possible fixes 

  * boot:
- shard-glk:  ([PASS][16], [PASS][17], [PASS][18], [PASS][19], 
[PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], 
[PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [FAIL][31], 
[PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], 
[PASS][38]) ([i915#8293]) -> ([PASS][39], [PASS][40], [PASS][41], [PASS][42], 
[PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], 
[PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], 
[PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], 
[PASS][61])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-glk9/boot.html
   [17]: 
https://intel-gfx

RE: [PATCH] drm/i915/display/dp: 128/132b DP-capable with SST

[Almahallawy, Khaled]

Thank you for the patch

Tested-by: Khaled Almahallawy 

-Original Message-
From: Intel-gfx  On Behalf Of Arun R 
Murthy
Sent: Wednesday, January 3, 2024 1:07 AM
To: intel-gfx@lists.freedesktop.org; Nikula, Jani ; 
Deak, Imre 
Subject: [PATCH] drm/i915/display/dp: 128/132b DP-capable with SST

With a value of '0' read from MSTM_CAP register MST to be enabled.
DP2.1 SCR updates the spec for 128/132b DP capable supporting only one stream 
and not supporting single stream sideband MSG.
The underlying protocol will be MST to enable use of MTP.

Signed-off-by: Arun R Murthy 
---
 drivers/gpu/drm/i915/display/intel_dp.c | 9 +++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c 
b/drivers/gpu/drm/i915/display/intel_dp.c
index 9ff0cbd9c0df..40d3280f8d98 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4038,8 +4038,13 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
if (!intel_dp_mst_source_support(intel_dp))
return;
 
-   intel_dp->is_mst = sink_can_mst &&
-   i915->display.params.enable_dp_mst;
+   /*
+* Even if dpcd reg MSTM_CAP is 0, if the sink supports UHBR rates then
+* DP2.1 can be enabled with underlying protocol using MST for MTP
+*/
+   intel_dp->is_mst = (sink_can_mst ||
+   
drm_dp_is_uhbr_rate(intel_dp_max_common_rate(intel_dp)))
+   && i915->display.params.enable_dp_mst;
 
drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
intel_dp->is_mst);
--
2.25.1

[PATCH i-g-t] tests/perf_pmu: Restore sysfs freq in exit handler

[Vinay Belgaumkar]

Seeing random issues where this test starts with invalid values.
Ensure that we restore the frequencies in case test exits early
due to some system issues.

Link: https://gitlab.freedesktop.org/drm/intel/-/issues/9432
Signed-off-by: Vinay Belgaumkar 
---
 tests/intel/perf_pmu.c | 53 +-
 1 file changed, 52 insertions(+), 1 deletion(-)

diff --git a/tests/intel/perf_pmu.c b/tests/intel/perf_pmu.c
index c6e6a8b77..ceacc1d3d 100644
--- a/tests/intel/perf_pmu.c
+++ b/tests/intel/perf_pmu.c
@@ -2454,12 +2454,59 @@ static void pmu_read(int i915)
for_each_if((e)->class == I915_ENGINE_CLASS_RENDER) \
igt_dynamic_f("%s", e->name)
 
+int fd = -1;
+uint32_t *stash_min, *stash_max, *stash_boost;
+
+static void save_sysfs_freq(int i915)
+{
+   int gt, num_gts, sysfs, tmp;
+
+   num_gts = igt_sysfs_get_num_gt(i915);
+
+   stash_min = (uint32_t *)malloc(sizeof(uint32_t) * num_gts);
+   stash_max = (uint32_t *)malloc(sizeof(uint32_t) * num_gts);
+   stash_boost = (uint32_t *)malloc(sizeof(uint32_t) * num_gts);
+
+   /* Save boost, min and max across GTs */
+   i915_for_each_gt(i915, tmp, gt) {
+   sysfs = igt_sysfs_gt_open(i915, gt);
+   igt_require(sysfs >= 0);
+
+   stash_min[gt] = igt_sysfs_get_u32(sysfs, "rps_min_freq_mhz");
+   stash_max[gt] = igt_sysfs_get_u32(sysfs, "rps_max_freq_mhz");
+   stash_boost[gt] = igt_sysfs_get_u32(sysfs, 
"rps_boost_freq_mhz");
+   igt_debug("GT: %d, min: %d, max: %d, boost:%d\n",
+ gt, stash_min[gt], stash_max[gt], stash_boost[gt]);
+
+   close(sysfs);
+   }
+}
+
+static void restore_sysfs_freq(int sig)
+{
+   int sysfs, gt, tmp;
+
+   /* Restore frequencies */
+   i915_for_each_gt(fd, tmp, gt) {
+   sysfs = igt_sysfs_gt_open(fd, gt);
+   igt_require(sysfs >= 0);
+
+   igt_require(__igt_sysfs_set_u32(sysfs, "rps_max_freq_mhz", 
stash_max[gt]));
+   igt_require(__igt_sysfs_set_u32(sysfs, "rps_min_freq_mhz", 
stash_min[gt]));
+   igt_require(__igt_sysfs_set_u32(sysfs, "rps_boost_freq_mhz", 
stash_boost[gt]));
+
+   close(sysfs);
+   }
+   free(stash_min);
+   free(stash_max);
+}
+
 igt_main
 {
const struct intel_execution_engine2 *e;
unsigned int num_engines = 0;
const intel_ctx_t *ctx = NULL;
-   int gt, tmp, fd = -1;
+   int gt, tmp;
int num_gt = 0;
 
/**
@@ -2482,6 +2529,7 @@ igt_main
 
i915_for_each_gt(fd, tmp, gt)
num_gt++;
+
}
 
igt_describe("Verify i915 pmu dir exists and read all events");
@@ -2664,6 +2712,9 @@ igt_main
 * Test GPU frequency.
 */
igt_subtest_with_dynamic("frequency") {
+   save_sysfs_freq(fd);
+   igt_install_exit_handler(restore_sysfs_freq);
+
i915_for_each_gt(fd, tmp, gt) {
igt_dynamic_f("gt%u", gt)
test_frequency(fd, gt);
-- 
2.38.1

✗ Fi.CI.BAT: failure for Update bxt_sanitize_cdclk() for Xe2_LPD (rev2)

[Patchwork]

== Series Details ==

Series: Update bxt_sanitize_cdclk() for Xe2_LPD (rev2)
URL   : https://patchwork.freedesktop.org/series/128175/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14080 -> Patchwork_128175v2


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_128175v2 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128175v2, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v2/index.html

Participating hosts (39 -> 37)
--

  Additional (1): fi-bsw-n3050 
  Missing(3): bat-mtlp-8 fi-snb-2520m fi-pnv-d510 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_128175v2:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@hangcheck:
- bat-adlm-1: [PASS][1] -> [ABORT][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adlm-1/igt@i915_selftest@l...@hangcheck.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v2/bat-adlm-1/igt@i915_selftest@l...@hangcheck.html

  
Known issues


  Here are the changes found in Patchwork_128175v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050:   NOTRUN -> [SKIP][3] ([fdo#109271]) +15 other tests 
skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v2/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][4] ([i915#8668])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v2/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_engines:
- {bat-adls-6}:   [TIMEOUT][5] -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_selftest@live@gt_engines.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v2/bat-adls-6/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][7] ([i915#9500]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg2-11/igt@i915_selftest@l...@workarounds.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v2/bat-dg2-11/igt@i915_selftest@l...@workarounds.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- {bat-adls-6}:   [WARN][9] -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v2/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][11] ([i915#8668]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v2/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500


Build changes
-

  * Linux: CI_DRM_14080 -> Patchwork_128175v2

  CI-20190529: 20190529
  CI_DRM_14080: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7656: 149297384db8cab03928c12b37ae1bb61089bdad @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128175v2: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

e269e5deb362 drm/i915/cdclk: Re-use bxt_cdclk_ctl() when sanitizing
6359e3e24ac0 drm/i915/cdclk: Reorder bxt_sanitize_cdclk()
a3c3a4b05ba4 drm/i915/cdclk: Extract bxt_cdclk_ctl()
77281063fd43 drm/i915/xe2lpd: Update bxt_sanitize_cdclk()

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128175v2/index.html

Re: [PATCH] drm/i915: clear the QGV mask set by GOP while booting

[Sworo, George D]

On Thu, 2024-01-04 at 11:04 -0800, george.d.sw...@intel.com wrote:
> From: George D Sworo 
> 
> GOP driver in the firmware is masking the QGV points except the one
> which can
> provide high Bandwidth required for panel.
> 
> On boot to the OS the mask is already set, and is not cleared
> anywhere
> in the i915 driver
> even though sagv is enabled. This means Pcode is unable to switch to
> other QGV work points
> except the one enabled by default in the GOP driver at boot time.
> 
> This change resets the mask, when i915 driver is finding the QGV
> points at the boot time. So that Pcode can switch to QGV work points
> based
> on the Workloads.
> 
> Signed-off-by: George D Sworo 
> ---
>  drivers/gpu/drm/i915/display/intel_bw.c | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
> b/drivers/gpu/drm/i915/display/intel_bw.c
> index bef96db62c80..e2576c0fb729 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.c
> +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> @@ -212,6 +212,7 @@ static int icl_get_qgv_points(struct
> drm_i915_private *dev_priv,
> bool is_y_tile)
>  {
>   const struct dram_info *dram_info = &dev_priv->dram_info;
> + u32 val = 0x00, val2 = 0;
>   int i, ret;
>  
>   qi->num_points = dram_info->num_qgv_points;
> @@ -311,6 +312,11 @@ static int icl_get_qgv_points(struct
> drm_i915_private *dev_priv,
>   i, qi->psf_points[i].clk);
>   }
>  
> + /* clear the QGV points mask set by the GOP driver while
> booting */
> + ret = snb_pcode_read(&dev_priv->uncore,
> ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, &val, &val2);
> + if (ret)
> + return ret;
> +
>   return 0;
>  }
>  

hi Stan,

Thanks for the quick reply. unfortunately, SAGV frequency doesnt seem
to be scaling even with this patch added 
https://patchwork.freedesktop.org/series/126962/ .
Apologies, the first patch you replied to was sent with an email that
was not registered with intel-gfx. I had to resubmit. 

✗ Fi.CI.IGT: failure for Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)

[Patchwork]

== Series Details ==

Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)
URL   : https://patchwork.freedesktop.org/series/123813/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14080_full -> Patchwork_123813v3_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_123813v3_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_123813v3_full, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (8 -> 8)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_123813v3_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_schedule@preempt-other@ccs0:
- shard-mtlp: [PASS][1] -> [FAIL][2] +19 other tests fail
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-mtlp-4/igt@gem_exec_schedule@preempt-ot...@ccs0.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-mtlp-8/igt@gem_exec_schedule@preempt-ot...@ccs0.html

  * igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-mtlp: [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-mtlp-2/igt@kms_cursor_leg...@flip-vs-cursor-toggle.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-mtlp-4/igt@kms_cursor_leg...@flip-vs-cursor-toggle.html

  * igt@kms_draw_crc@draw-method-mmap-cpu@xrgb-ytiled:
- shard-rkl:  [PASS][5] -> [INCOMPLETE][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-rkl-2/igt@kms_draw_crc@draw-method-mmap-...@xrgb-ytiled.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-rkl-3/igt@kms_draw_crc@draw-method-mmap-...@xrgb-ytiled.html

  
Known issues


  Here are the changes found in Patchwork_123813v3_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@drm_fdinfo@most-busy-check-all@bcs0:
- shard-dg2:  NOTRUN -> [SKIP][7] ([i915#8414]) +19 other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-dg2-2/igt@drm_fdinfo@most-busy-check-...@bcs0.html

  * igt@drm_fdinfo@virtual-busy-hang:
- shard-mtlp: NOTRUN -> [SKIP][8] ([i915#8414])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-mtlp-7/igt@drm_fdi...@virtual-busy-hang.html

  * igt@gem_busy@semaphore:
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#3936])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-mtlp-7/igt@gem_b...@semaphore.html

  * igt@gem_ccs@block-copy-compressed:
- shard-mtlp: NOTRUN -> [SKIP][10] ([i915#3555])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-mtlp-7/igt@gem_...@block-copy-compressed.html

  * igt@gem_ccs@suspend-resume@tile64-compressed-compfmt0-lmem0-lmem0:
- shard-dg2:  [PASS][11] -> [INCOMPLETE][12] ([i915#7297])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg2-11/igt@gem_ccs@suspend-res...@tile64-compressed-compfmt0-lmem0-lmem0.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-dg2-3/igt@gem_ccs@suspend-res...@tile64-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_close_race@multigpu-basic-process:
- shard-tglu: NOTRUN -> [SKIP][13] ([i915#7697])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-tglu-5/igt@gem_close_r...@multigpu-basic-process.html
- shard-dg2:  NOTRUN -> [SKIP][14] ([i915#7697])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-dg2-5/igt@gem_close_r...@multigpu-basic-process.html

  * igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglu: [PASS][15] -> [FAIL][16] ([i915#6268])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-tglu-2/igt@gem_ctx_e...@basic-nohangcheck.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-tglu-8/igt@gem_ctx_e...@basic-nohangcheck.html

  * igt@gem_ctx_persistence@engines-hang:
- shard-snb:  NOTRUN -> [SKIP][17] ([fdo#109271] / [i915#1099])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-snb1/igt@gem_ctx_persiste...@engines-hang.html

  * igt@gem_ctx_persistence@hang:
- shard-dg2:  NOTRUN -> [SKIP][18] ([i915#8555])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/shard-dg2-2/igt@gem_ctx_persiste...@hang.html

  * igt@gem_ctx_persistence@heartbeat-close:
- shard-dg1:  NOTRUN -> [SKIP][19] ([i915#8555])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-t

✓ Fi.CI.BAT: success for drm/edid: prefer forward declarations over includes in drm_edid.h (rev2)

[Patchwork]

== Series Details ==

Series: drm/edid: prefer forward declarations over includes in drm_edid.h (rev2)
URL   : https://patchwork.freedesktop.org/series/127695/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14080 -> Patchwork_127695v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/index.html

Participating hosts (39 -> 38)
--

  Additional (1): fi-bsw-n3050 
  Missing(2): bat-mtlp-8 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_127695v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050:   NOTRUN -> [SKIP][1] ([fdo#109271]) +15 other tests 
skip
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][2] ([i915#8668])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_engines:
- {bat-adls-6}:   [TIMEOUT][3] -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_selftest@live@gt_engines.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/bat-adls-6/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][5] ([i915#9500]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg2-11/igt@i915_selftest@l...@workarounds.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/bat-dg2-11/igt@i915_selftest@l...@workarounds.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- {bat-adls-6}:   [WARN][7] -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][9] ([i915#8668]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  * igt@kms_pm_rpm@basic-rte:
- bat-rpls-2: [ABORT][11] ([i915#8668] / [i915#9368] / [i915#9897]) 
-> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-rpls-2/igt@kms_pm_...@basic-rte.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/bat-rpls-2/igt@kms_pm_...@basic-rte.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9368]: https://gitlab.freedesktop.org/drm/intel/issues/9368
  [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500
  [i915#9666]: https://gitlab.freedesktop.org/drm/intel/issues/9666
  [i915#9897]: https://gitlab.freedesktop.org/drm/intel/issues/9897


Build changes
-

  * Linux: CI_DRM_14080 -> Patchwork_127695v2

  CI-20190529: 20190529
  CI_DRM_14080: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7656: 149297384db8cab03928c12b37ae1bb61089bdad @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_127695v2: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

cbe42b26082a drm/edid: prefer forward declarations over includes in drm_edid.h

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127695v2/index.html

Re: [PATCH 4/4] drm/i915/cdclk: Re-use bxt_cdclk_ctl() when sanitizing

[Matt Roper]

On Thu, Jan 04, 2024 at 03:48:34PM -0800, Matt Roper wrote:
> On Thu, Jan 04, 2024 at 12:21:50AM -0300, Gustavo Sousa wrote:
> > That's the function responsible for deriving that register's value; use
> > it.
> > 
> > Signed-off-by: Gustavo Sousa 
> 
> Reviewed-by: Matt Roper 

Forgot to mention...I think it's a bit jarring when the commit message
starts out referring to something in the headline ("That's the
function...").  It's probably a bit better to just re-state the function
name in the commit message again rather than assuming both get read
together.


Matt

> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_cdclk.c | 26 +++---
> >  1 file changed, 3 insertions(+), 23 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
> > b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index fbe9aba41c35..26200ee3e23f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -2051,7 +2051,7 @@ static void bxt_set_cdclk(struct drm_i915_private 
> > *dev_priv,
> >  static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
> >  {
> > u32 cdctl, expected;
> > -   int cdclk, clock, vco;
> > +   int cdclk, vco;
> >  
> > intel_update_cdclk(dev_priv);
> > intel_cdclk_dump_config(dev_priv, &dev_priv->display.cdclk.hw, "Current 
> > CDCLK");
> > @@ -2076,6 +2076,7 @@ static void bxt_sanitize_cdclk(struct 
> > drm_i915_private *dev_priv)
> >  * so sanitize this register.
> >  */
> > cdctl = intel_de_read(dev_priv, CDCLK_CTL);
> > +   expected = bxt_cdclk_ctl(dev_priv, &dev_priv->display.cdclk.hw, 
> > INVALID_PIPE);
> >  
> > /*
> >  * Let's ignore the pipe field, since BIOS could have configured the
> > @@ -2083,28 +2084,7 @@ static void bxt_sanitize_cdclk(struct 
> > drm_i915_private *dev_priv)
> >  * (PIPE_NONE).
> >  */
> > cdctl &= ~bxt_cdclk_cd2x_pipe(dev_priv, INVALID_PIPE);
> > -
> > -   if (DISPLAY_VER(dev_priv) >= 20)
> > -   expected = MDCLK_SOURCE_SEL_CDCLK_PLL;
> > -   else
> > -   expected = skl_cdclk_decimal(cdclk);
> > -
> > -   /* Figure out what CD2X divider we should be using for this cdclk */
> > -   if (HAS_CDCLK_SQUASH(dev_priv))
> > -   clock = dev_priv->display.cdclk.hw.vco / 2;
> > -   else
> > -   clock = dev_priv->display.cdclk.hw.cdclk;
> > -
> > -   expected |= bxt_cdclk_cd2x_div_sel(dev_priv, clock,
> > -  dev_priv->display.cdclk.hw.vco);
> > -
> > -   /*
> > -* Disable SSA Precharge when CD clock frequency < 500 MHz,
> > -* enable otherwise.
> > -*/
> > -   if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) &&
> > -   dev_priv->display.cdclk.hw.cdclk >= 50)
> > -   expected |= BXT_CDCLK_SSA_PRECHARGE_ENABLE;
> > +   expected &= ~bxt_cdclk_cd2x_pipe(dev_priv, INVALID_PIPE);
> >  
> > if (cdctl == expected)
> > /* All well; nothing to sanitize */
> > -- 
> > 2.43.0
> > 
> 
> -- 
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 4/4] drm/i915/cdclk: Re-use bxt_cdclk_ctl() when sanitizing

[Matt Roper]

On Thu, Jan 04, 2024 at 12:21:50AM -0300, Gustavo Sousa wrote:
> That's the function responsible for deriving that register's value; use
> it.
> 
> Signed-off-by: Gustavo Sousa 

Reviewed-by: Matt Roper 

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 26 +++---
>  1 file changed, 3 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index fbe9aba41c35..26200ee3e23f 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -2051,7 +2051,7 @@ static void bxt_set_cdclk(struct drm_i915_private 
> *dev_priv,
>  static void bxt_sanitize_cdclk(struct drm_i915_private *dev_priv)
>  {
>   u32 cdctl, expected;
> - int cdclk, clock, vco;
> + int cdclk, vco;
>  
>   intel_update_cdclk(dev_priv);
>   intel_cdclk_dump_config(dev_priv, &dev_priv->display.cdclk.hw, "Current 
> CDCLK");
> @@ -2076,6 +2076,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private 
> *dev_priv)
>* so sanitize this register.
>*/
>   cdctl = intel_de_read(dev_priv, CDCLK_CTL);
> + expected = bxt_cdclk_ctl(dev_priv, &dev_priv->display.cdclk.hw, 
> INVALID_PIPE);
>  
>   /*
>* Let's ignore the pipe field, since BIOS could have configured the
> @@ -2083,28 +2084,7 @@ static void bxt_sanitize_cdclk(struct drm_i915_private 
> *dev_priv)
>* (PIPE_NONE).
>*/
>   cdctl &= ~bxt_cdclk_cd2x_pipe(dev_priv, INVALID_PIPE);
> -
> - if (DISPLAY_VER(dev_priv) >= 20)
> - expected = MDCLK_SOURCE_SEL_CDCLK_PLL;
> - else
> - expected = skl_cdclk_decimal(cdclk);
> -
> - /* Figure out what CD2X divider we should be using for this cdclk */
> - if (HAS_CDCLK_SQUASH(dev_priv))
> - clock = dev_priv->display.cdclk.hw.vco / 2;
> - else
> - clock = dev_priv->display.cdclk.hw.cdclk;
> -
> - expected |= bxt_cdclk_cd2x_div_sel(dev_priv, clock,
> -dev_priv->display.cdclk.hw.vco);
> -
> - /*
> -  * Disable SSA Precharge when CD clock frequency < 500 MHz,
> -  * enable otherwise.
> -  */
> - if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) &&
> - dev_priv->display.cdclk.hw.cdclk >= 50)
> - expected |= BXT_CDCLK_SSA_PRECHARGE_ENABLE;
> + expected &= ~bxt_cdclk_cd2x_pipe(dev_priv, INVALID_PIPE);
>  
>   if (cdctl == expected)
>   /* All well; nothing to sanitize */
> -- 
> 2.43.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915/irq: use DISPLAY_VER instead of GRAPHICS_VER

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/irq: use DISPLAY_VER instead of 
GRAPHICS_VER
URL   : https://patchwork.freedesktop.org/series/128219/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14080_full -> Patchwork_128219v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_128219v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128219v1_full, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (8 -> 8)
--

  No changes in participating hosts

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_128219v1_full:

### IGT changes ###

 Possible regressions 

  * igt@gem_ctx_isolation@preservation-s3@vcs1:
- shard-mtlp: [PASS][1] -> [FAIL][2] +8 other tests fail
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-mtlp-5/igt@gem_ctx_isolation@preservation...@vcs1.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-mtlp-1/igt@gem_ctx_isolation@preservation...@vcs1.html

  * igt@i915_suspend@basic-s3-without-i915:
- shard-rkl:  [PASS][3] -> [FAIL][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-rkl-7/igt@i915_susp...@basic-s3-without-i915.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-rkl-4/igt@i915_susp...@basic-s3-without-i915.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_psr@psr-suspend@edp-1}:
- shard-mtlp: [PASS][5] -> [FAIL][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-mtlp-5/igt@kms_psr@psr-susp...@edp-1.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-mtlp-1/igt@kms_psr@psr-susp...@edp-1.html

  
Known issues


  Here are the changes found in Patchwork_128219v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@drm_fdinfo@most-busy-check-all@bcs0:
- shard-dg2:  NOTRUN -> [SKIP][7] ([i915#8414]) +19 other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-dg2-1/igt@drm_fdinfo@most-busy-check-...@bcs0.html

  * igt@drm_fdinfo@virtual-busy-hang:
- shard-mtlp: NOTRUN -> [SKIP][8] ([i915#8414])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-mtlp-8/igt@drm_fdi...@virtual-busy-hang.html

  * igt@gem_busy@semaphore:
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#3936])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-mtlp-8/igt@gem_b...@semaphore.html

  * igt@gem_ccs@block-copy-compressed:
- shard-mtlp: NOTRUN -> [SKIP][10] ([i915#3555])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-mtlp-4/igt@gem_...@block-copy-compressed.html

  * igt@gem_close_race@multigpu-basic-process:
- shard-tglu: NOTRUN -> [SKIP][11] ([i915#7697])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-tglu-8/igt@gem_close_r...@multigpu-basic-process.html
- shard-dg2:  NOTRUN -> [SKIP][12] ([i915#7697])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-dg2-6/igt@gem_close_r...@multigpu-basic-process.html

  * igt@gem_ctx_persistence@engines-hang:
- shard-snb:  NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#1099])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-snb5/igt@gem_ctx_persiste...@engines-hang.html

  * igt@gem_ctx_persistence@hang:
- shard-dg2:  NOTRUN -> [SKIP][14] ([i915#8555])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-dg2-1/igt@gem_ctx_persiste...@hang.html

  * igt@gem_eio@hibernate:
- shard-dg2:  NOTRUN -> [ABORT][15] ([i915#7975] / [i915#8213])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-dg2-10/igt@gem_...@hibernate.html

  * igt@gem_eio@reset-stress:
- shard-snb:  NOTRUN -> [FAIL][16] ([i915#8898])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-snb5/igt@gem_...@reset-stress.html

  * igt@gem_exec_balancer@bonded-true-hang:
- shard-dg2:  NOTRUN -> [SKIP][17] ([i915#4812])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-dg2-1/igt@gem_exec_balan...@bonded-true-hang.html

  * igt@gem_exec_capture@many-4k-incremental:
- shard-mtlp: NOTRUN -> [FAIL][18] ([i915#9606])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/shard-mtlp-4/igt@gem_exec_capt...@many-4k-i

✓ Fi.CI.BAT: success for series starting with [1/3] drm/nouveau: include drm/drm_edid.h only where needed

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/nouveau: include drm/drm_edid.h only 
where needed
URL   : https://patchwork.freedesktop.org/series/128224/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14080 -> Patchwork_128224v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128224v1/index.html

Participating hosts (39 -> 38)
--

  Additional (1): fi-bsw-n3050 
  Missing(2): bat-rpls-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_128224v1 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- fi-bsw-n3050:   NOTRUN -> [FAIL][1] ([i915#8293])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128224v1/fi-bsw-n3050/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][2] ([i915#8668])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128224v1/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_engines:
- {bat-adls-6}:   [TIMEOUT][3] -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_selftest@live@gt_engines.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128224v1/bat-adls-6/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][5] ([i915#9500]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg2-11/igt@i915_selftest@l...@workarounds.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128224v1/bat-dg2-11/igt@i915_selftest@l...@workarounds.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- {bat-adls-6}:   [WARN][7] -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128224v1/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][9] ([i915#8668]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128224v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500


Build changes
-

  * Linux: CI_DRM_14080 -> Patchwork_128224v1

  CI-20190529: 20190529
  CI_DRM_14080: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7656: 149297384db8cab03928c12b37ae1bb61089bdad @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128224v1: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

cb315e70b78a ASoC: hdmi-codec: drop drm/drm_edid.h include
a926348b48fd drm/hisilicon: include drm/drm_edid.h only where needed
ba500c889769 drm/nouveau: include drm/drm_edid.h only where needed

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128224v1/index.html

Re: [PATCH 3/4] drm/i915/cdclk: Reorder bxt_sanitize_cdclk()

[Matt Roper]

On Thu, Jan 04, 2024 at 12:21:49AM -0300, Gustavo Sousa wrote:
> Make the sequence of steps more logical by grouping things related to
> the check on the value of CDCLK_CTL into a single "block". Also, this
> will make an upcoming change replacing that block with a single function
> call easier to follow.
> 
> Signed-off-by: Gustavo Sousa 

Reviewed-by: Matt Roper 

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 24 +++---
>  1 file changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index b9354ad46fee..fbe9aba41c35 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -2060,13 +2060,23 @@ static void bxt_sanitize_cdclk(struct 
> drm_i915_private *dev_priv)
>   dev_priv->display.cdclk.hw.cdclk == 
> dev_priv->display.cdclk.hw.bypass)
>   goto sanitize;
>  
> - /* DPLL okay; verify the cdclock
> -  *
> + /* Make sure this is a legal cdclk value for the platform */
> + cdclk = bxt_calc_cdclk(dev_priv, dev_priv->display.cdclk.hw.cdclk);
> + if (cdclk != dev_priv->display.cdclk.hw.cdclk)
> + goto sanitize;
> +
> + /* Make sure the VCO is correct for the cdclk */
> + vco = bxt_calc_cdclk_pll_vco(dev_priv, cdclk);
> + if (vco != dev_priv->display.cdclk.hw.vco)
> + goto sanitize;
> +
> + /*
>* Some BIOS versions leave an incorrect decimal frequency value and
>* set reserved MBZ bits in CDCLK_CTL at least during exiting from S4,
>* so sanitize this register.
>*/
>   cdctl = intel_de_read(dev_priv, CDCLK_CTL);
> +
>   /*
>* Let's ignore the pipe field, since BIOS could have configured the
>* dividers both synching to an active pipe, or asynchronously
> @@ -2074,16 +2084,6 @@ static void bxt_sanitize_cdclk(struct drm_i915_private 
> *dev_priv)
>*/
>   cdctl &= ~bxt_cdclk_cd2x_pipe(dev_priv, INVALID_PIPE);
>  
> - /* Make sure this is a legal cdclk value for the platform */
> - cdclk = bxt_calc_cdclk(dev_priv, dev_priv->display.cdclk.hw.cdclk);
> - if (cdclk != dev_priv->display.cdclk.hw.cdclk)
> - goto sanitize;
> -
> - /* Make sure the VCO is correct for the cdclk */
> - vco = bxt_calc_cdclk_pll_vco(dev_priv, cdclk);
> - if (vco != dev_priv->display.cdclk.hw.vco)
> - goto sanitize;
> -
>   if (DISPLAY_VER(dev_priv) >= 20)
>   expected = MDCLK_SOURCE_SEL_CDCLK_PLL;
>   else
> -- 
> 2.43.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 2/4] drm/i915/cdclk: Extract bxt_cdclk_ctl()

[Matt Roper]

On Thu, Jan 04, 2024 at 12:21:48AM -0300, Gustavo Sousa wrote:
> This makes the code better readable and will be used later in
> bxt_sanitize_cdclk().
> 
> Signed-off-by: Gustavo Sousa 

Reviewed-by: Matt Roper 

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 57 +-
>  1 file changed, 35 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 0012e3171f3f..b9354ad46fee 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1900,15 +1900,47 @@ static bool pll_enable_wa_needed(struct 
> drm_i915_private *dev_priv)
>   dev_priv->display.cdclk.hw.vco > 0;
>  }
>  
> +static u32 bxt_cdclk_ctl(struct drm_i915_private *i915,
> +  const struct intel_cdclk_config *cdclk_config,
> +  enum pipe pipe)
> +{
> + int cdclk = cdclk_config->cdclk;
> + int vco = cdclk_config->vco;
> + int unsquashed_cdclk;
> + u16 waveform;
> + u32 val;
> +
> + waveform = cdclk_squash_waveform(i915, cdclk);
> +
> + unsquashed_cdclk = DIV_ROUND_CLOSEST(cdclk * cdclk_squash_len,
> +  cdclk_squash_divider(waveform));
> +
> + val = bxt_cdclk_cd2x_div_sel(i915, unsquashed_cdclk, vco) |
> + bxt_cdclk_cd2x_pipe(i915, pipe);
> +
> + /*
> +  * Disable SSA Precharge when CD clock frequency < 500 MHz,
> +  * enable otherwise.
> +  */
> + if ((IS_GEMINILAKE(i915) || IS_BROXTON(i915)) &&
> + cdclk >= 50)
> + val |= BXT_CDCLK_SSA_PRECHARGE_ENABLE;
> +
> + if (DISPLAY_VER(i915) >= 20)
> + val |= MDCLK_SOURCE_SEL_CDCLK_PLL;
> + else
> + val |= skl_cdclk_decimal(cdclk);
> +
> + return val;
> +}
> +
>  static void _bxt_set_cdclk(struct drm_i915_private *dev_priv,
>  const struct intel_cdclk_config *cdclk_config,
>  enum pipe pipe)
>  {
>   int cdclk = cdclk_config->cdclk;
>   int vco = cdclk_config->vco;
> - int unsquashed_cdclk;
>   u16 waveform;
> - u32 val;
>  
>   if (HAS_CDCLK_CRAWL(dev_priv) && dev_priv->display.cdclk.hw.vco > 0 && 
> vco > 0 &&
>   !cdclk_pll_is_unknown(dev_priv->display.cdclk.hw.vco)) {
> @@ -1925,29 +1957,10 @@ static void _bxt_set_cdclk(struct drm_i915_private 
> *dev_priv,
>  
>   waveform = cdclk_squash_waveform(dev_priv, cdclk);
>  
> - unsquashed_cdclk = DIV_ROUND_CLOSEST(cdclk * cdclk_squash_len,
> -  cdclk_squash_divider(waveform));
> -
>   if (HAS_CDCLK_SQUASH(dev_priv))
>   dg2_cdclk_squash_program(dev_priv, waveform);
>  
> - val = bxt_cdclk_cd2x_div_sel(dev_priv, unsquashed_cdclk, vco) |
> - bxt_cdclk_cd2x_pipe(dev_priv, pipe);
> -
> - /*
> -  * Disable SSA Precharge when CD clock frequency < 500 MHz,
> -  * enable otherwise.
> -  */
> - if ((IS_GEMINILAKE(dev_priv) || IS_BROXTON(dev_priv)) &&
> - cdclk >= 50)
> - val |= BXT_CDCLK_SSA_PRECHARGE_ENABLE;
> -
> - if (DISPLAY_VER(dev_priv) >= 20)
> - val |= MDCLK_SOURCE_SEL_CDCLK_PLL;
> - else
> - val |= skl_cdclk_decimal(cdclk);
> -
> - intel_de_write(dev_priv, CDCLK_CTL, val);
> + intel_de_write(dev_priv, CDCLK_CTL, bxt_cdclk_ctl(dev_priv, 
> cdclk_config, pipe));
>  
>   if (pipe != INVALID_PIPE)
>   intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, 
> pipe));
> -- 
> 2.43.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

Re: [PATCH 1/4] drm/i915/xe2lpd: Update bxt_sanitize_cdclk()

[Matt Roper]

On Thu, Jan 04, 2024 at 12:21:47AM -0300, Gustavo Sousa wrote:
> With Xe2_LPD, there were changes to the way CDCLK_CTL must be
> programmed. Those were reflected on _bxt_set_cdclk() with commit
> 3d3696c0fed1 ("drm/i915/lnl: Start using CDCLK through PLL"), but
> bxt_sanitize_cdclk() was left out.
> 
> This was causing some issues when loading the driver with a pre-existing
> active display configuration: the driver would mistakenly take the
> current value of CDCLK_CTL as wrong and the sanitization would be
> triggered.
> 
> In a scenario where the display was already configured with a high
> CDCLKC and had plane(s) enabled, FIFO underrun errors were reported,
> because the current sanitization code selects the minimum possible
> CDCLK.
> 
> Fix that by updating bxt_sanitize_cdclk() to match the changes made in
> _bxt_set_cdclk(). Ideally, we would have a common function to derive the
> value for CDCLK_CTL, but that can be done in a future change.
> 
> Signed-off-by: Gustavo Sousa 

Reviewed-by: Matt Roper 

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index c5fecde7afa8..0012e3171f3f 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -2071,7 +2071,10 @@ static void bxt_sanitize_cdclk(struct drm_i915_private 
> *dev_priv)
>   if (vco != dev_priv->display.cdclk.hw.vco)
>   goto sanitize;
>  
> - expected = skl_cdclk_decimal(cdclk);
> + if (DISPLAY_VER(dev_priv) >= 20)
> + expected = MDCLK_SOURCE_SEL_CDCLK_PLL;
> + else
> + expected = skl_cdclk_decimal(cdclk);
>  
>   /* Figure out what CD2X divider we should be using for this cdclk */
>   if (HAS_CDCLK_SQUASH(dev_priv))
> -- 
> 2.43.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

✗ Fi.CI.BAT: failure for drm/i915: clear the QGV mask set by GOP while booting

[Patchwork]

== Series Details ==

Series: drm/i915: clear the QGV mask set by GOP while booting
URL   : https://patchwork.freedesktop.org/series/128223/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14080 -> Patchwork_128223v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_128223v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128223v1, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/index.html

Participating hosts (39 -> 38)
--

  Additional (1): fi-bsw-n3050 
  Missing(2): bat-rpls-2 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_128223v1:

### IGT changes ###

 Possible regressions 

  * igt@i915_module_load@load:
- fi-rkl-11600:   [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/fi-rkl-11600/igt@i915_module_l...@load.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/fi-rkl-11600/igt@i915_module_l...@load.html
- bat-dg1-7:  [PASS][3] -> [ABORT][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg1-7/igt@i915_module_l...@load.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/bat-dg1-7/igt@i915_module_l...@load.html
- fi-tgl-1115g4:  [PASS][5] -> [INCOMPLETE][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/fi-tgl-1115g4/igt@i915_module_l...@load.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/fi-tgl-1115g4/igt@i915_module_l...@load.html
- bat-mtlp-6: [PASS][7] -> [INCOMPLETE][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-mtlp-6/igt@i915_module_l...@load.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/bat-mtlp-6/igt@i915_module_l...@load.html
- bat-mtlp-8: [PASS][9] -> [INCOMPLETE][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-mtlp-8/igt@i915_module_l...@load.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/bat-mtlp-8/igt@i915_module_l...@load.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@load:
- {bat-adls-6}:   [PASS][11] -> [ABORT][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_module_l...@load.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/bat-adls-6/igt@i915_module_l...@load.html

  
Known issues


  Here are the changes found in Patchwork_128223v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050:   NOTRUN -> [SKIP][13] ([fdo#109271]) +15 other tests 
skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html

  * igt@i915_module_load@load:
- fi-pnv-d510:[PASS][14] -> [DMESG-WARN][15] ([i915#1982])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/fi-pnv-d510/igt@i915_module_l...@load.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/fi-pnv-d510/igt@i915_module_l...@load.html

  
 Possible fixes 

  * igt@i915_selftest@live@hangcheck:
- {bat-rpls-3}:   [DMESG-WARN][16] ([i915#5591]) -> [PASS][17]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][18] ([i915#9500]) -> [PASS][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg2-11/igt@i915_selftest@l...@workarounds.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128223v1/bat-dg2-11/igt@i915_selftest@l...@workarounds.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500


Build changes
-

  * Linux: CI_DRM_14080 -> Patchwork_128223v1

  CI-20190529: 20190529
  CI_DRM_14080: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/

✗ Fi.CI.IGT: failure for drm/i915: don't make assumptions about intel_wakeref_t type

[Patchwork]

== Series Details ==

Series: drm/i915: don't make assumptions about intel_wakeref_t type
URL   : https://patchwork.freedesktop.org/series/128218/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14080_full -> Patchwork_128218v1_full


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_128218v1_full absolutely need 
to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128218v1_full, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (8 -> 9)
--

  Additional (1): shard-snb-0 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_128218v1_full:

### IGT changes ###

 Possible regressions 

  * igt@device_reset@unbind-reset-rebind:
- shard-mtlp: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-mtlp-8/igt@device_re...@unbind-reset-rebind.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-mtlp-2/igt@device_re...@unbind-reset-rebind.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
- shard-glk:  [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-glk4/igt@gem_exec_fair@basic-none-sh...@rcs0.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-glk6/igt@gem_exec_fair@basic-none-sh...@rcs0.html

  
New tests
-

  New tests have been introduced between CI_DRM_14080_full and 
Patchwork_128218v1_full:

### New IGT tests (1) ###

  * igt@kms_dsc:
- Statuses :
- Exec time: [None] s

  

Known issues


  Here are the changes found in Patchwork_128218v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@drm_fdinfo@most-busy-check-all@bcs0:
- shard-dg2:  NOTRUN -> [SKIP][5] ([i915#8414]) +19 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-dg2-10/igt@drm_fdinfo@most-busy-check-...@bcs0.html

  * igt@drm_fdinfo@virtual-busy-hang:
- shard-mtlp: NOTRUN -> [SKIP][6] ([i915#8414])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-mtlp-6/igt@drm_fdi...@virtual-busy-hang.html

  * igt@gem_busy@semaphore:
- shard-mtlp: NOTRUN -> [SKIP][7] ([i915#3936])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-mtlp-6/igt@gem_b...@semaphore.html

  * igt@gem_ccs@block-copy-compressed:
- shard-mtlp: NOTRUN -> [SKIP][8] ([i915#3555])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-mtlp-2/igt@gem_...@block-copy-compressed.html

  * igt@gem_close_race@multigpu-basic-process:
- shard-tglu: NOTRUN -> [SKIP][9] ([i915#7697])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-tglu-5/igt@gem_close_r...@multigpu-basic-process.html
- shard-dg2:  NOTRUN -> [SKIP][10] ([i915#7697])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-dg2-7/igt@gem_close_r...@multigpu-basic-process.html

  * igt@gem_ctx_persistence@engines-hang:
- shard-snb:  NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#1099])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-snb4/igt@gem_ctx_persiste...@engines-hang.html

  * igt@gem_ctx_persistence@hang:
- shard-dg2:  NOTRUN -> [SKIP][12] ([i915#8555])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-dg2-10/igt@gem_ctx_persiste...@hang.html

  * igt@gem_ctx_persistence@heartbeat-close:
- shard-dg1:  NOTRUN -> [SKIP][13] ([i915#8555])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-dg1-19/igt@gem_ctx_persiste...@heartbeat-close.html

  * igt@gem_eio@hibernate:
- shard-tglu: [PASS][14] -> [ABORT][15] ([i915#7975] / [i915#8213] 
/ [i915#8398])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-tglu-3/igt@gem_...@hibernate.html
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-tglu-10/igt@gem_...@hibernate.html
- shard-dg2:  NOTRUN -> [ABORT][16] ([i915#7975] / [i915#8213])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-dg2-2/igt@gem_...@hibernate.html

  * igt@gem_eio@reset-stress:
- shard-snb:  NOTRUN -> [FAIL][17] ([i915#8898])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/shard-snb4/igt@gem_...@reset-stress.html
- shard-dg1:  [PASS][18] -> [FAIL][19] ([i915#5784])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg1-17/igt@gem_...@reset-stress.html
   [19]: 
https://intel-gfx-ci.01.org/tree/d

Re: [PATCH 1/5] drm/i915/irq: use DISPLAY_VER instead of GRAPHICS_VER

[Matt Roper]

On Thu, Jan 04, 2024 at 07:43:46PM +0200, Jani Nikula wrote:
> Display code should not care about graphics version.
> 
> Signed-off-by: Jani Nikula 

For the series:

Reviewed-by: Matt Roper 

> ---
>  drivers/gpu/drm/i915/display/intel_display_irq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c 
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 6964f4b95865..99843883cef7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -1587,7 +1587,7 @@ void ilk_de_irq_postinstall(struct drm_i915_private 
> *i915)
>   struct intel_uncore *uncore = &i915->uncore;
>   u32 display_mask, extra_mask;
>  
> - if (GRAPHICS_VER(i915) >= 7) {
> + if (DISPLAY_VER(i915) >= 7) {
>   display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE_IVB |
>   DE_PCH_EVENT_IVB | DE_AUX_CHANNEL_A_IVB);
>   extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
> -- 
> 2.39.2
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

✓ Fi.CI.BAT: success for Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)

[Patchwork]

== Series Details ==

Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)
URL   : https://patchwork.freedesktop.org/series/123813/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14080 -> Patchwork_123813v3


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/index.html

Participating hosts (39 -> 35)
--

  Missing(4): bat-mtlp-8 bat-rpls-2 bat-kbl-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_123813v3 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-jsl-1:  [PASS][1] -> [FAIL][2] ([i915#8293])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-jsl-1/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/bat-jsl-1/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][3] ([i915#9197]) +3 other tests skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][4] ([i915#8668])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_engines:
- {bat-adls-6}:   [TIMEOUT][5] -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_selftest@live@gt_engines.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/bat-adls-6/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@hangcheck:
- {bat-rpls-3}:   [DMESG-WARN][7] ([i915#5591]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][9] ([i915#9500]) -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg2-11/igt@i915_selftest@l...@workarounds.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/bat-dg2-11/igt@i915_selftest@l...@workarounds.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- {bat-adls-6}:   [WARN][11] -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][13] ([i915#8668]) -> [PASS][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9197]: https://gitlab.freedesktop.org/drm/intel/issues/9197
  [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500


Build changes
-

  * Linux: CI_DRM_14080 -> Patchwork_123813v3

  CI-20190529: 20190529
  CI_DRM_14080: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7656: 149297384db8cab03928c12b37ae1bb61089bdad @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_123813v3: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

d5c102ffbb22 drm/i915/guc: Enable Wa_14019159160
1d1d81b6b4ca drm/i915/guc: Add support for w/a KLVs
d1c170d4cc91 drm/i915: Enable Wa_16019325821

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_123813v3/index.html

✗ Fi.CI.SPARSE: warning for Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)

[Patchwork]

== Series Details ==

Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)
URL   : https://patchwork.freedesktop.org/series/123813/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.CHECKPATCH: warning for Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)

[Patchwork]

== Series Details ==

Series: Enable Wa_14019159160 and Wa_16019325821 for MTL (rev3)
URL   : https://patchwork.freedesktop.org/series/123813/
State : warning

== Summary ==

Error: dim checkpatch failed
a0a6446af902 drm/i915: Enable Wa_16019325821
1410cfb541d6 drm/i915/guc: Add support for w/a KLVs
-:105: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely 
unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of 
BUG() or variants
#105: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:829:
+   GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));

total: 0 errors, 1 warnings, 0 checks, 159 lines checked
580339619fdd drm/i915/guc: Enable Wa_14019159160
-:101: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely 
unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of 
BUG() or variants
#101: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c:830:
+   GEM_BUG_ON(remain < size);

total: 0 errors, 1 warnings, 0 checks, 99 lines checked

✓ Fi.CI.IGT: success for series starting with [v4,1/3] drm/i915: Disable DSB in Xe KMD

[Patchwork]

== Series Details ==

Series: series starting with [v4,1/3] drm/i915: Disable DSB in Xe KMD
URL   : https://patchwork.freedesktop.org/series/128214/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14080_full -> Patchwork_128214v1_full


Summary
---

  **SUCCESS**

  No regressions found.

  

Participating hosts (8 -> 8)
--

  No changes in participating hosts

Known issues


  Here are the changes found in Patchwork_128214v1_full that come from known 
issues:

### IGT changes ###

 Issues hit 

  * igt@drm_fdinfo@most-busy-check-all@bcs0:
- shard-dg2:  NOTRUN -> [SKIP][1] ([i915#8414]) +9 other tests skip
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-dg2-5/igt@drm_fdinfo@most-busy-check-...@bcs0.html

  * igt@drm_fdinfo@virtual-busy-hang:
- shard-mtlp: NOTRUN -> [SKIP][2] ([i915#8414])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-mtlp-3/igt@drm_fdi...@virtual-busy-hang.html

  * igt@gem_busy@semaphore:
- shard-mtlp: NOTRUN -> [SKIP][3] ([i915#3936])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-mtlp-3/igt@gem_b...@semaphore.html

  * igt@gem_ccs@block-copy-compressed:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#3555])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-mtlp-7/igt@gem_...@block-copy-compressed.html

  * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
- shard-dg2:  [PASS][5] -> [INCOMPLETE][6] ([i915#7297])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg2-11/igt@gem_ccs@suspend-res...@linear-compressed-compfmt0-lmem0-lmem0.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-dg2-7/igt@gem_ccs@suspend-res...@linear-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_close_race@multigpu-basic-process:
- shard-tglu: NOTRUN -> [SKIP][7] ([i915#7697])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-tglu-6/igt@gem_close_r...@multigpu-basic-process.html

  * igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglu: [PASS][8] -> [FAIL][9] ([i915#6268])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-tglu-2/igt@gem_ctx_e...@basic-nohangcheck.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-tglu-3/igt@gem_ctx_e...@basic-nohangcheck.html

  * igt@gem_ctx_persistence@engines-hang:
- shard-snb:  NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#1099])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-snb2/igt@gem_ctx_persiste...@engines-hang.html

  * igt@gem_ctx_persistence@hang:
- shard-dg2:  NOTRUN -> [SKIP][11] ([i915#8555])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-dg2-5/igt@gem_ctx_persiste...@hang.html

  * igt@gem_ctx_persistence@heartbeat-close:
- shard-dg1:  NOTRUN -> [SKIP][12] ([i915#8555])
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-dg1-17/igt@gem_ctx_persiste...@heartbeat-close.html

  * igt@gem_eio@hibernate:
- shard-dg2:  NOTRUN -> [ABORT][13] ([i915#7975] / [i915#8213])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-dg2-10/igt@gem_...@hibernate.html

  * igt@gem_eio@reset-stress:
- shard-snb:  NOTRUN -> [FAIL][14] ([i915#8898])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-snb2/igt@gem_...@reset-stress.html
- shard-dg1:  [PASS][15] -> [FAIL][16] ([i915#5784])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-dg1-17/igt@gem_...@reset-stress.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-dg1-18/igt@gem_...@reset-stress.html

  * igt@gem_exec_balancer@bonded-false-hang:
- shard-dg2:  NOTRUN -> [SKIP][17] ([i915#4812]) +2 other tests skip
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-dg2-11/igt@gem_exec_balan...@bonded-false-hang.html

  * igt@gem_exec_capture@many-4k-incremental:
- shard-mtlp: NOTRUN -> [FAIL][18] ([i915#9606])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-mtlp-7/igt@gem_exec_capt...@many-4k-incremental.html

  * igt@gem_exec_fair@basic-pace-share:
- shard-dg2:  NOTRUN -> [SKIP][19] ([i915#3539] / [i915#4852]) +1 
other test skip
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-dg2-1/igt@gem_exec_f...@basic-pace-share.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk:  [PASS][20] -> [FAIL][21] ([i915#2842])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/shard-glk8/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/shard-glk6/igt@gem_exec_fa

✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/irq: use DISPLAY_VER instead of GRAPHICS_VER

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/irq: use DISPLAY_VER instead of 
GRAPHICS_VER
URL   : https://patchwork.freedesktop.org/series/128219/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14080 -> Patchwork_128219v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/index.html

Participating hosts (39 -> 38)
--

  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_128219v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][1] ([i915#8668])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_engines:
- {bat-adls-6}:   [TIMEOUT][2] -> [PASS][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_selftest@live@gt_engines.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/bat-adls-6/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][4] ([i915#9500]) -> [PASS][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg2-11/igt@i915_selftest@l...@workarounds.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/bat-dg2-11/igt@i915_selftest@l...@workarounds.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- {bat-adls-6}:   [WARN][6] -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][8] ([i915#8668]) -> [PASS][9]
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500


Build changes
-

  * Linux: CI_DRM_14080 -> Patchwork_128219v1

  CI-20190529: 20190529
  CI_DRM_14080: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7656: 149297384db8cab03928c12b37ae1bb61089bdad @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128219v1: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

189a9d8a2181 drm/i915/tv: use DISPLAY_VER instead of GRAPHICS_VER
22f14f0e6ba2 drm/i915/display: use IS_DISPLAY_VER instead of IS_GRAPHICS_VER
3c4af9478c34 drm/i915/hdcp: use DISPLAY_VER instead of GRAPHICS_VER
2db1af29868f drm/i915/dmc: use DISPLAY_VER instead of GRAPHICS_VER
94718e80f100 drm/i915/irq: use DISPLAY_VER instead of GRAPHICS_VER

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128219v1/index.html

✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm/i915/irq: use DISPLAY_VER instead of GRAPHICS_VER

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/irq: use DISPLAY_VER instead of 
GRAPHICS_VER
URL   : https://patchwork.freedesktop.org/series/128219/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:

Re: [PATCH v2 1/3] drm/i915/gt: Support fixed CCS mode

[Andi Shyti]

Hi Tvrtko,

[1]

> > +   /*
> > +* Loop over all available slices and assign each a user engine.
> > +*
> > +* With 1 engine (ccs0):
> > +*   slice 0, 1, 2, 3: ccs0
> > +*
> > +* With 2 engines (ccs0, ccs1):
> > +*   slice 0, 2: ccs0
> > +*   slice 1, 3: ccs1
> > +*
> > +* With 4 engines (ccs0, ccs1, ccs2, ccs3):
> > +*   slice 0: ccs0
> > +*   slice 1: ccs1
> > +*   slice 2: ccs2
> > +*   slice 3: ccs3
> > +*
> > +* Since the number of slices and the number of engines is
> > +* known, and we ensure that there is an exact multiple of
> > +* engines for slices, the double loop becomes a loop over each
> > +* slice.
> > +*/
> > +   for (i = num_slices / num_engines; i < num_slices; i++) {
> > +   struct intel_engine_cs *engine;
> > +   intel_engine_mask_t tmp;
> > +
> > +   for_each_engine_masked(engine, gt, ALL_CCS(gt), tmp) {
> > +   /* If a slice is fused off, leave disabled */
> > +   while (!(CCS_MASK(gt) & BIT(slice)))
> > +   slice++;
> > +
> > +   mode &= ~XEHP_CCS_MODE_CSLICE(slice, 
> > XEHP_CCS_MODE_CSLICE_MASK);
> > +   mode |= XEHP_CCS_MODE_CSLICE(slice, engine->instance);
> > +
> > +   /* assign the next slice */
> > +   slice++;
> > +   }
> > +   }
> > +
> > +   intel_uncore_write(gt->uncore, XEHP_CCS_MODE, mode);
> > +}
> > +
> > +void intel_gt_apply_ccs_mode(struct intel_gt *gt)
> > +{
> > +   mutex_lock(>->ccs.mutex);
> > +   __intel_gt_apply_ccs_mode(gt);
> > +   mutex_unlock(>->ccs.mutex);
> > +}
> > +
> > +void intel_gt_init_ccs_mode(struct intel_gt *gt)
> > +{
> > +   mutex_init(>->ccs.mutex);
> > +   gt->ccs.mode = 1;
> 
> What is '1'? And this question carries over to the sysfs interface in the
> following patch - who will use it and where it is documented how to use it?

The value '1' is explained in the comment above[1] and in the
comment below[2]. Maybe we should give it an enum meaning? But
that would be something like CCS_MODE_1/2/4, I thinks
ccs.mode = 1/2/4 is more understandable.

> Also, should this setting somehow be gated by an applicable platform? Or if
> not on setting then when acting on it in __intel_gt_apply_ccs_mode?
> 
> Creation of sysfs files as well should be gated by platform too in the
> following patch?

The idea of this series is to disable the CCS load balancing
(which automatically chooses between mode 1/2/4) and used the
a fixed scheme chosen by the user.

(I'm preparing v3 as Chris was so kind to recommend some changes
offline)

Thanks,
Andi

[2]

> > +   /*
> > +* Track fixed mapping between CCS engines and compute slices.
> > +*
> > +* In order to w/a HW that has the inability to dynamically load
> > +* balance between CCS engines and EU in the compute slices, we have to
> > +* reconfigure a static mapping on the fly. We track the current CCS
> > +* configuration (set by thr user through a sysfs interface) and compare
> > +* it against the current CCS_MODE (which maps CCS engines to compute
> > +* slices). If there is only a single engine selected, we can map it to
> > +* all available compute slices for maximal single task performance
> > +* (fast/narrow). If there are more then one engine selected, we have to
> > +* reduce the number of slices allocated to each engine (wide/slow),
> > +* fairly distributing the EU between the equivalent engines.
> > +*/
> > +   struct {
> > +   struct mutex mutex;
> > +   u32 mode;
> > +   } ccs;

✓ Fi.CI.BAT: success for drm/i915: don't make assumptions about intel_wakeref_t type

[Patchwork]

== Series Details ==

Series: drm/i915: don't make assumptions about intel_wakeref_t type
URL   : https://patchwork.freedesktop.org/series/128218/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14080 -> Patchwork_128218v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/index.html

Participating hosts (39 -> 38)
--

  Additional (1): fi-bsw-n3050 
  Missing(2): fi-snb-2520m fi-pnv-d510 

Known issues


  Here are the changes found in Patchwork_128218v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050:   NOTRUN -> [SKIP][1] ([fdo#109271]) +15 other tests 
skip
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_engines:
- {bat-adls-6}:   [TIMEOUT][2] -> [PASS][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_selftest@live@gt_engines.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/bat-adls-6/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][4] ([i915#9500]) -> [PASS][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg2-11/igt@i915_selftest@l...@workarounds.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/bat-dg2-11/igt@i915_selftest@l...@workarounds.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- {bat-adls-6}:   [WARN][6] -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500


Build changes
-

  * Linux: CI_DRM_14080 -> Patchwork_128218v1

  CI-20190529: 20190529
  CI_DRM_14080: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7656: 149297384db8cab03928c12b37ae1bb61089bdad @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128218v1: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

84fa954eb65a drm/i915: don't make assumptions about intel_wakeref_t type

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128218v1/index.html

[RESEND] drm/edid: prefer forward declarations over includes in drm_edid.h

[Jani Nikula]

There's no need to include either linux/hdmi.h or drm/drm_mode.h. They
can be removed by using forward declarations.

While at it, group the forward declarations together, and remove the
unnecessary ones.

Signed-off-by: Jani Nikula 
---
 include/drm/drm_edid.h | 12 +---
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 54cc6f04a708..86c1812a8034 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -24,11 +24,14 @@
 #define __DRM_EDID_H__
 
 #include 
-#include 
-#include 
 
+enum hdmi_quantization_range;
+struct drm_connector;
 struct drm_device;
+struct drm_display_mode;
 struct drm_edid;
+struct hdmi_avi_infoframe;
+struct hdmi_vendor_infoframe;
 struct i2c_adapter;
 
 #define EDID_LENGTH 128
@@ -319,11 +322,6 @@ struct cea_sad {
u8 byte2; /* meaning depends on format */
 };
 
-struct drm_encoder;
-struct drm_connector;
-struct drm_connector_state;
-struct drm_display_mode;
-
 int drm_edid_to_sad(const struct edid *edid, struct cea_sad **sads);
 int drm_edid_to_speaker_allocation(const struct edid *edid, u8 **sadb);
 int drm_av_sync_delay(struct drm_connector *connector,
-- 
2.39.2

✓ Fi.CI.BAT: success for series starting with [v4,1/3] drm/i915: Disable DSB in Xe KMD

[Patchwork]

== Series Details ==

Series: series starting with [v4,1/3] drm/i915: Disable DSB in Xe KMD
URL   : https://patchwork.freedesktop.org/series/128214/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14080 -> Patchwork_128214v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/index.html

Participating hosts (39 -> 37)
--

  Additional (1): fi-bsw-n3050 
  Missing(3): bat-mtlp-8 bat-rpls-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_128214v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050:   NOTRUN -> [SKIP][1] ([fdo#109271]) +15 other tests 
skip
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][2] ([i915#9197]) +2 other tests skip
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_engines:
- {bat-adls-6}:   [TIMEOUT][3] -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_selftest@live@gt_engines.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/bat-adls-6/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@hangcheck:
- {bat-rpls-3}:   [DMESG-WARN][5] ([i915#5591]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][7] ([i915#9500]) -> [PASS][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg2-11/igt@i915_selftest@l...@workarounds.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/bat-dg2-11/igt@i915_selftest@l...@workarounds.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- {bat-adls-6}:   [WARN][9] -> [PASS][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#9197]: https://gitlab.freedesktop.org/drm/intel/issues/9197
  [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500


Build changes
-

  * Linux: CI_DRM_14080 -> Patchwork_128214v1

  CI-20190529: 20190529
  CI_DRM_14080: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7656: 149297384db8cab03928c12b37ae1bb61089bdad @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128214v1: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

b970e5c83634 drm/xe: Use intel_wakeref_t in intel_runtime_pm functions
7e2d8e7f0656 drm/xe: Fix definition of intel_wakeref_t
bd20c987d324 drm/i915: Disable DSB in Xe KMD

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128214v1/index.html

Re: [PATCH] drm/i915/huc: Allow for very slow HuC loading

[Daniele Ceraolo Spurio]

On 1/2/2024 2:22 PM, john.c.harri...@intel.com wrote:

From: John Harrison 

A failure to load the HuC is occasionally observed where the cause is
believed to be a low GT frequency leading to very long load times.

So a) increase the timeout so that the user still gets a working
system even in the case of slow load. And b) report the frequency
during the load to see if that is the cause of the slow down.

Also update the similar code on the GuC load to not use uncore->gt
when there is a local gt available. The two should match, but no need
for unnecessary de-referencing.


Since the code is identical in almost identical in both places, I'm 
wondering if it is worth using a common waiter function and pass in a 
function pointer with the waiting logic. The cons of that is that we'd 
have to move to gt-level logging and pass in a tag, so not sure if it is 
worth it overall given that it isn't a lot of code. Maybe we should 
consider it when we implement this on the Xe-driver side?




Signed-off-by: John Harrison 
---
  drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c | 10 ++--
  drivers/gpu/drm/i915/gt/uc/intel_huc.c| 64 ---
  2 files changed, 63 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
index 0f79cb6585182..52332bb143395 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
@@ -184,7 +184,7 @@ static int guc_wait_ucode(struct intel_guc *guc)
 * in the seconds range. However, there is a limit on how long an
 * individual wait_for() can wait. So wrap it in a loop.
 */
-   before_freq = intel_rps_read_actual_frequency(&uncore->gt->rps);
+   before_freq = intel_rps_read_actual_frequency(>->rps);
before = ktime_get();
for (count = 0; count < GUC_LOAD_RETRY_LIMIT; count++) {
ret = wait_for(guc_load_done(uncore, &status, &success), 1000);
@@ -192,7 +192,7 @@ static int guc_wait_ucode(struct intel_guc *guc)
break;
  
  		guc_dbg(guc, "load still in progress, count = %d, freq = %dMHz, status = 0x%08X [0x%02X/%02X]\n",

-   count, 
intel_rps_read_actual_frequency(&uncore->gt->rps), status,
+   count, intel_rps_read_actual_frequency(>->rps), 
status,
REG_FIELD_GET(GS_BOOTROM_MASK, status),
REG_FIELD_GET(GS_UKERNEL_MASK, status));
}
@@ -204,7 +204,7 @@ static int guc_wait_ucode(struct intel_guc *guc)
u32 bootrom = REG_FIELD_GET(GS_BOOTROM_MASK, status);
  
  		guc_info(guc, "load failed: status = 0x%08X, time = %lldms, freq = %dMHz, ret = %d\n",

-status, delta_ms, 
intel_rps_read_actual_frequency(&uncore->gt->rps), ret);
+status, delta_ms, 
intel_rps_read_actual_frequency(>->rps), ret);
guc_info(guc, "load failed: status: Reset = %d, BootROM = 0x%02X, 
UKernel = 0x%02X, MIA = 0x%02X, Auth = 0x%02X\n",
 REG_FIELD_GET(GS_MIA_IN_RESET, status),
 bootrom, ukernel,
@@ -254,11 +254,11 @@ static int guc_wait_ucode(struct intel_guc *guc)
guc_warn(guc, "excessive init time: %lldms! [status = 0x%08X, count 
= %d, ret = %d]\n",
 delta_ms, status, count, ret);
guc_warn(guc, "excessive init time: [freq = %dMHz, before = %dMHz, 
perf_limit_reasons = 0x%08X]\n",
-intel_rps_read_actual_frequency(&uncore->gt->rps), 
before_freq,
+intel_rps_read_actual_frequency(>->rps), before_freq,
 intel_uncore_read(uncore, 
intel_gt_perf_limit_reasons_reg(gt)));
} else {
guc_dbg(guc, "init took %lldms, freq = %dMHz, before = %dMHz, status 
= 0x%08X, count = %d, ret = %d\n",
-   delta_ms, 
intel_rps_read_actual_frequency(&uncore->gt->rps),
+   delta_ms, intel_rps_read_actual_frequency(>->rps),
before_freq, status, count, ret);
}
  
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c

index ba9e07fc2b577..9ccec7de9628a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -6,6 +6,7 @@
  #include 
  
  #include "gt/intel_gt.h"

+#include "gt/intel_rps.h"
  #include "intel_guc_reg.h"
  #include "intel_huc.h"
  #include "intel_huc_print.h"
@@ -447,17 +448,68 @@ static const char *auth_mode_string(struct intel_huc *huc,
return partial ? "clear media" : "all workloads";
  }
  
+/*

+ * Use a longer timeout for debug builds so that problems can be detected
+ * and analysed. But a shorter timeout for releases so that user's don't
+ * wait forever to find out there is a problem. Note that the only reason
+ * an end user should hit the timeout is in case of extreme thermal throttling

✗ Fi.CI.SPARSE: warning for series starting with [v4,1/3] drm/i915: Disable DSB in Xe KMD

[Patchwork]

== Series Details ==

Series: series starting with [v4,1/3] drm/i915: Disable DSB in Xe KMD
URL   : https://patchwork.freedesktop.org/series/128214/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./drivers/gpu/drm/i915/intel_uncore.h:346:1: warning: trying to copy 
expression type 31
+./drivers/gpu/drm/i915/intel_uncore.h:351:1: warning: trying to copy 
expression type 31
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic

✗ Fi.CI.CHECKPATCH: warning for series starting with [v4,1/3] drm/i915: Disable DSB in Xe KMD

[Patchwork]

== Series Details ==

Series: series starting with [v4,1/3] drm/i915: Disable DSB in Xe KMD
URL   : https://patchwork.freedesktop.org/series/128214/
State : warning

== Summary ==

Error: dim checkpatch failed
967606fce39b drm/i915: Disable DSB in Xe KMD
-:38: WARNING:IS_ENABLED_CONFIG: IS_ENABLED(I915) is normally used as 
IS_ENABLED(CONFIG_I915)
#38: FILE: drivers/gpu/drm/i915/display/intel_dsb.c:457:
+   if (!IS_ENABLED(I915))

total: 0 errors, 1 warnings, 0 checks, 10 lines checked
e7550e99d546 drm/xe: Fix definition of intel_wakeref_t
-:17: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line 
(possible unwrapped commit description?)
#17: 
 from 
./drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h:11,

-:63: WARNING:NEW_TYPEDEFS: do not add new typedefs
#63: FILE: drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h:8:
+typedef unsigned long intel_wakeref_t;

total: 0 errors, 2 warnings, 0 checks, 5 lines checked
98725b96313a drm/xe: Use intel_wakeref_t in intel_runtime_pm functions

[PATCH 3/3] ASoC: hdmi-codec: drop drm/drm_edid.h include

[Jani Nikula]

hdmi-codec.h does not appear to directly need drm/drm_edid.h for
anything. Remove it.

There are some files that get drm/drm_edid.h by proxy; include it where
needed.

v2-v4: Fix build (kernel test robot )

Cc: Rob Clark 
Cc: Abhinav Kumar 
Cc: Dmitry Baryshkov 
Cc: Sean Paul 
Cc: Marijn Suijten 
Cc: linux-arm-...@vger.kernel.org
Cc: freedr...@lists.freedesktop.org
Cc: Andrzej Hajda 
Cc: Neil Armstrong 
Cc: Robert Foss 
Cc: Laurent Pinchart 
Cc: Jonas Karlman 
Cc: Jernej Skrabec 
Cc: Jaroslav Kysela 
Cc: Takashi Iwai 
Cc: linux-so...@vger.kernel.org
Acked-by: Maxime Ripard 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/bridge/lontium-lt9611.c| 1 +
 drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 1 +
 drivers/gpu/drm/bridge/synopsys/dw-hdmi.c  | 1 +
 drivers/gpu/drm/msm/dp/dp_display.c| 1 +
 drivers/gpu/drm/tegra/hdmi.c   | 1 +
 drivers/gpu/drm/vc4/vc4_hdmi.c | 1 +
 include/sound/hdmi-codec.h | 1 -
 7 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/bridge/lontium-lt9611.c 
b/drivers/gpu/drm/bridge/lontium-lt9611.c
index 9663601ce098..b9205d14d943 100644
--- a/drivers/gpu/drm/bridge/lontium-lt9611.c
+++ b/drivers/gpu/drm/bridge/lontium-lt9611.c
@@ -18,6 +18,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/gpu/drm/bridge/lontium-lt9611uxc.c 
b/drivers/gpu/drm/bridge/lontium-lt9611uxc.c
index e971b75e90ad..f3f130c1ef0a 100644
--- a/drivers/gpu/drm/bridge/lontium-lt9611uxc.c
+++ b/drivers/gpu/drm/bridge/lontium-lt9611uxc.c
@@ -21,6 +21,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c 
b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
index 52d91a0df85e..fa63a21bdd1c 100644
--- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
+++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi.c
@@ -31,6 +31,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/gpu/drm/msm/dp/dp_display.c 
b/drivers/gpu/drm/msm/dp/dp_display.c
index d37d599aec27..c8e1bbebdffe 100644
--- a/drivers/gpu/drm/msm/dp/dp_display.c
+++ b/drivers/gpu/drm/msm/dp/dp_display.c
@@ -11,6 +11,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "msm_drv.h"
 #include "msm_kms.h"
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index 417fb884240a..09987e372e3e 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -24,6 +24,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c
index f05e2c95a60d..34f807ed1c31 100644
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
@@ -35,6 +35,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
diff --git a/include/sound/hdmi-codec.h b/include/sound/hdmi-codec.h
index 9b162ac1e08e..5e1a9eafd10f 100644
--- a/include/sound/hdmi-codec.h
+++ b/include/sound/hdmi-codec.h
@@ -12,7 +12,6 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 #include 
-- 
2.39.2

[PATCH 2/3] drm/hisilicon: include drm/drm_edid.h only where needed

[Jani Nikula]

Reduce the need for rebuilds when drm_edid.h is modified by including it
only where needed.

Cc: Xinliang Liu 
Cc: Tian Tao  
Cc: Xinwei Kong 
Cc: Sumit Semwal 
Cc: Yongqin Liu 
Cc: John Stultz 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h  | 1 -
 drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c | 1 +
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
index f957552c6c50..207aa3f660b0 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_drv.h
@@ -18,7 +18,6 @@
 #include 
 #include 
 
-#include 
 #include 
 
 struct hibmc_connector {
diff --git a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c 
b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
index 8c6d2ea2a472..94e2c573a7af 100644
--- a/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
+++ b/drivers/gpu/drm/hisilicon/hibmc/hibmc_drm_vdac.c
@@ -14,6 +14,7 @@
 #include 
 
 #include 
+#include 
 #include 
 #include 
 #include 
-- 
2.39.2

[PATCH 1/3] drm/nouveau: include drm/drm_edid.h only where needed

[Jani Nikula]

Including drm_edid.h from nouveau_connector.h causes the rebuild of 15
files when drm_edid.h is modified, while there are only a few files that
actually need to include drm_edid.h.

Cc: Karol Herbst 
Cc: Lyude Paul 
Cc: Danilo Krummrich 
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/nouveau/dispnv50/head.c | 1 +
 drivers/gpu/drm/nouveau/nouveau_connector.h | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/nouveau/dispnv50/head.c 
b/drivers/gpu/drm/nouveau/dispnv50/head.c
index 5f490fbf1877..83355dbc15ee 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/head.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/head.c
@@ -32,6 +32,7 @@
 
 #include 
 #include 
+#include 
 #include 
 #include "nouveau_connector.h"
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.h 
b/drivers/gpu/drm/nouveau/nouveau_connector.h
index a2df4918340c..0608cabed058 100644
--- a/drivers/gpu/drm/nouveau/nouveau_connector.h
+++ b/drivers/gpu/drm/nouveau/nouveau_connector.h
@@ -35,7 +35,6 @@
 
 #include 
 #include 
-#include 
 #include 
 #include 
 
@@ -44,6 +43,7 @@
 
 struct nvkm_i2c_port;
 struct dcb_output;
+struct edid;
 
 #ifdef CONFIG_DRM_NOUVEAU_BACKLIGHT
 struct nouveau_backlight {
-- 
2.39.2

✓ Fi.CI.BAT: success for series starting with [v3,1/2] drm/i915: Disable DSB in Xe KMD

[Patchwork]

== Series Details ==

Series: series starting with [v3,1/2] drm/i915: Disable DSB in Xe KMD
URL   : https://patchwork.freedesktop.org/series/128212/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14080 -> Patchwork_128212v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128212v1/index.html

Participating hosts (39 -> 38)
--

  Additional (1): fi-bsw-n3050 
  Missing(2): bat-rpls-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_128212v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@random-engines:
- fi-bsw-n3050:   NOTRUN -> [SKIP][1] ([fdo#109271]) +15 other tests 
skip
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128212v1/fi-bsw-n3050/igt@gem_lmem_swapp...@random-engines.html

  
 Possible fixes 

  * igt@i915_selftest@live@gt_engines:
- {bat-adls-6}:   [TIMEOUT][2] -> [PASS][3]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_selftest@live@gt_engines.html
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128212v1/bat-adls-6/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@workarounds:
- bat-dg2-11: [DMESG-FAIL][4] ([i915#9500]) -> [PASS][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-dg2-11/igt@i915_selftest@l...@workarounds.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128212v1/bat-dg2-11/igt@i915_selftest@l...@workarounds.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- {bat-adls-6}:   [WARN][6] -> [PASS][7]
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14080/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128212v1/bat-adls-6/igt@i915_susp...@basic-s2idle-without-i915.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#9500]: https://gitlab.freedesktop.org/drm/intel/issues/9500


Build changes
-

  * Linux: CI_DRM_14080 -> Patchwork_128212v1

  CI-20190529: 20190529
  CI_DRM_14080: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7656: 149297384db8cab03928c12b37ae1bb61089bdad @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128212v1: d7426b5fc261046501ca418fe0e69ad1d6ba59be @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

790edcbed063 drm/xe: Fix definition of intel_wakeref_t
c3d65f9a0929 drm/i915: Disable DSB in Xe KMD

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128212v1/index.html

Re: [PATCH 2/4] drm/ttm: replace busy placement with flags v4

[Zack Rusin]

On Thu, Jan 4, 2024 at 10:05 AM Christian König
 wrote:
>
> From: Somalapuram Amaranath 
>
> Instead of a list of separate busy placement add flags which indicate
> that a placement should only be used when there is room or if we need to
> evict.
>
> v2: add missing TTM_PL_FLAG_IDLE for i915
> v3: fix auto build test ERROR on drm-tip/drm-tip
> v4: fix some typos pointed out by checkpatch
>
> Signed-off-by: Christian König 
> Signed-off-by: Somalapuram Amaranath 
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |  6 +-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 11 +--
>  drivers/gpu/drm/drm_gem_vram_helper.c  |  2 -
>  drivers/gpu/drm/i915/gem/i915_gem_ttm.c| 37 
>  drivers/gpu/drm/loongson/lsdc_ttm.c|  2 -
>  drivers/gpu/drm/nouveau/nouveau_bo.c   | 59 +
>  drivers/gpu/drm/nouveau/nouveau_bo.h   |  1 -
>  drivers/gpu/drm/qxl/qxl_object.c   |  2 -
>  drivers/gpu/drm/qxl/qxl_ttm.c  |  2 -
>  drivers/gpu/drm/radeon/radeon_object.c |  2 -
>  drivers/gpu/drm/radeon/radeon_ttm.c|  8 +-
>  drivers/gpu/drm/radeon/radeon_uvd.c|  1 -
>  drivers/gpu/drm/ttm/ttm_bo.c   | 21 +++--
>  drivers/gpu/drm/ttm/ttm_resource.c | 73 
>  drivers/gpu/drm/vmwgfx/vmwgfx_bo.c |  2 -
>  drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 99 +-
>  include/drm/ttm/ttm_placement.h| 10 ++-
>  include/drm/ttm/ttm_resource.h |  8 +-
>  18 files changed, 159 insertions(+), 187 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index cef920a93924..aa0dd6dad068 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -220,9 +220,6 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo 
> *abo, u32 domain)
>
> placement->num_placement = c;
> placement->placement = places;
> -
> -   placement->num_busy_placement = c;
> -   placement->busy_placement = places;
>  }
>
>  /**
> @@ -1406,8 +1403,7 @@ vm_fault_t amdgpu_bo_fault_reserve_notify(struct 
> ttm_buffer_object *bo)
> AMDGPU_GEM_DOMAIN_GTT);
>
> /* Avoid costly evictions; only set GTT as a busy placement */
> -   abo->placement.num_busy_placement = 1;
> -   abo->placement.busy_placement = &abo->placements[1];
> +   abo->placements[0].flags |= TTM_PL_FLAG_IDLE;
>
> r = ttm_bo_validate(bo, &abo->placement, &ctx);
> if (unlikely(r == -EBUSY || r == -ERESTARTSYS))
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 05991c5c8ddb..9a6a00b1af40 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -102,23 +102,19 @@ static void amdgpu_evict_flags(struct ttm_buffer_object 
> *bo,
> /* Don't handle scatter gather BOs */
> if (bo->type == ttm_bo_type_sg) {
> placement->num_placement = 0;
> -   placement->num_busy_placement = 0;
> return;
> }
>
> /* Object isn't an AMDGPU object so ignore */
> if (!amdgpu_bo_is_amdgpu_bo(bo)) {
> placement->placement = &placements;
> -   placement->busy_placement = &placements;
> placement->num_placement = 1;
> -   placement->num_busy_placement = 1;
> return;
> }
>
> abo = ttm_to_amdgpu_bo(bo);
> if (abo->flags & AMDGPU_GEM_CREATE_DISCARDABLE) {
> placement->num_placement = 0;
> -   placement->num_busy_placement = 0;
> return;
> }
>
> @@ -128,13 +124,13 @@ static void amdgpu_evict_flags(struct ttm_buffer_object 
> *bo,
> case AMDGPU_PL_OA:
> case AMDGPU_PL_DOORBELL:
> placement->num_placement = 0;
> -   placement->num_busy_placement = 0;
> return;
>
> case TTM_PL_VRAM:
> if (!adev->mman.buffer_funcs_enabled) {
> /* Move to system memory */
> amdgpu_bo_placement_from_domain(abo, 
> AMDGPU_GEM_DOMAIN_CPU);
> +
> } else if (!amdgpu_gmc_vram_full_visible(&adev->gmc) &&
>!(abo->flags & 
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) &&
>amdgpu_bo_in_cpu_visible_vram(abo)) {
> @@ -149,8 +145,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object 
> *bo,
> 
> AMDGPU_GEM_DOMAIN_CPU);
> abo->placements[0].fpfn = adev->gmc.visible_vram_size 
> >> PAGE_SHIFT;
> abo->placements[0].lpfn = 0;
> -   abo->placement.busy_placement = &abo->placements[1];
> -   abo->placement.num_busy_placement = 1;
> + 

✗ Fi.CI.SPARSE: warning for series starting with [v3,1/2] drm/i915: Disable DSB in Xe KMD

[Patchwork]

== Series Details ==

Series: series starting with [v3,1/2] drm/i915: Disable DSB in Xe KMD
URL   : https://patchwork.freedesktop.org/series/128212/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./drivers/gpu/drm/i915/intel_uncore.h:346:1: warning: trying to copy 
expression type 31
+./drivers/gpu/drm/i915/intel_uncore.h:351:1: warning: trying to copy 
expression type 31
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic

✗ Fi.CI.CHECKPATCH: warning for series starting with [v3,1/2] drm/i915: Disable DSB in Xe KMD

[Patchwork]

== Series Details ==

Series: series starting with [v3,1/2] drm/i915: Disable DSB in Xe KMD
URL   : https://patchwork.freedesktop.org/series/128212/
State : warning

== Summary ==

Error: dim checkpatch failed
37112d90d4cb drm/i915: Disable DSB in Xe KMD
-:38: WARNING:IS_ENABLED_CONFIG: IS_ENABLED(I915) is normally used as 
IS_ENABLED(CONFIG_I915)
#38: FILE: drivers/gpu/drm/i915/display/intel_dsb.c:457:
+   if (!IS_ENABLED(I915))

total: 0 errors, 1 warnings, 0 checks, 10 lines checked
dd0c3552f423 drm/xe: Fix definition of intel_wakeref_t
-:19: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line 
(possible unwrapped commit description?)
#19: 
 from 
./drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h:11,

-:64: WARNING:NEW_TYPEDEFS: do not add new typedefs
#64: FILE: drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h:8:
+typedef unsigned long intel_wakeref_t;

total: 0 errors, 2 warnings, 0 checks, 5 lines checked

[PATCH] drm/i915: clear the QGV mask set by GOP while booting

[george . d . sworo]

From: George D Sworo 

GOP driver in the firmware is masking the QGV points except the one
which can
provide high Bandwidth required for panel.

On boot to the OS the mask is already set, and is not cleared anywhere
in the i915 driver
even though sagv is enabled. This means Pcode is unable to switch to
other QGV work points
except the one enabled by default in the GOP driver at boot time.

This change resets the mask, when i915 driver is finding the QGV
points at the boot time. So that Pcode can switch to QGV work points
based
on the Workloads.

Signed-off-by: George D Sworo 
---
 drivers/gpu/drm/i915/display/intel_bw.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c 
b/drivers/gpu/drm/i915/display/intel_bw.c
index bef96db62c80..e2576c0fb729 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -212,6 +212,7 @@ static int icl_get_qgv_points(struct drm_i915_private 
*dev_priv,
  bool is_y_tile)
 {
const struct dram_info *dram_info = &dev_priv->dram_info;
+   u32 val = 0x00, val2 = 0;
int i, ret;
 
qi->num_points = dram_info->num_qgv_points;
@@ -311,6 +312,11 @@ static int icl_get_qgv_points(struct drm_i915_private 
*dev_priv,
i, qi->psf_points[i].clk);
}
 
+   /* clear the QGV points mask set by the GOP driver while booting */
+   ret = snb_pcode_read(&dev_priv->uncore, 
ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, &val, &val2);
+   if (ret)
+   return ret;
+
return 0;
 }
 
-- 
2.34.1

Re: [PATCH] drm/i915: don't make assumptions about intel_wakeref_t type

[Andrzej Hajda]

On 04.01.2024 17:46, Jani Nikula wrote:

intel_wakeref_t is supposed to be a mostly opaque cookie to its
users. It should only be checked for being non-zero and set to
zero. Debug logging its actual value is meaningless. Switch to just
debug logging whether the async_put_wakeref is non-zero.

The issue dates back to much earlier than
commit b49e894c3fd8 ("drm/i915: Replace custom intel runtime_pm tracker
with ref_tracker library"), but this is the one that brought about a
build failure due to the printf format.

Reported-by: Stephen Rothwell 
Closes: https://lore.kernel.org/r/20240102111222.2db11...@canb.auug.org.au
Fixes: b49e894c3fd8 ("drm/i915: Replace custom intel runtime_pm tracker with 
ref_tracker library")
Cc: Andrzej Hajda 
Cc: Imre Deak 
Signed-off-by: Jani Nikula 


Reviewed-by: Andrzej Hajda 

Regards
Andrzej


---
  drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
b/drivers/gpu/drm/i915/display/intel_display_power.c
index 5f091502719b..6fd4fa52253a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -405,8 +405,8 @@ print_async_put_domains_state(struct i915_power_domains 
*power_domains)
 struct drm_i915_private,
 display.power.domains);
  
-	drm_dbg(&i915->drm, "async_put_wakeref %lu\n",

-   power_domains->async_put_wakeref);
+   drm_dbg(&i915->drm, "async_put_wakeref: %s\n",
+   str_yes_no(power_domains->async_put_wakeref));
  
  	print_power_domains(power_domains, "async_put_domains[0]",

&power_domains->async_put_domains[0]);

[PATCH v3 3/3] drm/i915/guc: Enable Wa_14019159160

[John . C . Harrison]

From: John Harrison 

Use the new w/a KLV support to enable a MTL w/a. Note, this w/a is a
super-set of Wa_16019325821, so requires turning that one as well as
setting the new flag for Wa_14019159160 itself.

Signed-off-by: John Harrison 
Reviewed-by: Vinay Belgaumkar 
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c  |  3 ++
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  1 +
 drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h |  7 
 drivers/gpu/drm/i915/gt/uc/intel_guc.c|  1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 34 ++-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  1 +
 6 files changed, 38 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c 
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 9cccd60a5c41d..359b21fb02ab2 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -744,6 +744,7 @@ static u32 *gen12_emit_preempt_busywait(struct i915_request 
*rq, u32 *cs)
 
 /* Wa_14014475959:dg2 */
 /* Wa_16019325821 */
+/* Wa_14019159160 */
 #define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
 static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
 {
@@ -753,6 +754,7 @@ static u32 hold_switchout_semaphore_offset(struct 
i915_request *rq)
 
 /* Wa_14014475959:dg2 */
 /* Wa_16019325821 */
+/* Wa_14019159160 */
 static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
 {
int i;
@@ -793,6 +795,7 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, 
u32 *cs)
 
/* Wa_14014475959:dg2 */
/* Wa_16019325821 */
+   /* Wa_14019159160 */
if (intel_engine_uses_wa_hold_switchout(rq->engine))
cs = hold_switchout_emit_wa_busywait(rq, cs);
 
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h 
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index b519812ba120d..ba55c059063db 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -697,6 +697,7 @@ intel_engine_has_relative_mmio(const struct intel_engine_cs 
* const engine)
 
 /* Wa_14014475959:dg2 */
 /* Wa_16019325821 */
+/* Wa_14019159160 */
 static inline bool
 intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
 {
diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h 
b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
index 58012edd4eb0e..bebf28e3c4794 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h
@@ -101,4 +101,11 @@ enum {
GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5,
 };
 
+/*
+ * Workaround keys:
+ */
+enum {
+   GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE   = 
0x9001,
+};
+
 #endif /* _ABI_GUC_KLVS_ABI_H */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index d5c856be31491..db3cb628f40dc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -295,6 +295,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
 
/* Wa_16019325821 */
+   /* Wa_14019159160 */
if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
flags |= GUC_WA_RCS_CCS_SWITCHOUT;
 
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 6af3fa8b92e34..68d9e277eca8b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -815,6 +815,25 @@ guc_capture_prep_lists(struct intel_guc *guc)
return PAGE_ALIGN(total_size);
 }
 
+/* Wa_14019159160 */
+static u32 guc_waklv_ra_mode(struct intel_guc *guc, u32 offset, u32 remain)
+{
+   u32 size;
+   u32 klv_entry[] = {
+   /* 16:16 key/length */
+   FIELD_PREP(GUC_KLV_0_KEY, 
GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE) |
+   FIELD_PREP(GUC_KLV_0_LEN, 0),
+   /* 0 dwords data */
+   };
+
+   size = sizeof(klv_entry);
+   GEM_BUG_ON(remain < size);
+
+   iosys_map_memcpy_to(&guc->ads_map, offset, klv_entry, size);
+
+   return size;
+}
+
 static void guc_waklv_init(struct intel_guc *guc)
 {
struct intel_gt *gt = guc_to_gt(guc);
@@ -830,15 +849,12 @@ static void guc_waklv_init(struct intel_guc *guc)
offset = guc_ads_waklv_offset(guc);
remain = guc_ads_waklv_size(guc);
 
-   /*
-* Add workarounds here:
-*
-* if (want_wa_) {
-*  size = guc_waklv_(guc, offset, remain);
-*  offset += size;
-*  remain -= size;
-* }
-*/
+   /* Wa_14019159160 */
+   if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71))) {
+   size = guc_waklv_ra_mode(guc, offset, remain);
+   offset += size;
+   remain -= size;
+   }
 
size = guc_ads_waklv_size(guc) - remain;
if (!size)
diff --git a/drivers/

[PATCH v3 2/3] drm/i915/guc: Add support for w/a KLVs

[John . C . Harrison]

From: John Harrison 

To prevent running out of bits, new w/a enable flags are being added
via a KLV system instead of a 32 bit flags word.

Signed-off-by: John Harrison 
Reviewed-by: Vinay Belgaumkar 
---
 .../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h   |  1 +
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  2 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 73 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c |  6 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  5 +-
 5 files changed, 85 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h 
b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
index dabeaf4f245f3..00d6402333f8e 100644
--- a/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
+++ b/drivers/gpu/drm/i915/gt/uc/abi/guc_errors_abi.h
@@ -36,6 +36,7 @@ enum intel_guc_load_status {
INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_START,
INTEL_GUC_LOAD_STATUS_MPU_DATA_INVALID = 0x73,
INTEL_GUC_LOAD_STATUS_INIT_MMIO_SAVE_RESTORE_INVALID   = 0x74,
+   INTEL_GUC_LOAD_STATUS_KLV_WORKAROUND_INIT_ERROR= 0x75,
INTEL_GUC_LOAD_STATUS_INVALID_INIT_DATA_RANGE_END,
 
INTEL_GUC_LOAD_STATUS_READY= 0xF0,
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
index 813cc888e6fae..b572fc10fd24d 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.h
@@ -204,6 +204,8 @@ struct intel_guc {
struct guc_mmio_reg *ads_regset;
/** @ads_golden_ctxt_size: size of the golden contexts in the ADS */
u32 ads_golden_ctxt_size;
+   /** @ads_waklv_size: size of workaround KLVs */
+   u32 ads_waklv_size;
/** @ads_capture_size: size of register lists in the ADS used for error 
capture */
u32 ads_capture_size;
/** @ads_engine_usage_size: size of engine usage in the ADS */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index f7372f736a776..6af3fa8b92e34 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -46,6 +46,10 @@
  *  +---+
  *  | padding   |
  *  +---+ <== 4K aligned
+ *  | w/a KLVs  |
+ *  +---+
+ *  | padding   |
+ *  +---+ <== 4K aligned
  *  | capture lists |
  *  +---+
  *  | padding   |
@@ -88,6 +92,11 @@ static u32 guc_ads_golden_ctxt_size(struct intel_guc *guc)
return PAGE_ALIGN(guc->ads_golden_ctxt_size);
 }
 
+static u32 guc_ads_waklv_size(struct intel_guc *guc)
+{
+   return PAGE_ALIGN(guc->ads_waklv_size);
+}
+
 static u32 guc_ads_capture_size(struct intel_guc *guc)
 {
return PAGE_ALIGN(guc->ads_capture_size);
@@ -113,7 +122,7 @@ static u32 guc_ads_golden_ctxt_offset(struct intel_guc *guc)
return PAGE_ALIGN(offset);
 }
 
-static u32 guc_ads_capture_offset(struct intel_guc *guc)
+static u32 guc_ads_waklv_offset(struct intel_guc *guc)
 {
u32 offset;
 
@@ -123,6 +132,16 @@ static u32 guc_ads_capture_offset(struct intel_guc *guc)
return PAGE_ALIGN(offset);
 }
 
+static u32 guc_ads_capture_offset(struct intel_guc *guc)
+{
+   u32 offset;
+
+   offset = guc_ads_waklv_offset(guc) +
+guc_ads_waklv_size(guc);
+
+   return PAGE_ALIGN(offset);
+}
+
 static u32 guc_ads_private_data_offset(struct intel_guc *guc)
 {
u32 offset;
@@ -796,6 +815,49 @@ guc_capture_prep_lists(struct intel_guc *guc)
return PAGE_ALIGN(total_size);
 }
 
+static void guc_waklv_init(struct intel_guc *guc)
+{
+   struct intel_gt *gt = guc_to_gt(guc);
+   u32 offset, addr_ggtt, remain, size;
+
+   if (!intel_uc_uses_guc_submission(>->uc))
+   return;
+
+   if (GUC_FIRMWARE_VER(guc) < MAKE_GUC_VER(70, 10, 0))
+   return;
+
+   GEM_BUG_ON(iosys_map_is_null(&guc->ads_map));
+   offset = guc_ads_waklv_offset(guc);
+   remain = guc_ads_waklv_size(guc);
+
+   /*
+* Add workarounds here:
+*
+* if (want_wa_) {
+*  size = guc_waklv_(guc, offset, remain);
+*  offset += size;
+*  remain -= size;
+* }
+*/
+
+   size = guc_ads_waklv_size(guc) - remain;
+   if (!size)
+   return;
+
+   offset = guc_ads_waklv_offset(guc);
+   addr_ggtt = intel_guc_ggtt_offset(guc, guc->ads_vma) + offset;
+
+   ads_blob_write(guc, ads.wa_klv_addr_lo, addr_ggtt);
+   ads_blob_write(guc, ads.wa_klv_addr_hi, 0);
+   ads_blob_write(guc, ads.wa_klv_size, size);
+}
+
+static int guc_prep_waklv(struct int

[PATCH v3 0/3] Enable Wa_14019159160 and Wa_16019325821 for MTL

[John . C . Harrison]

From: John Harrison 

Enable Wa_14019159160 and  Wa_16019325821 for MTL

RCS/CCS workarounds for MTL.

v2: Fix bug in WA KLV implementation (offset not being reset to start
of list). Add better comment to prep patch about how KLVs can be added.
Add a module parameter override and disable the w/a by default as it
causes performance regressions and is only required by very specific
workloads.
v3: Rebase to latest tree. Drop module parameter as performance
regression is apparently not detectable after all and a bunch of more
common workloads have been seen to hit the issue.

Signed-off-by: John Harrison 


John Harrison (3):
  drm/i915: Enable Wa_16019325821
  drm/i915/guc: Add support for w/a KLVs
  drm/i915/guc: Enable Wa_14019159160

 drivers/gpu/drm/i915/gt/gen8_engine_cs.c  | 22 +++--
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  8 +-
 .../gpu/drm/i915/gt/uc/abi/guc_errors_abi.h   |  1 +
 drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h |  7 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc.c|  5 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc.h|  2 +
 drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c| 89 ++-
 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c |  6 ++
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  8 +-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  8 +-
 10 files changed, 141 insertions(+), 15 deletions(-)

-- 
2.41.0

[PATCH v3 1/3] drm/i915: Enable Wa_16019325821

[John . C . Harrison]

From: John Harrison 

Some platforms require holding RCS context switches until CCS is idle
(the reverse w/a of Wa_14014475959). Some platforms require both
versions.

Signed-off-by: John Harrison 
Reviewed-by: Vinay Belgaumkar 
---
 drivers/gpu/drm/i915/gt/gen8_engine_cs.c  | 19 +++
 drivers/gpu/drm/i915/gt/intel_engine_types.h  |  7 ---
 drivers/gpu/drm/i915/gt/uc/intel_guc.c|  4 
 drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h   |  3 ++-
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c |  7 ++-
 5 files changed, 27 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c 
b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 86a04afff64b3..9cccd60a5c41d 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -743,21 +743,23 @@ static u32 *gen12_emit_preempt_busywait(struct 
i915_request *rq, u32 *cs)
 }
 
 /* Wa_14014475959:dg2 */
-#define CCS_SEMAPHORE_PPHWSP_OFFSET0x540
-static u32 ccs_semaphore_offset(struct i915_request *rq)
+/* Wa_16019325821 */
+#define HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET 0x540
+static u32 hold_switchout_semaphore_offset(struct i915_request *rq)
 {
return i915_ggtt_offset(rq->context->state) +
-   (LRC_PPHWSP_PN * PAGE_SIZE) + CCS_SEMAPHORE_PPHWSP_OFFSET;
+   (LRC_PPHWSP_PN * PAGE_SIZE) + 
HOLD_SWITCHOUT_SEMAPHORE_PPHWSP_OFFSET;
 }
 
 /* Wa_14014475959:dg2 */
-static u32 *ccs_emit_wa_busywait(struct i915_request *rq, u32 *cs)
+/* Wa_16019325821 */
+static u32 *hold_switchout_emit_wa_busywait(struct i915_request *rq, u32 *cs)
 {
int i;
 
*cs++ = MI_ATOMIC_INLINE | MI_ATOMIC_GLOBAL_GTT | MI_ATOMIC_CS_STALL |
MI_ATOMIC_MOVE;
-   *cs++ = ccs_semaphore_offset(rq);
+   *cs++ = hold_switchout_semaphore_offset(rq);
*cs++ = 0;
*cs++ = 1;
 
@@ -773,7 +775,7 @@ static u32 *ccs_emit_wa_busywait(struct i915_request *rq, 
u32 *cs)
MI_SEMAPHORE_POLL |
MI_SEMAPHORE_SAD_EQ_SDD;
*cs++ = 0;
-   *cs++ = ccs_semaphore_offset(rq);
+   *cs++ = hold_switchout_semaphore_offset(rq);
*cs++ = 0;
 
return cs;
@@ -790,8 +792,9 @@ gen12_emit_fini_breadcrumb_tail(struct i915_request *rq, 
u32 *cs)
cs = gen12_emit_preempt_busywait(rq, cs);
 
/* Wa_14014475959:dg2 */
-   if (intel_engine_uses_wa_hold_ccs_switchout(rq->engine))
-   cs = ccs_emit_wa_busywait(rq, cs);
+   /* Wa_16019325821 */
+   if (intel_engine_uses_wa_hold_switchout(rq->engine))
+   cs = hold_switchout_emit_wa_busywait(rq, cs);
 
rq->tail = intel_ring_offset(rq, cs);
assert_ring_tail_valid(rq->ring, rq->tail);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_types.h 
b/drivers/gpu/drm/i915/gt/intel_engine_types.h
index 960e6be2042fe..b519812ba120d 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_types.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_types.h
@@ -586,7 +586,7 @@ struct intel_engine_cs {
 #define I915_ENGINE_HAS_RCS_REG_STATE  BIT(9)
 #define I915_ENGINE_HAS_EU_PRIORITYBIT(10)
 #define I915_ENGINE_FIRST_RENDER_COMPUTE BIT(11)
-#define I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT BIT(12)
+#define I915_ENGINE_USES_WA_HOLD_SWITCHOUT BIT(12)
unsigned int flags;
 
/*
@@ -696,10 +696,11 @@ intel_engine_has_relative_mmio(const struct 
intel_engine_cs * const engine)
 }
 
 /* Wa_14014475959:dg2 */
+/* Wa_16019325821 */
 static inline bool
-intel_engine_uses_wa_hold_ccs_switchout(struct intel_engine_cs *engine)
+intel_engine_uses_wa_hold_switchout(struct intel_engine_cs *engine)
 {
-   return engine->flags & I915_ENGINE_USES_WA_HOLD_CCS_SWITCHOUT;
+   return engine->flags & I915_ENGINE_USES_WA_HOLD_SWITCHOUT;
 }
 
 #endif /* __INTEL_ENGINE_TYPES_H__ */
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c 
b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 2b450c43bbd7f..d5c856be31491 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -294,6 +294,10 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
IS_DG2(gt->i915))
flags |= GUC_WA_HOLD_CCS_SWITCHOUT;
 
+   /* Wa_16019325821 */
+   if (IS_GFX_GT_IP_RANGE(gt, IP_VER(12, 70), IP_VER(12, 71)))
+   flags |= GUC_WA_RCS_CCS_SWITCHOUT;
+
/*
 * Wa_14012197797
 * Wa_22011391025
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h 
b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index 8ae1846431da7..48863188a130e 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -96,8 +96,9 @@
 #define   GUC_WA_GAM_CREDITS   BIT(10)
 #define   GUC_WA_DUAL_QUEUEBIT(11)
 #define   GUC_WA_RCS_RESET_BEFORE_RC6  BIT(13)
-#define   GUC_WA_CONTEXT_ISOLATION BIT(15)
 #define   GUC_WA_PRE_PARSERBIT(14)
+#define   GUC_WA_CONTEXT_ISOLATION BIT(15)
+#define  

[PATCH 2/5] drm/i915/dmc: use DISPLAY_VER instead of GRAPHICS_VER

[Jani Nikula]

Display code should not care about graphics version.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_dmc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c 
b/drivers/gpu/drm/i915/display/intel_dmc.c
index b70502586ab9..835781624482 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -1158,7 +1158,7 @@ static int intel_dmc_debugfs_status_show(struct seq_file 
*m, void *unused)
   str_yes_no(intel_dmc_has_payload(i915)));
seq_printf(m, "path: %s\n", dmc ? dmc->fw_path : "N/A");
seq_printf(m, "Pipe A fw needed: %s\n",
-  str_yes_no(GRAPHICS_VER(i915) >= 12));
+  str_yes_no(DISPLAY_VER(i915) >= 12));
seq_printf(m, "Pipe A fw loaded: %s\n",
   str_yes_no(has_dmc_id_fw(i915, DMC_FW_PIPEA)));
seq_printf(m, "Pipe B fw needed: %s\n",
-- 
2.39.2

[PATCH 3/5] drm/i915/hdcp: use DISPLAY_VER instead of GRAPHICS_VER

[Jani Nikula]

Display code should not care about graphics version. While at it,
abstract the version check to a separate macro.

Signed-off-by: Jani Nikula 
---
 .../gpu/drm/i915/display/intel_hdcp_regs.h| 28 ++-
 1 file changed, 15 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp_regs.h 
b/drivers/gpu/drm/i915/display/intel_hdcp_regs.h
index 8023c85c7fa0..a568a457e532 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp_regs.h
@@ -8,6 +8,8 @@
 
 #include "intel_display_reg_defs.h"
 
+#define TRANS_HDCP(__i915) (DISPLAY_VER(__i915) >= 12)
+
 /* HDCP Key Registers */
 #define HDCP_KEY_CONF  _MMIO(0x66c00)
 #define  HDCP_AKSV_SEND_TRIGGERREG_BIT(31)
@@ -82,7 +84,7 @@
 #define TRANS_HDCP_CONF(trans) _MMIO_TRANS(trans, _TRANSA_HDCP_CONF, \
_TRANSB_HDCP_CONF)
 #define HDCP_CONF(dev_priv, trans, port) \
-   (GRAPHICS_VER(dev_priv) >= 12 ? \
+   (TRANS_HDCP(dev_priv) ? \
 TRANS_HDCP_CONF(trans) : \
 PORT_HDCP_CONF(port))
 
@@ -95,7 +97,7 @@
_TRANSA_HDCP_ANINIT, \
_TRANSB_HDCP_ANINIT)
 #define HDCP_ANINIT(dev_priv, trans, port) \
-   (GRAPHICS_VER(dev_priv) >= 12 ? \
+   (TRANS_HDCP(dev_priv) ? \
 TRANS_HDCP_ANINIT(trans) : \
 PORT_HDCP_ANINIT(port))
 
@@ -105,7 +107,7 @@
 #define TRANS_HDCP_ANLO(trans) _MMIO_TRANS(trans, _TRANSA_HDCP_ANLO, \
_TRANSB_HDCP_ANLO)
 #define HDCP_ANLO(dev_priv, trans, port) \
-   (GRAPHICS_VER(dev_priv) >= 12 ? \
+   (TRANS_HDCP(dev_priv) ? \
 TRANS_HDCP_ANLO(trans) : \
 PORT_HDCP_ANLO(port))
 
@@ -115,7 +117,7 @@
 #define TRANS_HDCP_ANHI(trans) _MMIO_TRANS(trans, _TRANSA_HDCP_ANHI, \
_TRANSB_HDCP_ANHI)
 #define HDCP_ANHI(dev_priv, trans, port) \
-   (GRAPHICS_VER(dev_priv) >= 12 ? \
+   (TRANS_HDCP(dev_priv) ? \
 TRANS_HDCP_ANHI(trans) : \
 PORT_HDCP_ANHI(port))
 
@@ -126,7 +128,7 @@
_TRANSA_HDCP_BKSVLO, \
_TRANSB_HDCP_BKSVLO)
 #define HDCP_BKSVLO(dev_priv, trans, port) \
-   (GRAPHICS_VER(dev_priv) >= 12 ? \
+   (TRANS_HDCP(dev_priv) ? \
 TRANS_HDCP_BKSVLO(trans) : \
 PORT_HDCP_BKSVLO(port))
 
@@ -137,7 +139,7 @@
_TRANSA_HDCP_BKSVHI, \
_TRANSB_HDCP_BKSVHI)
 #define HDCP_BKSVHI(dev_priv, trans, port) \
-   (GRAPHICS_VER(dev_priv) >= 12 ? \
+   (TRANS_HDCP(dev_priv) ? \
 TRANS_HDCP_BKSVHI(trans) : \
 PORT_HDCP_BKSVHI(port))
 
@@ -148,7 +150,7 @@
_TRANSA_HDCP_RPRIME, \
_TRANSB_HDCP_RPRIME)
 #define HDCP_RPRIME(dev_priv, trans, port) \
-   (GRAPHICS_VER(dev_priv) >= 12 ? \
+   (TRANS_HDCP(dev_priv) ? \
 TRANS_HDCP_RPRIME(trans) : \
 PORT_HDCP_RPRIME(port))
 
@@ -159,7 +161,7 @@
_TRANSA_HDCP_STATUS, \
_TRANSB_HDCP_STATUS)
 #define HDCP_STATUS(dev_priv, trans, port) \
-   (GRAPHICS_VER(dev_priv) >= 12 ? \
+   (TRANS_HDCP(dev_priv) ? \
 TRANS_HDCP_STATUS(trans) : \
 PORT_HDCP_STATUS(port))
 
@@ -200,7 +202,7 @@
 #define   AUTH_FORCE_CLR_INPUTCTR  REG_BIT(19)
 #define   AUTH_CLR_KEYSREG_BIT(18)
 #define HDCP2_AUTH(dev_priv, trans, port) \
-   (GRAPHICS_VER(dev_priv) >= 12 ? \
+ 

[PATCH 4/5] drm/i915/display: use IS_DISPLAY_VER instead of IS_GRAPHICS_VER

[Jani Nikula]

Display code should not care about graphics version.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c 
b/drivers/gpu/drm/i915/display/intel_display_device.c
index 0b522c6a8d6f..c02d79b50006 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1012,7 +1012,7 @@ static void 
__intel_display_device_info_runtime_init(struct drm_i915_private *i9
goto display_fused_off;
}
 
-   if (IS_GRAPHICS_VER(i915, 7, 8) && HAS_PCH_SPLIT(i915)) {
+   if (IS_DISPLAY_VER(i915, 7, 8) && HAS_PCH_SPLIT(i915)) {
u32 fuse_strap = intel_de_read(i915, FUSE_STRAP);
u32 sfuse_strap = intel_de_read(i915, SFUSE_STRAP);
 
-- 
2.39.2

[PATCH 1/5] drm/i915/irq: use DISPLAY_VER instead of GRAPHICS_VER

[Jani Nikula]

Display code should not care about graphics version.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display_irq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c 
b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 6964f4b95865..99843883cef7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1587,7 +1587,7 @@ void ilk_de_irq_postinstall(struct drm_i915_private *i915)
struct intel_uncore *uncore = &i915->uncore;
u32 display_mask, extra_mask;
 
-   if (GRAPHICS_VER(i915) >= 7) {
+   if (DISPLAY_VER(i915) >= 7) {
display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE_IVB |
DE_PCH_EVENT_IVB | DE_AUX_CHANNEL_A_IVB);
extra_mask = (DE_PIPEC_VBLANK_IVB | DE_PIPEB_VBLANK_IVB |
-- 
2.39.2

[PATCH 5/5] drm/i915/tv: use DISPLAY_VER instead of GRAPHICS_VER

[Jani Nikula]

Display code should not care about graphics version. It's only comments
here, but update anyway.

Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_tv.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tv.c 
b/drivers/gpu/drm/i915/display/intel_tv.c
index d4386cb3569e..9a217805d2f6 100644
--- a/drivers/gpu/drm/i915/display/intel_tv.c
+++ b/drivers/gpu/drm/i915/display/intel_tv.c
@@ -1327,7 +1327,7 @@ intel_tv_compute_config(struct intel_encoder *encoder,
 * the active portion. Hence following this formula seems
 * more trouble that it's worth.
 *
-* if (GRAPHICS_VER(dev_priv) == 4) {
+* if (DISPLAY_VER(dev_priv) == 4) {
 *  num = cdclk * (tv_mode->oversample >> !tv_mode->progressive);
 *  den = tv_mode->clock;
 * } else {
-- 
2.39.2

Re: ✗ Fi.CI.IGT: failure for Resolve suspend-resume racing with GuC destroy-context-worker (rev13)

[Teres Alexis, Alan Previn]

On Thu, 2024-01-04 at 10:57 +, Patchwork wrote:
> Patch Details
> Series: Resolve suspend-resume racing with GuC destroy-context-worker (rev13)
> URL:https://patchwork.freedesktop.org/series/121916/
> State:  failure
> Details:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_121916v13/index.html
> CI Bug Log - changes from CI_DRM_14076_full -> Patchwork_121916v13_full
> Summary
> 
> FAILURE
alan:snip


> Here are the unknown changes that may have been introduced in 
> Patchwork_121916v13_full:
> 
> IGT changes
> Possible regressions
> 
>   *   igt@gem_eio@wait-wedge-immediate:
>  *   shard-mtlp: 
> PASS
>  -> 
> ABORT
> 
alan: from the code and dmesg, this is unrelated to guc context destruction 
flows.
Its reading an MCR register that times out. Additionally, i believe this error 
is occuring during post-reset-init flows.
So its definitely not doing any context destruction at this point (as reset 
would have happenned sooner).
> Known issues
> 

Re: [PATCH] drm/i915: don't make assumptions about intel_wakeref_t type

[Imre Deak]

On Thu, Jan 04, 2024 at 06:46:00PM +0200, Jani Nikula wrote:
> intel_wakeref_t is supposed to be a mostly opaque cookie to its
> users. It should only be checked for being non-zero and set to
> zero. Debug logging its actual value is meaningless. Switch to just
> debug logging whether the async_put_wakeref is non-zero.
> 
> The issue dates back to much earlier than
> commit b49e894c3fd8 ("drm/i915: Replace custom intel runtime_pm tracker
> with ref_tracker library"), but this is the one that brought about a
> build failure due to the printf format.
> 
> Reported-by: Stephen Rothwell 
> Closes: https://lore.kernel.org/r/20240102111222.2db11...@canb.auug.org.au
> Fixes: b49e894c3fd8 ("drm/i915: Replace custom intel runtime_pm tracker with 
> ref_tracker library")
> Cc: Andrzej Hajda 
> Cc: Imre Deak 
> Signed-off-by: Jani Nikula 

Reviewed-by: Imre Deak 

> ---
>  drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
> b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 5f091502719b..6fd4fa52253a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -405,8 +405,8 @@ print_async_put_domains_state(struct i915_power_domains 
> *power_domains)
>struct drm_i915_private,
>display.power.domains);
>  
> - drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
> - power_domains->async_put_wakeref);
> + drm_dbg(&i915->drm, "async_put_wakeref: %s\n",
> + str_yes_no(power_domains->async_put_wakeref));
>  
>   print_power_domains(power_domains, "async_put_domains[0]",
>   &power_domains->async_put_domains[0]);
> -- 
> 2.39.2
> 

Re: [PATCH v4 3/3] drm/xe: Use intel_wakeref_t in intel_runtime_pm functions

[Jani Nikula]

On Thu, 04 Jan 2024, José Roberto de Souza  wrote:
> Now intel_wakeref_t is a unsigned long and Xe KMD version of those
> functions should use the same type, so changing from bool to
> intel_wakeref_t.
>
> Cc: Maarten Lankhorst 
> Signed-off-by: José Roberto de Souza 

I don't think it was ever a bool in i915.

Wish we'd get the ref tracker in xe too.

Reviewed-by: Jani Nikula 


> ---
>  drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 10 +-
>  1 file changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h 
> b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> index 5d2a77b52db41..420eba0e4be00 100644
> --- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
> @@ -162,18 +162,18 @@ static inline struct drm_i915_private 
> *kdev_to_i915(struct device *kdev)
>  
>  #include "intel_wakeref.h"
>  
> -static inline bool intel_runtime_pm_get(struct xe_runtime_pm *pm)
> +static inline intel_wakeref_t intel_runtime_pm_get(struct xe_runtime_pm *pm)
>  {
>   struct xe_device *xe = container_of(pm, struct xe_device, runtime_pm);
>  
>   if (xe_pm_runtime_get(xe) < 0) {
>   xe_pm_runtime_put(xe);
> - return false;
> + return 0;
>   }
> - return true;
> + return 1;
>  }
>  
> -static inline bool intel_runtime_pm_get_if_in_use(struct xe_runtime_pm *pm)
> +static inline intel_wakeref_t intel_runtime_pm_get_if_in_use(struct 
> xe_runtime_pm *pm)
>  {
>   struct xe_device *xe = container_of(pm, struct xe_device, runtime_pm);
>  
> @@ -187,7 +187,7 @@ static inline void intel_runtime_pm_put_unchecked(struct 
> xe_runtime_pm *pm)
>   xe_pm_runtime_put(xe);
>  }
>  
> -static inline void intel_runtime_pm_put(struct xe_runtime_pm *pm, bool 
> wakeref)
> +static inline void intel_runtime_pm_put(struct xe_runtime_pm *pm, 
> intel_wakeref_t wakeref)
>  {
>   if (wakeref)
>   intel_runtime_pm_put_unchecked(pm);

-- 
Jani Nikula, Intel

Re: [PATCH v4 2/3] drm/xe: Fix definition of intel_wakeref_t

[Jani Nikula]

On Thu, 04 Jan 2024, José Roberto de Souza  wrote:
> i915 defines it as unsigned long so Xe should do the same to avoid
> compilation warnings:
>
>   CC [M]  drivers/gpu/drm/i915/i915_gem.o
>   CC [M]  drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
> In file included from ./include/drm/drm_mm.h:51,
>  from drivers/gpu/drm/xe/xe_bo_types.h:11,
>  from drivers/gpu/drm/xe/xe_bo.h:11,
>  from 
> ./drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h:11,
>  from ./drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h:15,
>  from drivers/gpu/drm/i915/display/intel_display_power.c:8:
> drivers/gpu/drm/i915/display/intel_display_power.c: In function 
> ‘print_async_put_domains_state’:
> drivers/gpu/drm/i915/display/intel_display_power.c:408:29: warning: format 
> ‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type 
> ‘int’ [-Wformat=]
>   408 | drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
>   | ^
>   409 | power_domains->async_put_wakeref);
>   | 
>   |  |
>   |  int
> ./include/drm/drm_print.h:410:39: note: in definition of macro ‘drm_dev_dbg’
>   410 | __drm_dev_dbg(NULL, dev, cat, fmt, ##__VA_ARGS__)
>   |   ^~~
> ./include/drm/drm_print.h:510:33: note: in expansion of macro ‘drm_dbg_driver’
>   510 | #define drm_dbg(drm, fmt, ...)  drm_dbg_driver(drm, fmt, 
> ##__VA_ARGS__)
>   | ^~
> drivers/gpu/drm/i915/display/intel_display_power.c:408:9: note: in expansion 
> of macro ‘drm_dbg’
>   408 | drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
>   | ^~~
> drivers/gpu/drm/i915/display/intel_display_power.c:408:50: note: format 
> string is defined here
>   408 | drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
>   |~~^
>   |  |
>   |  long unsigned int
>   |%u
>   CC [M]  drivers/gpu/drm/i915/i915_gem_evict.o
>   CC [M]  drivers/gpu/drm/i915/i915_gem_gtt.o
>   CC [M]  drivers/gpu/drm/xe/i915-display/intel_display_trace.o
>   CC [M]  drivers/gpu/drm/xe/i915-display/intel_display_wa.o
>   CC [M]  drivers/gpu/drm/i915/i915_query.o
>
> Fixes: 44e694958b95 ("drm/xe/display: Implement display support")
> Cc: Maarten Lankhorst 
> Signed-off-by: José Roberto de Souza 

I think the real issue is that we're trying to print the value of
something that's supposed to be an opaque cookie, and the fix for that
is [1].

However, no harm in syncing the types.

Reviewed-by: Jani Nikula 


[1] 
https://patchwork.freedesktop.org/patch/msgid/20240104164600.783371-1-jani.nik...@intel.com


> ---
>  drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h 
> b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
> index 1c5e30cf10caa..ecb1c07077069 100644
> --- a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
> +++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
> @@ -5,4 +5,4 @@
>  
>  #include 
>  
> -typedef bool intel_wakeref_t;
> +typedef unsigned long intel_wakeref_t;

-- 
Jani Nikula, Intel

Re: [PATCH v3 1/2] drm/i915: Disable DSB in Xe KMD

[Jani Nikula]

On Thu, 04 Jan 2024, José Roberto de Souza  wrote:
> Often getting DBS overflows when starting Xorg or Wayland compositors
> when running Xe KMD.
> Issue was reported but nothing was done, so disabling DSB as whole
> until properly fixed in Xe KMD.
>
> v2:
> - move check to HAS_DSB(Jani)
>
> v3:
> - use IS_ENABLED(I915) check in intel_dsb_prepare()
>
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/989
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1031
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1072
> Cc: Animesh Manna 
> Cc: Rodrigo Vivi 
> Cc: Jani Nikula 
> Signed-off-by: José Roberto de Souza 

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c | 4 
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 482c28b5c2de5..a6c7122fd671d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -453,6 +453,10 @@ struct intel_dsb *intel_dsb_prepare(const struct 
> intel_crtc_state *crtc_state,
>   if (!HAS_DSB(i915))
>   return NULL;
>  
> + /* TODO: DSB is broken in Xe KMD, so disabling it until fixed */
> + if (!IS_ENABLED(I915))
> + return NULL;
> +
>   dsb = kzalloc(sizeof(*dsb), GFP_KERNEL);
>   if (!dsb)
>   goto out;

-- 
Jani Nikula, Intel

[PATCH] drm/i915: don't make assumptions about intel_wakeref_t type

[Jani Nikula]

intel_wakeref_t is supposed to be a mostly opaque cookie to its
users. It should only be checked for being non-zero and set to
zero. Debug logging its actual value is meaningless. Switch to just
debug logging whether the async_put_wakeref is non-zero.

The issue dates back to much earlier than
commit b49e894c3fd8 ("drm/i915: Replace custom intel runtime_pm tracker
with ref_tracker library"), but this is the one that brought about a
build failure due to the printf format.

Reported-by: Stephen Rothwell 
Closes: https://lore.kernel.org/r/20240102111222.2db11...@canb.auug.org.au
Fixes: b49e894c3fd8 ("drm/i915: Replace custom intel runtime_pm tracker with 
ref_tracker library")
Cc: Andrzej Hajda 
Cc: Imre Deak 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
b/drivers/gpu/drm/i915/display/intel_display_power.c
index 5f091502719b..6fd4fa52253a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -405,8 +405,8 @@ print_async_put_domains_state(struct i915_power_domains 
*power_domains)
 struct drm_i915_private,
 display.power.domains);
 
-   drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
-   power_domains->async_put_wakeref);
+   drm_dbg(&i915->drm, "async_put_wakeref: %s\n",
+   str_yes_no(power_domains->async_put_wakeref));
 
print_power_domains(power_domains, "async_put_domains[0]",
&power_domains->async_put_domains[0]);
-- 
2.39.2

[PATCH v4 3/3] drm/xe: Use intel_wakeref_t in intel_runtime_pm functions

[José Roberto de Souza]

Now intel_wakeref_t is a unsigned long and Xe KMD version of those
functions should use the same type, so changing from bool to
intel_wakeref_t.

Cc: Maarten Lankhorst 
Signed-off-by: José Roberto de Souza 
---
 drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 10 +-
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h 
b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
index 5d2a77b52db41..420eba0e4be00 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h
@@ -162,18 +162,18 @@ static inline struct drm_i915_private 
*kdev_to_i915(struct device *kdev)
 
 #include "intel_wakeref.h"
 
-static inline bool intel_runtime_pm_get(struct xe_runtime_pm *pm)
+static inline intel_wakeref_t intel_runtime_pm_get(struct xe_runtime_pm *pm)
 {
struct xe_device *xe = container_of(pm, struct xe_device, runtime_pm);
 
if (xe_pm_runtime_get(xe) < 0) {
xe_pm_runtime_put(xe);
-   return false;
+   return 0;
}
-   return true;
+   return 1;
 }
 
-static inline bool intel_runtime_pm_get_if_in_use(struct xe_runtime_pm *pm)
+static inline intel_wakeref_t intel_runtime_pm_get_if_in_use(struct 
xe_runtime_pm *pm)
 {
struct xe_device *xe = container_of(pm, struct xe_device, runtime_pm);
 
@@ -187,7 +187,7 @@ static inline void intel_runtime_pm_put_unchecked(struct 
xe_runtime_pm *pm)
xe_pm_runtime_put(xe);
 }
 
-static inline void intel_runtime_pm_put(struct xe_runtime_pm *pm, bool wakeref)
+static inline void intel_runtime_pm_put(struct xe_runtime_pm *pm, 
intel_wakeref_t wakeref)
 {
if (wakeref)
intel_runtime_pm_put_unchecked(pm);
-- 
2.43.0

[PATCH v4 2/3] drm/xe: Fix definition of intel_wakeref_t

[José Roberto de Souza]

i915 defines it as unsigned long so Xe should do the same to avoid
compilation warnings:

  CC [M]  drivers/gpu/drm/i915/i915_gem.o
  CC [M]  drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
In file included from ./include/drm/drm_mm.h:51,
 from drivers/gpu/drm/xe/xe_bo_types.h:11,
 from drivers/gpu/drm/xe/xe_bo.h:11,
 from 
./drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h:11,
 from ./drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h:15,
 from drivers/gpu/drm/i915/display/intel_display_power.c:8:
drivers/gpu/drm/i915/display/intel_display_power.c: In function 
‘print_async_put_domains_state’:
drivers/gpu/drm/i915/display/intel_display_power.c:408:29: warning: format 
‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type 
‘int’ [-Wformat=]
  408 | drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
  | ^
  409 | power_domains->async_put_wakeref);
  | 
  |  |
  |  int
./include/drm/drm_print.h:410:39: note: in definition of macro ‘drm_dev_dbg’
  410 | __drm_dev_dbg(NULL, dev, cat, fmt, ##__VA_ARGS__)
  |   ^~~
./include/drm/drm_print.h:510:33: note: in expansion of macro ‘drm_dbg_driver’
  510 | #define drm_dbg(drm, fmt, ...)  drm_dbg_driver(drm, fmt, ##__VA_ARGS__)
  | ^~
drivers/gpu/drm/i915/display/intel_display_power.c:408:9: note: in expansion of 
macro ‘drm_dbg’
  408 | drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
  | ^~~
drivers/gpu/drm/i915/display/intel_display_power.c:408:50: note: format string 
is defined here
  408 | drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
  |~~^
  |  |
  |  long unsigned int
  |%u
  CC [M]  drivers/gpu/drm/i915/i915_gem_evict.o
  CC [M]  drivers/gpu/drm/i915/i915_gem_gtt.o
  CC [M]  drivers/gpu/drm/xe/i915-display/intel_display_trace.o
  CC [M]  drivers/gpu/drm/xe/i915-display/intel_display_wa.o
  CC [M]  drivers/gpu/drm/i915/i915_query.o

Fixes: 44e694958b95 ("drm/xe/display: Implement display support")
Cc: Maarten Lankhorst 
Signed-off-by: José Roberto de Souza 
---
 drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h 
b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
index 1c5e30cf10caa..ecb1c07077069 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
@@ -5,4 +5,4 @@
 
 #include 
 
-typedef bool intel_wakeref_t;
+typedef unsigned long intel_wakeref_t;
-- 
2.43.0

[PATCH v4 1/3] drm/i915: Disable DSB in Xe KMD

[José Roberto de Souza]

Often getting DSB overflows when starting Xorg or Wayland compositors
when running Xe KMD.
Issue was reported but nothing was done, so disabling DSB as whole
until properly fixed in Xe KMD.

v2:
- move check to HAS_DSB(Jani)

v3:
- use IS_ENABLED(I915) check in intel_dsb_prepare()

Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/989
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1031
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1072
Cc: Animesh Manna 
Cc: Rodrigo Vivi 
Cc: Jani Nikula 
Cc: Francois Dugast 
Signed-off-by: José Roberto de Souza 
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 482c28b5c2de5..a6c7122fd671d 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -453,6 +453,10 @@ struct intel_dsb *intel_dsb_prepare(const struct 
intel_crtc_state *crtc_state,
if (!HAS_DSB(i915))
return NULL;
 
+   /* TODO: DSB is broken in Xe KMD, so disabling it until fixed */
+   if (!IS_ENABLED(I915))
+   return NULL;
+
dsb = kzalloc(sizeof(*dsb), GFP_KERNEL);
if (!dsb)
goto out;
-- 
2.43.0

Re: [PATCH v3 1/2] drm/i915: Disable DSB in Xe KMD

[Francois Dugast]

On Thu, Jan 04, 2024 at 08:05:56AM -0800, José Roberto de Souza wrote:
> Often getting DBS overflows when starting Xorg or Wayland compositors
> when running Xe KMD.

s/DBS overflows/DSB overflows/

> Issue was reported but nothing was done, so disabling DSB as whole
> until properly fixed in Xe KMD.
> 
> v2:
> - move check to HAS_DSB(Jani)
> 
> v3:
> - use IS_ENABLED(I915) check in intel_dsb_prepare()
> 
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/989
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1031
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1072
> Cc: Animesh Manna 
> Cc: Rodrigo Vivi 
> Cc: Jani Nikula 
> Signed-off-by: José Roberto de Souza 
> ---
>  drivers/gpu/drm/i915/display/intel_dsb.c | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 482c28b5c2de5..a6c7122fd671d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -453,6 +453,10 @@ struct intel_dsb *intel_dsb_prepare(const struct 
> intel_crtc_state *crtc_state,
>   if (!HAS_DSB(i915))
>   return NULL;
>  
> + /* TODO: DSB is broken in Xe KMD, so disabling it until fixed */
> + if (!IS_ENABLED(I915))
> + return NULL;
> +
>   dsb = kzalloc(sizeof(*dsb), GFP_KERNEL);
>   if (!dsb)
>   goto out;
> -- 
> 2.43.0
> 

[PATCH v3 2/2] drm/xe: Fix definition of intel_wakeref_t

[José Roberto de Souza]

i915 defines it as unsigned long so Xe should do the same.
It did not break anything because the bool was being promoted to int
by compiler.
This was caught because it causing compilation warnings:

  CC [M]  drivers/gpu/drm/i915/i915_gem.o
  CC [M]  drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
In file included from ./include/drm/drm_mm.h:51,
 from drivers/gpu/drm/xe/xe_bo_types.h:11,
 from drivers/gpu/drm/xe/xe_bo.h:11,
 from 
./drivers/gpu/drm/xe/compat-i915-headers/gem/i915_gem_object.h:11,
 from ./drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h:15,
 from drivers/gpu/drm/i915/display/intel_display_power.c:8:
drivers/gpu/drm/i915/display/intel_display_power.c: In function 
‘print_async_put_domains_state’:
drivers/gpu/drm/i915/display/intel_display_power.c:408:29: warning: format 
‘%lu’ expects argument of type ‘long unsigned int’, but argument 5 has type 
‘int’ [-Wformat=]
  408 | drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
  | ^
  409 | power_domains->async_put_wakeref);
  | 
  |  |
  |  int
./include/drm/drm_print.h:410:39: note: in definition of macro ‘drm_dev_dbg’
  410 | __drm_dev_dbg(NULL, dev, cat, fmt, ##__VA_ARGS__)
  |   ^~~
./include/drm/drm_print.h:510:33: note: in expansion of macro ‘drm_dbg_driver’
  510 | #define drm_dbg(drm, fmt, ...)  drm_dbg_driver(drm, fmt, ##__VA_ARGS__)
  | ^~
drivers/gpu/drm/i915/display/intel_display_power.c:408:9: note: in expansion of 
macro ‘drm_dbg’
  408 | drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
  | ^~~
drivers/gpu/drm/i915/display/intel_display_power.c:408:50: note: format string 
is defined here
  408 | drm_dbg(&i915->drm, "async_put_wakeref %lu\n",
  |~~^
  |  |
  |  long unsigned int
  |%u
  CC [M]  drivers/gpu/drm/i915/i915_gem_evict.o
  CC [M]  drivers/gpu/drm/i915/i915_gem_gtt.o
  CC [M]  drivers/gpu/drm/xe/i915-display/intel_display_trace.o
  CC [M]  drivers/gpu/drm/xe/i915-display/intel_display_wa.o
  CC [M]  drivers/gpu/drm/i915/i915_query.o

Fixes: 44e694958b95 ("drm/xe/display: Implement display support")
Cc: Maarten Lankhorst 
Signed-off-by: José Roberto de Souza 
---
 drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h 
b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
index 1c5e30cf10caa..ecb1c07077069 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_wakeref.h
@@ -5,4 +5,4 @@
 
 #include 
 
-typedef bool intel_wakeref_t;
+typedef unsigned long intel_wakeref_t;
-- 
2.43.0

[PATCH v3 1/2] drm/i915: Disable DSB in Xe KMD

[José Roberto de Souza]

Often getting DBS overflows when starting Xorg or Wayland compositors
when running Xe KMD.
Issue was reported but nothing was done, so disabling DSB as whole
until properly fixed in Xe KMD.

v2:
- move check to HAS_DSB(Jani)

v3:
- use IS_ENABLED(I915) check in intel_dsb_prepare()

Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/989
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1031
Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1072
Cc: Animesh Manna 
Cc: Rodrigo Vivi 
Cc: Jani Nikula 
Signed-off-by: José Roberto de Souza 
---
 drivers/gpu/drm/i915/display/intel_dsb.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 482c28b5c2de5..a6c7122fd671d 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -453,6 +453,10 @@ struct intel_dsb *intel_dsb_prepare(const struct 
intel_crtc_state *crtc_state,
if (!HAS_DSB(i915))
return NULL;
 
+   /* TODO: DSB is broken in Xe KMD, so disabling it until fixed */
+   if (!IS_ENABLED(I915))
+   return NULL;
+
dsb = kzalloc(sizeof(*dsb), GFP_KERNEL);
if (!dsb)
goto out;
-- 
2.43.0

Re: ✗ Fi.CI.BAT: failure for drm/i915: Fix HPD handling during driver init/shutdown (rev2)

[Imre Deak]

On Thu, Jan 04, 2024 at 02:08:32PM +, Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915: Fix HPD handling during driver init/shutdown (rev2)
> URL   : https://patchwork.freedesktop.org/series/128186/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_14078 -> Patchwork_128186v2
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_128186v2 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_128186v2, please notify your bug team 
> (i915-ci-in...@lists.freedesktop.org) to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/index.html
> 
> Participating hosts (38 -> 37)
> --
> 
>   Additional (2): bat-rpls-2 fi-pnv-d510 
>   Missing(3): bat-dg2-8 bat-dg2-9 fi-snb-2520m 
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_128186v2:
> 
> ### IGT changes ###
> 
>  Possible regressions 
> 
>   * igt@i915_pm_rpm@module-reload:
> - fi-kbl-7567u:   [PASS][1] -> [DMESG-WARN][2]
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_pm_...@module-reload.html
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_pm_...@module-reload.html

<7>[  358.803569] i915 :00:02.0: [drm:lspcon_wake_native_aux_ch [i915]] 
Native AUX CH up, DPCD version: 1.2
<7>[  358.804571] i915 :00:02.0: [drm:drm_dp_i2c_do_msg 
[drm_display_helper]] AUX B/DDI B/PHY B: native defer
<7>[  358.805995] i915 :00:02.0: [drm:drm_dp_i2c_do_msg 
[drm_display_helper]] AUX B/DDI B/PHY B: native defer
...
<7>[  358.823684] i915 :00:02.0: [drm:drm_dp_dual_mode_detect 
[drm_display_helper]] DP dual mode HDMI ID:  (err -121)
...
<7>[  358.925347] i915 :00:02.0: [drm:drm_dp_dual_mode_detect 
[drm_display_helper]] DP dual mode HDMI ID:  (err -121)
<7>[  358.925360] i915 :00:02.0: [drm:lspcon_init [i915]] No LSPCON 
detected, found unknown
<3>[  358.925619] i915 :00:02.0: [drm] *ERROR* Failed to probe lspcon

Repeating many times, across multiple driver reloads, and then
recovering after a system suspend/resume:

<7>[  541.293689] [IGT] i915_suspend: executing
<7>[  541.302373] [IGT] i915_suspend: starting subtest basic-s3-without-i915
...
<7>[  541.323944] [IGT] Unloading i915
<7>[  542.504357] i915 :00:02.0: [drm:verify_connector_state [i915]] 
[CONNECTOR:121:DP-4]
<7>[  544.783852] [IGT] Re-loading i915
...
<7>[  545.658165] i915 :00:02.0: [drm:lspcon_wake_native_aux_ch [i915]] 
Native AUX CH up, DPCD version: 1.2
<7>[  545.659690] i915 :00:02.0: [drm:drm_dp_i2c_do_msg 
[drm_display_helper]] AUX B/DDI B/PHY B: native defer
<7>[  545.666846] i915 :00:02.0: [drm:drm_dp_i2c_do_msg 
[drm_display_helper]] AUX B/DDI B/PHY B: native defer
...
<7>[  545.667750] i915 :00:02.0: [drm:drm_dp_dual_mode_detect 
[drm_display_helper]] DP dual mode HDMI ID: DP-HDMI ADAPTOR\004 (err 0)
...
<7>[  545.678538] i915 :00:02.0: [drm:lspcon_init [i915]] LSPCON detected
...
<7>[  545.679409] i915 :00:02.0: [drm:drm_dp_i2c_do_msg 
[drm_display_helper]] AUX B/DDI B/PHY B: native defer
<7>[  545.681121] i915 :00:02.0: [drm:drm_dp_i2c_do_msg 
[drm_display_helper]] AUX B/DDI B/PHY B: native defer
...
<7>[  545.696955] i915 :00:02.0: [drm:lspcon_init [i915]] Vendor: Mega Chips
<7>[  545.697221] i915 :00:02.0: [drm:lspcon_init [i915]] Success: LSPCON 
init
<7>[  545.697953] i915 :00:02.0: [drm:lspcon_detect_hdr_capability [i915]] 
LSPCON capable of HDR

Looks either the LSPCON FW breaking for some reason after a while, deferring
all the AUX responses similarly to the working scenarios, but never actually
completing the AUX request as it does in the working scenarios. This state
persists across multiple driver reloads and eventually recovering after a
system suspend/resume. Possible root causes are:

- Some required LSPCON programming done by BIOS/GOP but unknown to i915 getting
  lost across power state transitions
- LSPCON getting confused by some i915 programming (via AUX DPCD)
- Firmware bug, missing FW update on the KBL system

The same issues happened already earlier in the following CI runs:
Patchwork_127966v3/fi-kbl-7567u
Patchwork_128147v2/fi-kbl-7567u
IGTPW_10469/fi-kbl-7567u

I couldn't find any ticket open for it:
https://gitlab.freedesktop.org/drm/intel/-/issues/10013

I thought it could be related to one of
  drm/i915/dp: Abort AUX on disconnected native DP ports
  drm/i915: Filter out glitches on HPD lines during hotplug detection

in the patchset, however I can't see in the log any connector state change (due
to HPD getting deasserted) or an AUX failure rela

Re: [PATCH] drm/i915: clear the QGV mask set by GOP while booting

[Sworo, George D]

On Thu, 2024-01-04 at 10:13 +0200, Lisovskiy, Stanislav wrote:
> On Wed, Jan 03, 2024 at 06:57:45PM -0800, George D Sworo wrote:
> > From: George D Sworo 
> > 
> > GOP driver in the firmware is masking the QGV points except the one
> > which can
> > provide high Bandwidth required for panel.
> > 
> > On boot to the OS the mask is already set, and is not cleared
> > anywhere
> > in the i915 driver
> > even though sagv is enabled. This means Pcode is unable to switch
> > to
> > other QGV work points
> > except the one enabled by default in the GOP driver at boot time.
> > 
> > This change resets the mask, when i915 driver is finding the QGV
> > points at the boot time. So that Pcode can switch to QGV work
> > points
> > based
> > on the Workloads.
> > 
> > Signed-off-by: George D Sworo 
> 
> Hi,
> 
> We already have a case similar to this, you might want to check this
> out:
> 
> https://patchwork.freedesktop.org/series/126962/
> 
> Stan
> 
> > ---
> >  drivers/gpu/drm/i915/display/intel_bw.c | 6 ++
> >  1 file changed, 6 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_bw.c
> > b/drivers/gpu/drm/i915/display/intel_bw.c
> > index bef96db62c80..e2576c0fb729 100644
> > --- a/drivers/gpu/drm/i915/display/intel_bw.c
> > +++ b/drivers/gpu/drm/i915/display/intel_bw.c
> > @@ -212,6 +212,7 @@ static int icl_get_qgv_points(struct
> > drm_i915_private *dev_priv,
> >   bool is_y_tile)
> >  {
> > const struct dram_info *dram_info = &dev_priv->dram_info;
> > +   u32 val = 0x00, val2 = 0;
> > int i, ret;
> >  
> > qi->num_points = dram_info->num_qgv_points;
> > @@ -311,6 +312,11 @@ static int icl_get_qgv_points(struct
> > drm_i915_private *dev_priv,
> > i, qi->psf_points[i].clk);
> > }
> >  
> > +   /* clear the QGV points mask set by the GOP driver while
> > booting */
> > +   ret = snb_pcode_read(&dev_priv->uncore,
> > ICL_PCODE_SAGV_DE_MEM_SS_CONFIG, &val, &val2);
> > +   if (ret)
> > +   return ret;
> > +
> > return 0;
> >  }
> >  
> > -- 
> > 2.34.1
> > 

hi Stan,

Thanks for the quick reply. unfortunately, SAGV frequency doesnt seem
to be scaling even with this patch added 
https://patchwork.freedesktop.org/series/126962/ .

✓ Fi.CI.BAT: success for series starting with [1/4] drm/ttm: return ENOSPC from ttm_bo_mem_space

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/ttm: return ENOSPC from ttm_bo_mem_space
URL   : https://patchwork.freedesktop.org/series/128207/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14078 -> Patchwork_128207v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/index.html

Participating hosts (38 -> 37)
--

  Additional (2): bat-rpls-2 fi-pnv-d510 
  Missing(3): bat-mtlp-8 bat-kbl-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_128207v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-rpls-2: NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/bat-rpls-2/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_lmem_swapping@basic:
- fi-pnv-d510:NOTRUN -> [SKIP][2] ([fdo#109271]) +28 other tests 
skip
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/fi-pnv-d510/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlm-1: NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/bat-adlm-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_tiled_pread_basic:
- bat-rpls-2: NOTRUN -> [SKIP][4] ([i915#3282])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/bat-rpls-2/igt@gem_tiled_pread_basic.html

  * igt@i915_selftest@live@workarounds:
- bat-adlm-1: NOTRUN -> [INCOMPLETE][5] ([i915#9413])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/bat-adlm-1/igt@i915_selftest@l...@workarounds.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-rpls-2: NOTRUN -> [SKIP][6] ([i915#4103]) +1 other test skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/bat-rpls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-rpls-2: NOTRUN -> [SKIP][7] ([i915#3555] / [i915#3840] / 
[i915#9886])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/bat-rpls-2/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-rpls-2: NOTRUN -> [SKIP][8] ([fdo#109285])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/bat-rpls-2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pm_backlight@basic-brightness:
- bat-rpls-2: NOTRUN -> [SKIP][9] ([i915#5354])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/bat-rpls-2/igt@kms_pm_backli...@basic-brightness.html

  * igt@kms_pm_rpm@basic-rte:
- bat-rpls-2: NOTRUN -> [ABORT][10] ([i915#8668] / [i915#9368] / 
[i915#9897])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/bat-rpls-2/igt@kms_pm_...@basic-rte.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318
  [i915#9368]: https://gitlab.freedesktop.org/drm/intel/issues/9368
  [i915#9413]: https://gitlab.freedesktop.org/drm/intel/issues/9413
  [i915#9886]: https://gitlab.freedesktop.org/drm/intel/issues/9886
  [i915#9897]: https://gitlab.freedesktop.org/drm/intel/issues/9897


Build changes
-

  * Linux: CI_DRM_14078 -> Patchwork_128207v1

  CI-20190529: 20190529
  CI_DRM_14078: 1baf990bc673f31d9eba7dfcb597ac0cb7420b14 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7655: ddf7cf40a00caa7d02f3729e1e50f78f102463d9 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128207v1: 1baf990bc673f31d9eba7dfcb597ac0cb7420b14 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

1006f1804b9a drm/amdgpu: use GTT only as fallback for VRAM|GTT
6e81b857f5ae drm/ttm: improve idle/busy handling v2
6e69b7b92bbb drm/ttm: replace busy placement with flags v4
1d9e06ad89ab drm/ttm: return ENOSPC from ttm_bo_mem_space

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128207v1/index.h

✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/ttm: return ENOSPC from ttm_bo_mem_space

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/ttm: return ENOSPC from ttm_bo_mem_space
URL   : https://patchwork.freedesktop.org/series/128207/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/ttm: return ENOSPC from ttm_bo_mem_space

[Patchwork]

== Series Details ==

Series: series starting with [1/4] drm/ttm: return ENOSPC from ttm_bo_mem_space
URL   : https://patchwork.freedesktop.org/series/128207/
State : warning

== Summary ==

Error: dim checkpatch failed
dcccad5f8257 drm/ttm: return ENOSPC from ttm_bo_mem_space
-:35: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address 
mismatch: 'From: "Christian König" ' != 
'Signed-off-by: Christian König '

total: 0 errors, 1 warnings, 0 checks, 17 lines checked
ac91c231c08a drm/ttm: replace busy placement with flags v4
c48eb531579e drm/ttm: improve idle/busy handling v2
-:347: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address 
mismatch: 'From: "Christian König" ' != 
'Signed-off-by: Christian König '

total: 0 errors, 1 warnings, 0 checks, 284 lines checked
107fe4c67a08 drm/amdgpu: use GTT only as fallback for VRAM|GTT
-:32: WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address 
mismatch: 'From: "Christian König" ' != 
'Signed-off-by: Christian König '

total: 0 errors, 1 warnings, 0 checks, 12 lines checked

✗ Fi.CI.BAT: failure for Disable dynamic load balancing and support fixed balancing

[Patchwork]

== Series Details ==

Series: Disable dynamic load balancing and support fixed balancing
URL   : https://patchwork.freedesktop.org/series/128202/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14078 -> Patchwork_128202v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_128202v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128202v1, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/index.html

Participating hosts (38 -> 35)
--

  Additional (2): bat-rpls-2 fi-pnv-d510 
  Missing(5): fi-bsw-n3050 fi-apl-guc fi-snb-2520m fi-glk-j4005 bat-mtlp-8 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_128202v1:

### IGT changes ###

 Possible regressions 

  * igt@i915_module_load@load:
- fi-skl-6600u:   [PASS][1] -> [ABORT][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-skl-6600u/igt@i915_module_l...@load.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-skl-6600u/igt@i915_module_l...@load.html
- fi-skl-guc: [PASS][3] -> [ABORT][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-skl-guc/igt@i915_module_l...@load.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-skl-guc/igt@i915_module_l...@load.html
- fi-kbl-7567u:   [PASS][5] -> [ABORT][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_module_l...@load.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-kbl-7567u/igt@i915_module_l...@load.html
- fi-cfl-8700k:   [PASS][7] -> [ABORT][8]
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-cfl-8700k/igt@i915_module_l...@load.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-cfl-8700k/igt@i915_module_l...@load.html
- fi-bsw-nick:[PASS][9] -> [ABORT][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-bsw-nick/igt@i915_module_l...@load.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-bsw-nick/igt@i915_module_l...@load.html
- bat-kbl-2:  [PASS][11] -> [ABORT][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/bat-kbl-2/igt@i915_module_l...@load.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/bat-kbl-2/igt@i915_module_l...@load.html
- fi-cfl-guc: [PASS][13] -> [ABORT][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-cfl-guc/igt@i915_module_l...@load.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-cfl-guc/igt@i915_module_l...@load.html
- fi-kbl-x1275:   [PASS][15] -> [ABORT][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-x1275/igt@i915_module_l...@load.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-kbl-x1275/igt@i915_module_l...@load.html
- fi-cfl-8109u:   [PASS][17] -> [ABORT][18]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-cfl-8109u/igt@i915_module_l...@load.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-cfl-8109u/igt@i915_module_l...@load.html
- fi-ivb-3770:[PASS][19] -> [ABORT][20]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-ivb-3770/igt@i915_module_l...@load.html
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-ivb-3770/igt@i915_module_l...@load.html
- fi-kbl-guc: [PASS][21] -> [ABORT][22]
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-guc/igt@i915_module_l...@load.html
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-kbl-guc/igt@i915_module_l...@load.html

  * igt@i915_selftest@live@client:
- fi-elk-e7500:   [PASS][23] -> [DMESG-WARN][24] +48 other tests 
dmesg-warn
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-elk-e7500/igt@i915_selftest@l...@client.html
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/fi-elk-e7500/igt@i915_selftest@l...@client.html

  * igt@i915_selftest@live@coherency:
- bat-jsl-3:  [PASS][25] -> [DMESG-WARN][26] +47 other tests 
dmesg-warn
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/bat-jsl-3/igt@i915_selftest@l...@coherency.html
   [26]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128202v1/bat-jsl-3/igt@i915_selftest@l...@coherency.html

  * igt@i915_selftest@live@gt_contexts:
- fi-ilk-650: [PASS][27] -> [DMESG-WARN][28] +48 other tests 
dmesg-warn
   [27]: 
ht

Re: [PATCH v2 1/3] drm/i915/gt: Support fixed CCS mode

[Tvrtko Ursulin]

On 04/01/2024 14:35, Andi Shyti wrote:

The CCS mode involves assigning CCS engines to slices depending
on the number of slices and the number of engines the user wishes
to set.

In this patch, the default CCS setting is established during the
initial GT settings. It involves assigning only one CCS to all
the slices.

Based on a patch by Chris Wilson 
and Tejas Upadhyay .

Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Niranjana Vishwanathapura 
Cc: Tejas Upadhyay 
---
  drivers/gpu/drm/i915/Makefile   |  1 +
  drivers/gpu/drm/i915/gt/intel_gt.c  |  6 ++
  drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 81 +
  drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 16 
  drivers/gpu/drm/i915/gt/intel_gt_regs.h | 13 
  drivers/gpu/drm/i915/gt/intel_gt_types.h| 19 +
  drivers/gpu/drm/i915/i915_drv.h |  2 +
  7 files changed, 138 insertions(+)
  create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
  create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index e777686190ca..1dce15d6306b 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -119,6 +119,7 @@ gt-y += \
gt/intel_ggtt_fencing.o \
gt/intel_gt.o \
gt/intel_gt_buffer_pool.o \
+   gt/intel_gt_ccs_mode.o \
gt/intel_gt_clock_utils.o \
gt/intel_gt_debugfs.o \
gt/intel_gt_engines_debugfs.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index a425db5ed3a2..e83c7b80c07a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -17,6 +17,7 @@
  #include "intel_engine_regs.h"
  #include "intel_ggtt_gmch.h"
  #include "intel_gt.h"
+#include "intel_gt_ccs_mode.h"
  #include "intel_gt_buffer_pool.h"
  #include "intel_gt_clock_utils.h"
  #include "intel_gt_debugfs.h"
@@ -47,6 +48,7 @@ void intel_gt_common_init_early(struct intel_gt *gt)
init_llist_head(>->watchdog.list);
INIT_WORK(>->watchdog.work, intel_gt_watchdog_work);
  
+	intel_gt_init_ccs_mode(gt);

intel_gt_init_buffer_pool(gt);
intel_gt_init_reset(gt);
intel_gt_init_requests(gt);
@@ -195,6 +197,9 @@ int intel_gt_init_hw(struct intel_gt *gt)
  
  	intel_gt_init_swizzling(gt);
  
+	/* Configure CCS mode */

+   intel_gt_apply_ccs_mode(gt);
+
/*
 * At least 830 can leave some of the unused rings
 * "active" (ie. head != tail) after resume which
@@ -860,6 +865,7 @@ void intel_gt_driver_late_release_all(struct 
drm_i915_private *i915)
  
  	for_each_gt(gt, i915, id) {

intel_uc_driver_late_release(>->uc);
+   intel_gt_fini_ccs_mode(gt);
intel_gt_fini_requests(gt);
intel_gt_fini_reset(gt);
intel_gt_fini_timelines(gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c 
b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
new file mode 100644
index ..fab8a77bded2
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
@@ -0,0 +1,81 @@
+//SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include "i915_drv.h"
+
+#include "intel_gt.h"
+#include "intel_gt_ccs_mode.h"
+#include "intel_gt_regs.h"
+#include "intel_gt_types.h"
+
+static void __intel_gt_apply_ccs_mode(struct intel_gt *gt)
+{
+   u32 mode = XEHP_CCS_MODE_CSLICE_0_3_MASK; /* disable all by default */
+   int num_slices = hweight32(CCS_MASK(gt));
+   int num_engines = gt->ccs.mode;
+   int slice = 0;
+   int i;
+
+   if (!num_engines)
+   return;
+
+   /*
+* Loop over all available slices and assign each a user engine.
+*
+* With 1 engine (ccs0):
+*   slice 0, 1, 2, 3: ccs0
+*
+* With 2 engines (ccs0, ccs1):
+*   slice 0, 2: ccs0
+*   slice 1, 3: ccs1
+*
+* With 4 engines (ccs0, ccs1, ccs2, ccs3):
+*   slice 0: ccs0
+*   slice 1: ccs1
+*   slice 2: ccs2
+*   slice 3: ccs3
+*
+* Since the number of slices and the number of engines is
+* known, and we ensure that there is an exact multiple of
+* engines for slices, the double loop becomes a loop over each
+* slice.
+*/
+   for (i = num_slices / num_engines; i < num_slices; i++) {
+   struct intel_engine_cs *engine;
+   intel_engine_mask_t tmp;
+
+   for_each_engine_masked(engine, gt, ALL_CCS(gt), tmp) {
+   /* If a slice is fused off, leave disabled */
+   while (!(CCS_MASK(gt) & BIT(slice)))
+   slice++;
+
+   mode &= ~XEHP_CCS_MODE_CSLICE(slice, 
XEHP_CCS_MODE_CSLICE_MASK);
+   mode |= XEHP_CCS_MODE_CSLICE(slice, engine->instance);
+
+

[PATCH 2/4] drm/ttm: replace busy placement with flags v4

[Christian König]

From: Somalapuram Amaranath 

Instead of a list of separate busy placement add flags which indicate
that a placement should only be used when there is room or if we need to
evict.

v2: add missing TTM_PL_FLAG_IDLE for i915
v3: fix auto build test ERROR on drm-tip/drm-tip
v4: fix some typos pointed out by checkpatch

Signed-off-by: Christian König 
Signed-off-by: Somalapuram Amaranath 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |  6 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c| 11 +--
 drivers/gpu/drm/drm_gem_vram_helper.c  |  2 -
 drivers/gpu/drm/i915/gem/i915_gem_ttm.c| 37 
 drivers/gpu/drm/loongson/lsdc_ttm.c|  2 -
 drivers/gpu/drm/nouveau/nouveau_bo.c   | 59 +
 drivers/gpu/drm/nouveau/nouveau_bo.h   |  1 -
 drivers/gpu/drm/qxl/qxl_object.c   |  2 -
 drivers/gpu/drm/qxl/qxl_ttm.c  |  2 -
 drivers/gpu/drm/radeon/radeon_object.c |  2 -
 drivers/gpu/drm/radeon/radeon_ttm.c|  8 +-
 drivers/gpu/drm/radeon/radeon_uvd.c|  1 -
 drivers/gpu/drm/ttm/ttm_bo.c   | 21 +++--
 drivers/gpu/drm/ttm/ttm_resource.c | 73 
 drivers/gpu/drm/vmwgfx/vmwgfx_bo.c |  2 -
 drivers/gpu/drm/vmwgfx/vmwgfx_ttm_buffer.c | 99 +-
 include/drm/ttm/ttm_placement.h| 10 ++-
 include/drm/ttm/ttm_resource.h |  8 +-
 18 files changed, 159 insertions(+), 187 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index cef920a93924..aa0dd6dad068 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -220,9 +220,6 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, 
u32 domain)
 
placement->num_placement = c;
placement->placement = places;
-
-   placement->num_busy_placement = c;
-   placement->busy_placement = places;
 }
 
 /**
@@ -1406,8 +1403,7 @@ vm_fault_t amdgpu_bo_fault_reserve_notify(struct 
ttm_buffer_object *bo)
AMDGPU_GEM_DOMAIN_GTT);
 
/* Avoid costly evictions; only set GTT as a busy placement */
-   abo->placement.num_busy_placement = 1;
-   abo->placement.busy_placement = &abo->placements[1];
+   abo->placements[0].flags |= TTM_PL_FLAG_IDLE;
 
r = ttm_bo_validate(bo, &abo->placement, &ctx);
if (unlikely(r == -EBUSY || r == -ERESTARTSYS))
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 05991c5c8ddb..9a6a00b1af40 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -102,23 +102,19 @@ static void amdgpu_evict_flags(struct ttm_buffer_object 
*bo,
/* Don't handle scatter gather BOs */
if (bo->type == ttm_bo_type_sg) {
placement->num_placement = 0;
-   placement->num_busy_placement = 0;
return;
}
 
/* Object isn't an AMDGPU object so ignore */
if (!amdgpu_bo_is_amdgpu_bo(bo)) {
placement->placement = &placements;
-   placement->busy_placement = &placements;
placement->num_placement = 1;
-   placement->num_busy_placement = 1;
return;
}
 
abo = ttm_to_amdgpu_bo(bo);
if (abo->flags & AMDGPU_GEM_CREATE_DISCARDABLE) {
placement->num_placement = 0;
-   placement->num_busy_placement = 0;
return;
}
 
@@ -128,13 +124,13 @@ static void amdgpu_evict_flags(struct ttm_buffer_object 
*bo,
case AMDGPU_PL_OA:
case AMDGPU_PL_DOORBELL:
placement->num_placement = 0;
-   placement->num_busy_placement = 0;
return;
 
case TTM_PL_VRAM:
if (!adev->mman.buffer_funcs_enabled) {
/* Move to system memory */
amdgpu_bo_placement_from_domain(abo, 
AMDGPU_GEM_DOMAIN_CPU);
+
} else if (!amdgpu_gmc_vram_full_visible(&adev->gmc) &&
   !(abo->flags & 
AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED) &&
   amdgpu_bo_in_cpu_visible_vram(abo)) {
@@ -149,8 +145,7 @@ static void amdgpu_evict_flags(struct ttm_buffer_object *bo,
AMDGPU_GEM_DOMAIN_CPU);
abo->placements[0].fpfn = adev->gmc.visible_vram_size 
>> PAGE_SHIFT;
abo->placements[0].lpfn = 0;
-   abo->placement.busy_placement = &abo->placements[1];
-   abo->placement.num_busy_placement = 1;
+   abo->placements[0].flags |= TTM_PL_FLAG_IDLE;
} else {
/* Move to GTT memory */
amdgpu_bo_placement_from_domain(abo, 
AMDGPU_GEM_DOMAIN_GTT |
@@ -967,8 +962,6 @@ int amdgpu_ttm_alloc_gart(struct ttm_buf

[PATCH 4/4] drm/amdgpu: use GTT only as fallback for VRAM|GTT

[Christian König]

Try to fill up VRAM as well by setting the busy flag on GTT allocations.

This fixes the issue that when VRAM was evacuated for suspend it's never
filled up again unless the application is restarted.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index f110dfdc4feb..979cecf18f17 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -173,6 +173,12 @@ void amdgpu_bo_placement_from_domain(struct amdgpu_bo 
*abo, u32 domain)
abo->flags & AMDGPU_GEM_CREATE_PREEMPTIBLE ?
AMDGPU_PL_PREEMPT : TTM_PL_TT;
places[c].flags = 0;
+   /*
+* When GTT is just an alternative to VRAM make sure that we
+* only use it as fallback and still try to fill up VRAM first.
+*/
+   if (domain & abo->preferred_domains & AMDGPU_GEM_DOMAIN_VRAM)
+   places[c].flags |= TTM_PL_FLAG_BUSY;
c++;
}
 
-- 
2.34.1

[PATCH 3/4] drm/ttm: improve idle/busy handling v2

[Christian König]

Previously we would never try to move a BO into the preferred placements
when it ever landed in a busy placement since those were considered
compatible.

Rework the whole handling and finally unify the idle and busy handling.
ttm_bo_validate() is now responsible to try idle placement first and then
use the busy placement if that didn't worked.

Drawback is that we now always try the idle placement first for each
validation which might cause some additional CPU overhead on overcommit.

v2: fix kerneldoc warning and coding style

Signed-off-by: Christian König 
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c |   2 +-
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c|   2 +-
 drivers/gpu/drm/ttm/ttm_bo.c   | 131 -
 drivers/gpu/drm/ttm/ttm_resource.c |  15 ++-
 include/drm/ttm/ttm_bo.h   |   3 +-
 include/drm/ttm/ttm_resource.h |   3 +-
 6 files changed, 65 insertions(+), 91 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index aa0dd6dad068..f110dfdc4feb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -404,7 +404,7 @@ int amdgpu_bo_create_kernel_at(struct amdgpu_device *adev,
(*bo_ptr)->placements[i].lpfn = (offset + size) >> PAGE_SHIFT;
}
r = ttm_bo_mem_space(&(*bo_ptr)->tbo, &(*bo_ptr)->placement,
-&(*bo_ptr)->tbo.resource, &ctx);
+&(*bo_ptr)->tbo.resource, &ctx, false);
if (r)
goto error;
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c 
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 9a6a00b1af40..00da9a81cf6c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -967,7 +967,7 @@ int amdgpu_ttm_alloc_gart(struct ttm_buffer_object *bo)
placements.mem_type = TTM_PL_TT;
placements.flags = bo->resource->placement;
 
-   r = ttm_bo_mem_space(bo, &placement, &tmp, &ctx);
+   r = ttm_bo_mem_space(bo, &placement, &tmp, &ctx, true);
if (unlikely(r))
return r;
 
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index aa12bd5cfd17..17bfc252f76d 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -414,7 +414,7 @@ static int ttm_bo_bounce_temp_buffer(struct 
ttm_buffer_object *bo,
hop_placement.placement = hop;
 
/* find space in the bounce domain */
-   ret = ttm_bo_mem_space(bo, &hop_placement, &hop_mem, ctx);
+   ret = ttm_bo_mem_space(bo, &hop_placement, &hop_mem, ctx, true);
if (ret)
return ret;
/* move to the bounce domain */
@@ -454,7 +454,7 @@ static int ttm_bo_evict(struct ttm_buffer_object *bo,
return ttm_bo_pipeline_gutting(bo);
}
 
-   ret = ttm_bo_mem_space(bo, &placement, &evict_mem, ctx);
+   ret = ttm_bo_mem_space(bo, &placement, &evict_mem, ctx, true);
if (ret) {
if (ret != -ERESTARTSYS) {
pr_err("Failed to find memory space for buffer 0x%p 
eviction\n",
@@ -724,37 +724,6 @@ static int ttm_bo_add_move_fence(struct ttm_buffer_object 
*bo,
return ret;
 }
 
-/*
- * Repeatedly evict memory from the LRU for @mem_type until we create enough
- * space, or we've evicted everything and there isn't enough space.
- */
-static int ttm_bo_mem_force_space(struct ttm_buffer_object *bo,
- const struct ttm_place *place,
- struct ttm_resource **mem,
- struct ttm_operation_ctx *ctx)
-{
-   struct ttm_device *bdev = bo->bdev;
-   struct ttm_resource_manager *man;
-   struct ww_acquire_ctx *ticket;
-   int ret;
-
-   man = ttm_manager_type(bdev, place->mem_type);
-   ticket = dma_resv_locking_ctx(bo->base.resv);
-   do {
-   ret = ttm_resource_alloc(bo, place, mem);
-   if (likely(!ret))
-   break;
-   if (unlikely(ret != -ENOSPC))
-   return ret;
-   ret = ttm_mem_evict_first(bdev, man, place, ctx,
- ticket);
-   if (unlikely(ret != 0))
-   return ret;
-   } while (1);
-
-   return ttm_bo_add_move_fence(bo, man, *mem, ctx->no_wait_gpu);
-}
-
 /**
  * ttm_bo_mem_space
  *
@@ -763,6 +732,7 @@ static int ttm_bo_mem_force_space(struct ttm_buffer_object 
*bo,
  * @placement: Proposed new placement for the buffer object.
  * @mem: A struct ttm_resource.
  * @ctx: if and how to sleep, lock buffers and alloc memory
+ * @force_space: If we should evict buffers to force space
  *
  * Allocate memory space for the buffer object pointed to by @bo, using
  * the placement flags in @placement, potentially evicting other idle buffer 
objects.
@@ -776,12 +746,14 

[PATCH 1/4] drm/ttm: return ENOSPC from ttm_bo_mem_space

[Christian König]

Only convert it to ENOMEM in ttm_bo_validate.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/ttm/ttm_bo.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index edf10618fe2b..8c1eaa74fa21 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -830,7 +830,7 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
goto error;
}
 
-   ret = -ENOMEM;
+   ret = -ENOSPC;
if (!type_found) {
pr_err(TTM_PFX "No compatible memory type found\n");
ret = -EINVAL;
@@ -916,6 +916,9 @@ int ttm_bo_validate(struct ttm_buffer_object *bo,
return -EINVAL;
 
ret = ttm_bo_move_buffer(bo, placement, ctx);
+   /* For backward compatibility with userspace */
+   if (ret == -ENOSPC)
+   return -ENOMEM;
if (ret)
return ret;
 
-- 
2.34.1

Rework TTMs busy handling

[Christian König]

Hi guys,

I'm trying to make this functionality a bit more useful for years now
since we multiple reports that behavior of drivers can be suboptimal
when multiple placements be given.

So basically instead of hacking around the TTM behavior in the driver
once more I've gone ahead and changed the idle/busy placement list
into idle/busy placement flags. This not only saves a bunch of code,
but also allows setting some placements as fallback which are used if
allocating from the preferred ones didn't worked.

Intel CI seems to be happy with those patches, so any more comments?

Regards,
Christian.

✗ Fi.CI.SPARSE: warning for Disable dynamic load balancing and support fixed balancing

[Patchwork]

== Series Details ==

Series: Disable dynamic load balancing and support fixed balancing
URL   : https://patchwork.freedesktop.org/series/128202/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.CHECKPATCH: warning for Disable dynamic load balancing and support fixed balancing

[Patchwork]

== Series Details ==

Series: Disable dynamic load balancing and support fixed balancing
URL   : https://patchwork.freedesktop.org/series/128202/
State : warning

== Summary ==

Error: dim checkpatch failed
478beb8ee33d drm/i915/gt: Support fixed CCS mode
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in 
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:74: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#74: 
new file mode 100644

-:79: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier 
tag in line 1
#79: FILE: drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c:1:
+//SPDX-License-Identifier: MIT

-:200: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'cslice' may be better as 
'(cslice)' to avoid precedence issues
#200: FILE: drivers/gpu/drm/i915/gt/intel_gt_regs.h:1617:
+#define   XEHP_CCS_MODE_CSLICE(cslice, ccs) \
+   (ccs << (cslice * XEHP_CCS_MODE_CSLICE_WIDTH))

-:200: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'ccs' may be better as 
'(ccs)' to avoid precedence issues
#200: FILE: drivers/gpu/drm/i915/gt/intel_gt_regs.h:1617:
+#define   XEHP_CCS_MODE_CSLICE(cslice, ccs) \
+   (ccs << (cslice * XEHP_CCS_MODE_CSLICE_WIDTH))

-:229: CHECK:UNCOMMENTED_DEFINITION: struct mutex definition without comment
#229: FILE: drivers/gpu/drm/i915/gt/intel_gt_types.h:225:
+   struct mutex mutex;

total: 0 errors, 2 warnings, 3 checks, 186 lines checked
592cf5d3fe96 drm/i915/gt: Allow user to set up the CSS mode
-:57: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around '!val'
#57: FILE: drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c:105:
+   if ((!val) || (val > num_slices) || (val % num_slices))

-:57: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around 'val > 
num_slices'
#57: FILE: drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c:105:
+   if ((!val) || (val > num_slices) || (val % num_slices))

total: 0 errors, 0 warnings, 2 checks, 97 lines checked
0a1daf5f7606 drm/i915/gt: Disable HW load balancing for CCS

[PATCH 1/4] drm/ttm: return ENOSPC from ttm_bo_mem_space

[Christian König]

Only convert it to ENOMEM in ttm_bo_validate.

Signed-off-by: Christian König 
---
 drivers/gpu/drm/ttm/ttm_bo.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index edf10618fe2b..8c1eaa74fa21 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -830,7 +830,7 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
goto error;
}
 
-   ret = -ENOMEM;
+   ret = -ENOSPC;
if (!type_found) {
pr_err(TTM_PFX "No compatible memory type found\n");
ret = -EINVAL;
@@ -916,6 +916,9 @@ int ttm_bo_validate(struct ttm_buffer_object *bo,
return -EINVAL;
 
ret = ttm_bo_move_buffer(bo, placement, ctx);
+   /* For backward compatibility with userspace */
+   if (ret == -ENOSPC)
+   return -ENOMEM;
if (ret)
return ret;
 
-- 
2.34.1

[PULL] drm-misc-next-fixes

[Maxime Ripard]

Hi!

Here's this week drm-misc-next-fixes PR

Maxime

drm-misc-next-fixes-2024-01-04:
One fix for drm/plane to avoid a use-after-free and some additional
warnings to prevent more of these occurences, a lock inversion
dependency fix and an indentation fix for drm/rockchip, and some doc
warning fixes for imagination and gpuvm.
The following changes since commit 933a2a376fb3f22ba4774f74233571504ac56b02:

  drm: using mul_u32_u32() requires linux/math64.h (2023-12-19 15:29:17 +0200)

are available in the Git repository at:

  git://anongit.freedesktop.org/drm/drm-misc tags/drm-misc-next-fixes-2024-01-04

for you to fetch changes up to eee706839333ec0643f1b4898a37588025bf4cb5:

  drm/imagination: pvr_device.h: fix all kernel-doc warnings (2024-01-02 
11:50:05 +0100)


One fix for drm/plane to avoid a use-after-free and some additional
warnings to prevent more of these occurences, a lock inversion
dependency fix and an indentation fix for drm/rockchip, and some doc
warning fixes for imagination and gpuvm.


Andy Yan (1):
  drm/rockchip: vop2: Avoid use regmap_reinit_cache at runtime

Jiapeng Chong (1):
  drm/rockchip: vop2: clean up some inconsistent indenting

Randy Dunlap (2):
  drm/gpuvm: fix all kernel-doc warnings in include/drm/drm_gpuvm.h
  drm/imagination: pvr_device.h: fix all kernel-doc warnings

Ville Syrjälä (2):
  drm: Don't unref the same fb many times by mistake due to deadlock 
handling
  drm: Warn when freeing a framebuffer that's still on a list

 drivers/gpu/drm/drm_framebuffer.c|  5 +-
 drivers/gpu/drm/drm_plane.c  |  1 +
 drivers/gpu/drm/imagination/pvr_device.h | 46 
 drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 12 ++---
 include/drm/drm_gpuvm.h  | 80 
 5 files changed, 79 insertions(+), 65 deletions(-)


signature.asc
Description: PGP signature

[PATCH v2 3/3] drm/i915/gt: Disable HW load balancing for CCS

[Andi Shyti]

The hardware is not able to dynamically balance the load between
CCS engines. Wa_16016805146 suggests disabling it for all
platforms.

Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Niranjana Vishwanathapura 
Cc: Tejas Upadhyay 
---
 drivers/gpu/drm/i915/gt/intel_gt_regs.h | 1 +
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 ++
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 3e558d6d5e89..edaa446abd91 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1478,6 +1478,7 @@
 
 #define GEN12_RCU_MODE _MMIO(0x14800)
 #define   GEN12_RCU_MODE_CCS_ENABLEREG_BIT(0)
+#define   XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE   REG_BIT(1)
 
 #define CHV_FUSE_GT_MMIO(VLV_GUNIT_BASE + 0x2168)
 #define   CHV_FGT_DISABLE_SS0  (1 << 10)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 3eacbc50caf8..a7718f7d2925 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -2978,6 +2978,12 @@ general_render_compute_wa_init(struct intel_engine_cs 
*engine, struct i915_wa_li
wa_mcr_masked_en(wal, GEN8_HALF_SLICE_CHICKEN1,
 GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE);
}
+
+   /*
+* Wa_16016805146: disable the CCS load balancing
+* indiscriminately for all the platforms
+*/
+   wa_masked_en(wal, GEN12_RCU_MODE, XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE);
 }
 
 static void
-- 
2.43.0

[PATCH v2 2/3] drm/i915/gt: Allow user to set up the CSS mode

[Andi Shyti]

Now that the CCS mode is configurable, an interface has been
exposed in the GT's sysfs set of files, allowing users to set the
mode.

Additionally, another interface has been added to display the
number of available slices, named 'num_slices.'

Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Niranjana Vishwanathapura 
Cc: Tejas Upadhyay 
---
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 68 +
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h |  1 +
 drivers/gpu/drm/i915/gt/intel_gt_sysfs.c|  2 +
 3 files changed, 71 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c 
b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
index fab8a77bded2..88663698eb1f 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
@@ -7,6 +7,7 @@
 
 #include "intel_gt.h"
 #include "intel_gt_ccs_mode.h"
+#include "intel_gt_print.h"
 #include "intel_gt_regs.h"
 #include "intel_gt_types.h"
 
@@ -79,3 +80,70 @@ void intel_gt_fini_ccs_mode(struct intel_gt *gt)
 {
mutex_destroy(>->ccs.mutex);
 }
+
+static ssize_t
+ccs_mode_show(struct kobject *kobj, struct kobj_attribute *attr, char *buff)
+{
+   struct intel_gt *gt = container_of(kobj, struct intel_gt, sysfs_gt);
+
+   return sysfs_emit(buff, "%u\n", gt->ccs.mode);
+}
+
+static ssize_t
+ccs_mode_store(struct kobject *kobj, struct kobj_attribute *attr,
+  const char *buff, size_t count)
+{
+   struct intel_gt *gt = container_of(kobj, struct intel_gt, sysfs_gt);
+   int num_slices = hweight32(CCS_MASK(gt));
+   int err;
+   u32 val;
+
+   err = kstrtou32(buff, 0, &val);
+   if (err)
+   return err;
+
+   if ((!val) || (val > num_slices) || (val % num_slices))
+   return -EINVAL;
+
+   mutex_lock(>->ccs.mutex);
+
+   if (val == gt->ccs.mode)
+   goto out;
+
+   gt->ccs.mode = val;
+   intel_gt_apply_ccs_mode(gt);
+
+out:
+   mutex_unlock(>->ccs.mutex);
+
+   return count;
+}
+
+static ssize_t
+num_slices_show(struct kobject *kobj, struct kobj_attribute *attr, char *buff)
+{
+   struct intel_gt *gt = container_of(kobj, struct intel_gt, sysfs_gt);
+   u32 num_slices;
+
+   num_slices = hweight32(CCS_MASK(gt));
+
+   return sysfs_emit(buff, "%u\n", num_slices);
+}
+
+static struct kobj_attribute ccs_mode = __ATTR_RW(ccs_mode);
+static struct kobj_attribute num_slices = __ATTR_RO(num_slices);
+
+static const struct attribute * const ccs_mode_attrs[] = {
+   &ccs_mode.attr,
+   &num_slices.attr,
+   NULL
+};
+
+void intel_gt_sysfs_ccs_mode(struct intel_gt *gt)
+{
+   int ret;
+
+   ret = sysfs_create_files(>->sysfs_gt, ccs_mode_attrs);
+   if (ret)
+   gt_warn(gt, "Failed to create ccs mode sysfs files");
+}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h 
b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h
index 751c5700944b..ae96de1b36c5 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h
@@ -12,5 +12,6 @@ void intel_gt_init_ccs_mode(struct intel_gt *gt);
 void intel_gt_fini_ccs_mode(struct intel_gt *gt);
 
 void intel_gt_apply_ccs_mode(struct intel_gt *gt);
+void intel_gt_sysfs_ccs_mode(struct intel_gt *gt);
 
 #endif /* INTEL_GT_CCS_MODE_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c 
b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
index 33cba406b569..a0290347938d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_sysfs.c
@@ -12,6 +12,7 @@
 #include "i915_drv.h"
 #include "i915_sysfs.h"
 #include "intel_gt.h"
+#include "intel_gt_ccs_mode.h"
 #include "intel_gt_print.h"
 #include "intel_gt_sysfs.h"
 #include "intel_gt_sysfs_pm.h"
@@ -101,6 +102,7 @@ void intel_gt_sysfs_register(struct intel_gt *gt)
goto exit_fail;
 
intel_gt_sysfs_pm_init(gt, >->sysfs_gt);
+   intel_gt_sysfs_ccs_mode(gt);
 
return;
 
-- 
2.43.0

[PATCH v2 1/3] drm/i915/gt: Support fixed CCS mode

[Andi Shyti]

The CCS mode involves assigning CCS engines to slices depending
on the number of slices and the number of engines the user wishes
to set.

In this patch, the default CCS setting is established during the
initial GT settings. It involves assigning only one CCS to all
the slices.

Based on a patch by Chris Wilson 
and Tejas Upadhyay .

Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Niranjana Vishwanathapura 
Cc: Tejas Upadhyay 
---
 drivers/gpu/drm/i915/Makefile   |  1 +
 drivers/gpu/drm/i915/gt/intel_gt.c  |  6 ++
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 81 +
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 16 
 drivers/gpu/drm/i915/gt/intel_gt_regs.h | 13 
 drivers/gpu/drm/i915/gt/intel_gt_types.h| 19 +
 drivers/gpu/drm/i915/i915_drv.h |  2 +
 7 files changed, 138 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index e777686190ca..1dce15d6306b 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -119,6 +119,7 @@ gt-y += \
gt/intel_ggtt_fencing.o \
gt/intel_gt.o \
gt/intel_gt_buffer_pool.o \
+   gt/intel_gt_ccs_mode.o \
gt/intel_gt_clock_utils.o \
gt/intel_gt_debugfs.o \
gt/intel_gt_engines_debugfs.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index a425db5ed3a2..e83c7b80c07a 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -17,6 +17,7 @@
 #include "intel_engine_regs.h"
 #include "intel_ggtt_gmch.h"
 #include "intel_gt.h"
+#include "intel_gt_ccs_mode.h"
 #include "intel_gt_buffer_pool.h"
 #include "intel_gt_clock_utils.h"
 #include "intel_gt_debugfs.h"
@@ -47,6 +48,7 @@ void intel_gt_common_init_early(struct intel_gt *gt)
init_llist_head(>->watchdog.list);
INIT_WORK(>->watchdog.work, intel_gt_watchdog_work);
 
+   intel_gt_init_ccs_mode(gt);
intel_gt_init_buffer_pool(gt);
intel_gt_init_reset(gt);
intel_gt_init_requests(gt);
@@ -195,6 +197,9 @@ int intel_gt_init_hw(struct intel_gt *gt)
 
intel_gt_init_swizzling(gt);
 
+   /* Configure CCS mode */
+   intel_gt_apply_ccs_mode(gt);
+
/*
 * At least 830 can leave some of the unused rings
 * "active" (ie. head != tail) after resume which
@@ -860,6 +865,7 @@ void intel_gt_driver_late_release_all(struct 
drm_i915_private *i915)
 
for_each_gt(gt, i915, id) {
intel_uc_driver_late_release(>->uc);
+   intel_gt_fini_ccs_mode(gt);
intel_gt_fini_requests(gt);
intel_gt_fini_reset(gt);
intel_gt_fini_timelines(gt);
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c 
b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
new file mode 100644
index ..fab8a77bded2
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
@@ -0,0 +1,81 @@
+//SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include "i915_drv.h"
+
+#include "intel_gt.h"
+#include "intel_gt_ccs_mode.h"
+#include "intel_gt_regs.h"
+#include "intel_gt_types.h"
+
+static void __intel_gt_apply_ccs_mode(struct intel_gt *gt)
+{
+   u32 mode = XEHP_CCS_MODE_CSLICE_0_3_MASK; /* disable all by default */
+   int num_slices = hweight32(CCS_MASK(gt));
+   int num_engines = gt->ccs.mode;
+   int slice = 0;
+   int i;
+
+   if (!num_engines)
+   return;
+
+   /*
+* Loop over all available slices and assign each a user engine.
+*
+* With 1 engine (ccs0):
+*   slice 0, 1, 2, 3: ccs0
+*
+* With 2 engines (ccs0, ccs1):
+*   slice 0, 2: ccs0
+*   slice 1, 3: ccs1
+*
+* With 4 engines (ccs0, ccs1, ccs2, ccs3):
+*   slice 0: ccs0
+*   slice 1: ccs1
+*   slice 2: ccs2
+*   slice 3: ccs3
+*
+* Since the number of slices and the number of engines is
+* known, and we ensure that there is an exact multiple of
+* engines for slices, the double loop becomes a loop over each
+* slice.
+*/
+   for (i = num_slices / num_engines; i < num_slices; i++) {
+   struct intel_engine_cs *engine;
+   intel_engine_mask_t tmp;
+
+   for_each_engine_masked(engine, gt, ALL_CCS(gt), tmp) {
+   /* If a slice is fused off, leave disabled */
+   while (!(CCS_MASK(gt) & BIT(slice)))
+   slice++;
+
+   mode &= ~XEHP_CCS_MODE_CSLICE(slice, 
XEHP_CCS_MODE_CSLICE_MASK);
+   mode |= XEHP_CCS_MODE_CSLICE(slice, engine->instance);
+
+   /* assign the next slice */
+

[PATCH v2 0/3] Disable dynamic load balancing and support fixed balancing

[Andi Shyti]

Hi,

This series aims to disable the CCS hardware load balancing, as recommended by
hardware directives in Wa_16016805146.

In the meantime, we need to define and support a fixed CCS mode of balancing
that can be configured by the user.

Thanks,
Andi

Changelog:
==
v1 -> v2:
 - update comment about how the user sets the ccs mode.

Andi Shyti (3):
  drm/i915/gt: Support fixed CCS mode
  drm/i915/gt: Allow user to set up the CSS mode
  drm/i915/gt: Disable HW load balancing for CCS

 drivers/gpu/drm/i915/Makefile   |   1 +
 drivers/gpu/drm/i915/gt/intel_gt.c  |   6 +
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 149 
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h |  17 +++
 drivers/gpu/drm/i915/gt/intel_gt_regs.h |  14 ++
 drivers/gpu/drm/i915/gt/intel_gt_sysfs.c|   2 +
 drivers/gpu/drm/i915/gt/intel_gt_types.h|  19 +++
 drivers/gpu/drm/i915/gt/intel_workarounds.c |   6 +
 drivers/gpu/drm/i915/i915_drv.h |   2 +
 9 files changed, 216 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h

-- 
2.43.0

✗ Fi.CI.BAT: failure for drm/i915: Fix HPD handling during driver init/shutdown (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix HPD handling during driver init/shutdown (rev2)
URL   : https://patchwork.freedesktop.org/series/128186/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14078 -> Patchwork_128186v2


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_128186v2 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128186v2, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/index.html

Participating hosts (38 -> 37)
--

  Additional (2): bat-rpls-2 fi-pnv-d510 
  Missing(3): bat-dg2-8 bat-dg2-9 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_128186v2:

### IGT changes ###

 Possible regressions 

  * igt@i915_pm_rpm@module-reload:
- fi-kbl-7567u:   [PASS][1] -> [DMESG-WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_pm_...@module-reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_pm_...@module-reload.html

  
Known issues


  Here are the changes found in Patchwork_128186v2 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-rpls-2: NOTRUN -> [SKIP][3] ([i915#9318])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_exec_suspend@basic-s3@smem:
- fi-apl-guc: [PASS][4] -> [DMESG-WARN][5] ([i915#8703])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-apl-guc/igt@gem_exec_suspend@basic...@smem.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-apl-guc/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_lmem_swapping@basic:
- fi-pnv-d510:NOTRUN -> [SKIP][6] ([fdo#109271]) +28 other tests 
skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-pnv-d510/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlm-1: NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests skip
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-adlm-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_tiled_pread_basic:
- bat-rpls-2: NOTRUN -> [SKIP][8] ([i915#3282])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@gem_tiled_pread_basic.html

  * igt@i915_module_load@reload:
- fi-kbl-7567u:   [PASS][9] -> [DMESG-WARN][10] ([i915#8585])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_module_l...@reload.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_module_l...@reload.html

  * igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-7567u:   [PASS][11] -> [DMESG-WARN][12] ([i915#9730]) +31 
other tests dmesg-warn
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_suspend@basic-s2idle-without-i915:
- fi-kbl-7567u:   [PASS][13] -> [DMESG-WARN][14] ([i915#180])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_susp...@basic-s2idle-without-i915.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_susp...@basic-s2idle-without-i915.html

  * igt@i915_suspend@basic-s3-without-i915:
- fi-kbl-7567u:   [PASS][15] -> [DMESG-WARN][16] ([i915#1982])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-kbl-7567u/igt@i915_susp...@basic-s3-without-i915.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/fi-kbl-7567u/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-rpls-2: NOTRUN -> [SKIP][17] ([i915#4103]) +1 other test skip
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-rpls-2: NOTRUN -> [SKIP][18] ([i915#3555] / [i915#3840] / 
[i915#9886])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v2/bat-rpls-2/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-rpls-2: NOTRUN -> [SKIP][19] ([fdo#109285])
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v

✗ Fi.CI.SPARSE: warning for drm/i915: Fix HPD handling during driver init/shutdown (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix HPD handling during driver init/shutdown (rev2)
URL   : https://patchwork.freedesktop.org/series/128186/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix HPD handling during driver init/shutdown (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Fix HPD handling during driver init/shutdown (rev2)
URL   : https://patchwork.freedesktop.org/series/128186/
State : warning

== Summary ==

Error: dim checkpatch failed
a61040ad6018 drm/i915: Init DRM connector polled field early
eecdb602c0e0 drm/i915: Keep the connector polled state disabled after storm
-:21: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line 
(possible unwrapped commit description?)
#21: 
  . 
queue_delayed_work(hotplug.hotplug_work)

total: 0 errors, 1 warnings, 0 checks, 25 lines checked
7530dc5e8c50 drm/i915: Move audio deinit after disabling polling
2a1fe7237bfe drm/i915: Disable intel HPD poll after DRM poll init/enable
817dba5e3908 drm/i915: Suspend the framebuffer console during driver shutdown
8779ec50e0d1 drm/i915: Suspend the framebuffer console earlier during system 
suspend
5c5d7c78a886 drm/i915: Prevent modesets during driver init/shutdown
1264868d7b4f drm/i915: Disable hotplug detection works during driver 
init/shutdown
3a7e425ecb8f drm/i915: Disable hotplug detection handlers during driver 
init/shutdown
efc9433d6a58 drm/i915: Add intel_digital_port lock/unlock hooks
4fc8a6c836c5 drm/i915: Filter out glitches on HPD lines during hotplug detection
4d9694fee7ce drm/i915/dp: Abort AUX on disconnected native DP ports
-:9: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible 
unwrapped commit description?)
#9: 
commit a972cd3f0eb5 ("drm/i915/tc: Abort DP AUX transfer on a disconnected TC 
port")

total: 0 errors, 1 warnings, 0 checks, 18 lines checked

✓ Fi.CI.BAT: success for Panel replay selective update support

[Patchwork]

== Series Details ==

Series: Panel replay selective update support
URL   : https://patchwork.freedesktop.org/series/128193/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14078 -> Patchwork_128193v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v1/index.html

Participating hosts (38 -> 33)
--

  Missing(5): bat-kbl-2 bat-dg2-8 bat-dg2-9 fi-snb-2520m bat-mtlp-8 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_128193v1:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_pipe_crc_basic@hang-read-crc@pipe-c-dp-2:
- {bat-rpls-3}:   [PASS][1] -> [FAIL][2] +3 other tests fail
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/bat-rpls-3/igt@kms_pipe_crc_basic@hang-read-...@pipe-c-dp-2.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v1/bat-rpls-3/igt@kms_pipe_crc_basic@hang-read-...@pipe-c-dp-2.html

  
Known issues


  Here are the changes found in Patchwork_128193v1 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlm-1: NOTRUN -> [SKIP][3] ([i915#4613]) +3 other tests skip
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v1/bat-adlm-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@i915_module_load@load:
- bat-adlp-6: [PASS][4] -> [INCOMPLETE][5] ([i915#8449])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/bat-adlp-6/igt@i915_module_l...@load.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v1/bat-adlp-6/igt@i915_module_l...@load.html

  * igt@i915_selftest@live@execlists:
- fi-bsw-nick:[PASS][6] -> [ABORT][7] ([i915#7911])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v1/fi-bsw-nick/igt@i915_selftest@l...@execlists.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- bat-dg2-11: NOTRUN -> [SKIP][8] ([i915#9197]) +3 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v1/bat-dg2-11/igt@kms_pipe_crc_ba...@nonblocking-crc-frame-sequence.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-adlm-1: NOTRUN -> [SKIP][9] ([i915#9875] / [i915#9900])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v1/bat-adlm-1/igt@kms_pipe_crc_ba...@suspend-read-crc.html

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][10] ([i915#8668])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v1/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.html

  
 Possible fixes 

  * igt@kms_pipe_crc_basic@read-crc-frame-sequence@pipe-d-edp-1:
- bat-rplp-1: [ABORT][11] ([i915#8668]) -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128193v1/bat-rplp-1/igt@kms_pipe_crc_basic@read-crc-frame-seque...@pipe-d-edp-1.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
  [i915#8449]: https://gitlab.freedesktop.org/drm/intel/issues/8449
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#9197]: https://gitlab.freedesktop.org/drm/intel/issues/9197
  [i915#9875]: https://gitlab.freedesktop.org/drm/intel/issues/9875
  [i915#9900]: https://gitlab.freedesktop.org/drm/intel/issues/9900


Build changes
-

  * Linux: CI_DRM_14078 -> Patchwork_128193v1

  CI-20190529: 20190529
  CI_DRM_14078: 1baf990bc673f31d9eba7dfcb597ac0cb7420b14 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7655: ddf7cf40a00caa7d02f3729e1e50f78f102463d9 @ 
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_128193v1: 1baf990bc673f31d9eba7dfcb597ac0cb7420b14 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

2a0e89b2656c drm/i915/psr: Add panel replay sel update support to debugfs 
interface
e4d1a28dea59 drm/i915/psr: Modify intel_dp_get_su_granularity to support panel 
replay
5663ef9c73a1 drm/panelreplay: dpcd register definition for panelreplay SU
62a6f542c564 drm/i915/psr: Split intel_psr2_config_valid for panel replay
7d6f5dea48bc drm/i915/psr: Detect panel replay selective update support
9dee44350fcd drm/i915/psr

[PATCH v2 07/12] drm/i915: Prevent modesets during driver init/shutdown

[Imre Deak]

An unexpected modeset or connector detection by a user (user space or FB
console) during the initialization/shutdown sequence is possible either
via a hotplug IRQ handling work or via the connector sysfs
(status/detect) interface. These modesets/detections should be prevented
by disabling/flushing all related hotplug handling work and
unregistering the interfaces that can start them at the beginning of the
shutdown sequence. Some of this - disabling all related intel_hotplug
work - will be done by the next patch, but others - for instance
disabling the MST hotplug works - require a bigger rework.

It makes sense - for diagnostic purpose, even with all the above work and
interface disabled - to detect and reject any such user access. This
patch does that for modeset accesses and a follow-up patch for connector
detection.

After the display is disabled during the shutdown sequence, no modeset
should happen so it's disabled for both users and the shutdown thread.

v2: Call intel_display_driver_suspend_access()/resume_access() only
for HAS_DISPLAY(). (CI)

Signed-off-by: Imre Deak 
---
 drivers/gpu/drm/i915/display/intel_display.c  |  3 +
 .../gpu/drm/i915/display/intel_display_core.h |  7 ++
 .../drm/i915/display/intel_display_driver.c   | 74 +++
 .../drm/i915/display/intel_display_driver.h   |  6 ++
 drivers/gpu/drm/i915/i915_driver.c| 19 -
 5 files changed, 107 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 927d124457b61..31a6a82c12616 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6310,6 +6310,9 @@ int intel_atomic_check(struct drm_device *dev,
int ret, i;
bool any_ms = false;
 
+   if (!intel_display_driver_check_access(dev_priv))
+   return -ENODEV;
+
for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state,
new_crtc_state, i) {
/*
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h 
b/drivers/gpu/drm/i915/display/intel_display_core.h
index 47297ed858223..0b130ca9e6698 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -28,6 +28,8 @@
 #include "intel_opregion.h"
 #include "intel_wm_types.h"
 
+struct task_struct;
+
 struct drm_i915_private;
 struct drm_property;
 struct drm_property_blob;
@@ -298,6 +300,11 @@ struct intel_display {
const struct intel_audio_funcs *audio;
} funcs;
 
+   struct {
+   bool any_task_allowed;
+   struct task_struct *allowed_task;
+   } access;
+
struct {
/* backlight registers and fields in struct intel_panel */
struct mutex lock;
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c 
b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 1974f2394a518..b2441ab9822c2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -45,6 +45,7 @@
 #include "intel_hdcp.h"
 #include "intel_hotplug.h"
 #include "intel_hti.h"
+#include "intel_modeset_lock.h"
 #include "intel_modeset_setup.h"
 #include "intel_opregion.h"
 #include "intel_overlay.h"
@@ -276,6 +277,71 @@ int intel_display_driver_probe_noirq(struct 
drm_i915_private *i915)
return ret;
 }
 
+static void set_display_access(struct drm_i915_private *i915,
+  bool any_task_allowed,
+  struct task_struct *allowed_task)
+{
+   struct drm_modeset_acquire_ctx ctx;
+   int err;
+
+   intel_modeset_lock_ctx_retry(&ctx, NULL, 0, err) {
+   err = drm_modeset_lock_all_ctx(&i915->drm, &ctx);
+   if (err)
+   continue;
+
+   i915->display.access.any_task_allowed = any_task_allowed;
+   i915->display.access.allowed_task = allowed_task;
+   }
+
+   drm_WARN_ON(&i915->drm, err);
+}
+
+void intel_display_driver_enable_user_access(struct drm_i915_private *i915)
+{
+   set_display_access(i915, true, NULL);
+}
+
+void intel_display_driver_disable_user_access(struct drm_i915_private *i915)
+{
+   set_display_access(i915, false, current);
+}
+
+void intel_display_driver_suspend_access(struct drm_i915_private *i915)
+{
+   set_display_access(i915, false, NULL);
+}
+
+void intel_display_driver_resume_access(struct drm_i915_private *i915)
+{
+   set_display_access(i915, false, current);
+}
+
+bool intel_display_driver_check_access(struct drm_i915_private *i915)
+{
+   char comm[TASK_COMM_LEN];
+   char current_task[TASK_COMM_LEN + 16];
+   char allowed_task[TASK_COMM_LEN + 16] = "none";
+
+   if (i915->display.access.any_task_allowed ||
+   i915->display.access.allowed_task == current)
+   return 

✗ Fi.CI.SPARSE: warning for Panel replay selective update support

[Patchwork]

== Series Details ==

Series: Panel replay selective update support
URL   : https://patchwork.freedesktop.org/series/128193/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.CHECKPATCH: warning for Panel replay selective update support

[Patchwork]

== Series Details ==

Series: Panel replay selective update support
URL   : https://patchwork.freedesktop.org/series/128193/
State : warning

== Summary ==

Error: dim checkpatch failed
e2d183d50b55 drm/i915/psr: Disable panel replay for now
7fed1cae811a drm/i915/psr: Do not check alpm on DP or capability change for 
panel replay
9f58f97516e1 drm/i915/psr: Unify panel replay enable sink
fe7338ddcddd drm/i915/psr: Rename has_psr2 as has_sel_update
f8bafda881aa drm/i915/psr: Rename psr2_enabled as sel_update_enabled
8344d535a9e7 drm/i915/psr: Add some documentation of variables used in psr code
e88c8d0d6b88 drm/i915/psr: Add sink_panel_replay_su_support to intel_psr
8965efbb8e49 drm/i915/psr: Detect panel replay selective update support
49fc7a420d66 drm/i915/psr: Split intel_psr2_config_valid for panel replay
0107a1534991 drm/panelreplay: dpcd register definition for panelreplay SU
1c777a411274 drm/i915/psr: Modify intel_dp_get_su_granularity to support panel 
replay
0fdd29acdd86 drm/i915/psr: Add panel replay sel update support to debugfs 
interface
-:13: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line 
(possible unwrapped commit description?)
#13: 
Sink support: PSR = no, Panel Replay = yes, Panel Replay Selective Update = yes

total: 0 errors, 1 warnings, 0 checks, 22 lines checked

✗ Fi.CI.BAT: failure for drm/i915: Fix HPD handling during driver init/shutdown

[Patchwork]

== Series Details ==

Series: drm/i915: Fix HPD handling during driver init/shutdown
URL   : https://patchwork.freedesktop.org/series/128186/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14078 -> Patchwork_128186v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_128186v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128186v1, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/index.html

Participating hosts (38 -> 36)
--

  Additional (2): bat-rpls-2 fi-pnv-d510 
  Missing(4): bat-dg2-8 bat-dg2-9 fi-snb-2520m fi-elk-e7500 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_128186v1:

### IGT changes ###

 Possible regressions 

  * igt@gem_exec_suspend@basic-s0@smem:
- bat-atsm-1: [PASS][1] -> [INCOMPLETE][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/bat-atsm-1/igt@gem_exec_suspend@basic...@smem.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-atsm-1/igt@gem_exec_suspend@basic...@smem.html

  
Known issues


  Here are the changes found in Patchwork_128186v1 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-jsl-1:  [PASS][3] -> [FAIL][4] ([i915#8293])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/bat-jsl-1/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-jsl-1/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-rpls-2: NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-rpls-2/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_exec_suspend@basic-s3@smem:
- fi-apl-guc: [PASS][6] -> [DMESG-WARN][7] ([i915#8703])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/fi-apl-guc/igt@gem_exec_suspend@basic...@smem.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/fi-apl-guc/igt@gem_exec_suspend@basic...@smem.html

  * igt@gem_lmem_swapping@basic:
- fi-pnv-d510:NOTRUN -> [SKIP][8] ([fdo#109271]) +28 other tests 
skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/fi-pnv-d510/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-adlm-1: NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-adlm-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_tiled_pread_basic:
- bat-rpls-2: NOTRUN -> [SKIP][10] ([i915#3282])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-rpls-2/igt@gem_tiled_pread_basic.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-kbl-2:  [PASS][11] -> [INCOMPLETE][12] ([i915#4817])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14078/bat-kbl-2/igt@i915_susp...@basic-s3-without-i915.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-kbl-2/igt@i915_susp...@basic-s3-without-i915.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-rpls-2: NOTRUN -> [SKIP][13] ([i915#4103]) +1 other test skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-rpls-2/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-rpls-2: NOTRUN -> [SKIP][14] ([i915#3555] / [i915#3840] / 
[i915#9886])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-rpls-2/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-rpls-2: NOTRUN -> [SKIP][15] ([fdo#109285])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-rpls-2/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
- bat-adlm-1: NOTRUN -> [SKIP][16] ([i915#9875] / [i915#9900])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-adlm-1/igt@kms_pipe_crc_ba...@suspend-read-crc.html

  * igt@kms_pm_backlight@basic-brightness:
- bat-rpls-2: NOTRUN -> [SKIP][17] ([i915#5354])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-rpls-2/igt@kms_pm_backli...@basic-brightness.html

  * igt@kms_pm_backlight@basic-brightness@edp-1:
- bat-rplp-1: NOTRUN -> [ABORT][18] ([i915#8668])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128186v1/bat-rplp-1/igt@kms_pm_backlight@basic-brightn...@edp-1.htm

✗ Fi.CI.SPARSE: warning for drm/i915: Fix HPD handling during driver init/shutdown

[Patchwork]

== Series Details ==

Series: drm/i915: Fix HPD handling during driver init/shutdown
URL   : https://patchwork.freedesktop.org/series/128186/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.CHECKPATCH: warning for drm/i915: Fix HPD handling during driver init/shutdown

[Patchwork]

== Series Details ==

Series: drm/i915: Fix HPD handling during driver init/shutdown
URL   : https://patchwork.freedesktop.org/series/128186/
State : warning

== Summary ==

Error: dim checkpatch failed
5e045c45aae9 drm/i915: Init DRM connector polled field early
2f88f00692d8 drm/i915: Keep the connector polled state disabled after storm
-:21: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line 
(possible unwrapped commit description?)
#21: 
  . 
queue_delayed_work(hotplug.hotplug_work)

total: 0 errors, 1 warnings, 0 checks, 25 lines checked
45f4a8779319 drm/i915: Move audio deinit after disabling polling
beb04ba18991 drm/i915: Disable intel HPD poll after DRM poll init/enable
db36640355e8 drm/i915: Suspend the framebuffer console during driver shutdown
f716cd1db96e drm/i915: Suspend the framebuffer console earlier during system 
suspend
5663169309e3 drm/i915: Prevent modesets during driver init/shutdown
7da38d9822c9 drm/i915: Disable hotplug detection works during driver 
init/shutdown
767ba741c78c drm/i915: Disable hotplug detection handlers during driver 
init/shutdown
ba74b7e084d4 drm/i915: Add intel_digital_port lock/unlock hooks
5a0e0efdf920 drm/i915: Filter out glitches on HPD lines during hotplug detection
28774cb6e7ac drm/i915/dp: Abort AUX on disconnected native DP ports
-:9: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible 
unwrapped commit description?)
#9: 
commit a972cd3f0eb5 ("drm/i915/tc: Abort DP AUX transfer on a disconnected TC 
port")

total: 0 errors, 1 warnings, 0 checks, 18 lines checked

Re: [PATCH v2] drm/i915: Disable DSB in Xe KMD

[Jani Nikula]

On Wed, 03 Jan 2024, José Roberto de Souza  wrote:
> Often getting DBS overflows when starting Xorg or Wayland compositors
> when running Xe KMD.
> Issue was reported but nothing was done, so disabling DSB as whole
> until properly fixed in Xe KMD.
>
> v2:
> - move check to HAS_DSB(Jani)

I was thinking of something like

diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c 
b/drivers/gpu/drm/i915/display/intel_dsb.c
index 482c28b5c2de..a6c7122fd671 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -453,6 +453,10 @@ struct intel_dsb *intel_dsb_prepare(const struct 
intel_crtc_state *crtc_state,
if (!HAS_DSB(i915))
return NULL;
 
+   /* TODO: DSB is broken in Xe KMD, so disabling it until fixed */
+   if (!IS_ENABLED(I915))
+   return NULL;
+
dsb = kzalloc(sizeof(*dsb), GFP_KERNEL);
if (!dsb)
goto out;


>
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/989
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1031
> Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1072
> Cc: Animesh Manna 
> Cc: Rodrigo Vivi 
> Cc: Jani Nikula 
> Signed-off-by: José Roberto de Souza 
> ---
>  drivers/gpu/drm/i915/display/intel_display_device.h | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h 
> b/drivers/gpu/drm/i915/display/intel_display_device.h
> index fe42688137863..faa49aced46a5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.h
> @@ -45,7 +45,12 @@ struct drm_printer;
>  #define HAS_DP_MST(i915) (DISPLAY_INFO(i915)->has_dp_mst)
>  #define HAS_DP20(i915)   (IS_DG2(i915) || 
> DISPLAY_VER(i915) >= 14)
>  #define HAS_DPT(i915)(DISPLAY_VER(i915) >= 13)
> +#ifdef I915
>  #define HAS_DSB(i915)(DISPLAY_INFO(i915)->has_dsb)
> +#else
> +/* TODO: DSB is broken in Xe KMD, so disabling it until fixed */
> +#define HAS_DSB(i915)(false)
> +#endif
>  #define HAS_DSC(__i915)  
> (DISPLAY_RUNTIME_INFO(__i915)->has_dsc)
>  #define HAS_FBC(i915)
> (DISPLAY_RUNTIME_INFO(i915)->fbc_mask != 0)
>  #define HAS_FPGA_DBG_UNCLAIMED(i915) (DISPLAY_INFO(i915)->has_fpga_dbg)

-- 
Jani Nikula, Intel

✗ Fi.CI.BAT: failure for drm/i915/guc: Avoid circular locking issue on busyness flush (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Avoid circular locking issue on busyness flush (rev6)
URL   : https://patchwork.freedesktop.org/series/127985/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14077 -> Patchwork_127985v6


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_127985v6 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_127985v6, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/index.html

Participating hosts (38 -> 37)
--

  Additional (2): fi-bsw-nick fi-pnv-d510 
  Missing(3): bat-kbl-2 bat-dg2-9 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_127985v6:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@gt_pm:
- bat-rpls-2: NOTRUN -> [DMESG-FAIL][1]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
- bat-adln-1: NOTRUN -> [DMESG-FAIL][2]
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-adln-1/igt@i915_selftest@live@gt_pm.html

  * igt@i915_suspend@basic-s3-without-i915:
- bat-adlp-6: NOTRUN -> [INCOMPLETE][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-adlp-6/igt@i915_susp...@basic-s3-without-i915.html

  
Known issues


  Here are the changes found in Patchwork_127985v6 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-jsl-1:  [FAIL][4] ([i915#8293]) -> [PASS][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14077/bat-jsl-1/boot.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-jsl-1/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-jsl-1:  NOTRUN -> [SKIP][6] ([i915#9318])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- bat-jsl-1:  NOTRUN -> [SKIP][7] ([i915#2190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-jsl-1/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-pnv-d510:NOTRUN -> [SKIP][8] ([fdo#109271]) +28 other tests 
skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/fi-pnv-d510/igt@gem_lmem_swapp...@basic.html
- bat-adln-1: NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-adln-1/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- fi-bsw-nick:NOTRUN -> [SKIP][10] ([fdo#109271]) +15 other tests 
skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/fi-bsw-nick/igt@gem_lmem_swapp...@parallel-random-engines.html
- bat-rplp-1: NOTRUN -> [SKIP][11] ([i915#4613]) +3 other tests skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-rplp-1/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_lmem_swapping@random-engines:
- bat-adlp-6: NOTRUN -> [SKIP][12] ([i915#4613]) +3 other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-adlp-6/igt@gem_lmem_swapp...@random-engines.html

  * igt@gem_lmem_swapping@verify-random:
- bat-rpls-2: NOTRUN -> [SKIP][13] ([i915#4613]) +3 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-rpls-2/igt@gem_lmem_swapp...@verify-random.html
- bat-jsl-1:  NOTRUN -> [SKIP][14] ([i915#4613]) +3 other tests skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html

  * igt@i915_pm_rps@basic-api:
- bat-rpls-2: NOTRUN -> [SKIP][15] ([i915#6621])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-rpls-2/igt@i915_pm_...@basic-api.html
- bat-adlp-6: NOTRUN -> [SKIP][16] ([i915#6621])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-adlp-6/igt@i915_pm_...@basic-api.html
- bat-rplp-1: NOTRUN -> [SKIP][17] ([i915#6621])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-rplp-1/igt@i915_pm_...@basic-api.html
- bat-adln-1: NOTRUN -> [SKIP][18] ([i915#6621])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_127985v6/bat-adln-1/igt@i915_pm_...@basic-api.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-jsl-1:  NOTR

Re: [V2] drm/i915: Add workaround 14019877138

[Andi Shyti]

Hi Tejas,

On Wed, Jan 03, 2024 at 11:01:11AM +0530, Tejas Upadhyay wrote:
> WA 14019877138 needed for Graphics 12.70/71 both
> 
> V2(Jani):
>   - Use drm/i915
> 
> Signed-off-by: Tejas Upadhyay 

looks OK to me, if no other comments, I will go ahead and merge
it.

Reviewed-by: Andi Shyti 

Andi

Re: [PATCH 10/12] drm/panelreplay: dpcd register definition for panelreplay SU

[Dmitry Baryshkov]

On Thu, 4 Jan 2024 at 12:49, Jouni Högander  wrote:
>
> Add definitions for panel replay selective update
>
> Cc: dri-de...@lists.freedesktop.org
>

1) This CC should not be necessary. It is already a part of
maintainers entry for this file

2) It probably doesn't work as expected. It is separated with the
blank link from the rest of the trailers, so most of the tools will
skip it.

3) You have skipped the rest of the maintainers for this file. Please
use ./scripts/get_maintainers.pl and pass corresponding options to git
send-email.

> Signed-off-by: Jouni Högander 
> ---
>  include/drm/display/drm_dp.h | 6 ++
>  1 file changed, 6 insertions(+)

The patch itself looks good to me.

>
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index 3731828825bd..6a59d30b7b25 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -548,6 +548,12 @@
>  # define DP_PANEL_REPLAY_SUPPORT(1 << 0)
>  # define DP_PANEL_REPLAY_SU_SUPPORT (1 << 1)
>
> +#define DP_PANEL_PANEL_REPLAY_CAPABILITY   0xb1
> +# define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED (1 << 5)
> +
> +#define DP_PANEL_PANEL_REPLAY_X_GRANULARITY0xb2
> +#define DP_PANEL_PANEL_REPLAY_Y_GRANULARITY0xb4
> +
>  /* Link Configuration */
>  #defineDP_LINK_BW_SET  0x100
>  # define DP_LINK_RATE_TABLE0x00/* eDP 1.4 */
> --
> 2.34.1
>


-- 
With best wishes
Dmitry

✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Avoid circular locking issue on busyness flush (rev6)

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Avoid circular locking issue on busyness flush (rev6)
URL   : https://patchwork.freedesktop.org/series/127985/
State : warning

== Summary ==

Error: dim checkpatch failed
d0cacf327d6c drm/i915/guc: Avoid circular locking issue on busyness flush
-:13: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line 
(possible unwrapped commit description?)
#13: 
<4> [298.856509] 8881103e9978 (>->reset.backoff_srcu){}-{0:0}, at:

total: 0 errors, 1 warnings, 0 checks, 70 lines checked

[PATCH 12/12] drm/i915/psr: Add panel replay sel update support to debugfs interface

[Jouni Högander]

Add panel replay selective update support to debugfs status interface. In
case of sink supporting panel replay we will print out:

Sink support: PSR = no, Panel Replay = yes, Panel Replay Selective Update = yes

and PSR mode will look like this if printing out enabled panel replay
selective update:

PSR mode: Panel Replay Selective Update Enabled

Current PSR and panel replay printouts remain same.

Cc: Kunal Joshi 

Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 9 ++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 1e76e5a4a0cd..aa43f33e066c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3155,7 +3155,9 @@ static int intel_psr_status(struct seq_file *m, struct 
intel_dp *intel_dp)
 
if (psr->sink_support)
seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
-   seq_printf(m, ", Panel Replay = %s\n", 
str_yes_no(psr->sink_panel_replay_support));
+   seq_printf(m, ", Panel Replay = %s", 
str_yes_no(psr->sink_panel_replay_support));
+   seq_printf(m, ", Panel Replay Selective Update = %s\n",
+  str_yes_no(psr->sink_panel_replay_su_support));
 
if (!(psr->sink_support || psr->sink_panel_replay_support))
return 0;
@@ -3164,9 +3166,10 @@ static int intel_psr_status(struct seq_file *m, struct 
intel_dp *intel_dp)
mutex_lock(&psr->lock);
 
if (psr->panel_replay_enabled)
-   status = "Panel Replay Enabled";
+   status = psr->sel_update_enabled ? "Panel Replay Selective 
Update Enabled" :
+   "Panel Replay Enabled";
else if (psr->enabled)
-   status = psr->sel_update_enabled ? "PSR2 enabled" : "PSR1 
enabled";
+   status = psr->sel_update_enabled ? "PSR2" : "PSR1";
else
status = "disabled";
seq_printf(m, "PSR mode: %s\n", status);
-- 
2.34.1

[PATCH 11/12] drm/i915/psr: Modify intel_dp_get_su_granularity to support panel replay

[Jouni Högander]

Currently intel_dp_get_su_granularity doesn't support panel replay.
This fix modifies it to support panel replay as well.

Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 59 +---
 1 file changed, 53 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index f3f9522787e7..1e76e5a4a0cd 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -465,6 +465,42 @@ static u8 intel_dp_get_sink_sync_latency(struct intel_dp 
*intel_dp)
return val;
 }
 
+static u8 intel_dp_get_su_capability(struct intel_dp *intel_dp)
+{
+   u8 su_capability;
+
+   if (intel_dp->psr.sink_panel_replay_su_support)
+   drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY,
+&su_capability, 1);
+   else
+   su_capability = intel_dp->psr_dpcd[1];
+
+   return su_capability;
+}
+
+static u8 intel_dp_get_su_ganularity_required_bit(struct intel_dp *intel_dp)
+{
+   return intel_dp->psr.sink_panel_replay_su_support ?
+   DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED :
+   DP_PSR2_SU_GRANULARITY_REQUIRED;
+}
+
+static unsigned int
+intel_dp_get_su_x_granularity_offset(struct intel_dp *intel_dp)
+{
+   return intel_dp->psr.sink_panel_replay_su_support ?
+   DP_PANEL_PANEL_REPLAY_X_GRANULARITY :
+   DP_PSR2_SU_X_GRANULARITY;
+}
+
+static unsigned int
+intel_dp_get_su_y_granularity_offset(struct intel_dp *intel_dp)
+{
+   return intel_dp->psr.sink_panel_replay_su_support ?
+   DP_PANEL_PANEL_REPLAY_Y_GRANULARITY :
+   DP_PSR2_SU_Y_GRANULARITY;
+}
+
 static void intel_dp_get_su_granularity(struct intel_dp *intel_dp)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
@@ -472,18 +508,26 @@ static void intel_dp_get_su_granularity(struct intel_dp 
*intel_dp)
u16 w;
u8 y;
 
+   /*
+* TODO: Do we need to take into account panel supporting both PSR and
+* Panel replay?
+*/
+
/* If sink don't have specific granularity requirements set legacy ones 
*/
-   if (!(intel_dp->psr_dpcd[1] & DP_PSR2_SU_GRANULARITY_REQUIRED)) {
+   if (!(intel_dp_get_su_capability(intel_dp) &
+ intel_dp_get_su_ganularity_required_bit(intel_dp))) {
/* As PSR2 HW sends full lines, we do not care about x 
granularity */
w = 4;
y = 4;
goto exit;
}
 
-   r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_X_GRANULARITY, &w, 2);
+   r = drm_dp_dpcd_read(&intel_dp->aux,
+intel_dp_get_su_x_granularity_offset(intel_dp),
+&w, 2);
if (r != 2)
drm_dbg_kms(&i915->drm,
-   "Unable to read DP_PSR2_SU_X_GRANULARITY\n");
+   "Unable to read selective update x granularity\n");
/*
 * Spec says that if the value read is 0 the default granularity should
 * be used instead.
@@ -491,10 +535,12 @@ static void intel_dp_get_su_granularity(struct intel_dp 
*intel_dp)
if (r != 2 || w == 0)
w = 4;
 
-   r = drm_dp_dpcd_read(&intel_dp->aux, DP_PSR2_SU_Y_GRANULARITY, &y, 1);
+   r = drm_dp_dpcd_read(&intel_dp->aux,
+intel_dp_get_su_y_granularity_offset(intel_dp),
+&y, 1);
if (r != 1) {
drm_dbg_kms(&i915->drm,
-   "Unable to read DP_PSR2_SU_Y_GRANULARITY\n");
+   "Unable to read selective update y granularity\n");
y = 4;
}
if (y == 0)
@@ -587,7 +633,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
if (intel_dp->psr_dpcd[0])
_psr_init_dpcd(intel_dp);
 
-   if (intel_dp->psr.sink_psr2_support)
+   if (intel_dp->psr.sink_psr2_support ||
+   intel_dp->psr.sink_panel_replay_su_support)
intel_dp_get_su_granularity(intel_dp);
 }
 
-- 
2.34.1

[PATCH 10/12] drm/panelreplay: dpcd register definition for panelreplay SU

[Jouni Högander]

Add definitions for panel replay selective update

Cc: dri-de...@lists.freedesktop.org

Signed-off-by: Jouni Högander 
---
 include/drm/display/drm_dp.h | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 3731828825bd..6a59d30b7b25 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -548,6 +548,12 @@
 # define DP_PANEL_REPLAY_SUPPORT(1 << 0)
 # define DP_PANEL_REPLAY_SU_SUPPORT (1 << 1)
 
+#define DP_PANEL_PANEL_REPLAY_CAPABILITY   0xb1
+# define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED (1 << 5)
+
+#define DP_PANEL_PANEL_REPLAY_X_GRANULARITY0xb2
+#define DP_PANEL_PANEL_REPLAY_Y_GRANULARITY0xb4
+
 /* Link Configuration */
 #defineDP_LINK_BW_SET  0x100
 # define DP_LINK_RATE_TABLE0x00/* eDP 1.4 */
-- 
2.34.1