Re: [PATCH 0/8] drm/i915/pciids: PCI ID macro cleanups
On 5/15/24 07:25, Jani Nikula wrote: > No reply from Bjorn, Cc: the x86 maintainers and list, could I get an > ack from you please? x86 is just a consumer of the drm/i915_pciids.h macros. The name change is perfectly fine with me. No objections. But I really don't think you need our acks to move forward. Either way: Acked-by: Dave Hansen # for x86
✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/pciids: switch to xe driver style PCI ID macros
== Series Details == Series: series starting with [1/2] drm/i915/pciids: switch to xe driver style PCI ID macros URL : https://patchwork.freedesktop.org/series/133664/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit' +./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced symbol 'old' +./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced symbol 'val' +./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced symbol 'p' +./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced symbol 'mask' +./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced symbol 'return' +./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced symbol 'mask' +./include
✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/pciids: switch to xe driver style PCI ID macros
== Series Details == Series: series starting with [1/2] drm/i915/pciids: switch to xe driver style PCI ID macros URL : https://patchwork.freedesktop.org/series/133664/ State : warning == Summary == Error: dim checkpatch failed 527339fb7437 drm/i915/pciids: switch to xe driver style PCI ID macros -:533: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #533: FILE: include/drm/i915_pciids.h:50: +#define INTEL_I810_IDS(MACRO__, ...) \ + MACRO__(0x7121, ## __VA_ARGS__), /* I810 */ \ + MACRO__(0x7123, ## __VA_ARGS__), /* I810_DC100 */ \ + MACRO__(0x7125, ## __VA_ARGS__) /* I810_E */ -:533: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #533: FILE: include/drm/i915_pciids.h:50: +#define INTEL_I810_IDS(MACRO__, ...) \ + MACRO__(0x7121, ## __VA_ARGS__), /* I810 */ \ + MACRO__(0x7123, ## __VA_ARGS__), /* I810_DC100 */ \ + MACRO__(0x7125, ## __VA_ARGS__) /* I810_E */ -:556: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #556: FILE: include/drm/i915_pciids.h:64: +#define INTEL_I85X_IDS(MACRO__, ...) \ + MACRO__(0x3582, ## __VA_ARGS__), /* I855_GM */ \ + MACRO__(0x358e, ## __VA_ARGS__) -:556: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #556: FILE: include/drm/i915_pciids.h:64: +#define INTEL_I85X_IDS(MACRO__, ...) \ + MACRO__(0x3582, ## __VA_ARGS__), /* I855_GM */ \ + MACRO__(0x358e, ## __VA_ARGS__) -:568: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #568: FILE: include/drm/i915_pciids.h:71: +#define INTEL_I915G_IDS(MACRO__, ...) \ + MACRO__(0x2582, ## __VA_ARGS__), /* I915_G */ \ + MACRO__(0x258a, ## __VA_ARGS__) /* E7221_G */ -:568: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #568: FILE: include/drm/i915_pciids.h:71: +#define INTEL_I915G_IDS(MACRO__, ...) \ + MACRO__(0x2582, ## __VA_ARGS__), /* I915_G */ \ + MACRO__(0x258a, ## __VA_ARGS__) /* E7221_G */ -:585: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #585: FILE: include/drm/i915_pciids.h:81: +#define INTEL_I945GM_IDS(MACRO__, ...) \ + MACRO__(0x27a2, ## __VA_ARGS__), /* I945_GM */ \ + MACRO__(0x27ae, ## __VA_ARGS__) /* I945_GME */ -:585: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #585: FILE: include/drm/i915_pciids.h:81: +#define INTEL_I945GM_IDS(MACRO__, ...) \ + MACRO__(0x27a2, ## __VA_ARGS__), /* I945_GM */ \ + MACRO__(0x27ae, ## __VA_ARGS__) /* I945_GME */ -:594: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #594: FILE: include/drm/i915_pciids.h:85: +#define INTEL_I965G_IDS(MACRO__, ...) \ + MACRO__(0x2972, ## __VA_ARGS__), /* I946_GZ */ \ + MACRO__(0x2982, ## __VA_ARGS__),/* G35_G */ \ + MACRO__(0x2992, ## __VA_ARGS__),/* I965_Q */ \ + MACRO__(0x29a2, ## __VA_ARGS__) /* I965_G */ -:594: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #594: FILE: include/drm/i915_pciids.h:85: +#define INTEL_I965G_IDS(MACRO__, ...) \ + MACRO__(0x2972, ## __VA_ARGS__), /* I946_GZ */ \ + MACRO__(0x2982, ## __VA_ARGS__),/* G35_G */ \ + MACRO__(0x2992, ## __VA_ARGS__),/* I965_Q */ \ + MACRO__(0x29a2, ## __VA_ARGS__) /* I965_G */ -:604: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #604: FILE: include/drm/i915_pciids.h:91: +#define INTEL_G33_IDS(MACRO__, ...) \ + MACRO__(0x29b2, ## __VA_ARGS__), /* Q35_G */ \ + MACRO__(0x29c2, ## __VA_ARGS__),/* G33_G */ \ + MACRO__(0x29d2, ## __VA_ARGS__) /* Q33_G */ -:604: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #604: FILE: include/drm/i915_pciids.h:91: +#define INTEL_G33_IDS(MACRO__, ...) \ + MACRO__(0x29b2, ## __VA_ARGS__), /* Q35_G */ \ + MACRO__(0x29c2, ## __VA_ARGS__),/* G33_G */ \ + MACRO__(0x29d2, ## __VA_ARGS__) /* Q33_G */ -:612: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #612: FILE: include/drm/i915_pciids.h:96: +#define INTEL_I965GM_IDS(MACRO__, ...) \ + MACRO__(0x2a02, ## __VA_ARGS__),/* I965_GM */ \ + MACRO__(0x2a12, ## __VA_ARGS__) /* I965_GME */ -:612: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #612: FILE: include/drm/i915_pciids.h:96: +#define INTEL_I965GM_IDS(MACRO__, ...) \ + MACRO__(0x2a02, ## __VA_ARGS__),/* I965_GM */ \ + MACRO__(0x2a12, ## __VA_ARGS__) /* I965_GME */ -:972: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #972: FILE: include/drm/i915_pciids.h:103: +#define INTEL_G45_IDS(MACRO__, ...) \ + MACRO__(0x2e02, ## __VA_ARGS__), /* IGD_E_G */ \ + MACRO__(0x2e12, ## __V
✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/pciids: switch to xe driver style PCI ID macros
== Series Details ==
Series: series starting with [1/2] drm/i915/pciids: switch to xe driver style
PCI ID macros
URL : https://patchwork.freedesktop.org/series/133664/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14768 -> Patchwork_133664v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133664v1/index.html
Participating hosts (43 -> 43)
--
Additional (1): fi-kbl-8809g
Missing(1): fi-snb-2520m
Known issues
Here are the changes found in Patchwork_133664v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g: NOTRUN -> [SKIP][1] ([i915#2190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133664v1/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic@lmem0:
- bat-dg2-9: [PASS][2] -> [FAIL][3] ([i915#10378])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14768/bat-dg2-9/igt@gem_lmem_swapping@ba...@lmem0.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133664v1/bat-dg2-9/igt@gem_lmem_swapping@ba...@lmem0.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-kbl-8809g: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133664v1/fi-kbl-8809g/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-8809g: NOTRUN -> [SKIP][5] +30 other tests skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133664v1/fi-kbl-8809g/igt@kms_...@dsc-basic.html
Possible fixes
* igt@gem_lmem_swapping@basic@lmem0:
- bat-dg2-11: [FAIL][6] ([i915#10378]) -> [PASS][7]
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14768/bat-dg2-11/igt@gem_lmem_swapping@ba...@lmem0.html
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133664v1/bat-dg2-11/igt@gem_lmem_swapping@ba...@lmem0.html
* igt@kms_flip@basic-flip-vs-dpms@a-dp7:
- {bat-mtlp-9}: [DMESG-WARN][8] ([i915#10435]) -> [PASS][9]
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14768/bat-mtlp-9/igt@kms_flip@basic-flip-vs-d...@a-dp7.html
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133664v1/bat-mtlp-9/igt@kms_flip@basic-flip-vs-d...@a-dp7.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
[i915#10435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10435
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
Build changes
-
* Linux: CI_DRM_14768 -> Patchwork_133664v1
CI-20190529: 20190529
CI_DRM_14768: 26a52a7b24c1f334d92f5deac9f3eaf3224f3864 @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7855: 7855
Patchwork_133664v1: 26a52a7b24c1f334d92f5deac9f3eaf3224f3864 @
git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133664v1/index.html
[PATCH 2/2] drm/i915: stop redefining INTEL_VGA_DEVICE
Now that the PCI ID macros allow us to pass in the macro to use, stop
redefining INTEL_VGA_DEVICE.
Cc: Lucas De Marchi
Cc: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
.../drm/i915/display/intel_display_device.c | 87 +-
drivers/gpu/drm/i915/intel_device_info.c | 91 +--
2 files changed, 88 insertions(+), 90 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
b/drivers/gpu/drm/i915/display/intel_display_device.c
index 950e66cdba0a..cf093bc0cb28 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -795,55 +795,54 @@ static bool has_no_display(struct pci_dev *pdev)
return pci_match_id(ids, pdev);
}
-#undef INTEL_VGA_DEVICE
-#define INTEL_VGA_DEVICE(id, info) { id, info }
+#define INTEL_DISPLAY_DEVICE(_id, _info) { .devid = (_id), .info = (_info) }
static const struct {
u32 devid;
const struct intel_display_device_info *info;
} intel_display_ids[] = {
- INTEL_I830_IDS(INTEL_VGA_DEVICE, &i830_display),
- INTEL_I845G_IDS(INTEL_VGA_DEVICE, &i845_display),
- INTEL_I85X_IDS(INTEL_VGA_DEVICE, &i85x_display),
- INTEL_I865G_IDS(INTEL_VGA_DEVICE, &i865g_display),
- INTEL_I915G_IDS(INTEL_VGA_DEVICE, &i915g_display),
- INTEL_I915GM_IDS(INTEL_VGA_DEVICE, &i915gm_display),
- INTEL_I945G_IDS(INTEL_VGA_DEVICE, &i945g_display),
- INTEL_I945GM_IDS(INTEL_VGA_DEVICE, &i945gm_display),
- INTEL_I965G_IDS(INTEL_VGA_DEVICE, &i965g_display),
- INTEL_G33_IDS(INTEL_VGA_DEVICE, &g33_display),
- INTEL_I965GM_IDS(INTEL_VGA_DEVICE, &i965gm_display),
- INTEL_GM45_IDS(INTEL_VGA_DEVICE, &gm45_display),
- INTEL_G45_IDS(INTEL_VGA_DEVICE, &g45_display),
- INTEL_PNV_IDS(INTEL_VGA_DEVICE, &pnv_display),
- INTEL_ILK_D_IDS(INTEL_VGA_DEVICE, &ilk_d_display),
- INTEL_ILK_M_IDS(INTEL_VGA_DEVICE, &ilk_m_display),
- INTEL_SNB_IDS(INTEL_VGA_DEVICE, &snb_display),
- INTEL_IVB_IDS(INTEL_VGA_DEVICE, &ivb_display),
- INTEL_HSW_IDS(INTEL_VGA_DEVICE, &hsw_display),
- INTEL_VLV_IDS(INTEL_VGA_DEVICE, &vlv_display),
- INTEL_BDW_IDS(INTEL_VGA_DEVICE, &bdw_display),
- INTEL_CHV_IDS(INTEL_VGA_DEVICE, &chv_display),
- INTEL_SKL_IDS(INTEL_VGA_DEVICE, &skl_display),
- INTEL_BXT_IDS(INTEL_VGA_DEVICE, &bxt_display),
- INTEL_GLK_IDS(INTEL_VGA_DEVICE, &glk_display),
- INTEL_KBL_IDS(INTEL_VGA_DEVICE, &skl_display),
- INTEL_CFL_IDS(INTEL_VGA_DEVICE, &skl_display),
- INTEL_WHL_IDS(INTEL_VGA_DEVICE, &skl_display),
- INTEL_CML_IDS(INTEL_VGA_DEVICE, &skl_display),
- INTEL_ICL_IDS(INTEL_VGA_DEVICE, &icl_display),
- INTEL_EHL_IDS(INTEL_VGA_DEVICE, &jsl_ehl_display),
- INTEL_JSL_IDS(INTEL_VGA_DEVICE, &jsl_ehl_display),
- INTEL_TGL_IDS(INTEL_VGA_DEVICE, &tgl_display),
- INTEL_DG1_IDS(INTEL_VGA_DEVICE, &dg1_display),
- INTEL_RKL_IDS(INTEL_VGA_DEVICE, &rkl_display),
- INTEL_ADLS_IDS(INTEL_VGA_DEVICE, &adl_s_display),
- INTEL_RPLS_IDS(INTEL_VGA_DEVICE, &adl_s_display),
- INTEL_ADLP_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
- INTEL_ADLN_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
- INTEL_RPLU_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
- INTEL_RPLP_IDS(INTEL_VGA_DEVICE, &xe_lpd_display),
- INTEL_DG2_IDS(INTEL_VGA_DEVICE, &xe_hpd_display),
+ INTEL_I830_IDS(INTEL_DISPLAY_DEVICE, &i830_display),
+ INTEL_I845G_IDS(INTEL_DISPLAY_DEVICE, &i845_display),
+ INTEL_I85X_IDS(INTEL_DISPLAY_DEVICE, &i85x_display),
+ INTEL_I865G_IDS(INTEL_DISPLAY_DEVICE, &i865g_display),
+ INTEL_I915G_IDS(INTEL_DISPLAY_DEVICE, &i915g_display),
+ INTEL_I915GM_IDS(INTEL_DISPLAY_DEVICE, &i915gm_display),
+ INTEL_I945G_IDS(INTEL_DISPLAY_DEVICE, &i945g_display),
+ INTEL_I945GM_IDS(INTEL_DISPLAY_DEVICE, &i945gm_display),
+ INTEL_I965G_IDS(INTEL_DISPLAY_DEVICE, &i965g_display),
+ INTEL_G33_IDS(INTEL_DISPLAY_DEVICE, &g33_display),
+ INTEL_I965GM_IDS(INTEL_DISPLAY_DEVICE, &i965gm_display),
+ INTEL_GM45_IDS(INTEL_DISPLAY_DEVICE, &gm45_display),
+ INTEL_G45_IDS(INTEL_DISPLAY_DEVICE, &g45_display),
+ INTEL_PNV_IDS(INTEL_DISPLAY_DEVICE, &pnv_display),
+ INTEL_ILK_D_IDS(INTEL_DISPLAY_DEVICE, &ilk_d_display),
+ INTEL_ILK_M_IDS(INTEL_DISPLAY_DEVICE, &ilk_m_display),
+ INTEL_SNB_IDS(INTEL_DISPLAY_DEVICE, &snb_display),
+ INTEL_IVB_IDS(INTEL_DISPLAY_DEVICE, &ivb_display),
+ INTEL_HSW_IDS(INTEL_DISPLAY_DEVICE, &hsw_display),
+ INTEL_VLV_IDS(INTEL_DISPLAY_DEVICE, &vlv_display),
+ INTEL_BDW_IDS(INTEL_DISPLAY_DEVICE, &bdw_display),
+ INTEL_CHV_IDS(INTEL_DISPLAY_DEVICE, &chv_display),
+ INTEL_SKL_IDS(INTEL_DISPLAY_DEVICE, &skl_display),
+ INTEL_BXT_IDS(INTEL_DISPLAY_DEVICE, &bxt_display),
+ INTEL_GLK_IDS(INTEL_DISPLAY_DEVICE, &glk_display),
+ INTEL_KBL_IDS(INTEL_DISPLAY_DEVICE,
[PATCH 1/2] drm/i915/pciids: switch to xe driver style PCI ID macros
The PCI ID macros in xe_pciids.h allow passing in the macro to operate
on each PCI ID, making it more flexible. Convert i915_pciids.h to the
same pattern.
INTEL_IVB_Q_IDS() for Quanta transcode remains a special case, and
unconditionally uses INTEL_QUANTA_VGA_DEVICE().
Cc: Bjorn Helgaas
Cc: linux-...@vger.kernel.org
Cc: Lucas De Marchi
Cc: Rodrigo Vivi
Signed-off-by: Jani Nikula
---
Tip: It's probably easiest to apply and use 'git show --color-words' for
review.
This transformation is completely scripted:
| #!/bin/bash
|
| FILE=include/drm/i915_pciids.h
|
| sed -i 's/[\t ]*\\/ \\/' $FILE
|
| sed -i 's/^\(#define [A-Za-z0-9_]\+\)_IDS(info)/\1_IDS(MACRO__, ...)/' $FILE
|
| sed -i 's/^\t\([A-Za-z0-9_]\+\)(info)/\t\1(MACRO__, ## __VA_ARGS__)/' $FILE
|
| sed -i 's/^\tINTEL_VGA_DEVICE(\([A-Fa-f0-9x]\+\), info)/\tMACRO__(\1, ##
__VA_ARGS__)/' $FILE
|
| # Special case: IVB Q transcode
| sed -i 's/^\t\(INTEL_QUANTA_VGA_DEVICE\)(MACRO__, ## /\t\1(/' $FILE
|
| # Change all users
| for file in $(git grep -l "#include "); do
| for macro in $(git grep -ho "#define [A-Za-z0-9_]\+_IDS" $FILE | sed
's/#define //'); do
| sed -i "s/$macro(/$macro(INTEL_VGA_DEVICE, /" $file
| done
| done
---
arch/x86/kernel/early-quirks.c| 80 +-
.../drm/i915/display/intel_display_device.c | 86 +-
drivers/gpu/drm/i915/i915_pci.c | 150 +-
drivers/gpu/drm/i915/intel_device_info.c | 88 +-
include/drm/i915_pciids.h | 1348 -
5 files changed, 876 insertions(+), 876 deletions(-)
diff --git a/arch/x86/kernel/early-quirks.c b/arch/x86/kernel/early-quirks.c
index fd74d7f26f01..1c137771c5d2 100644
--- a/arch/x86/kernel/early-quirks.c
+++ b/arch/x86/kernel/early-quirks.c
@@ -518,46 +518,46 @@ static const struct intel_early_ops gen11_early_ops
__initconst = {
/* Intel integrated GPUs for which we need to reserve "stolen memory" */
static const struct pci_device_id intel_early_ids[] __initconst = {
- INTEL_I830_IDS(&i830_early_ops),
- INTEL_I845G_IDS(&i845_early_ops),
- INTEL_I85X_IDS(&i85x_early_ops),
- INTEL_I865G_IDS(&i865_early_ops),
- INTEL_I915G_IDS(&gen3_early_ops),
- INTEL_I915GM_IDS(&gen3_early_ops),
- INTEL_I945G_IDS(&gen3_early_ops),
- INTEL_I945GM_IDS(&gen3_early_ops),
- INTEL_VLV_IDS(&gen6_early_ops),
- INTEL_PNV_IDS(&gen3_early_ops),
- INTEL_I965G_IDS(&gen3_early_ops),
- INTEL_G33_IDS(&gen3_early_ops),
- INTEL_I965GM_IDS(&gen3_early_ops),
- INTEL_GM45_IDS(&gen3_early_ops),
- INTEL_G45_IDS(&gen3_early_ops),
- INTEL_ILK_IDS(&gen3_early_ops),
- INTEL_SNB_IDS(&gen6_early_ops),
- INTEL_IVB_IDS(&gen6_early_ops),
- INTEL_HSW_IDS(&gen6_early_ops),
- INTEL_BDW_IDS(&gen8_early_ops),
- INTEL_CHV_IDS(&chv_early_ops),
- INTEL_SKL_IDS(&gen9_early_ops),
- INTEL_BXT_IDS(&gen9_early_ops),
- INTEL_KBL_IDS(&gen9_early_ops),
- INTEL_CFL_IDS(&gen9_early_ops),
- INTEL_WHL_IDS(&gen9_early_ops),
- INTEL_CML_IDS(&gen9_early_ops),
- INTEL_GLK_IDS(&gen9_early_ops),
- INTEL_CNL_IDS(&gen9_early_ops),
- INTEL_ICL_IDS(&gen11_early_ops),
- INTEL_EHL_IDS(&gen11_early_ops),
- INTEL_JSL_IDS(&gen11_early_ops),
- INTEL_TGL_IDS(&gen11_early_ops),
- INTEL_RKL_IDS(&gen11_early_ops),
- INTEL_ADLS_IDS(&gen11_early_ops),
- INTEL_ADLP_IDS(&gen11_early_ops),
- INTEL_ADLN_IDS(&gen11_early_ops),
- INTEL_RPLS_IDS(&gen11_early_ops),
- INTEL_RPLU_IDS(&gen11_early_ops),
- INTEL_RPLP_IDS(&gen11_early_ops),
+ INTEL_I830_IDS(INTEL_VGA_DEVICE, &i830_early_ops),
+ INTEL_I845G_IDS(INTEL_VGA_DEVICE, &i845_early_ops),
+ INTEL_I85X_IDS(INTEL_VGA_DEVICE, &i85x_early_ops),
+ INTEL_I865G_IDS(INTEL_VGA_DEVICE, &i865_early_ops),
+ INTEL_I915G_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_I915GM_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_I945G_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_I945GM_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_VLV_IDS(INTEL_VGA_DEVICE, &gen6_early_ops),
+ INTEL_PNV_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_I965G_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_G33_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_I965GM_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_GM45_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_G45_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_ILK_IDS(INTEL_VGA_DEVICE, &gen3_early_ops),
+ INTEL_SNB_IDS(INTEL_VGA_DEVICE, &gen6_early_ops),
+ INTEL_IVB_IDS(INTEL_VGA_DEVICE, &gen6_early_ops),
+ INTEL_HSW_IDS(INTEL_VGA_DEVICE, &gen6_early_ops),
+ INTEL_BDW_IDS(INTEL_VGA_DEVICE, &gen8_early_ops),
+ INTEL_CHV_IDS(INTEL_VGA_DEVICE, &chv_early_ops),
+ INTEL_SKL_IDS(INTEL_VGA_DEVICE, &gen9_early_ops),
+ INTEL_BXT_IDS(INTEL_VGA_DEVICE, &gen9_early_o
Re: [PATCH 0/8] drm/i915/pciids: PCI ID macro cleanups
On Wed, 15 May 2024, Bjorn Helgaas wrote: > Sorry, I had ignored this because I didn't think it affected any PCI > stuff. This is fine with me: > > Acked-by: Bjorn Helgaas Thanks, pushed to drm-intel-next. > But since you asked :), I'll gripe again about the fact that this > intel_early_ids[] list needs continual maintenance, which is not the > way things are supposed to work. Long thread about it here: > > https://lore.kernel.org/linux-pci/20201104120506.172447-1-tejaskumarx.surendrakumar.upadh...@intel.com/t/#u Right. I was under the impression we'd cease doing this for new platforms, and see if we can get away with it. For example, we don't have Meteorlake or Lunarlake there. Fingers crossed. But we probably don't want to touch the old stuff. Except now that I'm doing some non-functional refactoring to be able to better reuse the macros for something else. There's a bit more coming, please bear with me. :) I just tend to err on the side of getting the acks than pushing away. BR, Jani. -- Jani Nikula, Intel
Re: [PATCH 0/8] drm/i915/pciids: PCI ID macro cleanups
On Fri, May 10, 2024 at 04:55:07PM +0300, Jani Nikula wrote: > On Fri, 10 May 2024, Jani Nikula wrote: > > This is a spin-off from [1], including just the PCI ID macro cleanups, > > as well as adding a bunch more cleanups. > > > > BR, > > Jani. > > > > [1] https://lore.kernel.org/all/cover.1715086509.git.jani.nik...@intel.com/ > > > > > > Jani Nikula (8): > > drm/i915/pciids: add INTEL_PNV_IDS(), use acronym > > drm/i915/pciids: add INTEL_ILK_IDS(), use acronym > > drm/i915/pciids: add INTEL_SNB_IDS() > > drm/i915/pciids: add INTEL_IVB_IDS() > > drm/i915/pciids: don't include WHL/CML PCI IDs in CFL > > drm/i915/pciids: remove 11 from INTEL_ICL_IDS() > > drm/i915/pciids: remove 12 from INTEL_TGL_IDS() > > drm/i915/pciids: don't include RPL-U PCI IDs in RPL-P > > > > arch/x86/kernel/early-quirks.c| 19 +++--- > > Bjorn, ack for merging this via drm-intel-next? Sorry, I had ignored this because I didn't think it affected any PCI stuff. This is fine with me: Acked-by: Bjorn Helgaas But since you asked :), I'll gripe again about the fact that this intel_early_ids[] list needs continual maintenance, which is not the way things are supposed to work. Long thread about it here: https://lore.kernel.org/linux-pci/20201104120506.172447-1-tejaskumarx.surendrakumar.upadh...@intel.com/t/#u > > .../drm/i915/display/intel_display_device.c | 20 +++--- > > drivers/gpu/drm/i915/i915_pci.c | 13 ++-- > > drivers/gpu/drm/i915/intel_device_info.c | 3 +- > > include/drm/i915_pciids.h | 67 --- > > 5 files changed, 71 insertions(+), 51 deletions(-) > > -- > Jani Nikula, Intel
✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/display: Move port clock calculation
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Move port clock calculation
URL : https://patchwork.freedesktop.org/series/133640/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_14764_full -> Patchwork_133640v1_full
Summary
---
**FAILURE**
Serious unknown changes coming with Patchwork_133640v1_full absolutely need
to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_133640v1_full, please notify your bug team
('i915-ci-in...@lists.freedesktop.org') to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (9 -> 9)
--
No changes in participating hosts
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_133640v1_full:
### IGT changes ###
Possible regressions
* igt@kms_vblank@ts-continuation-dpms-suspend@pipe-a-hdmi-a-1:
- shard-tglu: [PASS][1] -> [INCOMPLETE][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/shard-tglu-3/igt@kms_vblank@ts-continuation-dpms-susp...@pipe-a-hdmi-a-1.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-tglu-4/igt@kms_vblank@ts-continuation-dpms-susp...@pipe-a-hdmi-a-1.html
Known issues
Here are the changes found in Patchwork_133640v1_full that come from known
issues:
### IGT changes ###
Issues hit
* igt@device_reset@unbind-cold-reset-rebind:
- shard-tglu: NOTRUN -> [SKIP][3] ([i915#11078])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-tglu-9/igt@device_re...@unbind-cold-reset-rebind.html
* igt@drm_fdinfo@most-busy-check-all@bcs0:
- shard-dg1: NOTRUN -> [SKIP][4] ([i915#8414]) +4 other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-dg1-16/igt@drm_fdinfo@most-busy-check-...@bcs0.html
* igt@gem_ccs@ctrl-surf-copy:
- shard-mtlp: NOTRUN -> [SKIP][5] ([i915#3555] / [i915#9323])
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-mtlp-3/igt@gem_...@ctrl-surf-copy.html
* igt@gem_ccs@ctrl-surf-copy-new-ctx:
- shard-rkl: NOTRUN -> [SKIP][6] ([i915#9323])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-rkl-5/igt@gem_...@ctrl-surf-copy-new-ctx.html
* igt@gem_close_race@multigpu-basic-process:
- shard-tglu: NOTRUN -> [SKIP][7] ([i915#7697])
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-tglu-9/igt@gem_close_r...@multigpu-basic-process.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-rkl: NOTRUN -> [SKIP][8] ([i915#7697])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-rkl-1/igt@gem_close_r...@multigpu-basic-threads.html
* igt@gem_ctx_persistence@heartbeat-hang:
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#8555])
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-mtlp-3/igt@gem_ctx_persiste...@heartbeat-hang.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-mtlp: NOTRUN -> [SKIP][10] ([i915#280])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-mtlp-3/igt@gem_ctx_s...@invalid-sseu.html
* igt@gem_eio@kms:
- shard-dg2: [PASS][11] -> [INCOMPLETE][12] ([i915#10513] /
[i915#1982])
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/shard-dg2-6/igt@gem_...@kms.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-dg2-2/igt@gem_...@kms.html
* igt@gem_eio@reset-stress:
- shard-dg1: NOTRUN -> [FAIL][13] ([i915#5784])
[13]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-dg1-18/igt@gem_...@reset-stress.html
* igt@gem_exec_capture@many-4k-incremental:
- shard-glk: NOTRUN -> [FAIL][14] ([i915#9606]) +1 other test fail
[14]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-glk8/igt@gem_exec_capt...@many-4k-incremental.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-tglu: NOTRUN -> [FAIL][15] ([i915#2842])
[15]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-tglu-9/igt@gem_exec_fair@basic-none-r...@rcs0.html
* igt@gem_exec_fair@basic-none@bcs0:
- shard-rkl: NOTRUN -> [FAIL][16] ([i915#2842]) +3 other tests fail
[16]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-rkl-1/igt@gem_exec_fair@basic-n...@bcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglu: [PASS][17] -> [FAIL][18] ([i915#2842])
[17]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/shard-tglu-3/igt@gem_exec_fair@basic-pace-sh...@rcs0.html
[18]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/shard-tglu-4/
Re: [PATCH 1/2] drm/i915/display: Move port clock calculation
Quoting Jani Nikula (2024-05-15 10:59:11-03:00) >On Wed, 15 May 2024, Gustavo Sousa wrote: >> Quoting Gustavo Sousa (2024-05-15 10:23:54-03:00) >>>Quoting Mika Kahola (2024-05-15 03:45:23-03:00) As a preparation to remove .clock member from pll state structure, let's move the port clock calculation on better location >> >> Ah... Also, I noticed that we are not simply moving the implementation >> of port calculation functions with this patch. We are also replacing >> usage of the "clock" members with function calls. I think the message >> subject and body should be reworded. > >No, code movement is one patch, replacing .clock usage with function >calls is another patch, and removing .clock is yet another patch. Cool. Even better! -- Gustavo Sousa
Re: [PATCH 0/8] drm/i915/pciids: PCI ID macro cleanups
On Fri, 10 May 2024, Jani Nikula wrote: > On Fri, 10 May 2024, Jani Nikula wrote: >> This is a spin-off from [1], including just the PCI ID macro cleanups, >> as well as adding a bunch more cleanups. >> >> BR, >> Jani. >> >> [1] https://lore.kernel.org/all/cover.1715086509.git.jani.nik...@intel.com/ >> >> >> Jani Nikula (8): >> drm/i915/pciids: add INTEL_PNV_IDS(), use acronym >> drm/i915/pciids: add INTEL_ILK_IDS(), use acronym >> drm/i915/pciids: add INTEL_SNB_IDS() >> drm/i915/pciids: add INTEL_IVB_IDS() >> drm/i915/pciids: don't include WHL/CML PCI IDs in CFL >> drm/i915/pciids: remove 11 from INTEL_ICL_IDS() >> drm/i915/pciids: remove 12 from INTEL_TGL_IDS() >> drm/i915/pciids: don't include RPL-U PCI IDs in RPL-P >> >> arch/x86/kernel/early-quirks.c| 19 +++--- > > Bjorn, ack for merging this via drm-intel-next? No reply from Bjorn, Cc: the x86 maintainers and list, could I get an ack from you please? I'd like to get these PCI ID macro changes moving forward, I've got more work pending on this. Lore link to the whole series [1]. Thanks, Jani. [1] https://lore.kernel.org/r/cover.1715340032.git.jani.nik...@intel.com > >> .../drm/i915/display/intel_display_device.c | 20 +++--- >> drivers/gpu/drm/i915/i915_pci.c | 13 ++-- >> drivers/gpu/drm/i915/intel_device_info.c | 3 +- >> include/drm/i915_pciids.h | 67 --- >> 5 files changed, 71 insertions(+), 51 deletions(-) -- Jani Nikula, Intel
Re: [PATCH 1/2] drm/i915/display: Move port clock calculation
On Wed, 15 May 2024, Gustavo Sousa wrote: > Quoting Gustavo Sousa (2024-05-15 10:23:54-03:00) >>Quoting Mika Kahola (2024-05-15 03:45:23-03:00) >>>As a preparation to remove .clock member from pll state >>>structure, let's move the port clock calculation on better >>>location > > Ah... Also, I noticed that we are not simply moving the implementation > of port calculation functions with this patch. We are also replacing > usage of the "clock" members with function calls. I think the message > subject and body should be reworded. No, code movement is one patch, replacing .clock usage with function calls is another patch, and removing .clock is yet another patch. BR, Jani. -- Jani Nikula, Intel
✗ Fi.CI.BUILD: failure for Regression on linux-next (next-20240506)
== Series Details == Series: Regression on linux-next (next-20240506) URL : https://patchwork.freedesktop.org/series/133656/ State : failure == Summary == Error: patch https://patchwork.freedesktop.org/api/1.0/series/133656/revisions/1/mbox/ not applied Patch is empty. When you have resolved this problem, run "git am --continue". If you prefer to skip this patch, run "git am --skip" instead. To record the empty patch as an empty commit, run "git am --allow-empty". To restore the original branch and stop patching, run "git am --abort". Build failed, no error log produced
Re: [PATCH 1/2] drm/i915/display: Move port clock calculation
Quoting Gustavo Sousa (2024-05-15 10:23:54-03:00)
>Quoting Mika Kahola (2024-05-15 03:45:23-03:00)
>>As a preparation to remove .clock member from pll state
>>structure, let's move the port clock calculation on better
>>location
Ah... Also, I noticed that we are not simply moving the implementation
of port calculation functions with this patch. We are also replacing
usage of the "clock" members with function calls. I think the message
subject and body should be reworded.
--
Gustavo Sousa
>>
>>Signed-off-by: Mika Kahola
>>---
>> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 176 ++-
>> 1 file changed, 91 insertions(+), 85 deletions(-)
>>
>>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>>b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>>index 1b1ebafa49e8..9f860a05e623 100644
>>--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>>+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>>@@ -1970,13 +1970,92 @@ static const struct intel_c20pll_state * const
>>mtl_c20_hdmi_tables[] = {
>> NULL,
>> };
>>
>>-static int intel_c10_phy_check_hdmi_link_rate(int clock)
>>+static int intel_c10pll_calc_port_clock(struct intel_encoder *encoder,
>>+const struct intel_c10pll_state
>>*pll_state)
>>+{
>>+unsigned int frac_quot = 0, frac_rem = 0, frac_den = 1;
>>+unsigned int multiplier, tx_clk_div, hdmi_div, refclk = 38400;
>>+int tmpclk = 0;
>>+
>>+if (pll_state->pll[0] & C10_PLL0_FRACEN) {
>>+frac_quot = pll_state->pll[12] << 8 | pll_state->pll[11];
>>+frac_rem = pll_state->pll[14] << 8 | pll_state->pll[13];
>>+frac_den = pll_state->pll[10] << 8 | pll_state->pll[9];
>>+}
>>+
>>+multiplier = (REG_FIELD_GET8(C10_PLL3_MULTIPLIERH_MASK,
>>pll_state->pll[3]) << 8 |
>>+ pll_state->pll[2]) / 2 + 16;
>>+
>>+tx_clk_div = REG_FIELD_GET8(C10_PLL15_TXCLKDIV_MASK,
>>pll_state->pll[15]);
>>+hdmi_div = REG_FIELD_GET8(C10_PLL15_HDMIDIV_MASK,
>>pll_state->pll[15]);
>>+
>>+tmpclk = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, (multiplier <<
>>16) + frac_quot) +
>>+ DIV_ROUND_CLOSEST(refclk * frac_rem,
>>frac_den),
>>+ 10 << (tx_clk_div + 16));
>>+tmpclk *= (hdmi_div ? 2 : 1);
>>+
>>+return tmpclk;
>>+}
>>+
>>+static bool intel_c20phy_use_mpllb(const struct intel_c20pll_state *state)
>>+{
>>+return state->tx[0] & C20_PHY_USE_MPLLB;
>>+}
>>+
>>+static int intel_c20pll_calc_port_clock(struct intel_encoder *encoder,
>
>While at it, also remove the unused "encoder" parameter?
>
>Also, note that there are legitimate checkpatch issues reported for
>this patch, with those addressed:
>
>Reviewed-by: Gustavo Sousa
>
>>+const struct intel_c20pll_state
>>*pll_state)
>>+{
>>+unsigned int frac, frac_en, frac_quot, frac_rem, frac_den;
>>+unsigned int multiplier, refclk = 38400;
>>+unsigned int tx_clk_div;
>>+unsigned int ref_clk_mpllb_div;
>>+unsigned int fb_clk_div4_en;
>>+unsigned int ref, vco;
>>+unsigned int tx_rate_mult;
>>+unsigned int tx_rate = REG_FIELD_GET(C20_PHY_TX_RATE,
>>pll_state->tx[0]);
>>+
>>+if (intel_c20phy_use_mpllb(pll_state)) {
>>+tx_rate_mult = 1;
>>+frac_en = REG_FIELD_GET(C20_MPLLB_FRACEN,
>>pll_state->mpllb[6]);
>>+frac_quot = pll_state->mpllb[8];
>>+frac_rem = pll_state->mpllb[9];
>>+frac_den = pll_state->mpllb[7];
>>+multiplier = REG_FIELD_GET(C20_MULTIPLIER_MASK,
>>pll_state->mpllb[0]);
>>+tx_clk_div = REG_FIELD_GET(C20_MPLLB_TX_CLK_DIV_MASK,
>>pll_state->mpllb[0]);
>>+ref_clk_mpllb_div =
>>REG_FIELD_GET(C20_REF_CLK_MPLLB_DIV_MASK, pll_state->mpllb[6]);
>>+fb_clk_div4_en = 0;
>>+} else {
>>+tx_rate_mult = 2;
>>+frac_en = REG_FIELD_GET(C20_MPLLA_FRACEN,
>>pll_state->mplla[6]);
>>+frac_quot = pll_state->mplla[8];
>>+frac_rem = pll_state->mplla[9];
>>+frac_den = pll_state->mplla[7];
>>+multiplier = REG_FIELD_GET(C20_MULTIPLIER_MASK,
>>pll_state->mplla[0]);
>>+tx_clk_div = REG_FIELD_GET(C20_MPLLA_TX_CLK_DIV_MASK,
>>pll_state->mplla[1]);
>>+ref_clk_mpllb_div =
>>REG_FIELD_GET(C20_REF_CLK_MPLLB_DIV_MASK, pll_state->mplla[6]);
>>+fb_clk_div4_en = REG_FIELD_GET(C20_FB_CLK_DIV4_EN,
>>pll_state->mplla[0]);
>>+}
>>+
>>+if (frac_en)
>>+frac = frac_quot + DIV_ROUND_CLOSEST(frac_rem, frac_den);
>>+else
>>+frac = 0;
>>+
>>+ref = DIV_ROUND_CLOSEST(refclk * (1 << (1 + fb_clk_div4_en)), 1 <<
>>ref_clk_mpllb_div);
>>+vco = DIV_ROUND_CLOSEST
Re: [PATCH 2/2] drm/i915/display: Remove .clock from pll state structure
Quoting Mika Kahola (2024-05-15 03:45:24-03:00)
>.clock is not necessarily required to have in pll state
>structure as it can always recalculated with the *_calc_port_clock()
>function. Hence, let's remove this struct member complitely.
>
>Signed-off-by: Mika Kahola
>---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 86 ---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 2 -
> 2 files changed, 88 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>index 9f860a05e623..abb937368284 100644
>--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>@@ -505,7 +505,6 @@ void intel_cx0_phy_set_signal_levels(struct intel_encoder
>*encoder,
> */
>
> static const struct intel_c10pll_state mtl_c10_dp_rbr = {
>-.clock = 162000,
> .tx = 0x10,
> .cmn = 0x21,
> .pll[0] = 0xB4,
>@@ -531,7 +530,6 @@ static const struct intel_c10pll_state mtl_c10_dp_rbr = {
> };
>
> static const struct intel_c10pll_state mtl_c10_edp_r216 = {
>-.clock = 216000,
> .tx = 0x10,
> .cmn = 0x21,
> .pll[0] = 0x4,
>@@ -557,7 +555,6 @@ static const struct intel_c10pll_state mtl_c10_edp_r216 = {
> };
>
> static const struct intel_c10pll_state mtl_c10_edp_r243 = {
>-.clock = 243000,
> .tx = 0x10,
> .cmn = 0x21,
> .pll[0] = 0x34,
>@@ -583,7 +580,6 @@ static const struct intel_c10pll_state mtl_c10_edp_r243 = {
> };
>
> static const struct intel_c10pll_state mtl_c10_dp_hbr1 = {
>-.clock = 27,
> .tx = 0x10,
> .cmn = 0x21,
> .pll[0] = 0xF4,
>@@ -609,7 +605,6 @@ static const struct intel_c10pll_state mtl_c10_dp_hbr1 = {
> };
>
> static const struct intel_c10pll_state mtl_c10_edp_r324 = {
>-.clock = 324000,
> .tx = 0x10,
> .cmn = 0x21,
> .pll[0] = 0xB4,
>@@ -635,7 +630,6 @@ static const struct intel_c10pll_state mtl_c10_edp_r324 = {
> };
>
> static const struct intel_c10pll_state mtl_c10_edp_r432 = {
>-.clock = 432000,
> .tx = 0x10,
> .cmn = 0x21,
> .pll[0] = 0x4,
>@@ -661,7 +655,6 @@ static const struct intel_c10pll_state mtl_c10_edp_r432 = {
> };
>
> static const struct intel_c10pll_state mtl_c10_dp_hbr2 = {
>-.clock = 54,
> .tx = 0x10,
> .cmn = 0x21,
> .pll[0] = 0xF4,
>@@ -687,7 +680,6 @@ static const struct intel_c10pll_state mtl_c10_dp_hbr2 = {
> };
>
> static const struct intel_c10pll_state mtl_c10_edp_r675 = {
>-.clock = 675000,
> .tx = 0x10,
> .cmn = 0x21,
> .pll[0] = 0xB4,
>@@ -713,7 +705,6 @@ static const struct intel_c10pll_state mtl_c10_edp_r675 = {
> };
>
> static const struct intel_c10pll_state mtl_c10_dp_hbr3 = {
>-.clock = 81,
> .tx = 0x10,
> .cmn = 0x21,
> .pll[0] = 0x34,
>@@ -761,7 +752,6 @@ static const struct intel_c10pll_state * const
>mtl_c10_edp_tables[] = {
>
> /* C20 basic DP 1.4 tables */
> static const struct intel_c20pll_state mtl_c20_dp_rbr = {
>-.clock = 162000,
> .tx = {0xbe88, /* tx cfg0 */
> 0x5800, /* tx cfg1 */
> 0x, /* tx cfg2 */
>@@ -786,7 +776,6 @@ static const struct intel_c20pll_state mtl_c20_dp_rbr = {
> };
>
> static const struct intel_c20pll_state mtl_c20_dp_hbr1 = {
>-.clock = 27,
> .tx = {0xbe88, /* tx cfg0 */
> 0x4800, /* tx cfg1 */
> 0x, /* tx cfg2 */
>@@ -811,7 +800,6 @@ static const struct intel_c20pll_state mtl_c20_dp_hbr1 = {
> };
>
> static const struct intel_c20pll_state mtl_c20_dp_hbr2 = {
>-.clock = 54,
> .tx = {0xbe88, /* tx cfg0 */
> 0x4800, /* tx cfg1 */
> 0x, /* tx cfg2 */
>@@ -836,7 +824,6 @@ static const struct intel_c20pll_state mtl_c20_dp_hbr2 = {
> };
>
> static const struct intel_c20pll_state mtl_c20_dp_hbr3 = {
>-.clock = 81,
> .tx = {0xbe88, /* tx cfg0 */
> 0x4800, /* tx cfg1 */
> 0x, /* tx cfg2 */
>@@ -862,7 +849,6 @@ static const struct intel_c20pll_state mtl_c20_dp_hbr3 = {
>
> /* C20 basic DP 2.0 tables */
> static const struct intel_c20pll_state mtl_c20_dp_uhbr10 = {
>-.clock = 100, /* 10 Gbps */
> .tx = {0xbe21, /* tx cfg0 */
> 0xe800, /* tx cfg1 */
> 0x, /* tx cfg2 */
>@@ -886,7 +872,6 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr10 =
>{
> };
>
> static const struct intel_c20pll_state mtl_c20_dp_uhbr13_5 = {
>-.clock = 135, /* 13.5 Gbps */
> .tx = {0xbea0, /* tx cfg0 */
> 0x4800, /* tx cfg1 */
> 0x, /* tx cfg2 */
>@@ -911,7 +896,6 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr13_5
>= {
> };
>
> static const struct intel_c20pll_state mtl_c
Re: [PATCH 02/20] drm/i915/dp: Move link train params to a substruct in intel_dp
On Wed, May 15, 2024 at 03:52:33PM +0300, Jani Nikula wrote:
> On Tue, 14 May 2024, Imre Deak wrote:
> > For clarity move the link training parameters updated during link
> > training based on the pass/fail LT result under a substruct in intel_dp.
> > This prepares for later patches in this patchset adding similar params
> > here. Rename intel_dp_reset_max_link_params() to
> > intel_dp_reset_link_train_params() to better reflect what state gets
> > reset.
>
> High level bikeshedding, why "link_train" instead of just "link"?
It was link training I've been thinking about and that it's important to
know which state gets updated during LT and gets reset after a hotplug.
> You could have three groups: source, sink and link.
Ok, makes sense and link_train could be instead a more generic link
container.
>
> BR,
> Jani.
>
>
> >
> > Signed-off-by: Imre Deak
> > ---
> > .../drm/i915/display/intel_display_types.h| 12
> > drivers/gpu/drm/i915/display/intel_dp.c | 30 +--
> > 2 files changed, 22 insertions(+), 20 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index fec3de25ea54e..7edb533758416 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1738,7 +1738,6 @@ struct intel_dp {
> > u8 lane_count;
> > u8 sink_count;
> > bool link_trained;
> > - bool reset_link_params;
> > bool use_max_params;
> > u8 dpcd[DP_RECEIVER_CAP_SIZE];
> > u8 psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
> > @@ -1759,10 +1758,13 @@ struct intel_dp {
> > /* intersection of source and sink rates */
> > int num_common_rates;
> > int common_rates[DP_MAX_SUPPORTED_RATES];
> > - /* Max lane count for the current link */
> > - int max_link_lane_count;
> > - /* Max rate for the current link */
> > - int max_link_rate;
> > + struct {
> > + /* Max lane count for the current link */
> > + int max_lane_count;
> > + /* Max rate for the current link */
> > + int max_rate;
> > + } link_train;
> > + bool reset_link_params;
> > int mso_link_count;
> > int mso_pixel_overlap;
> > /* sink or branch descriptor */
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index 6b8a94d0ca999..ffa627c63e048 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -372,13 +372,13 @@ int intel_dp_max_common_lane_count(struct intel_dp
> > *intel_dp)
> >
> > int intel_dp_max_lane_count(struct intel_dp *intel_dp)
> > {
> > - switch (intel_dp->max_link_lane_count) {
> > + switch (intel_dp->link_train.max_lane_count) {
> > case 1:
> > case 2:
> > case 4:
> > - return intel_dp->max_link_lane_count;
> > + return intel_dp->link_train.max_lane_count;
> > default:
> > - MISSING_CASE(intel_dp->max_link_lane_count);
> > + MISSING_CASE(intel_dp->link_train.max_lane_count);
> > return 1;
> > }
> > }
> > @@ -644,7 +644,7 @@ static bool intel_dp_link_params_valid(struct intel_dp
> > *intel_dp, int link_rate,
> > * boot-up.
> > */
> > if (link_rate == 0 ||
> > - link_rate > intel_dp->max_link_rate)
> > + link_rate > intel_dp->link_train.max_rate)
> > return false;
> >
> > if (lane_count == 0 ||
> > @@ -705,8 +705,8 @@ int intel_dp_get_link_train_fallback_values(struct
> > intel_dp *intel_dp,
> > "Retrying Link training for eDP with same
> > parameters\n");
> > return 0;
> > }
> > - intel_dp->max_link_rate = intel_dp_common_rate(intel_dp, index
> > - 1);
> > - intel_dp->max_link_lane_count = lane_count;
> > + intel_dp->link_train.max_rate = intel_dp_common_rate(intel_dp,
> > index - 1);
> > + intel_dp->link_train.max_lane_count = lane_count;
> > } else if (lane_count > 1) {
> > if (intel_dp_is_edp(intel_dp) &&
> > !intel_dp_can_link_train_fallback_for_edp(intel_dp,
> > @@ -716,8 +716,8 @@ int intel_dp_get_link_train_fallback_values(struct
> > intel_dp *intel_dp,
> > "Retrying Link training for eDP with same
> > parameters\n");
> > return 0;
> > }
> > - intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp);
> > - intel_dp->max_link_lane_count = lane_count >> 1;
> > + intel_dp->link_train.max_rate =
> > intel_dp_max_common_rate(intel_dp);
> > + intel_dp->link_train.max_lane_count = lane_count >> 1;
> > } else {
> > drm_err(&i915->drm, "Link Training Unsuccessful\n");
> > return -1;
> > @@ -1382,7 +1382,7 @@ intel_dp_max_link_rate(struct intel_dp *intel_dp)
> >
Re: [PATCH 1/2] drm/i915/display: Move port clock calculation
Quoting Mika Kahola (2024-05-15 03:45:23-03:00)
>As a preparation to remove .clock member from pll state
>structure, let's move the port clock calculation on better
>location
>
>Signed-off-by: Mika Kahola
>---
> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 176 ++-
> 1 file changed, 91 insertions(+), 85 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>index 1b1ebafa49e8..9f860a05e623 100644
>--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
>@@ -1970,13 +1970,92 @@ static const struct intel_c20pll_state * const
>mtl_c20_hdmi_tables[] = {
> NULL,
> };
>
>-static int intel_c10_phy_check_hdmi_link_rate(int clock)
>+static int intel_c10pll_calc_port_clock(struct intel_encoder *encoder,
>+const struct intel_c10pll_state
>*pll_state)
>+{
>+unsigned int frac_quot = 0, frac_rem = 0, frac_den = 1;
>+unsigned int multiplier, tx_clk_div, hdmi_div, refclk = 38400;
>+int tmpclk = 0;
>+
>+if (pll_state->pll[0] & C10_PLL0_FRACEN) {
>+frac_quot = pll_state->pll[12] << 8 | pll_state->pll[11];
>+frac_rem = pll_state->pll[14] << 8 | pll_state->pll[13];
>+frac_den = pll_state->pll[10] << 8 | pll_state->pll[9];
>+}
>+
>+multiplier = (REG_FIELD_GET8(C10_PLL3_MULTIPLIERH_MASK,
>pll_state->pll[3]) << 8 |
>+ pll_state->pll[2]) / 2 + 16;
>+
>+tx_clk_div = REG_FIELD_GET8(C10_PLL15_TXCLKDIV_MASK,
>pll_state->pll[15]);
>+hdmi_div = REG_FIELD_GET8(C10_PLL15_HDMIDIV_MASK, pll_state->pll[15]);
>+
>+tmpclk = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(refclk, (multiplier << 16)
>+ frac_quot) +
>+ DIV_ROUND_CLOSEST(refclk * frac_rem,
>frac_den),
>+ 10 << (tx_clk_div + 16));
>+tmpclk *= (hdmi_div ? 2 : 1);
>+
>+return tmpclk;
>+}
>+
>+static bool intel_c20phy_use_mpllb(const struct intel_c20pll_state *state)
>+{
>+return state->tx[0] & C20_PHY_USE_MPLLB;
>+}
>+
>+static int intel_c20pll_calc_port_clock(struct intel_encoder *encoder,
While at it, also remove the unused "encoder" parameter?
Also, note that there are legitimate checkpatch issues reported for
this patch, with those addressed:
Reviewed-by: Gustavo Sousa
>+const struct intel_c20pll_state
>*pll_state)
>+{
>+unsigned int frac, frac_en, frac_quot, frac_rem, frac_den;
>+unsigned int multiplier, refclk = 38400;
>+unsigned int tx_clk_div;
>+unsigned int ref_clk_mpllb_div;
>+unsigned int fb_clk_div4_en;
>+unsigned int ref, vco;
>+unsigned int tx_rate_mult;
>+unsigned int tx_rate = REG_FIELD_GET(C20_PHY_TX_RATE,
>pll_state->tx[0]);
>+
>+if (intel_c20phy_use_mpllb(pll_state)) {
>+tx_rate_mult = 1;
>+frac_en = REG_FIELD_GET(C20_MPLLB_FRACEN,
>pll_state->mpllb[6]);
>+frac_quot = pll_state->mpllb[8];
>+frac_rem = pll_state->mpllb[9];
>+frac_den = pll_state->mpllb[7];
>+multiplier = REG_FIELD_GET(C20_MULTIPLIER_MASK,
>pll_state->mpllb[0]);
>+tx_clk_div = REG_FIELD_GET(C20_MPLLB_TX_CLK_DIV_MASK,
>pll_state->mpllb[0]);
>+ref_clk_mpllb_div = REG_FIELD_GET(C20_REF_CLK_MPLLB_DIV_MASK,
>pll_state->mpllb[6]);
>+fb_clk_div4_en = 0;
>+} else {
>+tx_rate_mult = 2;
>+frac_en = REG_FIELD_GET(C20_MPLLA_FRACEN,
>pll_state->mplla[6]);
>+frac_quot = pll_state->mplla[8];
>+frac_rem = pll_state->mplla[9];
>+frac_den = pll_state->mplla[7];
>+multiplier = REG_FIELD_GET(C20_MULTIPLIER_MASK,
>pll_state->mplla[0]);
>+tx_clk_div = REG_FIELD_GET(C20_MPLLA_TX_CLK_DIV_MASK,
>pll_state->mplla[1]);
>+ref_clk_mpllb_div = REG_FIELD_GET(C20_REF_CLK_MPLLB_DIV_MASK,
>pll_state->mplla[6]);
>+fb_clk_div4_en = REG_FIELD_GET(C20_FB_CLK_DIV4_EN,
>pll_state->mplla[0]);
>+}
>+
>+if (frac_en)
>+frac = frac_quot + DIV_ROUND_CLOSEST(frac_rem, frac_den);
>+else
>+frac = 0;
>+
>+ref = DIV_ROUND_CLOSEST(refclk * (1 << (1 + fb_clk_div4_en)), 1 <<
>ref_clk_mpllb_div);
>+vco = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(ref, (multiplier << (17 - 2))
>+ frac) >> 17, 10);
>+
>+return vco << tx_rate_mult >> tx_clk_div >> tx_rate;
>+}
>+
>+static int intel_c10_phy_check_hdmi_link_rate(struct intel_encoder *encoder,
>+ int clock)
> {
> const struct intel_c10pll_state * const *tables = mtl_c10_hdmi_tables;
> int i;
>
> for (i = 0; tables[i]; i++) {
>-
Re: [PATCH 17/20] drm/i915/dp: Add debugfs entries to set a target link rate/lane count
On Wed, May 15, 2024 at 04:09:23PM +0300, Jani Nikula wrote:
> On Tue, 14 May 2024, Imre Deak wrote:
> > Add connector debugfs entries to set a target link rate/lane count to be
> > used by a link training afterwards. After setting a target link
> > rate/lane count reset the link training parameters and for a non-auto
> > target disable reducing the link parameters via the fallback logic. The
> > former one can be used after testing link training failure scenarios
> > - via debugfs entries added later - to reset the reduced link parameters
> > after the test.
> >
> > Signed-off-by: Imre Deak
> > ---
> > .../drm/i915/display/intel_display_debugfs.c | 218 ++
>
> Basically I don't want any new debugfs files to intel_display_debugfs.c.
>
> These should probably go to intel_dp_link_training.c, or maybe
> intel_dp.c or a new intel_dp_debugfs.c. But I think the first.
Ok, forgot about that guidline, both is ok to me. There is a quite a few
DP specific entries, that would call for the latter option.
>
> BR,
> Jani.
>
>
>
> > .../drm/i915/display/intel_display_types.h| 2 +
> > drivers/gpu/drm/i915/display/intel_dp.c | 63 -
> > drivers/gpu/drm/i915/display/intel_dp.h | 2 +
> > .../drm/i915/display/intel_dp_link_training.c | 6 +
> > 5 files changed, 282 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > index 35f9f86ef70f4..521721a20358f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > @@ -1316,6 +1316,215 @@ static const struct file_operations
> > i915_dsc_bpc_fops = {
> > .write = i915_dsc_bpc_write
> > };
> >
> > +static struct intel_dp *intel_connector_to_intel_dp(struct intel_connector
> > *connector)
> > +{
> > + if (connector->mst_port)
> > + return connector->mst_port;
> > + else
> > + return enc_to_intel_dp(intel_attached_encoder(connector));
> > +}
> > +
> > +static int i915_dp_requested_link_rate_show(struct seq_file *m, void *data)
> > +{
> > + struct intel_connector *connector = to_intel_connector(m->private);
> > + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> > + struct intel_dp *intel_dp;
> > + int ret;
> > + int i;
> > +
> > + ret =
> > drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
> > + if (ret)
> > + return ret;
> > +
> > + intel_dp = intel_connector_to_intel_dp(connector);
> > +
> > + seq_printf(m, "%sauto%s",
> > + intel_dp->requested_link_rate == 0 ? "[" : "",
> > + intel_dp->requested_link_rate == 0 ? "]" : "");
> > +
> > + for (i = 0; i < intel_dp->num_source_rates; i++)
> > + seq_printf(m, " %s%d%s%s",
> > + intel_dp->source_rates[i] ==
> > intel_dp->requested_link_rate ? "[" : "",
> > + intel_dp->source_rates[i],
> > + intel_dp->link_trained &&
> > + intel_dp->source_rates[i] ==
> > intel_dp->link_rate ? "*" : "",
> > + intel_dp->source_rates[i] ==
> > intel_dp->requested_link_rate ? "]" : "");
> > +
> > + drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
> > +
> > + seq_putc(m, '\n');
> > +
> > + return 0;
> > +}
> > +
> > +static int parse_link_rate(struct intel_dp *intel_dp, const char __user
> > *ubuf, size_t len)
> > +{
> > + char *kbuf;
> > + const char *p;
> > + int rate;
> > + int ret = 0;
> > +
> > + kbuf = memdup_user_nul(ubuf, len);
> > + if (IS_ERR(kbuf))
> > + return PTR_ERR(kbuf);
> > +
> > + p = strim(kbuf);
> > +
> > + if (!strcmp(p, "auto")) {
> > + rate = 0;
> > + } else {
> > + ret = kstrtoint(p, 0, &rate);
> > + if (ret < 0)
> > + goto out_free;
> > +
> > + if (intel_dp_rate_index(intel_dp->source_rates,
> > + intel_dp->num_source_rates,
> > + rate) < 0)
> > + ret = -EINVAL;
> > + }
> > +
> > +out_free:
> > + kfree(kbuf);
> > +
> > + return ret < 0 ? ret : rate;
> > +}
> > +
> > +static ssize_t i915_dp_requested_link_rate_write(struct file *file,
> > +const char __user *ubuf,
> > +size_t len, loff_t *offp)
> > +{
> > + struct seq_file *m = file->private_data;
> > + struct intel_connector *connector = to_intel_connector(m->private);
> > + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> > + struct intel_dp *intel_dp = intel_connector_to_intel_dp(connector);
> > + int rate;
> > + int ret;
> > +
> > + ret =
> > drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
> > + if (ret)
> > + return ret;
> > +
> > +
Re: [PATCH 04/20] drm/i915/dp: Sanitize intel_dp_get_link_train_fallback_values()
On Wed, May 15, 2024 at 04:05:32PM +0300, Jani Nikula wrote:
> On Tue, 14 May 2024, Imre Deak wrote:
> > Reduce the indentation in intel_dp_get_link_train_fallback_values() by
> > adding separate helpers to reduce the link rate and lane count. Also
> > simplify things by passing crtc_state to the function.
> >
> > This also prepares for later patches in the patchset adding a limitation
> > on how the link params are reduced.
>
> Currently we have these rigid reductions of rate, lane and bpp. I don't
> think we want to lock in to this policy, but rather make it more
> flexible. So I think this patch is counter productive.
>
> My grand plan I never got around to was to create a list/array of
> possible sets of link parameters that you could trivially sort, filter,
> iterate, and remove parameters from. (And I don't mean a statically
> written one, but a dynamically generated list.)
>
> In that scheme, you'd get the fallback values by advancing one element
> in the data structure. And you know when you've exhausted all fallbacks
> when you're at the end. None of this complicated "if we've finished x,
> then try y, then z".
Yes, having a different fallback order than the current one makes sense
to me both BW utilization wise and because the standard describes it (as
an alternative?). I don't think this patch makes it more difficult to
impplement that, but the change does improve the readability of the
current code.
> And then you could sort the list based on bandwidth, and go from
> uncompressed uhbr to compressed non-uhbr to whatever.
>
>
> BR,
> Jani.
>
>
>
> >
> > Signed-off-by: Imre Deak
> > ---
> > .../drm/i915/display/intel_dp_link_training.c | 82 ---
> > 1 file changed, 51 insertions(+), 31 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > index 1b4694b46cea7..1ea4aaf9592f1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> > @@ -1109,11 +1109,37 @@ static bool
> > intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp,
> > return true;
> > }
> >
> > +static int reduce_link_rate(struct intel_dp *intel_dp, int current_rate)
> > +{
> > + int rate_index;
> > + int new_rate;
> > +
> > + rate_index = intel_dp_rate_index(intel_dp->common_rates,
> > +intel_dp->num_common_rates,
> > +current_rate);
> > +
> > + if (rate_index <= 0)
> > + return -1;
> > +
> > + new_rate = intel_dp_common_rate(intel_dp, rate_index - 1);
> > +
> > + return new_rate;
> > +}
> > +
> > +static int reduce_lane_count(struct intel_dp *intel_dp, int
> > current_lane_count)
> > +{
> > + if (current_lane_count > 1)
> > + return current_lane_count >> 1;
> > +
> > + return -1;
> > +}
> > +
> > static int intel_dp_get_link_train_fallback_values(struct intel_dp
> > *intel_dp,
> > - int link_rate, u8 lane_count)
> > + const struct
> > intel_crtc_state *crtc_state)
> > {
> > struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> > - int index;
> > + int new_link_rate;
> > + int new_lane_count;
> >
> > /*
> > * TODO: Enable fallback on MST links once MST link compute can handle
> > @@ -1131,36 +1157,32 @@ static int
> > intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
> > return 0;
> > }
> >
> > - index = intel_dp_rate_index(intel_dp->common_rates,
> > - intel_dp->num_common_rates,
> > - link_rate);
> > - if (index > 0) {
> > - if (intel_dp_is_edp(intel_dp) &&
> > - !intel_dp_can_link_train_fallback_for_edp(intel_dp,
> > -
> > intel_dp_common_rate(intel_dp, index - 1),
> > - lane_count)) {
> > - drm_dbg_kms(&i915->drm,
> > - "Retrying Link training for eDP with same
> > parameters\n");
> > - return 0;
> > - }
> > - intel_dp->link_train.max_rate = intel_dp_common_rate(intel_dp,
> > index - 1);
> > - intel_dp->link_train.max_lane_count = lane_count;
> > - } else if (lane_count > 1) {
> > - if (intel_dp_is_edp(intel_dp) &&
> > - !intel_dp_can_link_train_fallback_for_edp(intel_dp,
> > -
> > intel_dp_max_common_rate(intel_dp),
> > - lane_count >> 1))
> > {
> > - drm_dbg_kms(&i915->drm,
> > - "Retrying Link training for eDP with same
> > parameters\n");
> > - return
✓ Fi.CI.BAT: success for drm/i915: pass dev_priv explicitly to CUR* registers
== Series Details ==
Series: drm/i915: pass dev_priv explicitly to CUR* registers
URL : https://patchwork.freedesktop.org/series/133652/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14766 -> Patchwork_133652v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133652v1/index.html
Participating hosts (44 -> 42)
--
Additional (1): fi-kbl-8809g
Missing(3): fi-glk-j4005 fi-snb-2520m fi-bsw-n3050
Known issues
Here are the changes found in Patchwork_133652v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@gem_huc_copy@huc-copy:
- fi-kbl-8809g: NOTRUN -> [SKIP][1] ([i915#2190])
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133652v1/fi-kbl-8809g/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@basic@lmem0:
- bat-dg2-9: [PASS][2] -> [FAIL][3] ([i915#10378])
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14766/bat-dg2-9/igt@gem_lmem_swapping@ba...@lmem0.html
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133652v1/bat-dg2-9/igt@gem_lmem_swapping@ba...@lmem0.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-kbl-8809g: NOTRUN -> [SKIP][4] ([i915#4613]) +3 other tests skip
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133652v1/fi-kbl-8809g/igt@gem_lmem_swapp...@parallel-random-engines.html
* igt@kms_dsc@dsc-basic:
- fi-kbl-8809g: NOTRUN -> [SKIP][5] +30 other tests skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133652v1/fi-kbl-8809g/igt@kms_...@dsc-basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10378]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10378
[i915#180]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/180
[i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#8585]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8585
Build changes
-
* Linux: CI_DRM_14766 -> Patchwork_133652v1
CI-20190529: 20190529
CI_DRM_14766: 1f9967730881195284c33328238c4c5a9a804aeb @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7854: 8abb25ffe588020cf0b797d60ad1f3f9e7c0764a @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_133652v1: 1f9967730881195284c33328238c4c5a9a804aeb @
git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133652v1/index.html
Re: [PATCH 17/20] drm/i915/dp: Add debugfs entries to set a target link rate/lane count
On Tue, 14 May 2024, Imre Deak wrote:
> Add connector debugfs entries to set a target link rate/lane count to be
> used by a link training afterwards. After setting a target link
> rate/lane count reset the link training parameters and for a non-auto
> target disable reducing the link parameters via the fallback logic. The
> former one can be used after testing link training failure scenarios
> - via debugfs entries added later - to reset the reduced link parameters
> after the test.
>
> Signed-off-by: Imre Deak
> ---
> .../drm/i915/display/intel_display_debugfs.c | 218 ++
Basically I don't want any new debugfs files to intel_display_debugfs.c.
These should probably go to intel_dp_link_training.c, or maybe
intel_dp.c or a new intel_dp_debugfs.c. But I think the first.
BR,
Jani.
> .../drm/i915/display/intel_display_types.h| 2 +
> drivers/gpu/drm/i915/display/intel_dp.c | 63 -
> drivers/gpu/drm/i915/display/intel_dp.h | 2 +
> .../drm/i915/display/intel_dp_link_training.c | 6 +
> 5 files changed, 282 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 35f9f86ef70f4..521721a20358f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1316,6 +1316,215 @@ static const struct file_operations i915_dsc_bpc_fops
> = {
> .write = i915_dsc_bpc_write
> };
>
> +static struct intel_dp *intel_connector_to_intel_dp(struct intel_connector
> *connector)
> +{
> + if (connector->mst_port)
> + return connector->mst_port;
> + else
> + return enc_to_intel_dp(intel_attached_encoder(connector));
> +}
> +
> +static int i915_dp_requested_link_rate_show(struct seq_file *m, void *data)
> +{
> + struct intel_connector *connector = to_intel_connector(m->private);
> + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + struct intel_dp *intel_dp;
> + int ret;
> + int i;
> +
> + ret =
> drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
> + if (ret)
> + return ret;
> +
> + intel_dp = intel_connector_to_intel_dp(connector);
> +
> + seq_printf(m, "%sauto%s",
> +intel_dp->requested_link_rate == 0 ? "[" : "",
> +intel_dp->requested_link_rate == 0 ? "]" : "");
> +
> + for (i = 0; i < intel_dp->num_source_rates; i++)
> + seq_printf(m, " %s%d%s%s",
> +intel_dp->source_rates[i] ==
> intel_dp->requested_link_rate ? "[" : "",
> +intel_dp->source_rates[i],
> +intel_dp->link_trained &&
> + intel_dp->source_rates[i] ==
> intel_dp->link_rate ? "*" : "",
> +intel_dp->source_rates[i] ==
> intel_dp->requested_link_rate ? "]" : "");
> +
> + drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
> +
> + seq_putc(m, '\n');
> +
> + return 0;
> +}
> +
> +static int parse_link_rate(struct intel_dp *intel_dp, const char __user
> *ubuf, size_t len)
> +{
> + char *kbuf;
> + const char *p;
> + int rate;
> + int ret = 0;
> +
> + kbuf = memdup_user_nul(ubuf, len);
> + if (IS_ERR(kbuf))
> + return PTR_ERR(kbuf);
> +
> + p = strim(kbuf);
> +
> + if (!strcmp(p, "auto")) {
> + rate = 0;
> + } else {
> + ret = kstrtoint(p, 0, &rate);
> + if (ret < 0)
> + goto out_free;
> +
> + if (intel_dp_rate_index(intel_dp->source_rates,
> + intel_dp->num_source_rates,
> + rate) < 0)
> + ret = -EINVAL;
> + }
> +
> +out_free:
> + kfree(kbuf);
> +
> + return ret < 0 ? ret : rate;
> +}
> +
> +static ssize_t i915_dp_requested_link_rate_write(struct file *file,
> + const char __user *ubuf,
> + size_t len, loff_t *offp)
> +{
> + struct seq_file *m = file->private_data;
> + struct intel_connector *connector = to_intel_connector(m->private);
> + struct drm_i915_private *i915 = to_i915(connector->base.dev);
> + struct intel_dp *intel_dp = intel_connector_to_intel_dp(connector);
> + int rate;
> + int ret;
> +
> + ret =
> drm_modeset_lock_single_interruptible(&i915->drm.mode_config.connection_mutex);
> + if (ret)
> + return ret;
> +
> + intel_dp = intel_connector_to_intel_dp(connector);
> +
> + rate = parse_link_rate(intel_dp, ubuf, len);
> + if (rate < 0) {
> + drm_modeset_unlock(&i915->drm.mode_config.connection_mutex);
> +
> + return rate;
> + }
> +
> + intel_dp_reset_link_train_params(intel_dp);
> + intel_dp->requested_link_rat
Re: [PATCH 04/20] drm/i915/dp: Sanitize intel_dp_get_link_train_fallback_values()
On Tue, 14 May 2024, Imre Deak wrote:
> Reduce the indentation in intel_dp_get_link_train_fallback_values() by
> adding separate helpers to reduce the link rate and lane count. Also
> simplify things by passing crtc_state to the function.
>
> This also prepares for later patches in the patchset adding a limitation
> on how the link params are reduced.
Currently we have these rigid reductions of rate, lane and bpp. I don't
think we want to lock in to this policy, but rather make it more
flexible. So I think this patch is counter productive.
My grand plan I never got around to was to create a list/array of
possible sets of link parameters that you could trivially sort, filter,
iterate, and remove parameters from. (And I don't mean a statically
written one, but a dynamically generated list.)
In that scheme, you'd get the fallback values by advancing one element
in the data structure. And you know when you've exhausted all fallbacks
when you're at the end. None of this complicated "if we've finished x,
then try y, then z".
And then you could sort the list based on bandwidth, and go from
uncompressed uhbr to compressed non-uhbr to whatever.
BR,
Jani.
>
> Signed-off-by: Imre Deak
> ---
> .../drm/i915/display/intel_dp_link_training.c | 82 ---
> 1 file changed, 51 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> index 1b4694b46cea7..1ea4aaf9592f1 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
> @@ -1109,11 +1109,37 @@ static bool
> intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp,
> return true;
> }
>
> +static int reduce_link_rate(struct intel_dp *intel_dp, int current_rate)
> +{
> + int rate_index;
> + int new_rate;
> +
> + rate_index = intel_dp_rate_index(intel_dp->common_rates,
> + intel_dp->num_common_rates,
> + current_rate);
> +
> + if (rate_index <= 0)
> + return -1;
> +
> + new_rate = intel_dp_common_rate(intel_dp, rate_index - 1);
> +
> + return new_rate;
> +}
> +
> +static int reduce_lane_count(struct intel_dp *intel_dp, int
> current_lane_count)
> +{
> + if (current_lane_count > 1)
> + return current_lane_count >> 1;
> +
> + return -1;
> +}
> +
> static int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
> -int link_rate, u8 lane_count)
> +const struct
> intel_crtc_state *crtc_state)
> {
> struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> - int index;
> + int new_link_rate;
> + int new_lane_count;
>
> /*
>* TODO: Enable fallback on MST links once MST link compute can handle
> @@ -1131,36 +1157,32 @@ static int
> intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
> return 0;
> }
>
> - index = intel_dp_rate_index(intel_dp->common_rates,
> - intel_dp->num_common_rates,
> - link_rate);
> - if (index > 0) {
> - if (intel_dp_is_edp(intel_dp) &&
> - !intel_dp_can_link_train_fallback_for_edp(intel_dp,
> -
> intel_dp_common_rate(intel_dp, index - 1),
> - lane_count)) {
> - drm_dbg_kms(&i915->drm,
> - "Retrying Link training for eDP with same
> parameters\n");
> - return 0;
> - }
> - intel_dp->link_train.max_rate = intel_dp_common_rate(intel_dp,
> index - 1);
> - intel_dp->link_train.max_lane_count = lane_count;
> - } else if (lane_count > 1) {
> - if (intel_dp_is_edp(intel_dp) &&
> - !intel_dp_can_link_train_fallback_for_edp(intel_dp,
> -
> intel_dp_max_common_rate(intel_dp),
> - lane_count >> 1))
> {
> - drm_dbg_kms(&i915->drm,
> - "Retrying Link training for eDP with same
> parameters\n");
> - return 0;
> - }
> - intel_dp->link_train.max_rate =
> intel_dp_max_common_rate(intel_dp);
> - intel_dp->link_train.max_lane_count = lane_count >> 1;
> - } else {
> + new_lane_count = crtc_state->lane_count;
> + new_link_rate = reduce_link_rate(intel_dp, crtc_state->port_clock);
> + if (new_link_rate < 0) {
> + new_lane_count = reduce_lane_count(intel_dp,
> crtc_state->lane_count);
> + new_link_rate = intel_dp_max_common_rate(intel_d
Re: [PATCH 02/20] drm/i915/dp: Move link train params to a substruct in intel_dp
On Tue, 14 May 2024, Imre Deak wrote:
> For clarity move the link training parameters updated during link
> training based on the pass/fail LT result under a substruct in intel_dp.
> This prepares for later patches in this patchset adding similar params
> here. Rename intel_dp_reset_max_link_params() to
> intel_dp_reset_link_train_params() to better reflect what state gets
> reset.
High level bikeshedding, why "link_train" instead of just "link"?
You could have three groups: source, sink and link.
BR,
Jani.
>
> Signed-off-by: Imre Deak
> ---
> .../drm/i915/display/intel_display_types.h| 12
> drivers/gpu/drm/i915/display/intel_dp.c | 30 +--
> 2 files changed, 22 insertions(+), 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index fec3de25ea54e..7edb533758416 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1738,7 +1738,6 @@ struct intel_dp {
> u8 lane_count;
> u8 sink_count;
> bool link_trained;
> - bool reset_link_params;
> bool use_max_params;
> u8 dpcd[DP_RECEIVER_CAP_SIZE];
> u8 psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
> @@ -1759,10 +1758,13 @@ struct intel_dp {
> /* intersection of source and sink rates */
> int num_common_rates;
> int common_rates[DP_MAX_SUPPORTED_RATES];
> - /* Max lane count for the current link */
> - int max_link_lane_count;
> - /* Max rate for the current link */
> - int max_link_rate;
> + struct {
> + /* Max lane count for the current link */
> + int max_lane_count;
> + /* Max rate for the current link */
> + int max_rate;
> + } link_train;
> + bool reset_link_params;
> int mso_link_count;
> int mso_pixel_overlap;
> /* sink or branch descriptor */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 6b8a94d0ca999..ffa627c63e048 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -372,13 +372,13 @@ int intel_dp_max_common_lane_count(struct intel_dp
> *intel_dp)
>
> int intel_dp_max_lane_count(struct intel_dp *intel_dp)
> {
> - switch (intel_dp->max_link_lane_count) {
> + switch (intel_dp->link_train.max_lane_count) {
> case 1:
> case 2:
> case 4:
> - return intel_dp->max_link_lane_count;
> + return intel_dp->link_train.max_lane_count;
> default:
> - MISSING_CASE(intel_dp->max_link_lane_count);
> + MISSING_CASE(intel_dp->link_train.max_lane_count);
> return 1;
> }
> }
> @@ -644,7 +644,7 @@ static bool intel_dp_link_params_valid(struct intel_dp
> *intel_dp, int link_rate,
>* boot-up.
>*/
> if (link_rate == 0 ||
> - link_rate > intel_dp->max_link_rate)
> + link_rate > intel_dp->link_train.max_rate)
> return false;
>
> if (lane_count == 0 ||
> @@ -705,8 +705,8 @@ int intel_dp_get_link_train_fallback_values(struct
> intel_dp *intel_dp,
> "Retrying Link training for eDP with same
> parameters\n");
> return 0;
> }
> - intel_dp->max_link_rate = intel_dp_common_rate(intel_dp, index
> - 1);
> - intel_dp->max_link_lane_count = lane_count;
> + intel_dp->link_train.max_rate = intel_dp_common_rate(intel_dp,
> index - 1);
> + intel_dp->link_train.max_lane_count = lane_count;
> } else if (lane_count > 1) {
> if (intel_dp_is_edp(intel_dp) &&
> !intel_dp_can_link_train_fallback_for_edp(intel_dp,
> @@ -716,8 +716,8 @@ int intel_dp_get_link_train_fallback_values(struct
> intel_dp *intel_dp,
> "Retrying Link training for eDP with same
> parameters\n");
> return 0;
> }
> - intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp);
> - intel_dp->max_link_lane_count = lane_count >> 1;
> + intel_dp->link_train.max_rate =
> intel_dp_max_common_rate(intel_dp);
> + intel_dp->link_train.max_lane_count = lane_count >> 1;
> } else {
> drm_err(&i915->drm, "Link Training Unsuccessful\n");
> return -1;
> @@ -1382,7 +1382,7 @@ intel_dp_max_link_rate(struct intel_dp *intel_dp)
> {
> int len;
>
> - len = intel_dp_common_len_rate_limit(intel_dp, intel_dp->max_link_rate);
> + len = intel_dp_common_len_rate_limit(intel_dp,
> intel_dp->link_train.max_rate);
>
> return intel_dp_common_rate(intel_dp, len - 1);
> }
> @@ -3017,10 +3017,10 @@ void intel_dp_set_link_params(struct intel_dp
> *intel_dp,
> intel_dp->lane_count = lane_count;
> }
>
Re: Regression on linux-next (next-20240506)
Hi
Am 15.05.24 um 13:38 schrieb Borah, Chaitanya Kumar:
[...]
Sorry, I didn't notice the report before. The commit is not related to ACPI.
There's now asm/video.h and acpi/video.h. Maybe there's a conflict among
included files.
Do you have a kernel config to build with?
~Sorry my email client messed up my previous reply. So sending again~
I could not find a public link for the linux-next config we use but this should
be close enough.
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/kconfig.txt
Builds without problems.
But I think there's a name collision between the video module in
drivers/acpi and the new video module in arch/*/video. The attached
patch renames the ACPI module. Could you please try it and report back
the results?
Best regards
Thomas
Regards
Chaitanya
Best regards
Thomas
Thank you.
Regards
Chaitanya
[1] https://intel-gfx-ci.01.org/tree/linux-next/combined-alt.html?
[2] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-
next.git/commit/?h=next-20240506
[3]
https://intel-gfx-ci.01.org/tree/linux-next/next-20240506/bat-mtlp-
9/igt@i915_selftest@live@gt_contexts.html
[4] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-
next.git/commit/?h=next-
20240506&id=2fd001cd36005846caa6456fff1008c6f5bae9d4
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstrasse 146, 90461 Nuernberg, Germany
GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman HRB
36809 (AG Nuernberg)
--
--
Thomas Zimmermann
Graphics Driver Developer
SUSE Software Solutions Germany GmbH
Frankenstrasse 146, 90461 Nuernberg, Germany
GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman
HRB 36809 (AG Nuernberg)
From c42f1e44fdc13358b220f27be0c3176e275eb188 Mon Sep 17 00:00:00 2001
From: Thomas Zimmermann
Date: Wed, 15 May 2024 14:31:53 +0200
Subject: [PATCH] acpi/video: Fix name collision with architecture video module
Signed-off-by: Thomas Zimmermann
---
drivers/acpi/Makefile| 5 +++--
drivers/acpi/{acpi_video.c => acpi_video_core.c} | 2 +-
2 files changed, 4 insertions(+), 3 deletions(-)
rename drivers/acpi/{acpi_video.c => acpi_video_core.c} (99%)
diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile
index 39ea5cfa83269..b2c2471ee935e 100644
--- a/drivers/acpi/Makefile
+++ b/drivers/acpi/Makefile
@@ -78,7 +78,9 @@ obj-$(CONFIG_ACPI_FAN) += fan.o
fan-objs := fan_core.o
fan-objs += fan_attr.o
-obj-$(CONFIG_ACPI_VIDEO) += video.o
+obj-$(CONFIG_ACPI_VIDEO) += acpi_video.o
+acpi_video-objs += acpi_video_core.o video_detect.o
+
obj-$(CONFIG_ACPI_TAD) += acpi_tad.o
obj-$(CONFIG_ACPI_PCI_SLOT) += pci_slot.o
obj-$(CONFIG_ACPI_PROCESSOR) += processor.o
@@ -119,7 +121,6 @@ obj-$(CONFIG_ACPI_CONFIGFS) += acpi_configfs.o
obj-y+= pmic/
-video-objs += acpi_video.o video_detect.o
obj-y+= dptf/
obj-$(CONFIG_ARM64) += arm64/
diff --git a/drivers/acpi/acpi_video.c b/drivers/acpi/acpi_video_core.c
similarity index 99%
rename from drivers/acpi/acpi_video.c
rename to drivers/acpi/acpi_video_core.c
index 1fda303882973..32bf81c5773a4 100644
--- a/drivers/acpi/acpi_video.c
+++ b/drivers/acpi/acpi_video_core.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
- * video.c - ACPI Video Driver
+ * acpi_video_core.c - ACPI Video Driver
*
* Copyright (C) 2004 Luming Yu
* Copyright (C) 2004 Bruno Ducrot
--
2.45.0
Re: [PATCH 0/8] drm/i915: pass dev_priv explicitly to CUR* registers
On Wed, May 15, 2024 at 02:56:40PM +0300, Jani Nikula wrote: > Update all the register macros in the intel_cursor_regs.h file. > > Jani Nikula (8): > drm/i915: pass dev_priv explicitly to CURCNTR > drm/i915: pass dev_priv explicitly to CURBASE > drm/i915: pass dev_priv explicitly to CURPOS > drm/i915: pass dev_priv explicitly to CURPOS_ERLY_TPT > drm/i915: pass dev_priv explicitly to CURSIZE > drm/i915: pass dev_priv explicitly to CUR_FBC_CTL > drm/i915: pass dev_priv explicitly to CUR_CHICKEN > drm/i915: pass dev_priv explicitly to CURSURFLIVE Series is Reviewed-by: Ville Syrjälä > > drivers/gpu/drm/i915/display/intel_cursor.c | 33 ++- > .../gpu/drm/i915/display/intel_cursor_regs.h | 16 - > drivers/gpu/drm/i915/display/intel_display.c | 4 +-- > drivers/gpu/drm/i915/display/intel_psr.c | 13 +--- > drivers/gpu/drm/i915/gvt/display.c| 8 ++--- > drivers/gpu/drm/i915/gvt/fb_decoder.c | 6 ++-- > drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 24 +++--- > 7 files changed, 56 insertions(+), 48 deletions(-) > > -- > 2.39.2 -- Ville Syrjälä Intel
[PATCH 8/8] drm/i915: pass dev_priv explicitly to CURSURFLIVE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURSURFLIVE register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cursor_regs.h | 2 +-
drivers/gpu/drm/i915/display/intel_psr.c | 13 +
2 files changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
index 3e948526e9ab..c2190af1e9f5 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
@@ -73,7 +73,7 @@
#define CURSIZE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)
#define CUR_FBC_CTL(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe,
_CUR_FBC_CTL_A)
#define CUR_CHICKEN(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe,
_CUR_CHICKEN_A)
-#define CURSURFLIVE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASURFLIVE)
+#define CURSURFLIVE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe,
_CURASURFLIVE)
/* skl+ */
#define _CUR_WM_A_00x70140
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 98dfd537070c..df0d14a5023f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2352,7 +2352,7 @@ static void psr_force_hw_tracking_exit(struct intel_dp
*intel_dp)
* but testing proved that it works for up display 13, for newer
* than that testing will be needed.
*/
- intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0);
+ intel_de_write(dev_priv, CURSURFLIVE(dev_priv, intel_dp->psr.pipe), 0);
}
void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state
*crtc_state)
@@ -3100,7 +3100,9 @@ static void _psr_invalidate_handle(struct intel_dp
*intel_dp)
if (intel_dp->psr.psr2_sel_fetch_cff_enabled) {
/* Send one update otherwise lag is observed in screen
*/
- intel_de_write(dev_priv,
CURSURFLIVE(intel_dp->psr.pipe), 0);
+ intel_de_write(dev_priv,
+ CURSURFLIVE(dev_priv,
intel_dp->psr.pipe),
+ 0);
return;
}
@@ -3110,7 +3112,8 @@ static void _psr_invalidate_handle(struct intel_dp
*intel_dp)
intel_de_write(dev_priv,
PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder),
val);
- intel_de_write(dev_priv, CURSURFLIVE(intel_dp->psr.pipe), 0);
+ intel_de_write(dev_priv,
+ CURSURFLIVE(dev_priv, intel_dp->psr.pipe), 0);
intel_dp->psr.psr2_sel_fetch_cff_enabled = true;
} else {
intel_psr_exit(intel_dp);
@@ -3210,7 +3213,9 @@ static void _psr_flush_handle(struct intel_dp *intel_dp)
intel_de_write(dev_priv,
PSR2_MAN_TRK_CTL(dev_priv,
cpu_transcoder),
val);
- intel_de_write(dev_priv,
CURSURFLIVE(intel_dp->psr.pipe), 0);
+ intel_de_write(dev_priv,
+ CURSURFLIVE(dev_priv,
intel_dp->psr.pipe),
+ 0);
intel_dp->psr.psr2_sel_fetch_cff_enabled =
false;
}
} else {
--
2.39.2
[PATCH 7/8] drm/i915: pass dev_priv explicitly to CUR_CHICKEN
Avoid the implicit dev_priv local variable use, and pass dev_priv explicitly to the CUR_CHICKEN register macro. Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/display/intel_cursor_regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h b/drivers/gpu/drm/i915/display/intel_cursor_regs.h index 40b01205e247..3e948526e9ab 100644 --- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h +++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h @@ -72,7 +72,7 @@ #define CURPOS_ERLY_TPT(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT) #define CURSIZE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE) #define CUR_FBC_CTL(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A) -#define CUR_CHICKEN(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_CHICKEN_A) +#define CUR_CHICKEN(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_CHICKEN_A) #define CURSURFLIVE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASURFLIVE) /* skl+ */ -- 2.39.2
[PATCH 6/8] drm/i915: pass dev_priv explicitly to CUR_FBC_CTL
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CUR_FBC_CTL register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cursor.c | 3 ++-
drivers/gpu/drm/i915/display/intel_cursor_regs.h | 2 +-
drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 6 +++---
3 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index 8553f6164760..c780ce146131 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -646,7 +646,8 @@ static void i9xx_cursor_update_arm(struct intel_plane
*plane,
plane->cursor.size != fbc_ctl ||
plane->cursor.cntl != cntl) {
if (HAS_CUR_FBC(dev_priv))
- intel_de_write_fw(dev_priv, CUR_FBC_CTL(pipe),
+ intel_de_write_fw(dev_priv,
+ CUR_FBC_CTL(dev_priv, pipe),
fbc_ctl);
intel_de_write_fw(dev_priv, CURCNTR(dev_priv, pipe), cntl);
intel_de_write_fw(dev_priv, CURPOS(dev_priv, pipe), pos);
diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
index 7c3a76f5151d..40b01205e247 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
@@ -71,7 +71,7 @@
#define CURPOS(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
#define CURPOS_ERLY_TPT(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe,
_CURAPOS_ERLY_TPT)
#define CURSIZE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)
-#define CUR_FBC_CTL(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A)
+#define CUR_FBC_CTL(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe,
_CUR_FBC_CTL_A)
#define CUR_CHICKEN(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_CHICKEN_A)
#define CURSURFLIVE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASURFLIVE)
diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
index 5ea1fbc2e981..b485976976db 100644
--- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
+++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
@@ -154,9 +154,9 @@ static int iterate_generic_mmio(struct
intel_gvt_mmio_table_iter *iter)
MMIO_D(CURBASE(dev_priv, PIPE_A));
MMIO_D(CURBASE(dev_priv, PIPE_B));
MMIO_D(CURBASE(dev_priv, PIPE_C));
- MMIO_D(CUR_FBC_CTL(PIPE_A));
- MMIO_D(CUR_FBC_CTL(PIPE_B));
- MMIO_D(CUR_FBC_CTL(PIPE_C));
+ MMIO_D(CUR_FBC_CTL(dev_priv, PIPE_A));
+ MMIO_D(CUR_FBC_CTL(dev_priv, PIPE_B));
+ MMIO_D(CUR_FBC_CTL(dev_priv, PIPE_C));
MMIO_D(_MMIO(0x700ac));
MMIO_D(_MMIO(0x710ac));
MMIO_D(_MMIO(0x720ac));
--
2.39.2
[PATCH 5/8] drm/i915: pass dev_priv explicitly to CURSIZE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURSIZE register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cursor.c | 2 +-
drivers/gpu/drm/i915/display/intel_cursor_regs.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index f8baf25c4a4f..8553f6164760 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -297,7 +297,7 @@ static void i845_cursor_update_arm(struct intel_plane
*plane,
plane->cursor.cntl != cntl) {
intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);
intel_de_write_fw(dev_priv, CURBASE(dev_priv, PIPE_A), base);
- intel_de_write_fw(dev_priv, CURSIZE(PIPE_A), size);
+ intel_de_write_fw(dev_priv, CURSIZE(dev_priv, PIPE_A), size);
intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);
diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
index 0d1ee13ec066..7c3a76f5151d 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
@@ -70,7 +70,7 @@
#define CURBASE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)
#define CURPOS(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
#define CURPOS_ERLY_TPT(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe,
_CURAPOS_ERLY_TPT)
-#define CURSIZE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)
+#define CURSIZE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)
#define CUR_FBC_CTL(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A)
#define CUR_CHICKEN(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_CHICKEN_A)
#define CURSURFLIVE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASURFLIVE)
--
2.39.2
[PATCH 4/8] drm/i915: pass dev_priv explicitly to CURPOS_ERLY_TPT
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURPOS_ERLY_TPT register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cursor.c | 4 +++-
drivers/gpu/drm/i915/display/intel_cursor_regs.h | 2 +-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index 17039d37dc91..f8baf25c4a4f 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -543,7 +543,9 @@ static void i9xx_cursor_update_sel_fetch_arm(struct
intel_plane *plane,
if (crtc_state->enable_psr2_su_region_et) {
u32 val = intel_cursor_position(crtc_state, plane_state,
true);
- intel_de_write_fw(dev_priv, CURPOS_ERLY_TPT(pipe), val);
+ intel_de_write_fw(dev_priv,
+ CURPOS_ERLY_TPT(dev_priv, pipe),
+ val);
}
intel_de_write_fw(dev_priv, PLANE_SEL_FETCH_CTL(pipe,
plane->id),
diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
index d0fa251ae8c4..0d1ee13ec066 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
@@ -69,7 +69,7 @@
#define CURCNTR(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)
#define CURBASE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)
#define CURPOS(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
-#define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT)
+#define CURPOS_ERLY_TPT(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe,
_CURAPOS_ERLY_TPT)
#define CURSIZE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)
#define CUR_FBC_CTL(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A)
#define CUR_CHICKEN(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_CHICKEN_A)
--
2.39.2
[PATCH 3/8] drm/i915: pass dev_priv explicitly to CURPOS
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURPOS register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cursor.c | 8
drivers/gpu/drm/i915/display/intel_cursor_regs.h | 2 +-
drivers/gpu/drm/i915/gvt/fb_decoder.c| 2 +-
drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 6 +++---
4 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index 573bbdec3e3d..17039d37dc91 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -298,14 +298,14 @@ static void i845_cursor_update_arm(struct intel_plane
*plane,
intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);
intel_de_write_fw(dev_priv, CURBASE(dev_priv, PIPE_A), base);
intel_de_write_fw(dev_priv, CURSIZE(PIPE_A), size);
- intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
+ intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);
plane->cursor.base = base;
plane->cursor.size = size;
plane->cursor.cntl = cntl;
} else {
- intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
+ intel_de_write_fw(dev_priv, CURPOS(dev_priv, PIPE_A), pos);
}
}
@@ -647,14 +647,14 @@ static void i9xx_cursor_update_arm(struct intel_plane
*plane,
intel_de_write_fw(dev_priv, CUR_FBC_CTL(pipe),
fbc_ctl);
intel_de_write_fw(dev_priv, CURCNTR(dev_priv, pipe), cntl);
- intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
+ intel_de_write_fw(dev_priv, CURPOS(dev_priv, pipe), pos);
intel_de_write_fw(dev_priv, CURBASE(dev_priv, pipe), base);
plane->cursor.base = base;
plane->cursor.size = fbc_ctl;
plane->cursor.cntl = cntl;
} else {
- intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
+ intel_de_write_fw(dev_priv, CURPOS(dev_priv, pipe), pos);
intel_de_write_fw(dev_priv, CURBASE(dev_priv, pipe), base);
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
index 4a7e27f0c3c1..d0fa251ae8c4 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
@@ -68,7 +68,7 @@
#define CURCNTR(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)
#define CURBASE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)
-#define CURPOS(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
+#define CURPOS(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
#define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT)
#define CURSIZE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)
#define CUR_FBC_CTL(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CUR_FBC_CTL_A)
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c
b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index 60f368affb6c..e78de423a6c7 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -384,7 +384,7 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
return -EINVAL;
}
- val = vgpu_vreg_t(vgpu, CURPOS(pipe));
+ val = vgpu_vreg_t(vgpu, CURPOS(dev_priv, pipe));
plane->x_pos = (val & _CURSOR_POS_X_MASK) >> _CURSOR_POS_X_SHIFT;
plane->x_sign = (val & _CURSOR_SIGN_X_MASK) >> _CURSOR_SIGN_X_SHIFT;
plane->y_pos = (val & _CURSOR_POS_Y_MASK) >> _CURSOR_POS_Y_SHIFT;
diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
index f562172995a6..5ea1fbc2e981 100644
--- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
+++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
@@ -148,9 +148,9 @@ static int iterate_generic_mmio(struct
intel_gvt_mmio_table_iter *iter)
MMIO_D(CURCNTR(dev_priv, PIPE_A));
MMIO_D(CURCNTR(dev_priv, PIPE_B));
MMIO_D(CURCNTR(dev_priv, PIPE_C));
- MMIO_D(CURPOS(PIPE_A));
- MMIO_D(CURPOS(PIPE_B));
- MMIO_D(CURPOS(PIPE_C));
+ MMIO_D(CURPOS(dev_priv, PIPE_A));
+ MMIO_D(CURPOS(dev_priv, PIPE_B));
+ MMIO_D(CURPOS(dev_priv, PIPE_C));
MMIO_D(CURBASE(dev_priv, PIPE_A));
MMIO_D(CURBASE(dev_priv, PIPE_B));
MMIO_D(CURBASE(dev_priv, PIPE_C));
--
2.39.2
[PATCH 2/8] drm/i915: pass dev_priv explicitly to CURBASE
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURBASE register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cursor.c | 6 +++---
drivers/gpu/drm/i915/display/intel_cursor_regs.h | 2 +-
drivers/gpu/drm/i915/gvt/fb_decoder.c| 2 +-
drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 6 +++---
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index 31cb614b6ba8..573bbdec3e3d 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -296,7 +296,7 @@ static void i845_cursor_update_arm(struct intel_plane
*plane,
plane->cursor.size != size ||
plane->cursor.cntl != cntl) {
intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);
- intel_de_write_fw(dev_priv, CURBASE(PIPE_A), base);
+ intel_de_write_fw(dev_priv, CURBASE(dev_priv, PIPE_A), base);
intel_de_write_fw(dev_priv, CURSIZE(PIPE_A), size);
intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);
@@ -648,14 +648,14 @@ static void i9xx_cursor_update_arm(struct intel_plane
*plane,
fbc_ctl);
intel_de_write_fw(dev_priv, CURCNTR(dev_priv, pipe), cntl);
intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
- intel_de_write_fw(dev_priv, CURBASE(pipe), base);
+ intel_de_write_fw(dev_priv, CURBASE(dev_priv, pipe), base);
plane->cursor.base = base;
plane->cursor.size = fbc_ctl;
plane->cursor.cntl = cntl;
} else {
intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
- intel_de_write_fw(dev_priv, CURBASE(pipe), base);
+ intel_de_write_fw(dev_priv, CURBASE(dev_priv, pipe), base);
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
index 5f522a4ecc2e..4a7e27f0c3c1 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
@@ -67,7 +67,7 @@
#define _CURBPOS_IVB 0x71088
#define CURCNTR(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)
-#define CURBASE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)
+#define CURBASE(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)
#define CURPOS(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
#define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT)
#define CURSIZE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURASIZE)
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.c
b/drivers/gpu/drm/i915/gvt/fb_decoder.c
index 6e226ea1afa2..60f368affb6c 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.c
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.c
@@ -373,7 +373,7 @@ int intel_vgpu_decode_cursor_plane(struct intel_vgpu *vgpu,
gvt_dbg_core("alpha_plane=0x%x, alpha_force=0x%x\n",
alpha_plane, alpha_force);
- plane->base = vgpu_vreg_t(vgpu, CURBASE(pipe)) & I915_GTT_PAGE_MASK;
+ plane->base = vgpu_vreg_t(vgpu, CURBASE(dev_priv, pipe)) &
I915_GTT_PAGE_MASK;
if (!vgpu_gmadr_is_valid(vgpu, plane->base))
return -EINVAL;
diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
index 18deaf416b7e..f562172995a6 100644
--- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
+++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
@@ -151,9 +151,9 @@ static int iterate_generic_mmio(struct
intel_gvt_mmio_table_iter *iter)
MMIO_D(CURPOS(PIPE_A));
MMIO_D(CURPOS(PIPE_B));
MMIO_D(CURPOS(PIPE_C));
- MMIO_D(CURBASE(PIPE_A));
- MMIO_D(CURBASE(PIPE_B));
- MMIO_D(CURBASE(PIPE_C));
+ MMIO_D(CURBASE(dev_priv, PIPE_A));
+ MMIO_D(CURBASE(dev_priv, PIPE_B));
+ MMIO_D(CURBASE(dev_priv, PIPE_C));
MMIO_D(CUR_FBC_CTL(PIPE_A));
MMIO_D(CUR_FBC_CTL(PIPE_B));
MMIO_D(CUR_FBC_CTL(PIPE_C));
--
2.39.2
[PATCH 1/8] drm/i915: pass dev_priv explicitly to CURCNTR
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the CURCNTR register macro.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_cursor.c | 10 +-
drivers/gpu/drm/i915/display/intel_cursor_regs.h | 2 +-
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/gvt/display.c | 8
drivers/gpu/drm/i915/gvt/fb_decoder.c| 2 +-
drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 6 +++---
6 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
b/drivers/gpu/drm/i915/display/intel_cursor.c
index 3ecab15d1431..31cb614b6ba8 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -295,11 +295,11 @@ static void i845_cursor_update_arm(struct intel_plane
*plane,
if (plane->cursor.base != base ||
plane->cursor.size != size ||
plane->cursor.cntl != cntl) {
- intel_de_write_fw(dev_priv, CURCNTR(PIPE_A), 0);
+ intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), 0);
intel_de_write_fw(dev_priv, CURBASE(PIPE_A), base);
intel_de_write_fw(dev_priv, CURSIZE(PIPE_A), size);
intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
- intel_de_write_fw(dev_priv, CURCNTR(PIPE_A), cntl);
+ intel_de_write_fw(dev_priv, CURCNTR(dev_priv, PIPE_A), cntl);
plane->cursor.base = base;
plane->cursor.size = size;
@@ -328,7 +328,7 @@ static bool i845_cursor_get_hw_state(struct intel_plane
*plane,
if (!wakeref)
return false;
- ret = intel_de_read(dev_priv, CURCNTR(PIPE_A)) & CURSOR_ENABLE;
+ ret = intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_A)) &
CURSOR_ENABLE;
*pipe = PIPE_A;
@@ -646,7 +646,7 @@ static void i9xx_cursor_update_arm(struct intel_plane
*plane,
if (HAS_CUR_FBC(dev_priv))
intel_de_write_fw(dev_priv, CUR_FBC_CTL(pipe),
fbc_ctl);
- intel_de_write_fw(dev_priv, CURCNTR(pipe), cntl);
+ intel_de_write_fw(dev_priv, CURCNTR(dev_priv, pipe), cntl);
intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
intel_de_write_fw(dev_priv, CURBASE(pipe), base);
@@ -684,7 +684,7 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane
*plane,
if (!wakeref)
return false;
- val = intel_de_read(dev_priv, CURCNTR(plane->pipe));
+ val = intel_de_read(dev_priv, CURCNTR(dev_priv, plane->pipe));
ret = val & MCURSOR_MODE_MASK;
diff --git a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
index a478ef5787c5..5f522a4ecc2e 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor_regs.h
+++ b/drivers/gpu/drm/i915/display/intel_cursor_regs.h
@@ -66,7 +66,7 @@
#define _CURBBASE_IVB 0x71084
#define _CURBPOS_IVB 0x71088
-#define CURCNTR(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)
+#define CURCNTR(dev_priv, pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURACNTR)
#define CURBASE(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURABASE)
#define CURPOS(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS)
#define CURPOS_ERLY_TPT(pipe) _MMIO_CURSOR2(dev_priv, pipe, _CURAPOS_ERLY_TPT)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index e29073b90860..cce1420fb541 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8238,9 +8238,9 @@ void i830_disable_pipe(struct drm_i915_private *dev_priv,
enum pipe pipe)
drm_WARN_ON(&dev_priv->drm,
intel_de_read(dev_priv, DSPCNTR(PLANE_C)) & DISP_ENABLE);
drm_WARN_ON(&dev_priv->drm,
- intel_de_read(dev_priv, CURCNTR(PIPE_A)) &
MCURSOR_MODE_MASK);
+ intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_A)) &
MCURSOR_MODE_MASK);
drm_WARN_ON(&dev_priv->drm,
- intel_de_read(dev_priv, CURCNTR(PIPE_B)) &
MCURSOR_MODE_MASK);
+ intel_de_read(dev_priv, CURCNTR(dev_priv, PIPE_B)) &
MCURSOR_MODE_MASK);
intel_de_write(dev_priv, TRANSCONF(pipe), 0);
intel_de_posting_read(dev_priv, TRANSCONF(pipe));
diff --git a/drivers/gpu/drm/i915/gvt/display.c
b/drivers/gpu/drm/i915/gvt/display.c
index 527e0bb2b15e..73ea8be0f80b 100644
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -194,8 +194,8 @@ static void emulate_monitor_status_change(struct intel_vgpu
*vgpu)
~(TRANSCONF_ENABLE | TRANSCONF_STATE_ENABLE);
vgpu_vreg_t(vgpu, DSPCNTR(pipe)) &= ~DISP_ENABLE;
vgpu_vreg_t(vgpu, SPRCTL(pipe)) &= ~SPRITE_ENABLE;
-
[PATCH 0/8] drm/i915: pass dev_priv explicitly to CUR* registers
Update all the register macros in the intel_cursor_regs.h file. Jani Nikula (8): drm/i915: pass dev_priv explicitly to CURCNTR drm/i915: pass dev_priv explicitly to CURBASE drm/i915: pass dev_priv explicitly to CURPOS drm/i915: pass dev_priv explicitly to CURPOS_ERLY_TPT drm/i915: pass dev_priv explicitly to CURSIZE drm/i915: pass dev_priv explicitly to CUR_FBC_CTL drm/i915: pass dev_priv explicitly to CUR_CHICKEN drm/i915: pass dev_priv explicitly to CURSURFLIVE drivers/gpu/drm/i915/display/intel_cursor.c | 33 ++- .../gpu/drm/i915/display/intel_cursor_regs.h | 16 - drivers/gpu/drm/i915/display/intel_display.c | 4 +-- drivers/gpu/drm/i915/display/intel_psr.c | 13 +--- drivers/gpu/drm/i915/gvt/display.c| 8 ++--- drivers/gpu/drm/i915/gvt/fb_decoder.c | 6 ++-- drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 24 +++--- 7 files changed, 56 insertions(+), 48 deletions(-) -- 2.39.2
RE: Regression on linux-next (next-20240506)
Hello > -Original Message- > From: Thomas Zimmermann > Sent: Wednesday, May 15, 2024 2:25 PM > To: Borah, Chaitanya Kumar > Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar > ; Saarinen, Jani ; > Nikula, Jani > Subject: Re: Regression on linux-next (next-20240506) > > Hi > > Am 15.05.24 um 10:16 schrieb Borah, Chaitanya Kumar: > > > >> -Original Message- > >> From: Borah, Chaitanya Kumar > >> Sent: Wednesday, May 8, 2024 3:05 PM > >> To: tzimmerm...@suse.de > >> Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar > >> ; Saarinen, Jani > >> > >> Subject: Regression on linux-next (next-20240506) > >> > >> Hello Thomas, > >> > >> Hope you are doing well. > >> > >> This mail is regarding a regression we are seeing in our CI runs[1] > >> on linux- next repository. > >> > >> Since the version next-20240506 [2], we are seeing the following > >> regression > >> > >> ` > >> Starting dynamic subtest: gt_contexts > >> (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol > >> acpi_video_unregister (err -2) > >> (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol > >> acpi_video_register_backlight (err -2) > >> (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol > >> __acpi_video_get_backlight_type (err -2) > >> (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol > >> acpi_video_register (err -2) > >> (i915_selftest:1107) igt_kmod-CRITICAL: Test assertion failure > >> function igt_kselftest_execute, file ../../../usr/src/igt-gpu- > tools/lib/igt_kmod.c:1594: > >> (i915_selftest:1107) igt_kmod-CRITICAL: Failed assertion: err == 0 > >> (i915_selftest:1107) igt_kmod-CRITICAL: kselftest "i915 > >> igt__23__live_gt_contexts=1 live_selftests=-1 disable_display=1 st_filter=" > >> failed: No such file or directory [2] Dynamic subtest gt_contexts failed. > >> ` > >> > >> Details log can be found in [3]. > >> > >> After bisecting the tree, the following patch [4] seems to be the first > >> "bad" > >> commit > >> > >> ` > >> > >> 2fd001cd36005846caa6456fff1008c6f5bae9d4 is the first bad commit > >> commit > >> 2fd001cd36005846caa6456fff1008c6f5bae9d4 > >> Author: Thomas Zimmermann tzimmerm...@suse.de > >> Date: Fri Mar 29 21:32:12 2024 +0100 > >> > >> arch: Rename fbdev header and source files > >> ` > >> > >> > >> We also verified that if we revert the patch the issue is not seen. > >> > >> Could you please check why the patch causes this regression and > >> provide a fix if necessary? > >> > > +Jani N > > > > Gentle Reminder 😊 > > Sorry, I didn't notice the report before. The commit is not related to ACPI. > There's now asm/video.h and acpi/video.h. Maybe there's a conflict among > included files. > > Do you have a kernel config to build with? > ~Sorry my email client messed up my previous reply. So sending again~ I could not find a public link for the linux-next config we use but this should be close enough. https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/kconfig.txt Regards Chaitanya > Best regards > Thomas > > > > >> Thank you. > >> > >> Regards > >> > >> Chaitanya > >> > >> [1] https://intel-gfx-ci.01.org/tree/linux-next/combined-alt.html? > >> [2] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux- > >> next.git/commit/?h=next-20240506 > >> [3] > >> https://intel-gfx-ci.01.org/tree/linux-next/next-20240506/bat-mtlp- > >> 9/igt@i915_selftest@live@gt_contexts.html > >> [4] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux- > >> next.git/commit/?h=next- > >> 20240506&id=2fd001cd36005846caa6456fff1008c6f5bae9d4 > > -- > -- > Thomas Zimmermann > Graphics Driver Developer > SUSE Software Solutions Germany GmbH > Frankenstrasse 146, 90461 Nuernberg, Germany > GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman HRB > 36809 (AG Nuernberg)
Re: Regression on linux-next (next-20240506)
Hi, On 5/15/2024 2:24 PM, Thomas Zimmermann wrote: Hi Am 15.05.24 um 10:16 schrieb Borah, Chaitanya Kumar: -Original Message- From: Borah, Chaitanya Kumar Sent: Wednesday, May 8, 2024 3:05 PM To: tzimmerm...@suse.de Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar ; Saarinen, Jani Subject: Regression on linux-next (next-20240506) Hello Thomas, Hope you are doing well. This mail is regarding a regression we are seeing in our CI runs[1] on linux- next repository. Since the version next-20240506 [2], we are seeing the following regression ` Starting dynamic subtest: gt_contexts (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol acpi_video_unregister (err -2) (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol acpi_video_register_backlight (err -2) (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol __acpi_video_get_backlight_type (err -2) (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol acpi_video_register (err -2) (i915_selftest:1107) igt_kmod-CRITICAL: Test assertion failure function igt_kselftest_execute, file ../../../usr/src/igt-gpu-tools/lib/igt_kmod.c:1594: (i915_selftest:1107) igt_kmod-CRITICAL: Failed assertion: err == 0 (i915_selftest:1107) igt_kmod-CRITICAL: kselftest "i915 igt__23__live_gt_contexts=1 live_selftests=-1 disable_display=1 st_filter=" failed: No such file or directory [2] Dynamic subtest gt_contexts failed. ` Details log can be found in [3]. After bisecting the tree, the following patch [4] seems to be the first "bad" commit ` 2fd001cd36005846caa6456fff1008c6f5bae9d4 is the first bad commit commit 2fd001cd36005846caa6456fff1008c6f5bae9d4 Author: Thomas Zimmermann tzimmerm...@suse.de Date: Fri Mar 29 21:32:12 2024 +0100 arch: Rename fbdev header and source files ` We also verified that if we revert the patch the issue is not seen. Could you please check why the patch causes this regression and provide a fix if necessary? +Jani N Gentle Reminder 😊 Sorry, I didn't notice the report before. The commit is not related to ACPI. There's now asm/video.h and acpi/video.h. Maybe there's a conflict among included files. Do you have a kernel config to build with? I could not find a public link for the linux-next config we use but this should be close enough. https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/kconfig.txt Regards Chaitanya Best regards Thomas Thank you. Regards Chaitanya [1] https://intel-gfx-ci.01.org/tree/linux-next/combined-alt.html? [2] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux- next.git/commit/?h=next-20240506 [3] https://intel-gfx-ci.01.org/tree/linux-next/next-20240506/bat-mtlp- 9/igt@i915_selftest@live@gt_contexts.html [4] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux- next.git/commit/?h=next- 20240506&id=2fd001cd36005846caa6456fff1008c6f5bae9d4
Re: [PATCH 16/16] drm/i915: Handle SKL+ WM/DDB registers next to all other plane registers
On Mon, May 13, 2024 at 11:52:08PM +0300, Jani Nikula wrote:
> On Fri, 10 May 2024, Ville Syrjala wrote:
> > From: Ville Syrjälä
> >
> > Having the plane WM/DDB regitster write functions in skl_watermarks.c
> > is rather annoying when trying to implement DSB based plane updates.
> > Move them into the respective files that handle all other plane
> > register writes. Less places where I need to worry about the DSB
> > vs. MMIO decisions.
> >
> > The downside is that we spread the wm struct details a bit further
> > afield. But if that becomes too annoying we can probably abstract
> > things a bit more with a few extra functions.
> >
> > Signed-off-by: Ville Syrjälä
>
> [snip]
>
> > diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.h
> > b/drivers/gpu/drm/i915/display/skl_universal_plane.h
> > index e92e00c01b29..8eb4521ee851 100644
> > --- a/drivers/gpu/drm/i915/display/skl_universal_plane.h
> > +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.h
> > @@ -12,6 +12,8 @@ struct drm_i915_private;
> > struct intel_crtc;
> > struct intel_initial_plane_config;
> > struct intel_plane_state;
> > +struct skl_ddb_entry;
> > +struct skl_wm_level;
> >
> > enum pipe;
> > enum plane_id;
> > @@ -35,4 +37,7 @@ bool icl_is_nv12_y_plane(struct drm_i915_private
> > *dev_priv,
> > u8 icl_hdr_plane_mask(void);
> > bool icl_is_hdr_plane(struct drm_i915_private *dev_priv, enum plane_id
> > plane_id);
> >
> > +u32 skl_plane_ddb_reg_val(const struct skl_ddb_entry *entry);
> > +u32 skl_plane_wm_reg_val(const struct skl_wm_level *level);
>
> Yeah, I don't much like interfaces that return register values for
> registers that aren't even known... but let's see how this pans out. It
> does what it says on the box.
Yeah, I was mulling over whether to just define the register bits
separately for the cursor registers as well and have its own versions
of these. Might be what I'll end up doing.
I think there are also still some other PSR related plane registers
that are defined in a non-standard way, so those might need similar
treatment as well.
>
> Reviewed-by: Jani Nikula
Thanks. Pushed the lot.
>
> > +
> > #endif
> > diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c
> > b/drivers/gpu/drm/i915/display/skl_watermark.c
> > index 1daceb8ef9de..2064f72da675 100644
> > --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> > +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> > @@ -1396,7 +1396,7 @@ skl_total_relative_data_rate(const struct
> > intel_crtc_state *crtc_state)
> > return data_rate;
> > }
> >
> > -static const struct skl_wm_level *
> > +const struct skl_wm_level *
> > skl_plane_wm_level(const struct skl_pipe_wm *pipe_wm,
> >enum plane_id plane_id,
> >int level)
> > @@ -1409,7 +1409,7 @@ skl_plane_wm_level(const struct skl_pipe_wm *pipe_wm,
> > return &wm->wm[level];
> > }
> >
> > -static const struct skl_wm_level *
> > +const struct skl_wm_level *
> > skl_plane_trans_wm(const struct skl_pipe_wm *pipe_wm,
> >enum plane_id plane_id)
> > {
> > @@ -2365,97 +2365,6 @@ static int skl_build_pipe_wm(struct
> > intel_atomic_state *state,
> > return skl_wm_check_vblank(crtc_state);
> > }
> >
> > -static u32 skl_plane_ddb_reg_val(const struct skl_ddb_entry *entry)
> > -{
> > - if (!entry->end)
> > - return 0;
> > -
> > - return PLANE_BUF_END(entry->end - 1) |
> > - PLANE_BUF_START(entry->start);
> > -}
> > -
> > -static u32 skl_plane_wm_reg_val(const struct skl_wm_level *level)
> > -{
> > - u32 val = 0;
> > -
> > - if (level->enable)
> > - val |= PLANE_WM_EN;
> > - if (level->ignore_lines)
> > - val |= PLANE_WM_IGNORE_LINES;
> > - val |= REG_FIELD_PREP(PLANE_WM_BLOCKS_MASK, level->blocks);
> > - val |= REG_FIELD_PREP(PLANE_WM_LINES_MASK, level->lines);
> > -
> > - return val;
> > -}
> > -
> > -void skl_write_plane_wm(struct intel_plane *plane,
> > - const struct intel_crtc_state *crtc_state)
> > -{
> > - struct drm_i915_private *i915 = to_i915(plane->base.dev);
> > - enum plane_id plane_id = plane->id;
> > - enum pipe pipe = plane->pipe;
> > - const struct skl_pipe_wm *pipe_wm = &crtc_state->wm.skl.optimal;
> > - const struct skl_ddb_entry *ddb =
> > - &crtc_state->wm.skl.plane_ddb[plane_id];
> > - const struct skl_ddb_entry *ddb_y =
> > - &crtc_state->wm.skl.plane_ddb_y[plane_id];
> > - int level;
> > -
> > - for (level = 0; level < i915->display.wm.num_levels; level++)
> > - intel_de_write_fw(i915, PLANE_WM(pipe, plane_id, level),
> > -
> > skl_plane_wm_reg_val(skl_plane_wm_level(pipe_wm, plane_id, level)));
> > -
> > - intel_de_write_fw(i915, PLANE_WM_TRANS(pipe, plane_id),
> > - skl_plane_wm_reg_val(skl_plane_trans_wm(pipe_wm,
> > plane_id)));
> > -
> > - if (HAS_HW_SAGV_WM(i915)) {
> > - const struct skl_plane_wm *wm = &pipe_wm->pl
✓ Fi.CI.BAT: success for Panel Replay Fixes
== Series Details == Series: Panel Replay Fixes URL : https://patchwork.freedesktop.org/series/133648/ State : success == Summary == CI Bug Log - changes from CI_DRM_14765 -> Patchwork_133648v1 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/index.html Participating hosts (42 -> 40) -- Additional (2): bat-dg2-11 bat-arls-3 Missing(4): bat-arls-4 bat-jsl-1 fi-snb-2520m fi-kbl-8809g Known issues Here are the changes found in Patchwork_133648v1 that come from known issues: ### IGT changes ### Issues hit * igt@gem_mmap@basic: - bat-dg2-11: NOTRUN -> [SKIP][1] ([i915#4083]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@gem_m...@basic.html * igt@gem_tiled_fence_blits@basic: - bat-dg2-11: NOTRUN -> [SKIP][2] ([i915#4077]) +2 other tests skip [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@gem_tiled_fence_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-dg2-11: NOTRUN -> [SKIP][3] ([i915#4079]) +1 other test skip [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@gem_tiled_pread_basic.html * igt@i915_module_load@load: - bat-arls-3: NOTRUN -> [ABORT][4] ([i915#11041]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-arls-3/igt@i915_module_l...@load.html * igt@i915_pm_rps@basic-api: - bat-dg2-11: NOTRUN -> [SKIP][5] ([i915#6621]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@i915_pm_...@basic-api.html * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy: - bat-dg2-11: NOTRUN -> [SKIP][6] ([i915#4212]) +7 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_addfb_ba...@addfb25-x-tiled-mismatch-legacy.html * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy: - bat-dg2-11: NOTRUN -> [SKIP][7] ([i915#5190]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-dg2-11: NOTRUN -> [SKIP][8] ([i915#4215] / [i915#5190]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_chamelium_frames@dp-crc-fast: - bat-dg2-13: [PASS][9] -> [FAIL][10] ([i915#11082]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14765/bat-dg2-13/igt@kms_chamelium_fra...@dp-crc-fast.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-13/igt@kms_chamelium_fra...@dp-crc-fast.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - bat-dg2-11: NOTRUN -> [SKIP][11] ([i915#4103] / [i915#4213]) +1 other test skip [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_dsc@dsc-basic: - bat-dg2-11: NOTRUN -> [SKIP][12] ([i915#3555] / [i915#3840]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_...@dsc-basic.html * igt@kms_force_connector_basic@force-load-detect: - bat-dg2-11: NOTRUN -> [SKIP][13] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_force_connector_ba...@force-load-detect.html * igt@kms_force_connector_basic@prune-stale-modes: - bat-dg2-11: NOTRUN -> [SKIP][14] ([i915#5274]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_force_connector_ba...@prune-stale-modes.html * igt@kms_pm_backlight@basic-brightness: - bat-dg2-11: NOTRUN -> [SKIP][15] ([i915#5354]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_pm_backli...@basic-brightness.html * igt@kms_psr@psr-sprite-plane-onoff: - bat-dg2-11: NOTRUN -> [SKIP][16] ([i915#1072] / [i915#9732]) +3 other tests skip [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_...@psr-sprite-plane-onoff.html * igt@kms_setmode@basic-clone-single-crtc: - bat-dg2-11: NOTRUN -> [SKIP][17] ([i915#3555]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@kms_setm...@basic-clone-single-crtc.html * igt@prime_vgem@basic-fence-flip: - bat-dg2-11: NOTRUN -> [SKIP][18] ([i915#3708]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133648v1/bat-dg2-11/igt@prime_v...@basic-fence-flip.html * igt@prime_vgem@basic-fence-mmap: - bat-dg2-11: NOTRUN -> [SKIP][19] ([i915#3708] / [i915#4077]) +1 other test skip [19]: https://intel-gfx-ci.01.org
✗ Fi.CI.SPARSE: warning for Panel Replay Fixes
== Series Details == Series: Panel Replay Fixes URL : https://patchwork.freedesktop.org/series/133648/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return' +./arch/x86/include/asm/bitops.h:116:1: warn
[PATCH 8/8] drm/i915/psr: Write also AUX Less Wake lines into ALPM_CTL
Currently AUX Less Wake lines are not written into ALPM_CTL. Fix this.
Fixes: 1ccbf135862b ("drm/i915/psr: Enable ALPM on source side for eDP Panel
replay")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index e8bed1d60fa7..2e1c3ba68544 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1860,7 +1860,8 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp)
if (intel_dp->psr.panel_replay_enabled && intel_dp_is_edp(intel_dp)) {
alpm_ctl = ALPM_CTL_ALPM_ENABLE |
ALPM_CTL_ALPM_AUX_LESS_ENABLE |
- ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
+ ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS |
+
ALPM_CTL_AUX_LESS_WAKE_TIME(psr->alpm_parameters.aux_less_wake_lines);
intel_de_write(dev_priv,
PORT_ALPM_CTL(dev_priv, cpu_transcoder),
--
2.34.1
[PATCH 7/8] drm/i915/display: Skip Panel Replay on pipe comparison if no active planes
Panel Replay is not enabled if there are no active planes. Do not compare
it on pipe comparison. Otherwise we get pipe mismatch.
Fixes: ac9ef327327b ("drm/i915/psr: Panel replay has to be enabled before link
training")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index 4035b3ec311d..bb8a0922a7f3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5318,7 +5318,9 @@ intel_pipe_config_compare(const struct intel_crtc_state
*current_config,
* Panel replay has to be enabled before link training. PSR doesn't have
* this requirement -> check these only if using panel replay
*/
- if (current_config->has_panel_replay || pipe_config->has_panel_replay) {
+ if (current_config->active_planes &&
+ (current_config->has_panel_replay ||
+pipe_config->has_panel_replay)) {
PIPE_CONF_CHECK_BOOL(has_psr);
PIPE_CONF_CHECK_BOOL(has_sel_update);
PIPE_CONF_CHECK_BOOL(enable_psr2_sel_fetch);
--
2.34.1
[PATCH 5/8] drm/i915/psr: Allow setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE via debugfs
Currently setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE (0x20) via psr_debug
debugfs interface is not allowed. This patch allows it.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 4db887edc8db..e8bed1d60fa7 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -3020,7 +3020,8 @@ int intel_psr_debug_set(struct intel_dp *intel_dp, u64
val)
u32 old_mode;
int ret;
- if (val & ~(I915_PSR_DEBUG_IRQ | I915_PSR_DEBUG_MODE_MASK) ||
+ if (val & ~(I915_PSR_DEBUG_IRQ | I915_PSR_DEBUG_SU_REGION_ET_DISABLE |
+ I915_PSR_DEBUG_MODE_MASK) ||
mode > I915_PSR_DEBUG_ENABLE_SEL_FETCH) {
drm_dbg_kms(&dev_priv->drm, "Invalid debug mask %llx\n", val);
return -EINVAL;
--
2.34.1
[PATCH 6/8] drm/i915/display: Take panel replay into account in vsc sdp unpacking
Currently intel_dp_vsc_sdp_unpack is not taking into account Panel Replay
vsc sdp. Fix this by adding vsc sdp revision 0x6 and length 0x10 into
intel_dp_vsc_sdp_unpack
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_dp.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index c0a3b6d50681..67d43639b3ab 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4435,7 +4435,8 @@ static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp
*vsc,
vsc->length = sdp->sdp_header.HB3;
if ((sdp->sdp_header.HB2 == 0x2 && sdp->sdp_header.HB3 == 0x8) ||
- (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 == 0xe)) {
+ (sdp->sdp_header.HB2 == 0x4 && sdp->sdp_header.HB3 == 0xe) ||
+ (sdp->sdp_header.HB2 == 0x6 && sdp->sdp_header.HB3 == 0x10)) {
/*
* - HB2 = 0x2, HB3 = 0x8
* VSC SDP supporting 3D stereo + PSR
@@ -4443,6 +,8 @@ static int intel_dp_vsc_sdp_unpack(struct drm_dp_vsc_sdp
*vsc,
* VSC SDP supporting 3D stereo + PSR2 with Y-coordinate of
* first scan line of the SU region (applies to eDP v1.4b
* and higher).
+* - HB2 = 0x6, HB3 = 0x10
+* VSC SDP supporting 3D stereo + Panel Replay.
*/
return 0;
} else if (sdp->sdp_header.HB2 == 0x5 && sdp->sdp_header.HB3 == 0x13) {
--
2.34.1
[PATCH 4/8] drm/i915/psr: Use enable boolean from intel_crtc_state for Early Transport
When enabling Early Transport use
intel_crtc_state->enable_psr2_su_region_et instead of
psr2_su_region_et_valid.
Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 71fa3dfd5b71..4db887edc8db 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -715,7 +715,7 @@ void intel_psr_enable_sink(struct intel_dp *intel_dp,
DP_ALPM_ENABLE |
DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
- if (psr2_su_region_et_valid(intel_dp))
+ if (crtc_state->enable_psr2_su_region_et)
dpcd_val |= DP_PSR_ENABLE_SU_REGION_ET;
}
--
2.34.1
[PATCH 2/8] drm/i915/psr: Add Early Transport status boolean into intel_psr
Currently we are purely relying on psr2_su_region_et_valid. Add new boolean
value into intel_psr struct indicating whether Early Transport is enabled
or not and use it instead of psr2_su_region_et_valid for getting Early
Transport status information.
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_psr.c | 4 +++-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 95a806538cdc..76f37ae76d2c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1703,6 +1703,7 @@ struct intel_psr {
bool sel_update_enabled;
bool psr2_sel_fetch_enabled;
bool psr2_sel_fetch_cff_enabled;
+ bool su_region_et_enabled;
bool req_psr2_sdp_prior_scanline;
u8 sink_sync_latency;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index dcce2824556c..79f81524119b 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -982,7 +982,7 @@ static void hsw_activate_psr2(struct intel_dp *intel_dp)
PSR2_MAN_TRK_CTL(dev_priv, cpu_transcoder), 0);
}
- if (psr2_su_region_et_valid(intel_dp))
+ if (intel_dp->psr.su_region_et_enabled)
val |= LNL_EDP_PSR2_SU_REGION_ET_ENABLE;
/*
@@ -2053,6 +2053,7 @@ static void intel_psr_enable_locked(struct intel_dp
*intel_dp,
intel_dp->psr.dc3co_exit_delay = val;
intel_dp->psr.dc3co_exitline = crtc_state->dc3co_exitline;
intel_dp->psr.psr2_sel_fetch_enabled =
crtc_state->enable_psr2_sel_fetch;
+ intel_dp->psr.su_region_et_enabled =
crtc_state->enable_psr2_su_region_et;
intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
intel_dp->psr.req_psr2_sdp_prior_scanline =
crtc_state->req_psr2_sdp_prior_scanline;
@@ -2209,6 +2210,7 @@ static void intel_psr_disable_locked(struct intel_dp
*intel_dp)
intel_dp->psr.panel_replay_enabled = false;
intel_dp->psr.sel_update_enabled = false;
intel_dp->psr.psr2_sel_fetch_enabled = false;
+ intel_dp->psr.su_region_et_enabled = false;
intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
}
--
2.34.1
[PATCH 3/8] drm/i915/psr: Get Early Transport status in intel_psr_pipe_get_config
We are currently not getting Early Transport status information in
intel_psr_pipe_get_config. Fix this.
Fixes: 467e4e061c44 ("drm/i915/psr: Enable psr2 early transport as possible")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_psr.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 79f81524119b..71fa3dfd5b71 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1760,6 +1760,8 @@ void intel_psr_get_config(struct intel_encoder *encoder,
pipe_config->enable_psr2_sel_fetch = true;
}
+ pipe_config->enable_psr2_su_region_et =
intel_dp->psr.su_region_et_enabled;
+
if (DISPLAY_VER(dev_priv) >= 12) {
val = intel_de_read(dev_priv,
TRANS_EXITLINE(dev_priv, cpu_transcoder));
--
2.34.1
[PATCH 1/8] drm/i915/psr: Do not use fast_wake_lines for aux less wake time
We want to have own variables for fast wake lines and aux less wake
time. It might be needed to choose if we can enable Panel Replay Selective
Update or PSR2.
Also currently aux less wake time is overwritten by calculated fast wake
time.
Fixes: da6a9836ac09 ("drm/i915/psr: Calculate aux less wake time")
Signed-off-by: Jouni Högander
---
drivers/gpu/drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_psr.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
b/drivers/gpu/drm/i915/display/intel_display_types.h
index 9678c2b157f6..95a806538cdc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1712,6 +1712,7 @@ struct intel_psr {
/* LNL and beyond */
u8 check_entry_lines;
+ u8 aux_less_wake_lines;
u8 silence_period_sym_clocks;
u8 lfps_half_cycle_num_of_syms;
} alpm_parameters;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
b/drivers/gpu/drm/i915/display/intel_psr.c
index 2514ac48312b..dcce2824556c 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1345,7 +1345,7 @@ static int _lnl_compute_aux_less_alpm_params(struct
intel_dp *intel_dp,
if (i915->display.params.psr_safest_params)
aux_less_wake_lines = ALPM_CTL_AUX_LESS_WAKE_TIME_MASK;
- intel_dp->psr.alpm_parameters.fast_wake_lines = aux_less_wake_lines;
+ intel_dp->psr.alpm_parameters.aux_less_wake_lines = aux_less_wake_lines;
intel_dp->psr.alpm_parameters.silence_period_sym_clocks =
silence_period;
intel_dp->psr.alpm_parameters.lfps_half_cycle_num_of_syms =
lfps_half_cycle;
--
2.34.1
[PATCH 0/8] Panel Replay Fixes
This patch set contains fixes found when debugging Panel Replay and Early Transport and ALPM using eDP panel supporting all these features. Jouni Högander (8): drm/i915/psr: Do not use fast_wake_lines for aux less wake time drm/i915/psr: Add Early Transport status boolean into intel_psr drm/i915/psr: Get Early Transport status in intel_psr_pipe_get_config drm/i915/psr: Use enable boolean from intel_crtc_state for Early Transport drm/i915/psr: Allow setting I915_PSR_DEBUG_SU_REGION_ET_DISABLE via debugfs drm/i915/display: Take panel replay into account in vsc sdp unpacking drm/i915/display: Skip Panel Replay on pipe comparison if no active planes drm/i915/psr: Write also AUX Less Wake lines into ALPM_CTL drivers/gpu/drm/i915/display/intel_display.c | 4 +++- .../gpu/drm/i915/display/intel_display_types.h | 2 ++ drivers/gpu/drm/i915/display/intel_dp.c | 5 - drivers/gpu/drm/i915/display/intel_psr.c | 16 +++- 4 files changed, 20 insertions(+), 7 deletions(-) -- 2.34.1
Re: Regression on linux-next (next-20240506)
Hi Am 15.05.24 um 10:16 schrieb Borah, Chaitanya Kumar: -Original Message- From: Borah, Chaitanya Kumar Sent: Wednesday, May 8, 2024 3:05 PM To: tzimmerm...@suse.de Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar ; Saarinen, Jani Subject: Regression on linux-next (next-20240506) Hello Thomas, Hope you are doing well. This mail is regarding a regression we are seeing in our CI runs[1] on linux- next repository. Since the version next-20240506 [2], we are seeing the following regression ` Starting dynamic subtest: gt_contexts (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol acpi_video_unregister (err -2) (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol acpi_video_register_backlight (err -2) (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol __acpi_video_get_backlight_type (err -2) (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol acpi_video_register (err -2) (i915_selftest:1107) igt_kmod-CRITICAL: Test assertion failure function igt_kselftest_execute, file ../../../usr/src/igt-gpu-tools/lib/igt_kmod.c:1594: (i915_selftest:1107) igt_kmod-CRITICAL: Failed assertion: err == 0 (i915_selftest:1107) igt_kmod-CRITICAL: kselftest "i915 igt__23__live_gt_contexts=1 live_selftests=-1 disable_display=1 st_filter=" failed: No such file or directory [2] Dynamic subtest gt_contexts failed. ` Details log can be found in [3]. After bisecting the tree, the following patch [4] seems to be the first "bad" commit ` 2fd001cd36005846caa6456fff1008c6f5bae9d4 is the first bad commit commit 2fd001cd36005846caa6456fff1008c6f5bae9d4 Author: Thomas Zimmermann tzimmerm...@suse.de Date: Fri Mar 29 21:32:12 2024 +0100 arch: Rename fbdev header and source files ` We also verified that if we revert the patch the issue is not seen. Could you please check why the patch causes this regression and provide a fix if necessary? +Jani N Gentle Reminder 😊 Sorry, I didn't notice the report before. The commit is not related to ACPI. There's now asm/video.h and acpi/video.h. Maybe there's a conflict among included files. Do you have a kernel config to build with? Best regards Thomas Thank you. Regards Chaitanya [1] https://intel-gfx-ci.01.org/tree/linux-next/combined-alt.html? [2] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux- next.git/commit/?h=next-20240506 [3] https://intel-gfx-ci.01.org/tree/linux-next/next-20240506/bat-mtlp- 9/igt@i915_selftest@live@gt_contexts.html [4] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux- next.git/commit/?h=next- 20240506&id=2fd001cd36005846caa6456fff1008c6f5bae9d4 -- -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Frankenstrasse 146, 90461 Nuernberg, Germany GF: Ivo Totev, Andrew Myers, Andrew McDonald, Boudien Moerman HRB 36809 (AG Nuernberg)
✓ Fi.CI.BAT: success for drm/i915: Use for_each_child instead of manual for-loop (rev2)
== Series Details == Series: drm/i915: Use for_each_child instead of manual for-loop (rev2) URL : https://patchwork.freedesktop.org/series/133600/ State : success == Summary == CI Bug Log - changes from CI_DRM_14764 -> Patchwork_133600v2 Summary --- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/index.html Participating hosts (42 -> 40) -- Additional (2): bat-jsl-1 bat-arls-3 Missing(4): fi-glk-j4005 fi-kbl-8809g fi-snb-2520m bat-mtlp-6 Known issues Here are the changes found in Patchwork_133600v2 that come from known issues: ### IGT changes ### Issues hit * igt@debugfs_test@basic-hwmon: - bat-jsl-1: NOTRUN -> [SKIP][1] ([i915#9318]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html - bat-arls-3: NOTRUN -> [SKIP][2] ([i915#9318]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@debugfs_t...@basic-hwmon.html * igt@gem_huc_copy@huc-copy: - bat-jsl-1: NOTRUN -> [SKIP][3] ([i915#2190]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-jsl-1/igt@gem_huc_c...@huc-copy.html * igt@gem_lmem_swapping@basic@lmem0: - bat-dg2-11: [PASS][4] -> [FAIL][5] ([i915#10378]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/bat-dg2-11/igt@gem_lmem_swapping@ba...@lmem0.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-dg2-11/igt@gem_lmem_swapping@ba...@lmem0.html * igt@gem_lmem_swapping@parallel-random-engines: - bat-arls-3: NOTRUN -> [SKIP][6] ([i915#10213]) +3 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@gem_lmem_swapp...@parallel-random-engines.html - bat-jsl-1: NOTRUN -> [SKIP][7] ([i915#4613]) +3 other tests skip [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-jsl-1/igt@gem_lmem_swapp...@parallel-random-engines.html * igt@gem_mmap@basic: - bat-arls-3: NOTRUN -> [SKIP][8] ([i915#4083]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@gem_m...@basic.html * igt@gem_render_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][9] ([i915#10197] / [i915#10211] / [i915#4079]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@gem_render_tiled_bl...@basic.html * igt@gem_tiled_blits@basic: - bat-arls-3: NOTRUN -> [SKIP][10] ([i915#10196] / [i915#4077]) +2 other tests skip [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@gem_tiled_bl...@basic.html * igt@gem_tiled_pread_basic: - bat-arls-3: NOTRUN -> [SKIP][11] ([i915#10206] / [i915#4079]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@gem_tiled_pread_basic.html * igt@i915_pm_rps@basic-api: - bat-arls-3: NOTRUN -> [SKIP][12] ([i915#10209]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@i915_pm_...@basic-api.html * igt@i915_selftest@live@gt_mocs: - bat-arls-3: NOTRUN -> [DMESG-WARN][13] ([i915#10341]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@i915_selftest@live@gt_mocs.html * igt@i915_selftest@live@hangcheck: - bat-mtlp-8: [PASS][14] -> [DMESG-WARN][15] ([i915#9522]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/bat-mtlp-8/igt@i915_selftest@l...@hangcheck.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-mtlp-8/igt@i915_selftest@l...@hangcheck.html * igt@i915_selftest@live@memory_region: - bat-arls-3: NOTRUN -> [DMESG-FAIL][16] ([i915#10262]) +28 other tests dmesg-fail [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@i915_selftest@live@memory_region.html * igt@kms_addfb_basic@basic-y-tiled-legacy: - bat-arls-3: NOTRUN -> [SKIP][17] ([i915#10200]) +9 other tests skip [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@kms_addfb_ba...@basic-y-tiled-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic: - bat-arls-3: NOTRUN -> [SKIP][18] ([i915#10202]) +1 other test skip [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-arls-3/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - bat-jsl-1: NOTRUN -> [SKIP][19] ([i915#4103]) +1 other test skip [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133600v2/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html * igt@kms_dsc@dsc-basic: - bat-arls-3: NOTRUN -> [SKIP][2
✗ Fi.CI.CHECKPATCH: warning for drm/i915: Use for_each_child instead of manual for-loop (rev2)
== Series Details == Series: drm/i915: Use for_each_child instead of manual for-loop (rev2) URL : https://patchwork.freedesktop.org/series/133600/ State : warning == Summary == Error: dim checkpatch failed 01a8fa52159b drm/i915: Use for_each_child instead of manual for-loop -:45: WARNING:AVOID_BUG: Do not crash the kernel unless it is absolutely unavoidable--use WARN_ON_ONCE() plus recovery code (if feasible) instead of BUG() or variants #45: FILE: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c:1821: + GEM_BUG_ON(i915_active_is_idle(&ce->active)); total: 0 errors, 1 warnings, 0 checks, 81 lines checked
Re: [PATCH v10 00/12] Panel replay selective update support
On Fri, 2024-05-10 at 12:38 +0300, Jouni Högander wrote: > This patch set is implementing panel replay selective update support > for Intel hardware. These are now merged into drm-intel-next including "drm/panelreplay: dpcd register definition for panelreplay SU". Thank you Animesh and Maarten for review and ack. BR, Jouni Högander > > v10: > - use always PSR2_STATUS for eDP Panel Replay > - handle SRD_STATUS vs. PSR2_STATUS in intel_psr_wait_exit_locked > as well > v9: > - do not add has_psr check into psr2 case in > intel_dp_compute_vsc_sdp > - use drm_dp_dpcd_readb instead of drm_dp_dpcd_read in > intel_dp_get_su_capability > - ensure intel_dp_get_su_capability returns 0 if drm_dp_dpcd_readb > fails > v8: > - use correct offset for DP_PANEL_PANEL_REPLAY_CAPABILITY > v7: > - use always vsc revision 0x6 for Panel Replay > v6: > - fixes split to separate patch set > v5: > - do not use PSR2_STATUS for PSR1 > v4: > - do not rename intel_psr_enabled > - do not add sel_update_et_enabled into struct intel_psr > v3: > - do not disable panel replay by default > - set has_psr for panel replay as well > - enable sink before link training > - do not apply all PSR workarounds for panel replay > - do not write/read registers/bits not applicable for panel replay > - use psr bit definitions in granularity configuration as well > - goto unsupported instead of return when global enabled check > fails > - update module parameter descriptions. > v2: > - make psr pause/resume to work for panel replay as well > > Jouni Högander (12): > drm/i915/psr: Rename has_psr2 as has_sel_update > drm/i915/display: Do not print "psr: enabled" for on Panel Replay > drm/i915/dp: Use always vsc revision 0x6 for Panel Replay > drm/i915/psr: Rename psr2_enabled as sel_update_enabled > drm/panelreplay: dpcd register definition for panelreplay SU > drm/i915/psr: Detect panel replay selective update support > drm/i915/psr: Modify intel_dp_get_su_granularity to support panel > replay > drm/i915/psr: Panel replay uses SRD_STATUS to track it's status > drm/i915/psr: Do not apply workarounds in case of panel replay > drm/i915/psr: Update PSR module parameter descriptions > drm/i915/psr: Split intel_psr2_config_valid for panel replay > drm/i915/psr: Add panel replay sel update support to debugfs > interface > > .../drm/i915/display/intel_crtc_state_dump.c | 7 +- > drivers/gpu/drm/i915/display/intel_display.c | 2 +- > .../drm/i915/display/intel_display_params.c | 5 +- > .../drm/i915/display/intel_display_types.h | 5 +- > drivers/gpu/drm/i915/display/intel_dp.c | 17 +- > drivers/gpu/drm/i915/display/intel_fbc.c | 5 +- > drivers/gpu/drm/i915/display/intel_hdmi.c | 3 +- > drivers/gpu/drm/i915/display/intel_psr.c | 237 > -- > include/drm/display/drm_dp.h | 6 + > 9 files changed, 194 insertions(+), 93 deletions(-) >
RE: Regression on linux-next (next-20240506)
> -Original Message- > From: Borah, Chaitanya Kumar > Sent: Wednesday, May 8, 2024 3:05 PM > To: tzimmerm...@suse.de > Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar > ; Saarinen, Jani > Subject: Regression on linux-next (next-20240506) > > Hello Thomas, > > Hope you are doing well. > > This mail is regarding a regression we are seeing in our CI runs[1] on linux- > next repository. > > Since the version next-20240506 [2], we are seeing the following regression > > ` > Starting dynamic subtest: gt_contexts > (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol > acpi_video_unregister (err -2) > (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol > acpi_video_register_backlight (err -2) > (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol > __acpi_video_get_backlight_type (err -2) > (i915_selftest:1107) igt_kmod-WARNING: i915: Unknown symbol > acpi_video_register (err -2) > (i915_selftest:1107) igt_kmod-CRITICAL: Test assertion failure function > igt_kselftest_execute, file > ../../../usr/src/igt-gpu-tools/lib/igt_kmod.c:1594: > (i915_selftest:1107) igt_kmod-CRITICAL: Failed assertion: err == 0 > (i915_selftest:1107) igt_kmod-CRITICAL: kselftest "i915 > igt__23__live_gt_contexts=1 live_selftests=-1 disable_display=1 st_filter=" > failed: No such file or directory [2] Dynamic subtest gt_contexts failed. > ` > Details log can be found in [3]. > > After bisecting the tree, the following patch [4] seems to be the first "bad" > commit > > ` > 2fd001cd36005846caa6456fff1008c6f5bae9d4 is the first bad commit commit > 2fd001cd36005846caa6456fff1008c6f5bae9d4 > Author: Thomas Zimmermann tzimmerm...@suse.de > Date: Fri Mar 29 21:32:12 2024 +0100 > > arch: Rename fbdev header and source files > ` > > We also verified that if we revert the patch the issue is not seen. > > Could you please check why the patch causes this regression and provide a fix > if necessary? > +Jani N Gentle Reminder 😊 > Thank you. > > Regards > > Chaitanya > > [1] https://intel-gfx-ci.01.org/tree/linux-next/combined-alt.html? > [2] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux- > next.git/commit/?h=next-20240506 > [3] https://intel-gfx-ci.01.org/tree/linux-next/next-20240506/bat-mtlp- > 9/igt@i915_selftest@live@gt_contexts.html > [4] https://git.kernel.org/pub/scm/linux/kernel/git/next/linux- > next.git/commit/?h=next- > 20240506&id=2fd001cd36005846caa6456fff1008c6f5bae9d4
✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display: Move port clock calculation
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Move port clock calculation
URL : https://patchwork.freedesktop.org/series/133640/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_14764 -> Patchwork_133640v1
Summary
---
**SUCCESS**
No regressions found.
External URL:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/index.html
Participating hosts (42 -> 37)
--
Additional (2): bat-jsl-1 bat-arls-3
Missing(7): fi-bsw-n3050 fi-snb-2520m bat-adlp-6 fi-glk-j4005
fi-cfl-8109u fi-kbl-8809g bat-dg2-11
Possible new issues
---
Here are the unknown changes that may have been introduced in
Patchwork_133640v1:
### IGT changes ###
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_flip@basic-plain-flip@d-dp6:
- {bat-mtlp-9}: [PASS][1] -> [DMESG-WARN][2]
[1]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/bat-mtlp-9/igt@kms_flip@basic-plain-f...@d-dp6.html
[2]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-mtlp-9/igt@kms_flip@basic-plain-f...@d-dp6.html
Known issues
Here are the changes found in Patchwork_133640v1 that come from known issues:
### IGT changes ###
Issues hit
* igt@debugfs_test@basic-hwmon:
- bat-jsl-1: NOTRUN -> [SKIP][3] ([i915#9318])
[3]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html
* igt@gem_huc_copy@huc-copy:
- bat-jsl-1: NOTRUN -> [SKIP][4] ([i915#2190])
[4]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-jsl-1/igt@gem_huc_c...@huc-copy.html
* igt@gem_lmem_swapping@verify-random:
- bat-jsl-1: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
[5]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html
* igt@i915_module_load@load:
- bat-arls-3: NOTRUN -> [ABORT][6] ([i915#11041])
[6]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-arls-3/igt@i915_module_l...@load.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-jsl-1: NOTRUN -> [SKIP][7] ([i915#4103]) +1 other test skip
[7]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html
* igt@kms_dsc@dsc-basic:
- bat-jsl-1: NOTRUN -> [SKIP][8] ([i915#3555] / [i915#9886])
[8]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-jsl-1/igt@kms_...@dsc-basic.html
* igt@kms_force_connector_basic@force-load-detect:
- bat-jsl-1: NOTRUN -> [SKIP][9]
[9]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-jsl-1/igt@kms_force_connector_ba...@force-load-detect.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-jsl-1: NOTRUN -> [SKIP][10] ([i915#3555])
[10]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-jsl-1/igt@kms_setm...@basic-clone-single-crtc.html
Possible fixes
* igt@kms_cursor_legacy@basic-flip-before-cursor-legacy:
- {bat-mtlp-9}: [DMESG-WARN][11] ([i915#11009]) -> [PASS][12]
[11]:
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14764/bat-mtlp-9/igt@kms_cursor_leg...@basic-flip-before-cursor-legacy.html
[12]:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133640v1/bat-mtlp-9/igt@kms_cursor_leg...@basic-flip-before-cursor-legacy.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10911]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10911
[i915#10979]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10979
[i915#11009]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11009
[i915#11041]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11041
[i915#2190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2190
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#6121]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6121
[i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
[i915#9886]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9886
Build changes
-
* Linux: CI_DRM_14764 -> Patchwork_133640v1
CI-20190529: 20190529
CI_DRM_14764: cd3ae03d1d2d6a680b4637e99623166340b4dc9f @
git://anongit.freedesktop.org/gfx-ci/linux
IGT_7854: 8abb25ffe588020cf0b797d60ad1f3f9e7c0764a @
https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/display: Move port clock calculation
== Series Details == Series: series starting with [1/2] drm/i915/display: Move port clock calculation URL : https://patchwork.freedesktop.org/series/133640/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.
✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/display: Move port clock calculation
== Series Details ==
Series: series starting with [1/2] drm/i915/display: Move port clock calculation
URL : https://patchwork.freedesktop.org/series/133640/
State : warning
== Summary ==
Error: dim checkpatch failed
a7f08368e5a3 drm/i915/display: Move port clock calculation
-:107: WARNING:LINE_SPACING: Missing a blank line after declarations
#107: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2058:
+ int port_clock = intel_c10pll_calc_port_clock(encoder,
tables[i]);
+ if (clock == port_clock)
-:117: WARNING:LINE_SPACING: Missing a blank line after declarations
#117: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2118:
+ int port_clock = intel_c10pll_calc_port_clock(encoder,
tables[i]);
+ if (crtc_state->port_clock == port_clock) {
-:135: WARNING:LINE_SPACING: Missing a blank line after declarations
#135: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2300:
+ int port_clock = intel_c20pll_calc_port_clock(encoder,
tables[i]);
+ if (clock == port_clock)
-:156: WARNING:LINE_SPACING: Missing a blank line after declarations
#156: FILE: drivers/gpu/drm/i915/display/intel_cx0_phy.c:2361:
+ int port_clock = intel_c20pll_calc_port_clock(encoder,
tables[i]);
+ if (crtc_state->port_clock == port_clock) {
total: 0 errors, 4 warnings, 0 checks, 228 lines checked
015f0e910af8 drm/i915/display: Remove .clock from pll state structure
