[Intel-gfx] [PATCH] drm/i915: fix spelling mistake "reserverd" -> "reserved"
Fix a spelling mistake in a comment.
Signed-off-by: Alexandre Belloni
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index f9ce35da4123..742f8ff101e4 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -4280,7 +4280,7 @@ static void gen10_sseu_device_status(struct
drm_i915_private *dev_priv,
for (s = 0; s < info->sseu.max_slices; s++) {
/*
* FIXME: Valid SS Mask respects the spec and read
-* only valid bits for those registers, excluding reserverd
+* only valid bits for those registers, excluding reserved
* although this seems wrong because it would leave many
* subslices without ACK.
*/
--
2.19.1
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Re: [Intel-gfx] [PATCH] drm/core: Remove drm_dev_unref() and it's uses
Hi,
On 26/04/2018 15:45:44+0300, Laurent Pinchart wrote:
> Hi Daniel,
>
> On Thursday, 26 April 2018 15:36:15 EEST Daniel Vetter wrote:
> > On Thu, Apr 26, 2018 at 03:58:19PM +0530, Vaishali Thakkar wrote:
> > > It's been a while since we introduced drm_dev{get/put} functions
> > > to replace reference/unreference in drm subsystem for the
> > > consistency purpose. So, with this patch, let's just replace
> > > all current use cases of drm_dev_unref() with drm_dev_put and remove
> > > the function itself.
> > >
> > > Coccinelle was used for mass-patching.
> > >
> > > Signed-off-by: Vaishali Thakkar <vthakkar1...@gmail.com>
> >
> > Thanks for doing this. Unfortunately drm moves pretty fast, so already a
> > conflict when I tried to apply this. Some drivers are also in their own
> > trees, so this might lead to more fun :-/
> >
> > Can you pls split it up per-driver (just the directories under
> > drivers/gpu/drm/ is enough)? Final patch to remove the function might then
> > get stalled a bit ofc.
>
> I requested a single patch instead of splitting it per driver, you might want
> to blame me for that.
>
Doesn't splitting the change per driver break bisectability unless there
is a guarantee that the change in include/drm/drm_drv.h is applied after
all the driver trees have been merged?
--
Alexandre Belloni, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
https://bootlin.com
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Re: [Intel-gfx] [PATCH] rtc: cmos: Don't enable interrupts in the middle of the interrupt handler
On 19/10/2016 at 21:02:04 +0300, ville.syrj...@linux.intel.com wrote :
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Using spin_lock_irq()/spin_unlock_irq() from within the interrupt
> handler is a no-no. Let's save/restore the flags to avoid turning on
> interrupts prematurely.
>
> We hit this in a bunch of our CI systems, but for whatever reason I
> wasn't able to reproduce on my own machine, so this fix is just
> based on the backtrace.
>
> [ 202.634918] WARNING: CPU: 0 PID: 0 at kernel/locking/lockdep.c:2729
> trace_hardirqs_on_caller+0x113/0x1b0
> [ 202.634919] DEBUG_LOCKS_WARN_ON(current->hardirq_context)
> [ 202.634929] Modules linked in: snd_hda_intel i915 x86_pkg_temp_thermal
> intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul ghash_clmulni_intel
> lpc_ich snd_hda_codec_realtek snd_hda_codec_generic snd_hda_codec_hdmi
> snd_hda_codec snd_hwdep i2c_designware_platform i2c_designware_core
> snd_hda_core mei_me mei snd_pcm r8169 mii sdhci_acpi sdhci mmc_core i2c_hid
> [last unloaded: i915]
> [ 202.634930] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G U
> 4.9.0-rc1-CI-CI_DRM_1734+ #1
> [ 202.634931] Hardware name: GIGABYTE M4HM87P-00/M4HM87P-00, BIOS F6
> 12/10/2014
> [ 202.634933] 88011ea03d68 8142dce5 88011ea03db8
>
> [ 202.634934] 88011ea03da8 8107e496 0aa90002
> 81e249a0
> [ 202.634935] 81815637 82e7c280
> 0004
> [ 202.634936] Call Trace:
> [ 202.634939]
> [ 202.634939] [] dump_stack+0x67/0x92
> [ 202.634941] [] __warn+0xc6/0xe0
> [ 202.634944] [] ? _raw_spin_unlock_irq+0x27/0x50
> [ 202.634945] [] warn_slowpath_fmt+0x4a/0x50
> [ 202.634946] [] trace_hardirqs_on_caller+0x113/0x1b0
> [ 202.634948] [] trace_hardirqs_on+0xd/0x10
> [ 202.634949] [] _raw_spin_unlock_irq+0x27/0x50
> [ 202.634951] [] rtc_handler+0x32/0xa0
> [ 202.634954] [] acpi_ev_fixed_event_detect+0xd4/0xfb
> [ 202.634956] [] acpi_ev_sci_xrupt_handler+0xf/0x2d
> [ 202.634957] [] acpi_irq+0x11/0x2c
> [ 202.634960] [] __handle_irq_event_percpu+0x58/0x370
> [ 202.634961] [] handle_irq_event_percpu+0x1e/0x50
> [ 202.634962] [] handle_irq_event+0x34/0x60
> [ 202.634963] [] handle_fasteoi_irq+0xa6/0x170
> [ 202.634966] [] handle_irq+0x15/0x20
> [ 202.634967] [] do_IRQ+0x68/0x130
> [ 202.634968] [] common_interrupt+0x89/0x89
> [ 202.634970]
> [ 202.634970] [] ? mwait_idle+0x93/0x210
> [ 202.634971] [] ? mwait_idle+0x8a/0x210
> [ 202.634972] [] arch_cpu_idle+0xa/0x10
> [ 202.634973] [] default_idle_call+0x1e/0x30
> [ 202.634974] [] cpu_startup_entry+0x17c/0x1f0
> [ 202.634976] [] rest_init+0x127/0x130
> [ 202.634978] [] start_kernel+0x3f6/0x403
> [ 202.634980] [] x86_64_start_reservations+0x2a/0x2c
> [ 202.634981] [] x86_64_start_kernel+0x173/0x186
> [ 202.634982] ---[ end trace 293c99618fa08d34 ]---
>
> Cc: Gabriele Mazzotta <gabriele@gmail.com>
> Cc: Alexandre Belloni <alexandre.bell...@free-electrons.com>
> Fixes: 983bf1256edb ("rtc: cmos: Clear ACPI-driven alarms upon resume")
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/rtc/rtc-cmos.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
Applied, thanks.
--
Alexandre Belloni, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
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Re: [Intel-gfx] [PATCH v5 26/46] pwm: sun4i: implement hardware readout
On 30/03/2016 at 22:03:49 +0200, Boris Brezillon wrote :
> Implement ->get_state() instead of only initializing the polarity in
> the probe function.
>
> This implementation also takes care of keeping the PWM clk enabled if at
> least one of the PWM exported by the PWM chip is already enabled, which
> should prevent glitches.
>
> Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com>
Reviewed-by: Alexandre Belloni <alexandre.bell...@free-electrons.com>
> ---
> drivers/pwm/pwm-sun4i.c | 74
> -
> 1 file changed, 55 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/pwm/pwm-sun4i.c b/drivers/pwm/pwm-sun4i.c
> index 03a99a5..34cb296 100644
> --- a/drivers/pwm/pwm-sun4i.c
> +++ b/drivers/pwm/pwm-sun4i.c
> @@ -252,11 +252,65 @@ static void sun4i_pwm_disable(struct pwm_chip *chip,
> struct pwm_device *pwm)
> clk_disable_unprepare(sun4i_pwm->clk);
> }
>
> +static void sun4i_pwm_get_state(struct pwm_chip *chip,
> + struct pwm_device *pwm,
> + struct pwm_state *pstate)
> +{
> + struct sun4i_pwm_chip *sun4i_pwm = to_sun4i_pwm_chip(chip);
> + unsigned int clk_rate = clk_get_rate(sun4i_pwm->clk);
> + int prescaler, prescalerid;
> + int ret;
> + u32 val;
> +
> + ret = clk_prepare_enable(sun4i_pwm->clk);
> + if (ret) {
> + dev_err(chip->dev, "Failed to enable PWM clock");
> + return;
> + }
> +
> + val = sun4i_pwm_readl(sun4i_pwm, PWM_CTRL_REG);
> + if (val & BIT_CH(PWM_ACT_STATE, pwm->hwpwm))
> + pstate->polarity = PWM_POLARITY_INVERSED;
> + else
> + pstate->polarity = PWM_POLARITY_NORMAL;
> +
> + if ((val & BIT_CH(PWM_EN, pwm->hwpwm)) &&
> + (val & BIT_CH(PWM_CLK_GATING, pwm->hwpwm)))
> + pstate->enabled = true;
> + else
> + pstate->enabled = false;
> +
> + pstate->period = 0;
> + pstate->duty_cycle = 0;
> + prescalerid = (val >> (PWMCH_OFFSET * pwm->hwpwm)) & PWM_PRESCAL_MASK;
> + prescaler = prescaler_table[prescalerid];
> + if (prescaler) {
> + u64 timens;
> +
> + clk_rate /= prescaler;
> +
> + val = sun4i_pwm_readl(sun4i_pwm, PWM_CH_PRD(pwm->hwpwm));
> +
> + timens = ((val >> 16) & PWM_PRD_MASK) + 1;
> + timens *= NSEC_PER_SEC;
> + do_div(timens, clk_rate);
> + pstate->period = timens;
> +
> + timens = val & PWM_DTY_MASK;
> + timens *= NSEC_PER_SEC;
> + do_div(timens, clk_rate);
> + pstate->duty_cycle = timens;
> + }
> +
> + clk_disable_unprepare(sun4i_pwm->clk);
> +}
> +
> static const struct pwm_ops sun4i_pwm_ops = {
> .config = sun4i_pwm_config,
> .set_polarity = sun4i_pwm_set_polarity,
> .enable = sun4i_pwm_enable,
> .disable = sun4i_pwm_disable,
> + .get_state = sun4i_pwm_get_state,
> .owner = THIS_MODULE,
> };
>
> @@ -307,8 +361,7 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
> {
> struct sun4i_pwm_chip *pwm;
> struct resource *res;
> - u32 val;
> - int i, ret;
> + int ret;
> const struct of_device_id *match;
>
> match = of_match_device(sun4i_pwm_dt_ids, >dev);
> @@ -345,24 +398,7 @@ static int sun4i_pwm_probe(struct platform_device *pdev)
>
> platform_set_drvdata(pdev, pwm);
>
> - ret = clk_prepare_enable(pwm->clk);
> - if (ret) {
> - dev_err(>dev, "failed to enable PWM clock\n");
> - goto clk_error;
> - }
> -
> - val = sun4i_pwm_readl(pwm, PWM_CTRL_REG);
> - for (i = 0; i < pwm->chip.npwm; i++)
> - if (!(val & BIT_CH(PWM_ACT_STATE, i)))
> - pwm_set_polarity(>chip.pwms[i],
> - PWM_POLARITY_INVERSED);
> - clk_disable_unprepare(pwm->clk);
> -
> return 0;
> -
> -clk_error:
> - pwmchip_remove(>chip);
> - return ret;
> }
>
> static int sun4i_pwm_remove(struct platform_device *pdev)
> --
> 2.5.0
>
--
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Embedded Linux, Kernel and Android engineering
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