Re: [Intel-gfx] Running DRI3 on intel-gfx

2014-06-06 Thread Jamey Sharp
On Wed, Jun 04, 2014 at 06:58:47PM +0200, Sedat Dilek wrote:
 How do I see if DRI3 is enabled for mesa on my SandyBridge intel-gfxcard?
 
 glxinfo log-file attached...
 
 $ LC_ALL=C LIBGL_DEBUG=verbose glxinfo 2 /dev/null  /tmp/glxinfo.txt

You threw out the information you wanted by redirecting the debug output
to /dev/null. :-)

$ LC_ALL=C LIBGL_DEBUG=verbose glxinfo /dev/null
libGL: screen 0 does not appear to be DRI3 capable
libGL: pci id for fd 4: 8086:0d26, driver i965
...

I didn't realize that LIBGL_DEBUG=verbose would report that. It would
have been handy to know when I was trying to figure out the same thing a
few weeks ago.

Jamey


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[Intel-gfx] [PATCH v2] UXA: Wait until a pageflip actually completes to report it.

2014-05-21 Thread Jamey Sharp
UXA was reporting page-flip completion as soon as the flip was scheduled
with the kernel, instead of waiting for the kernel to indicate that the
flip had actually completed.

Moving the DRI2SwapComplete call to the right place fixes all of our
Piglit tests for OML_sync_control when run on xf86-video-intel/UXA,
aside from a bit of difficult-to-reproduce flakiness when using a
divisor  1.

This also eliminates a compile-time and run-time warning when built
against an xserver with Warn on DRI2SwapComplete with constant UST/MSC
applied.

v2: The drawable may have disappeared by the time the flip completes.
Don't try to report swap completion in that case.

Signed-off-by: Jamey Sharp ja...@minilop.net
Cc: Theo Hill theo0...@gmail.com
Cc: Eric Anholt e...@anholt.net
Cc: Chris Wilson ch...@chris-wilson.co.uk
---

I can experimentally confirm Chris' claim that this patch causes
SwapBuffers to block once one swap is already outstanding, giving
double-buffering behavior rather than the desired triple-buffering.

However, it only has an effect for full-screen windows, and only when
not running under a compositor.

- If the window is not full-screen, UXA is already only double-buffered.
- If full-screen, UXA is usually triple-buffered, but not reliably.
- If run under a compositor, either the compositor crashes during my
  test, or it still appears to be triple-buffered even with this patch.

If you want triple-buffering, NAK'ing this patch is clearly not the way
to get it, since the driver already doesn't do it reliably.

Please merge this patch, which fixes two spec violations that make
OML_sync_control unusable; and if you're concerned about uncomposited
triple-buffering in UXA, please find a less awful way to get it.

Thanks,
Jamey

 src/uxa/intel_dri.c | 12 
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/src/uxa/intel_dri.c b/src/uxa/intel_dri.c
index ca58052..d4a242e 100644
--- a/src/uxa/intel_dri.c
+++ b/src/uxa/intel_dri.c
@@ -932,10 +932,6 @@ I830DRI2ScheduleFlip(struct intel_screen_private *intel,
 
/* Then flip DRI2 pointers and update the screen pixmap */
I830DRI2ExchangeBuffers(intel, info-front, info-back);
-   DRI2SwapComplete(info-client, draw, 0, 0, 0,
-DRI2_EXCHANGE_COMPLETE,
-info-event_complete,
-info-event_data);
return TRUE;
 }
 
@@ -1090,6 +1086,14 @@ void I830DRI2FlipEventHandler(unsigned int frame, 
unsigned int tv_sec,
assert(intel-pending_flip[flip_info-pipe] == flip_info);
intel-pending_flip[flip_info-pipe] = NULL;
 
+   /* Assuming the drawable's still around, complete the swap. */
+   if (drawable)
+   DRI2SwapComplete(flip_info-client, drawable,
+frame, tv_sec, tv_usec,
+DRI2_EXCHANGE_COMPLETE,
+flip_info-event_complete,
+flip_info-event_data);
+
chain = flip_info-chain;
if (chain) {
DrawablePtr chain_drawable = NULL;
-- 
1.9.2

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Re: [Intel-gfx] [PATCH v2] UXA: Wait until a pageflip actually completes to report it.

2014-05-21 Thread Jamey Sharp
On Wed, May 21, 2014 at 05:24:18PM +0100, Chris Wilson wrote:
 On Wed, May 21, 2014 at 08:53:18AM -0700, Jamey Sharp wrote:
  Please merge this patch, which fixes two spec violations that make
  OML_sync_control unusable; and if you're concerned about uncomposited
  triple-buffering in UXA, please find a less awful way to get it.
 
 Why not just change the default to double buffering? Or fix it
 correctly?

This patch *is* fixing it correctly. I don't understand the buffer
management well enough to implement triple buffering in your driver
though, sorry; all I know is that what's there now isn't it.

Jamey


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[Intel-gfx] [PATCH] UXA: Wait until a pageflip actually completes to report it.

2014-05-07 Thread Jamey Sharp
UXA was reporting page-flip completion as soon as the flip was scheduled
with the kernel, instead of waiting for the kernel to indicate that the
flip had actually completed.

Moving the DRI2SwapComplete call to the right place fixes all of our
Piglit tests for OML_sync_control when run on xf86-video-intel/UXA,
aside from a bit of difficult-to-reproduce flakiness when using a
divisor  1.

This also eliminates a compile-time and run-time warning when built
against an xserver with Warn on DRI2SwapComplete with constant UST/MSC
applied.

Signed-off-by: Jamey Sharp ja...@minilop.net
Cc: Theo Hill theo0...@gmail.com
Cc: Eric Anholt e...@anholt.net
---
 src/uxa/intel_dri.c | 10 ++
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/src/uxa/intel_dri.c b/src/uxa/intel_dri.c
index ca58052..3745767 100644
--- a/src/uxa/intel_dri.c
+++ b/src/uxa/intel_dri.c
@@ -932,10 +932,6 @@ I830DRI2ScheduleFlip(struct intel_screen_private *intel,
 
/* Then flip DRI2 pointers and update the screen pixmap */
I830DRI2ExchangeBuffers(intel, info-front, info-back);
-   DRI2SwapComplete(info-client, draw, 0, 0, 0,
-DRI2_EXCHANGE_COMPLETE,
-info-event_complete,
-info-event_data);
return TRUE;
 }
 
@@ -1090,6 +1086,12 @@ void I830DRI2FlipEventHandler(unsigned int frame, 
unsigned int tv_sec,
assert(intel-pending_flip[flip_info-pipe] == flip_info);
intel-pending_flip[flip_info-pipe] = NULL;
 
+   DRI2SwapComplete(flip_info-client, drawable,
+frame, tv_sec, tv_usec,
+DRI2_EXCHANGE_COMPLETE,
+flip_info-event_complete,
+flip_info-event_data);
+
chain = flip_info-chain;
if (chain) {
DrawablePtr chain_drawable = NULL;
-- 
1.9.2

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Re: [Intel-gfx] [PATCH] UXA: Wait until a pageflip actually completes to report it.

2014-05-07 Thread Jamey Sharp
On Wed, May 07, 2014 at 04:55:18PM +0100, Chris Wilson wrote:
 On Mon, May 05, 2014 at 11:05:07PM -0700, Jamey Sharp wrote:
  UXA was reporting page-flip completion as soon as the flip was scheduled
  with the kernel, instead of waiting for the kernel to indicate that the
  flip had actually completed.
  
  Moving the DRI2SwapComplete call to the right place fixes all of our
  Piglit tests for OML_sync_control when run on xf86-video-intel/UXA,
  aside from a bit of difficult-to-reproduce flakiness when using a
  divisor  1.
 
 The violation is intentional, as it gives us triple buffering by
 default. It can be disabled.

As far as I can tell, this patch has no effect on triple-buffering. I
verified that by logging new_front-handle in intel_do_pageflip: It
rotates through three different BO's on successive flips.

Jamey


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