Re: [PATCH] drm/i915/dp_mst: Fix DSC input BPP computation
On Wed, 2024-06-12 at 18:22 +0300, Imre Deak wrote: > On Wed, Jun 12, 2024 at 04:35:36PM +0300, Luca Coelho wrote: > > Hi Imre, > > > > On Tue, 2024-06-11 at 18:33 +0300, Imre Deak wrote: > > > The branch or sink device decompressing a stream may have a limitation > > > on the input/uncompressed BPP, which is lower than the base line BPP > > > (determined by the sink's EDID). In some cases a stream with an input > > > BPP higher than this limit will be converted automatically by the device > > > decompressing the stream, by truncating the BPP, however in some cases > > > - seen at least in Dell dock's DP->HDMI converters - the decompression > > > will fail. > > > > > > Fix the above by limiting the input BPP correctly. This is done already > > > correctly for SST outputs. > > > > > > Signed-off-by: Imre Deak > > > --- > > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++ > > > 1 file changed, 2 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > index 00fdcbc28e9b7..15c20bedea091 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > @@ -349,6 +349,8 @@ static int > > > intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder, > > > if (max_bpp > sink_max_bpp) > > > max_bpp = sink_max_bpp; > > > > > > + crtc_state->pipe_bpp = max_bpp; > > > + > > > max_compressed_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, > > > crtc_state, > > > max_bpp / 3); > > > > Wouldn't it be better to make the assignment in > > intel_dp_dsc_sink_max_compressed_bpp(), since that function is already > > making modifications to crtc_state? > > Agreed, this is less than ideal atm. The whole MST DSC state computation > would need a refactor, at least to sanitize it wrt. the MST/non-DSC and > the SST DSC counterparts (also planned by others). Hence, it made sense > to keep this fix simple. I'm totally for simple fixes! > Also, the rational I saw for this way was that the input/uncompressed > bpp (max_bpp above), which isn't relavant in the non-DSC case, is > computed in intel_dp_dsc_mst_compute_link_config() and > intel_dp_mst_find_vcpi_slots_for_bpp() would only compute the > output/compressed bpp (relevant to both DSC and non-DSC case). Imo in > the end the computation for these two cases should be separated into > their own functions, instead of passing a 'bool dsc' param to a common > function handling both cases. Makes sense. It's best to avoid this sort of boolean that changes the function's semantics. > > There is another caller, but I think it may benefit from the same check. > > For the non-DSC case the above limit doesn't apply (at least I'm not > aware of it). Yeah, but AFAICT, in this case, it wouldn't really matter, right? The remote's max_bpp would never be greater than the current one in this case. > > But this is just a nitpick. Either way, you have: > > > > Reviewed-by: Luca Coelho > > Thanks! -- Cheers, Luca.
Re: [PATCH] drm/i915/dp_mst: Fix DSC input BPP computation
Hi Imre, On Tue, 2024-06-11 at 18:33 +0300, Imre Deak wrote: > The branch or sink device decompressing a stream may have a limitation > on the input/uncompressed BPP, which is lower than the base line BPP > (determined by the sink's EDID). In some cases a stream with an input > BPP higher than this limit will be converted automatically by the device > decompressing the stream, by truncating the BPP, however in some cases > - seen at least in Dell dock's DP->HDMI converters - the decompression > will fail. > > Fix the above by limiting the input BPP correctly. This is done already > correctly for SST outputs. > > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index 00fdcbc28e9b7..15c20bedea091 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -349,6 +349,8 @@ static int intel_dp_dsc_mst_compute_link_config(struct > intel_encoder *encoder, > if (max_bpp > sink_max_bpp) > max_bpp = sink_max_bpp; > > + crtc_state->pipe_bpp = max_bpp; > + > max_compressed_bpp = intel_dp_dsc_sink_max_compressed_bpp(connector, > crtc_state, > max_bpp / 3); Wouldn't it be better to make the assignment in intel_dp_dsc_sink_max_compressed_bpp(), since that function is already making modifications to crtc_state? There is another caller, but I think it may benefit from the same check. But this is just a nitpick. Either way, you have: Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: ✗ Fi.CI.IGT: failure for drm/i915: prevent some static analyzer warnings
Hi, All these 3 new issues are false positives and not related to this patchset. Can you please re-report it? -- Cheers, Luca. On Wed, 2024-05-29 at 03:28 +, Patchwork wrote: > Patch Details > Series:drm/i915: prevent some static analyzer warnings > URL:https://patchwork.freedesktop.org/series/134124/ > State:failure > Details: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_134124v1/index.html > CI Bug Log - changes from CI_DRM_14831_full -> > Patchwork_134124v1_fullSummaryFAILURE > Serious unknown changes coming with Patchwork_134124v1_full > absolutely need to be > verified manually. > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_134124v1_full, please notify your bug team > (i915-ci-in...@lists.freedesktop.org) to allow them > to document this new failure mode, which will reduce false positives > in CI. > Participating hosts (9 -> 9)No changes in participating hosts > Possible new issuesHere are the unknown changes that may have been introduced > in > Patchwork_134124v1_full: > IGT changesPossible regressions * > igt@device_reset@cold-reset-bound:shard-dg2: NOTRUN -> SKIP > * igt@gem_spin_batch@legacy@blt:shard-snb: PASS -> ABORT > * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw- >blt:shard-dg1: PASS -> INCOMPLETE > Known issuesHere are the changes found in Patchwork_134124v1_full that come > from > known issues: > IGT changesIssues hit * igt@drm_fdinfo@all-busy-idle-check-all:shard-dg1: > NOTRUN -> SKIP >(i915#8414) > * igt@drm_fdinfo@most-busy-check-all@bcs0:shard-dg2: NOTRUN -> SKIP >(i915#8414) +28 other tests skip > * igt@drm_fdinfo@virtual-busy-idle-all:shard-mtlp: NOTRUN -> SKIP >(i915#8414) > * igt@gem_ccs@block-copy-compressed:shard-rkl: NOTRUN -> SKIP >(i915#3555 / i915#9323) > * igt@gem_ccs@block-multicopy-compressed:shard-rkl: NOTRUN -> SKIP >(i915#9323)shard-mtlp: NOTRUN -> SKIP (i915#9323) > * igt@gem_ccs@ctrl-surf-copy-new-ctx:shard-dg1: NOTRUN -> SKIP >(i915#9323) > * igt@gem_create@create-ext-cpu-access-big:shard-mtlp: NOTRUN -> SKIP >(i915#6335)shard-rkl: NOTRUN -> SKIP (i915#6335) > * igt@gem_ctx_sseu@invalid-sseu:shard-dg1: NOTRUN -> SKIP (i915#280) > * igt@gem_exec_balancer@bonded-dual:shard-dg2: NOTRUN -> SKIP >(i915#4771) > * igt@gem_exec_balancer@parallel-balancer:shard-rkl: NOTRUN -> SKIP >(i915#4525) +2 other tests skip > * igt@gem_exec_capture@capture-invisible@lmem0:shard-dg2: NOTRUN -> >SKIP (i915#6334) +1 other test skip > * igt@gem_exec_capture@capture-invisible@smem0:shard-glk: NOTRUN -> >SKIP (i915#6334) > * igt@gem_exec_capture@many-4k-incremental:shard-tglu: NOTRUN -> FAIL >(i915#9606) > * igt@gem_exec_capture@many-4k-zero:shard-rkl: NOTRUN -> FAIL >(i915#9606) > * igt@gem_exec_fair@basic-none-share@rcs0:shard-tglu: PASS -> FAIL >(i915#2842) > * igt@gem_exec_fair@basic-pace:shard-mtlp: NOTRUN -> SKIP (i915#4473 / >i915#4771) > * igt@gem_exec_fair@basic-pace-share@rcs0:shard-rkl: PASS -> FAIL >(i915#2842) > * igt@gem_exec_fair@basic-pace-solo:shard-dg2: NOTRUN -> SKIP >(i915#3539) > * igt@gem_exec_fair@basic-pace@vcs0:shard-rkl: NOTRUN -> FAIL >(i915#2842) > * igt@gem_exec_fence@submit3:shard-mtlp: NOTRUN -> SKIP (i915#4812) > * igt@gem_exec_fence@submit67:shard-dg2: NOTRUN -> SKIP (i915#4812) > * igt@gem_exec_flush@basic-batch-kernel-default-uc:shard-dg2: NOTRUN - >> SKIP (i915#3539 / i915#4852) +1 other test skip > * igt@gem_exec_flush@basic-wb-ro-default:shard-dg1: NOTRUN -> SKIP >(i915#3539 / i915#4852) > * igt@gem_exec_reloc@basic-active:shard-dg2: NOTRUN -> SKIP >(i915#2575) +83 other tests skip > * igt@gem_exec_reloc@basic-cpu:shard-dg1: NOTRUN -> SKIP (i915#3281) >+2 other tests skip > * igt@gem_exec_reloc@basic-cpu-active:shard-mtlp: NOTRUN -> SKIP >(i915#3281) +3 other tests skip > * igt@gem_exec_reloc@basic-cpu-gtt-noreloc:shard-dg2: NOTRUN -> SKIP >(i915#3281) +6 other tests skip > * igt@gem_exec_reloc@basic-write-read:shard-rkl: NOTRUN -> SKIP >(i915#3281) +11 other tests skip > * igt@gem_exec_schedule@preempt-queue-contexts:shard-mtlp: NOTRUN -> >SKIP (i915#4537 / i915#4812) > * igt@gem_exec_schedule@preempt-queue-contexts-chain:shard-dg2: NOTRUN >-> SKIP (i915#4537 / i915#4812) +1 other test skip > * igt@gem_fence_thrash@bo-write-verify-none:shard-dg2: NOTRUN -> SKIP >(i915#4860) > * igt@gem_lmem_swapping@heavy-multi@lmem0:shard-dg1: PASS -> FAIL >(i915#10378)shard-dg2: PASS -> FAIL (i915#10378) > * igt@gem_lmem_swapping@massive:shard-dg2: NOTRUN -> SKIP (i915#9643) >+1 other test skip > * igt@gem_lmem_swapping@parallel-random-verify-ccs:shard-rkl: NOTRUN - >> SKIP (i915#4613) +2 other tests skipshard-glk: NOTRUN -> SKIP >(i915#4613) +2 other tests skip > * igt@gem_lmem_swapping@verify-random-ccs@lmem0:shard-dg1: NOTRUN -> >SKIP (i915#4565) > * igt@gem_media_vme:shard-mtlp: NOTRUN -> SKIP
[PATCH 2/2] drm/i915: move uapi.event outside spinlock in intel_crtc_vblank_work
In intel_crtc_vblank_work(), we access uapi.event before grabbing the
event_lock spinlock, but modify it inside the spinlock block. This
causes some static analyzers to get confused and issue a warning.
The uapi.event value is not protected by the event_lock, so we can
safely move it out of the protected block to prevent false positives.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_crtc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crtc.c
b/drivers/gpu/drm/i915/display/intel_crtc.c
index ca6dc1dc56c8..bf6e74e99f5c 100644
--- a/drivers/gpu/drm/i915/display/intel_crtc.c
+++ b/drivers/gpu/drm/i915/display/intel_crtc.c
@@ -411,8 +411,8 @@ static void intel_crtc_vblank_work(struct kthread_work
*base)
if (crtc_state->uapi.event) {
spin_lock_irq(>base.dev->event_lock);
drm_crtc_send_vblank_event(>base, crtc_state->uapi.event);
- crtc_state->uapi.event = NULL;
spin_unlock_irq(>base.dev->event_lock);
+ crtc_state->uapi.event = NULL;
}
trace_intel_crtc_vblank_work_end(crtc);
--
2.39.2
[PATCH 1/2] drm/i915/bios: double check array-boundary in parse_sdvo_lvds_data
During static analysis, a concern was raised that we may access the
dtd->dtd[] array out of bounds, because we are not checking whether
the index we use is larger than the array.
This should not be a problem as is, because the enumeration that is
used for this index comes from "panel_type", which uses an enumeration
with 4 items. But if this enumeration is ever changed, it can lead to
hard-to-detect bugs, so better double-check it before using it as an
index to the array.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_bios.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index b0a49b2f957f..128fe9250f40 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1120,6 +1120,18 @@ parse_sdvo_lvds_data(struct drm_i915_private *i915,
if (!dtd)
return;
+ /*
+* This should not happen, as long as the panel_type
+* enumeration doesn't grow over 4 items. But if it does, it
+* could lead to hard-to-detect bugs, so better double-check
+* it here to be sure.
+*/
+ if (index >= ARRAY_SIZE(dtd->dtd)) {
+ drm_err(>drm, "index %d is larger than dtd->dtd[4]
array\n",
+ index);
+ return;
+ }
+
panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
if (!panel_fixed_mode)
return;
--
2.39.2
[PATCH 0/2] drm/i915: prevent some static analyzer warnings
Hi, Here's a couple of patches to prevent some static analyzer warnings. They are not really an issue as is, but with these two patches the code will be cleaner and a bit safer, while at the same time silencing these warnings. Plese review. Cheers, Luca. Luca Coelho (2): drm/i915/bios: double check array-boundary in parse_sdvo_lvds_data drm/i915: move uapi.event outside spinlock in intel_crtc_vblank_work drivers/gpu/drm/i915/display/intel_bios.c | 12 drivers/gpu/drm/i915/display/intel_crtc.c | 2 +- 2 files changed, 13 insertions(+), 1 deletion(-) -- 2.39.2
Re: ✗ Fi.CI.IGT: failure for Documentation/i915: remove kernel-doc for DMC wakelocks
Hi,
There is no way that the tests that are failing in the shards have
anything to do with the small documentation change that is in my patch.
Can you please re-report?
Thanks!
--
Cheers,
Luca.
On Sat, 2024-05-11 at 01:02 +, Patchwork wrote:
> Patch Details
> Series:Documentation/i915: remove kernel-doc for DMC wakelocks
> URL:https://patchwork.freedesktop.org/series/133435/
> State:failure
> Details:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_133435v1/index.html
> CI Bug Log - changes from CI_DRM_14746_full ->
> Patchwork_133435v1_fullSummaryFAILURE
> Serious unknown changes coming with Patchwork_133435v1_full
> absolutely need to be
> verified manually.
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_133435v1_full, please notify your bug team
> ('i915-ci-in...@lists.freedesktop.org') to allow them
> to document this new failure mode, which will reduce false positives
> in CI.
> Participating hosts (9 -> 9)No changes in participating hosts
> Possible new issuesHere are the unknown changes that may have been introduced
> in
> Patchwork_133435v1_full:
> IGT changesPossible regressions * igt@gem_eio@in-flight-10ms:shard-dg1:
> NOTRUN -> INCOMPLETE
> * igt@kms_flip@flip-vs-panning-vs-hang@c-hdmi-a1:shard-glk: NOTRUN ->
>INCOMPLETE
> Known issuesHere are the changes found in Patchwork_133435v1_full that come
> from
> known issues:
> IGT changesIssues hit * igt@debugfs_test@basic-hwmon:shard-rkl: NOTRUN ->
> SKIP (i915#9318)
> * igt@drm_fdinfo@busy-idle@vcs1:shard-dg1: NOTRUN -> SKIP (i915#8414)
>+4 other tests skip
> * igt@gem_bad_reloc@negative-reloc-bltcopy:shard-dg2: NOTRUN -> SKIP
>(i915#3281) +1 other test skip
> * igt@gem_ccs@block-multicopy-compressed:shard-rkl: NOTRUN -> SKIP
>(i915#9323)
> * igt@gem_ccs@suspend-resume:shard-dg1: NOTRUN -> SKIP (i915#9323) +1
>other test skip
> * igt@gem_ctx_persistence@heartbeat-close:shard-dg1: NOTRUN -> SKIP
>(i915#8555)
> * igt@gem_ctx_sseu@engines:shard-dg2: NOTRUN -> SKIP (i915#280)
> * igt@gem_ctx_sseu@mmap-args:shard-tglu: NOTRUN -> SKIP (i915#280)
> * igt@gem_exec_balancer@bonded-sync:shard-dg1: NOTRUN -> SKIP
>(i915#4771)
> * igt@gem_exec_balancer@parallel-bb-first:shard-rkl: NOTRUN -> SKIP
>(i915#4525)
> * igt@gem_exec_fair@basic-pace:shard-dg1: NOTRUN -> SKIP (i915#3539)
> * igt@gem_exec_fair@basic-pace@rcs0:shard-rkl: PASS -> FAIL
>(i915#2842) +2 other tests fail
> * igt@gem_exec_fence@submit67:shard-dg2: NOTRUN -> SKIP (i915#4812)
> * igt@gem_exec_flush@basic-batch-kernel-default-wb:shard-dg1: NOTRUN -
>> SKIP (i915#3539 / i915#4852) +2 other tests skip
> * igt@gem_exec_flush@basic-uc-pro-default:shard-dg2: NOTRUN -> SKIP
>(i915#3539 / i915#4852)
> * igt@gem_exec_reloc@basic-gtt-wc-active:shard-rkl: NOTRUN -> SKIP
>(i915#3281) +6 other tests skip
> * igt@gem_exec_reloc@basic-wc-gtt-noreloc:shard-dg1: NOTRUN -> SKIP
>(i915#3281) +3 other tests skip
> * igt@gem_fence_thrash@bo-copy:shard-dg2: NOTRUN -> SKIP (i915#4860)
>+1 other test skip
> * igt@gem_lmem_swapping@heavy-verify-multi-ccs:shard-mtlp: NOTRUN ->
>SKIP (i915#4613)
> * igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0:shard-dg2: PASS
>-> FAIL (i915#10378)
> * igt@gem_lmem_swapping@heavy-verify-random@lmem0:shard-dg1: PASS ->
>INCOMPLETE (i915#10317 / i915#1982)
> * igt@gem_lmem_swapping@massive:shard-tglu: NOTRUN -> SKIP (i915#4613)
> * igt@gem_lmem_swapping@parallel-multi:shard-rkl: NOTRUN -> SKIP
>(i915#4613) +2 other tests skip
> * igt@gem_lmem_swapping@random:shard-glk: NOTRUN -> SKIP (i915#4613)
> * igt@gem_lmem_swapping@smem-oom@lmem0:shard-dg2: PASS -> TIMEOUT
>(i915#5493)
> * igt@gem_mmap_gtt@basic-small-copy-odd:shard-dg1: NOTRUN -> SKIP
>(i915#4077) +5 other tests skip
> * igt@gem_mmap_gtt@basic-write-read-distinct:shard-dg2: NOTRUN -> SKIP
>(i915#4077) +1 other test skip
> * igt@gem_mmap_wc@write-read:shard-dg1: NOTRUN -> SKIP (i915#4083) +4
>other tests skip
> * igt@gem_partial_pwrite_pread@writes-after-reads-display:shard-dg2:
>NOTRUN -> SKIP (i915#3282) +2 other tests skip
> * igt@gem_pxp@reject-modify-context-protection-off-3:shard-dg1: NOTRUN
>-> SKIP (i915#4270) +2 other tests skip
> * igt@gem_pxp@verify-pxp-execution-after-suspend-resume:shard-dg2:
>NOTRUN -> SKIP (i915#4270)
> * igt@gem_pxp@verify-pxp-stale-buf-optout-execution:shard-rkl: NOTRUN
>-> SKIP (i915#4270) +2 other tests skip
> * igt@gem_readwrite@read-bad-handle:shard-rkl: NOTRUN -> SKIP
>(i915#3282) +4 other tests skip
> * igt@gem_readwrite@write-bad-handle:shard-dg1: NOTRUN -> SKIP
>(i915#3282)
> * igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-yf-tiled:shard-dg2:
>NOTRUN -> SKIP (i915#5190 / i915#8428) +1 other test skip
> * igt@gem_unfence_active_buffers:shard-dg1: NOTRUN -> SKIP (i915#4879)
> * igt@gem_userptr_blits@dmabuf-unsync:shard-dg1: NOTRUN -> SKIP
>(i915#3297)
> *
Re: [PATCH] Documentation/i915: remove kernel-doc for DMC wakelocks
On Fri, 2024-05-10 at 12:21 +0300, Jani Nikula wrote: > On Fri, 10 May 2024, Luca Coelho wrote: > > The function descriptions are optional and have not yet been added to > > the DMC wakelock code, so we shouldn't try to use it. Since this is a > > regression, remove the kernel-doc entry for DMC wakelocks for now. > > The proper documentation will be added in a future patch. > > I don't really think the kernel-doc documentation is necessary for > internal interfaces. I mean adding brief comments is fine, but no need > for this stuff to show up at docs.kernel.org. Good, one more thing out of my TODO list. ;) > Reviewed-by: Jani Nikula Thanks for the quick review! -- Cheers, Luca.
[PATCH] Documentation/i915: remove kernel-doc for DMC wakelocks
The function descriptions are optional and have not yet been added to
the DMC wakelock code, so we shouldn't try to use it. Since this is a
regression, remove the kernel-doc entry for DMC wakelocks for now.
The proper documentation will be added in a future patch.
Fixes: 765425f598c2 ("drm/i915/display: add support for DMC wakelocks")
Signed-off-by: Luca Coelho
---
Documentation/gpu/i915.rst | 3 ---
1 file changed, 3 deletions(-)
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 17261ba18313..3113e36f14cf 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -210,9 +210,6 @@ DMC wakelock support
.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c
:doc: DMC wakelock support
-.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c
- :internal:
-
Video BIOS Table (VBT)
--
--
2.39.2
Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks
On Wed, 2024-04-17 at 12:42 +0300, Jani Nikula wrote: > On Mon, 15 Apr 2024, Luca Coelho wrote: > > Thanks a lot for your reviews! Now I just need to get someone to merge > > this series, since I don't have commit rights to the repo yet. > > Thanks for the patches and review, merged to drm-intel-next with a > slightly heavy heart because it sets me back with [1] in a pretty > annoying way. Oh well. > > BR, > Jani. > > [1] > https://lore.kernel.org/r/0b48d6bebfe90aa2f901a05be8279ed887d99d7a.1712665176.git.jani.nik...@intel.com Oh, no! But you do have cocci and scripts, so it should be easy? Let me know if I can help you rebase your change. In any case, thanks for merging my patches! -- Cheers, Luca.
Re: ✗ Fi.CI.BAT: failure for drm/i915: limit eDP MSO pipe only for display version 20 and below (rev4)
Hi, The skip in igt@kms_cursor_legacy@basic-flip-before-cursor-atomic on fi-rkl-11600 is not related to my patch. There doesn't seem to be any displays connected to that machine at the moment and all runs are failing, for example the latest run with CI_DRM_14591. Same thing with the other "new" skips. Can you please mark my run as not really failing? -- Cheers, Luca. On Tue, 2024-04-16 at 09:54 +, Patchwork wrote: > Patch Details > Series:drm/i915: limit eDP MSO pipe only for display version 20 and > below (rev4) > URL:https://patchwork.freedesktop.org/series/129123/ > State:failure > Details: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129123v4/index.html > CI Bug Log - changes from CI_DRM_14583 -> Patchwork_129123v4SummaryFAILURE > Serious unknown changes coming with Patchwork_129123v4 absolutely > need to be > verified manually. > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_129123v4, please notify your bug team (I915- > ci-in...@lists.freedesktop.org) to allow them > to document this new failure mode, which will reduce false positives > in CI. > External URL: https://intel-gfx-ci.01.org/tree/drm- > tip/Patchwork_129123v4/index.html > Participating hosts (37 -> 33)Additional (4): bat-dg1-7 bat-kbl-2 > fi-cfl-8109u bat-arls-2 > Missing (8): fi-kbl-7567u fi-apl-guc fi-snb-2520m fi-glk-j4005 bat- > atsm-1 fi-elk-e7500 bat-dg2-11 bat-mtlp-6 > Possible new issuesHere are the unknown changes that may have been introduced > in > Patchwork_129123v4: > IGT changesPossible regressions * > igt@kms_cursor_legacy@basic-flip-before-cursor-atomic:fi-rkl-11600: >PASS -> SKIP +5 other tests skip > * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24:fi-rkl-11600: >NOTRUN -> SKIP +11 other tests skip > Warnings * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:fi-rkl- >11600: SKIP (i915#4103) -> SKIP +1 other test skip > * igt@kms_dsc@dsc-basic:fi-rkl-11600: SKIP (i915#3555 / i915#3840) -> >SKIP > Known issuesHere are the changes found in Patchwork_129123v4 that come from > known > issues: > IGT changesIssues hit * igt@debugfs_test@basic-hwmon:bat-arls-2: NOTRUN -> > SKIP (i915#9318) > * igt@fbdev@eof:fi-rkl-11600: PASS -> SKIP (i915#2582) +3 other tests >skip > * igt@fbdev@info:fi-rkl-11600: PASS -> SKIP (i915#1849 / >i915#2582)bat-kbl-2: NOTRUN -> SKIP (i915#1849) > * igt@gem_huc_copy@huc-copy:fi-cfl-8109u: NOTRUN -> SKIP (i915#2190) > * igt@gem_lmem_swapping@parallel-random-engines:bat-kbl-2: NOTRUN -> >SKIP +39 other tests skip > * igt@gem_lmem_swapping@verify-random:fi-cfl-8109u: NOTRUN -> SKIP >(i915#4613) +3 other tests skipbat-arls-2: NOTRUN -> SKIP >(i915#10213) +3 other tests skip > * igt@gem_mmap@basic:bat-dg1-7: NOTRUN -> SKIP (i915#4083)bat-arls-2: >NOTRUN -> SKIP (i915#4083) > * igt@gem_mmap_gtt@basic:bat-arls-2: NOTRUN -> SKIP (i915#10196 / >i915#4077) +2 other tests skip > * igt@gem_render_tiled_blits@basic:bat-arls-2: NOTRUN -> SKIP >(i915#10197 / i915#10211 / i915#4079) > * igt@gem_tiled_fence_blits@basic:bat-dg1-7: NOTRUN -> SKIP >(i915#4077) +2 other tests skip > * igt@gem_tiled_pread_basic:bat-dg1-7: NOTRUN -> SKIP (i915#4079) +1 >other test skipbat-arls-2: NOTRUN -> SKIP (i915#10206 / i915#4079) > * igt@i915_pm_rps@basic-api:bat-dg1-7: NOTRUN -> SKIP (i915#6621)bat- >arls-2: NOTRUN -> SKIP (i915#10209) > * igt@i915_selftest@live@hangcheck:bat-adls-6: NOTRUN -> DMESG-WARN >(i915#5591) > * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:bat-dg1-7: >NOTRUN -> SKIP (i915#4212) +7 other tests skip > * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:bat-arls-2: NOTRUN >-> SKIP (i915#10200) +9 other tests skip > * igt@kms_addfb_basic@basic-y-tiled-legacy:bat-dg1-7: NOTRUN -> SKIP >(i915#4215) > * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:bat-arls- >2: NOTRUN -> SKIP (i915#10202) +1 other test skipbat-dg1-7: NOTRUN - >> SKIP (i915#4103 / i915#4213) +1 other test skip > * igt@kms_dsc@dsc-basic:bat-arls-2: NOTRUN -> SKIP (i915#9886)bat-dg1- >7: NOTRUN -> SKIP (i915#3555 / i915#3840) > * igt@kms_force_connector_basic@force-load-detect:bat-arls-2: NOTRUN - >> SKIP (i915#10207)bat-dg1-7: NOTRUN -> SKIP > * igt@kms_frontbuffer_tracking@basic:fi-rkl-11600: PASS -> SKIP >(i915#1849 / i915#5354) > * igt@kms_hdmi_inject@inject-audio:bat-dg1-7: NOTRUN -> SKIP >(i915#433) > * igt@kms_pm_backlight@basic-brightness:bat-dg1-7: NOTRUN -> SKIP >(i915#5354)fi-cfl-8109u: NOTRUN -> SKIP +11 other tests skip > * igt@kms_psr@psr-primary-mmap-gtt@edp-1:bat-arls-2: NOTRUN -> SKIP >(i915#10196 / i915#4077 / i915#9688) > * igt@kms_psr@psr-primary-page-flip:bat-dg1-7: NOTRUN -> SKIP >(i915#1072 / i915#9732) +3 other tests skip > * igt@kms_setmode@basic-clone-single-crtc:bat-arls-2: NOTRUN -> SKIP >(i915#10208 / i915#8809)bat-dg1-7: NOTRUN -> SKIP (i915#3555) > *
Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks
On Mon, 2024-04-15 at 05:05 +, Shankar, Uma wrote: > > > -Original Message- > > From: Luca Coelho > > Sent: Friday, April 12, 2024 5:57 PM > > To: Shankar, Uma ; Coelho, Luciano > > ; intel-gfx@lists.freedesktop.org > > Cc: intel...@lists.freedesktop.org; ville.syrj...@linux.intel.com; Nikula, > > Jani > > > > Subject: Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks > > > > On Fri, 2024-04-12 at 10:30 +, Shankar, Uma wrote: > > > > > > > -Original Message- > > > > From: Coelho, Luciano > > > > Sent: Friday, April 12, 2024 3:12 PM > > > > To: intel-gfx@lists.freedesktop.org > > > > Cc: intel...@lists.freedesktop.org; Shankar, Uma > > > > ; ville.syrj...@linux.intel.com; Nikula, Jani > > > > > > > > Subject: [PATCH v5 1/4] drm/i915/display: add support for DMC > > > > wakelocks > > > > > > > > In order to reduce the DC5->DC2 restore time, wakelocks have been > > > > introduced in DMC so the driver can tell it when registers and other > > > > memory areas are going to be accessed and keep their respective blocks > > awake. > > > > > > > > Implement this in the driver by adding the concept of DMC wakelocks. > > > > When the driver needs to access memory which lies inside pre-defined > > > > ranges, it will tell DMC to set the wakelock, access the memory, > > > > then wait for a while and clear the wakelock. > > > > > > > > The wakelock state is protected in the driver with spinlocks to > > > > prevent concurrency issues. > > > > > > Hi Luca, > > > Seems you missed to add the version history. > > > > I've been sending the version history in the cover letter, because I don't > > think it > > adds any information after it gets to the mainline kernel. The history is > > lost > > anyway, so the mailing list is a better place to store it (it's unique and > > meaningful > > there). > > Its matter of preference, but being part of the patch's commit message it > stays with it > and can be checked with a git show. Cover letter details gets lost though as > it doesn't > end up in the tree. Yes, but the change history in the commit message doesn't tell the full story. If I write, for instance, "In v2: refactor intel_foo_bar()", there's no way to know what it looked like before. That's why I think that, if we want to keep the version history accessible from the git tree, we should have a link to the mailing list discussions, as apparently we do in most cases anyway. > > Bur as I said to someone else before, I can add it to the commit message if > > you > > think that it's needed. > > Not needed Luca, it was a simple nitpick . You can skip that. Thanks for pointing out, anyway! I don't want to keep flaming about this, so I'll just try to remember to add it next time, so it doesn't come up again. > > > > > > Anyways, changes look good to me. > > > Reviewed-by: Uma Shankar > > > > Thanks a lot! > > > > Though you didn't review patch 3/4, the one about the module parameter. > > Was that intentional or did you just miss it? > > I think I have reviewed and RB'ed it. The entire series is RB'ed now. Oh, right. "Someone" was not paying attention. I even already had the r-b in the commit message itself. Silly me. Thanks a lot for your reviews! Now I just need to get someone to merge this series, since I don't have commit rights to the repo yet. -- Cheers, Luca.
Re: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks
On Fri, 2024-04-12 at 10:30 +, Shankar, Uma wrote: > > > -Original Message- > > From: Coelho, Luciano > > Sent: Friday, April 12, 2024 3:12 PM > > To: intel-gfx@lists.freedesktop.org > > Cc: intel...@lists.freedesktop.org; Shankar, Uma ; > > ville.syrj...@linux.intel.com; Nikula, Jani > > Subject: [PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks > > > > In order to reduce the DC5->DC2 restore time, wakelocks have been introduced > > in DMC so the driver can tell it when registers and other memory areas are > > going > > to be accessed and keep their respective blocks awake. > > > > Implement this in the driver by adding the concept of DMC wakelocks. > > When the driver needs to access memory which lies inside pre-defined > > ranges, it > > will tell DMC to set the wakelock, access the memory, then wait for a while > > and > > clear the wakelock. > > > > The wakelock state is protected in the driver with spinlocks to prevent > > concurrency issues. > > Hi Luca, > Seems you missed to add the version history. I've been sending the version history in the cover letter, because I don't think it adds any information after it gets to the mainline kernel. The history is lost anyway, so the mailing list is a better place to store it (it's unique and meaningful there). Bur as I said to someone else before, I can add it to the commit message if you think that it's needed. > > Anyways, changes look good to me. > Reviewed-by: Uma Shankar Thanks a lot! Though you didn't review patch 3/4, the one about the module parameter. Was that intentional or did you just miss it? -- Cheers, Luca.
[PATCH v5 3/4] drm/i915/display: add module parameter to enable DMC wakelock
This feature should be disabled by default until properly tested and
mature. Add a module parameter to enable the feature for testing,
while keeping it disabled by default for now.
Reviewed-by: Uma Shankar
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display_params.c | 5 +
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 6 --
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
b/drivers/gpu/drm/i915/display/intel_display_params.c
index 11e03cfb774d..f40b223cc8a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -116,6 +116,11 @@ intel_display_param_named_unsafe(enable_psr2_sel_fetch,
bool, 0400,
"(0=disabled, 1=enabled) "
"Default: 1");
+intel_display_param_named_unsafe(enable_dmc_wl, bool, 0400,
+ "Enable DMC wakelock "
+ "(0=disabled, 1=enabled) "
+ "Default: 0");
+
__maybe_unused
static void _param_print_bool(struct drm_printer *p, const char *driver_name,
const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
b/drivers/gpu/drm/i915/display/intel_display_params.h
index 6206cc51df04..bf8dbbdb20a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -46,6 +46,7 @@ struct drm_i915_private;
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
param(bool, enable_psr2_sel_fetch, true, 0400) \
+ param(bool, enable_dmc_wl, false, 0400) \
#define MEMBER(T, member, ...) T member;
struct intel_display_params {
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index bc3f3d6dfe10..30f8905fae41 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -109,7 +109,8 @@ static bool intel_dmc_wl_check_range(u32 address)
static bool __intel_dmc_wl_supported(struct drm_i915_private *i915)
{
if (DISPLAY_VER(i915) < 20 ||
- !intel_dmc_has_payload(i915))
+ !intel_dmc_has_payload(i915) ||
+ !i915->display.params.enable_dmc_wl)
return false;
return true;
@@ -120,7 +121,8 @@ void intel_dmc_wl_init(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
/* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */
- if (DISPLAY_VER(i915) < 20)
+ if (DISPLAY_VER(i915) < 20 ||
+ !i915->display.params.enable_dmc_wl)
return;
INIT_DELAYED_WORK(>work, intel_dmc_wl_work);
--
2.39.2
[PATCH v5 4/4] drm/i915/display: tie DMC wakelock to DC5/6 state transitions
We only need DMC wakelocks when we allow DC5 and DC6 states. Add the calls to enable and disable DMC wakelock accordingly. Reviewed-by: Uma Shankar Signed-off-by: Luca Coelho --- drivers/gpu/drm/i915/display/intel_display_power_well.c | 7 +++ drivers/gpu/drm/i915/display/intel_dmc.c| 4 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c index e4de40228997..7f4b7602cf02 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c @@ -17,6 +17,7 @@ #include "intel_dkl_phy.h" #include "intel_dkl_phy_regs.h" #include "intel_dmc.h" +#include "intel_dmc_wl.h" #include "intel_dp_aux_regs.h" #include "intel_dpio_phy.h" #include "intel_dpll.h" @@ -821,6 +822,8 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); + intel_dmc_wl_enable(dev_priv); + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5); } @@ -850,6 +853,8 @@ void skl_enable_dc6(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); + intel_dmc_wl_enable(dev_priv); + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); } @@ -970,6 +975,8 @@ void gen9_disable_dc_states(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; + intel_dmc_wl_disable(dev_priv); + intel_cdclk_get_cdclk(dev_priv, _config); /* Can't read out voltage_level so can't use intel_cdclk_changed() */ drm_WARN_ON(_priv->drm, diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index e61e9c1b8947..a34ff3383fd3 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -552,6 +552,8 @@ void intel_dmc_disable_program(struct drm_i915_private *i915) pipedmc_clock_gating_wa(i915, true); disable_all_event_handlers(i915); pipedmc_clock_gating_wa(i915, false); + + intel_dmc_wl_disable(i915); } void assert_dmc_loaded(struct drm_i915_private *i915) @@ -1081,6 +1083,8 @@ void intel_dmc_suspend(struct drm_i915_private *i915) if (dmc) flush_work(>work); + intel_dmc_wl_disable(i915); + /* Drop the reference held in case DMC isn't loaded. */ if (!intel_dmc_has_payload(i915)) intel_dmc_runtime_pm_put(i915); -- 2.39.2
[PATCH v5 2/4] drm/i915/display: don't allow DMC wakelock on older hardware
Only allow running DMC wakelock code if the display version is 20 or
greater. Also check if DMC is loaded before enabling.
Reviewed-by: Uma Shankar
Signed-off-by: Luca Coelho
---
.../drm/i915/display/intel_display_driver.c | 1 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 26 +++
2 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 87dd07e0d138..e4015557af6a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -198,6 +198,7 @@ void intel_display_driver_early_probe(struct
drm_i915_private *i915)
intel_dpll_init_clock_hook(i915);
intel_init_display_hooks(i915);
intel_fdi_init_hook(i915);
+ intel_dmc_wl_init(i915);
}
/* part #1: call before irq install */
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index abe875690e70..bc3f3d6dfe10 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -6,6 +6,7 @@
#include
#include "intel_de.h"
+#include "intel_dmc.h"
#include "intel_dmc_regs.h"
#include "intel_dmc_wl.h"
@@ -105,10 +106,23 @@ static bool intel_dmc_wl_check_range(u32 address)
return wl_needed;
}
+static bool __intel_dmc_wl_supported(struct drm_i915_private *i915)
+{
+ if (DISPLAY_VER(i915) < 20 ||
+ !intel_dmc_has_payload(i915))
+ return false;
+
+ return true;
+}
+
void intel_dmc_wl_init(struct drm_i915_private *i915)
{
struct intel_dmc_wl *wl = >display.wl;
+ /* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */
+ if (DISPLAY_VER(i915) < 20)
+ return;
+
INIT_DELAYED_WORK(>work, intel_dmc_wl_work);
spin_lock_init(>lock);
refcount_set(>refcount, 0);
@@ -119,6 +133,9 @@ void intel_dmc_wl_enable(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
+ if (!__intel_dmc_wl_supported(i915))
+ return;
+
spin_lock_irqsave(>lock, flags);
if (wl->enabled)
@@ -143,6 +160,9 @@ void intel_dmc_wl_disable(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
+ if (!__intel_dmc_wl_supported(i915))
+ return;
+
flush_delayed_work(>work);
spin_lock_irqsave(>lock, flags);
@@ -166,6 +186,9 @@ void intel_dmc_wl_get(struct drm_i915_private *i915,
i915_reg_t reg)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
+ if (!__intel_dmc_wl_supported(i915))
+ return;
+
if (!intel_dmc_wl_check_range(reg.reg))
return;
@@ -211,6 +234,9 @@ void intel_dmc_wl_put(struct drm_i915_private *i915,
i915_reg_t reg)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
+ if (!__intel_dmc_wl_supported(i915))
+ return;
+
if (!intel_dmc_wl_check_range(reg.reg))
return;
--
2.39.2
[PATCH v5 1/4] drm/i915/display: add support for DMC wakelocks
In order to reduce the DC5->DC2 restore time, wakelocks have been
introduced in DMC so the driver can tell it when registers and other
memory areas are going to be accessed and keep their respective blocks
awake.
Implement this in the driver by adding the concept of DMC wakelocks.
When the driver needs to access memory which lies inside pre-defined
ranges, it will tell DMC to set the wakelock, access the memory, then
wait for a while and clear the wakelock.
The wakelock state is protected in the driver with spinlocks to
prevent concurrency issues.
BSpec: 71583
Signed-off-by: Luca Coelho
---
Documentation/gpu/i915.rst| 9 +
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_de.h | 97 +++-
.../gpu/drm/i915/display/intel_display_core.h | 2 +
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 234 ++
drivers/gpu/drm/i915/display/intel_dmc_wl.h | 31 +++
drivers/gpu/drm/xe/Makefile | 1 +
8 files changed, 373 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h
diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst
index 0ca1550fd9dc..17261ba18313 100644
--- a/Documentation/gpu/i915.rst
+++ b/Documentation/gpu/i915.rst
@@ -204,6 +204,15 @@ DMC Firmware Support
.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc.c
:internal:
+DMC wakelock support
+
+
+.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c
+ :doc: DMC wakelock support
+
+.. kernel-doc:: drivers/gpu/drm/i915/display/intel_dmc_wl.c
+ :internal:
+
Video BIOS Table (VBT)
--
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index af9e871daf1d..7cad944b825c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -266,6 +266,7 @@ i915-y += \
display/intel_display_rps.o \
display/intel_display_wa.o \
display/intel_dmc.o \
+ display/intel_dmc_wl.o \
display/intel_dpio_phy.o \
display/intel_dpll.o \
display/intel_dpll_mgr.o \
diff --git a/drivers/gpu/drm/i915/display/intel_de.h
b/drivers/gpu/drm/i915/display/intel_de.h
index ba7a1c6ebc2a..0a0fba81e7af 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -13,52 +13,125 @@
static inline u32
intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
{
- return intel_uncore_read(>uncore, reg);
+ u32 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = intel_uncore_read(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
}
static inline u8
intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)
{
- return intel_uncore_read8(>uncore, reg);
+ u8 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = intel_uncore_read8(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
}
static inline u64
intel_de_read64_2x32(struct drm_i915_private *i915,
i915_reg_t lower_reg, i915_reg_t upper_reg)
{
- return intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
+ u64 val;
+
+ intel_dmc_wl_get(i915, lower_reg);
+ intel_dmc_wl_get(i915, upper_reg);
+
+ val = intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
+
+ intel_dmc_wl_put(i915, upper_reg);
+ intel_dmc_wl_put(i915, lower_reg);
+
+ return val;
}
static inline void
intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
{
+ intel_dmc_wl_get(i915, reg);
+
intel_uncore_posting_read(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
}
static inline void
intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
{
+ intel_dmc_wl_get(i915, reg);
+
intel_uncore_write(>uncore, reg, val);
+
+ intel_dmc_wl_put(i915, reg);
}
static inline u32
-intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+__intel_de_rmw_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 clear, u32 set)
{
return intel_uncore_rmw(>uncore, reg, clear, set);
}
+static inline u32
+intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+{
+ u32 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = __intel_de_rmw_nowl(i915, reg, clear, set);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
+}
+
+static inline int
+__intel_wait_for_register_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 mask, u32 value, unsigned int timeout)
+{
+ return intel_wait_for_register(>uncore, reg, mask,
+ value, timeout);
+}
+
static inline int
intel_de_w
[PATCH v5 0/4] drm/i915/display: DMC wakelock implementation
Hi, This is the seventh version of my series, the fifth as a proper patchset. These are the changes: In v5: * add DOC to i915.rst; * Removed duplicate paragraph in main DOC section; * Fixed comment-style in intel_dmc_wl_get(). In v4: * removed the call to init from the first patch (gets added later); * added a flag to check if the wakelock is taken in DMC, so we don't try to take it again if get() is called while the work is queued; * changed the copyright year to 2024; * added __intel_dmc_wl_supported() to make checks easier; * check if supported also on init; * check if DMC is loaded before enabling; * removed a couple of stray debugging messages. In v3: * Fixed some checkpatch issues. In v2: * Enable/disable the wakelocks on DC5-6 entry and exit instead of on DMC load and unload; * Added bspec link to the commit message; * A bunch of other small changes; * For the complete list of changes and discussions, please look at the patchset in patchwork: https://patchwork.freedesktop.org/series/128628/ Please review. Cheers, Luca. Luca Coelho (4): drm/i915/display: add support for DMC wakelocks drm/i915/display: don't allow DMC wakelock on older hardware drm/i915/display: add module parameter to enable DMC wakelock drm/i915/display: tie DMC wakelock to DC5/6 state transitions Documentation/gpu/i915.rst| 9 + drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_de.h | 97 ++- .../gpu/drm/i915/display/intel_display_core.h | 2 + .../drm/i915/display/intel_display_driver.c | 1 + .../drm/i915/display/intel_display_params.c | 5 + .../drm/i915/display/intel_display_params.h | 1 + .../i915/display/intel_display_power_well.c | 7 + drivers/gpu/drm/i915/display/intel_dmc.c | 4 + drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 + drivers/gpu/drm/i915/display/intel_dmc_wl.c | 262 ++ drivers/gpu/drm/i915/display/intel_dmc_wl.h | 31 +++ drivers/gpu/drm/xe/Makefile | 1 + 13 files changed, 419 insertions(+), 8 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h -- 2.39.2
Re: [PATCH v4 1/4] drm/i915/display: add support for DMC wakelocks
On Thu, 2024-04-11 at 09:40 +, Shankar, Uma wrote:
> > -Original Message-
> > From: Coelho, Luciano
> > Sent: Thursday, April 4, 2024 5:12 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: intel...@lists.freedesktop.org; Shankar, Uma ;
> > ville.syrj...@linux.intel.com; Nikula, Jani
> > Subject: [PATCH v4 1/4] drm/i915/display: add support for DMC wakelocks
> >
> > In order to reduce the DC5->DC2 restore time, wakelocks have been introduced
> > in DMC so the driver can tell it when registers and other memory areas are
> > going
> > to be accessed and keep their respective blocks awake.
> >
> > Implement this in the driver by adding the concept of DMC wakelocks.
> > When the driver needs to access memory which lies inside pre-defined
> > ranges, it
> > will tell DMC to set the wakelock, access the memory, then wait for a while
> > and
> > clear the wakelock.
> >
> > The wakelock state is protected in the driver with spinlocks to prevent
> > concurrency issues.
> >
> > BSpec: 71583
> > Signed-off-by: Luca Coelho
> > ---
> > drivers/gpu/drm/i915/Makefile | 1 +
> > drivers/gpu/drm/i915/display/intel_de.h | 97 ++-
> > .../gpu/drm/i915/display/intel_display_core.h | 2 +
> > drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 +
> > drivers/gpu/drm/i915/display/intel_dmc_wl.c | 238 ++
> > drivers/gpu/drm/i915/display/intel_dmc_wl.h | 31 +++
> > drivers/gpu/drm/xe/Makefile | 1 +
> > 7 files changed, 368 insertions(+), 8 deletions(-) create mode 100644
> > drivers/gpu/drm/i915/display/intel_dmc_wl.c
> > create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h
> >
> > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> > index af9e871daf1d..7cad944b825c 100644
> > --- a/drivers/gpu/drm/i915/Makefile
> > +++ b/drivers/gpu/drm/i915/Makefile
> > @@ -266,6 +266,7 @@ i915-y += \
> > display/intel_display_rps.o \
> > display/intel_display_wa.o \
> > display/intel_dmc.o \
> > + display/intel_dmc_wl.o \
> > display/intel_dpio_phy.o \
> > display/intel_dpll.o \
> > display/intel_dpll_mgr.o \
> > diff --git a/drivers/gpu/drm/i915/display/intel_de.h
> > b/drivers/gpu/drm/i915/display/intel_de.h
> > index ba7a1c6ebc2a..0a0fba81e7af 100644
> > --- a/drivers/gpu/drm/i915/display/intel_de.h
> > +++ b/drivers/gpu/drm/i915/display/intel_de.h
> > @@ -13,52 +13,125 @@
> > static inline u32
> > intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) {
> > - return intel_uncore_read(>uncore, reg);
> > + u32 val;
> > +
> > + intel_dmc_wl_get(i915, reg);
> > +
> > + val = intel_uncore_read(>uncore, reg);
> > +
> > + intel_dmc_wl_put(i915, reg);
> > +
> > + return val;
> > }
> >
> > static inline u8
> > intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg) {
> > - return intel_uncore_read8(>uncore, reg);
> > + u8 val;
> > +
> > + intel_dmc_wl_get(i915, reg);
> > +
> > + val = intel_uncore_read8(>uncore, reg);
> > +
> > + intel_dmc_wl_put(i915, reg);
> > +
> > + return val;
> > }
> >
> > static inline u64
> > intel_de_read64_2x32(struct drm_i915_private *i915,
> > i915_reg_t lower_reg, i915_reg_t upper_reg) {
> > - return intel_uncore_read64_2x32(>uncore, lower_reg,
> > upper_reg);
> > + u64 val;
> > +
> > + intel_dmc_wl_get(i915, lower_reg);
> > + intel_dmc_wl_get(i915, upper_reg);
> > +
> > + val = intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
> > +
> > + intel_dmc_wl_put(i915, upper_reg);
> > + intel_dmc_wl_put(i915, lower_reg);
> > +
> > + return val;
> > }
> >
> > static inline void
> > intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg) {
> > + intel_dmc_wl_get(i915, reg);
> > +
> > intel_uncore_posting_read(>uncore, reg);
> > +
> > + intel_dmc_wl_put(i915, reg);
> > }
> >
> > static inline void
> > intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val) {
> > + intel_dmc_wl_get(i915, reg);
> > +
> > intel_uncore_write(>uncore, reg, val);
> > +
> > + intel_dmc_wl_put(i915, reg);
> > }
> >
> > static inline u32
> > -intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32
[PATCH v5] drm/i915: limit eDP MSO pipe only for display version 20 and below
The pipes that can be used for eDP MSO are limited to pipe A (and
sometimes also pipe B) only for display version 20 and below.
Modify the function that returns the pipe mask for eDP MSO so that
these limitations only apply to version 20 and below, enabling all
pipes otherwise.
Bspec: 68923
Cc: Jani Nikula
Cc: James Ausmus
Cc: Ville Syrjälä
Signed-off-by: Luca Coelho
---
In v5:
* fixed Ville's name's wrong charset, which prevented patchwork
from picking this up.
In v4:
* actually go back to unrestricting only for > 20. I sent the
wrong patch version in v3.
In v3:
* go back to unrestricing only for > 20, since the change for
versions 14 to 20 should be tested separately;
* simplify the if blocks [Ville].
In v2:
* allow pipes A and B from ver 14 to 20 [Gustavo]
drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index a3d3d4942eb1..5d2863c43296 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2336,10 +2336,15 @@ static void intel_ddi_power_up_lanes(struct
intel_encoder *encoder,
}
}
-/* Splitter enable for eDP MSO is limited to certain pipes. */
+/*
+ * Splitter enable for eDP MSO is limited to certain pipes, on certain
+ * platforms.
+ */
static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915)
{
- if (IS_ALDERLAKE_P(i915))
+ if (DISPLAY_VER(i915) > 20)
+ return ~0;
+ else if (IS_ALDERLAKE_P(i915))
return BIT(PIPE_A) | BIT(PIPE_B);
else
return BIT(PIPE_A);
--
2.39.2
[PATCH v4 4/4] drm/i915/display: tie DMC wakelock to DC5/6 state transitions
We only need DMC wakelocks when we allow DC5 and DC6 states. Add the calls to enable and disable DMC wakelock accordingly. Signed-off-by: Luca Coelho --- drivers/gpu/drm/i915/display/intel_display_power_well.c | 7 +++ drivers/gpu/drm/i915/display/intel_dmc.c| 4 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c index e4de40228997..7f4b7602cf02 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c @@ -17,6 +17,7 @@ #include "intel_dkl_phy.h" #include "intel_dkl_phy_regs.h" #include "intel_dmc.h" +#include "intel_dmc_wl.h" #include "intel_dp_aux_regs.h" #include "intel_dpio_phy.h" #include "intel_dpll.h" @@ -821,6 +822,8 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); + intel_dmc_wl_enable(dev_priv); + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5); } @@ -850,6 +853,8 @@ void skl_enable_dc6(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); + intel_dmc_wl_enable(dev_priv); + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); } @@ -970,6 +975,8 @@ void gen9_disable_dc_states(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; + intel_dmc_wl_disable(dev_priv); + intel_cdclk_get_cdclk(dev_priv, _config); /* Can't read out voltage_level so can't use intel_cdclk_changed() */ drm_WARN_ON(_priv->drm, diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 3fa851b5c7a6..b20cc018b9a8 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -550,6 +550,8 @@ void intel_dmc_disable_program(struct drm_i915_private *i915) pipedmc_clock_gating_wa(i915, true); disable_all_event_handlers(i915); pipedmc_clock_gating_wa(i915, false); + + intel_dmc_wl_disable(i915); } void assert_dmc_loaded(struct drm_i915_private *i915) @@ -1079,6 +1081,8 @@ void intel_dmc_suspend(struct drm_i915_private *i915) if (dmc) flush_work(>work); + intel_dmc_wl_disable(i915); + /* Drop the reference held in case DMC isn't loaded. */ if (!intel_dmc_has_payload(i915)) intel_dmc_runtime_pm_put(i915); -- 2.39.2
[PATCH v4 3/4] drm/i915/display: add module parameter to enable DMC wakelock
This feature should be disabled by default until properly tested and
mature. Add a module parameter to enable the feature for testing,
while keeping it disabled by default for now.
Reviewed-by: Uma Shankar
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display_params.c | 5 +
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 6 --
3 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
b/drivers/gpu/drm/i915/display/intel_display_params.c
index 11e03cfb774d..f40b223cc8a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -116,6 +116,11 @@ intel_display_param_named_unsafe(enable_psr2_sel_fetch,
bool, 0400,
"(0=disabled, 1=enabled) "
"Default: 1");
+intel_display_param_named_unsafe(enable_dmc_wl, bool, 0400,
+ "Enable DMC wakelock "
+ "(0=disabled, 1=enabled) "
+ "Default: 0");
+
__maybe_unused
static void _param_print_bool(struct drm_printer *p, const char *driver_name,
const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
b/drivers/gpu/drm/i915/display/intel_display_params.h
index 6206cc51df04..bf8dbbdb20a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -46,6 +46,7 @@ struct drm_i915_private;
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
param(bool, enable_psr2_sel_fetch, true, 0400) \
+ param(bool, enable_dmc_wl, false, 0400) \
#define MEMBER(T, member, ...) T member;
struct intel_display_params {
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index 065652fc475c..6f05e377b8b6 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -114,7 +114,8 @@ static bool intel_dmc_wl_check_range(u32 address)
static bool __intel_dmc_wl_supported(struct drm_i915_private *i915)
{
if (DISPLAY_VER(i915) < 20 ||
- !intel_dmc_has_payload(i915))
+ !intel_dmc_has_payload(i915) ||
+ !i915->display.params.enable_dmc_wl)
return false;
return true;
@@ -125,7 +126,8 @@ void intel_dmc_wl_init(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
/* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */
- if (DISPLAY_VER(i915) < 20)
+ if (DISPLAY_VER(i915) < 20 ||
+ !i915->display.params.enable_dmc_wl)
return;
INIT_DELAYED_WORK(>work, intel_dmc_wl_work);
--
2.39.2
[PATCH v4 2/4] drm/i915/display: don't allow DMC wakelock on older hardware
Only allow running DMC wakelock code if the display version is 20 or
greater. Also check if DMC is loaded before enabling.
Signed-off-by: Luca Coelho
---
.../drm/i915/display/intel_display_driver.c | 1 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 26 +++
2 files changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c
b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 87dd07e0d138..e4015557af6a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -198,6 +198,7 @@ void intel_display_driver_early_probe(struct
drm_i915_private *i915)
intel_dpll_init_clock_hook(i915);
intel_init_display_hooks(i915);
intel_fdi_init_hook(i915);
+ intel_dmc_wl_init(i915);
}
/* part #1: call before irq install */
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index 3d7cf47321c2..065652fc475c 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -6,6 +6,7 @@
#include
#include "intel_de.h"
+#include "intel_dmc.h"
#include "intel_dmc_regs.h"
#include "intel_dmc_wl.h"
@@ -110,10 +111,23 @@ static bool intel_dmc_wl_check_range(u32 address)
return wl_needed;
}
+static bool __intel_dmc_wl_supported(struct drm_i915_private *i915)
+{
+ if (DISPLAY_VER(i915) < 20 ||
+ !intel_dmc_has_payload(i915))
+ return false;
+
+ return true;
+}
+
void intel_dmc_wl_init(struct drm_i915_private *i915)
{
struct intel_dmc_wl *wl = >display.wl;
+ /* don't call __intel_dmc_wl_supported(), DMC is not loaded yet */
+ if (DISPLAY_VER(i915) < 20)
+ return;
+
INIT_DELAYED_WORK(>work, intel_dmc_wl_work);
spin_lock_init(>lock);
refcount_set(>refcount, 0);
@@ -124,6 +138,9 @@ void intel_dmc_wl_enable(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
+ if (!__intel_dmc_wl_supported(i915))
+ return;
+
spin_lock_irqsave(>lock, flags);
if (wl->enabled)
@@ -148,6 +165,9 @@ void intel_dmc_wl_disable(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
+ if (!__intel_dmc_wl_supported(i915))
+ return;
+
flush_delayed_work(>work);
spin_lock_irqsave(>lock, flags);
@@ -171,6 +191,9 @@ void intel_dmc_wl_get(struct drm_i915_private *i915,
i915_reg_t reg)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
+ if (!__intel_dmc_wl_supported(i915))
+ return;
+
if (!intel_dmc_wl_check_range(reg.reg))
return;
@@ -215,6 +238,9 @@ void intel_dmc_wl_put(struct drm_i915_private *i915,
i915_reg_t reg)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
+ if (!__intel_dmc_wl_supported(i915))
+ return;
+
if (!intel_dmc_wl_check_range(reg.reg))
return;
--
2.39.2
[PATCH v4 1/4] drm/i915/display: add support for DMC wakelocks
In order to reduce the DC5->DC2 restore time, wakelocks have been
introduced in DMC so the driver can tell it when registers and other
memory areas are going to be accessed and keep their respective blocks
awake.
Implement this in the driver by adding the concept of DMC wakelocks.
When the driver needs to access memory which lies inside pre-defined
ranges, it will tell DMC to set the wakelock, access the memory, then
wait for a while and clear the wakelock.
The wakelock state is protected in the driver with spinlocks to
prevent concurrency issues.
BSpec: 71583
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_de.h | 97 ++-
.../gpu/drm/i915/display/intel_display_core.h | 2 +
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 238 ++
drivers/gpu/drm/i915/display/intel_dmc_wl.h | 31 +++
drivers/gpu/drm/xe/Makefile | 1 +
7 files changed, 368 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index af9e871daf1d..7cad944b825c 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -266,6 +266,7 @@ i915-y += \
display/intel_display_rps.o \
display/intel_display_wa.o \
display/intel_dmc.o \
+ display/intel_dmc_wl.o \
display/intel_dpio_phy.o \
display/intel_dpll.o \
display/intel_dpll_mgr.o \
diff --git a/drivers/gpu/drm/i915/display/intel_de.h
b/drivers/gpu/drm/i915/display/intel_de.h
index ba7a1c6ebc2a..0a0fba81e7af 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -13,52 +13,125 @@
static inline u32
intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
{
- return intel_uncore_read(>uncore, reg);
+ u32 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = intel_uncore_read(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
}
static inline u8
intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)
{
- return intel_uncore_read8(>uncore, reg);
+ u8 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = intel_uncore_read8(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
}
static inline u64
intel_de_read64_2x32(struct drm_i915_private *i915,
i915_reg_t lower_reg, i915_reg_t upper_reg)
{
- return intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
+ u64 val;
+
+ intel_dmc_wl_get(i915, lower_reg);
+ intel_dmc_wl_get(i915, upper_reg);
+
+ val = intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
+
+ intel_dmc_wl_put(i915, upper_reg);
+ intel_dmc_wl_put(i915, lower_reg);
+
+ return val;
}
static inline void
intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
{
+ intel_dmc_wl_get(i915, reg);
+
intel_uncore_posting_read(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
}
static inline void
intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
{
+ intel_dmc_wl_get(i915, reg);
+
intel_uncore_write(>uncore, reg, val);
+
+ intel_dmc_wl_put(i915, reg);
}
static inline u32
-intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+__intel_de_rmw_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 clear, u32 set)
{
return intel_uncore_rmw(>uncore, reg, clear, set);
}
+static inline u32
+intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+{
+ u32 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = __intel_de_rmw_nowl(i915, reg, clear, set);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
+}
+
+static inline int
+__intel_wait_for_register_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 mask, u32 value, unsigned int timeout)
+{
+ return intel_wait_for_register(>uncore, reg, mask,
+ value, timeout);
+}
+
static inline int
intel_de_wait(struct drm_i915_private *i915, i915_reg_t reg,
u32 mask, u32 value, unsigned int timeout)
{
- return intel_wait_for_register(>uncore, reg, mask, value,
timeout);
+ int ret;
+
+ intel_dmc_wl_get(i915, reg);
+
+ ret = __intel_wait_for_register_nowl(i915, reg, mask, value, timeout);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return ret;
}
static inline int
intel_de_wait_fw(struct drm_i915_private *i915, i915_reg_t reg,
u32 mask, u32 value, unsigned int timeout)
{
- return intel_wait_for_register_fw(>uncore, reg,
[PATCH v4 0/4] drm/i915/display: DMC wakelock implementation
Hi, This is the sixth version of my series, the fourth as a proper patchset. These are the changes: In v4: * removed the call to init from the first patch (gets added later); * added a flag to check if the wakelock is taken in DMC, so we don't try to take it again if get() is called while the work is queued; * changed the copyright year to 2024; * added __intel_dmc_wl_supported() to make checks easier; * check if supported also on init; * check if DMC is loaded before enabling; * removed a couple of stray debugging messages. In v3: * Fixed some checkpatch issues. In v2: * Enable/disable the wakelocks on DC5-6 entry and exit instead of on DMC load and unload; * Added bspec link to the commit message; * A bunch of other small changes; * For the complete list of changes and discussions, please look at the patchset in patchwork: https://patchwork.freedesktop.org/series/128628/ Please review. Cheers, Luca. Luca Coelho (4): drm/i915/display: add support for DMC wakelocks drm/i915/display: don't allow DMC wakelock on older hardware drm/i915/display: add module parameter to enable DMC wakelock drm/i915/display: tie DMC wakelock to DC5/6 state transitions drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_de.h | 97 ++- .../gpu/drm/i915/display/intel_display_core.h | 2 + .../drm/i915/display/intel_display_driver.c | 1 + .../drm/i915/display/intel_display_params.c | 5 + .../drm/i915/display/intel_display_params.h | 1 + .../i915/display/intel_display_power_well.c | 7 + drivers/gpu/drm/i915/display/intel_dmc.c | 4 + drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 + drivers/gpu/drm/i915/display/intel_dmc_wl.c | 266 ++ drivers/gpu/drm/i915/display/intel_dmc_wl.h | 31 ++ drivers/gpu/drm/xe/Makefile | 1 + 12 files changed, 414 insertions(+), 8 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h -- 2.39.2
Re: [PATCH v3 4/4] drm/i915/display: tie DMC wakelock to DC5/6 state transitions
On Thu, 2024-03-21 at 08:22 +, Shankar, Uma wrote: > > > -Original Message- > > From: Coelho, Luciano > > Sent: Monday, March 18, 2024 7:08 PM > > To: intel-gfx@lists.freedesktop.org > > Cc: intel...@lists.freedesktop.org; Shankar, Uma ; > > ville.syrj...@linux.intel.com; Nikula, Jani > > Subject: [PATCH v3 4/4] drm/i915/display: tie DMC wakelock to DC5/6 state > > transitions > > > > We only need DMC wakelocks when we allow DC5 and DC6 states. Add the calls > > to enable and disable DMC wakelock accordingly. > > > Signed-off-by: Luca Coelho > > --- > > drivers/gpu/drm/i915/display/intel_display_power_well.c | 7 +++ > > drivers/gpu/drm/i915/display/intel_dmc.c| 4 > > 2 files changed, 11 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c > > b/drivers/gpu/drm/i915/display/intel_display_power_well.c > > index 217f82f1da84..367464f5c5cd 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c > > +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c > > @@ -17,6 +17,7 @@ > > #include "intel_dkl_phy.h" > > #include "intel_dkl_phy_regs.h" > > #include "intel_dmc.h" > > +#include "intel_dmc_wl.h" > > #include "intel_dp_aux_regs.h" > > #include "intel_dpio_phy.h" > > #include "intel_dpll.h" > > @@ -821,6 +822,8 @@ void gen9_enable_dc5(struct drm_i915_private > > *dev_priv) > > intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, > > 0, SKL_SELECT_ALTERNATE_DC_EXIT); > > > > + intel_dmc_wl_enable(dev_priv); > > We can have platform checks here and call only when its supported. > No strong objection but doing it here seems better than calling for all > and then checking for platform inside. I prefer not to check for wakelock specifics outside the wakelock code itself. So if we need to change it, we change it in a single place. The compiler will probably inline some of these checks anyway, if it deems the function call to be too inefficient. Is it okay for you? -- Cheers, Luca.
Re: [PATCH v3 3/4] drm/i915/display: add module parameter to enable DMC wakelock
On Thu, 2024-03-21 at 08:08 +, Shankar, Uma wrote:
>
> > -Original Message-
> > From: Coelho, Luciano
> > Sent: Monday, March 18, 2024 7:08 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: intel...@lists.freedesktop.org; Shankar, Uma ;
> > ville.syrj...@linux.intel.com; Nikula, Jani
> > Subject: [PATCH v3 3/4] drm/i915/display: add module parameter to enable DMC
> > wakelock
> >
> > This feature should be disabled by default until properly tested and
> > mature. Add
> > a module parameter to enable the feature for testing, while keeping it
> > disabled by
> > default for now.
> >
> > Signed-off-by: Luca Coelho
> > ---
> > drivers/gpu/drm/i915/display/intel_display_params.c | 5 +
> > drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> > drivers/gpu/drm/i915/display/intel_dmc_wl.c | 12
> > 3 files changed, 14 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > index 11e03cfb774d..f40b223cc8a1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > @@ -116,6 +116,11 @@
> > intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
> > "(0=disabled, 1=enabled) "
> > "Default: 1");
> >
> > +intel_display_param_named_unsafe(enable_dmc_wl, bool, 0400,
> > + "Enable DMC wakelock "
> > + "(0=disabled, 1=enabled) "
> > + "Default: 0");
> > +
> > __maybe_unused
> > static void _param_print_bool(struct drm_printer *p, const char
> > *driver_name,
> > const char *name, bool val)
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > index 6206cc51df04..bf8dbbdb20a1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > @@ -46,6 +46,7 @@ struct drm_i915_private;
> > param(int, enable_psr, -1, 0600) \
> > param(bool, psr_safest_params, false, 0400) \
> > param(bool, enable_psr2_sel_fetch, true, 0400) \
> > + param(bool, enable_dmc_wl, false, 0400) \
> >
> > #define MEMBER(T, member, ...) T member; struct intel_display_params {
> > diff --
> > git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> > b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> > index 7c991e22c616..84d054bcb2c1 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
> > @@ -120,7 +120,8 @@ void intel_dmc_wl_enable(struct drm_i915_private
> > *i915)
> > struct intel_dmc_wl *wl = >display.wl;
> > unsigned long flags;
> >
> > - if (DISPLAY_VER(i915) < 20)
> > + if (!i915->display.params.enable_dmc_wl ||
> > + DISPLAY_VER(i915) < 20)
>
> Extend this check to init as well. Else it looks ok to protect under a module
> parameter.
> Reviewed-by: Uma Shankar
Done. I now added the module param check to the supported() helper
function, so it will be checked everywhere.
Thanks for the r-b.
--
Cheers,
Luca.
Re: [PATCH v3 2/4] drm/i915/display: don't allow DMC wakelock on older hardware
On Thu, 2024-03-21 at 08:02 +, Shankar, Uma wrote: > > > -Original Message- > > From: Coelho, Luciano > > Sent: Monday, March 18, 2024 7:08 PM > > To: intel-gfx@lists.freedesktop.org > > Cc: intel...@lists.freedesktop.org; Shankar, Uma ; > > ville.syrj...@linux.intel.com; Nikula, Jani > > Subject: [PATCH v3 2/4] drm/i915/display: don't allow DMC wakelock on older > > hardware > > > > Only allow running DMC wakelock code if the display version is 20 or > > greater. > > One for previous one, don't do intel_dmc_wl_init unconditionally but protect > it with > Platform check. Good point. I have removed the call to intel_dmc_wl_init() completely from the previous patch, like with intel_dmc_wl_enable(), so the call to init will be in this patch and protected by the platform version as well. > > Signed-off-by: Luca Coelho > > --- > > drivers/gpu/drm/i915/display/intel_dmc_wl.c | 12 > > 1 file changed, 12 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c > > b/drivers/gpu/drm/i915/display/intel_dmc_wl.c > > index 5c3d8204ae7e..7c991e22c616 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c > > +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c > > @@ -120,6 +120,9 @@ void intel_dmc_wl_enable(struct drm_i915_private > > *i915) > > struct intel_dmc_wl *wl = >display.wl; > > unsigned long flags; > > > > + if (DISPLAY_VER(i915) < 20) > > + return; > > + > > spin_lock_irqsave(>lock, flags); > > > > if (wl->enabled) > > @@ -143,6 +146,9 @@ void intel_dmc_wl_disable(struct drm_i915_private > > *i915) > > struct intel_dmc_wl *wl = >display.wl; > > unsigned long flags; > > > > + if (DISPLAY_VER(i915) < 20) > > + return; > > There can be case where DMC is not loaded, address that as well. > We should not do wakelock in that case. Right. I have added a helper function, intel_dmc_wl_supported(), to keep all this checks in one place. > > flush_delayed_work(>work); > > > > spin_lock_irqsave(>lock, flags); > > @@ -171,6 +177,9 @@ void intel_dmc_wl_get(struct drm_i915_private *i915, > > i915_reg_t reg) > > struct intel_dmc_wl *wl = >display.wl; > > unsigned long flags; > > > > + if (DISPLAY_VER(i915) < 20) > > + return; > > + > > if (!intel_dmc_wl_check_range(reg.reg)) > > return; > > > > @@ -203,6 +212,9 @@ void intel_dmc_wl_put(struct drm_i915_private *i915, > > i915_reg_t reg) > > struct intel_dmc_wl *wl = >display.wl; > > unsigned long flags; > > > > + if (DISPLAY_VER(i915) < 20) > > + return; > > + > > if (!intel_dmc_wl_check_range(reg.reg)) > > return; > > > > -- > > 2.39.2 > -- Cheers, Luca.
[PATCH v4] drm/i915: limit eDP MSO pipe only for display version 20 and below
The pipes that can be used for eDP MSO are limited to pipe A (and
sometimes also pipe B) only for display version 20 and below.
Modify the function that returns the pipe mask for eDP MSO so that
these limitations only apply to version 20 and below, enabling all
pipes otherwise.
Bspec: 68923
Cc: Jani Nikula
Cc: James Ausmus
Cc: Ville Syrj�l�
Signed-off-by: Luca Coelho
---
In v4:
* actually go back to unrestricting only for > 20. I sent the
wrong patch version in v3.
In v3:
* go back to unrestricing only for > 20, since the change for
versions 14 to 20 should be tested separately;
* simplify the if blocks [Ville].
In v2:
* allow pipes A and B from ver 14 to 20 [Gustavo]
drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index a3d3d4942eb1..5d2863c43296 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2336,10 +2336,15 @@ static void intel_ddi_power_up_lanes(struct
intel_encoder *encoder,
}
}
-/* Splitter enable for eDP MSO is limited to certain pipes. */
+/*
+ * Splitter enable for eDP MSO is limited to certain pipes, on certain
+ * platforms.
+ */
static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915)
{
- if (IS_ALDERLAKE_P(i915))
+ if (DISPLAY_VER(i915) > 20)
+ return ~0;
+ else if (IS_ALDERLAKE_P(i915))
return BIT(PIPE_A) | BIT(PIPE_B);
else
return BIT(PIPE_A);
--
2.39.2
Re: [PATCH v3 1/4] drm/i915/display: add support for DMC wakelocks
On Thu, 2024-03-21 at 07:43 +, Shankar, Uma wrote:
>
> > -Original Message-
> > From: Coelho, Luciano
> > Sent: Monday, March 18, 2024 7:08 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: intel...@lists.freedesktop.org; Shankar, Uma ;
> > ville.syrj...@linux.intel.com; Nikula, Jani
> > Subject: [PATCH v3 1/4] drm/i915/display: add support for DMC wakelocks
> >
> > In order to reduce the DC5->DC2 restore time, wakelocks have been introduced
> > in DMC so the driver can tell it when registers and other memory areas are
> > going
> > to be accessed and keep their respective blocks awake.
> >
> > Implement this in the driver by adding the concept of DMC wakelocks.
> > When the driver needs to access memory which lies inside pre-defined
> > ranges, it
> > will tell DMC to set the wakelock, access the memory, then wait for a while
> > and
> > clear the wakelock.
> >
> > The wakelock state is protected in the driver with spinlocks to prevent
> > concurrency issues.
> >
> > BSpec: 71583
>
> These are internal links, not sure how useful they will be for upstream
> discussions.
> Give the relevant details here which is better I believe instead of an
> internal link.
As we discussed offline, this seems to be common practice, and Gustavo
actually asked me to add it in a previous review, so we decided to keep
it.
> > Signed-off-by: Luca Coelho
> > ---
> > drivers/gpu/drm/i915/Makefile | 1 +
> > drivers/gpu/drm/i915/display/intel_de.h | 97 +++-
> > .../gpu/drm/i915/display/intel_display_core.h | 2 +
> > .../drm/i915/display/intel_display_driver.c | 1 +
> > drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 +
> > drivers/gpu/drm/i915/display/intel_dmc_wl.c | 226 ++
> > drivers/gpu/drm/i915/display/intel_dmc_wl.h | 30 +++
> > drivers/gpu/drm/xe/Makefile | 1 +
> > 8 files changed, 356 insertions(+), 8 deletions(-) create mode 100644
> > drivers/gpu/drm/i915/display/intel_dmc_wl.c
> > create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h
> >
> > diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> > index 3ef6ed41e62b..af83ea94c771 100644
> > --- a/drivers/gpu/drm/i915/Makefile
> > +++ b/drivers/gpu/drm/i915/Makefile
> > @@ -270,6 +270,7 @@ i915-y += \
> > display/intel_display_rps.o \
> > display/intel_display_wa.o \
> > display/intel_dmc.o \
> > + display/intel_dmc_wl.o \
> > display/intel_dpio_phy.o \
> > display/intel_dpll.o \
> > display/intel_dpll_mgr.o \
> > diff --git a/drivers/gpu/drm/i915/display/intel_de.h
> > b/drivers/gpu/drm/i915/display/intel_de.h
> > index 42552d8c151e..6728a0077793 100644
> > --- a/drivers/gpu/drm/i915/display/intel_de.h
> > +++ b/drivers/gpu/drm/i915/display/intel_de.h
> > @@ -13,52 +13,125 @@
> > static inline u32
> > intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) {
> > - return intel_uncore_read(>uncore, reg);
> > + u32 val;
> > +
> > + intel_dmc_wl_get(i915, reg);
>
> I think one fundamental issue in taking the lock at the granularity of
> every MMIO, we risk adding latency here. We should profile the time
> it adds.
This is a good point! Again, as we concluded in our offline discussion,
the problem here is that we are calling __intel_de_rmw_nowl() whenever
the refcount is zero, so that cause one extra register read (at least).
We should only do this when the wakelock is not taken anymore, i.e.
when the work has already run and released it.
The simplest way to solve this now, is to add a flag that tells us
whether the wakelock is taken or not, regardless of the refcount, so we
don't try to take it again for every MMIO.
In the future, if all the checks we do (without accessing hardware
registers) is still too time-consuming, we can create more helper
functions that bypass the wakelock, like the existing _nowl() versions.
> For modeset for ex, we will end up programming multiple MMIO's from 1 place
> But every MMIO call will take the wakelock. This is overkill, instead we can
> just take
> the lock once, do our stuff and then release it.
>
> > +
> > + val = intel_uncore_read(>uncore, reg);
> > +
> > + intel_dmc_wl_put(i915, reg);
> > +
> > + return val;
> > }
> >
> > static inline u8
> > intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg) {
> > - return intel_uncore_read8(>uncore, reg);
> > + u8 val;
> > +
> > + intel_dmc_wl_get(i915, reg);
> &
[PATCH v3] drm/i915: limit eDP MSO pipe only for display version 20 and below
The pipes that can be used for eDP MSO are limited to pipe A (and
sometimes also pipe B) only for display version 20 and below.
Modify the function that returns the pipe mask for eDP MSO so that
these limitations only apply to version 20 and below, enabling all
pipes otherwise.
Bspec: 68923
Cc: Jani Nikula
Cc: James Ausmus
Cc: Ville Syrjälä
Signed-off-by: Luca Coelho
---
In v3:
* go back to unrestricing only for > 20, since the change for
versions 14 to 20 should be tested separately;
* simplify the if blocks [Ville].
In v2:
* allow pipes A and B from ver 14 to 20 [Gustavo]
drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index a3d3d4942eb1..8ab4fff1b5fb 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2336,10 +2336,15 @@ static void intel_ddi_power_up_lanes(struct
intel_encoder *encoder,
}
}
-/* Splitter enable for eDP MSO is limited to certain pipes. */
+/*
+ * Splitter enable for eDP MSO is limited to certain pipes, on certain
+ * platforms.
+ */
static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915)
{
- if (IS_ALDERLAKE_P(i915))
+ if (DISPLAY_VER(i915) > 20)
+ return ~0;
+ else if (DISPLAY_VER(i915) >= 14 || IS_ALDERLAKE_P(i915))
return BIT(PIPE_A) | BIT(PIPE_B);
else
return BIT(PIPE_A);
--
2.39.2
Re: [PATCH] drm/xe/display: fix type of intel_uncore_read*() functions
On Tue, 2024-03-19 at 17:06 +0200, Jani Nikula wrote: > On Tue, 19 Mar 2024, Lucas De Marchi wrote: > > On Thu, Mar 14, 2024 at 08:52:21AM +0200, Luca Coelho wrote: > > > Some of the backported intel_uncore_read*() functions used the wrong > > > types. Change the function declarations accordingly. > > > > > > Reviewed-by: Gustavo Sousa > > > Signed-off-by: Luca Coelho > > > > if a patch affects xe, please always Cc the xe mailing list so it > > triggers CI on those machines > > Indeed. I just bounced the patch to intel-xe to trigger CI. Thanks, guys! I'll do it always from now on. -- Cheers, Luca.
Re: ✗ Fi.CI.BAT: failure for drm/i915/display: DMC wakelock implementation (rev2)
Hi,
This bug I'm hitting is unrelated to my patch and after a bit of
investigation with JaniS, we noticed that this is happening in order
machines from time to time.
So this possible regression:
> Possible regressions * igt@i915_selftest@live@hangcheck:bat-adln-1: PASS ->
> ABORT
..is the same problem that is happening from time to time in adlp-6:
> Possible fixes * igt@i915_selftest@live@hangcheck:bat-adlp-6: ABORT
> (i915#10021) -
>> PASS
It is the same failure as this one:
http://gfx-ci.igk.intel.com/cibuglog-ng/issue/10977?query_key=6ae0d29cf197dafc63e8bf36c8e1c04fe395749f
Can you please add ADL_N machines to the filter as well?
Thanks!
--
Cheers,
Luca.
On Mon, 2024-03-18 at 21:55 +, Patchwork wrote:
> Patch Details
> Series:drm/i915/display: DMC wakelock implementation (rev2)
> URL:https://patchwork.freedesktop.org/series/131124/
> State:failure
> Details:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131124v2/index.html
> CI Bug Log - changes from CI_DRM_14443 -> Patchwork_131124v2SummaryFAILURE
> Serious unknown changes coming with Patchwork_131124v2 absolutely
> need to be
> verified manually.
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_131124v2, please notify your bug team (I915-
> ci-in...@lists.freedesktop.org) to allow them
> to document this new failure mode, which will reduce false positives
> in CI.
> External URL: https://intel-gfx-ci.01.org/tree/drm-
> tip/Patchwork_131124v2/index.html
> Participating hosts (35 -> 35)Additional (2): bat-arls-4 bat-jsl-1
> Missing (2): bat-dg2-11 fi-snb-2520m
> Possible new issuesHere are the unknown changes that may have been introduced
> in
> Patchwork_131124v2:
> IGT changesPossible regressions *
> igt@i915_selftest@live@hangcheck:bat-adln-1: PASS -> ABORT
> Known issuesHere are the changes found in Patchwork_131124v2 that come from
> known
> issues:
> CI changesIssues hit * boot:bat-arls-3: PASS -> FAIL (i915#10234)bat-jsl-1:
> NOTRUN -> FAIL
>(i915#8293)fi-apl-guc: PASS -> FAIL (i915#8293)
> Possible fixes * boot:fi-cfl-8109u: FAIL (i915#8293) -> PASS
> IGT changesIssues hit * igt@dmabuf@all-tests@dma_fence_chain:fi-kbl-8809g:
> PASS ->
>INCOMPLETE (i915#10454)
> * igt@gem_huc_copy@huc-copy:fi-cfl-8109u: NOTRUN -> SKIP (i915#2190)
> * igt@gem_lmem_swapping@verify-random:fi-cfl-8109u: NOTRUN -> SKIP
>(i915#4613) +3 other tests skip
> * igt@i915_selftest@live@gem:bat-dg2-8: PASS -> ABORT (i915#10366)
> * igt@kms_pm_backlight@basic-brightness:fi-cfl-8109u: NOTRUN -> SKIP
>+11 other tests skip
> Possible fixes * igt@i915_selftest@live@hangcheck:bat-adlp-6: ABORT
> (i915#10021) ->
>PASS
> {name}: This element is suppressed. This means it is ignored when
> computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
> Build changes * Linux: CI_DRM_14443 -> Patchwork_131124v2
> CI-20190529: 20190529
> CI_DRM_14443: ce8cc731d53f9197a853b0d00386d7835f2b80e6 @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGT_7769: 7769
> Patchwork_131124v2: ce8cc731d53f9197a853b0d00386d7835f2b80e6 @
> git://anongit.freedesktop.org/gfx-ci/linux
> Linux commits2ef377f406a9 drm/i915/display: tie DMC wakelock to DC5/6 state
> transitions
> 65265f211717 drm/i915/display: add module parameter to enable DMC
> wakelock
> b6649b71e886 drm/i915/display: don't allow DMC wakelock on older
> hardware
> 42bb743a04e4 drm/i915/display: add support for DMC wakelocks
Re: ✗ Fi.CI.IGT: failure for drm/xe/display: fix type of intel_uncore_read*() functions
Hi, FTR, this failure is not related to my patch. It seems to be happening sporadically on this machine. -- Cheers, Luca. On Thu, 2024-03-14 at 23:16 +, Patchwork wrote: > Patch Details > Series:drm/xe/display: fix type of intel_uncore_read*() functions > URL:https://patchwork.freedesktop.org/series/131122/ > State:failure > Details: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131122v1/index.html > CI Bug Log - changes from CI_DRM_14429_full -> > Patchwork_131122v1_fullSummaryFAILURE > Serious unknown changes coming with Patchwork_131122v1_full > absolutely need to be > verified manually. > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_131122v1_full, please notify your bug team > (i915-ci-in...@lists.freedesktop.org) to allow them > to document this new failure mode, which will reduce false positives > in CI. > Participating hosts (9 -> 8)Missing (1): shard-snb-0 > Possible new issuesHere are the unknown changes that may have been introduced > in > Patchwork_131122v1_full: > IGT changesPossible regressions * > igt@kms_flip@2x-flip-vs-blocking-wf-vblank@ab-vga1-hdmi-a1:shard- >snb: PASS -> ABORT > Known issuesHere are the changes found in Patchwork_131122v1_full that come > from > known issues: > IGT changesIssues hit * igt@api_intel_bb@blit-reloc-purge-cache:shard-dg2: > NOTRUN -> SKIP >(i915#8411) > * igt@debugfs_test@basic-hwmon:shard-mtlp: NOTRUN -> SKIP (i915#9318) > * igt@drm_fdinfo@busy-hang@rcs0:shard-mtlp: NOTRUN -> SKIP (i915#8414) >+5 other tests skip > * igt@drm_fdinfo@most-busy-idle-check-all@vecs1:shard-dg2: NOTRUN -> >SKIP (i915#8414) +19 other tests skip > * igt@drm_fdinfo@virtual-idle:shard-rkl: PASS -> FAIL (i915#7742) +2 >other tests fail > * igt@gem_basic@multigpu-create-close:shard-tglu: NOTRUN -> SKIP >(i915#7697) +1 other test skip > * igt@gem_busy@semaphore:shard-mtlp: NOTRUN -> SKIP (i915#3936) > * igt@gem_close_race@multigpu-basic-threads:shard-dg2: NOTRUN -> SKIP >(i915#7697) > * igt@gem_create@create-ext-set-pat:shard-dg1: NOTRUN -> SKIP >(i915#8562) > * igt@gem_ctx_exec@basic-nohangcheck:shard-tglu: PASS -> FAIL >(i915#6268) > * igt@gem_ctx_persistence@file:shard-snb: NOTRUN -> SKIP (i915#1099) >+1 other test skip > * igt@gem_ctx_persistence@heartbeat-hang:shard-dg2: NOTRUN -> SKIP >(i915#8555) > * igt@gem_ctx_sseu@mmap-args:shard-dg1: NOTRUN -> SKIP (i915#280) > * igt@gem_eio@unwedge-stress:shard-snb: NOTRUN -> FAIL (i915#8898) > * igt@gem_exec_balancer@bonded-dual:shard-mtlp: NOTRUN -> SKIP >(i915#4771) +1 other test skip > * igt@gem_exec_capture@many-4k-zero:shard-dg2: NOTRUN -> FAIL >(i915#9606) > * igt@gem_exec_fair@basic-none-share:shard-dg2: NOTRUN -> SKIP >(i915#3539 / i915#4852) +2 other tests skip > * igt@gem_exec_fair@basic-none-solo@rcs0:shard-rkl: PASS -> FAIL >(i915#2842) > * igt@gem_exec_fair@basic-pace:shard-mtlp: NOTRUN -> SKIP (i915#4473 / >i915#4771) > * igt@gem_exec_fair@basic-pace-solo@rcs0:shard-glk: NOTRUN -> FAIL >(i915#2842) > * igt@gem_exec_fence@submit3:shard-dg2: NOTRUN -> SKIP (i915#4812) +1 >other test skip > * igt@gem_exec_flush@basic-uc-ro-default:shard-dg1: NOTRUN -> SKIP >(i915#3539 / i915#4852) +1 other test skip > * igt@gem_exec_gttfill@multigpu-basic:shard-mtlp: NOTRUN -> SKIP >(i915#7697)shard-dg1: NOTRUN -> SKIP (i915#7697) > * igt@gem_exec_reloc@basic-gtt-cpu-active:shard-dg2: NOTRUN -> SKIP >(i915#3281) +4 other tests skip > * igt@gem_exec_reloc@basic-gtt-noreloc:shard-mtlp: NOTRUN -> SKIP >(i915#3281) +4 other tests skip > * igt@gem_exec_reloc@basic-scanout:shard-dg1: NOTRUN -> SKIP >(i915#3281) +3 other tests skip > * igt@gem_exec_schedule@preempt-queue:shard-dg2: NOTRUN -> SKIP >(i915#4537 / i915#4812) > * igt@gem_exec_schedule@preempt-queue-contexts-chain:shard-mtlp: >NOTRUN -> SKIP (i915#4537 / i915#4812) +1 other test skip > * igt@gem_exec_schedule@semaphore-power:shard-dg1: NOTRUN -> SKIP >(i915#4812) +1 other test skip > * igt@gem_fence_thrash@bo-write-verify-threaded-none:shard-dg1: NOTRUN >-> SKIP (i915#4860) +1 other test skip > * igt@gem_lmem_swapping@heavy-multi:shard-tglu: NOTRUN -> SKIP >(i915#4613) +1 other test skip > * igt@gem_lmem_swapping@heavy-random@lmem0:shard-dg1: NOTRUN -> FAIL >(i915#10378) > * igt@gem_lmem_swapping@heavy-verify-multi-ccs:shard-mtlp: NOTRUN -> >SKIP (i915#4613) +3 other tests skip > * igt@gem_lmem_swapping@heavy-verify-multi@lmem0:shard-dg2: PASS -> >FAIL (i915#10378) > * igt@gem_lmem_swapping@heavy-verify-random-ccs@lmem0:shard-dg1: >NOTRUN -> SKIP (i915#4565) > * igt@gem_lmem_swapping@verify-random-ccs:shard-glk: NOTRUN -> SKIP >(i915#4613) > * igt@gem_media_vme:shard-dg2: NOTRUN -> SKIP (i915#284) > * igt@gem_mmap@basic-small-bo:shard-mtlp: NOTRUN -> SKIP (i915#4083) >+3 other tests skip > * igt@gem_mmap_gtt@cpuset-medium-copy-xy:shard-dg2: NOTRUN ->
[PATCH v3 4/4] drm/i915/display: tie DMC wakelock to DC5/6 state transitions
We only need DMC wakelocks when we allow DC5 and DC6 states. Add the calls to enable and disable DMC wakelock accordingly. Signed-off-by: Luca Coelho --- drivers/gpu/drm/i915/display/intel_display_power_well.c | 7 +++ drivers/gpu/drm/i915/display/intel_dmc.c| 4 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c index 217f82f1da84..367464f5c5cd 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c @@ -17,6 +17,7 @@ #include "intel_dkl_phy.h" #include "intel_dkl_phy_regs.h" #include "intel_dmc.h" +#include "intel_dmc_wl.h" #include "intel_dp_aux_regs.h" #include "intel_dpio_phy.h" #include "intel_dpll.h" @@ -821,6 +822,8 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); + intel_dmc_wl_enable(dev_priv); + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5); } @@ -850,6 +853,8 @@ void skl_enable_dc6(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); + intel_dmc_wl_enable(dev_priv); + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); } @@ -970,6 +975,8 @@ void gen9_disable_dc_states(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; + intel_dmc_wl_disable(dev_priv); + intel_cdclk_get_cdclk(dev_priv, _config); /* Can't read out voltage_level so can't use intel_cdclk_changed() */ drm_WARN_ON(_priv->drm, diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 3fa851b5c7a6..b20cc018b9a8 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -550,6 +550,8 @@ void intel_dmc_disable_program(struct drm_i915_private *i915) pipedmc_clock_gating_wa(i915, true); disable_all_event_handlers(i915); pipedmc_clock_gating_wa(i915, false); + + intel_dmc_wl_disable(i915); } void assert_dmc_loaded(struct drm_i915_private *i915) @@ -1079,6 +1081,8 @@ void intel_dmc_suspend(struct drm_i915_private *i915) if (dmc) flush_work(>work); + intel_dmc_wl_disable(i915); + /* Drop the reference held in case DMC isn't loaded. */ if (!intel_dmc_has_payload(i915)) intel_dmc_runtime_pm_put(i915); -- 2.39.2
[PATCH v3 3/4] drm/i915/display: add module parameter to enable DMC wakelock
This feature should be disabled by default until properly tested and
mature. Add a module parameter to enable the feature for testing,
while keeping it disabled by default for now.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display_params.c | 5 +
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 12
3 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
b/drivers/gpu/drm/i915/display/intel_display_params.c
index 11e03cfb774d..f40b223cc8a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -116,6 +116,11 @@ intel_display_param_named_unsafe(enable_psr2_sel_fetch,
bool, 0400,
"(0=disabled, 1=enabled) "
"Default: 1");
+intel_display_param_named_unsafe(enable_dmc_wl, bool, 0400,
+ "Enable DMC wakelock "
+ "(0=disabled, 1=enabled) "
+ "Default: 0");
+
__maybe_unused
static void _param_print_bool(struct drm_printer *p, const char *driver_name,
const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
b/drivers/gpu/drm/i915/display/intel_display_params.h
index 6206cc51df04..bf8dbbdb20a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -46,6 +46,7 @@ struct drm_i915_private;
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
param(bool, enable_psr2_sel_fetch, true, 0400) \
+ param(bool, enable_dmc_wl, false, 0400) \
#define MEMBER(T, member, ...) T member;
struct intel_display_params {
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index 7c991e22c616..84d054bcb2c1 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -120,7 +120,8 @@ void intel_dmc_wl_enable(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
- if (DISPLAY_VER(i915) < 20)
+ if (!i915->display.params.enable_dmc_wl ||
+ DISPLAY_VER(i915) < 20)
return;
spin_lock_irqsave(>lock, flags);
@@ -146,7 +147,8 @@ void intel_dmc_wl_disable(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
- if (DISPLAY_VER(i915) < 20)
+ if (!i915->display.params.enable_dmc_wl ||
+ DISPLAY_VER(i915) < 20)
return;
flush_delayed_work(>work);
@@ -177,7 +179,8 @@ void intel_dmc_wl_get(struct drm_i915_private *i915,
i915_reg_t reg)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
- if (DISPLAY_VER(i915) < 20)
+ if (!i915->display.params.enable_dmc_wl ||
+ DISPLAY_VER(i915) < 20)
return;
if (!intel_dmc_wl_check_range(reg.reg))
@@ -212,7 +215,8 @@ void intel_dmc_wl_put(struct drm_i915_private *i915,
i915_reg_t reg)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
- if (DISPLAY_VER(i915) < 20)
+ if (!i915->display.params.enable_dmc_wl ||
+ DISPLAY_VER(i915) < 20)
return;
if (!intel_dmc_wl_check_range(reg.reg))
--
2.39.2
[PATCH v3 2/4] drm/i915/display: don't allow DMC wakelock on older hardware
Only allow running DMC wakelock code if the display version is 20 or greater. Signed-off-by: Luca Coelho --- drivers/gpu/drm/i915/display/intel_dmc_wl.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c index 5c3d8204ae7e..7c991e22c616 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c @@ -120,6 +120,9 @@ void intel_dmc_wl_enable(struct drm_i915_private *i915) struct intel_dmc_wl *wl = >display.wl; unsigned long flags; + if (DISPLAY_VER(i915) < 20) + return; + spin_lock_irqsave(>lock, flags); if (wl->enabled) @@ -143,6 +146,9 @@ void intel_dmc_wl_disable(struct drm_i915_private *i915) struct intel_dmc_wl *wl = >display.wl; unsigned long flags; + if (DISPLAY_VER(i915) < 20) + return; + flush_delayed_work(>work); spin_lock_irqsave(>lock, flags); @@ -171,6 +177,9 @@ void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg) struct intel_dmc_wl *wl = >display.wl; unsigned long flags; + if (DISPLAY_VER(i915) < 20) + return; + if (!intel_dmc_wl_check_range(reg.reg)) return; @@ -203,6 +212,9 @@ void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg) struct intel_dmc_wl *wl = >display.wl; unsigned long flags; + if (DISPLAY_VER(i915) < 20) + return; + if (!intel_dmc_wl_check_range(reg.reg)) return; -- 2.39.2
[PATCH v3 1/4] drm/i915/display: add support for DMC wakelocks
In order to reduce the DC5->DC2 restore time, wakelocks have been
introduced in DMC so the driver can tell it when registers and other
memory areas are going to be accessed and keep their respective blocks
awake.
Implement this in the driver by adding the concept of DMC wakelocks.
When the driver needs to access memory which lies inside pre-defined
ranges, it will tell DMC to set the wakelock, access the memory, then
wait for a while and clear the wakelock.
The wakelock state is protected in the driver with spinlocks to
prevent concurrency issues.
BSpec: 71583
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_de.h | 97 +++-
.../gpu/drm/i915/display/intel_display_core.h | 2 +
.../drm/i915/display/intel_display_driver.c | 1 +
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 226 ++
drivers/gpu/drm/i915/display/intel_dmc_wl.h | 30 +++
drivers/gpu/drm/xe/Makefile | 1 +
8 files changed, 356 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3ef6ed41e62b..af83ea94c771 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -270,6 +270,7 @@ i915-y += \
display/intel_display_rps.o \
display/intel_display_wa.o \
display/intel_dmc.o \
+ display/intel_dmc_wl.o \
display/intel_dpio_phy.o \
display/intel_dpll.o \
display/intel_dpll_mgr.o \
diff --git a/drivers/gpu/drm/i915/display/intel_de.h
b/drivers/gpu/drm/i915/display/intel_de.h
index 42552d8c151e..6728a0077793 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -13,52 +13,125 @@
static inline u32
intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
{
- return intel_uncore_read(>uncore, reg);
+ u32 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = intel_uncore_read(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
}
static inline u8
intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)
{
- return intel_uncore_read8(>uncore, reg);
+ u8 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = intel_uncore_read8(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
}
static inline u64
intel_de_read64_2x32(struct drm_i915_private *i915,
i915_reg_t lower_reg, i915_reg_t upper_reg)
{
- return intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
+ u64 val;
+
+ intel_dmc_wl_get(i915, lower_reg);
+ intel_dmc_wl_get(i915, upper_reg);
+
+ val = intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
+
+ intel_dmc_wl_put(i915, upper_reg);
+ intel_dmc_wl_put(i915, lower_reg);
+
+ return val;
}
static inline void
intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
{
+ intel_dmc_wl_get(i915, reg);
+
intel_uncore_posting_read(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
}
static inline void
intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
{
+ intel_dmc_wl_get(i915, reg);
+
intel_uncore_write(>uncore, reg, val);
+
+ intel_dmc_wl_put(i915, reg);
}
static inline u32
-intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+__intel_de_rmw_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 clear, u32 set)
{
return intel_uncore_rmw(>uncore, reg, clear, set);
}
+static inline u32
+intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+{
+ u32 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = __intel_de_rmw_nowl(i915, reg, clear, set);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
+}
+
+static inline int
+__intel_wait_for_register_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 mask, u32 value, unsigned int timeout)
+{
+ return intel_wait_for_register(>uncore, reg, mask,
+ value, timeout);
+}
+
static inline int
intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,
u32 mask, u32 value, unsigned int timeout)
{
- return intel_wait_for_register(>uncore, reg, mask, value,
timeout);
+ int ret;
+
+ intel_dmc_wl_get(i915, reg);
+
+ ret = __intel_wait_for_register_nowl(i915, reg, mask, value, timeout);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return ret;
}
static inline int
intel_de_wait_for_register_fw(struct drm_i915_private *i915, i915_reg_t reg,
u32 m
[PATCH v3 0/4] drm/i915/display: DMC wakelock implementation
Hi, This is the fifth version of my series, the third as a proper patchset. These are the changes: In v3: * Fixed some checkpatch issues. In v2: * Enable/disable the wakelocks on DC5-6 entry and exit instead of on DMC load and unload; * Added bspec link to the commit message; * A bunch of other small changes; * For the complete list of changes and discussions, please look at the patchset in patchwork: https://patchwork.freedesktop.org/series/128628/ Please review. Cheers, Luca. Luca Coelho (4): drm/i915/display: add support for DMC wakelocks drm/i915/display: don't allow DMC wakelock on older hardware drm/i915/display: add module parameter to enable DMC wakelock drm/i915/display: tie DMC wakelock to DC5/6 state transitions drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_de.h | 97 ++- .../gpu/drm/i915/display/intel_display_core.h | 2 + .../drm/i915/display/intel_display_driver.c | 1 + .../drm/i915/display/intel_display_params.c | 5 + .../drm/i915/display/intel_display_params.h | 1 + .../i915/display/intel_display_power_well.c | 7 + drivers/gpu/drm/i915/display/intel_dmc.c | 4 + drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 + drivers/gpu/drm/i915/display/intel_dmc_wl.c | 242 ++ drivers/gpu/drm/i915/display/intel_dmc_wl.h | 30 +++ drivers/gpu/drm/xe/Makefile | 1 + 12 files changed, 389 insertions(+), 8 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h -- 2.39.2
[PATCH v2 4/4] drm/i915/display: tie DMC wakelock to DC5/6 state transitions
We only need DMC wakelocks when we allow DC5 and DC6 states. Add the calls to enable and disable DMC wakelock accordingly. Signed-off-by: Luca Coelho --- drivers/gpu/drm/i915/display/intel_display_power_well.c | 7 +++ drivers/gpu/drm/i915/display/intel_dmc.c| 4 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c index 217f82f1da84..367464f5c5cd 100644 --- a/drivers/gpu/drm/i915/display/intel_display_power_well.c +++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c @@ -17,6 +17,7 @@ #include "intel_dkl_phy.h" #include "intel_dkl_phy_regs.h" #include "intel_dmc.h" +#include "intel_dmc_wl.h" #include "intel_dp_aux_regs.h" #include "intel_dpio_phy.h" #include "intel_dpll.h" @@ -821,6 +822,8 @@ void gen9_enable_dc5(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); + intel_dmc_wl_enable(dev_priv); + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC5); } @@ -850,6 +853,8 @@ void skl_enable_dc6(struct drm_i915_private *dev_priv) intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0, SKL_SELECT_ALTERNATE_DC_EXIT); + intel_dmc_wl_enable(dev_priv); + gen9_set_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); } @@ -970,6 +975,8 @@ void gen9_disable_dc_states(struct drm_i915_private *dev_priv) if (!HAS_DISPLAY(dev_priv)) return; + intel_dmc_wl_disable(dev_priv); + intel_cdclk_get_cdclk(dev_priv, _config); /* Can't read out voltage_level so can't use intel_cdclk_changed() */ drm_WARN_ON(_priv->drm, diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c index 3fa851b5c7a6..b20cc018b9a8 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc.c +++ b/drivers/gpu/drm/i915/display/intel_dmc.c @@ -550,6 +550,8 @@ void intel_dmc_disable_program(struct drm_i915_private *i915) pipedmc_clock_gating_wa(i915, true); disable_all_event_handlers(i915); pipedmc_clock_gating_wa(i915, false); + + intel_dmc_wl_disable(i915); } void assert_dmc_loaded(struct drm_i915_private *i915) @@ -1079,6 +1081,8 @@ void intel_dmc_suspend(struct drm_i915_private *i915) if (dmc) flush_work(>work); + intel_dmc_wl_disable(i915); + /* Drop the reference held in case DMC isn't loaded. */ if (!intel_dmc_has_payload(i915)) intel_dmc_runtime_pm_put(i915); -- 2.39.2
[PATCH v2 3/4] drm/i915/display: add module parameter to enable DMC wakelock
This feature should be disabled by default until properly tested and
mature. Add a module parameter to enable the feature for testing,
while keeping it disabled by default for now.
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_display_params.c | 5 +
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 12
3 files changed, 14 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
b/drivers/gpu/drm/i915/display/intel_display_params.c
index 11e03cfb774d..f40b223cc8a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -116,6 +116,11 @@ intel_display_param_named_unsafe(enable_psr2_sel_fetch,
bool, 0400,
"(0=disabled, 1=enabled) "
"Default: 1");
+intel_display_param_named_unsafe(enable_dmc_wl, bool, 0400,
+ "Enable DMC wakelock "
+ "(0=disabled, 1=enabled) "
+ "Default: 0");
+
__maybe_unused
static void _param_print_bool(struct drm_printer *p, const char *driver_name,
const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
b/drivers/gpu/drm/i915/display/intel_display_params.h
index 6206cc51df04..bf8dbbdb20a1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -46,6 +46,7 @@ struct drm_i915_private;
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
param(bool, enable_psr2_sel_fetch, true, 0400) \
+ param(bool, enable_dmc_wl, false, 0400) \
#define MEMBER(T, member, ...) T member;
struct intel_display_params {
diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
index 6eea81a76fa4..8ad6d70a01b0 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c
@@ -120,7 +120,8 @@ void intel_dmc_wl_enable(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
- if (DISPLAY_VER(i915) < 20)
+ if (!i915->display.params.enable_dmc_wl ||
+ DISPLAY_VER(i915) < 20)
return;
spin_lock_irqsave(>lock, flags);
@@ -147,7 +148,8 @@ void intel_dmc_wl_disable(struct drm_i915_private *i915)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
- if (DISPLAY_VER(i915) < 20)
+ if (!i915->display.params.enable_dmc_wl ||
+ DISPLAY_VER(i915) < 20)
return;
flush_delayed_work(>work);
@@ -179,7 +181,8 @@ void intel_dmc_wl_get(struct drm_i915_private *i915,
i915_reg_t reg)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
- if (DISPLAY_VER(i915) < 20)
+ if (!i915->display.params.enable_dmc_wl ||
+ DISPLAY_VER(i915) < 20)
return;
if (!intel_dmc_wl_check_range(reg.reg))
@@ -214,7 +217,8 @@ void intel_dmc_wl_put(struct drm_i915_private *i915,
i915_reg_t reg)
struct intel_dmc_wl *wl = >display.wl;
unsigned long flags;
- if (DISPLAY_VER(i915) < 20)
+ if (!i915->display.params.enable_dmc_wl ||
+ DISPLAY_VER(i915) < 20)
return;
if (!intel_dmc_wl_check_range(reg.reg))
--
2.39.2
[PATCH v2 2/4] drm/i915/display: don't allow DMC wakelock on older hardware
Only allow running DMC wakelock code if the display version is 20 or greater. Signed-off-by: Luca Coelho --- drivers/gpu/drm/i915/display/intel_dmc_wl.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dmc_wl.c b/drivers/gpu/drm/i915/display/intel_dmc_wl.c index 7e5d325f5d55..6eea81a76fa4 100644 --- a/drivers/gpu/drm/i915/display/intel_dmc_wl.c +++ b/drivers/gpu/drm/i915/display/intel_dmc_wl.c @@ -120,6 +120,9 @@ void intel_dmc_wl_enable(struct drm_i915_private *i915) struct intel_dmc_wl *wl = >display.wl; unsigned long flags; + if (DISPLAY_VER(i915) < 20) + return; + spin_lock_irqsave(>lock, flags); if (wl->enabled) @@ -144,6 +147,9 @@ void intel_dmc_wl_disable(struct drm_i915_private *i915) struct intel_dmc_wl *wl = >display.wl; unsigned long flags; + if (DISPLAY_VER(i915) < 20) + return; + flush_delayed_work(>work); spin_lock_irqsave(>lock, flags); @@ -173,6 +179,9 @@ void intel_dmc_wl_get(struct drm_i915_private *i915, i915_reg_t reg) struct intel_dmc_wl *wl = >display.wl; unsigned long flags; + if (DISPLAY_VER(i915) < 20) + return; + if (!intel_dmc_wl_check_range(reg.reg)) return; @@ -205,6 +214,9 @@ void intel_dmc_wl_put(struct drm_i915_private *i915, i915_reg_t reg) struct intel_dmc_wl *wl = >display.wl; unsigned long flags; + if (DISPLAY_VER(i915) < 20) + return; + if (!intel_dmc_wl_check_range(reg.reg)) return; -- 2.39.2
[PATCH v2 1/4] drm/i915/display: add support for DMC wakelocks
In order to reduce the DC5->DC2 restore time, wakelocks have been
introduced in DMC so the driver can tell it when registers and other
memory areas are going to be accessed and keep their respective blocks
awake.
Implement this in the driver by adding the concept of DMC wakelocks.
When the driver needs to access memory which lies inside pre-defined
ranges, it will tell DMC to set the wakelock, access the memory, then
wait for a while and clear the wakelock.
The wakelock state is protected in the driver with spinlocks to
prevent concurrency issues.
BSpec: 71583
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/display/intel_de.h | 97 +++-
.../gpu/drm/i915/display/intel_display_core.h | 2 +
.../drm/i915/display/intel_display_driver.c | 1 +
drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 +
drivers/gpu/drm/i915/display/intel_dmc_wl.c | 228 ++
drivers/gpu/drm/i915/display/intel_dmc_wl.h | 30 +++
drivers/gpu/drm/xe/Makefile | 1 +
8 files changed, 358 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c
create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3ef6ed41e62b..af83ea94c771 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -270,6 +270,7 @@ i915-y += \
display/intel_display_rps.o \
display/intel_display_wa.o \
display/intel_dmc.o \
+ display/intel_dmc_wl.o \
display/intel_dpio_phy.o \
display/intel_dpll.o \
display/intel_dpll_mgr.o \
diff --git a/drivers/gpu/drm/i915/display/intel_de.h
b/drivers/gpu/drm/i915/display/intel_de.h
index 42552d8c151e..6728a0077793 100644
--- a/drivers/gpu/drm/i915/display/intel_de.h
+++ b/drivers/gpu/drm/i915/display/intel_de.h
@@ -13,52 +13,125 @@
static inline u32
intel_de_read(struct drm_i915_private *i915, i915_reg_t reg)
{
- return intel_uncore_read(>uncore, reg);
+ u32 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = intel_uncore_read(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
}
static inline u8
intel_de_read8(struct drm_i915_private *i915, i915_reg_t reg)
{
- return intel_uncore_read8(>uncore, reg);
+ u8 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = intel_uncore_read8(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
}
static inline u64
intel_de_read64_2x32(struct drm_i915_private *i915,
i915_reg_t lower_reg, i915_reg_t upper_reg)
{
- return intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
+ u64 val;
+
+ intel_dmc_wl_get(i915, lower_reg);
+ intel_dmc_wl_get(i915, upper_reg);
+
+ val = intel_uncore_read64_2x32(>uncore, lower_reg, upper_reg);
+
+ intel_dmc_wl_put(i915, upper_reg);
+ intel_dmc_wl_put(i915, lower_reg);
+
+ return val;
}
static inline void
intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg)
{
+ intel_dmc_wl_get(i915, reg);
+
intel_uncore_posting_read(>uncore, reg);
+
+ intel_dmc_wl_put(i915, reg);
}
static inline void
intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val)
{
+ intel_dmc_wl_get(i915, reg);
+
intel_uncore_write(>uncore, reg, val);
+
+ intel_dmc_wl_put(i915, reg);
}
static inline u32
-intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+__intel_de_rmw_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 clear, u32 set)
{
return intel_uncore_rmw(>uncore, reg, clear, set);
}
+static inline u32
+intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set)
+{
+ u32 val;
+
+ intel_dmc_wl_get(i915, reg);
+
+ val = __intel_de_rmw_nowl(i915, reg, clear, set);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return val;
+}
+
+static inline int
+__intel_wait_for_register_nowl(struct drm_i915_private *i915, i915_reg_t reg,
+ u32 mask, u32 value, unsigned int timeout)
+{
+ return intel_wait_for_register(>uncore, reg, mask,
+ value, timeout);
+}
+
static inline int
intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg,
u32 mask, u32 value, unsigned int timeout)
{
- return intel_wait_for_register(>uncore, reg, mask, value,
timeout);
+ int ret;
+
+ intel_dmc_wl_get(i915, reg);
+
+ ret = __intel_wait_for_register_nowl(i915, reg, mask, value, timeout);
+
+ intel_dmc_wl_put(i915, reg);
+
+ return ret;
}
static inline int
intel_de_wait_for_register_fw(struct drm_i915_private *i915, i915_reg_t reg,
u32 m
[PATCH v2 0/4] drm/i915/display: DMC wakelock implementation
Hi, This is the fourth version of my series, the second as a proper patchset. Now sent for the drm-tip (intel-gfx). The changes comparing to v1 are just addressing Gustavo's comments. The major changes are: * Enable/disable the wakelocks on DC5-6 entry and exit instead of on DMC load and unload; * Added bspec link to the commit message; * A bunch of other small changes. For the complete list of changes and discussions, please look at the patchset in patchwork: https://patchwork.freedesktop.org/series/128628/ Please review. Cheers, Luca. Luca Coelho (4): drm/i915/display: add support for DMC wakelocks drm/i915/display: don't allow DMC wakelock on older hardware drm/i915/display: add module parameter to enable DMC wakelock drm/i915/display: tie DMC wakelock to DC5/6 state transitions drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/display/intel_de.h | 97 ++- .../gpu/drm/i915/display/intel_display_core.h | 2 + .../drm/i915/display/intel_display_driver.c | 1 + .../drm/i915/display/intel_display_params.c | 5 + .../drm/i915/display/intel_display_params.h | 1 + .../i915/display/intel_display_power_well.c | 7 + drivers/gpu/drm/i915/display/intel_dmc.c | 4 + drivers/gpu/drm/i915/display/intel_dmc_regs.h | 6 + drivers/gpu/drm/i915/display/intel_dmc_wl.c | 244 ++ drivers/gpu/drm/i915/display/intel_dmc_wl.h | 30 +++ drivers/gpu/drm/xe/Makefile | 1 + 12 files changed, 391 insertions(+), 8 deletions(-) create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.c create mode 100644 drivers/gpu/drm/i915/display/intel_dmc_wl.h -- 2.39.2
[PATCH] drm/xe/display: fix type of intel_uncore_read*() functions
Some of the backported intel_uncore_read*() functions used the wrong
types. Change the function declarations accordingly.
Reviewed-by: Gustavo Sousa
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
index cd26ddc0f69e..ef79793caa72 100644
--- a/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
+++ b/drivers/gpu/drm/xe/compat-i915-headers/intel_uncore.h
@@ -25,15 +25,15 @@ static inline u32 intel_uncore_read(struct intel_uncore
*uncore,
return xe_mmio_read32(__compat_uncore_to_gt(uncore), reg);
}
-static inline u32 intel_uncore_read8(struct intel_uncore *uncore,
-i915_reg_t i915_reg)
+static inline u8 intel_uncore_read8(struct intel_uncore *uncore,
+ i915_reg_t i915_reg)
{
struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg));
return xe_mmio_read8(__compat_uncore_to_gt(uncore), reg);
}
-static inline u32 intel_uncore_read16(struct intel_uncore *uncore,
+static inline u16 intel_uncore_read16(struct intel_uncore *uncore,
i915_reg_t i915_reg)
{
struct xe_reg reg = XE_REG(i915_mmio_reg_offset(i915_reg));
--
2.39.2
Re: [PATCH 01/10] drm/print: make drm_err_printer() device specific by using drm_err()
On Tue, 2024-01-16 at 15:07 +0200, Jani Nikula wrote:
> With few users for drm_err_printer(), it's still feasible to convert it
> to be device specific. Use drm_err() under the hood.
>
> While at it, make the prefix optional.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_print.c | 7 ++-
> drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c | 4 ++--
> drivers/gpu/drm/i915/selftests/i915_active.c| 4 ++--
> include/drm/drm_print.h | 11 ---
> 4 files changed, 18 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
> index 5b93c11895bb..91dbcdeaad3f 100644
> --- a/drivers/gpu/drm/drm_print.c
> +++ b/drivers/gpu/drm/drm_print.c
> @@ -191,7 +191,12 @@ EXPORT_SYMBOL(__drm_printfn_debug);
>
> void __drm_printfn_err(struct drm_printer *p, struct va_format *vaf)
> {
> - pr_err("*ERROR* %s %pV", p->prefix, vaf);
> + struct drm_device *drm = p->arg;
> +
> + if (p->prefix)
> + drm_err(drm, "%s %pV", p->prefix, vaf);
> + else
> + drm_err(drm, "%pV", vaf);
> }
> EXPORT_SYMBOL(__drm_printfn_err);
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> index bc441ce7b380..be827318275c 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> @@ -122,7 +122,7 @@ static int __live_idle_pulse(struct intel_engine_cs
> *engine,
> GEM_BUG_ON(!llist_empty(>barrier_tasks));
>
> if (engine_sync_barrier(engine)) {
> - struct drm_printer m = drm_err_printer("pulse");
> + struct drm_printer m = drm_err_printer(>i915->drm,
> "pulse");
>
> pr_err("%s: no heartbeat pulse?\n", engine->name);
> intel_engine_dump(engine, , "%s", engine->name);
> @@ -136,7 +136,7 @@ static int __live_idle_pulse(struct intel_engine_cs
> *engine,
> pulse_unlock_wait(p); /* synchronize with the retirement callback */
>
> if (!i915_active_is_idle(>active)) {
> - struct drm_printer m = drm_err_printer("pulse");
> + struct drm_printer m = drm_err_printer(>i915->drm,
> "pulse");
>
> pr_err("%s: heartbeat pulse did not flush idle tasks\n",
> engine->name);
> diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c
> b/drivers/gpu/drm/i915/selftests/i915_active.c
> index b61fe850e924..8886752ade63 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_active.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_active.c
> @@ -156,7 +156,7 @@ static int live_active_wait(void *arg)
>
> __i915_active_wait(>base, TASK_UNINTERRUPTIBLE);
> if (!READ_ONCE(active->retired)) {
> - struct drm_printer p = drm_err_printer(__func__);
> + struct drm_printer p = drm_err_printer(>drm, __func__);
>
> pr_err("i915_active not retired after waiting!\n");
> i915_active_print(>base, );
> @@ -189,7 +189,7 @@ static int live_active_retire(void *arg)
> err = -EIO;
>
> if (!READ_ONCE(active->retired)) {
> - struct drm_printer p = drm_err_printer(__func__);
> + struct drm_printer p = drm_err_printer(>drm, __func__);
>
> pr_err("i915_active not retired after flushing!\n");
> i915_active_print(>base, );
> diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
> index 5ed26a702e3e..1040213d02a4 100644
> --- a/include/drm/drm_print.h
> +++ b/include/drm/drm_print.h
> @@ -35,6 +35,8 @@
>
> #include
>
> +struct drm_device;
> +
> /* Do *not* use outside of drm_print.[ch]! */
> extern unsigned long __drm_debug;
>
> @@ -235,16 +237,19 @@ static inline struct drm_printer
> drm_debug_printer(const char *prefix)
> }
>
> /**
> - * drm_err_printer - construct a _printer that outputs to pr_err()
> - * @prefix: debug output prefix
> + * drm_err_printer - construct a _printer that outputs to drm_err()
> + * @drm: the drm_device pointer
> + * @prefix: debug output prefix, or NULL for no prefix
> *
> * RETURNS:
> * The _printer object
> */
> -static inline struct drm_printer drm_err_printer(const char *prefix)
> +static inline struct drm_printer drm_err_printer(struct drm_device *drm,
> + const char *prefix)
> {
> struct drm_printer p = {
> .printfn = __drm_printfn_err,
> + .arg = drm,
> .prefix = prefix
> };
> return p;
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [PATCH 02/10] drm/print: move enum drm_debug_category etc. earlier in drm_print.h
l enable CORE messages
> - * - drm.debug=0x2 will enable DRIVER messages
> - * - drm.debug=0x3 will enable CORE and DRIVER messages
> - * - ...
> - * - drm.debug=0x1ff will enable all messages
> - *
> - * An interesting feature is that it's possible to enable verbose logging at
> - * run-time by echoing the debug value in its sysfs node::
> - *
> - * # echo 0xf > /sys/module/drm/parameters/debug
> - *
> - */
> -enum drm_debug_category {
> - /* These names must match those in DYNAMIC_DEBUG_CLASSBITS */
> - /**
> - * @DRM_UT_CORE: Used in the generic drm code: drm_ioctl.c, drm_mm.c,
> - * drm_memory.c, ...
> - */
> - DRM_UT_CORE,
> - /**
> - * @DRM_UT_DRIVER: Used in the vendor specific part of the driver: i915,
> - * radeon, ... macro.
> - */
> - DRM_UT_DRIVER,
> - /**
> - * @DRM_UT_KMS: Used in the modesetting code.
> - */
> - DRM_UT_KMS,
> - /**
> - * @DRM_UT_PRIME: Used in the prime code.
> - */
> - DRM_UT_PRIME,
> - /**
> - * @DRM_UT_ATOMIC: Used in the atomic code.
> - */
> - DRM_UT_ATOMIC,
> - /**
> - * @DRM_UT_VBL: Used for verbose debug message in the vblank code.
> - */
> - DRM_UT_VBL,
> - /**
> - * @DRM_UT_STATE: Used for verbose atomic state debugging.
> - */
> - DRM_UT_STATE,
> - /**
> - * @DRM_UT_LEASE: Used in the lease code.
> - */
> - DRM_UT_LEASE,
> - /**
> - * @DRM_UT_DP: Used in the DP code.
> - */
> - DRM_UT_DP,
> - /**
> - * @DRM_UT_DRMRES: Used in the drm managed resources code.
> - */
> - DRM_UT_DRMRES
> -};
> -
> -static inline bool drm_debug_enabled_raw(enum drm_debug_category category)
> -{
> - return unlikely(__drm_debug & BIT(category));
> -}
> -
> -#define drm_debug_enabled_instrumented(category) \
> - ({ \
> - pr_debug("todo: is this frequent enough to optimize ?\n"); \
> - drm_debug_enabled_raw(category); \
> - })
> -
> -#if defined(CONFIG_DRM_USE_DYNAMIC_DEBUG)
> -/*
> - * the drm.debug API uses dyndbg, so each drm_*dbg macro/callsite gets
> - * a descriptor, and only enabled callsites are reachable. They use
> - * the private macro to avoid re-testing the enable-bit.
> - */
> -#define __drm_debug_enabled(category)true
> -#define drm_debug_enabled(category) drm_debug_enabled_instrumented(category)
> -#else
> -#define __drm_debug_enabled(category)drm_debug_enabled_raw(category)
> -#define drm_debug_enabled(category) drm_debug_enabled_raw(category)
> -#endif
> -
> /*
> * struct device based logging
> *
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [PATCH 10/10] drm: remove drm_debug_printer in favor of drm_dbg_printer
On Tue, 2024-01-16 at 15:07 +0200, Jani Nikula wrote:
> Convert the remaining drm_debug_printer users over to drm_dbg_printer,
> as it can handle the cases without struct drm_device pointer, and also
> provides drm debug category and prefix support. Remove drm_debug_printer
> altogether.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_modeset_lock.c | 2 +-
> drivers/gpu/drm/drm_print.c| 7 ---
> drivers/gpu/drm/ttm/ttm_bo.c | 2 +-
> include/drm/drm_print.h| 17 -
> 4 files changed, 2 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_modeset_lock.c
> b/drivers/gpu/drm/drm_modeset_lock.c
> index 918065982db4..7694b85e75e3 100644
> --- a/drivers/gpu/drm/drm_modeset_lock.c
> +++ b/drivers/gpu/drm/drm_modeset_lock.c
> @@ -91,7 +91,7 @@ static noinline depot_stack_handle_t
> __drm_stack_depot_save(void)
>
> static void __drm_stack_depot_print(depot_stack_handle_t stack_depot)
> {
> - struct drm_printer p = drm_debug_printer("drm_modeset_lock");
> + struct drm_printer p = drm_dbg_printer(NULL, DRM_UT_KMS,
> "drm_modeset_lock");
> unsigned long *entries;
> unsigned int nr_entries;
> char *buf;
> diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
> index 673b29c732ea..699b7dbffd7b 100644
> --- a/drivers/gpu/drm/drm_print.c
> +++ b/drivers/gpu/drm/drm_print.c
> @@ -182,13 +182,6 @@ void __drm_printfn_info(struct drm_printer *p, struct
> va_format *vaf)
> }
> EXPORT_SYMBOL(__drm_printfn_info);
>
> -void __drm_printfn_debug(struct drm_printer *p, struct va_format *vaf)
> -{
> - /* pr_debug callsite decorations are unhelpful here */
> - printk(KERN_DEBUG "%s %pV", p->prefix, vaf);
> -}
> -EXPORT_SYMBOL(__drm_printfn_debug);
> -
> void __drm_printfn_dbg(struct drm_printer *p, struct va_format *vaf)
> {
> const struct drm_device *drm = p->arg;
> diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
> index edf10618fe2b..30e1fe864826 100644
> --- a/drivers/gpu/drm/ttm/ttm_bo.c
> +++ b/drivers/gpu/drm/ttm/ttm_bo.c
> @@ -49,7 +49,7 @@
> static void ttm_bo_mem_space_debug(struct ttm_buffer_object *bo,
> struct ttm_placement *placement)
> {
> - struct drm_printer p = drm_debug_printer(TTM_PFX);
> + struct drm_printer p = drm_dbg_printer(NULL, DRM_UT_CORE, TTM_PFX);
> struct ttm_resource_manager *man;
> int i, mem_type;
>
> diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
> index 27e23c06dad4..9cc473e5d353 100644
> --- a/include/drm/drm_print.h
> +++ b/include/drm/drm_print.h
> @@ -184,7 +184,6 @@ void __drm_puts_coredump(struct drm_printer *p, const
> char *str);
> void __drm_printfn_seq_file(struct drm_printer *p, struct va_format *vaf);
> void __drm_puts_seq_file(struct drm_printer *p, const char *str);
> void __drm_printfn_info(struct drm_printer *p, struct va_format *vaf);
> -void __drm_printfn_debug(struct drm_printer *p, struct va_format *vaf);
> void __drm_printfn_dbg(struct drm_printer *p, struct va_format *vaf);
> void __drm_printfn_err(struct drm_printer *p, struct va_format *vaf);
>
> @@ -317,22 +316,6 @@ static inline struct drm_printer drm_info_printer(struct
> device *dev)
> return p;
> }
>
> -/**
> - * drm_debug_printer - construct a _printer that outputs to pr_debug()
> - * @prefix: debug output prefix
> - *
> - * RETURNS:
> - * The _printer object
> - */
> -static inline struct drm_printer drm_debug_printer(const char *prefix)
> -{
> - struct drm_printer p = {
> - .printfn = __drm_printfn_debug,
> - .prefix = prefix
> - };
> - return p;
> -}
> -
> /**
> * drm_dbg_printer - construct a _printer for drm device specific output
> * @drm: the drm_device pointer, or NULL
Why did you choose to make the last changes together with the patch
that removed the old version entirely? Was it because you didn't to
have any commit where the old version is defined but not used?
In any case, this is fine with me, so:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [PATCH 09/10] drm/xe: switch from drm_debug_printer() to device specific drm_dbg_printer()
On Tue, 2024-01-16 at 15:07 +0200, Jani Nikula wrote:
> Prefer the device specific debug printer.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/xe/xe_gt.c | 2 +-
> drivers/gpu/drm/xe/xe_gt_topology.c | 4 +++-
> drivers/gpu/drm/xe/xe_reg_sr.c | 2 +-
> 3 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt.c b/drivers/gpu/drm/xe/xe_gt.c
> index 0f2258dc4a00..16481f9b3125 100644
> --- a/drivers/gpu/drm/xe/xe_gt.c
> +++ b/drivers/gpu/drm/xe/xe_gt.c
> @@ -327,7 +327,7 @@ static void dump_pat_on_error(struct xe_gt *gt)
> char prefix[32];
>
> snprintf(prefix, sizeof(prefix), "[GT%u Error]", gt->info.id);
> - p = drm_debug_printer(prefix);
> + p = drm_dbg_printer(_to_xe(gt)->drm, DRM_UT_DRIVER, prefix);
>
> xe_pat_dump(gt, );
> }
> diff --git a/drivers/gpu/drm/xe/xe_gt_topology.c
> b/drivers/gpu/drm/xe/xe_gt_topology.c
> index a8d7f272c30a..5dc62fe1be49 100644
> --- a/drivers/gpu/drm/xe/xe_gt_topology.c
> +++ b/drivers/gpu/drm/xe/xe_gt_topology.c
> @@ -84,7 +84,7 @@ void
> xe_gt_topology_init(struct xe_gt *gt)
> {
> struct xe_device *xe = gt_to_xe(gt);
> - struct drm_printer p = drm_debug_printer("GT topology");
> + struct drm_printer p;
> int num_geometry_regs, num_compute_regs;
>
> get_num_dss_regs(xe, _geometry_regs, _compute_regs);
> @@ -107,6 +107,8 @@ xe_gt_topology_init(struct xe_gt *gt)
> XE2_GT_COMPUTE_DSS_2);
> load_eu_mask(gt, gt->fuse_topo.eu_mask_per_dss);
>
> + p = drm_dbg_printer(_to_xe(gt)->drm, DRM_UT_DRIVER, "GT topology");
> +
I'm not sure there was a specific reason to move the initialization out
of the declaration, but it's probably a bit cleaner and more aligned
with other places...
> xe_gt_topology_dump(gt, );
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_reg_sr.c b/drivers/gpu/drm/xe/xe_reg_sr.c
> index 87adefb56024..440ac572f6e5 100644
> --- a/drivers/gpu/drm/xe/xe_reg_sr.c
> +++ b/drivers/gpu/drm/xe/xe_reg_sr.c
> @@ -231,7 +231,7 @@ void xe_reg_sr_apply_whitelist(struct xe_hw_engine *hwe)
> if (err)
> goto err_force_wake;
>
> - p = drm_debug_printer(KBUILD_MODNAME);
> + p = drm_dbg_printer(>drm, DRM_UT_DRIVER, NULL);
> xa_for_each(>xa, reg, entry) {
> if (slot == RING_MAX_NONPRIV_SLOTS) {
> xe_gt_err(gt,
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [PATCH 08/10] drm/i915: use drm_printf() with the drm_err_printer intead of pr_err()
On Tue, 2024-01-16 at 15:07 +0200, Jani Nikula wrote:
> There's already a related drm_printer. Use it to preserve the context
> instead of a separate pr_err().
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c | 6 +++---
> drivers/gpu/drm/i915/selftests/i915_active.c| 4 ++--
> 2 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> index be827318275c..ef014df4c4fc 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_engine_heartbeat.c
> @@ -124,7 +124,7 @@ static int __live_idle_pulse(struct intel_engine_cs
> *engine,
> if (engine_sync_barrier(engine)) {
> struct drm_printer m = drm_err_printer(>i915->drm,
> "pulse");
>
> - pr_err("%s: no heartbeat pulse?\n", engine->name);
> + drm_printf(, "%s: no heartbeat pulse?\n", engine->name);
> intel_engine_dump(engine, , "%s", engine->name);
>
> err = -ETIME;
> @@ -138,8 +138,8 @@ static int __live_idle_pulse(struct intel_engine_cs
> *engine,
> if (!i915_active_is_idle(>active)) {
> struct drm_printer m = drm_err_printer(>i915->drm,
> "pulse");
>
> - pr_err("%s: heartbeat pulse did not flush idle tasks\n",
> -engine->name);
> + drm_printf(, "%s: heartbeat pulse did not flush idle tasks\n",
> +engine->name);
> i915_active_print(>active, );
>
> err = -EINVAL;
> diff --git a/drivers/gpu/drm/i915/selftests/i915_active.c
> b/drivers/gpu/drm/i915/selftests/i915_active.c
> index 8886752ade63..0d89d70b9c36 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_active.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_active.c
> @@ -158,7 +158,7 @@ static int live_active_wait(void *arg)
> if (!READ_ONCE(active->retired)) {
> struct drm_printer p = drm_err_printer(>drm, __func__);
>
> - pr_err("i915_active not retired after waiting!\n");
> + drm_printf(, "i915_active not retired after waiting!\n");
> i915_active_print(>base, );
>
> err = -EINVAL;
> @@ -191,7 +191,7 @@ static int live_active_retire(void *arg)
> if (!READ_ONCE(active->retired)) {
> struct drm_printer p = drm_err_printer(>drm, __func__);
>
> - pr_err("i915_active not retired after flushing!\n");
> + drm_printf(, "i915_active not retired after flushing!\n");
> i915_active_print(>base, );
>
> err = -EINVAL;
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [PATCH 07/10] drm/i915: switch from drm_debug_printer() to device specific drm_dbg_printer()
; if (drm_debug_enabled(DRM_UT_DRIVER)) {
> - struct drm_printer p = drm_debug_printer("i915 device info:");
> + struct drm_printer p = drm_dbg_printer(_priv->drm,
> DRM_UT_DRIVER,
> +"device info:");
> struct intel_gt *gt;
> unsigned int i;
>
Okay, this are all pretty much the same pattern, so I should have given
a single r-b for the whole series, but now I have only a few left,
so...
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [PATCH 06/10] drm/dp: switch drm_dp_vsc_sdp_log() to struct drm_printer
"found:\n");
> - drm_dp_vsc_sdp_log(KERN_ERR, dev_priv->drm.dev, b);
> + p = drm_err_printer(>drm, NULL);
> +
> + drm_printf(, "mismatch in %s dp sdp\n", name);
> }
> +
> + drm_printf(, "expected:\n");
> + drm_dp_vsc_sdp_log(, a);
> + drm_printf(, "found:\n");
> + drm_dp_vsc_sdp_log(, b);
> }
>
> /* Returns the length up to and including the last differing byte */
> diff --git a/include/drm/display/drm_dp_helper.h
> b/include/drm/display/drm_dp_helper.h
> index 863b2e7add29..d02014a87f12 100644
> --- a/include/drm/display/drm_dp_helper.h
> +++ b/include/drm/display/drm_dp_helper.h
> @@ -98,8 +98,7 @@ struct drm_dp_vsc_sdp {
> enum dp_content_type content_type;
> };
>
> -void drm_dp_vsc_sdp_log(const char *level, struct device *dev,
> - const struct drm_dp_vsc_sdp *vsc);
> +void drm_dp_vsc_sdp_log(struct drm_printer *p, const struct drm_dp_vsc_sdp
> *vsc);
>
> int drm_dp_psr_setup_time(const u8 psr_cap[EDP_PSR_RECEIVER_CAP_SIZE]);
>
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [PATCH 05/10] drm/mode: switch from drm_debug_printer() to device specific drm_dbg_printer()
On Tue, 2024-01-16 at 15:07 +0200, Jani Nikula wrote:
> Prefer the device specific debug printer.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_mode_config.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_mode_config.c
> b/drivers/gpu/drm/drm_mode_config.c
> index 8525ef851540..48fd2d67f352 100644
> --- a/drivers/gpu/drm/drm_mode_config.c
> +++ b/drivers/gpu/drm/drm_mode_config.c
> @@ -544,7 +544,7 @@ void drm_mode_config_cleanup(struct drm_device *dev)
>*/
> WARN_ON(!list_empty(>mode_config.fb_list));
> list_for_each_entry_safe(fb, fbt, >mode_config.fb_list, head) {
> - struct drm_printer p = drm_debug_printer("[leaked fb]");
> + struct drm_printer p = drm_dbg_printer(dev, DRM_UT_KMS,
> "[leaked fb]");
>
> drm_printf(, "framebuffer[%u]:\n", fb->base.id);
> drm_framebuffer_print_info(, 1, fb);
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [PATCH 04/10] drm/dp_mst: switch from drm_debug_printer() to device specific drm_dbg_printer()
On Tue, 2024-01-16 at 15:07 +0200, Jani Nikula wrote:
> Prefer the device specific debug printer.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/display/drm_dp_mst_topology.c | 23 +++
> 1 file changed, 14 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> index 8ca01a6bf645..fba6e37b051b 100644
> --- a/drivers/gpu/drm/display/drm_dp_mst_topology.c
> +++ b/drivers/gpu/drm/display/drm_dp_mst_topology.c
> @@ -1306,7 +1306,8 @@ static int drm_dp_mst_wait_tx_reply(struct
> drm_dp_mst_branch *mstb,
> }
> out:
> if (unlikely(ret == -EIO) && drm_debug_enabled(DRM_UT_DP)) {
> - struct drm_printer p = drm_debug_printer(DBG_PREFIX);
> + struct drm_printer p = drm_dbg_printer(mgr->dev, DRM_UT_DP,
> +DBG_PREFIX);
>
> drm_dp_mst_dump_sideband_msg_tx(, txmsg);
> }
> @@ -1593,10 +1594,11 @@ topology_ref_type_to_str(enum
> drm_dp_mst_topology_ref_type type)
> }
>
> static void
> -__dump_topology_ref_history(struct drm_dp_mst_topology_ref_history *history,
> +__dump_topology_ref_history(struct drm_device *drm,
> + struct drm_dp_mst_topology_ref_history *history,
> void *ptr, const char *type_str)
> {
> - struct drm_printer p = drm_debug_printer(DBG_PREFIX);
> + struct drm_printer p = drm_dbg_printer(drm, DRM_UT_DP, DBG_PREFIX);
> char *buf = kzalloc(PAGE_SIZE, GFP_KERNEL);
> int i;
>
> @@ -1638,15 +1640,15 @@ __dump_topology_ref_history(struct
> drm_dp_mst_topology_ref_history *history,
> static __always_inline void
> drm_dp_mst_dump_mstb_topology_history(struct drm_dp_mst_branch *mstb)
> {
> - __dump_topology_ref_history(>topology_ref_history, mstb,
> - "MSTB");
> + __dump_topology_ref_history(mstb->mgr->dev, >topology_ref_history,
> + mstb, "MSTB");
> }
>
> static __always_inline void
> drm_dp_mst_dump_port_topology_history(struct drm_dp_mst_port *port)
> {
> - __dump_topology_ref_history(>topology_ref_history, port,
> - "Port");
> + __dump_topology_ref_history(port->mgr->dev, >topology_ref_history,
> + port, "Port");
> }
>
> static __always_inline void
> @@ -2824,7 +2826,9 @@ static int process_single_tx_qlock(struct
> drm_dp_mst_topology_mgr *mgr,
> ret = drm_dp_send_sideband_msg(mgr, up, chunk, idx);
> if (ret) {
> if (drm_debug_enabled(DRM_UT_DP)) {
> - struct drm_printer p = drm_debug_printer(DBG_PREFIX);
> + struct drm_printer p = drm_dbg_printer(mgr->dev,
> +DRM_UT_DP,
> +DBG_PREFIX);
>
> drm_printf(, "sideband msg failed to send\n");
> drm_dp_mst_dump_sideband_msg_tx(, txmsg);
> @@ -2869,7 +2873,8 @@ static void drm_dp_queue_down_tx(struct
> drm_dp_mst_topology_mgr *mgr,
> list_add_tail(>next, >tx_msg_downq);
>
> if (drm_debug_enabled(DRM_UT_DP)) {
> - struct drm_printer p = drm_debug_printer(DBG_PREFIX);
> + struct drm_printer p = drm_dbg_printer(mgr->dev, DRM_UT_DP,
> +DBG_PREFIX);
>
> drm_dp_mst_dump_sideband_msg_tx(, txmsg);
> }
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [PATCH 03/10] drm/print: add drm_dbg_printer() for drm device specific printer
On Tue, 2024-01-16 at 15:07 +0200, Jani Nikula wrote:
> We've lacked a device specific debug printer. Add one. Take category
> into account too.
>
> __builtin_return_address(0) is inaccurate here, so don't use it. If
> necessary, we can later pass __func__ to drm_dbg_printer() by wrapping
> it inside a macro.
>
> Signed-off-by: Jani Nikula
> ---
> drivers/gpu/drm/drm_print.c | 21 +
> include/drm/drm_print.h | 24
> 2 files changed, 45 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_print.c b/drivers/gpu/drm/drm_print.c
> index 91dbcdeaad3f..673b29c732ea 100644
> --- a/drivers/gpu/drm/drm_print.c
> +++ b/drivers/gpu/drm/drm_print.c
> @@ -189,6 +189,27 @@ void __drm_printfn_debug(struct drm_printer *p, struct
> va_format *vaf)
> }
> EXPORT_SYMBOL(__drm_printfn_debug);
>
> +void __drm_printfn_dbg(struct drm_printer *p, struct va_format *vaf)
> +{
> + const struct drm_device *drm = p->arg;
> + const struct device *dev = drm ? drm->dev : NULL;
> + enum drm_debug_category category = p->category;
> + const char *prefix = p->prefix ?: "";
> + const char *prefix_pad = p->prefix ? " " : "";
> +
> + if (!__drm_debug_enabled(category))
> + return;
> +
> + /* Note: __builtin_return_address(0) is useless here. */
> + if (dev)
> + dev_printk(KERN_DEBUG, dev, "[" DRM_NAME "]%s%s %pV",
> +prefix_pad, prefix, vaf);
> + else
> + printk(KERN_DEBUG "[" DRM_NAME "]%s%s %pV",
> +prefix_pad, prefix, vaf);
> +}
> +EXPORT_SYMBOL(__drm_printfn_dbg);
> +
> void __drm_printfn_err(struct drm_printer *p, struct va_format *vaf)
> {
> struct drm_device *drm = p->arg;
> diff --git a/include/drm/drm_print.h b/include/drm/drm_print.h
> index b8b4cb9bb878..27e23c06dad4 100644
> --- a/include/drm/drm_print.h
> +++ b/include/drm/drm_print.h
> @@ -176,6 +176,7 @@ struct drm_printer {
> void (*puts)(struct drm_printer *p, const char *str);
> void *arg;
> const char *prefix;
> + enum drm_debug_category category;
> };
>
> void __drm_printfn_coredump(struct drm_printer *p, struct va_format *vaf);
> @@ -184,6 +185,7 @@ void __drm_printfn_seq_file(struct drm_printer *p, struct
> va_format *vaf);
> void __drm_puts_seq_file(struct drm_printer *p, const char *str);
> void __drm_printfn_info(struct drm_printer *p, struct va_format *vaf);
> void __drm_printfn_debug(struct drm_printer *p, struct va_format *vaf);
> +void __drm_printfn_dbg(struct drm_printer *p, struct va_format *vaf);
I was wondering why you had both _debug() and _dbg() functions here,
but I see your goal is to remove _debug() at the end (done in the last
patch in the series).
> void __drm_printfn_err(struct drm_printer *p, struct va_format *vaf);
>
> __printf(2, 3)
> @@ -331,6 +333,28 @@ static inline struct drm_printer drm_debug_printer(const
> char *prefix)
> return p;
> }
>
> +/**
> + * drm_dbg_printer - construct a _printer for drm device specific output
> + * @drm: the drm_device pointer, or NULL
> + * @category: the debug category to use
> + * @prefix: debug output prefix, or NULL for no prefix
> + *
> + * RETURNS:
> + * The _printer object
> + */
> +static inline struct drm_printer drm_dbg_printer(struct drm_device *drm,
> + enum drm_debug_category
> category,
> + const char *prefix)
> +{
> + struct drm_printer p = {
> + .printfn = __drm_printfn_dbg,
> + .arg = drm,
> + .prefix = prefix,
> + .category = category,
> + };
> + return p;
> +}
> +
> /**
> * drm_err_printer - construct a _printer that outputs to drm_err()
> * @drm: the drm_device pointer
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
[PATCH v2] drm/i915: update eDP MSO pipe mask for newer platforms
Starting from display version 14, pipes A and B are supported in eDP
MSO. After display version 20 there are no restrictions.
Update the function that returns the pipe mask for eDP MSO
accordingly.
Bspec: 68923, 55473
Cc: Jani Nikula
Cc: James Ausmus
Reviewed-by: Gustavo Sousa
Signed-off-by: Luca Coelho
---
In v2:
* allow pipes A and B from ver 14 to 20 [Gustavo]
drivers/gpu/drm/i915/display/intel_ddi.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 922194b957be..29a616a8e72d 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2336,13 +2336,20 @@ static void intel_ddi_power_up_lanes(struct
intel_encoder *encoder,
}
}
-/* Splitter enable for eDP MSO is limited to certain pipes. */
+/*
+ * Splitter enable for eDP MSO is limited to certain pipes on certain
+ * platforms.
+ */
static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915)
{
- if (IS_ALDERLAKE_P(i915))
+
+ if (IS_ALDERLAKE_P(i915) ||
+ IS_DISPLAY_IP_RANGE(i915, IP_VER(14, 0), IP_VER(20, 0)))
return BIT(PIPE_A) | BIT(PIPE_B);
- else
+ else if (DISPLAY_VER(i915) < 14)
return BIT(PIPE_A);
+
+ return ~0;
}
static void intel_ddi_mso_get_config(struct intel_encoder *encoder,
--
2.39.2
[PATCH] drm/i915: limit eDP MSO pipe only for display version 20 and below
The pipes that can be used for eDP MSO are limited to pipe A (and
sometimes also pipe B) only for display version 20 and below.
Modify the function that returns the pipe mask for eDP MSO so that
these limitations only apply to version 20 and below, enabling all
pipes otherwise.
Bspec: 68923
Cc: Jani Nikula
Cc: James Ausmus
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_ddi.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 922194b957be..5c99ae148213 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2336,13 +2336,18 @@ static void intel_ddi_power_up_lanes(struct
intel_encoder *encoder,
}
}
-/* Splitter enable for eDP MSO is limited to certain pipes. */
+/*
+ * Splitter enable for eDP MSO is limited to certain pipes, on certain
+ * platforms.
+ */
static u8 intel_ddi_splitter_pipe_mask(struct drm_i915_private *i915)
{
if (IS_ALDERLAKE_P(i915))
return BIT(PIPE_A) | BIT(PIPE_B);
- else
+ else if (DISPLAY_VER(i915) <= 20)
return BIT(PIPE_A);
+
+ return ~0;
}
static void intel_ddi_mso_get_config(struct intel_encoder *encoder,
--
2.39.2
[PATCH] drm/i915: move interrupt save/restore into vblank section helpers
In all cases when we call the new helper functions, we save/restore
the interrupts, so we can move this to the helpers themselves. This
improves the semantics of the helper functions by having all
functionality needed to keep the section tight.
This makes a slight functional change by calling the irq_save/restore
functions twice in intel_crtc_update_active_timings(). This shouldn't
be a problem because nesting irq_save/restore calls is safe.
Nevertheless, the commit that originally introduced these helper
functions did not include the irq_save/restore calls in the helpers
themselves because of this exact, though minimal, functional change.
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
drivers/gpu/drm/i915/display/intel_vblank.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index fe256bf7b485..57ace171a94f 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -266,9 +266,10 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int
scanline)
}
/*
- * The uncore version of the spin lock functions is used to decide
- * whether we need to lock the uncore lock or not. This is only
- * needed in i915, not in Xe.
+ * These functions help enter and exit vblank critical sections. When
+ * entering, they disable interrupts and, for i915, acquire the
+ * uncore's spinlock. Conversely, when exiting, they release the
+ * spinlock and restore the interrupts state.
*
* This lock in i915 is needed because some old platforms (at least
* IVB and possibly HSW as well), which are not supported in Xe, need
@@ -278,6 +279,7 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int
scanline)
static void intel_vblank_section_enter(struct drm_i915_private *i915)
__acquires(i915->uncore.lock)
{
+ local_irq_save(irqflags);
#ifdef I915
spin_lock(>uncore.lock);
#endif
@@ -289,6 +291,7 @@ static void intel_vblank_section_exit(struct
drm_i915_private *i915)
#ifdef I915
spin_unlock(>uncore.lock);
#endif
+ local_irq_restore(irqflags);
}
static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
@@ -332,7 +335,6 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
* timing critical raw register reads, potentially with
* preemption disabled, so the following code must not block.
*/
- local_irq_save(irqflags);
intel_vblank_section_enter(dev_priv);
/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
@@ -402,7 +404,6 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
intel_vblank_section_exit(dev_priv);
- local_irq_restore(irqflags);
/*
* While in vblank, position will be negative
@@ -440,13 +441,11 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
unsigned long irqflags;
int position;
- local_irq_save(irqflags);
intel_vblank_section_enter(dev_priv);
position = __intel_get_crtc_scanline(crtc);
intel_vblank_section_exit(dev_priv);
- local_irq_restore(irqflags);
return position;
}
@@ -569,6 +568,13 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
* Need to audit everything to make sure it's safe.
*/
spin_lock_irqsave(>drm.vblank_time_lock, irqflags);
+
+ /*
+* At this point we have already disabled interrupts, and
+* intel_vblank_section_enter() does that too. But the
+* nesting is safe here, so it shouldn't be a problem to do it
+* twice.
+ */
intel_vblank_section_enter(i915);
drm_calc_timestamping_constants(>base, _mode);
--
2.39.2
[Intel-gfx] [PATCH v7] drm/i915: handle uncore spinlock when not available
The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.
To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper functions for locking and unlocking the uncore's
spinlock. In these functions, we have a condition check and only
actually try to lock/unlock the spinlock when I915 is defined, and
thus uncore is available.
This keeps the ifdefs contained in these new functions and all such
logic inside the display code.
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjala
Cc: Rodrigo Vivi
Signed-off-by: Luca Coelho
---
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, restore
In v3:
* Undid the change to pass drm_i915_private instead of the lock
itself, since we would have to include i915_drv.h and that pulls
in a truckload of other includes.
In v4:
* After a brief attempt to replace this with a different patch,
we're back to this one;
* Pass drm_i195_private again, and move the functions to
intel_vblank.c, so we don't need to include i915_drv.h in a
header file and it's already included in intel_vblank.c;
In v5:
* Remove stray include in intel_display.h;
* Remove unnecessary inline modifiers in the new functions.
In v6:
* Just removed the umlauts from Ville's name, because patchwork
didn't catch my patch and I suspect it was some UTF-8 confusion.
In v7:
* Add __acquires()/__releases() annotation to resolve sparse
warnings.
drivers/gpu/drm/i915/display/intel_vblank.c | 51 +
1 file changed, 41 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index 2cec2abf9746..fe256bf7b485 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -265,6 +265,32 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int
scanline)
return (scanline + vtotal - crtc->scanline_offset) % vtotal;
}
+/*
+ * The uncore version of the spin lock functions is used to decide
+ * whether we need to lock the uncore lock or not. This is only
+ * needed in i915, not in Xe.
+ *
+ * This lock in i915 is needed because some old platforms (at least
+ * IVB and possibly HSW as well), which are not supported in Xe, need
+ * all register accesses to the same cacheline to be serialized,
+ * otherwise they may hang.
+ */
+static void intel_vblank_section_enter(struct drm_i915_private *i915)
+ __acquires(i915->uncore.lock)
+{
+#ifdef I915
+ spin_lock(>uncore.lock);
+#endif
+}
+
+static void intel_vblank_section_exit(struct drm_i915_private *i915)
+ __releases(i915->uncore.lock)
+{
+#ifdef I915
+ spin_unlock(>uncore.lock);
+#endif
+}
+
static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
bool in_vblank_irq,
int *vpos, int *hpos,
@@ -302,11 +328,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc
*_crtc,
}
/*
-* Lock uncore.lock, as we will do multiple timing critical raw
-* register reads, potentially with preemption disabled, so the
-* following code must not block on uncore.lock.
+* Enter vblank critical section, as we will do multiple
+* timing critical raw register reads, potentially with
+* preemption disabled, so the following code must not block.
*/
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_vblank_section_enter(dev_priv);
/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
@@ -374,7 +401,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+ intel_vblank_section_exit(dev_priv);
+ local_irq_restore(irqflags);
/*
* While in vblank, position will be negative
@@ -412,9 +440,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
unsigned long irqflags;
int position;
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_vblank_section_enter(dev_priv);
+
position = __intel_get_crtc_scanline(crtc);
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+
+ intel_vblank_section_exit(dev_priv);
+ local_irq_restore(irqflags);
return position;
}
@@ -537,7 +569,7 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
* Need to audit everything to make sure it's safe.
*/
spin_lock_irqsave(>drm.vblank_time_lock
[Intel-gfx] [PATCH v6] drm/i915: handle uncore spinlock when not available
The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.
To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper functions for locking and unlocking the uncore's
spinlock. In these functions, we have a condition check and only
actually try to lock/unlock the spinlock when I915 is defined, and
thus uncore is available.
This keeps the ifdefs contained in these new functions and all such
logic inside the display code.
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrjala
Reviewed-by: Rodrigo Vivi
Signed-off-by: Luca Coelho
---
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, restore
In v3:
* Undid the change to pass drm_i915_private instead of the lock
itself, since we would have to include i915_drv.h and that pulls
in a truckload of other includes.
In v4:
* After a brief attempt to replace this with a different patch,
we're back to this one;
* Pass drm_i195_private again, and move the functions to
intel_vblank.c, so we don't need to include i915_drv.h in a
header file and it's already included in intel_vblank.c;
In v5:
* Remove stray include in intel_display.h;
* Remove unnecessary inline modifiers in the new functions.
In v6:
* Just removed the umlauts from Ville's name, because patchwork
didn't catch my patch and I suspect it was some UTF-8 confusion.
drivers/gpu/drm/i915/display/intel_vblank.c | 49 -
1 file changed, 39 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index 2cec2abf9746..221fcd6bf77b 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int
scanline)
return (scanline + vtotal - crtc->scanline_offset) % vtotal;
}
+/*
+ * The uncore version of the spin lock functions is used to decide
+ * whether we need to lock the uncore lock or not. This is only
+ * needed in i915, not in Xe.
+ *
+ * This lock in i915 is needed because some old platforms (at least
+ * IVB and possibly HSW as well), which are not supported in Xe, need
+ * all register accesses to the same cacheline to be serialized,
+ * otherwise they may hang.
+ */
+static void intel_vblank_section_enter(struct drm_i915_private *i915)
+{
+#ifdef I915
+ spin_lock(>uncore.lock);
+#endif
+}
+
+static void intel_vblank_section_exit(struct drm_i915_private *i915)
+{
+#ifdef I915
+ spin_unlock(>uncore.lock);
+#endif
+}
+
static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
bool in_vblank_irq,
int *vpos, int *hpos,
@@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc
*_crtc,
}
/*
-* Lock uncore.lock, as we will do multiple timing critical raw
-* register reads, potentially with preemption disabled, so the
-* following code must not block on uncore.lock.
+* Enter vblank critical section, as we will do multiple
+* timing critical raw register reads, potentially with
+* preemption disabled, so the following code must not block.
*/
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_vblank_section_enter(dev_priv);
/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
@@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+ intel_vblank_section_exit(dev_priv);
+ local_irq_restore(irqflags);
/*
* While in vblank, position will be negative
@@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
unsigned long irqflags;
int position;
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_vblank_section_enter(dev_priv);
+
position = __intel_get_crtc_scanline(crtc);
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+
+ intel_vblank_section_exit(dev_priv);
+ local_irq_restore(irqflags);
return position;
}
@@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
* Need to audit everything to make sure it's safe.
*/
spin_lock_irqsave(>drm.vblank_time_lock, irqflags);
- spin_lock(>uncore.lock);
+ intel_vblank_section_enter(i915);
drm_calc_timestamping_constants(>base, _mod
[Intel-gfx] [PATCH v5] drm/i915: handle uncore spinlock when not available
The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.
To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper functions for locking and unlocking the uncore's
spinlock. In these functions, we have a condition check and only
actually try to lock/unlock the spinlock when I915 is defined, and
thus uncore is available.
This keeps the ifdefs contained in these new functions and all such
logic inside the display code.
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Ville Syrj�l�
Reviewed-by: Rodrigo Vivi
Signed-off-by: Luca Coelho
---
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, restore
In v3:
* Undid the change to pass drm_i915_private instead of the lock
itself, since we would have to include i915_drv.h and that pulls
in a truckload of other includes.
In v4:
* After a brief attempt to replace this with a different patch,
we're back to this one;
* Pass drm_i195_private again, and move the functions to
intel_vblank.c, so we don't need to include i915_drv.h in a
header file and it's already included in intel_vblank.c;
In v5:
* Remove stray include in intel_display.h;
* Remove unnecessary inline modifiers in the new functions.
drivers/gpu/drm/i915/display/intel_vblank.c | 49 -
1 file changed, 39 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index 2cec2abf9746..221fcd6bf77b 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -265,6 +265,30 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int
scanline)
return (scanline + vtotal - crtc->scanline_offset) % vtotal;
}
+/*
+ * The uncore version of the spin lock functions is used to decide
+ * whether we need to lock the uncore lock or not. This is only
+ * needed in i915, not in Xe.
+ *
+ * This lock in i915 is needed because some old platforms (at least
+ * IVB and possibly HSW as well), which are not supported in Xe, need
+ * all register accesses to the same cacheline to be serialized,
+ * otherwise they may hang.
+ */
+static void intel_vblank_section_enter(struct drm_i915_private *i915)
+{
+#ifdef I915
+ spin_lock(>uncore.lock);
+#endif
+}
+
+static void intel_vblank_section_exit(struct drm_i915_private *i915)
+{
+#ifdef I915
+ spin_unlock(>uncore.lock);
+#endif
+}
+
static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
bool in_vblank_irq,
int *vpos, int *hpos,
@@ -302,11 +326,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc
*_crtc,
}
/*
-* Lock uncore.lock, as we will do multiple timing critical raw
-* register reads, potentially with preemption disabled, so the
-* following code must not block on uncore.lock.
+* Enter vblank critical section, as we will do multiple
+* timing critical raw register reads, potentially with
+* preemption disabled, so the following code must not block.
*/
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_vblank_section_enter(dev_priv);
/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
@@ -374,7 +399,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+ intel_vblank_section_exit(dev_priv);
+ local_irq_restore(irqflags);
/*
* While in vblank, position will be negative
@@ -412,9 +438,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
unsigned long irqflags;
int position;
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_vblank_section_enter(dev_priv);
+
position = __intel_get_crtc_scanline(crtc);
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+
+ intel_vblank_section_exit(dev_priv);
+ local_irq_restore(irqflags);
return position;
}
@@ -537,7 +567,7 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
* Need to audit everything to make sure it's safe.
*/
spin_lock_irqsave(>drm.vblank_time_lock, irqflags);
- spin_lock(>uncore.lock);
+ intel_vblank_section_enter(i915);
drm_calc_timestamping_constants(>base, _mode);
@@ -546,7 +576,6 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
crtc->mode_flags = mode_flags
[Intel-gfx] [PATCH v4] drm/i915: handle uncore spinlock when not available
The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.
To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper functions for locking and unlocking the uncore's
spinlock. In these functions, we have a condition check and only
actually try to lock/unlock the spinlock when I915 is defined, and
thus uncore is available.
This keeps the ifdefs contained in these new functions and all such
logic inside the display code.
Cc: Tvrtko Ursulin
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: Ville Syrj�l�
Signed-off-by: Luca Coelho
---
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, restore
In v3:
* Undid the change to pass drm_i915_private instead of the lock
itself, since we would have to include i915_drv.h and that pulls
in a truckload of other includes.
In v4:
* After a brief attempt to replace this with a different patch,
we're back to this one;
* Pass drm_i195_private again, and move the functions to
intel_vblank.c, so we don't need to include i915_drv.h in a
header file and it's already included in intel_vblank.c;
drivers/gpu/drm/i915/display/intel_display.h | 1 +
drivers/gpu/drm/i915/display/intel_vblank.c | 45 +++-
2 files changed, 36 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index 8548f49e3972..5ff299bc4b87 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -29,6 +29,7 @@
#include "i915_reg_defs.h"
#include "intel_display_limits.h"
+#include "i915_drv.h"
enum drm_scaling_filter;
struct dpll;
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index 2cec2abf9746..d9625db82681 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -265,6 +265,26 @@ int intel_crtc_scanline_to_hw(struct intel_crtc *crtc, int
scanline)
return (scanline + vtotal - crtc->scanline_offset) % vtotal;
}
+/*
+ * The uncore version of the spin lock functions is used to decide
+ * whether we need to lock the uncore lock or not. This is only
+ * needed in i915, not in Xe. Keep the decision-making centralized
+ * here.
+ */
+static inline void intel_vblank_section_enter(struct drm_i915_private *i915)
+{
+#ifdef I915
+ spin_lock(>uncore.lock);
+#endif
+}
+
+static inline void intel_vblank_section_exit(struct drm_i915_private *i915)
+{
+#ifdef I915
+ spin_unlock(>uncore.lock);
+#endif
+}
+
static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
bool in_vblank_irq,
int *vpos, int *hpos,
@@ -302,11 +322,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc
*_crtc,
}
/*
-* Lock uncore.lock, as we will do multiple timing critical raw
-* register reads, potentially with preemption disabled, so the
-* following code must not block on uncore.lock.
+* Enter vblank critical section, as we will do multiple
+* timing critical raw register reads, potentially with
+* preemption disabled, so the following code must not block.
*/
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_vblank_section_enter(dev_priv);
/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
@@ -374,7 +395,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+ intel_vblank_section_exit(dev_priv);
+ local_irq_restore(irqflags);
/*
* While in vblank, position will be negative
@@ -412,9 +434,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
unsigned long irqflags;
int position;
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_vblank_section_enter(dev_priv);
+
position = __intel_get_crtc_scanline(crtc);
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+
+ intel_vblank_section_exit(dev_priv);
+ local_irq_restore(irqflags);
return position;
}
@@ -537,7 +563,7 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
* Need to audit everything to make sure it's safe.
*/
spin_lock_irqsave(>drm.vblank_time_lock, irqflags);
- spin_lock(>uncore.lock);
+ intel_vblank_section_enter(i915);
drm_calc_timesta
[Intel-gfx] [PATCH] drm/i915: don't use uncore spinlock to protect critical section in vblank
Since we're abstracting the display code from the underlying driver
(i.e. i915 vs xe), we can't use the uncore's spinlock to protect
critical sections of our code.
After further inspection, it seems that the spinlock is not needed at
all and this can be handled by disabling preemption and interrupts
instead.
Change the vblank code so that we don't use uncore's spinlock anymore
and update the comments accordingly. While at it, also remove
comments pointing out where to insert RT-specific calls, since we're
now explicitly calling preempt_disable/enable() anywyay.
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: Tvrtko Ursulin
Signed-off-by: Luca Coelho
---
Note: this replaces my previous patch discussed here:
https://patchwork.freedesktop.org/patch/563857/
drivers/gpu/drm/i915/display/intel_vblank.c | 32 ++---
1 file changed, 15 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index 2cec2abf9746..28e38960806e 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -302,13 +302,12 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc
*_crtc,
}
/*
-* Lock uncore.lock, as we will do multiple timing critical raw
-* register reads, potentially with preemption disabled, so the
-* following code must not block on uncore.lock.
+* We will do multiple timing critical raw register reads, so
+* disable interrupts and preemption to make sure this code
+* doesn't get blocked.
*/
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
-
- /* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
+ local_irq_save(irqflags);
+ preempt_disable();
/* Get optional system timestamp before query. */
if (stime)
@@ -372,9 +371,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
if (etime)
*etime = ktime_get();
- /* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
-
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+ preempt_enable();
+ local_irq_restore(irqflags);
/*
* While in vblank, position will be negative
@@ -408,13 +406,14 @@ bool intel_crtc_get_vblank_timestamp(struct drm_crtc
*crtc, int *max_error,
int intel_get_crtc_scanline(struct intel_crtc *crtc)
{
- struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
unsigned long irqflags;
int position;
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ preempt_disable();
position = __intel_get_crtc_scanline(crtc);
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+ preempt_enable();
+ local_irq_restore(irqflags);
return position;
}
@@ -528,16 +527,16 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
* Belts and suspenders locking to guarantee everyone sees 100%
* consistent state during fastset seamless refresh rate changes.
*
-* vblank_time_lock takes care of all drm_vblank.c stuff, and
-* uncore.lock takes care of __intel_get_crtc_scanline() which
-* may get called elsewhere as well.
+* vblank_time_lock takes care of all drm_vblank.c stuff. For
+* __intel_get_crtc_scanline() we don't need locking or
+* disabling preemption and irqs, since this is already done
+* by the vblank_time_lock spinlock calls.
*
* TODO maybe just protect everything (including
* __intel_get_crtc_scanline()) with vblank_time_lock?
* Need to audit everything to make sure it's safe.
*/
spin_lock_irqsave(>drm.vblank_time_lock, irqflags);
- spin_lock(>uncore.lock);
drm_calc_timestamping_constants(>base, _mode);
@@ -547,6 +546,5 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
crtc->scanline_offset = intel_crtc_scanline_offset(crtc_state);
- spin_unlock(>uncore.lock);
spin_unlock_irqrestore(>drm.vblank_time_lock, irqflags);
}
--
2.39.2
Re: [Intel-gfx] [PATCH v5] drm/i915/dsb: DSB code refactoring
On Thu, 2023-11-02 at 22:56 +0530, Animesh Manna wrote:
> Refactor DSB implementation to be compatible with Xe driver.
>
> v1: RFC version.
> v2: Make intel_dsb structure opaque from external usage. [Jani]
> v3: Rebased on latest.
> v4:
> - Add boundary check in dsb_buffer_memset(). [Luca]
> - Use size_t instead of u32. [Luca]
> v5: WARN_ON() added for out of boudary case with some optimization. [Luca]
>
> Cc: Jani Nikula
> Signed-off-by: Animesh Manna
> ---
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
> drivers/gpu/drm/i915/Makefile | 1 +
> drivers/gpu/drm/i915/display/intel_dsb.c | 98 +++
> .../gpu/drm/i915/display/intel_dsb_buffer.c | 82
> .../gpu/drm/i915/display/intel_dsb_buffer.h | 29 ++
> 4 files changed, 148 insertions(+), 62 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_dsb_buffer.c
> create mode 100644 drivers/gpu/drm/i915/display/intel_dsb_buffer.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 239da40a401f..7e5d6a39d450 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -277,6 +277,7 @@ i915-y += \
> display/intel_dpt.o \
> display/intel_drrs.o \
> display/intel_dsb.o \
> + display/intel_dsb_buffer.o \
> display/intel_fb.o \
> display/intel_fb_pin.o \
> display/intel_fbc.o \
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 78b6fe24dcd8..3c7733a416a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -4,9 +4,6 @@
> *
> */
>
> -#include "gem/i915_gem_internal.h"
> -#include "gem/i915_gem_lmem.h"
> -
> #include "i915_drv.h"
> #include "i915_irq.h"
> #include "i915_reg.h"
> @@ -14,12 +11,13 @@
> #include "intel_de.h"
> #include "intel_display_types.h"
> #include "intel_dsb.h"
> +#include "intel_dsb_buffer.h"
> #include "intel_dsb_regs.h"
> #include "intel_vblank.h"
> #include "intel_vrr.h"
> #include "skl_watermark.h"
>
> -struct i915_vma;
> +#define CACHELINE_BYTES 64
>
> enum dsb_id {
> INVALID_DSB = -1,
> @@ -32,8 +30,7 @@ enum dsb_id {
> struct intel_dsb {
> enum dsb_id id;
>
> - u32 *cmd_buf;
> - struct i915_vma *vma;
> + struct intel_dsb_buffer dsb_buf;
> struct intel_crtc *crtc;
>
> /*
> @@ -109,15 +106,17 @@ static void intel_dsb_dump(struct intel_dsb *dsb)
> {
> struct intel_crtc *crtc = dsb->crtc;
> struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> - const u32 *buf = dsb->cmd_buf;
> int i;
>
> drm_dbg_kms(>drm, "[CRTC:%d:%s] DSB %d commands {\n",
> crtc->base.base.id, crtc->base.name, dsb->id);
> for (i = 0; i < ALIGN(dsb->free_pos, 64 / 4); i += 4)
> drm_dbg_kms(>drm,
> - " 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
> - i * 4, buf[i], buf[i+1], buf[i+2], buf[i+3]);
> + " 0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", i * 4,
> + intel_dsb_buffer_read(>dsb_buf, i),
> + intel_dsb_buffer_read(>dsb_buf, i + 1),
> + intel_dsb_buffer_read(>dsb_buf, i + 2),
> + intel_dsb_buffer_read(>dsb_buf, i + 3));
> drm_dbg_kms(>drm, "}\n");
> }
>
> @@ -129,8 +128,6 @@ static bool is_dsb_busy(struct drm_i915_private *i915,
> enum pipe pipe,
>
> static void intel_dsb_emit(struct intel_dsb *dsb, u32 ldw, u32 udw)
> {
> - u32 *buf = dsb->cmd_buf;
> -
> if (!assert_dsb_has_room(dsb))
> return;
>
> @@ -139,14 +136,13 @@ static void intel_dsb_emit(struct intel_dsb *dsb, u32
> ldw, u32 udw)
>
> dsb->ins_start_offset = dsb->free_pos;
>
> - buf[dsb->free_pos++] = ldw;
> - buf[dsb->free_pos++] = udw;
> + intel_dsb_buffer_write(>dsb_buf, dsb->free_pos++, ldw);
> + intel_dsb_buffer_write(>dsb_buf, dsb->free_pos++, udw);
> }
>
> static bool intel_dsb_prev_ins_is_write(struct intel_dsb *dsb,
> u32 opcode, i915_reg_t reg)
> {
> - const u32 *buf = dsb->cmd_buf;
> u32 prev_opcode, prev_reg;
>
> /*
> @@ -157,8 +153,10 @@ static bool intel_dsb_prev_ins_is_write(s
Re: [Intel-gfx] [PATCH v4] drm/i915/dsb: DSB code refactoring
On Tue, 2023-10-31 at 09:15 +, Manna, Animesh wrote:
>
> > -Original Message-
> > From: Luca Coelho
> > Sent: Tuesday, October 31, 2023 1:14 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: Nikula, Jani
> > Subject: Re: [Intel-gfx] [PATCH v4] drm/i915/dsb: DSB code refactoring
> >
> > On Fri, 2023-10-27 at 17:27 +0530, Animesh Manna wrote:
> > > Refactor DSB implementation to be compatible with Xe driver.
> > >
> > > v1: RFC version.
> > > v2: Make intel_dsb structure opaque from external usage. [Jani]
> > > v3: Rebased on latest.
> > > v4:
> > > - Add boundary check in dsb_buffer_memset(). [Luca]
> > > - Use size_t instead of u32. [Luca]
> > >
> > > Cc: Jani Nikula
> > > Signed-off-by: Animesh Manna
> > > ---
> >
> > [...]
> > > +void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32
> > > +idx, u32 val, size_t size) {
> > > + if ((idx > dsb_buf->buf_size / 4) || (size > dsb_buf->buf_size - idx
> > > +* 4))
> >
> > You actually don't need the first expression. This expression should
> > enough:
> >
> > dsb_buf->buf_size <= (idx + size) * sizeof(*dsb_buf->cmd_buf)
>
> Here size is in bytes, but idx is index of 32 bytes array. So, the above
> expression would be,
>
> dsb_buf->buf_size <= (idx * sizeof(*dsb_buf->cmd_buf) + size)
Oh, you're right, of course.
> The same is done with 2nd expression but agree to use sizeof() instead of
> magic number 4.
>
> The first expression is added if idx is big number and due to overflow the
> above check can pass which is not correct. Please let me know your thoughts,
> if you are not ok will drop maybe.
If you're worried about overflow when you're multiplying by 4, then you
can just do it the opposite way, still with a single expression:
dsb_buf->buf_size / sizeof(*dsb_buf->cmd_buf) <= idx + size /
sizeof(*dsb_buf->cmd_buf)
Or, taking advantage of the fact that both buf_size and size need to be
divided by sizeof(), we could something like:
idx > (dsb_buf->buf_size - size) / sizeof(*dsb_buf->cmd_buf)
...but we're bike-shedding. I don't think the number of expressions or
the complexity of the expressions matter much here, unless you're
really in a hotpath, in which case you should add an unlikely() or so.
I'll leave it to you.
> >
> > > + return;
> >
> > Blindly returning here doesn't solve the problem, it just hides it. I
> > think the
> > best would be to use WARN_ON() instead of if.
> >
> > So:
> > WARN_ON(dsb_buf->buf_size <= (idx + size) * sizeof(*dsb_buf-
> > > cmd_buf));
>
> I will add the WARN_ON().
This is the part that I actually think is important. ;)
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v4] drm/i915/dsb: DSB code refactoring
On Fri, 2023-10-27 at 17:27 +0530, Animesh Manna wrote:
> Refactor DSB implementation to be compatible with Xe driver.
>
> v1: RFC version.
> v2: Make intel_dsb structure opaque from external usage. [Jani]
> v3: Rebased on latest.
> v4:
> - Add boundary check in dsb_buffer_memset(). [Luca]
> - Use size_t instead of u32. [Luca]
>
> Cc: Jani Nikula
> Signed-off-by: Animesh Manna
> ---
[...]
> +void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32 idx, u32
> val, size_t size)
> +{
> + if ((idx > dsb_buf->buf_size / 4) || (size > dsb_buf->buf_size - idx *
> 4))
You actually don't need the first expression. This expression should
enough:
dsb_buf->buf_size <= (idx + size) * sizeof(*dsb_buf->cmd_buf)
> + return;
Blindly returning here doesn't solve the problem, it just hides it. I
think the best would be to use WARN_ON() instead of if.
So:
WARN_ON(dsb_buf->buf_size <= (idx + size) * sizeof(*dsb_buf->cmd_buf));
> +
> + memset(_buf->cmd_buf[idx], val, size);
> +}
[...]
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v3] drm/i915/dsb: DSB code refactoring
On Thu, 2023-10-26 at 14:23 +, Manna, Animesh wrote:
>
> > -Original Message-
> > From: Luca Coelho
> > Sent: Thursday, October 26, 2023 1:08 PM
> > To: Manna, Animesh ; intel-
> > g...@lists.freedesktop.org
> > Cc: Nikula, Jani
> > Subject: Re: [Intel-gfx] [PATCH v3] drm/i915/dsb: DSB code refactoring
> >
> > On Sun, 2023-10-08 at 15:42 +0530, Animesh Manna wrote:
> > > Refactor DSB implementation to be compatible with Xe driver.
> > >
> > > v1: RFC version.
> > > v2: Make intel_dsb structure opaque from external usage. [Jani]
> > > v3: Rebased on latest.
> > >
> > > Cc: Jani Nikula
> > > Signed-off-by: Animesh Manna
> > > ---
> >
> > Looks great overall! Just a couple of small comments below.
>
> Thanks for review.
>
> >
> >
> > [...]
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> > > b/drivers/gpu/drm/i915/display/intel_dsb.c
> > > index 3e32aa49b8eb..ec89d968a873 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> > > @@ -13,12 +13,13 @@
> > > #include "intel_de.h"
> > > #include "intel_display_types.h"
> > > #include "intel_dsb.h"
> > > +#include "intel_dsb_buffer.h"
> > > #include "intel_dsb_regs.h"
> > > #include "intel_vblank.h"
> > > #include "intel_vrr.h"
> > > #include "skl_watermark.h"
> > >
> > > -struct i915_vma;
> > > +#define CACHELINE_BYTES 64
> >
> > I see that this macro is defined in GT and you want to avoid depending on
> > the definition from GT, but you don't make any other changes related to the
> > cacheline size here, so maybe this change should be a separate patch? Also,
> > it looks a bit magic without an explanation on where the number is coming
> > from.
>
> For Xe driver macro definition in GT may not accessible, so have redefined in
> Intel_dsb.c itself. It's related to dsb so kept in the same patch.
> DSB command buffer is cacheline aligned. DSB support added from gen12 and
> size of cacheline size will be 64 bytes. As per bspec each cacheline can have
> 8 dsb-instructions and 64 bits per instruction.
Okay, even though this is clearly related to DSB only, I still don't
think it should be in the same patch. In any case, I'm not going to
block on this.
> > [...]
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dsb_buffer.c
> > > b/drivers/gpu/drm/i915/display/intel_dsb_buffer.c
> > > new file mode 100644
> > > index ..723937591831
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/i915/display/intel_dsb_buffer.c
> > > @@ -0,0 +1,64 @@
> > > +// SPDX-License-Identifier: MIT
> > > +/*
> > > + * Copyright 2023, Intel Corporation.
> > > + */
> > > +
> > > +#include "gem/i915_gem_internal.h"
> > > +#include "i915_drv.h"
> > > +#include "i915_vma.h"
> > > +#include "intel_display_types.h"
> > > +#include "intel_dsb_buffer.h"
> > > +
> > > +u32 intel_dsb_buffer_ggtt_offset(struct intel_dsb_buffer *dsb_buf) {
> > > + return i915_ggtt_offset(dsb_buf->vma); }
> > > +
> > > +void intel_dsb_buffer_write(struct intel_dsb_buffer *dsb_buf, u32
> > > +idx, u32 val) {
> > > + dsb_buf->cmd_buf[idx] = val;
> > > +}
> > > +
> > > +u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx)
> > > +{
> > > + return dsb_buf->cmd_buf[idx];
> > > +}
> > > +
> > > +void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32
> > > +idx, u32 val, u32 sz) {
> > > + memset(_buf->cmd_buf[idx], val, sz);
> >
> > I think you should check the array boundaries here, to be sure.
> > Probably a good idea to do with the other functions as well, but I think
> > this is
> > the most critical and easiest to make mistakes with.
>
> assert_dsb_has_room() function is taking care for not crossing the
> boundaries. Here will check from the allocated buffer-size versus used/unused
> buffer.
> Specifically intel_dsb_buffer_memset() is called from intel_dsb_align_tail()
> where zero get set for unused cacheline space. No chance to cross the
> boundaries in this case.
> Please let me know for any further info.
I mean, if someone accidentally calls intel_dsb_buffer_memset() with a
wrong index or too large size, the memset here will write out-of-
bounds, no matter what you do in assert_dsb_has_room(). This shouldn't
happen, but if it does, it will be hard to find and can lead to
security issues.
I don't know how time critical the calls to intel_dsb_buffer_memset()
will be, but I think it's worth adding a splat if someone does
something wrong.
As an additional comment, instead of "u32 sz" you should use size_t for
the size. And I would use the full word "size", as you do in
intel_dsb_buffer_create() (where it should also be size_t), for
consistency.
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v3] drm/i915/dsb: DSB code refactoring
On Sun, 2023-10-08 at 15:42 +0530, Animesh Manna wrote:
> Refactor DSB implementation to be compatible with Xe driver.
>
> v1: RFC version.
> v2: Make intel_dsb structure opaque from external usage. [Jani]
> v3: Rebased on latest.
>
> Cc: Jani Nikula
> Signed-off-by: Animesh Manna
> ---
Looks great overall! Just a couple of small comments below.
[...]
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c
> b/drivers/gpu/drm/i915/display/intel_dsb.c
> index 3e32aa49b8eb..ec89d968a873 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsb.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsb.c
> @@ -13,12 +13,13 @@
> #include "intel_de.h"
> #include "intel_display_types.h"
> #include "intel_dsb.h"
> +#include "intel_dsb_buffer.h"
> #include "intel_dsb_regs.h"
> #include "intel_vblank.h"
> #include "intel_vrr.h"
> #include "skl_watermark.h"
>
> -struct i915_vma;
> +#define CACHELINE_BYTES 64
I see that this macro is defined in GT and you want to avoid depending
on the definition from GT, but you don't make any other changes related
to the cacheline size here, so maybe this change should be a separate
patch? Also, it looks a bit magic without an explanation on where the
number is coming from.
[...]
> diff --git a/drivers/gpu/drm/i915/display/intel_dsb_buffer.c
> b/drivers/gpu/drm/i915/display/intel_dsb_buffer.c
> new file mode 100644
> index ..723937591831
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_dsb_buffer.c
> @@ -0,0 +1,64 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright 2023, Intel Corporation.
> + */
> +
> +#include "gem/i915_gem_internal.h"
> +#include "i915_drv.h"
> +#include "i915_vma.h"
> +#include "intel_display_types.h"
> +#include "intel_dsb_buffer.h"
> +
> +u32 intel_dsb_buffer_ggtt_offset(struct intel_dsb_buffer *dsb_buf)
> +{
> + return i915_ggtt_offset(dsb_buf->vma);
> +}
> +
> +void intel_dsb_buffer_write(struct intel_dsb_buffer *dsb_buf, u32 idx, u32
> val)
> +{
> + dsb_buf->cmd_buf[idx] = val;
> +}
> +
> +u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx)
> +{
> + return dsb_buf->cmd_buf[idx];
> +}
> +
> +void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32 idx, u32
> val, u32 sz)
> +{
> + memset(_buf->cmd_buf[idx], val, sz);
I think you should check the array boundaries here, to be sure.
Probably a good idea to do with the other functions as well, but I
think this is the most critical and easiest to make mistakes with.
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest
On Tue, 2023-10-24 at 15:15 +0300, Jani Nikula wrote: > On Tue, 24 Oct 2023, Luca Coelho wrote: > > On Tue, 2023-10-24 at 08:51 +, Hogander, Jouni wrote: > > > On Mon, 2023-10-23 at 17:06 +0300, Luca Coelho wrote: > > > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > > > > > Generally we have writable device parameters in debugfs. No need > > > > > to allow writing module parameters. > > > > > > > > > > Signed-off-by: Jouni Högander > > > > > --- > > > > > drivers/gpu/drm/i915/display/intel_display_params.c | 2 +- > > > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > > > > > b/drivers/gpu/drm/i915/display/intel_display_params.c > > > > > index 8e6353c1c25e..077f2dee2975 100644 > > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > > > > > @@ -50,7 +50,7 @@ intel_display_param_named_unsafe(enable_dc, int, > > > > > 0400, > > > > > intel_display_param_named_unsafe(enable_dpt, bool, 0400, > > > > > "Enable display page table (DPT) (default: true)"); > > > > > > > > > > -intel_display_param_named_unsafe(enable_sagv, bool, 0600, > > > > > +intel_display_param_named_unsafe(enable_sagv, bool, 0400, > > > > > "Enable system agent voltage/frequency scaling (SAGV) > > > > > (default: true)"); > > > > > > > > > > intel_display_param_named_unsafe(disable_power_well, int, 0400, > > > > > > > > This, as well as other similar changes throughout this series, could > > > > be > > > > controversial, since it's a userspace API change of sorts. It used > > > > to > > > > be possible to write but it won't be anymore. But, as we discussed > > > > offline, it shouldn't be problem, because probably nobody is writing > > > > to > > > > them, and most likely doing so wouldn't have the expected result, > > > > since > > > > the device copies were not getting updated. > > > > > > > > Reviewed-by: Luca Coelho > > > > > > Thank you Luca. I actually moved this change to patch 11 due to your > > > comment there and added your rb tag there. I was planning to drop this > > > patch. Are you fine with this? > > > > Yes, this is fine. I'll review your cahnges in v3 and give the missing > > r-b tags there, if applicable. > > I think this change is good and frankly needed. It's confusing to be > able to modify the module param without it having any effect. > > These are for debug, the param is designated "unsafe", and for these I > don't really care if someone complains they can't write to the file > anymore. Right, this was my conclusion as well, and thus, got my r-b. :) -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v3 13/23] drm/i915/display: Move enable_ips module parameter under display
On Tue, 2023-10-24 at 13:32 +0300, Jouni Högander wrote:
> Move enable_ips module parameter under display and change it as boolean.
>
> v2:
> - Change enable_ip as boolean
> - Fix copy paste error (i915_param -> intel_display_param)
>
> Cc: Luca Coelho
>
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 2 ++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 2 --
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c
> b/drivers/gpu/drm/i915/display/hsw_ips.c
> index 7dc38ac02092..611a7d6ef80c 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -193,7 +193,7 @@ bool hsw_crtc_state_ips_capable(const struct
> intel_crtc_state *crtc_state)
> if (!hsw_crtc_supports_ips(crtc))
> return false;
>
> - if (!i915->params.enable_ips)
> + if (!i915->display.params.enable_ips)
> return false;
>
> if (crtc_state->pipe_bpp > 24)
> @@ -329,7 +329,7 @@ static int hsw_ips_debugfs_status_show(struct seq_file
> *m, void *unused)
> wakeref = intel_runtime_pm_get(>runtime_pm);
>
> seq_printf(m, "Enabled by kernel parameter: %s\n",
> -str_yes_no(i915->params.enable_ips));
> +str_yes_no(i915->display.params.enable_ips));
>
> if (DISPLAY_VER(i915) >= 8) {
> seq_puts(m, "Currently: unknown\n");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 79a212dded80..ce991ad20006 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -57,6 +57,8 @@ intel_display_param_named_unsafe(disable_power_well, int,
> 0400,
> "Disable display power wells when possible "
> "(-1=auto [default], 0=power wells always on, 1=power wells disabled
> when possible)");
>
> +intel_display_param_named_unsafe(enable_ips, bool, 0400, "Enable IPS
> (default: true)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index aadbef664965..8d51488e3b3e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -32,6 +32,7 @@ struct drm_i915_private;
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
> + param(bool, enable_ips, true, 0600) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index eab02f71a4e5..54dcce97da2a 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -86,8 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
> "Force probe options for specified supported devices. "
> "See CONFIG_DRM_I915_FORCE_PROBE for details.");
>
> -i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
> -
> i915_param_named_unsafe(load_detect_test, bool, 0400,
> "Force-enable the VGA load detect code for testing (default:false). "
> "For developers only.");
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 060464df03c2..18bb8a93e0e8 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, enable_ips, 1, 0600) \
> param(int, invert_brightness, 0, 0600) \
> param(int, enable_guc, -1, 0400) \
> param(int, guc_log_level, -1, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v3 04/23] drm/i915/display: Move psr related module parameters under display
On Tue, 2023-10-24 at 13:32 +0300, Jouni Högander wrote:
> Move psr related module parameters under display. Also fix error in
> enable_psr2_sel_fetch module parameter descrtiption. It was saying disabled
> by default while it's vice versa. Also psr_safest_params was missing
> default value in description. This is now added.
>
> v2:
> - Fix enable_psr2_sel_fetch description.
> - Add default value into psr_safest_params description.
>
> Cc: Luca Coelho
>
> Signed-off-by: Jouni Högander
> ---
> .../gpu/drm/i915/display/intel_display_params.c | 16
> .../gpu/drm/i915/display/intel_display_params.h | 5 +
> drivers/gpu/drm/i915/display/intel_psr.c | 14 +++---
> drivers/gpu/drm/i915/i915_params.c | 15 ---
> drivers/gpu/drm/i915/i915_params.h | 3 ---
> 5 files changed, 28 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 330613cd64db..0e86d0d10bfa 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -31,6 +31,22 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
>
> +intel_display_param_named_unsafe(enable_psr, int, 0400,
> + "Enable PSR "
> + "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> + "Default: -1 (use per-chip default)");
> +
> +intel_display_param_named(psr_safest_params, bool, 0400,
> + "Replace PSR VBT parameters by the safest and not optimal ones. This "
> + "is helpful to detect if PSR issues are related to bad values set in "
> + " VBT. (0=use VBT parameters, 1=use safest parameters)"
> + "Default: 0");
> +
> +intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
> + "Enable PSR2 selective fetch "
> + "(0=disabled, 1=enabled) "
> + "Default: 1");
> +
> __maybe_unused
> static void _param_print_bool(struct drm_printer *p, const char *driver_name,
> const char *name, bool val)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 198b03da8055..45a4d38d13e7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -6,6 +6,8 @@
> #ifndef _INTEL_DISPLAY_PARAMS_H_
> #define _INTEL_DISPLAY_PARAMS_H_
>
> +#include
> +
> struct drm_printer;
> struct drm_i915_private;
>
> @@ -23,6 +25,9 @@ struct drm_i915_private;
> */
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(int, enable_fbc, -1, 0600) \
> + param(int, enable_psr, -1, 0600) \
> + param(bool, psr_safest_params, false, 0400) \
> + param(bool, enable_psr2_sel_fetch, true, 0400) \
>
> #define MEMBER(T, member, ...) T member;
> struct intel_display_params {
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4f1f31fc9529..ecd24a0b86cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -179,9 +179,9 @@ static bool psr_global_enabled(struct intel_dp *intel_dp)
>
> switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
> case I915_PSR_DEBUG_DEFAULT:
> - if (i915->params.enable_psr == -1)
> + if (i915->display.params.enable_psr == -1)
> return connector->panel.vbt.psr.enable;
> - return i915->params.enable_psr;
> + return i915->display.params.enable_psr;
> case I915_PSR_DEBUG_DISABLE:
> return false;
> default:
> @@ -198,7 +198,7 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
> case I915_PSR_DEBUG_FORCE_PSR1:
> return false;
> default:
> - if (i915->params.enable_psr == 1)
> + if (i915->display.params.enable_psr == 1)
> return false;
> return true;
> }
> @@ -606,7 +606,7 @@ static u32 intel_psr1_get_tp_time(struct intel_dp
> *intel_dp)
> if (DISPLAY_VER(dev_priv) >= 11)
> val |= EDP_PSR_TP4_TIME_0us;
>
> - if (dev_priv->params.psr_safest_params) {
> + if (dev_priv->display.params.psr_safest_params) {
>
Re: [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest
On Tue, 2023-10-24 at 08:51 +, Hogander, Jouni wrote: > On Mon, 2023-10-23 at 17:06 +0300, Luca Coelho wrote: > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > > > Generally we have writable device parameters in debugfs. No need > > > to allow writing module parameters. > > > > > > Signed-off-by: Jouni Högander > > > --- > > > drivers/gpu/drm/i915/display/intel_display_params.c | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > > > b/drivers/gpu/drm/i915/display/intel_display_params.c > > > index 8e6353c1c25e..077f2dee2975 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > > > @@ -50,7 +50,7 @@ intel_display_param_named_unsafe(enable_dc, int, > > > 0400, > > > intel_display_param_named_unsafe(enable_dpt, bool, 0400, > > > "Enable display page table (DPT) (default: true)"); > > > > > > -intel_display_param_named_unsafe(enable_sagv, bool, 0600, > > > +intel_display_param_named_unsafe(enable_sagv, bool, 0400, > > > "Enable system agent voltage/frequency scaling (SAGV) > > > (default: true)"); > > > > > > intel_display_param_named_unsafe(disable_power_well, int, 0400, > > > > This, as well as other similar changes throughout this series, could > > be > > controversial, since it's a userspace API change of sorts. It used > > to > > be possible to write but it won't be anymore. But, as we discussed > > offline, it shouldn't be problem, because probably nobody is writing > > to > > them, and most likely doing so wouldn't have the expected result, > > since > > the device copies were not getting updated. > > > > Reviewed-by: Luca Coelho > > Thank you Luca. I actually moved this change to patch 11 due to your > comment there and added your rb tag there. I was planning to drop this > patch. Are you fine with this? Yes, this is fine. I'll review your cahnges in v3 and give the missing r-b tags there, if applicable. -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display
On Tue, 2023-10-24 at 08:22 +, Hogander, Jouni wrote: > On Mon, 2023-10-23 at 17:00 +0300, Luca Coelho wrote: > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > > > Signed-off-by: Jouni Högander > > > --- > > > drivers/gpu/drm/i915/display/intel_display.h | 2 +- > > > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++ > > > drivers/gpu/drm/i915/display/intel_display_params.h | 1 + > > > drivers/gpu/drm/i915/i915_params.c | 3 --- > > > drivers/gpu/drm/i915/i915_params.h | 1 - > > > 5 files changed, 5 insertions(+), 5 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h > > > b/drivers/gpu/drm/i915/display/intel_display.h > > > index ba3548f9768d..bc95fb377386 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display.h > > > +++ b/drivers/gpu/drm/i915/display/intel_display.h > > > @@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private > > > *i915, enum port port); > > > struct drm_device *drm = &(__i915)- > > > > drm;\ > > > int __ret_warn_on = > > > !!(condition); \ > > > if > > > (unlikely(__ret_warn_on))\ > > > - if (!drm_WARN(drm, __i915- > > > > params.verbose_state_checks, format)) \ > > > + if (!drm_WARN(drm, __i915- > > > > display.params.verbose_state_checks, format)) \ > > > drm_err(drm, > > > format); \ > > > unlikely(__ret_warn_on); > > > \ > > > }) > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > > > b/drivers/gpu/drm/i915/display/intel_display_params.c > > > index 06e68c7fec1c..e86766639396 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > > > @@ -87,6 +87,9 @@ > > > intel_display_param_named_unsafe(force_reset_modeset_test, bool, > > > 0400, > > > intel_display_param_named(disable_display, bool, 0400, > > > "Disable display (default: false)"); > > > > > > +intel_display_param_named(verbose_state_checks, bool, 0400, > > > + "Enable verbose logs (ie. WARN_ON()) in case of unexpected > > > hw state conditions."); > > > + > > > intel_display_param_named_unsafe(enable_fbc, int, 0400, > > > "Enable frame buffer compression for power savings " > > > "(default: -1 (use per-chip default))"); > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h > > > b/drivers/gpu/drm/i915/display/intel_display_params.h > > > index 60d9c3d59fe4..b35443f51375 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.h > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h > > > @@ -39,6 +39,7 @@ struct drm_i915_private; > > > param(bool, load_detect_test, false, 0600) \ > > > param(bool, force_reset_modeset_test, false, 0600) \ > > > param(bool, disable_display, false, 0400) \ > > > + param(bool, verbose_state_checks, true, 0) \ > > > > Why is this one 0? Why can't we even read it? > > I found this comment in older commit message written by Jani Nikula: > > "0 mode will bypass debugfs creation. Use it for verbose_state_checks > which will need special attention in follow-up work." This sounds pretty odd, why wouldn't we want it to be even read? In any case, it's not related to this patch, so: Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > Generally we have writable device parameters in debugfs. No need > to allow writing module parameters. > > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_display_params.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > b/drivers/gpu/drm/i915/display/intel_display_params.c > index 8e6353c1c25e..077f2dee2975 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > @@ -50,7 +50,7 @@ intel_display_param_named_unsafe(enable_dc, int, 0400, > intel_display_param_named_unsafe(enable_dpt, bool, 0400, > "Enable display page table (DPT) (default: true)"); > > -intel_display_param_named_unsafe(enable_sagv, bool, 0600, > +intel_display_param_named_unsafe(enable_sagv, bool, 0400, > "Enable system agent voltage/frequency scaling (SAGV) (default: true)"); > > intel_display_param_named_unsafe(disable_power_well, int, 0400, This, as well as other similar changes throughout this series, could be controversial, since it's a userspace API change of sorts. It used to be possible to write but it won't be anymore. But, as we discussed offline, it shouldn't be problem, because probably nobody is writing to them, and most likely doing so wouldn't have the expected result, since the device copies were not getting updated. Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 23/24] drm/i915/display: Move enable_dp_mst under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
> drivers/gpu/drm/i915/i915_params.c | 3 ---
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 3045a1b9b704..8e6353c1c25e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -93,6 +93,9 @@ intel_display_param_named(verbose_state_checks, bool, 0400,
> intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400,
> "Force enable atomic functionality on platforms that don't have full
> support yet.");
>
> +intel_display_param_named_unsafe(enable_dp_mst, bool, 0400,
> + "Enable multi-stream transport (MST) for new DisplayPort sinks.
> (default: true)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index d25e17f88a78..83c4429ada35 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -41,6 +41,7 @@ struct drm_i915_private;
> param(bool, disable_display, false, 0400) \
> param(bool, verbose_state_checks, true, 0) \
> param(bool, nuclear_pageflip, false, 0400) \
> + param(bool, enable_dp_mst, true, 0600) \
> param(int, enable_fbc, -1, 0600)\
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4f6835a7578e..f90d8cace6a6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3749,7 +3749,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
> {
> struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>
> - return i915->params.enable_dp_mst &&
> + return i915->display.params.enable_dp_mst &&
> intel_dp_mst_source_support(intel_dp) &&
> drm_dp_read_mst_cap(_dp->aux, intel_dp->dpcd);
> }
> @@ -3767,13 +3767,13 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
> encoder->base.base.id, encoder->base.name,
> str_yes_no(intel_dp_mst_source_support(intel_dp)),
> str_yes_no(sink_can_mst),
> - str_yes_no(i915->params.enable_dp_mst));
> + str_yes_no(i915->display.params.enable_dp_mst));
>
> if (!intel_dp_mst_source_support(intel_dp))
> return;
>
> intel_dp->is_mst = sink_can_mst &&
> - i915->params.enable_dp_mst;
> + i915->display.params.enable_dp_mst;
>
> drm_dp_mst_topology_mgr_set_mst(_dp->mst_mgr,
> intel_dp->is_mst);
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index 18424873442d..de43048543e8 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -114,9 +114,6 @@ i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
> i915_param_named_unsafe(gsc_firmware_path, charp, 0400,
> "GSC firmware path to use instead of the default one");
>
> -i915_param_named_unsafe(enable_dp_mst, bool, 0400,
> - "Enable multi-stream transport (MST) for new DisplayPort sinks.
> (default: true)");
> -
> #if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
> i915_param_named_unsafe(inject_probe_failure, uint, 0400,
> "Force an error after a number of failure check points (0:disabled
> (default), N:force failure at the Nth failure check point)");
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index c7fff571db2c..1315d7fac850 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -64,7 +64,6 @@ struct drm_printer;
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> - param(bool, enable_dp_mst, true, 0600) \
> param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 :
> 0)
>
> #define MEMBER(T, member, ...) T member;
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 22/24] drm/i915/display: Move nuclear_pageflip under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_display_device.c | 2 +- > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++ > drivers/gpu/drm/i915/display/intel_display_params.h | 1 + > drivers/gpu/drm/i915/i915_params.c | 3 --- > drivers/gpu/drm/i915/i915_params.h | 1 - > 5 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c > b/drivers/gpu/drm/i915/display/intel_display_device.c > index 50841818fb59..0b522c6a8d6f 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_device.c > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c > @@ -1113,7 +1113,7 @@ void intel_display_device_info_runtime_init(struct > drm_i915_private *i915) > } > > /* Disable nuclear pageflip by default on pre-g4x */ > - if (!i915->params.nuclear_pageflip && > + if (!i915->display.params.nuclear_pageflip && > DISPLAY_VER(i915) < 5 && !IS_G4X(i915)) > i915->drm.driver_features &= ~DRIVER_ATOMIC; > } > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > b/drivers/gpu/drm/i915/display/intel_display_params.c > index e86766639396..3045a1b9b704 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > @@ -90,6 +90,9 @@ intel_display_param_named(disable_display, bool, 0400, > intel_display_param_named(verbose_state_checks, bool, 0400, > "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state > conditions."); > > +intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400, > + "Force enable atomic functionality on platforms that don't have full > support yet."); > + > intel_display_param_named_unsafe(enable_fbc, int, 0400, > "Enable frame buffer compression for power savings " > "(default: -1 (use per-chip default))"); > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h > b/drivers/gpu/drm/i915/display/intel_display_params.h > index b35443f51375..d25e17f88a78 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.h > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h > @@ -40,6 +40,7 @@ struct drm_i915_private; > param(bool, force_reset_modeset_test, false, 0600) \ > param(bool, disable_display, false, 0400) \ > param(bool, verbose_state_checks, true, 0) \ > + param(bool, nuclear_pageflip, false, 0400) \ > param(int, enable_fbc, -1, 0600)\ > param(int, enable_psr, -1, 0600) \ > param(bool, psr_safest_params, false, 0400) \ > diff --git a/drivers/gpu/drm/i915/i915_params.c > b/drivers/gpu/drm/i915/i915_params.c > index 72614c139222..18424873442d 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -93,9 +93,6 @@ i915_param_named(mmio_debug, int, 0400, > "Enable the MMIO debug code for the first N failures (default: off). " > "This may negatively affect performance."); > > -i915_param_named_unsafe(nuclear_pageflip, bool, 0400, > - "Force enable atomic functionality on platforms that don't have full > support yet."); > - > i915_param_named_unsafe(enable_guc, int, 0400, > "Enable GuC load for GuC submission and/or HuC load. " > "Required functionality can be selected using bitmask values. " > diff --git a/drivers/gpu/drm/i915/i915_params.h > b/drivers/gpu/drm/i915/i915_params.h > index 4b543beb17ca..c7fff571db2c 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -64,7 +64,6 @@ struct drm_printer; > /* leave bools at the end to not create holes */ \ > param(bool, enable_hangcheck, true, 0600) \ > param(bool, error_capture, true, > IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \ > - param(bool, nuclear_pageflip, false, 0400) \ > param(bool, enable_dp_mst, true, 0600) \ > param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : > 0) > Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_display.h| 2 +- > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++ > drivers/gpu/drm/i915/display/intel_display_params.h | 1 + > drivers/gpu/drm/i915/i915_params.c | 3 --- > drivers/gpu/drm/i915/i915_params.h | 1 - > 5 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h > b/drivers/gpu/drm/i915/display/intel_display.h > index ba3548f9768d..bc95fb377386 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private *i915, > enum port port); > struct drm_device *drm = &(__i915)->drm;\ > int __ret_warn_on = !!(condition); \ > if (unlikely(__ret_warn_on))\ > - if (!drm_WARN(drm, __i915->params.verbose_state_checks, > format)) \ > + if (!drm_WARN(drm, __i915->display.params.verbose_state_checks, > format)) \ > drm_err(drm, format); \ > unlikely(__ret_warn_on);\ > }) > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > b/drivers/gpu/drm/i915/display/intel_display_params.c > index 06e68c7fec1c..e86766639396 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > @@ -87,6 +87,9 @@ intel_display_param_named_unsafe(force_reset_modeset_test, > bool, 0400, > intel_display_param_named(disable_display, bool, 0400, > "Disable display (default: false)"); > > +intel_display_param_named(verbose_state_checks, bool, 0400, > + "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state > conditions."); > + > intel_display_param_named_unsafe(enable_fbc, int, 0400, > "Enable frame buffer compression for power savings " > "(default: -1 (use per-chip default))"); > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h > b/drivers/gpu/drm/i915/display/intel_display_params.h > index 60d9c3d59fe4..b35443f51375 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.h > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h > @@ -39,6 +39,7 @@ struct drm_i915_private; > param(bool, load_detect_test, false, 0600) \ > param(bool, force_reset_modeset_test, false, 0600) \ > param(bool, disable_display, false, 0400) \ > + param(bool, verbose_state_checks, true, 0) \ Why is this one 0? Why can't we even read it? -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 20/24] drm/i915/display: Use device parameters instead of module in I915_STATE_WARN
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > Also make module parameter as non writable. > > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_display.h | 2 +- > drivers/gpu/drm/i915/i915_params.c | 3 +-- > 2 files changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h > b/drivers/gpu/drm/i915/display/intel_display.h > index 0e5dffe8f018..ba3548f9768d 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.h > +++ b/drivers/gpu/drm/i915/display/intel_display.h > @@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private *i915, > enum port port); > struct drm_device *drm = &(__i915)->drm;\ > int __ret_warn_on = !!(condition); \ > if (unlikely(__ret_warn_on))\ > - if (!drm_WARN(drm, i915_modparams.verbose_state_checks, > format)) \ > + if (!drm_WARN(drm, __i915->params.verbose_state_checks, > format)) \ > drm_err(drm, format); \ > unlikely(__ret_warn_on);\ > }) > diff --git a/drivers/gpu/drm/i915/i915_params.c > b/drivers/gpu/drm/i915/i915_params.c > index 3205c6b62670..4e8c088c69fd 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -93,8 +93,7 @@ i915_param_named(mmio_debug, int, 0400, > "Enable the MMIO debug code for the first N failures (default: off). " > "This may negatively affect performance."); > > -/* Special case writable file */ > -i915_param_named(verbose_state_checks, bool, 0600, > +i915_param_named(verbose_state_checks, bool, 0400, > "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state > conditions."); > > i915_param_named_unsafe(nuclear_pageflip, bool, 0400, Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 19/24] drm/i915/display: Move disable_display parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_display_device.c | 3 ++- > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++ > drivers/gpu/drm/i915/display/intel_display_params.h | 1 + > drivers/gpu/drm/i915/i915_params.c | 3 --- > drivers/gpu/drm/i915/i915_params.h | 2 -- > 5 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c > b/drivers/gpu/drm/i915/display/intel_display_device.c > index e80842d1e7c7..50841818fb59 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_device.c > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c > @@ -1153,5 +1153,6 @@ bool intel_display_device_enabled(struct > drm_i915_private *i915) > /* Only valid when HAS_DISPLAY() is true */ > drm_WARN_ON(>drm, !HAS_DISPLAY(i915)); > > - return !i915->params.disable_display && > !intel_opregion_headless_sku(i915); > + return !i915->display.params.disable_display && > + !intel_opregion_headless_sku(i915); > } > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > b/drivers/gpu/drm/i915/display/intel_display_params.c > index 7f330a5e1188..06e68c7fec1c 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > @@ -84,6 +84,9 @@ intel_display_param_named_unsafe(force_reset_modeset_test, > bool, 0400, > "Force a modeset during gpu reset for testing (default:false). " > "For developers only."); > > +intel_display_param_named(disable_display, bool, 0400, > + "Disable display (default: false)"); > + > intel_display_param_named_unsafe(enable_fbc, int, 0400, > "Enable frame buffer compression for power savings " > "(default: -1 (use per-chip default))"); > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h > b/drivers/gpu/drm/i915/display/intel_display_params.h > index 25f238e63ff8..60d9c3d59fe4 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.h > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h > @@ -38,6 +38,7 @@ struct drm_i915_private; > param(int, enable_dpcd_backlight, -1, 0600) \ > param(bool, load_detect_test, false, 0600) \ > param(bool, force_reset_modeset_test, false, 0600) \ > + param(bool, disable_display, false, 0400) \ > param(int, enable_fbc, -1, 0600)\ > param(int, enable_psr, -1, 0600) \ > param(bool, psr_safest_params, false, 0400) \ > diff --git a/drivers/gpu/drm/i915/i915_params.c > b/drivers/gpu/drm/i915/i915_params.c > index 497e39b1dcfb..3205c6b62670 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -86,9 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400, > "Force probe options for specified supported devices. " > "See CONFIG_DRM_I915_FORCE_PROBE for details."); > > -i915_param_named(disable_display, bool, 0400, > - "Disable display (default: false)"); > - > i915_param_named(memtest, bool, 0400, > "Perform a read/write test of all device memory on module load > (default: off)"); > > diff --git a/drivers/gpu/drm/i915/i915_params.h > b/drivers/gpu/drm/i915/i915_params.h > index 5fa77ecb8d31..8bce7d057634 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -63,9 +63,7 @@ struct drm_printer; > param(unsigned int, lmem_bar_size, 0, 0400) \ > /* leave bools at the end to not create holes */ \ > param(bool, enable_hangcheck, true, 0600) \ > - param(bool, force_reset_modeset_test, false, 0600) \ > param(bool, error_capture, true, > IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \ > - param(bool, disable_display, false, 0400) \ > param(bool, verbose_state_checks, true, 0) \ > param(bool, nuclear_pageflip, false, 0400) \ > param(bool, enable_dp_mst, true, 0600) \ Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 18/24] drm/i915/display: Move force_reset_modeset_test parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_display_params.c | 4 > drivers/gpu/drm/i915/display/intel_display_params.h | 1 + > drivers/gpu/drm/i915/display/intel_display_reset.c | 2 +- > drivers/gpu/drm/i915/i915_params.c | 4 > drivers/gpu/drm/i915/i915_params.h | 2 +- > 5 files changed, 7 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > b/drivers/gpu/drm/i915/display/intel_display_params.c > index 3c0e93934ac2..7f330a5e1188 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > @@ -80,6 +80,10 @@ intel_display_param_named_unsafe(load_detect_test, bool, > 0400, > "Force-enable the VGA load detect code for testing (default:false). " > "For developers only."); > > +intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400, > + "Force a modeset during gpu reset for testing (default:false). " > + "For developers only."); > + > intel_display_param_named_unsafe(enable_fbc, int, 0400, > "Enable frame buffer compression for power savings " > "(default: -1 (use per-chip default))"); > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h > b/drivers/gpu/drm/i915/display/intel_display_params.h > index 8b36b73437b2..25f238e63ff8 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.h > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h > @@ -37,6 +37,7 @@ struct drm_i915_private; > param(int, edp_vswing, 0, 0400) \ > param(int, enable_dpcd_backlight, -1, 0600) \ > param(bool, load_detect_test, false, 0600) \ > + param(bool, force_reset_modeset_test, false, 0600) \ > param(int, enable_fbc, -1, 0600)\ > param(int, enable_psr, -1, 0600) \ > param(bool, psr_safest_params, false, 0400) \ > diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c > b/drivers/gpu/drm/i915/display/intel_display_reset.c > index 17178d5d7788..c2c347b22448 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_reset.c > +++ b/drivers/gpu/drm/i915/display/intel_display_reset.c > @@ -29,7 +29,7 @@ void intel_display_reset_prepare(struct drm_i915_private > *dev_priv) > return; > > /* reset doesn't touch the display */ > - if (!dev_priv->params.force_reset_modeset_test && > + if (!dev_priv->display.params.force_reset_modeset_test && > !gpu_reset_clobbers_display(dev_priv)) > return; > > diff --git a/drivers/gpu/drm/i915/i915_params.c > b/drivers/gpu/drm/i915/i915_params.c > index cb56973a2394..497e39b1dcfb 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400, > "Force probe options for specified supported devices. " > "See CONFIG_DRM_I915_FORCE_PROBE for details."); > > -i915_param_named_unsafe(force_reset_modeset_test, bool, 0400, > - "Force a modeset during gpu reset for testing (default:false). " > - "For developers only."); > - > i915_param_named(disable_display, bool, 0400, > "Disable display (default: false)"); > > diff --git a/drivers/gpu/drm/i915/i915_params.h > b/drivers/gpu/drm/i915/i915_params.h > index cf5448bbc087..5fa77ecb8d31 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -63,7 +63,7 @@ struct drm_printer; > param(unsigned int, lmem_bar_size, 0, 0400) \ > /* leave bools at the end to not create holes */ \ > param(bool, enable_hangcheck, true, 0600) \ > - param(bool, force_reset_modeset_test, false, 0600) \ > + param(bool, force_reset_modeset_test, false, 0600) \ > param(bool, error_capture, true, > IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \ > param(bool, disable_display, false, 0400) \ > param(bool, verbose_state_checks, true, 0) \ Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 17/24] drm/i915/display: Move load_detect_test parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_crt.c| 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 4
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c
> b/drivers/gpu/drm/i915/display/intel_crt.c
> index 913e5d230a4d..0e33a0523a75 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -841,7 +841,7 @@ intel_crt_detect(struct drm_connector *connector,
> if (!intel_display_device_enabled(dev_priv))
> return connector_status_disconnected;
>
> - if (dev_priv->params.load_detect_test) {
> + if (dev_priv->display.params.load_detect_test) {
> wakeref = intel_display_power_get(dev_priv,
> intel_encoder->power_domain);
> goto load_detect;
> @@ -901,7 +901,7 @@ intel_crt_detect(struct drm_connector *connector,
> else if (DISPLAY_VER(dev_priv) < 4)
> status = intel_crt_load_detect(crt,
> to_intel_crtc(connector->state->crtc)->pipe);
> - else if (dev_priv->params.load_detect_test)
> + else if (dev_priv->display.params.load_detect_test)
> status = connector_status_disconnected;
> else
> status = connector_status_unknown;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 01b732819aab..3c0e93934ac2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -76,6 +76,10 @@ intel_display_param_named(enable_dpcd_backlight, int, 0400,
> "Enable support for DPCD backlight control"
> "(-1=use per-VBT LFP backlight type setting [default], 0=disabled,
> 1=enable, 2=force VESA interface, 3=force Intel interface)");
>
> +intel_display_param_named_unsafe(load_detect_test, bool, 0400,
> + "Force-enable the VGA load detect code for testing (default:false). "
> + "For developers only.");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 6c08ed07bb58..8b36b73437b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -36,6 +36,7 @@ struct drm_i915_private;
> param(int, invert_brightness, 0, 0600) \
> param(int, edp_vswing, 0, 0400) \
> param(int, enable_dpcd_backlight, -1, 0600) \
> + param(bool, load_detect_test, false, 0600) \
> param(int, enable_fbc, -1, 0600)\
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index e15cd8491c7f..cb56973a2394 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
> "Force probe options for specified supported devices. "
> "See CONFIG_DRM_I915_FORCE_PROBE for details.");
>
> -i915_param_named_unsafe(load_detect_test, bool, 0400,
> - "Force-enable the VGA load detect code for testing (default:false). "
> - "For developers only.");
> -
> i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
> "Force a modeset during gpu reset for testing (default:false). "
> "For developers only.");
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 8169234338b1..cf5448bbc087 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -63,7 +63,6 @@ struct drm_printer;
> param(unsigned int, lmem_bar_size, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, load_detect_test, false, 0600) \
> param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true,
> IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> param(bool, disable_display, false, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 16/24] drm/i915/display: Move enable_dpcd_backlightmodule parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++--
> drivers/gpu/drm/i915/i915_params.c| 4
> drivers/gpu/drm/i915/i915_params.h| 1 -
> 5 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index a16adfa36b64..01b732819aab 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -72,6 +72,10 @@ intel_display_param_named_unsafe(edp_vswing, int, 0400,
> "(0=use value from vbt [default], 1=low power swing(200mV),"
> "2=default swing(400mV))");
>
> +intel_display_param_named(enable_dpcd_backlight, int, 0400,
> + "Enable support for DPCD backlight control"
> + "(-1=use per-VBT LFP backlight type setting [default], 0=disabled,
> 1=enable, 2=force VESA interface, 3=force Intel interface)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 9e749ea97707..6c08ed07bb58 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -35,6 +35,7 @@ struct drm_i915_private;
> param(int, enable_ips, 1, 0600) \
> param(int, invert_brightness, 0, 0600) \
> param(int, edp_vswing, 0, 0400) \
> + param(int, enable_dpcd_backlight, -1, 0600) \
> param(int, enable_fbc, -1, 0600)\
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 95cc5251843e..1c2912ce59a5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -146,7 +146,7 @@ intel_dp_aux_supports_hdr_backlight(struct
> intel_connector *connector)
>* HDR static metadata we need to start maintaining table of
>* ranges for such panels.
>*/
> - if (i915->params.enable_dpcd_backlight !=
> INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
> + if (i915->display.params.enable_dpcd_backlight !=
> INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
> !(connector->base.hdr_sink_metadata.hdmi_type1.metadata_type &
> BIT(HDMI_STATIC_METADATA_TYPE1))) {
> drm_info(>drm,
> @@ -489,7 +489,7 @@ int intel_dp_aux_init_backlight_funcs(struct
> intel_connector *connector)
> /* Check the VBT and user's module parameters to figure out which
>* interfaces to probe
>*/
> - switch (i915->params.enable_dpcd_backlight) {
> + switch (i915->display.params.enable_dpcd_backlight) {
> case INTEL_DP_AUX_BACKLIGHT_OFF:
> return -ENODEV;
> case INTEL_DP_AUX_BACKLIGHT_AUTO:
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index 6b9df9f9d842..e15cd8491c7f 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -140,10 +140,6 @@ i915_param_named_unsafe(inject_probe_failure, uint, 0400,
> "Force an error after a number of failure check points (0:disabled
> (default), N:force failure at the Nth failure check point)");
> #endif
>
> -i915_param_named(enable_dpcd_backlight, int, 0400,
> - "Enable support for DPCD backlight control"
> - "(-1=use per-VBT LFP backlight type setting [default], 0=disabled,
> 1=enable, 2=force VESA interface, 3=force Intel interface)");
> -
> #if IS_ENABLED(CONFIG_DRM_I915_GVT)
> i915_param_named(enable_gvt, bool, 0400,
> "Enable support for Intel GVT-g graphics virtualization host
> support(default:false)");
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index c33edaee5032..8169234338b1 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -57,7 +57,6 @@ struct drm_printer;
> param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
> param(unsi
Re: [Intel-gfx] [PATCH v2 15/24] drm/i915/display: Move edp_vswing module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 6 ++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 6 --
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 70c0491aac42..69db1a3a1499 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1514,9 +1514,9 @@ parse_edp(struct drm_i915_private *i915,
> u8 vswing;
>
> /* Don't read from VBT if module parameter has valid value*/
> - if (i915->params.edp_vswing) {
> + if (i915->display.params.edp_vswing) {
> panel->vbt.edp.low_vswing =
> - i915->params.edp_vswing == 1;
> + i915->display.params.edp_vswing == 1;
> } else {
> vswing = (edp->edp_vswing_preemph >> (panel_type * 4))
> & 0xF;
> panel->vbt.edp.low_vswing = vswing == 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 8d8050a22bf7..a16adfa36b64 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -66,6 +66,12 @@ intel_display_param_named_unsafe(invert_brightness, int,
> 0400,
> "to dri-de...@lists.freedesktop.org, if your machine needs it. "
> "It will then be included in an upcoming module version.");
>
> +/* WA to get away with the default setting in VBT for early platforms.Will
> be removed */
> +intel_display_param_named_unsafe(edp_vswing, int, 0400,
> + "Ignore/Override vswing pre-emph table selection from VBT "
> + "(0=use value from vbt [default], 1=low power swing(200mV),"
> + "2=default swing(400mV))");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 23fa03ea38c9..9e749ea97707 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -34,6 +34,7 @@ struct drm_i915_private;
> param(int, disable_power_well, -1, 0400) \
> param(int, enable_ips, 1, 0600) \
> param(int, invert_brightness, 0, 0600) \
> + param(int, edp_vswing, 0, 0400) \
> param(int, enable_fbc, -1, 0600)\
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index 423fe54484e1..6b9df9f9d842 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -111,12 +111,6 @@ i915_param_named(verbose_state_checks, bool, 0600,
> i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
> "Force enable atomic functionality on platforms that don't have full
> support yet.");
>
> -/* WA to get away with the default setting in VBT for early platforms.Will
> be removed */
> -i915_param_named_unsafe(edp_vswing, int, 0400,
> - "Ignore/Override vswing pre-emph table selection from VBT "
> - "(0=use value from vbt [default], 1=low power swing(200mV),"
> - "2=default swing(400mV))");
> -
> i915_param_named_unsafe(enable_guc, int, 0400,
> "Enable GuC load for GuC submission and/or HuC load. "
> "Required functionality can be selected using bitmask values. "
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index ae0873443a65..c33edaee5032 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -55,7 +55,6 @@ struct drm_printer;
> param(char *, gsc_firmware_path, NULL, 0400) \
> param(bool, memtest, false, 0400) \
> param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
> - param(int, edp_vswing, 0, 0400) \
> param(unsigned int, reset, 3, 0600) \
> param(unsigned int, inject_probe_failure, 0, 0) \
> param(int, enable_dpcd_backlight, -1, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 14/24] drm/i915/display: Move invert_brightness module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_backlight.c | 9 +
> drivers/gpu/drm/i915/display/intel_display_params.c | 9 -
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 7 ---
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c
> b/drivers/gpu/drm/i915/display/intel_backlight.c
> index 2e8f17c04522..612d4cd9dacb 100644
> --- a/drivers/gpu/drm/i915/display/intel_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_backlight.c
> @@ -88,10 +88,10 @@ u32 intel_backlight_invert_pwm_level(struct
> intel_connector *connector, u32 val)
>
> drm_WARN_ON(>drm, panel->backlight.pwm_level_max == 0);
>
> - if (i915->params.invert_brightness < 0)
> + if (i915->display.params.invert_brightness < 0)
> return val;
>
> - if (i915->params.invert_brightness > 0 ||
> + if (i915->display.params.invert_brightness > 0 ||
> intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)) {
> return panel->backlight.pwm_level_max - val +
> panel->backlight.pwm_level_min;
> }
> @@ -132,8 +132,9 @@ u32 intel_backlight_level_from_pwm(struct intel_connector
> *connector, u32 val)
> drm_WARN_ON_ONCE(>drm,
>panel->backlight.max == 0 ||
> panel->backlight.pwm_level_max == 0);
>
> - if (i915->params.invert_brightness > 0 ||
> - (i915->params.invert_brightness == 0 && intel_has_quirk(i915,
> QUIRK_INVERT_BRIGHTNESS)))
> + if (i915->display.params.invert_brightness > 0 ||
> + (i915->display.params.invert_brightness == 0 &&
> + intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)))
> val = panel->backlight.pwm_level_max - (val -
> panel->backlight.pwm_level_min);
>
> return scale(val, panel->backlight.pwm_level_min,
> panel->backlight.pwm_level_max,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index c2399e11203c..8d8050a22bf7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -57,7 +57,14 @@ intel_display_param_named_unsafe(disable_power_well, int,
> 0400,
> "Disable display power wells when possible "
> "(-1=auto [default], 0=power wells always on, 1=power wells disabled
> when possible)");
>
> -i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
> +intel_display_param_named_unsafe(enable_ips, int, 0400, "Enable IPS
> (default: true)");
> +
This change is in the wrong patch. It should be moved to the previous
one.
With this fixed:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 13/24] drm/i915/display: Move enable_ips module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 2 ++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 2 --
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c
> b/drivers/gpu/drm/i915/display/hsw_ips.c
> index 7dc38ac02092..611a7d6ef80c 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -193,7 +193,7 @@ bool hsw_crtc_state_ips_capable(const struct
> intel_crtc_state *crtc_state)
> if (!hsw_crtc_supports_ips(crtc))
> return false;
>
> - if (!i915->params.enable_ips)
> + if (!i915->display.params.enable_ips)
> return false;
>
> if (crtc_state->pipe_bpp > 24)
> @@ -329,7 +329,7 @@ static int hsw_ips_debugfs_status_show(struct seq_file
> *m, void *unused)
> wakeref = intel_runtime_pm_get(>runtime_pm);
>
> seq_printf(m, "Enabled by kernel parameter: %s\n",
> -str_yes_no(i915->params.enable_ips));
> +str_yes_no(i915->display.params.enable_ips));
>
> if (DISPLAY_VER(i915) >= 8) {
> seq_puts(m, "Currently: unknown\n");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 86b46cff1718..c2399e11203c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -57,6 +57,8 @@ intel_display_param_named_unsafe(disable_power_well, int,
> 0400,
> "Disable display power wells when possible "
> "(-1=auto [default], 0=power wells always on, 1=power wells disabled
> when possible)");
>
> +i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 998f99a2857c..11c21a3a3124 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -32,6 +32,7 @@ struct drm_i915_private;
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
> + param(int, enable_ips, 1, 0600) \
Why isn't this a boolean and set to true instead of int and 1?
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 12/24] drm/i915/display: Move disable_power_well module parameter under display
ate *i915, bool s2idle) >* Even if power well support was disabled we still want to disable >* power wells if power domains must be deinitialized for suspend. >*/ > - if (!i915->params.disable_power_well) > + if (!i915->display.params.disable_power_well) > intel_display_power_put(i915, POWER_DOMAIN_INIT, > > fetch_and_zero(>display.power.domains.disable_wakeref)); > > diff --git a/drivers/gpu/drm/i915/i915_params.c > b/drivers/gpu/drm/i915/i915_params.c > index 51e706f6e57e..eab02f71a4e5 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400, > "Force probe options for specified supported devices. " > "See CONFIG_DRM_I915_FORCE_PROBE for details."); > > -i915_param_named_unsafe(disable_power_well, int, 0400, > - "Disable display power wells when possible " > - "(-1=auto [default], 0=power wells always on, 1=power wells disabled > when possible)"); > - > i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)"); > > i915_param_named_unsafe(load_detect_test, bool, 0400, > diff --git a/drivers/gpu/drm/i915/i915_params.h > b/drivers/gpu/drm/i915/i915_params.h > index 066f15783580..060464df03c2 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -47,7 +47,6 @@ struct drm_printer; > */ > #define I915_PARAMS_FOR_EACH(param) \ > param(int, modeset, -1, 0400) \ > - param(int, disable_power_well, -1, 0400) \ > param(int, enable_ips, 1, 0600) \ > param(int, invert_brightness, 0, 0600) \ > param(int, enable_guc, -1, 0400) \ Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 11/24] drm/i915/display: Move enable_sagv module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++ > drivers/gpu/drm/i915/display/intel_display_params.h | 1 + > drivers/gpu/drm/i915/display/skl_watermark.c| 5 +++-- > drivers/gpu/drm/i915/i915_params.c | 3 --- > drivers/gpu/drm/i915/i915_params.h | 1 - > 5 files changed, 7 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > b/drivers/gpu/drm/i915/display/intel_display_params.c > index 8f222b5bfd8d..efc311837ff1 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > @@ -50,6 +50,9 @@ intel_display_param_named_unsafe(enable_dc, int, 0400, > intel_display_param_named_unsafe(enable_dpt, bool, 0400, > "Enable display page table (DPT) (default: true)"); > > +intel_display_param_named_unsafe(enable_sagv, bool, 0600, > + "Enable system agent voltage/frequency scaling (SAGV) (default: true)"); > + Shouldn't it be 0400 here? With this fixed: Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 10/24] drm/i915/display: Move enable_dpt module parameter under display
gt; --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -95,9 +95,6 @@ i915_param_named_unsafe(disable_power_well, int, 0400, > > i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)"); > > -i915_param_named_unsafe(enable_dpt, bool, 0400, > - "Enable display page table (DPT) (default: true)"); > - > i915_param_named_unsafe(load_detect_test, bool, 0400, > "Force-enable the VGA load detect code for testing (default:false). " > "For developers only."); > diff --git a/drivers/gpu/drm/i915/i915_params.h > b/drivers/gpu/drm/i915/i915_params.h > index c3487b9d6937..b8728990cb8b 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -47,7 +47,6 @@ struct drm_printer; > */ > #define I915_PARAMS_FOR_EACH(param) \ > param(int, modeset, -1, 0400) \ > - param(bool, enable_dpt, true, 0400) \ > param(bool, enable_sagv, true, 0600) \ > param(int, disable_power_well, -1, 0400) \ > param(int, enable_ips, 1, 0600) \ Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 09/24] drm/i915/display: Move enable_dc module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > Signed-off-by: Jouni Högander > --- > drivers/gpu/drm/i915/display/intel_display_params.c | 5 + > drivers/gpu/drm/i915/display/intel_display_params.h | 1 + > drivers/gpu/drm/i915/display/intel_display_power.c | 2 +- > drivers/gpu/drm/i915/i915_params.c | 5 - > drivers/gpu/drm/i915/i915_params.h | 1 - > 5 files changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c > b/drivers/gpu/drm/i915/display/intel_display_params.c > index 6a5be37ec3af..7a528e72c970 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.c > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c > @@ -42,6 +42,11 @@ intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, > 0400, > "Override/Ignore selection of SDVO panel mode in the VBT " > "(-2=ignore, -1=auto [default], index in VBT BIOS table)"); > > +intel_display_param_named_unsafe(enable_dc, int, 0400, > + "Enable power-saving display C-states. " > + "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; " > + "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)"); > + > intel_display_param_named_unsafe(enable_fbc, int, 0400, > "Enable frame buffer compression for power savings " > "(default: -1 (use per-chip default))"); > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h > b/drivers/gpu/drm/i915/display/intel_display_params.h > index c40a3cd57ffc..8721179b3f09 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_params.h > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h > @@ -28,6 +28,7 @@ struct drm_i915_private; > param(int, lvds_channel_mode, 0, 0400) \ > param(int, panel_use_ssc, -1, 0600) \ > param(int, vbt_sdvo_panel_type, -1, 0400) \ > + param(int, enable_dc, -1, 0400) \ > param(int, enable_fbc, -1, 0600)\ > param(int, enable_psr, -1, 0600) \ > param(bool, psr_safest_params, false, 0400) \ > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c > b/drivers/gpu/drm/i915/display/intel_display_power.c > index e25785ae1c20..4832eb8da080 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -1020,7 +1020,7 @@ int intel_power_domains_init(struct drm_i915_private > *dev_priv) > sanitize_disable_power_well_option(dev_priv, > > dev_priv->params.disable_power_well); > power_domains->allowed_dc_mask = > - get_allowed_dc_mask(dev_priv, dev_priv->params.enable_dc); > + get_allowed_dc_mask(dev_priv, > dev_priv->display.params.enable_dc); > > power_domains->target_dc_state = > sanitize_target_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6); > diff --git a/drivers/gpu/drm/i915/i915_params.c > b/drivers/gpu/drm/i915/i915_params.c > index d0abcbd526a7..3d370e43df3c 100644 > --- a/drivers/gpu/drm/i915/i915_params.c > +++ b/drivers/gpu/drm/i915/i915_params.c > @@ -67,11 +67,6 @@ i915_param_named(modeset, int, 0400, > "Use kernel modesetting [KMS] (0=disable, " > "1=on, -1=force vga console preference [default])"); > > -i915_param_named_unsafe(enable_dc, int, 0400, > - "Enable power-saving display C-states. " > - "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; " > - "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)"); > - > i915_param_named_unsafe(reset, uint, 0400, > "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset > [default])"); > > diff --git a/drivers/gpu/drm/i915/i915_params.h > b/drivers/gpu/drm/i915/i915_params.h > index 1ea332dfbb5d..c3487b9d6937 100644 > --- a/drivers/gpu/drm/i915/i915_params.h > +++ b/drivers/gpu/drm/i915/i915_params.h > @@ -47,7 +47,6 @@ struct drm_printer; > */ > #define I915_PARAMS_FOR_EACH(param) \ > param(int, modeset, -1, 0400) \ > - param(int, enable_dc, -1, 0400) \ > param(bool, enable_dpt, true, 0400) \ > param(bool, enable_sagv, true, 0600) \ > param(int, disable_power_well, -1, 0400) \ Reviewed-by: Luca Coelho -- Cheers, Luca.
Re: [Intel-gfx] [PATCH v2 08/24] drm/i915/display: Move vbt_sdvo_panel_type module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 4
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 4e8f1e91bb08..70c0491aac42 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1116,7 +1116,7 @@ parse_sdvo_panel_data(struct drm_i915_private *i915,
> struct drm_display_mode *panel_fixed_mode;
> int index;
>
> - index = i915->params.vbt_sdvo_panel_type;
> + index = i915->display.params.vbt_sdvo_panel_type;
> if (index == -2) {
> drm_dbg_kms(>drm,
> "Ignore SDVO panel mode from BIOS VBT tables.\n");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index e25d70653c0f..6a5be37ec3af 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -38,6 +38,10 @@ intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
> "Use Spread Spectrum Clock with panels [LVDS/eDP] "
> "(default: auto from VBT)");
>
> +intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
> + "Override/Ignore selection of SDVO panel mode in the VBT "
> + "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 4b326baf146f..c40a3cd57ffc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -27,6 +27,7 @@ struct drm_i915_private;
> param(char *, vbt_firmware, NULL, 0400) \
> param(int, lvds_channel_mode, 0, 0400) \
> param(int, panel_use_ssc, -1, 0600) \
> + param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_fbc, -1, 0600)\
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index 4123424b2c2e..d0abcbd526a7 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
> "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
>
> -i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
> - "Override/Ignore selection of SDVO panel mode in the VBT "
> - "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
> -
> i915_param_named_unsafe(reset, uint, 0400,
> "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset
> [default])");
>
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 0bd365889e73..1ea332dfbb5d 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 07/24] drm/i915/display: Move panel_use_ssc module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_panel.c | 4 ++--
> drivers/gpu/drm/i915/i915_params.c | 4
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index cdc42bc575b8..e25d70653c0f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -34,6 +34,10 @@ intel_display_param_named_unsafe(lvds_channel_mode, int,
> 0400,
>"Specify LVDS channel mode "
>"(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
>
> +intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
> + "Use Spread Spectrum Clock with panels [LVDS/eDP] "
> + "(default: auto from VBT)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index a4988ef44837..4b326baf146f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -26,6 +26,7 @@ struct drm_i915_private;
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(char *, vbt_firmware, NULL, 0400) \
> param(int, lvds_channel_mode, 0, 0400) \
> + param(int, panel_use_ssc, -1, 0600) \
> param(int, enable_fbc, -1, 0600)\
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
> b/drivers/gpu/drm/i915/display/intel_panel.c
> index 483beedac5b8..0d8e5320a4f8 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -46,8 +46,8 @@
>
> bool intel_panel_use_ssc(struct drm_i915_private *i915)
> {
> - if (i915->params.panel_use_ssc >= 0)
> - return i915->params.panel_use_ssc != 0;
> + if (i915->display.params.panel_use_ssc >= 0)
> + return i915->display.params.panel_use_ssc != 0;
> return i915->display.vbt.lvds_use_ssc &&
> !intel_has_quirk(i915, QUIRK_LVDS_SSC_DISABLE);
> }
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index ea55cc2c4854..4123424b2c2e 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
> "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
>
> -i915_param_named_unsafe(panel_use_ssc, int, 0400,
> - "Use Spread Spectrum Clock with panels [LVDS/eDP] "
> - "(default: auto from VBT)");
> -
> i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
> "Override/Ignore selection of SDVO panel mode in the VBT "
> "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 03ec2c2b589d..0bd365889e73 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, panel_use_ssc, -1, 0600) \
> param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 06/24] drm/i915/display: Move lvds_channel_mode module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
> drivers/gpu/drm/i915/display/intel_lvds.c | 4 ++--
> drivers/gpu/drm/i915/i915_params.c | 4
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 72f1782e27fe..cdc42bc575b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -30,6 +30,10 @@ static struct intel_display_params intel_display_modparams
> __read_mostly = {
> intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
> "Load VBT from specified file under /lib/firmware");
>
> +intel_display_param_named_unsafe(lvds_channel_mode, int, 0400,
> + "Specify LVDS channel mode "
> + "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index a6f37c55523d..a4988ef44837 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -25,7 +25,8 @@ struct drm_i915_private;
> */
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(char *, vbt_firmware, NULL, 0400) \
> - param(int, enable_fbc, -1, 0600) \
> + param(int, lvds_channel_mode, 0, 0400) \
> + param(int, enable_fbc, -1, 0600)\
The enable_fbc line shouldn't be changed here. Was there some missing
spaces? If so, it should be fixed in the patch that added enable_fbc.
With this fixed:
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 05/24] drm/i915/display: Move vbt_firmware module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
> drivers/gpu/drm/i915/i915_params.c | 3 ---
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index eac82deede4c..72f1782e27fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -27,6 +27,9 @@ static struct intel_display_params intel_display_modparams
> __read_mostly = {
> * debugfs mode to 0.
> */
>
> +intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
> + "Load VBT from specified file under /lib/firmware");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 99b79bed9363..a6f37c55523d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -24,6 +24,7 @@ struct drm_i915_private;
> * debugfs file
> */
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> + param(char *, vbt_firmware, NULL, 0400) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c
> b/drivers/gpu/drm/i915/display/intel_opregion.c
> index 84078fb82b2f..1ce785db6a5e 100644
> --- a/drivers/gpu/drm/i915/display/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/display/intel_opregion.c
> @@ -841,7 +841,7 @@ static int intel_load_vbt_firmware(struct
> drm_i915_private *dev_priv)
> {
> struct intel_opregion *opregion = _priv->display.opregion;
> const struct firmware *fw = NULL;
> - const char *name = dev_priv->params.vbt_firmware;
> + const char *name = dev_priv->display.params.vbt_firmware;
> int ret;
>
> if (!name || !*name)
> diff --git a/drivers/gpu/drm/i915/i915_params.c
> b/drivers/gpu/drm/i915/i915_params.c
> index c65e3314ae48..9d0535d774c9 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -87,9 +87,6 @@ i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
> i915_param_named_unsafe(reset, uint, 0400,
> "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset
> [default])");
>
> -i915_param_named_unsafe(vbt_firmware, charp, 0400,
> - "Load VBT from specified file under /lib/firmware");
> -
> #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
> i915_param_named(error_capture, bool, 0400,
> "Record the GPU state following a hang. "
> diff --git a/drivers/gpu/drm/i915/i915_params.h
> b/drivers/gpu/drm/i915/i915_params.h
> index 47a05c4a8e89..37a1d31a233c 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -46,7 +46,6 @@ struct drm_printer;
> * debugfs file
> */
> #define I915_PARAMS_FOR_EACH(param) \
> - param(char *, vbt_firmware, NULL, 0400) \
> param(int, modeset, -1, 0400) \
> param(int, lvds_channel_mode, 0, 0400) \
> param(int, panel_use_ssc, -1, 0600) \
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
Re: [Intel-gfx] [PATCH v2 04/24] drm/i915/display: Move psr related module parameters under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> .../gpu/drm/i915/display/intel_display_params.c | 15 +++
> .../gpu/drm/i915/display/intel_display_params.h | 5 +
> drivers/gpu/drm/i915/display/intel_psr.c | 14 +++---
> drivers/gpu/drm/i915/i915_params.c| 15 ---
> drivers/gpu/drm/i915/i915_params.h| 3 ---
> 5 files changed, 27 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 330613cd64db..eac82deede4c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -31,6 +31,21 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
>
> +intel_display_param_named_unsafe(enable_psr, int, 0400,
> + "Enable PSR "
> + "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> + "Default: -1 (use per-chip default)");
> +
> +intel_display_param_named(psr_safest_params, bool, 0400,
> + "Replace PSR VBT parameters by the safest and not optimal ones. This "
> + "is helpful to detect if PSR issues are related to bad values set in "
> + " VBT. (0=use VBT parameters, 1=use safest parameters)");
You don't say that the default here is 0.
> +
> +intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
> + "Enable PSR2 selective fetch "
> + "(0=disabled, 1=enabled) "
> + "Default: 0");
> +
And here you say the default is 0, but...
> __maybe_unused
> static void _param_print_bool(struct drm_printer *p, const char *driver_name,
> const char *name, bool val)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index f1bdf2c6e5cd..99b79bed9363 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -6,6 +6,8 @@
> #ifndef _INTEL_DISPLAY_PARAMS_H_
> #define _INTEL_DISPLAY_PARAMS_H_
>
> +#include
> +
> struct drm_printer;
> struct drm_i915_private;
>
> @@ -23,6 +25,9 @@ struct drm_i915_private;
> */
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(int, enable_fbc, -1, 0600) \
> + param(int, enable_psr, -1, 0600) \
> + param(bool, psr_safest_params, false, 0400) \
> + param(bool, enable_psr2_sel_fetch, true, 0400) \
...it's actually true.
>
> #define MEMBER(T, member, ...) T member;
> struct intel_display_params {
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4f1f31fc9529..ecd24a0b86cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -179,9 +179,9 @@ static bool psr_global_enabled(struct intel_dp *intel_dp)
>
> switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
> case I915_PSR_DEBUG_DEFAULT:
> - if (i915->params.enable_psr == -1)
> + if (i915->display.params.enable_psr == -1)
> return connector->panel.vbt.psr.enable;
> - return i915->params.enable_psr;
> + return i915->display.params.enable_psr;
> case I915_PSR_DEBUG_DISABLE:
> return false;
> default:
> @@ -198,7 +198,7 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
> case I915_PSR_DEBUG_FORCE_PSR1:
> return false;
> default:
> - if (i915->params.enable_psr == 1)
> + if (i915->display.params.enable_psr == 1)
> return false;
> return true;
> }
> @@ -606,7 +606,7 @@ static u32 intel_psr1_get_tp_time(struct intel_dp
> *intel_dp)
> if (DISPLAY_VER(dev_priv) >= 11)
> val |= EDP_PSR_TP4_TIME_0us;
>
> - if (dev_priv->params.psr_safest_params) {
> + if (dev_priv->display.params.psr_safest_params) {
> val |= EDP_PSR_TP1_TIME_2500us;
> val |= EDP_PSR_TP2_TP3_TIME_2500us;
> goto check_tp3_sel;
> @@ -700,7 +700,7 @@ static u32 intel_psr2_get_tp_time(struct intel_dp
> *intel_dp)
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> u32 val = 0;
>
> - if (dev_priv->params.psr_safest_params)
> + if (dev_priv->display.params.psr_safest_params)
> return EDP_PSR2_TP2_TIME_2500us;
>
> if (connector->panel.vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 &&
> @@ -943,7 +943,7 @@ static bool intel_psr2_sel_fetch_config_valid(struct
> intel_dp *intel_dp,
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> - if (!dev_priv->params.enable_psr2_sel_fetch &&
> + if
Re: [Intel-gfx] [PATCH v2 03/24] drm/i915/display: Move enable_fbc module parameter under display
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander
> ---
> drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 4
> drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
> drivers/gpu/drm/i915/display/intel_fbc.c| 10 +-
> drivers/gpu/drm/i915/i915_params.c | 4
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 6 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c
> b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index af0c79a4c9a4..b37c0d02d500 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -2993,7 +2993,7 @@ static void ilk_wm_merge(struct drm_i915_private
> *dev_priv,
>
> /* ILK: LP2+ must be disabled when FBC WM is disabled but FBC enabled */
> if (DISPLAY_VER(dev_priv) == 5 && HAS_FBC(dev_priv) &&
> - dev_priv->params.enable_fbc && !merged->fbc_wm_enabled) {
> + dev_priv->display.params.enable_fbc && !merged->fbc_wm_enabled) {
> for (level = 2; level < num_levels; level++) {
> struct intel_wm_level *wm = >wm[level];
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 11ee73a98b5b..330613cd64db 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -27,6 +27,10 @@ static struct intel_display_params intel_display_modparams
> __read_mostly = {
> * debugfs mode to 0.
> */
>
> +intel_display_param_named_unsafe(enable_fbc, int, 0400,
> + "Enable frame buffer compression for power savings "
> + "(default: -1 (use per-chip default))");
> +
> __maybe_unused
> static void _param_print_bool(struct drm_printer *p, const char *driver_name,
> const char *name, bool val)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> b/drivers/gpu/drm/i915/display/intel_display_params.h
> index a0fb3e1aa2f5..f1bdf2c6e5cd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -21,7 +21,8 @@ struct drm_i915_private;
> * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0 to not
> create
> * debugfs file
> */
> -#define INTEL_DISPLAY_PARAMS_FOR_EACH(param)
> +#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> + param(int, enable_fbc, -1, 0600) \
>
> #define MEMBER(T, member, ...) T member;
> struct intel_display_params {
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c
> b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 4820d21cc942..bde12fe62275 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1174,7 +1174,7 @@ static int intel_fbc_check_plane(struct
> intel_atomic_state *state,
> return 0;
> }
>
> - if (!i915->params.enable_fbc) {
> + if (!i915->display.params.enable_fbc) {
> plane_state->no_fbc_reason = "disabled per module param or by
> default";
> return 0;
> }
> @@ -1751,8 +1751,8 @@ void intel_fbc_handle_fifo_underrun_irq(struct
> drm_i915_private *i915)
> */
> static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
> {
> - if (i915->params.enable_fbc >= 0)
> - return !!i915->params.enable_fbc;
> + if (i915->display.params.enable_fbc >= 0)
> + return !!i915->display.params.enable_fbc;
It was like this before your change, but just as a side-comment, it
would e simpler to just return true here, because !!enable_fbc will
always be true here.
Reviewed-by: Luca Coelho
--
Cheers,
Luca.
[Intel-gfx] [PATCH v3] drm/i915: handle uncore spinlock when not available
The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.
To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper functions for locking and unlocking the uncore's
spinlock. In these functions, we have a condition check and only
actually try to lock/unlock the spinlock when I915 is defined, and
thus uncore is available.
This keeps the ifdefs contained in these new functions and all such
logic inside the display code.
Signed-off-by: Luca Coelho
---
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, restore
In v3:
* Undid the change to pass drm_i915_private instead of the lock
itself, since we would have to include i915_drv.h and that pulls
in a truckload of other includes.
drivers/gpu/drm/i915/display/intel_display.h | 20
drivers/gpu/drm/i915/display/intel_vblank.c | 19 ---
2 files changed, 32 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index 0e5dffe8f018..2a33fcc8ce68 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -559,4 +559,24 @@ bool assert_port_valid(struct drm_i915_private *i915, enum
port port);
bool intel_scanout_needs_vtd_wa(struct drm_i915_private *i915);
+/*
+ * The uncore version of the spin lock functions is used to decide
+ * whether we need to lock the uncore lock or not. This is only
+ * needed in i915, not in Xe. Keep the decision-making centralized
+ * here.
+ */
+static inline void intel_spin_lock(spinlock_t *lock)
+{
+#ifdef I915
+ spin_lock(lock);
+#endif
+}
+
+static inline void intel_spin_unlock(spinlock_t *lock)
+{
+#ifdef I915
+ spin_unlock(lock);
+#endif
+}
+
#endif
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index 2cec2abf9746..9b482d648762 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -306,7 +306,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
* register reads, potentially with preemption disabled, so the
* following code must not block on uncore.lock.
*/
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_spin_lock(_priv->uncore.lock);
/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
@@ -374,7 +375,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+ intel_spin_unlock(_priv->uncore.lock);
+ local_irq_restore(irqflags);
/*
* While in vblank, position will be negative
@@ -412,9 +414,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
unsigned long irqflags;
int position;
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_spin_lock(_priv->uncore.lock);
+
position = __intel_get_crtc_scanline(crtc);
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+
+ intel_spin_unlock(_priv->uncore.lock);
+ local_irq_restore(irqflags);
return position;
}
@@ -537,7 +543,7 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
* Need to audit everything to make sure it's safe.
*/
spin_lock_irqsave(>drm.vblank_time_lock, irqflags);
- spin_lock(>uncore.lock);
+ intel_spin_lock(>uncore.lock);
drm_calc_timestamping_constants(>base, _mode);
@@ -546,7 +552,6 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
crtc->mode_flags = mode_flags;
crtc->scanline_offset = intel_crtc_scanline_offset(crtc_state);
-
- spin_unlock(>uncore.lock);
+ intel_spin_unlock(>uncore.lock);
spin_unlock_irqrestore(>drm.vblank_time_lock, irqflags);
}
--
2.39.2
Re: [Intel-gfx] [PATCH v2 02/24] drm/i915/display: Dump also display parameters
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote: > GPU error dump contained all module parameters. If we are moving > display parameters to intel_display_params.[ch] they are not dumped > into GPU error dump. This patch is adding moved display parameters > back to GPU error dump. Display parameters are also included in > i915_capabilities > > v2: Add parameters to i915_capabilities as well > > Signed-off-by: Jouni Högander > --- Reviewed-by: Luca Coelho -- Cheers, Luca.
[Intel-gfx] [PATCH v2] drm/i915: handle uncore spinlock when not available
The uncore code may not always be available (e.g. when we build the
display code with Xe), so we can't always rely on having the uncore's
spinlock.
To handle this, split the spin_lock/unlock_irqsave/restore() into
spin_lock/unlock() followed by a call to local_irq_save/restore() and
create wrapper functions for locking and unlocking the uncore's
spinlock. In these functions, we have a condition check and only
actually try to lock/unlock the spinlock when I915 is defined, and
thus uncore is available.
This keeps the ifdefs contained in these new functions and all such
logic inside the display code.
Signed-off-by: Luca Coelho
---
Note: this patch was accidentally sent only to intel-xe[1], but should
have been sent to intel-gfx. Thus, this is v2.
In v2:
* Renamed uncore_spin_*() to intel_spin_*()
* Corrected the order: save, lock, unlock, restore
[1] https://patchwork.freedesktop.org/patch/563288/
drivers/gpu/drm/i915/display/intel_display.h | 22 +++-
drivers/gpu/drm/i915/display/intel_vblank.c | 19 ++---
2 files changed, 33 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h
b/drivers/gpu/drm/i915/display/intel_display.h
index 0e5dffe8f018..099476906f4c 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -29,6 +29,7 @@
#include "i915_reg_defs.h"
#include "intel_display_limits.h"
+#include "i915_drv.h"
enum drm_scaling_filter;
struct dpll;
@@ -41,7 +42,6 @@ struct drm_file;
struct drm_format_info;
struct drm_framebuffer;
struct drm_i915_gem_object;
-struct drm_i915_private;
struct drm_mode_fb_cmd2;
struct drm_modeset_acquire_ctx;
struct drm_plane;
@@ -559,4 +559,24 @@ bool assert_port_valid(struct drm_i915_private *i915, enum
port port);
bool intel_scanout_needs_vtd_wa(struct drm_i915_private *i915);
+/*
+ * The uncore version of the spin lock functions is used to decide
+ * whether we need to lock the uncore lock or not. This is only
+ * needed in i915, not in Xe. Keep the decision-making centralized
+ * here.
+ */
+static inline void intel_spin_lock(struct drm_i915_private *i915)
+{
+#ifdef I915
+ spin_lock(>uncore.lock);
+#endif
+}
+
+static inline void intel_spin_unlock(struct drm_i915_private *i915)
+{
+#ifdef I915
+ spin_unlock(>uncore.lock);
+#endif
+}
+
#endif
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c
b/drivers/gpu/drm/i915/display/intel_vblank.c
index 2cec2abf9746..7c624ea7e902 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -306,7 +306,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
* register reads, potentially with preemption disabled, so the
* following code must not block on uncore.lock.
*/
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_spin_lock(dev_priv);
/* preempt_disable_rt() should go right here in PREEMPT_RT patchset. */
@@ -374,7 +375,8 @@ static bool i915_get_crtc_scanoutpos(struct drm_crtc *_crtc,
/* preempt_enable_rt() should go right here in PREEMPT_RT patchset. */
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+ intel_spin_unlock(dev_priv);
+ local_irq_restore(irqflags);
/*
* While in vblank, position will be negative
@@ -412,9 +414,13 @@ int intel_get_crtc_scanline(struct intel_crtc *crtc)
unsigned long irqflags;
int position;
- spin_lock_irqsave(_priv->uncore.lock, irqflags);
+ local_irq_save(irqflags);
+ intel_spin_lock(dev_priv);
+
position = __intel_get_crtc_scanline(crtc);
- spin_unlock_irqrestore(_priv->uncore.lock, irqflags);
+
+ intel_spin_unlock(dev_priv);
+ local_irq_restore(irqflags);
return position;
}
@@ -537,7 +543,7 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
* Need to audit everything to make sure it's safe.
*/
spin_lock_irqsave(>drm.vblank_time_lock, irqflags);
- spin_lock(>uncore.lock);
+ intel_spin_lock(i915);
drm_calc_timestamping_constants(>base, _mode);
@@ -546,7 +552,6 @@ void intel_crtc_update_active_timings(const struct
intel_crtc_state *crtc_state,
crtc->mode_flags = mode_flags;
crtc->scanline_offset = intel_crtc_scanline_offset(crtc_state);
-
- spin_unlock(>uncore.lock);
+ intel_spin_unlock(i915);
spin_unlock_irqrestore(>drm.vblank_time_lock, irqflags);
}
--
2.39.2
Re: [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display
On Mon, 2023-10-23 at 11:14 +0300, Luca Coelho wrote:
> On Mon, 2023-10-23 at 07:50 +, Hogander, Jouni wrote:
> > On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > > Currently all module parameters are handled by i915_param.c/h. This
> > > > is a problem for display parameters when Xe driver is used. Add
> > > > a mechanism to add parameters specific to the display. This is
> > > > mainly
> > > > copied from i915_[debugfs]_params.[ch]. Parameters are not yet
> > > > moved. This
> > > > is done by subsequent patches.
> > > >
> > > > Signed-off-by: Jouni Högander
> > > > ---
> > >
> > > Looks generally good, but I have a couple of comments:
> >
> > Thank you Luca for your comments. Please check my responses below.
> >
> > >
> > > [...]
> > > > diff --git
> > > > a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > > b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > > new file mode 100644
> > > > index ..0e33f4e90ddc
> > > > --- /dev/null
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > > @@ -0,0 +1,14 @@
> > > > +/* SPDX-License-Identifier: MIT */
> > > > +/*
> > > > + * Copyright © 2023 Intel Corporation
> > > > + */
> > > > +
> > > > +#ifndef __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > > > +#define __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > > > +
> > > > +struct dentry;
> > >
> > > It doesn't seem like you need dentry here...
> >
> > Yeah, it seems. I will drop it.
> >
> > >
> > >
> > > > +struct drm_i915_private;
> > > > +
> > > > +void intel_display_debugfs_params(struct drm_i915_private *i915);
> > > > +
> > > > +#endif /* __INTEL_DISPLAY_DEBUGFS_PARAMS__ */
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> > > > b/drivers/gpu/drm/i915/display/intel_display_device.c
> > > > index 2b1ec23ba9c3..e80842d1e7c7 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> > > > @@ -12,6 +12,7 @@
> > > > #include "intel_de.h"
> > > > #include "intel_display.h"
> > > > #include "intel_display_device.h"
> > > > +#include "intel_display_params.h"
> > > > #include "intel_display_power.h"
> > > > #include "intel_display_reg_defs.h"
> > > > #include "intel_fbc.h"
> > > > @@ -937,6 +938,13 @@ void intel_display_device_probe(struct
> > > > drm_i915_private *i915)
> > > > DISPLAY_RUNTIME_INFO(i915)->ip.rel = rel;
> > > > DISPLAY_RUNTIME_INFO(i915)->ip.step = step;
> > > > }
> > > > +
> > > > + intel_display_params_copy(>display.params);
> > > > +}
> > > > +
> > > > +void intel_display_device_remove(struct drm_i915_private *i915)
> > > > +{
> > > > + intel_display_params_free(>display.params);
> > > > }
> > > >
> > >
> > > Why can't you just store the parameters as module globals? They are
> > > always associated with the module anyway. Then you don't need to
> > > worry
> > > about the lifetime.
> >
> > These are device parameters. Values from equivalent module parameters
> > are copied when probed. Can be later modified via debugfs without
> > touching other devices parameters.
>
> Okay, makes sense.
>
>
> > > [...]
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > new file mode 100644
> > > > index ..1b347365988c
> > > > --- /dev/null
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > @@ -0,0 +1,34 @@
> > > > +// SPDX-License-Identifier: MIT
> > > > +/*
> > > > + * Copyright © 2023 Intel Corporation
> > > > + */
> > > > +
> > > > +#ifndef _INTEL_DISPLAY_PARAMS_H_
> > > > +#define _INTEL_DISPLAY_PARAMS_H_
> >
Re: [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display
On Mon, 2023-10-23 at 07:50 +, Hogander, Jouni wrote:
> On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > Currently all module parameters are handled by i915_param.c/h. This
> > > is a problem for display parameters when Xe driver is used. Add
> > > a mechanism to add parameters specific to the display. This is
> > > mainly
> > > copied from i915_[debugfs]_params.[ch]. Parameters are not yet
> > > moved. This
> > > is done by subsequent patches.
> > >
> > > Signed-off-by: Jouni Högander
> > > ---
> >
> > Looks generally good, but I have a couple of comments:
>
> Thank you Luca for your comments. Please check my responses below.
>
> >
> > [...]
> > > diff --git
> > > a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > new file mode 100644
> > > index ..0e33f4e90ddc
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > @@ -0,0 +1,14 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright © 2023 Intel Corporation
> > > + */
> > > +
> > > +#ifndef __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > > +#define __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > > +
> > > +struct dentry;
> >
> > It doesn't seem like you need dentry here...
>
> Yeah, it seems. I will drop it.
>
> >
> >
> > > +struct drm_i915_private;
> > > +
> > > +void intel_display_debugfs_params(struct drm_i915_private *i915);
> > > +
> > > +#endif /* __INTEL_DISPLAY_DEBUGFS_PARAMS__ */
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> > > b/drivers/gpu/drm/i915/display/intel_display_device.c
> > > index 2b1ec23ba9c3..e80842d1e7c7 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> > > @@ -12,6 +12,7 @@
> > > #include "intel_de.h"
> > > #include "intel_display.h"
> > > #include "intel_display_device.h"
> > > +#include "intel_display_params.h"
> > > #include "intel_display_power.h"
> > > #include "intel_display_reg_defs.h"
> > > #include "intel_fbc.h"
> > > @@ -937,6 +938,13 @@ void intel_display_device_probe(struct
> > > drm_i915_private *i915)
> > > DISPLAY_RUNTIME_INFO(i915)->ip.rel = rel;
> > > DISPLAY_RUNTIME_INFO(i915)->ip.step = step;
> > > }
> > > +
> > > + intel_display_params_copy(>display.params);
> > > +}
> > > +
> > > +void intel_display_device_remove(struct drm_i915_private *i915)
> > > +{
> > > + intel_display_params_free(>display.params);
> > > }
> > >
> >
> > Why can't you just store the parameters as module globals? They are
> > always associated with the module anyway. Then you don't need to
> > worry
> > about the lifetime.
>
> These are device parameters. Values from equivalent module parameters
> are copied when probed. Can be later modified via debugfs without
> touching other devices parameters.
Okay, makes sense.
> > [...]
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> > > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > new file mode 100644
> > > index ..1b347365988c
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > @@ -0,0 +1,34 @@
> > > +// SPDX-License-Identifier: MIT
> > > +/*
> > > + * Copyright © 2023 Intel Corporation
> > > + */
> > > +
> > > +#ifndef _INTEL_DISPLAY_PARAMS_H_
> > > +#define _INTEL_DISPLAY_PARAMS_H_
> > > +
> > > +struct drm_printer;
> > > +
> > > +/*
> > > + * Invoke param, a function-like macro, for each intel display
> > > param, with
> > > + * arguments:
> > > + *
> > > + * param(type, name, value, mode)
> > > + *
> > > + * type: parameter type, one of {bool, int, unsigned int, unsigned
> > > long, char *}
> > > + * name: name of the parameter
> > > + * value: initial/default value of the parameter
> > > + * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0
> > > to not create
> > > + * debugfs file
> > > + */
> > > +#define INTEL_DISPLAY_PARAMS_FOR_EACH(param)
> >
> > I don't get this. Here you create a macro that expands to nothing...
>
> I wanted to split the patch set in a way that first this framework is
> introduced and only after that parameters are added/moved one by one. I
> still need to have INTEL_DISPLAY_PARAMS_FOR_EACH defined to avoid build
> failure. If you look at patch 03/24 you see when first parameter is
> added this gets as:
>
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(int, enable_fbc, -1, 0600)
Thanks for clarifying. A small comment somewhere here (at least while
it's empty) would be nice. :)
I'll continue reviewing the other patches now.
--
Cheers,
Luca.
