[Intel-gfx] [PATCH i-g-t v2] blacklist: Don't run DRRS test on Intel CI system
Skipping takes time, specifically for the big amount of drrs related kms_frontbuffer_tracking tests. Since we currently don't have any system set up with DRRS panels, blacklisting all those test will save time, and we can avoid the need to increase the Jenkins timeout in order to solve the Bugzilla below. V2: Changed typo and added comment. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105617 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/intel-ci/blacklist.txt | 4 1 file changed, 4 insertions(+) diff --git a/tests/intel-ci/blacklist.txt b/tests/intel-ci/blacklist.txt index 7ca313ac..ef3b45e9 100644 --- a/tests/intel-ci/blacklist.txt +++ b/tests/intel-ci/blacklist.txt @@ -58,6 +58,10 @@ igt@gem_userptr_blits@(major|minor|forked|mlocked|swapping).* igt@gem_wait@.*hang.* igt@gem_write_read_ring_switch(@.*)? ### +# There are no DRRS capable displays in CI lab +### +igt@kms_frontbuffer_tracking@.*drrs.* +### # Broadcom ### igt@vc4_.* -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 1/2] test/gem_ctx_param - Use the last I915_CONTEXT_PARAM+1 for invalid tests
The invalid-param-[get|set] exploits the last I915_CONTEXT_PARAM + 1, to check for ABI extentsions. However, the last param was set to I915_CONTEXT_PARAM_BANNABLE, so when I915_CONTEXT_PARAM_PRIORITY was added to the next enum, the test started failing. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103107 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/gem_ctx_param.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/gem_ctx_param.c b/tests/gem_ctx_param.c index c20ae1ee..75d2a20f 100644 --- a/tests/gem_ctx_param.c +++ b/tests/gem_ctx_param.c @@ -140,7 +140,7 @@ igt_main * to catch ABI extensions. Don't "fix" this testcase without adding all * the tests for the new param first. */ - arg.param = I915_CONTEXT_PARAM_BANNABLE + 1; + arg.param = I915_CONTEXT_PARAM_PRIORITY + 1; igt_subtest("invalid-param-get") { arg.ctx_id = ctx; -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 2/2] test/kms_psr_sink : HACK run psr_drrs on BAT
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104260 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/intel-ci/fast-feedback.testlist | 575 +- 1 file changed, 288 insertions(+), 287 deletions(-) diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist index f71a16bc..34db4706 100644 --- a/tests/intel-ci/fast-feedback.testlist +++ b/tests/intel-ci/fast-feedback.testlist @@ -1,295 +1,296 @@ # Keep alphabetically sorted by default -igt@core_auth@basic-auth -igt@core_prop_blob@basic -igt@debugfs_test@read_all_entries -igt@drv_getparams_basic@basic-eu-total -igt@drv_getparams_basic@basic-subslice-total -igt@drv_hangman@error-state-basic -igt@gem_basic@bad-close -igt@gem_basic@create-close -igt@gem_basic@create-fd-close -igt@gem_busy@basic-busy-default -igt@gem_busy@basic-hang-default -igt@gem_close_race@basic-process -igt@gem_close_race@basic-threads -igt@gem_cpu_reloc@basic -igt@gem_cs_tlb@basic-default -igt@gem_ctx_create@basic -igt@gem_ctx_create@basic-files -igt@gem_ctx_exec@basic -igt@gem_ctx_param@basic -igt@gem_ctx_param@basic-default -igt@gem_ctx_switch@basic-default -igt@gem_ctx_switch@basic-default-heavy -igt@gem_exec_basic@basic-blt -igt@gem_exec_basic@basic-bsd -igt@gem_exec_basic@basic-bsd1 -igt@gem_exec_basic@basic-bsd2 -igt@gem_exec_basic@basic-default -igt@gem_exec_basic@basic-render -igt@gem_exec_basic@basic-vebox -igt@gem_exec_basic@gtt-blt -igt@gem_exec_basic@gtt-bsd -igt@gem_exec_basic@gtt-bsd1 -igt@gem_exec_basic@gtt-bsd2 -igt@gem_exec_basic@gtt-default -igt@gem_exec_basic@gtt-render -igt@gem_exec_basic@gtt-vebox -igt@gem_exec_basic@readonly-blt -igt@gem_exec_basic@readonly-bsd -igt@gem_exec_basic@readonly-bsd1 -igt@gem_exec_basic@readonly-bsd2 -igt@gem_exec_basic@readonly-default -igt@gem_exec_basic@readonly-render -igt@gem_exec_basic@readonly-vebox -igt@gem_exec_create@basic -igt@gem_exec_fence@basic-busy-default -igt@gem_exec_fence@basic-wait-default -igt@gem_exec_fence@basic-await-default -igt@gem_exec_fence@await-hang-default -igt@gem_exec_fence@nb-await-default -igt@gem_exec_flush@basic-batch-kernel-default-cmd -igt@gem_exec_flush@basic-batch-kernel-default-uc -igt@gem_exec_flush@basic-batch-kernel-default-wb -igt@gem_exec_flush@basic-uc-pro-default -igt@gem_exec_flush@basic-uc-prw-default -igt@gem_exec_flush@basic-uc-ro-default -igt@gem_exec_flush@basic-uc-rw-default -igt@gem_exec_flush@basic-uc-set-default -igt@gem_exec_flush@basic-wb-pro-default -igt@gem_exec_flush@basic-wb-prw-default -igt@gem_exec_flush@basic-wb-ro-before-default -igt@gem_exec_flush@basic-wb-ro-default -igt@gem_exec_flush@basic-wb-rw-before-default -igt@gem_exec_flush@basic-wb-rw-default -igt@gem_exec_flush@basic-wb-set-default -igt@gem_exec_gttfill@basic -igt@gem_exec_nop@basic-parallel -igt@gem_exec_nop@basic-series -igt@gem_exec_parallel@basic -igt@gem_exec_parse@basic-allowed -igt@gem_exec_parse@basic-rejected -igt@gem_exec_reloc@basic-cpu -igt@gem_exec_reloc@basic-gtt -igt@gem_exec_reloc@basic-cpu-gtt -igt@gem_exec_reloc@basic-gtt-cpu -igt@gem_exec_reloc@basic-cpu-read -igt@gem_exec_reloc@basic-gtt-read -igt@gem_exec_reloc@basic-write-cpu -igt@gem_exec_reloc@basic-write-gtt -igt@gem_exec_reloc@basic-write-read -igt@gem_exec_reloc@basic-cpu-noreloc -igt@gem_exec_reloc@basic-gtt-noreloc -igt@gem_exec_reloc@basic-cpu-gtt-noreloc -igt@gem_exec_reloc@basic-gtt-cpu-noreloc -igt@gem_exec_reloc@basic-cpu-read-noreloc -igt@gem_exec_reloc@basic-gtt-read-noreloc -igt@gem_exec_reloc@basic-write-cpu-noreloc -igt@gem_exec_reloc@basic-write-gtt-noreloc -igt@gem_exec_reloc@basic-write-read-noreloc -igt@gem_exec_reloc@basic-cpu-active -igt@gem_exec_reloc@basic-gtt-active -igt@gem_exec_reloc@basic-cpu-gtt-active -igt@gem_exec_reloc@basic-gtt-cpu-active -igt@gem_exec_reloc@basic-cpu-read-active -igt@gem_exec_reloc@basic-gtt-read-active -igt@gem_exec_reloc@basic-write-cpu-active -igt@gem_exec_reloc@basic-write-gtt-active -igt@gem_exec_reloc@basic-write-read-active -igt@gem_exec_reloc@basic-softpin -igt@gem_exec_store@basic-all -igt@gem_exec_store@basic-blt -igt@gem_exec_store@basic-bsd -igt@gem_exec_store@basic-bsd1 -igt@gem_exec_store@basic-bsd2 -igt@gem_exec_store@basic-default -igt@gem_exec_store@basic-render -igt@gem_exec_store@basic-vebox -igt@gem_exec_suspend@basic -igt@gem_exec_suspend@basic-s3 -igt@gem_exec_suspend@basic-s4-devices -igt@gem_flink_basic@bad-flink -igt@gem_flink_basic@bad-open -igt@gem_flink_basic@basic -igt@gem_flink_basic@double-flink -igt@gem_flink_basic@flink-lifetime -igt@gem_linear_blits@basic -igt@gem_mmap@basic -igt@gem_mmap@basic-small-bo -igt@gem_mmap_gtt@basic -igt@gem_mmap_gtt@basic-copy -igt@gem_mmap_gtt@basic-read -igt@gem_mmap_gtt@basic-read-no-prefault -igt@gem_mmap_gtt@basic-read-write -igt@gem_mmap_gtt@basic-read-write-distinct -igt@gem_mmap_gtt@basic-short -igt@gem_mmap_gtt@basic-small-bo -igt@gem_mmap_gtt@basic-small-bo-tiledx -igt@gem_mmap_gtt@basic-small-bo-tiledy -igt@gem_mm
[Intel-gfx] [PATCH i-g-t 1/2] test/kms_psr_sink_crc - subtests psr_basic and psr_drrs need test cleanup
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104260 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/kms_psr_sink_crc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c index 83a69f0b..26cf434a 100644 --- a/tests/kms_psr_sink_crc.c +++ b/tests/kms_psr_sink_crc.c @@ -532,11 +532,13 @@ int main(int argc, char *argv[]) igt_subtest("psr_basic") { setup_test_plane(); igt_assert(wait_psr_entry()); + test_cleanup(); } igt_subtest("psr_drrs") { setup_test_plane(); igt_assert(drrs_disabled()); + test_cleanup(); } for (op = PAGE_FLIP; op <= RENDER; op++) { -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t 1/2] test/kms_psr_sink_crc - subtests psr_basic and psr_drrs need test cleanup
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104260 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/kms_psr_sink_crc.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c index 83a69f0b..26cf434a 100644 --- a/tests/kms_psr_sink_crc.c +++ b/tests/kms_psr_sink_crc.c @@ -532,11 +532,13 @@ int main(int argc, char *argv[]) igt_subtest("psr_basic") { setup_test_plane(); igt_assert(wait_psr_entry()); + test_cleanup(); } igt_subtest("psr_drrs") { setup_test_plane(); igt_assert(drrs_disabled()); + test_cleanup(); } for (op = PAGE_FLIP; op <= RENDER; op++) { -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] test/kms_psr_sink : HACK test if psr_drrs also need test_cleanup
See previous PW: https://patchwork.freedesktop.org/series/36000/ Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104260 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/intel-ci/fast-feedback.testlist | 575 +- 1 file changed, 288 insertions(+), 287 deletions(-) diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist index f71a16bc..34db4706 100644 --- a/tests/intel-ci/fast-feedback.testlist +++ b/tests/intel-ci/fast-feedback.testlist @@ -1,295 +1,296 @@ # Keep alphabetically sorted by default -igt@core_auth@basic-auth -igt@core_prop_blob@basic -igt@debugfs_test@read_all_entries -igt@drv_getparams_basic@basic-eu-total -igt@drv_getparams_basic@basic-subslice-total -igt@drv_hangman@error-state-basic -igt@gem_basic@bad-close -igt@gem_basic@create-close -igt@gem_basic@create-fd-close -igt@gem_busy@basic-busy-default -igt@gem_busy@basic-hang-default -igt@gem_close_race@basic-process -igt@gem_close_race@basic-threads -igt@gem_cpu_reloc@basic -igt@gem_cs_tlb@basic-default -igt@gem_ctx_create@basic -igt@gem_ctx_create@basic-files -igt@gem_ctx_exec@basic -igt@gem_ctx_param@basic -igt@gem_ctx_param@basic-default -igt@gem_ctx_switch@basic-default -igt@gem_ctx_switch@basic-default-heavy -igt@gem_exec_basic@basic-blt -igt@gem_exec_basic@basic-bsd -igt@gem_exec_basic@basic-bsd1 -igt@gem_exec_basic@basic-bsd2 -igt@gem_exec_basic@basic-default -igt@gem_exec_basic@basic-render -igt@gem_exec_basic@basic-vebox -igt@gem_exec_basic@gtt-blt -igt@gem_exec_basic@gtt-bsd -igt@gem_exec_basic@gtt-bsd1 -igt@gem_exec_basic@gtt-bsd2 -igt@gem_exec_basic@gtt-default -igt@gem_exec_basic@gtt-render -igt@gem_exec_basic@gtt-vebox -igt@gem_exec_basic@readonly-blt -igt@gem_exec_basic@readonly-bsd -igt@gem_exec_basic@readonly-bsd1 -igt@gem_exec_basic@readonly-bsd2 -igt@gem_exec_basic@readonly-default -igt@gem_exec_basic@readonly-render -igt@gem_exec_basic@readonly-vebox -igt@gem_exec_create@basic -igt@gem_exec_fence@basic-busy-default -igt@gem_exec_fence@basic-wait-default -igt@gem_exec_fence@basic-await-default -igt@gem_exec_fence@await-hang-default -igt@gem_exec_fence@nb-await-default -igt@gem_exec_flush@basic-batch-kernel-default-cmd -igt@gem_exec_flush@basic-batch-kernel-default-uc -igt@gem_exec_flush@basic-batch-kernel-default-wb -igt@gem_exec_flush@basic-uc-pro-default -igt@gem_exec_flush@basic-uc-prw-default -igt@gem_exec_flush@basic-uc-ro-default -igt@gem_exec_flush@basic-uc-rw-default -igt@gem_exec_flush@basic-uc-set-default -igt@gem_exec_flush@basic-wb-pro-default -igt@gem_exec_flush@basic-wb-prw-default -igt@gem_exec_flush@basic-wb-ro-before-default -igt@gem_exec_flush@basic-wb-ro-default -igt@gem_exec_flush@basic-wb-rw-before-default -igt@gem_exec_flush@basic-wb-rw-default -igt@gem_exec_flush@basic-wb-set-default -igt@gem_exec_gttfill@basic -igt@gem_exec_nop@basic-parallel -igt@gem_exec_nop@basic-series -igt@gem_exec_parallel@basic -igt@gem_exec_parse@basic-allowed -igt@gem_exec_parse@basic-rejected -igt@gem_exec_reloc@basic-cpu -igt@gem_exec_reloc@basic-gtt -igt@gem_exec_reloc@basic-cpu-gtt -igt@gem_exec_reloc@basic-gtt-cpu -igt@gem_exec_reloc@basic-cpu-read -igt@gem_exec_reloc@basic-gtt-read -igt@gem_exec_reloc@basic-write-cpu -igt@gem_exec_reloc@basic-write-gtt -igt@gem_exec_reloc@basic-write-read -igt@gem_exec_reloc@basic-cpu-noreloc -igt@gem_exec_reloc@basic-gtt-noreloc -igt@gem_exec_reloc@basic-cpu-gtt-noreloc -igt@gem_exec_reloc@basic-gtt-cpu-noreloc -igt@gem_exec_reloc@basic-cpu-read-noreloc -igt@gem_exec_reloc@basic-gtt-read-noreloc -igt@gem_exec_reloc@basic-write-cpu-noreloc -igt@gem_exec_reloc@basic-write-gtt-noreloc -igt@gem_exec_reloc@basic-write-read-noreloc -igt@gem_exec_reloc@basic-cpu-active -igt@gem_exec_reloc@basic-gtt-active -igt@gem_exec_reloc@basic-cpu-gtt-active -igt@gem_exec_reloc@basic-gtt-cpu-active -igt@gem_exec_reloc@basic-cpu-read-active -igt@gem_exec_reloc@basic-gtt-read-active -igt@gem_exec_reloc@basic-write-cpu-active -igt@gem_exec_reloc@basic-write-gtt-active -igt@gem_exec_reloc@basic-write-read-active -igt@gem_exec_reloc@basic-softpin -igt@gem_exec_store@basic-all -igt@gem_exec_store@basic-blt -igt@gem_exec_store@basic-bsd -igt@gem_exec_store@basic-bsd1 -igt@gem_exec_store@basic-bsd2 -igt@gem_exec_store@basic-default -igt@gem_exec_store@basic-render -igt@gem_exec_store@basic-vebox -igt@gem_exec_suspend@basic -igt@gem_exec_suspend@basic-s3 -igt@gem_exec_suspend@basic-s4-devices -igt@gem_flink_basic@bad-flink -igt@gem_flink_basic@bad-open -igt@gem_flink_basic@basic -igt@gem_flink_basic@double-flink -igt@gem_flink_basic@flink-lifetime -igt@gem_linear_blits@basic -igt@gem_mmap@basic -igt@gem_mmap@basic-small-bo -igt@gem_mmap_gtt@basic -igt@gem_mmap_gtt@basic-copy -igt@gem_mmap_gtt@basic-read -igt@gem_mmap_gtt@basic-read-no-prefault -igt@gem_mmap_gtt@basic-read-write -igt@gem_mmap_gtt@basic-read-write-distinct -igt@gem_mmap_gtt@basic-short -igt@gem_mmap_gtt@basic-small-bo -igt@gem_mmap_gtt@basic-sm
[Intel-gfx] [PATCH i-g-t] test/kms_psr_sink_crc - Hack to test test_cleanup() for psr_basic
The "*ERROR* Potential atomic update failure on pipe A" started to occure on some BAT machines with IGT_4063. Looking at the dmesgs the ERROR print come when the subtest is exiting. So, this is just a longshot to test if we may need to do the cleanup on this subtest as well. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104260 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/kms_psr_sink_crc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/kms_psr_sink_crc.c b/tests/kms_psr_sink_crc.c index 83a69f0b..7ee4c2f4 100644 --- a/tests/kms_psr_sink_crc.c +++ b/tests/kms_psr_sink_crc.c @@ -532,6 +532,7 @@ int main(int argc, char *argv[]) igt_subtest("psr_basic") { setup_test_plane(); igt_assert(wait_psr_entry()); + test_cleanup(); } igt_subtest("psr_drrs") { -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2 2/2] HACK to get kms_sysfs_edid_timing run on more machines
Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/intel-ci/fast-feedback.testlist | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist index f71a16bc..a6c3f614 100644 --- a/tests/intel-ci/fast-feedback.testlist +++ b/tests/intel-ci/fast-feedback.testlist @@ -1,5 +1,5 @@ # Keep alphabetically sorted by default - +igt@kms_sysfs_edid_timing igt@core_auth@basic-auth igt@core_prop_blob@basic igt@debugfs_test@read_all_entries -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2 0/2] kms_sysfs_edid timing and hack to run for BAT
It is possoble to get very mysterious results from kms_sysfs_edid timing Since there is no try-bot for IGT I am using IGT PW to get more data. Marta Lofstedt (2): test/kms_sysfs_edid_timing : Increase THRESHOLD_PER_CONNECTOR and THRESHOLD_TOTAL HACK to get kms_sysfs_edid_timing run on more machines tests/intel-ci/fast-feedback.testlist | 2 +- tests/kms_sysfs_edid_timing.c | 14 +++--- 2 files changed, 8 insertions(+), 8 deletions(-) -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2 1/2] test/kms_sysfs_edid_timing : Increase THRESHOLD_PER_CONNECTOR and THRESHOLD_TOTAL
The discussion on how to fix the issues has been stagnant for a long time, see the Bugzilla below and: https://patchwork.freedesktop.org/patch/170429/ After only changing display cable the result of my machine went from always failing to hit a WARN. This is also illustrated on CI-shards, where the shard-apl flip-flop between pass and WARN and the shard-kbl always fail. This made me realize that the THRESHOLD_PER_CONNECTOR also needed to be updated, while previous discussion only touched the THRESHOLD_TOTAL. As discussed in provided links the motivation for this test is to discover big anomalies in edid timings, but with the current tight thresholds we are hitting the issues too often. V2: increased thresholds further after patchwork results. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100047 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/kms_sysfs_edid_timing.c | 14 +++--- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/tests/kms_sysfs_edid_timing.c b/tests/kms_sysfs_edid_timing.c index 12013881..53d96c1c 100644 --- a/tests/kms_sysfs_edid_timing.c +++ b/tests/kms_sysfs_edid_timing.c @@ -26,8 +26,8 @@ #include #include -#define THRESHOLD_PER_CONNECTOR10 -#define THRESHOLD_TOTAL50 +#define THRESHOLD_PER_CONNECTOR20 +#define THRESHOLD_TOTAL150 #define CHECK_TIMES15 IGT_TEST_DESCRIPTION("This check the time we take to read the content of all " @@ -75,21 +75,21 @@ igt_simple_main close(fd); } - igt_debug("%s: mean.max %.2fns, %.2fus, %.2fms, " + igt_info("%s: mean.max %.2fns, %.2fus, %.2fms, " "mean.avg %.2fns, %.2fus, %.2fms\n", de->d_name, mean.max, mean.max / 1e3, mean.max / 1e6, mean.mean, mean.mean / 1e3, mean.mean / 1e6); if (mean.max > (THRESHOLD_PER_CONNECTOR * 1e6)) { - igt_warn("%s: probe time exceed 10ms, " + igt_warn("%s: probe time exceed %ims, " "max=%.2fms, avg=%.2fms\n", de->d_name, -mean.max / 1e6, mean.mean / 1e6); +THRESHOLD_PER_CONNECTOR, mean.max / 1e6, mean.mean / 1e6); } igt_assert_f(mean.mean < (THRESHOLD_TOTAL * 1e6), -"%s: average probe time exceeded 50ms, " +"%s: average probe time exceeded %ims, " "max=%.2fms, avg=%.2fms\n", de->d_name, -mean.max / 1e6, mean.mean / 1e6); +THRESHOLD_TOTAL, mean.max / 1e6, mean.mean / 1e6); } closedir(dirp); -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2 0/2] kms_sysfs_edid timing and hack to run for BAT
It is possoble to get very mysterious results from kms_sysfs_edid timing Since there is no try-bot for IGT I am using IGT PW to get more data. Marta Lofstedt (2): test/kms_sysfs_edid_timing : Increase THRESHOLD_PER_CONNECTOR and THRESHOLD_TOTAL HACK to get kms_sysfs_edid_timing run on more machines tests/intel-ci/fast-feedback.testlist | 2 +- tests/kms_sysfs_edid_timing.c | 14 +++--- 2 files changed, 8 insertions(+), 8 deletions(-) -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] test/kms_sysfs_edid_timing : Increase THRESHOLD_PER_CONNECTOR and THRESHOLD_TOTAL
The discussion on how to fix the issues has been stagnant for a long time, see the Bugzilla below and: https://patchwork.freedesktop.org/patch/170429/ After only changing display cable the result of my machine went from always failing to hit a WARN. This is also illustrated on CI-shards, where the shard-apl flip-flop between pass and WARN and the shard-kbl always fail. This made me realize that the THRESHOLD_PER_CONNECTOR also needed to be updated, while previous discussion only touched the THRESHOLD_TOTAL. As discussed in provided links the motivation for this test is to discover big anomalies in edid timings, but with the current tight thresholds we are hitting the issues too often. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=100047 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/kms_sysfs_edid_timing.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/kms_sysfs_edid_timing.c b/tests/kms_sysfs_edid_timing.c index 12013881..7dbd3fe6 100644 --- a/tests/kms_sysfs_edid_timing.c +++ b/tests/kms_sysfs_edid_timing.c @@ -26,8 +26,8 @@ #include #include -#define THRESHOLD_PER_CONNECTOR10 -#define THRESHOLD_TOTAL50 +#define THRESHOLD_PER_CONNECTOR15 +#define THRESHOLD_TOTAL95 #define CHECK_TIMES15 IGT_TEST_DESCRIPTION("This check the time we take to read the content of all " -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] igt/kms_rotation_crc : Remove flip tests for sprite plane
The kms_rotation_crc@sprite-rotation-*-flip subtests, would need display engine blending to be setup inorder to work in the same manner as the respective tests for the primary plane. Since, it is not the objective of the kms_rotation_crc to test our display blend capabilities, these subtests should be removed. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102691 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/kms_rotation_crc.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/tests/kms_rotation_crc.c b/tests/kms_rotation_crc.c index 21e264ad..064d4293 100644 --- a/tests/kms_rotation_crc.c +++ b/tests/kms_rotation_crc.c @@ -647,9 +647,6 @@ igt_main { DRM_PLANE_TYPE_OVERLAY, IGT_ROTATION_90, 0 }, { DRM_PLANE_TYPE_OVERLAY, IGT_ROTATION_180, 0 }, { DRM_PLANE_TYPE_OVERLAY, IGT_ROTATION_270, 0 }, - { DRM_PLANE_TYPE_OVERLAY, IGT_ROTATION_90, 1 }, - { DRM_PLANE_TYPE_OVERLAY, IGT_ROTATION_180, 1 }, - { DRM_PLANE_TYPE_OVERLAY, IGT_ROTATION_270, 1 }, { DRM_PLANE_TYPE_CURSOR, IGT_ROTATION_180, 0 }, { 0, 0, 0} }; -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915: Increase poll time for BDW FCLK_DONE
During IGT testing it has been shown that the specification defined polling time of 1 us for FCLK_DONE, is sometimes not enough. The issue is still reproducible while disabling C-states through the PM QoS framework and also while disabling preemtion. From this the most plausible explanation is that the issue is due to a firmware flaw. As a workaround, it is better to wait a little bit longer for the FCLK_DONE to come around, than to leave with an DRM_ERROR and having FCLK_DONE at a randome time after. While spinning a list of igt tests prone to reproduce the issue the FCLK_DONE poll failed at approximately 2% of the invocations of the bdw_set_cdclk function. The longest poll time during this testing was measured to ~7us. So, the suggested new poll time of 100us is on the safe side. v2: Added more documentation about investigations done. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102243 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch> --- drivers/gpu/drm/i915/intel_cdclk.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index d32911816fc2..f89232e0f6fa 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -669,8 +669,11 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv, val |= LCPLL_CD_SOURCE_FCLK; I915_WRITE(LCPLL_CTL, val); + /* According to the spec, it should be enough to poll for this 1 us. +* However, extensive testing shows that this can take longer. +*/ if (wait_for_us(I915_READ(LCPLL_CTL) & - LCPLL_CD_SOURCE_FCLK_DONE, 1)) + LCPLL_CD_SOURCE_FCLK_DONE, 100)) DRM_ERROR("Switching to FCLK failed\n"); val = I915_READ(LCPLL_CTL); -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Increase poll time for BDW FCLK_DONE
During IGT testing it has been shown that the specification defined polling time of 1 us for FCLK_DONE, is sometimes not enough. This is most probably due to a firmware flaw. As a workaround, it is better to wait a little bit longer for the FCLK_DONE to come around, than to leave with an DRM_ERROR and having FCLK_DONE at a randome time after. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102243 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- drivers/gpu/drm/i915/intel_cdclk.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c index d32911816fc2..f89232e0f6fa 100644 --- a/drivers/gpu/drm/i915/intel_cdclk.c +++ b/drivers/gpu/drm/i915/intel_cdclk.c @@ -669,8 +669,11 @@ static void bdw_set_cdclk(struct drm_i915_private *dev_priv, val |= LCPLL_CD_SOURCE_FCLK; I915_WRITE(LCPLL_CTL, val); + /* According to the spec, it should be enough to poll for this 1 us. +* However, extensive testing shows that this can take longer. +*/ if (wait_for_us(I915_READ(LCPLL_CTL) & - LCPLL_CD_SOURCE_FCLK_DONE, 1)) + LCPLL_CD_SOURCE_FCLK_DONE, 100)) DRM_ERROR("Switching to FCLK failed\n"); val = I915_READ(LCPLL_CTL); -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] tests/kms_atomic: subtest atomic_invalid_params requires CRTC
Check for valid crtc is missing in igt@kms_atomic@atomic_invalid_params. This leads to segfault on machines where the subtest should be skipped. Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/kms_atomic.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/kms_atomic.c b/tests/kms_atomic.c index d77a526f..042a7c26 100644 --- a/tests/kms_atomic.c +++ b/tests/kms_atomic.c @@ -1596,6 +1596,7 @@ igt_main struct kms_atomic_connector_state *conn = find_connector(scratch, crtc); + igt_require(crtc); igt_require(plane); igt_require(conn); atomic_invalid_params(crtc, plane, conn); -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915: Beef up of Beef up the IPS vs. CRC workaround
Commit 6e644626945c7c1a7f4d4f83b806b898297846d0 was supposed to solve below bug. However, the patch I tested is not the same as the one that got merged. With this addition the test pass. V2: removed unused: "struct intel_crtc *intel_crtc" Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101664 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- drivers/gpu/drm/i915/intel_pipe_crc.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c index 4e22bb927fed..96043a51c1bf 100644 --- a/drivers/gpu/drm/i915/intel_pipe_crc.c +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c @@ -919,7 +919,6 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name, { struct drm_i915_private *dev_priv = crtc->dev->dev_private; struct intel_pipe_crc *pipe_crc = _priv->pipe_crc[crtc->index]; - struct intel_crtc *intel_crtc = to_intel_crtc(crtc); enum intel_display_power_domain power_domain; enum intel_pipe_crc_source source; u32 val = 0; /* shut up gcc */ @@ -951,8 +950,6 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name, else if ((IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) && crtc->index == PIPE_A) hsw_pipe_A_crc_wa(dev_priv, false); - - hsw_enable_ips(intel_crtc); } pipe_crc->skipped = 0; -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Beef up of Beef up the IPS vs. CRC workaround
Commit 6e644626945c7c1a7f4d4f83b806b898297846d0 was supposed to solve below bug. However, the patch I tested is not the same as the one that got merged. With this addition the test pass. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101664 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- drivers/gpu/drm/i915/intel_pipe_crc.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pipe_crc.c b/drivers/gpu/drm/i915/intel_pipe_crc.c index 4e22bb927fed..f79f9a42798d 100644 --- a/drivers/gpu/drm/i915/intel_pipe_crc.c +++ b/drivers/gpu/drm/i915/intel_pipe_crc.c @@ -951,8 +951,6 @@ int intel_crtc_set_crc_source(struct drm_crtc *crtc, const char *source_name, else if ((IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) && crtc->index == PIPE_A) hsw_pipe_A_crc_wa(dev_priv, false); - - hsw_enable_ips(intel_crtc); } pipe_crc->skipped = 0; -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2] tests/kms_frontbuffer_tracking: increase FBC wait timeout to 5s
From: "Lofstedt, Marta" <marta.lofst...@intel.com> The subtests: igt@kms_frontbuffer_tracking@fbc-*draw* has non-consistent results, pending between fail and pass. The fails are always due to "FBC disabled". With this increase in timeout the flip-flop behavior is no longer reproducible. This is a partial revert of: 64590c7b768dc8d8dd962f812d5ff5a39e7e8b54, where the timeout was decreased from 5s to 2s. After investigating the timeout needed, the conclusion is that the longer timeout is only needed when the test swaps between some specific draw domains, typically blt vs. mmap_cpu. The objective of the FBC part of the tests is not to benchmark draw domain changes, it is to check that FBC was (re-)enabled. V2: Added documentation Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101623 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> Acked-by: Paulo Zanoni <paulo.r.zan...@intel.com> --- tests/kms_frontbuffer_tracking.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c index e03524f1..2538450c 100644 --- a/tests/kms_frontbuffer_tracking.c +++ b/tests/kms_frontbuffer_tracking.c @@ -924,7 +924,7 @@ static bool fbc_stride_not_supported(void) static bool fbc_wait_until_enabled(void) { - return igt_wait(fbc_is_enabled(), 2000, 1); + return igt_wait(fbc_is_enabled(), 5000, 1); } static bool psr_wait_until_enabled(void) -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] tests/kms_frontbuffer_tracking: increase FBC wait timeout to 5s
The subtests: igt@kms_frontbuffer_tracking@fbc-*draw* has non-consistent results, pending between fail and pass. The fails are always due to "FBC disabled". With this increase in timeout the flip-flop behavior is no longer reproducible. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101623 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/kms_frontbuffer_tracking.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c index c24e4a81..8bec5d5a 100644 --- a/tests/kms_frontbuffer_tracking.c +++ b/tests/kms_frontbuffer_tracking.c @@ -923,7 +923,7 @@ static bool fbc_stride_not_supported(void) static bool fbc_wait_until_enabled(void) { - return igt_wait(fbc_is_enabled(), 2000, 1); + return igt_wait(fbc_is_enabled(), 5000, 1); } static bool psr_wait_until_enabled(void) -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] tests/initial_state: Add a test to capture the state of the GPU
When running testlist for CI iot would be good to know if the state of the GPU is as expected. This adds a subtest to check if the GPU is wedged. Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/Makefile.sources| 1 + tests/initial_state.c | 52 +++ tests/intel-ci/extended.testlist | 1 + tests/intel-ci/fast-feedback.testlist | 1 + 4 files changed, 55 insertions(+) create mode 100644 tests/initial_state.c diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 9553e4d9..32431a05 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -152,6 +152,7 @@ TESTS_progs_M = \ vgem_basic \ vgem_slow \ meta_test \ + initial_state \ $(NULL) if HAVE_CHAMELIUM diff --git a/tests/initial_state.c b/tests/initial_state.c new file mode 100644 index ..1c5d9a74 --- /dev/null +++ b/tests/initial_state.c @@ -0,0 +1,52 @@ +/* + * Copyright © 2017 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include +#include +#include "igt.h" + +/* + * The purpose of this test is to capture the + * state of the GPU before running a testlist. + * + * Note, this test currently only checks if + * i915 is wedged. But, it could be extended to report + * on other bad initial states. + */ + +static void is_wedged(void) +{ + char buf[128]; + int fd = drm_open_driver(DRIVER_INTEL); + + igt_debugfs_read(fd, "i915_wedged", buf); + igt_assert(!strstr(buf, "1")); +} + +igt_main +{ + + igt_subtest("is_wedged") + is_wedged(); +} diff --git a/tests/intel-ci/extended.testlist b/tests/intel-ci/extended.testlist index a16c9c84..2ec08b55 100644 --- a/tests/intel-ci/extended.testlist +++ b/tests/intel-ci/extended.testlist @@ -1,3 +1,4 @@ +igt@initial_state@is_wedged igt@core_auth@many-magics igt@core_getclient igt@core_get_client_auth@master-drop diff --git a/tests/intel-ci/fast-feedback.testlist b/tests/intel-ci/fast-feedback.testlist index 5ffa2cef..a6a0a810 100644 --- a/tests/intel-ci/fast-feedback.testlist +++ b/tests/intel-ci/fast-feedback.testlist @@ -1,3 +1,4 @@ +igt@initial_state@is_wedged igt@core_auth@basic-auth igt@core_prop_blob@basic igt@drv_getparams_basic@basic-eu-total -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t] igt/meta_test: Fix dmesg-warn test
Add bracket to match with piglit dmesg filter. Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/meta_test.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tests/meta_test.c b/tests/meta_test.c index e09efba0..c02cf8bc 100644 --- a/tests/meta_test.c +++ b/tests/meta_test.c @@ -97,9 +97,9 @@ static void test_result(bool result) static void test_dmesg(bool pass) { if (pass) - kmsg(KERN_DEBUG "drm: IGT inserted string."); + kmsg(KERN_DEBUG "[drm: IGT inserted string."); else - kmsg(KERN_WARNING "drm: IGT inserted string."); + kmsg(KERN_WARNING "[drm: IGT inserted string."); } static void test_user_crash(void) -- 2.11.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH i-g-t v2] tests/meta_test: Add a meta test for sanity checks of CI systems
From: Marta Löfstedt <marta.lofst...@intel.com> The intention of this test is use it to test that the CI system that runs IGT is collecting the results correctly. For: VIZ-10281 v2: minor edits Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> Reviewed-by: Petri Latvala <petri.latv...@intel.com> --- tests/Makefile.sources | 1 + tests/intel-ci/meta.testlist | 7 ++ tests/meta_test.c| 149 +++ 3 files changed, 157 insertions(+) create mode 100644 tests/intel-ci/meta.testlist create mode 100644 tests/meta_test.c diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 45c21a0c..7fa9b8f2 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -143,6 +143,7 @@ TESTS_progs_M = \ template \ vgem_basic \ vgem_slow \ + meta_test \ $(NULL) if HAVE_CHAMELIUM diff --git a/tests/intel-ci/meta.testlist b/tests/intel-ci/meta.testlist new file mode 100644 index ..b3e29235 --- /dev/null +++ b/tests/intel-ci/meta.testlist @@ -0,0 +1,7 @@ +igt@meta_test@pass-result +igt@meta_test@fail-result +igt@meta_test@dmesg-pass +igt@meta_test@dmesg-warn +igt@meta_test@user-crash +igt@meta_test@piglit-timeout +igt@meta_test@generate-panic diff --git a/tests/meta_test.c b/tests/meta_test.c new file mode 100644 index ..e09efba0 --- /dev/null +++ b/tests/meta_test.c @@ -0,0 +1,149 @@ +/* + * Copyright © 2017 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include +#include +#include "igt.h" + +/* + * The purpose of this test is to test the CI system that we have + * for running the tests. The test should generate all possible + * exit states for igt tests. + * + * Possible exit-states of igt tests: + * 1. pass - subtest: pass-result + * 2. fail - subtest: fail-result + * 3. dmesg warn - subtest: dmesg-pass + * - subtest: dmesg-warn + * The purpose is to check that certain kernel log activity + * gets correctly reported in the test result, and that normal + * activity doesn't. + * 4. crash - subtest: user-crash + * 5. piglit timeout - subtest: piglit-timeout + * 6. incomplete - subtest: generate-panic + * NOTE: inorder for this to generate the incomplete state + * the kernel must be configured to reboot on panic. + * NOTE: if the tested CI system have features such as + * PSTORE and/or kexec/kdump enabled. This test could be + * used to make sure that the CI system stores the generated + * log/dumps as expected. + * 7. incomplete - where user hang is not caught by piglit timeout. + * This would be caught by a user-side softdog daemon, + * such as owatch by ezbench. However, I don't know + * how to trigger this state, so it will not be tested. + * 8. incomplete - system requires hard reboot : + * This state could be triggered by calling an evil kernel + * module that was developed hang the system. Such + * a module will not be developed for this purpose, + * so this "exit state" will not be tested. + * + * TODO: If this test was deployed on a CI system that + * was able to pick up testing again after reboot, + * such as ezbench, a post-analyze test should be added + * that collected and analyzed the result of the tests + * run before reboot. + */ + +__attribute__((format(printf, 1, 2))) +static void kmsg(const char *format, ...) +#define KERN_EMER "<0>" +#define KERN_ALERT "<1>" +#define KERN_CRIT "<2>" +#define KERN_ERR "<3>" +#define KERN_WARNING "<4>" +#define KERN_NOTICE"<5>" +#define KERN_INFO "<6>" +#define KERN_DEBUG "<7>" +{ + va_list ap; + FILE *file; + + fil
[Intel-gfx] [PATCH i-g-t] tests/meta_test: Add a meta test for sanity checks of CI systems
The intention of this test is use it to test that the CI system that runs IGT is collecting the results correctly. For: VIZ-10281 Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/Makefile.sources | 1 + tests/intel-ci/meta.testlist | 7 +++ tests/meta_test.c| 145 +++ 3 files changed, 153 insertions(+) create mode 100644 tests/intel-ci/meta.testlist create mode 100644 tests/meta_test.c diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 45c21a0..7fa9b8f 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -143,6 +143,7 @@ TESTS_progs_M = \ template \ vgem_basic \ vgem_slow \ + meta_test \ $(NULL) if HAVE_CHAMELIUM diff --git a/tests/intel-ci/meta.testlist b/tests/intel-ci/meta.testlist new file mode 100644 index 000..b3e2923 --- /dev/null +++ b/tests/intel-ci/meta.testlist @@ -0,0 +1,7 @@ +igt@meta_test@pass-result +igt@meta_test@fail-result +igt@meta_test@dmesg-pass +igt@meta_test@dmesg-warn +igt@meta_test@user-crash +igt@meta_test@piglit-timeout +igt@meta_test@generate-panic diff --git a/tests/meta_test.c b/tests/meta_test.c new file mode 100644 index 000..8a420ba --- /dev/null +++ b/tests/meta_test.c @@ -0,0 +1,145 @@ +/* + * Copyright © 2017 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + */ + +#include +#include +#include "igt.h" + +/* + * The purpose of this test is to test the CI system that we have + * for running the tests. The test should generate all possible + * exit states for igt tests. + * + * Possible exit-states of igt tests: + * 1. pass - subtest: pass-result + * 2. fail - subtest: fail-result + * 3. dmesg warn - subtest: dmesg-fail, + * subtest: dmesg-pass is a sanity check for the dmesg-fail. + * 4. crash - subtest: user-crash + * 5. piglit timeout - subtest: piglit-timeout + * 6. incomplete - subtest: generate-panic + * NOTE: inorder for this to generate the incomplete state + * the kernel must be configured to reboot on panic. + * NOTE: if the tested CI system have features such as + * PSTORE and/or kexec/kdump enabled. This test could be + * used to make sure that the CI system stores the generated + * log/dumps as expected. + * 7. incomplete - where user hang is not caught by piglit timeout. + * This would be caught by a user-side softdog daemon, + * such as owatch by ezbench. However, I don't know + * how to trigger this state, so it will not be tested. + * 8. incomplete - system requires hard reboot : + * This state could be triggered by calling an evil kernel + * module that was developed hang the system. Such + * a module will not be developed for this purpose, + * so this "exit state" will not be tested. + * + * TODO: If this test was deployed on a CI system that + * was able to pick up testing again after reboot, + * such as ezbench, a post-analyze test should be added + * that collected and analyzed the result of the tests + * run before reboot. + */ + +__attribute__((format(printf, 1, 2))) +static void kmsg(const char *format, ...) +#define KERN_EMER"<0>" +#define KERN_ALERT"<1>" +#define KERN_CRIT"<2>" +#define KERN_ERR"<3>" +#define KERN_WARNING"<4>" +#define KERN_NOTICE"<5>" +#define KERN_INFO"<6>" +#define KERN_DEBUG"<7>" +{ + va_list ap; + FILE *file; + + file = fopen("/dev/kmsg", "w"); + if (file == NULL) + return; + + va_start(ap, format); + vfprintf(file, format, ap); + va_end(ap); + fclose(file); +} + +static void test_result(bool result) +{ + igt_assert_eq(result, true); +} + +static void
[Intel-gfx] [PATCH RFC i-g-t] igt: Add a dpms property test
This testcase will set the dpms drm property to DRM_MODE_DPMS_ON and DPMS_MODE_OFF and check that the property values was updated and that the new state corresponds to the crtc active property. Signed-off-by: Marta Lofstedt <marta.lofst...@intel.com> --- tests/Makefile.sources | 1 + tests/drm_dpms.c | 168 + 2 files changed, 169 insertions(+) create mode 100644 tests/drm_dpms.c diff --git a/tests/Makefile.sources b/tests/Makefile.sources index 04dd2d5..6d6e3db 100644 --- a/tests/Makefile.sources +++ b/tests/Makefile.sources @@ -14,6 +14,7 @@ VC4_TESTS_M = \ TESTS_progs_M = \ core_get_client_auth \ drm_mm \ + drm_dpms \ drv_getparams_basic \ drv_selftest \ drv_suspend \ diff --git a/tests/drm_dpms.c b/tests/drm_dpms.c new file mode 100644 index 000..0175e7b --- /dev/null +++ b/tests/drm_dpms.c @@ -0,0 +1,168 @@ +/* + * Copyright © 2016 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + */ + +#include "igt.h" + +static void prepare_pipe(igt_display_t *display, enum pipe pipe, +igt_output_t *output, struct igt_fb *fb) +{ + drmModeModeInfo *mode = igt_output_get_mode(output); + + igt_create_pattern_fb(display->drm_fd, + mode->hdisplay, + mode->vdisplay, + DRM_FORMAT_XRGB, + LOCAL_DRM_FORMAT_MOD_NONE, + fb); + + igt_output_set_pipe(output, pipe); + + igt_plane_set_fb(igt_output_get_plane(output, IGT_PLANE_PRIMARY), fb); + + igt_display_commit2(display, + display->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY); +} + +static void cleanup_pipe(igt_display_t *display, enum pipe pipe, +igt_output_t *output, struct igt_fb *fb) +{ + igt_plane_t *plane; + + for_each_plane_on_pipe(display, pipe, plane) + igt_plane_set_fb(plane, NULL); + + igt_output_set_pipe(output, PIPE_NONE); + + igt_display_commit2(display, + display->is_atomic ? COMMIT_ATOMIC : COMMIT_LEGACY); + + igt_remove_fb(display->drm_fd, fb); +} + +static void test_dpms(igt_display_t *display, drmModeConnector *connector, + int crtc_id) +{ + uint64_t dpms_state, active; + + kmstest_get_property(display->drm_fd, connector->connector_id, +DRM_MODE_OBJECT_CONNECTOR, "DPMS", +NULL, _state, NULL); + + if (dpms_state == DRM_MODE_DPMS_OFF) { + kmstest_set_connector_dpms(display->drm_fd, connector, + DRM_MODE_DPMS_ON); + kmstest_get_property(display->drm_fd, connector->connector_id, +DRM_MODE_OBJECT_CONNECTOR, "DPMS", +NULL, _state, NULL); + igt_assert_eq(dpms_state, DRM_MODE_DPMS_ON); + kmstest_get_property(display->drm_fd, crtc_id, +DRM_MODE_OBJECT_CRTC, "ACTIVE", +NULL, , NULL); + igt_assert(active); + } else { + kmstest_set_connector_dpms(display->drm_fd, connector, + DRM_MODE_DPMS_OFF); + kmstest_get_property(display->drm_fd, connector->connector_id, +DRM_MODE_OBJECT_CONNECTOR, "DPMS", +NULL, _state, NULL); + igt_assert_eq(dpms_state, DRM_MODE_DPMS_OFF); + kmstest_get_property(display->drm_fd, crtc_id, +