[Intel-gfx] [PATCH 1/1] drm/i915/guc: Convert slpc to iosys_map
From: Siva Mullati
Convert slpc shared data to use iosys_map rather than
plain pointer and save it in the intel_guc_slpc struct.
This will help with in read and update slpc shared data
after the slpc init by abstracting the IO vs system memory.
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 82 +++
.../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 5 +-
2 files changed, 50 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
index 1db833da42df..ee9fd8e7f1d4 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
@@ -14,6 +14,13 @@
#include "gt/intel_gt_regs.h"
#include "gt/intel_rps.h"
+#define slpc_blob_read(slpc_, field_) \
+ iosys_map_rd_field(&(slpc_)->slpc_map, 0, \
+ struct slpc_shared_data, field_)
+#define slpc_blob_write(slpc_, field_, val_) \
+ iosys_map_wr_field(&(slpc_)->slpc_map, 0, \
+ struct slpc_shared_data, field_, val_)
+
static inline struct intel_guc *slpc_to_guc(struct intel_guc_slpc *slpc)
{
return container_of(slpc, struct intel_guc, slpc);
@@ -52,50 +59,51 @@ void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc)
slpc->selected = __guc_slpc_selected(guc);
}
-static void slpc_mem_set_param(struct slpc_shared_data *data,
+static void slpc_mem_set_param(struct intel_guc_slpc *slpc,
u32 id, u32 value)
{
+ u32 bits = slpc_blob_read(slpc, override_params.bits[id >> 5]);
+
GEM_BUG_ON(id >= SLPC_MAX_OVERRIDE_PARAMETERS);
/*
* When the flag bit is set, corresponding value will be read
* and applied by SLPC.
*/
- data->override_params.bits[id >> 5] |= (1 << (id % 32));
- data->override_params.values[id] = value;
+ bits |= (1 << (id % 32));
+ slpc_blob_write(slpc, override_params.bits[id >> 5], bits);
+ slpc_blob_write(slpc, override_params.values[id], value);
}
-static void slpc_mem_set_enabled(struct slpc_shared_data *data,
+static void slpc_mem_set_enabled(struct intel_guc_slpc *slpc,
u8 enable_id, u8 disable_id)
{
/*
* Enabling a param involves setting the enable_id
* to 1 and disable_id to 0.
*/
- slpc_mem_set_param(data, enable_id, 1);
- slpc_mem_set_param(data, disable_id, 0);
+ slpc_mem_set_param(slpc, enable_id, 1);
+ slpc_mem_set_param(slpc, disable_id, 0);
}
-static void slpc_mem_set_disabled(struct slpc_shared_data *data,
+static void slpc_mem_set_disabled(struct intel_guc_slpc *slpc,
u8 enable_id, u8 disable_id)
{
/*
* Disabling a param involves setting the enable_id
* to 0 and disable_id to 1.
*/
- slpc_mem_set_param(data, disable_id, 1);
- slpc_mem_set_param(data, enable_id, 0);
+ slpc_mem_set_param(slpc, disable_id, 1);
+ slpc_mem_set_param(slpc, enable_id, 0);
}
static u32 slpc_get_state(struct intel_guc_slpc *slpc)
{
- struct slpc_shared_data *data;
-
GEM_BUG_ON(!slpc->vma);
- drm_clflush_virt_range(slpc->vaddr, sizeof(u32));
- data = slpc->vaddr;
+ if (!slpc->slpc_map.is_iomem)
+ drm_clflush_virt_range(slpc->slpc_map.vaddr, sizeof(u32));
- return data->header.global_state;
+ return slpc_blob_read(slpc, header.global_state);
}
static int guc_action_slpc_set_param(struct intel_guc *guc, u8 id, u32 value)
@@ -156,7 +164,9 @@ static int slpc_query_task_state(struct intel_guc_slpc
*slpc)
i915_probe_error(i915, "Failed to query task state (%pe)\n",
ERR_PTR(ret));
- drm_clflush_virt_range(slpc->vaddr, SLPC_PAGE_SIZE_BYTES);
+ if (!slpc->slpc_map.is_iomem)
+ drm_clflush_virt_range(slpc->slpc_map.vaddr,
+ SLPC_PAGE_SIZE_BYTES);
return ret;
}
@@ -243,10 +253,11 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc)
struct drm_i915_private *i915 = slpc_to_i915(slpc);
u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
int err;
+ void *vaddr;
GEM_BUG_ON(slpc->vma);
- err = intel_guc_allocate_and_map_vma(guc, size, &slpc->vma, (void
**)&slpc->vaddr);
+ err = intel_guc_allocate_and_map_vma(guc, size, &slpc->vma, (void
**)&vaddr);
if (unlikely(err)) {
i915_probe_error(i915,
"Failed to allocate SLPC struct (err=%pe)\n",
@@ -254,6 +265,12 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc)
return err;
}
+ if (i915_gem_object_is_lmem(slpc->vma->obj))
+ iosys_map_set_vaddr_iomem(&slpc->slpc_map,
+ (vo
[Intel-gfx] [PATCH 0/1] drm/i915/guc: Refactor slpc shared data access to use iosys_map
From: Siva Mullati Ver2: remove accessing drm_cflush for io memory This is continuation to the original patch series to use iosys map APIs to use slpc shared data commands and descriptors. https://patchwork.freedesktop.org/series/99711/ Siva Mullati (1): drm/i915/guc: Convert slpc to iosys_map drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 82 +++ .../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 5 +- 2 files changed, 50 insertions(+), 37 deletions(-) -- 2.33.0
[Intel-gfx] [PATCH 1/1] drm/i915/guc: Convert ct buffer to iosys_map
From: Siva Mullati
Convert CT commands and descriptors to use iosys_map rather
than plain pointer and save it in the intel_guc_ct_buffer struct.
This will help with ct_write and ct_read for cmd send and receive
after the initialization by abstracting the IO vs system memory.
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 195 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +-
2 files changed, 122 insertions(+), 82 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f01325cd1b62..bd5b4312d968 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -44,6 +44,11 @@ static inline struct drm_device *ct_to_drm(struct
intel_guc_ct *ct)
#define CT_PROBE_ERROR(_ct, _fmt, ...) \
i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__)
+#define ct_desc_read(desc_map_, field_) \
+ iosys_map_rd_field(desc_map_, 0, struct guc_ct_buffer_desc, field_)
+#define ct_desc_write(desc_map_, field_, val_) \
+ iosys_map_wr_field(desc_map_, 0, struct guc_ct_buffer_desc, field_,
val_)
+
/**
* DOC: CTB Blob
*
@@ -76,6 +81,11 @@ static inline struct drm_device *ct_to_drm(struct
intel_guc_ct *ct)
#define CTB_G2H_BUFFER_SIZE(4 * CTB_H2G_BUFFER_SIZE)
#define G2H_ROOM_BUFFER_SIZE (CTB_G2H_BUFFER_SIZE / 4)
+#define CTB_SEND_DESC_OFFSET 0u
+#define CTB_RECV_DESC_OFFSET (CTB_DESC_SIZE)
+#define CTB_SEND_CMDS_OFFSET (2 * CTB_DESC_SIZE)
+#define CTB_RECV_CMDS_OFFSET (2 * CTB_DESC_SIZE + CTB_H2G_BUFFER_SIZE)
+
struct ct_request {
struct list_head link;
u32 fence;
@@ -113,9 +123,9 @@ void intel_guc_ct_init_early(struct intel_guc_ct *ct)
init_waitqueue_head(&ct->wq);
}
-static void guc_ct_buffer_desc_init(struct guc_ct_buffer_desc *desc)
+static void guc_ct_buffer_desc_init(struct iosys_map *desc)
{
- memset(desc, 0, sizeof(*desc));
+ iosys_map_memset(desc, 0, 0, sizeof(struct guc_ct_buffer_desc));
}
static void guc_ct_buffer_reset(struct intel_guc_ct_buffer *ctb)
@@ -128,17 +138,18 @@ static void guc_ct_buffer_reset(struct
intel_guc_ct_buffer *ctb)
space = CIRC_SPACE(ctb->tail, ctb->head, ctb->size) - ctb->resv_space;
atomic_set(&ctb->space, space);
- guc_ct_buffer_desc_init(ctb->desc);
+ guc_ct_buffer_desc_init(&ctb->desc_map);
}
static void guc_ct_buffer_init(struct intel_guc_ct_buffer *ctb,
- struct guc_ct_buffer_desc *desc,
- u32 *cmds, u32 size_in_bytes, u32 resv_space)
+ struct iosys_map *desc,
+ struct iosys_map *cmds,
+ u32 size_in_bytes, u32 resv_space)
{
GEM_BUG_ON(size_in_bytes % 4);
- ctb->desc = desc;
- ctb->cmds = cmds;
+ ctb->desc_map = *desc;
+ ctb->cmds_map = *cmds;
ctb->size = size_in_bytes / 4;
ctb->resv_space = resv_space / 4;
@@ -218,12 +229,13 @@ static int ct_register_buffer(struct intel_guc_ct *ct,
bool send,
int intel_guc_ct_init(struct intel_guc_ct *ct)
{
struct intel_guc *guc = ct_to_guc(ct);
- struct guc_ct_buffer_desc *desc;
+ struct iosys_map blob_map;
+ struct iosys_map desc_map;
+ struct iosys_map cmds_map;
u32 blob_size;
u32 cmds_size;
u32 resv_space;
void *blob;
- u32 *cmds;
int err;
err = i915_inject_probe_error(guc_to_gt(guc)->i915, -ENXIO);
@@ -242,27 +254,35 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma),
blob_size);
- /* store pointers to desc and cmds for send ctb */
- desc = blob;
- cmds = blob + 2 * CTB_DESC_SIZE;
+ if (i915_gem_object_is_lmem(ct->vma->obj))
+ iosys_map_set_vaddr_iomem(&blob_map,
+ (void __iomem *)blob);
+ else
+ iosys_map_set_vaddr(&blob_map, blob);
+
+ /* store sysmap to desc_map and cmds_map for send ctb */
+ desc_map = IOSYS_MAP_INIT_OFFSET(&blob_map, CTB_SEND_DESC_OFFSET);
+ cmds_map = IOSYS_MAP_INIT_OFFSET(&blob_map, CTB_SEND_CMDS_OFFSET);
cmds_size = CTB_H2G_BUFFER_SIZE;
resv_space = 0;
- CT_DEBUG(ct, "%s desc %#tx cmds %#tx size %u/%u\n", "send",
-ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size,
-resv_space);
+ CT_DEBUG(ct, "%s desc %#x cmds %#x size %u/%u\n", "send",
+CTB_SEND_DESC_OFFSET, (u32)CTB_SEND_CMDS_OFFSET,
+cmds_size, resv_space);
- guc_ct_buffer_init(&ct->ctbs.send, desc, cmds, cmds_size, resv_space);
+ guc_ct_buffer_init(&ct->ctbs.send,
+ &desc_map, &cmds_map, cmds_size, resv_space);
- /* store pointers to desc and cmds for recv ctb */
-
[Intel-gfx] [PATCH 0/1] drm/i915/guc: Refactor CT access to use iosys_map
From: Siva Mullati ver2: remove newly added iosys map api from ver1 ver3: address review comments ver4: remove accessing vaddr This is continuation to the below patch series to use iosys map APIs, to use CT commands and descriptors. https://patchwork.freedesktop.org/series/99711/ Siva Mullati (1): drm/i915/guc: Convert ct buffer to iosys_map drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 195 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +- 2 files changed, 122 insertions(+), 82 deletions(-) -- 2.33.0
[Intel-gfx] [PATCH 1/1] drm/i915/guc: Convert ct buffer to iosys_map
From: Siva Mullati
Convert CT commands and descriptors to use iosys_map rather
than plain pointer and save it in the intel_guc_ct_buffer struct.
This will help with ct_write and ct_read for cmd send and receive
after the initialization by abstracting the IO vs system memory.
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 197 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +-
2 files changed, 124 insertions(+), 82 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f01325cd1b62..5bd03d3112f7 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -44,6 +44,11 @@ static inline struct drm_device *ct_to_drm(struct
intel_guc_ct *ct)
#define CT_PROBE_ERROR(_ct, _fmt, ...) \
i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__)
+#define ct_desc_read(desc_map_, field_) \
+ iosys_map_rd_field(desc_map_, 0, struct guc_ct_buffer_desc, field_)
+#define ct_desc_write(desc_map_, field_, val_) \
+ iosys_map_wr_field(desc_map_, 0, struct guc_ct_buffer_desc, field_,
val_)
+
/**
* DOC: CTB Blob
*
@@ -76,6 +81,11 @@ static inline struct drm_device *ct_to_drm(struct
intel_guc_ct *ct)
#define CTB_G2H_BUFFER_SIZE(4 * CTB_H2G_BUFFER_SIZE)
#define G2H_ROOM_BUFFER_SIZE (CTB_G2H_BUFFER_SIZE / 4)
+#define CTB_SEND_DESC_OFFSET 0u
+#define CTB_RECV_DESC_OFFSET (CTB_DESC_SIZE)
+#define CTB_SEND_CMDS_OFFSET (2 * CTB_DESC_SIZE)
+#define CTB_RECV_CMDS_OFFSET (2 * CTB_DESC_SIZE + CTB_H2G_BUFFER_SIZE)
+
struct ct_request {
struct list_head link;
u32 fence;
@@ -113,9 +123,9 @@ void intel_guc_ct_init_early(struct intel_guc_ct *ct)
init_waitqueue_head(&ct->wq);
}
-static void guc_ct_buffer_desc_init(struct guc_ct_buffer_desc *desc)
+static void guc_ct_buffer_desc_init(struct iosys_map *desc)
{
- memset(desc, 0, sizeof(*desc));
+ iosys_map_memset(desc, 0, 0, sizeof(struct guc_ct_buffer_desc));
}
static void guc_ct_buffer_reset(struct intel_guc_ct_buffer *ctb)
@@ -128,17 +138,18 @@ static void guc_ct_buffer_reset(struct
intel_guc_ct_buffer *ctb)
space = CIRC_SPACE(ctb->tail, ctb->head, ctb->size) - ctb->resv_space;
atomic_set(&ctb->space, space);
- guc_ct_buffer_desc_init(ctb->desc);
+ guc_ct_buffer_desc_init(&ctb->desc_map);
}
static void guc_ct_buffer_init(struct intel_guc_ct_buffer *ctb,
- struct guc_ct_buffer_desc *desc,
- u32 *cmds, u32 size_in_bytes, u32 resv_space)
+ struct iosys_map *desc,
+ struct iosys_map *cmds,
+ u32 size_in_bytes, u32 resv_space)
{
GEM_BUG_ON(size_in_bytes % 4);
- ctb->desc = desc;
- ctb->cmds = cmds;
+ ctb->desc_map = *desc;
+ ctb->cmds_map = *cmds;
ctb->size = size_in_bytes / 4;
ctb->resv_space = resv_space / 4;
@@ -218,12 +229,13 @@ static int ct_register_buffer(struct intel_guc_ct *ct,
bool send,
int intel_guc_ct_init(struct intel_guc_ct *ct)
{
struct intel_guc *guc = ct_to_guc(ct);
- struct guc_ct_buffer_desc *desc;
+ struct iosys_map blob_map;
+ struct iosys_map desc_map;
+ struct iosys_map cmds_map;
u32 blob_size;
u32 cmds_size;
u32 resv_space;
void *blob;
- u32 *cmds;
int err;
err = i915_inject_probe_error(guc_to_gt(guc)->i915, -ENXIO);
@@ -242,27 +254,35 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma),
blob_size);
- /* store pointers to desc and cmds for send ctb */
- desc = blob;
- cmds = blob + 2 * CTB_DESC_SIZE;
+ if (i915_gem_object_is_lmem(ct->vma->obj))
+ iosys_map_set_vaddr_iomem(&blob_map,
+ (void __iomem *)blob);
+ else
+ iosys_map_set_vaddr(&blob_map, blob);
+
+ /* store sysmap to desc_map and cmds_map for send ctb */
+ desc_map = IOSYS_MAP_INIT_OFFSET(&blob_map, CTB_SEND_DESC_OFFSET);
+ cmds_map = IOSYS_MAP_INIT_OFFSET(&blob_map, CTB_SEND_CMDS_OFFSET);
cmds_size = CTB_H2G_BUFFER_SIZE;
resv_space = 0;
- CT_DEBUG(ct, "%s desc %#tx cmds %#tx size %u/%u\n", "send",
-ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size,
-resv_space);
+ CT_DEBUG(ct, "%s desc %#x cmds %#x size %u/%u\n", "send",
+CTB_SEND_DESC_OFFSET, (u32)CTB_SEND_CMDS_OFFSET,
+cmds_size, resv_space);
- guc_ct_buffer_init(&ct->ctbs.send, desc, cmds, cmds_size, resv_space);
+ guc_ct_buffer_init(&ct->ctbs.send,
+ &desc_map, &cmds_map, cmds_size, resv_space);
- /* store pointers to desc and cmds for recv ctb */
-
[Intel-gfx] [PATCH 0/1] Refactor CT access to use iosys_map
From: Siva Mullati ver2: remove newly added iosys map api from ver1 ver3: address review comments ver4: remove accessing vaddr This is continuation to the below patch series to use iosys map APIs, to use CT commands and descriptors. https://patchwork.freedesktop.org/series/99711/ Siva Mullati (1): drm/i915/guc: Convert ct buffer to iosys_map drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 197 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +- 2 files changed, 124 insertions(+), 82 deletions(-) -- 2.33.0
[Intel-gfx] [PATCH 0/1] drm/i915/guc: Refactor CT access to use iosys_map
From: Siva Mullati ver2: remove newly added iosys map api from ver1 ver3: address review comments This is continuation to the below patch series to use iosys map APIs, to use CT commands and descriptors. https://patchwork.freedesktop.org/series/99711/ Siva Mullati (1): drm/i915/guc: Convert ct buffer to iosys_map drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 200 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +- 2 files changed, 127 insertions(+), 82 deletions(-) -- 2.33.0
[Intel-gfx] [PATCH 1/1] drm/i915/guc: Convert ct buffer to iosys_map
From: Siva Mullati
Convert CT commands and descriptors to use iosys_map rather
than plain pointer and save it in the intel_guc_ct_buffer struct.
This will help with ct_write and ct_read for cmd send and receive
after the initialization by abstracting the IO vs system memory.
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 200 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +-
2 files changed, 127 insertions(+), 82 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f01325cd1b62..64568dc90b05 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -44,6 +44,11 @@ static inline struct drm_device *ct_to_drm(struct
intel_guc_ct *ct)
#define CT_PROBE_ERROR(_ct, _fmt, ...) \
i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__)
+#define ct_desc_read(desc_map_, field_) \
+ iosys_map_rd_field(desc_map_, 0, struct guc_ct_buffer_desc, field_)
+#define ct_desc_write(desc_map_, field_, val_) \
+ iosys_map_wr_field(desc_map_, 0, struct guc_ct_buffer_desc, field_,
val_)
+
/**
* DOC: CTB Blob
*
@@ -76,6 +81,11 @@ static inline struct drm_device *ct_to_drm(struct
intel_guc_ct *ct)
#define CTB_G2H_BUFFER_SIZE(4 * CTB_H2G_BUFFER_SIZE)
#define G2H_ROOM_BUFFER_SIZE (CTB_G2H_BUFFER_SIZE / 4)
+#define CTB_SEND_DESC_OFFSET 0u
+#define CTB_RECV_DESC_OFFSET (CTB_DESC_SIZE)
+#define CTB_SEND_CMDS_OFFSET (2 * CTB_DESC_SIZE)
+#define CTB_RECV_CMDS_OFFSET (2 * CTB_DESC_SIZE + CTB_H2G_BUFFER_SIZE)
+
struct ct_request {
struct list_head link;
u32 fence;
@@ -113,9 +123,9 @@ void intel_guc_ct_init_early(struct intel_guc_ct *ct)
init_waitqueue_head(&ct->wq);
}
-static void guc_ct_buffer_desc_init(struct guc_ct_buffer_desc *desc)
+static void guc_ct_buffer_desc_init(struct iosys_map *desc)
{
- memset(desc, 0, sizeof(*desc));
+ iosys_map_memset(desc, 0, 0, sizeof(struct guc_ct_buffer_desc));
}
static void guc_ct_buffer_reset(struct intel_guc_ct_buffer *ctb)
@@ -128,17 +138,18 @@ static void guc_ct_buffer_reset(struct
intel_guc_ct_buffer *ctb)
space = CIRC_SPACE(ctb->tail, ctb->head, ctb->size) - ctb->resv_space;
atomic_set(&ctb->space, space);
- guc_ct_buffer_desc_init(ctb->desc);
+ guc_ct_buffer_desc_init(&ctb->desc_map);
}
static void guc_ct_buffer_init(struct intel_guc_ct_buffer *ctb,
- struct guc_ct_buffer_desc *desc,
- u32 *cmds, u32 size_in_bytes, u32 resv_space)
+ struct iosys_map *desc,
+ struct iosys_map *cmds,
+ u32 size_in_bytes, u32 resv_space)
{
GEM_BUG_ON(size_in_bytes % 4);
- ctb->desc = desc;
- ctb->cmds = cmds;
+ ctb->desc_map = *desc;
+ ctb->cmds_map = *cmds;
ctb->size = size_in_bytes / 4;
ctb->resv_space = resv_space / 4;
@@ -218,12 +229,13 @@ static int ct_register_buffer(struct intel_guc_ct *ct,
bool send,
int intel_guc_ct_init(struct intel_guc_ct *ct)
{
struct intel_guc *guc = ct_to_guc(ct);
- struct guc_ct_buffer_desc *desc;
+ struct iosys_map blob_map;
+ struct iosys_map desc_map;
+ struct iosys_map cmds_map;
u32 blob_size;
u32 cmds_size;
u32 resv_space;
void *blob;
- u32 *cmds;
int err;
err = i915_inject_probe_error(guc_to_gt(guc)->i915, -ENXIO);
@@ -242,27 +254,35 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma),
blob_size);
- /* store pointers to desc and cmds for send ctb */
- desc = blob;
- cmds = blob + 2 * CTB_DESC_SIZE;
+ if (i915_gem_object_is_lmem(ct->vma->obj))
+ iosys_map_set_vaddr_iomem(&blob_map,
+ (void __iomem *)blob);
+ else
+ iosys_map_set_vaddr(&blob_map, blob);
+
+ /* store sysmap to desc_map and cmds_map for send ctb */
+ desc_map = IOSYS_MAP_INIT_OFFSET(&blob_map, CTB_SEND_DESC_OFFSET);
+ cmds_map = IOSYS_MAP_INIT_OFFSET(&blob_map, CTB_SEND_CMDS_OFFSET);
cmds_size = CTB_H2G_BUFFER_SIZE;
resv_space = 0;
- CT_DEBUG(ct, "%s desc %#tx cmds %#tx size %u/%u\n", "send",
-ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size,
-resv_space);
+ CT_DEBUG(ct, "%s desc %#x cmds %#x size %u/%u\n", "send",
+CTB_SEND_DESC_OFFSET, (u32)CTB_SEND_CMDS_OFFSET,
+cmds_size, resv_space);
- guc_ct_buffer_init(&ct->ctbs.send, desc, cmds, cmds_size, resv_space);
+ guc_ct_buffer_init(&ct->ctbs.send,
+ &desc_map, &cmds_map, cmds_size, resv_space);
- /* store pointers to desc and cmds for recv ctb */
-
[Intel-gfx] [PATCH 1/1] drm/i915/guc: Convert ct buffer to iosys_map
From: Siva Mullati
Convert CT commands and descriptors to use iosys_map rather
than plain pointer and save it in the intel_guc_ct_buffer struct.
This will help with ct_write and ct_read for cmd send and receive
after the initialization by abstracting the IO vs system memory.
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 200 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +-
2 files changed, 127 insertions(+), 82 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f01325cd1b62..1c21ced44106 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -44,6 +44,11 @@ static inline struct drm_device *ct_to_drm(struct
intel_guc_ct *ct)
#define CT_PROBE_ERROR(_ct, _fmt, ...) \
i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__)
+#define ct_desc_read(desc_map_, field_) \
+ iosys_map_rd_field(desc_map_, 0, struct guc_ct_buffer_desc, field_)
+#define ct_desc_write(desc_map_, field_, val_) \
+ iosys_map_wr_field(desc_map_, 0, struct guc_ct_buffer_desc, field_,
val_)
+
/**
* DOC: CTB Blob
*
@@ -76,6 +81,11 @@ static inline struct drm_device *ct_to_drm(struct
intel_guc_ct *ct)
#define CTB_G2H_BUFFER_SIZE(4 * CTB_H2G_BUFFER_SIZE)
#define G2H_ROOM_BUFFER_SIZE (CTB_G2H_BUFFER_SIZE / 4)
+#define CTB_SEND_DESC_OFFSET (0X)
+#define CTB_RECV_DESC_OFFSET (CTB_DESC_SIZE)
+#define CTB_SEND_CMDS_OFFSET (2 * CTB_DESC_SIZE)
+#define CTB_RECV_CMDS_OFFSET (2 * CTB_DESC_SIZE + CTB_H2G_BUFFER_SIZE)
+
struct ct_request {
struct list_head link;
u32 fence;
@@ -113,9 +123,9 @@ void intel_guc_ct_init_early(struct intel_guc_ct *ct)
init_waitqueue_head(&ct->wq);
}
-static void guc_ct_buffer_desc_init(struct guc_ct_buffer_desc *desc)
+static void guc_ct_buffer_desc_init(struct iosys_map *desc)
{
- memset(desc, 0, sizeof(*desc));
+ iosys_map_memset(desc, 0, 0, sizeof(struct guc_ct_buffer_desc));
}
static void guc_ct_buffer_reset(struct intel_guc_ct_buffer *ctb)
@@ -128,17 +138,18 @@ static void guc_ct_buffer_reset(struct
intel_guc_ct_buffer *ctb)
space = CIRC_SPACE(ctb->tail, ctb->head, ctb->size) - ctb->resv_space;
atomic_set(&ctb->space, space);
- guc_ct_buffer_desc_init(ctb->desc);
+ guc_ct_buffer_desc_init(&ctb->desc_map);
}
static void guc_ct_buffer_init(struct intel_guc_ct_buffer *ctb,
- struct guc_ct_buffer_desc *desc,
- u32 *cmds, u32 size_in_bytes, u32 resv_space)
+ struct iosys_map *desc,
+ struct iosys_map *cmds,
+ u32 size_in_bytes, u32 resv_space)
{
GEM_BUG_ON(size_in_bytes % 4);
- ctb->desc = desc;
- ctb->cmds = cmds;
+ ctb->desc_map = *desc;
+ ctb->cmds_map = *cmds;
ctb->size = size_in_bytes / 4;
ctb->resv_space = resv_space / 4;
@@ -218,12 +229,13 @@ static int ct_register_buffer(struct intel_guc_ct *ct,
bool send,
int intel_guc_ct_init(struct intel_guc_ct *ct)
{
struct intel_guc *guc = ct_to_guc(ct);
- struct guc_ct_buffer_desc *desc;
+ struct iosys_map blob_map;
+ struct iosys_map desc_map;
+ struct iosys_map cmds_map;
u32 blob_size;
u32 cmds_size;
u32 resv_space;
void *blob;
- u32 *cmds;
int err;
err = i915_inject_probe_error(guc_to_gt(guc)->i915, -ENXIO);
@@ -242,27 +254,35 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma),
blob_size);
- /* store pointers to desc and cmds for send ctb */
- desc = blob;
- cmds = blob + 2 * CTB_DESC_SIZE;
+ if (i915_gem_object_is_lmem(ct->vma->obj))
+ iosys_map_set_vaddr_iomem(&blob_map,
+ (void __iomem *)blob);
+ else
+ iosys_map_set_vaddr(&blob_map, blob);
+
+ /* store sysmap to desc_map and cmds_map for send ctb */
+ desc_map = IOSYS_MAP_INIT_OFFSET(&blob_map, CTB_SEND_DESC_OFFSET);
+ cmds_map = IOSYS_MAP_INIT_OFFSET(&blob_map, CTB_SEND_CMDS_OFFSET);
cmds_size = CTB_H2G_BUFFER_SIZE;
resv_space = 0;
- CT_DEBUG(ct, "%s desc %#tx cmds %#tx size %u/%u\n", "send",
-ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size,
-resv_space);
+ CT_DEBUG(ct, "%s desc %#x cmds %#x size %u/%u\n", "send",
+(u32)CTB_SEND_DESC_OFFSET, (u32)CTB_SEND_CMDS_OFFSET,
+cmds_size, resv_space);
- guc_ct_buffer_init(&ct->ctbs.send, desc, cmds, cmds_size, resv_space);
+ guc_ct_buffer_init(&ct->ctbs.send,
+ &desc_map, &cmds_map, cmds_size, resv_space);
- /* store pointers to desc and cmds for recv
[Intel-gfx] [PATCH 0/1] drm/i915/guc: Refactor CT access to use iosys_map
From: Siva Mullati This is continuation to the below patch series to use iosys map APIs, to use CT commands and descriptors. https://patchwork.freedesktop.org/series/99711/ Siva Mullati (1): drm/i915/guc: Convert ct buffer to iosys_map drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 200 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +- 2 files changed, 127 insertions(+), 82 deletions(-) -- 2.33.0
[Intel-gfx] [PATCH 1/1] drm/i915/guc: Convert slpc to iosys_map
From: Siva Mullati
Convert slpc shared data to use iosys_map rather than
plain pointer and save it in the intel_guc_slpc struct.
This will help with in read and update slpc shared data
after the slpc init by abstracting the IO vs system memory.
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 79 +++
.../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 5 +-
2 files changed, 47 insertions(+), 37 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
index 9f032c65a488..3a9ec6b03ceb 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c
@@ -14,6 +14,13 @@
#include "gt/intel_gt_regs.h"
#include "gt/intel_rps.h"
+#define slpc_blob_read(slpc_, field_) \
+ iosys_map_rd_field(&(slpc_)->slpc_map, 0, \
+ struct slpc_shared_data, field_)
+#define slpc_blob_write(slpc_, field_, val_) \
+ iosys_map_wr_field(&(slpc_)->slpc_map, 0, \
+ struct slpc_shared_data, field_, val_)
+
static inline struct intel_guc *slpc_to_guc(struct intel_guc_slpc *slpc)
{
return container_of(slpc, struct intel_guc, slpc);
@@ -52,50 +59,50 @@ void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc)
slpc->selected = __guc_slpc_selected(guc);
}
-static void slpc_mem_set_param(struct slpc_shared_data *data,
+static void slpc_mem_set_param(struct intel_guc_slpc *slpc,
u32 id, u32 value)
{
+ u32 bits = slpc_blob_read(slpc, override_params.bits[id >> 5]);
+
GEM_BUG_ON(id >= SLPC_MAX_OVERRIDE_PARAMETERS);
/*
* When the flag bit is set, corresponding value will be read
* and applied by SLPC.
*/
- data->override_params.bits[id >> 5] |= (1 << (id % 32));
- data->override_params.values[id] = value;
+ bits |= (1 << (id % 32));
+ slpc_blob_write(slpc, override_params.bits[id >> 5], bits);
+ slpc_blob_write(slpc, override_params.values[id], value);
}
-static void slpc_mem_set_enabled(struct slpc_shared_data *data,
+static void slpc_mem_set_enabled(struct intel_guc_slpc *slpc,
u8 enable_id, u8 disable_id)
{
/*
* Enabling a param involves setting the enable_id
* to 1 and disable_id to 0.
*/
- slpc_mem_set_param(data, enable_id, 1);
- slpc_mem_set_param(data, disable_id, 0);
+ slpc_mem_set_param(slpc, enable_id, 1);
+ slpc_mem_set_param(slpc, disable_id, 0);
}
-static void slpc_mem_set_disabled(struct slpc_shared_data *data,
+static void slpc_mem_set_disabled(struct intel_guc_slpc *slpc,
u8 enable_id, u8 disable_id)
{
/*
* Disabling a param involves setting the enable_id
* to 0 and disable_id to 1.
*/
- slpc_mem_set_param(data, disable_id, 1);
- slpc_mem_set_param(data, enable_id, 0);
+ slpc_mem_set_param(slpc, disable_id, 1);
+ slpc_mem_set_param(slpc, enable_id, 0);
}
static u32 slpc_get_state(struct intel_guc_slpc *slpc)
{
- struct slpc_shared_data *data;
-
GEM_BUG_ON(!slpc->vma);
- drm_clflush_virt_range(slpc->vaddr, sizeof(u32));
- data = slpc->vaddr;
+ drm_clflush_virt_range(slpc->slpc_map.vaddr, sizeof(u32));
- return data->header.global_state;
+ return slpc_blob_read(slpc, header.global_state);
}
static int guc_action_slpc_set_param(struct intel_guc *guc, u8 id, u32 value)
@@ -156,7 +163,7 @@ static int slpc_query_task_state(struct intel_guc_slpc
*slpc)
drm_err(&i915->drm, "Failed to query task state (%pe)\n",
ERR_PTR(ret));
- drm_clflush_virt_range(slpc->vaddr, SLPC_PAGE_SIZE_BYTES);
+ drm_clflush_virt_range(slpc->slpc_map.vaddr, SLPC_PAGE_SIZE_BYTES);
return ret;
}
@@ -243,10 +250,11 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc)
struct drm_i915_private *i915 = slpc_to_i915(slpc);
u32 size = PAGE_ALIGN(sizeof(struct slpc_shared_data));
int err;
+ void *vaddr;
GEM_BUG_ON(slpc->vma);
- err = intel_guc_allocate_and_map_vma(guc, size, &slpc->vma, (void
**)&slpc->vaddr);
+ err = intel_guc_allocate_and_map_vma(guc, size, &slpc->vma, (void
**)&vaddr);
if (unlikely(err)) {
drm_err(&i915->drm,
"Failed to allocate SLPC struct (err=%pe)\n",
@@ -254,6 +262,12 @@ int intel_guc_slpc_init(struct intel_guc_slpc *slpc)
return err;
}
+ if (i915_gem_object_is_lmem(slpc->vma->obj))
+ iosys_map_set_vaddr_iomem(&slpc->slpc_map,
+ (void __iomem *)vaddr);
+ else
+ iosys_map_set_vaddr(&slpc->slpc_map, vaddr);
+
slpc->max_freq_softlimit = 0;
slpc->min_fr
[Intel-gfx] [PATCH 0/1] drm/i915/guc: Refactor slpc shared data access to use iosys_map
From: Siva Mullati This is continuation to the original patch series to use iosys map APIs to use slpc shared data commands and descriptors. https://patchwork.freedesktop.org/series/99711/ Siva Mullati (1): drm/i915/guc: Convert slpc to iosys_map drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 79 +++ .../gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 5 +- 2 files changed, 47 insertions(+), 37 deletions(-) -- 2.33.0
[Intel-gfx] [PATCH 2/2] drm/i915/guc: Convert ct buffer to iosys_map
From: Siva Mullati
Convert CT commands and descriptors to use iosys_map rather
than plain pointer and save it in the intel_guc_ct_buffer struct.
This will help with ct_write and ct_read for cmd send and receive
after the initialization by abstracting the IO vs system memory.
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 170 +-
drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +-
2 files changed, 110 insertions(+), 69 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
index f01325cd1b62..457deca1c25a 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c
@@ -44,6 +44,11 @@ static inline struct drm_device *ct_to_drm(struct
intel_guc_ct *ct)
#define CT_PROBE_ERROR(_ct, _fmt, ...) \
i915_probe_error(ct_to_i915(ct), "CT: " _fmt, ##__VA_ARGS__)
+#define ct_desc_read(desc_map_, field_) \
+ iosys_map_rd_field(desc_map_, 0, struct guc_ct_buffer_desc, field_)
+#define ct_desc_write(desc_map_, field_, val_) \
+ iosys_map_wr_field(desc_map_, 0, struct guc_ct_buffer_desc, field_,
val_)
+
/**
* DOC: CTB Blob
*
@@ -113,9 +118,9 @@ void intel_guc_ct_init_early(struct intel_guc_ct *ct)
init_waitqueue_head(&ct->wq);
}
-static void guc_ct_buffer_desc_init(struct guc_ct_buffer_desc *desc)
+static void guc_ct_buffer_desc_init(struct iosys_map *desc)
{
- memset(desc, 0, sizeof(*desc));
+ iosys_map_memset(desc, 0, 0, sizeof(struct guc_ct_buffer_desc));
}
static void guc_ct_buffer_reset(struct intel_guc_ct_buffer *ctb)
@@ -128,17 +133,24 @@ static void guc_ct_buffer_reset(struct
intel_guc_ct_buffer *ctb)
space = CIRC_SPACE(ctb->tail, ctb->head, ctb->size) - ctb->resv_space;
atomic_set(&ctb->space, space);
- guc_ct_buffer_desc_init(ctb->desc);
+ guc_ct_buffer_desc_init(&ctb->desc_map);
}
static void guc_ct_buffer_init(struct intel_guc_ct_buffer *ctb,
- struct guc_ct_buffer_desc *desc,
- u32 *cmds, u32 size_in_bytes, u32 resv_space)
+ void *desc, void *cmds, u32 size_in_bytes,
+ u32 resv_space, bool lmem)
{
GEM_BUG_ON(size_in_bytes % 4);
- ctb->desc = desc;
- ctb->cmds = cmds;
+ if (lmem) {
+ iosys_map_set_vaddr_iomem(&ctb->desc_map,
+ (void __iomem *)desc);
+ iosys_map_set_vaddr_iomem(&ctb->cmds_map,
+ (void __iomem *)cmds);
+ } else {
+ iosys_map_set_vaddr(&ctb->desc_map, desc);
+ iosys_map_set_vaddr(&ctb->cmds_map, cmds);
+ }
ctb->size = size_in_bytes / 4;
ctb->resv_space = resv_space / 4;
@@ -218,13 +230,12 @@ static int ct_register_buffer(struct intel_guc_ct *ct,
bool send,
int intel_guc_ct_init(struct intel_guc_ct *ct)
{
struct intel_guc *guc = ct_to_guc(ct);
- struct guc_ct_buffer_desc *desc;
u32 blob_size;
u32 cmds_size;
u32 resv_space;
- void *blob;
- u32 *cmds;
+ void *blob, *desc, *cmds;
int err;
+ bool lmem;
err = i915_inject_probe_error(guc_to_gt(guc)->i915, -ENXIO);
if (err)
@@ -242,6 +253,8 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
CT_DEBUG(ct, "base=%#x size=%u\n", intel_guc_ggtt_offset(guc, ct->vma),
blob_size);
+ lmem = i915_gem_object_is_lmem(ct->vma->obj);
+
/* store pointers to desc and cmds for send ctb */
desc = blob;
cmds = blob + 2 * CTB_DESC_SIZE;
@@ -251,7 +264,8 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size,
resv_space);
- guc_ct_buffer_init(&ct->ctbs.send, desc, cmds, cmds_size, resv_space);
+ guc_ct_buffer_init(&ct->ctbs.send,
+ desc, cmds, cmds_size, resv_space, lmem);
/* store pointers to desc and cmds for recv ctb */
desc = blob + CTB_DESC_SIZE;
@@ -262,7 +276,8 @@ int intel_guc_ct_init(struct intel_guc_ct *ct)
ptrdiff(desc, blob), ptrdiff(cmds, blob), cmds_size,
resv_space);
- guc_ct_buffer_init(&ct->ctbs.recv, desc, cmds, cmds_size, resv_space);
+ guc_ct_buffer_init(&ct->ctbs.recv,
+ desc, cmds, cmds_size, resv_space, lmem);
return 0;
}
@@ -279,6 +294,10 @@ void intel_guc_ct_fini(struct intel_guc_ct *ct)
tasklet_kill(&ct->receive_tasklet);
i915_vma_unpin_and_release(&ct->vma, I915_VMA_RELEASE_MAP);
+ iosys_map_clear(&ct->ctbs.send.desc_map);
+ iosys_map_clear(&ct->ctbs.send.cmds_map);
+ iosys_map_clear(&ct->ctbs.recv.desc_map);
+ iosys_map_clear(&ct->ctbs.recv.cmds_map);
memset(ct, 0, sizeof(*ct));
}
@@ -291,6 +310,7 @@
[Intel-gfx] [PATCH 1/2] iosys-map: Add a helper for pointer difference
From: Siva Mullati
iosys_map_ptrdiff to get the difference in address of
same memory type.
Signed-off-by: Siva Mullati
---
include/linux/iosys-map.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/include/linux/iosys-map.h b/include/linux/iosys-map.h
index e69a002d5aa4..8987f69ec1e9 100644
--- a/include/linux/iosys-map.h
+++ b/include/linux/iosys-map.h
@@ -8,6 +8,7 @@
#include
#include
+#include
/**
* DOC: overview
@@ -208,6 +209,26 @@ static inline bool iosys_map_is_equal(const struct
iosys_map *lhs,
return lhs->vaddr == rhs->vaddr;
}
+/**
+ * iosys_map_ptrdiff - Difference of two iosys mapping addresses of same
memory type
+ * @lhs: The iosys_map structure
+ * @rhs: A iosys_map structure to compare with
+ *
+ * Two iosys mapping structures of same memory type with the differences
+ * in address within that memory.
+ *
+ * Returns:
+ * Address difference of two memory locations with same memory type.
+ */
+static inline ptrdiff_t iosys_map_ptrdiff(const struct iosys_map *lhs,
+ const struct iosys_map *rhs)
+{
+ if (lhs->is_iomem)
+ return lhs->vaddr_iomem - rhs->vaddr_iomem;
+ else
+ return lhs->vaddr - rhs->vaddr;
+}
+
/**
* iosys_map_is_null - Tests for a iosys mapping to be NULL
* @map: The iosys_map structure
--
2.33.0
[Intel-gfx] [PATCH 0/2] drm/i915/guc: Refactor CT access to use iosys_map
From: Siva Mullati This is continuation to the below patch series to use iosys map APIs to use CT commands and descriptors. https://patchwork.freedesktop.org/series/99711/ Siva Mullati (2): iosys-map: Add a helper for pointer difference drm/i915/guc: Convert ct buffer to iosys_map drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 170 +- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.h | 9 +- include/linux/iosys-map.h | 21 +++ 3 files changed, 131 insertions(+), 69 deletions(-) -- 2.33.0
[Intel-gfx] [PATCH] drm/i915/gvt: Make DRM_I915_GVT depend on X86
From: Siva Mullati GVT is not supported on non-x86 platforms, So add dependency of X86 on config parameter DRM_I915_GVT. Signed-off-by: Siva Mullati --- drivers/gpu/drm/i915/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig index a4c94dc2e216..cfd932514da2 100644 --- a/drivers/gpu/drm/i915/Kconfig +++ b/drivers/gpu/drm/i915/Kconfig @@ -101,6 +101,7 @@ config DRM_I915_USERPTR config DRM_I915_GVT bool "Enable Intel GVT-g graphics virtualization host support" depends on DRM_I915 + depends on X86 depends on 64BIT default n help -- 2.33.0
[Intel-gfx] [PATCH] drm/i915: Skip remap_io_mapping() for non-x86 platforms
From: Siva Mullati
Only hw that supports mappable aperture would hit this path
vm_fault_gtt/vm_fault_tmm, So we never hit this function
remap_io_mapping() in discrete, So skip this code for non-x86
architectures.
v2: use IS_ENABLED () instead of #if defined
v3: move function prototypes from i915_drv.h to i915_mm.h
v4: added kernel error message in stub function
v5: fixed compilation warnings
v6: checkpatch style
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 8 --
drivers/gpu/drm/i915/i915_mm.c | 28 +++
drivers/gpu/drm/i915/i915_mm.h | 35
4 files changed, 52 insertions(+), 20 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_mm.h
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 65fc6ff5f59d..39bb15eafc07 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -17,6 +17,7 @@
#include "i915_gem_ioctls.h"
#include "i915_gem_object.h"
#include "i915_gem_mman.h"
+#include "i915_mm.h"
#include "i915_trace.h"
#include "i915_user_extensions.h"
#include "i915_gem_ttm.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 85bb8d3107f0..3949cafa59e2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1783,14 +1783,6 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
int i915_reg_read_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
-/* i915_mm.c */
-int remap_io_mapping(struct vm_area_struct *vma,
-unsigned long addr, unsigned long pfn, unsigned long size,
-struct io_mapping *iomap);
-int remap_io_sg(struct vm_area_struct *vma,
- unsigned long addr, unsigned long size,
- struct scatterlist *sgl, resource_size_t iobase);
-
static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
{
if (GRAPHICS_VER(i915) >= 11)
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 666808cb3a32..7998bc74ab49 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -27,6 +27,7 @@
#include "i915_drv.h"
+#include "i915_mm.h"
struct remap_pfn {
struct mm_struct *mm;
@@ -37,17 +38,6 @@ struct remap_pfn {
resource_size_t iobase;
};
-static int remap_pfn(pte_t *pte, unsigned long addr, void *data)
-{
- struct remap_pfn *r = data;
-
- /* Special PTE are not associated with any struct page */
- set_pte_at(r->mm, addr, pte, pte_mkspecial(pfn_pte(r->pfn, r->prot)));
- r->pfn++;
-
- return 0;
-}
-
#define use_dma(io) ((io) != -1)
static inline unsigned long sgt_pfn(const struct remap_pfn *r)
@@ -77,6 +67,20 @@ static int remap_sg(pte_t *pte, unsigned long addr, void
*data)
return 0;
}
+#define EXPECTED_FLAGS (VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP)
+
+#if IS_ENABLED(CONFIG_X86)
+static int remap_pfn(pte_t *pte, unsigned long addr, void *data)
+{
+ struct remap_pfn *r = data;
+
+ /* Special PTE are not associated with any struct page */
+ set_pte_at(r->mm, addr, pte, pte_mkspecial(pfn_pte(r->pfn, r->prot)));
+ r->pfn++;
+
+ return 0;
+}
+
/**
* remap_io_mapping - remap an IO mapping to userspace
* @vma: user vma to map to
@@ -94,7 +98,6 @@ int remap_io_mapping(struct vm_area_struct *vma,
struct remap_pfn r;
int err;
-#define EXPECTED_FLAGS (VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP)
GEM_BUG_ON((vma->vm_flags & EXPECTED_FLAGS) != EXPECTED_FLAGS);
/* We rely on prevalidation of the io-mapping to skip track_pfn(). */
@@ -111,6 +114,7 @@ int remap_io_mapping(struct vm_area_struct *vma,
return 0;
}
+#endif
/**
* remap_io_sg - remap an IO mapping to userspace
diff --git a/drivers/gpu/drm/i915/i915_mm.h b/drivers/gpu/drm/i915/i915_mm.h
new file mode 100644
index ..76f1d53bdf34
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_mm.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_MM_H__
+#define __I915_MM_H__
+
+#include
+
+struct vm_area_struct;
+struct io_mapping;
+struct scatterlist;
+
+#if IS_ENABLED(CONFIG_X86)
+int remap_io_mapping(struct vm_area_struct *vma,
+unsigned long addr, unsigned long pfn, unsigned long size,
+struct io_mapping *iomap);
+#else
+static inline
+int remap_io_mapping(struct vm_area_struct *vma,
+unsigned long addr, unsigned long pfn, unsigned long size,
+struct io_mapping *iomap)
+{
+ pr_err("Architecture has no %s() and shouldn't be calling this
function\n", __func__);
+ WARN_ON_ONCE(1);
+ return 0;
+}
+#endif
+
+int remap_io_sg(struct vm_area_struct *vma,
+
[Intel-gfx] [PATCH] drm/i915: Skip remap_io_mapping() for non-x86 platforms
From: Siva Mullati
Only hw that supports mappable aperture would hit this path
vm_fault_gtt/vm_fault_tmm, So we never hit this function
remap_io_mapping() in discrete, So skip this code for non-x86
architectures.
v2: use IS_ENABLED () instead of #if defined
v3: move function prototypes from i915_drv.h to i915_mm.h
v4: added kernel error message in stub function
v5: fixed compilation warnings
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 8 --
drivers/gpu/drm/i915/i915_mm.c | 28 ++-
drivers/gpu/drm/i915/i915_mm.h | 34
4 files changed, 51 insertions(+), 20 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_mm.h
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 65fc6ff5f59d..39bb15eafc07 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -17,6 +17,7 @@
#include "i915_gem_ioctls.h"
#include "i915_gem_object.h"
#include "i915_gem_mman.h"
+#include "i915_mm.h"
#include "i915_trace.h"
#include "i915_user_extensions.h"
#include "i915_gem_ttm.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 85bb8d3107f0..3949cafa59e2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1783,14 +1783,6 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
int i915_reg_read_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
-/* i915_mm.c */
-int remap_io_mapping(struct vm_area_struct *vma,
-unsigned long addr, unsigned long pfn, unsigned long size,
-struct io_mapping *iomap);
-int remap_io_sg(struct vm_area_struct *vma,
- unsigned long addr, unsigned long size,
- struct scatterlist *sgl, resource_size_t iobase);
-
static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
{
if (GRAPHICS_VER(i915) >= 11)
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 666808cb3a32..7998bc74ab49 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -27,6 +27,7 @@
#include "i915_drv.h"
+#include "i915_mm.h"
struct remap_pfn {
struct mm_struct *mm;
@@ -37,17 +38,6 @@ struct remap_pfn {
resource_size_t iobase;
};
-static int remap_pfn(pte_t *pte, unsigned long addr, void *data)
-{
- struct remap_pfn *r = data;
-
- /* Special PTE are not associated with any struct page */
- set_pte_at(r->mm, addr, pte, pte_mkspecial(pfn_pte(r->pfn, r->prot)));
- r->pfn++;
-
- return 0;
-}
-
#define use_dma(io) ((io) != -1)
static inline unsigned long sgt_pfn(const struct remap_pfn *r)
@@ -77,6 +67,20 @@ static int remap_sg(pte_t *pte, unsigned long addr, void
*data)
return 0;
}
+#define EXPECTED_FLAGS (VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP)
+
+#if IS_ENABLED(CONFIG_X86)
+static int remap_pfn(pte_t *pte, unsigned long addr, void *data)
+{
+ struct remap_pfn *r = data;
+
+ /* Special PTE are not associated with any struct page */
+ set_pte_at(r->mm, addr, pte, pte_mkspecial(pfn_pte(r->pfn, r->prot)));
+ r->pfn++;
+
+ return 0;
+}
+
/**
* remap_io_mapping - remap an IO mapping to userspace
* @vma: user vma to map to
@@ -94,7 +98,6 @@ int remap_io_mapping(struct vm_area_struct *vma,
struct remap_pfn r;
int err;
-#define EXPECTED_FLAGS (VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP)
GEM_BUG_ON((vma->vm_flags & EXPECTED_FLAGS) != EXPECTED_FLAGS);
/* We rely on prevalidation of the io-mapping to skip track_pfn(). */
@@ -111,6 +114,7 @@ int remap_io_mapping(struct vm_area_struct *vma,
return 0;
}
+#endif
/**
* remap_io_sg - remap an IO mapping to userspace
diff --git a/drivers/gpu/drm/i915/i915_mm.h b/drivers/gpu/drm/i915/i915_mm.h
new file mode 100644
index ..b2b38a5678e3
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_mm.h
@@ -0,0 +1,34 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_MM_H__
+#define __I915_MM_H__
+
+#include
+
+struct vm_area_struct;
+struct io_mapping;
+struct scatterlist;
+
+#if IS_ENABLED(CONFIG_X86)
+int remap_io_mapping(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long pfn, unsigned long size,
+ struct io_mapping *iomap);
+#else
+static inline int remap_io_mapping(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long pfn, unsigned long size,
+ struct io_mapping *iomap)
+{
+ pr_err("Architecture has no remap_io_mapping() and shouldn't be calling
this function\n");
+ WARN_ON_ONCE(1);
+ return 0;
+}
+#endif
+
+int remap_io_sg(struct vm_area_struct *vma,
+ unsigned long addr, unsigned l
[Intel-gfx] [PATCH] drm/i915: Skip remap_io_mapping() for non-x86 platforms
From: Siva Mullati
Only hw that supports mappable aperture would hit this path
vm_fault_gtt/vm_fault_tmm, So we never hit this function
remap_io_mapping() in discrete, So skip this code for non-x86
architectures.
v2: use IS_ENABLED () instead of #if defined
v3: move function prototypes from i915_drv.h to i915_mm.h
v4: added kernel error message in stub function
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 8 --
drivers/gpu/drm/i915/i915_mm.c | 1 +
drivers/gpu/drm/i915/i915_mm.h | 35
4 files changed, 37 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_mm.h
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 65fc6ff5f59d..39bb15eafc07 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -17,6 +17,7 @@
#include "i915_gem_ioctls.h"
#include "i915_gem_object.h"
#include "i915_gem_mman.h"
+#include "i915_mm.h"
#include "i915_trace.h"
#include "i915_user_extensions.h"
#include "i915_gem_ttm.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1bfadd9127fc..7ae0f0cc6866 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1967,14 +1967,6 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
int i915_reg_read_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
-/* i915_mm.c */
-int remap_io_mapping(struct vm_area_struct *vma,
-unsigned long addr, unsigned long pfn, unsigned long size,
-struct io_mapping *iomap);
-int remap_io_sg(struct vm_area_struct *vma,
- unsigned long addr, unsigned long size,
- struct scatterlist *sgl, resource_size_t iobase);
-
static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
{
if (GRAPHICS_VER(i915) >= 11)
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 666808cb3a32..f4df15fe7cf8 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -27,6 +27,7 @@
#include "i915_drv.h"
+#include "i915_mm.h"
struct remap_pfn {
struct mm_struct *mm;
diff --git a/drivers/gpu/drm/i915/i915_mm.h b/drivers/gpu/drm/i915/i915_mm.h
new file mode 100644
index ..dc556c8f
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_mm.h
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_MM_H__
+#define __I915_MM_H__
+
+#include
+
+struct vm_area_struct;
+struct io_mapping;
+struct scatterlist;
+
+#if IS_ENABLED(CONFIG_X86)
+int remap_io_mapping(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long pfn, unsigned long size,
+ struct io_mapping *iomap);
+#else
+static inline int remap_io_mapping(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long pfn, unsigned long size,
+ struct io_mapping *iomap)
+{
+ pr_err(DRIVER_NAME
+ ": Architecture has no remap_io_mapping() and shouldn't be
calling this function\n");
+ WARN_ON_ONCE(1);
+ return 0;
+}
+#endif
+
+int remap_io_sg(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long size,
+ struct scatterlist *sgl, resource_size_t iobase);
+
+#endif /* __I915_MM_H__ */
--
2.33.0
[Intel-gfx] [PATCH] drm/i915: Skip remap_io_mapping() for non-x86 platforms
From: Siva Mullati
Only hw that supports mappable aperture would hit this path
vm_fault_gtt/vm_fault_tmm, So we never hit this function
remap_io_mapping() in discrete, So skip this code for non-x86
architectures.
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 8 --
drivers/gpu/drm/i915/i915_mm.c | 1 +
drivers/gpu/drm/i915/i915_mm.h | 32
4 files changed, 34 insertions(+), 8 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_mm.h
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 65fc6ff5f59d..39bb15eafc07 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -17,6 +17,7 @@
#include "i915_gem_ioctls.h"
#include "i915_gem_object.h"
#include "i915_gem_mman.h"
+#include "i915_mm.h"
#include "i915_trace.h"
#include "i915_user_extensions.h"
#include "i915_gem_ttm.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1bfadd9127fc..7ae0f0cc6866 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1967,14 +1967,6 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
int i915_reg_read_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
-/* i915_mm.c */
-int remap_io_mapping(struct vm_area_struct *vma,
-unsigned long addr, unsigned long pfn, unsigned long size,
-struct io_mapping *iomap);
-int remap_io_sg(struct vm_area_struct *vma,
- unsigned long addr, unsigned long size,
- struct scatterlist *sgl, resource_size_t iobase);
-
static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
{
if (GRAPHICS_VER(i915) >= 11)
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 666808cb3a32..f4df15fe7cf8 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -27,6 +27,7 @@
#include "i915_drv.h"
+#include "i915_mm.h"
struct remap_pfn {
struct mm_struct *mm;
diff --git a/drivers/gpu/drm/i915/i915_mm.h b/drivers/gpu/drm/i915/i915_mm.h
new file mode 100644
index ..1d3bbb9cbf43
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_mm.h
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_MM_H__
+#define __I915_MM_H__
+
+#include
+
+struct vm_area_struct;
+struct io_mapping;
+struct scatterlist;
+
+#if IS_ENABLED(CONFIG_X86)
+int remap_io_mapping(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long pfn, unsigned long size,
+ struct io_mapping *iomap);
+#else
+static inline int remap_io_mapping(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long pfn, unsigned long size,
+ struct io_mapping *iomap)
+{
+ return 0;
+}
+#endif
+
+int remap_io_sg(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long size,
+ struct scatterlist *sgl, resource_size_t iobase);
+
+#endif /* __I915_MM_H__ */
--
2.33.0
[Intel-gfx] [PATCH] drm/i915: Skip remap_io() calls for non-x86 platforms
From: Siva Mullati
Only hw that supports mappable aperture would hit this path
vm_fault_gtt/vm_fault_tmm, So we never hit these functions
remap_io_mapping() and remap_io_sg in discrete, So skip this
code for non-x86 architectures.
Signed-off-by: Siva Mullati
---
drivers/gpu/drm/i915/Makefile| 2 +-
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 1 +
drivers/gpu/drm/i915/i915_drv.h | 8 --
drivers/gpu/drm/i915/i915_mm.c | 1 +
drivers/gpu/drm/i915/i915_mm.h | 31
5 files changed, 34 insertions(+), 9 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_mm.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 074d6b8edd23..b08397e41efb 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -62,12 +62,12 @@ i915-y += i915_driver.o \
i915-y += \
dma_resv_utils.o \
i915_memcpy.o \
- i915_mm.o \
i915_sw_fence.o \
i915_sw_fence_work.o \
i915_syncmap.o \
i915_user_extensions.o
+i915-$(CONFIG_X86) += i915_mm.o
i915-$(CONFIG_COMPAT) += i915_ioc32.o
i915-$(CONFIG_DEBUG_FS) += \
i915_debugfs.o \
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index 65fc6ff5f59d..39bb15eafc07 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -17,6 +17,7 @@
#include "i915_gem_ioctls.h"
#include "i915_gem_object.h"
#include "i915_gem_mman.h"
+#include "i915_mm.h"
#include "i915_trace.h"
#include "i915_user_extensions.h"
#include "i915_gem_ttm.h"
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f2a546d58481..c0712281ee83 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1962,14 +1962,6 @@ mkwrite_device_info(struct drm_i915_private *dev_priv)
int i915_reg_read_ioctl(struct drm_device *dev, void *data,
struct drm_file *file);
-/* i915_mm.c */
-int remap_io_mapping(struct vm_area_struct *vma,
-unsigned long addr, unsigned long pfn, unsigned long size,
-struct io_mapping *iomap);
-int remap_io_sg(struct vm_area_struct *vma,
- unsigned long addr, unsigned long size,
- struct scatterlist *sgl, resource_size_t iobase);
-
static inline int intel_hws_csb_write_index(struct drm_i915_private *i915)
{
if (GRAPHICS_VER(i915) >= 11)
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 666808cb3a32..f4df15fe7cf8 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -27,6 +27,7 @@
#include "i915_drv.h"
+#include "i915_mm.h"
struct remap_pfn {
struct mm_struct *mm;
diff --git a/drivers/gpu/drm/i915/i915_mm.h b/drivers/gpu/drm/i915/i915_mm.h
new file mode 100644
index ..71651cced0f5
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_mm.h
@@ -0,0 +1,31 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_MM_H__
+#define __I915_MM_H__
+
+#if IS_ENABLED(CONFIG_X86)
+int remap_io_mapping(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long pfn, unsigned long size,
+ struct io_mapping *iomap);
+int remap_io_sg(struct vm_area_struct *vma,
+unsigned long addr, unsigned long size,
+struct scatterlist *sgl, resource_size_t iobase);
+#else
+static inline int remap_io_mapping(struct vm_area_struct *vma,
+ unsigned long addr, unsigned long pfn, unsigned long size,
+ struct io_mapping *iomap)
+{
+return 0;
+}
+static inline int remap_io_sg(struct vm_area_struct *vma,
+unsigned long addr, unsigned long size,
+struct scatterlist *sgl, resource_size_t iobase)
+{
+return 0;
+}
+#endif
+
+#endif /* __I915_MM_H__ */
--
2.33.0
[Intel-gfx] [PATCH] drm/i915: Skip remap_io_mapping() for non-x86 platforms
The _PAGE_CACHE_MASK macro is not defined in non-x86
architectures and it's been used in remap_io_mapping().
Only hw that supports mappable aperture would hit this path
remap_io_mapping(), So skip this code for non-x86 architectures.
Signed-off-by: Mullati Siva
---
drivers/gpu/drm/i915/i915_mm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 666808cb3a32..d76feeaf3fd1 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -91,6 +91,7 @@ int remap_io_mapping(struct vm_area_struct *vma,
unsigned long addr, unsigned long pfn, unsigned long size,
struct io_mapping *iomap)
{
+#if IS_ENABLED(CONFIG_X86)
struct remap_pfn r;
int err;
@@ -108,6 +109,7 @@ int remap_io_mapping(struct vm_area_struct *vma,
zap_vma_ptes(vma, addr, (r.pfn - pfn) << PAGE_SHIFT);
return err;
}
+#endif
return 0;
}
--
2.33.0
[Intel-gfx] [PATCH] drm/i915: Skip remap_io_mapping() for non-x86 platforms
From: "Mullati, Siva"
The _PAGE_CACHE_MASK macro is not defined in non-x86
architectures and it's been used in remap_io_mapping().
Only hw that supports mappable aperture would hit this path
remap_io_mapping(), So skip this code for non-x86 architectures.
Signed-off-by: Mullati, Siva
---
drivers/gpu/drm/i915/i915_mm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_mm.c b/drivers/gpu/drm/i915/i915_mm.c
index 666808cb3a32..5e2a1868b957 100644
--- a/drivers/gpu/drm/i915/i915_mm.c
+++ b/drivers/gpu/drm/i915/i915_mm.c
@@ -91,6 +91,7 @@ int remap_io_mapping(struct vm_area_struct *vma,
unsigned long addr, unsigned long pfn, unsigned long size,
struct io_mapping *iomap)
{
+#if defined(CONFIG_X86)
struct remap_pfn r;
int err;
@@ -108,6 +109,7 @@ int remap_io_mapping(struct vm_area_struct *vma,
zap_vma_ptes(vma, addr, (r.pfn - pfn) << PAGE_SHIFT);
return err;
}
+#endif
return 0;
}
--
2.33.0
[Intel-gfx] [PATCH] drm/i915: abstraction for iosf to compile on all archs
From: "Mullati, Siva"
The asm/iosf_mbi.h header is x86-only. Let's make IOSF_MBI kconfig
selection conditional to x86 and provide a header with stubs for other
architectures. This helps getting i915 available for other
architectures in future.
Signed-off-by: Mullati, Siva
---
drivers/gpu/drm/i915/Kconfig | 2 +-
drivers/gpu/drm/i915/i915_iosf_mbi.h | 42
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
drivers/gpu/drm/i915/vlv_sideband.c | 3 +-
4 files changed, 45 insertions(+), 4 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_iosf_mbi.h
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index bf041b26ffec..8bea99622dd5 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -21,7 +21,7 @@ config DRM_I915
select ACPI_VIDEO if ACPI
select ACPI_BUTTON if ACPI
select SYNC_FILE
- select IOSF_MBI
+ select IOSF_MBI if X86
select CRC32
select SND_HDA_I915 if SND_HDA_CORE
select CEC_CORE if CEC_NOTIFIER
diff --git a/drivers/gpu/drm/i915/i915_iosf_mbi.h
b/drivers/gpu/drm/i915/i915_iosf_mbi.h
new file mode 100644
index ..8f81b7603d37
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_iosf_mbi.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021 Intel Corporation
+ */
+
+#ifndef __I915_IOSF_MBI_H__
+#define __I915_IOSF_MBI_H__
+
+#if IS_ENABLED(CONFIG_IOSF_MBI)
+#include
+#else
+
+/* Stubs to compile for all non-x86 archs */
+#define MBI_PMIC_BUS_ACCESS_BEGIN 1
+#define MBI_PMIC_BUS_ACCESS_END 2
+
+struct notifier_block;
+
+static inline void iosf_mbi_punit_acquire(void) {}
+static inline void iosf_mbi_punit_release(void) {}
+static inline void iosf_mbi_assert_punit_acquired(void) {}
+
+static inline
+int iosf_mbi_register_pmic_bus_access_notifier(struct notifier_block *nb)
+{
+ return 0;
+}
+
+static inline int
+iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(struct notifier_block
*nb)
+{
+ return 0;
+}
+
+static inline
+int iosf_mbi_unregister_pmic_bus_access_notifier(struct notifier_block *nb)
+{
+ return 0;
+}
+#endif
+
+#endif /* __I915_IOSF_MBI_H__ */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index e072054adac5..722910d02b5f 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -22,11 +22,11 @@
*/
#include
-#include
#include "gt/intel_lrc_reg.h" /* for shadow reg list */
#include "i915_drv.h"
+#include "i915_iosf_mbi.h"
#include "i915_trace.h"
#include "i915_vgpu.h"
#include "intel_pm.h"
diff --git a/drivers/gpu/drm/i915/vlv_sideband.c
b/drivers/gpu/drm/i915/vlv_sideband.c
index 35380738a951..ed2ac5752ac4 100644
--- a/drivers/gpu/drm/i915/vlv_sideband.c
+++ b/drivers/gpu/drm/i915/vlv_sideband.c
@@ -3,9 +3,8 @@
* Copyright © 2013-2021 Intel Corporation
*/
-#include
-
#include "i915_drv.h"
+#include "i915_iosf_mbi.h"
#include "vlv_sideband.h"
/*
--
2.33.0
[Intel-gfx] [PATCH] drm/i915: abstraction for iosf to compile on all archs
From: "Mullati, Siva"
As Non-x86 architectures won't get compiled asm\iosf,
abstarcting them to make compile for all archs.
Signed-off-by: Mullati, Siva
---
drivers/gpu/drm/i915/Kconfig | 2 +-
drivers/gpu/drm/i915/i915_iosf_mbi.h | 42
drivers/gpu/drm/i915/intel_uncore.c | 2 +-
drivers/gpu/drm/i915/vlv_sideband.c | 3 +-
4 files changed, 45 insertions(+), 4 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_iosf_mbi.h
diff --git a/drivers/gpu/drm/i915/Kconfig b/drivers/gpu/drm/i915/Kconfig
index bf041b26ffec..8bea99622dd5 100644
--- a/drivers/gpu/drm/i915/Kconfig
+++ b/drivers/gpu/drm/i915/Kconfig
@@ -21,7 +21,7 @@ config DRM_I915
select ACPI_VIDEO if ACPI
select ACPI_BUTTON if ACPI
select SYNC_FILE
- select IOSF_MBI
+ select IOSF_MBI if X86
select CRC32
select SND_HDA_I915 if SND_HDA_CORE
select CEC_CORE if CEC_NOTIFIER
diff --git a/drivers/gpu/drm/i915/i915_iosf_mbi.h
b/drivers/gpu/drm/i915/i915_iosf_mbi.h
new file mode 100644
index ..01eed11e4a94
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_iosf_mbi.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2013-2021 Intel Corporation
+ */
+
+#ifndef __I915_IOSF_MBI_H__
+#define __I915_IOSF_MBI_H__
+
+#if IS_ENABLED(CONFIG_IOSF_MBI)
+#include
+#else
+
+/* Stubs to compile for all non-x86 archs */
+#define MBI_PMIC_BUS_ACCESS_BEGIN 1
+#define MBI_PMIC_BUS_ACCESS_END 2
+
+struct notifier_block;
+
+static inline void iosf_mbi_punit_acquire(void) {}
+static inline void iosf_mbi_punit_release(void) {}
+static inline void iosf_mbi_assert_punit_acquired(void) {}
+
+static inline
+int iosf_mbi_register_pmic_bus_access_notifier(struct notifier_block *nb)
+{
+ return 0;
+}
+
+static inline int
+iosf_mbi_unregister_pmic_bus_access_notifier_unlocked(struct notifier_block
*nb)
+{
+ return 0;
+}
+
+static inline
+int iosf_mbi_unregister_pmic_bus_access_notifier(struct notifier_block *nb)
+{
+ return 0;
+}
+#endif
+
+#endif /* __I915_IOSF_MBI_H__ */
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index e072054adac5..722910d02b5f 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -22,11 +22,11 @@
*/
#include
-#include
#include "gt/intel_lrc_reg.h" /* for shadow reg list */
#include "i915_drv.h"
+#include "i915_iosf_mbi.h"
#include "i915_trace.h"
#include "i915_vgpu.h"
#include "intel_pm.h"
diff --git a/drivers/gpu/drm/i915/vlv_sideband.c
b/drivers/gpu/drm/i915/vlv_sideband.c
index 35380738a951..ed2ac5752ac4 100644
--- a/drivers/gpu/drm/i915/vlv_sideband.c
+++ b/drivers/gpu/drm/i915/vlv_sideband.c
@@ -3,9 +3,8 @@
* Copyright © 2013-2021 Intel Corporation
*/
-#include
-
#include "i915_drv.h"
+#include "i915_iosf_mbi.h"
#include "vlv_sideband.h"
/*
--
2.33.0
