[Intel-gfx] [RFC 2/2] drm/i915: Clean-up PPGTT on context destruction
From: Rafael Barbalho rafael.barba...@intel.com
With full PPGTT enabled an object's VMA entry into a PPGTT VM needs to be
cleaned up so that the PPGTT PDE PTE allocations can be freed.
This problem only shows up with full PPGTT because an object's VMA is
only cleaned-up when the object is destroyed. However, if the object has
been shared between multiple processes this may not happen, which leads to
references to the PPGTT still being kept the object was shared.
Under android the sharing of GEM objects is a fairly common operation, thus
the clean-up has to be more agressive.
Signed-off-by: Rafael Barbalho rafael.barba...@intel.com
Cc: Daniel Vetter dan...@ffwll.ch
Cc: Jon Bloomfield jon.bloomfi...@intel.com
---
drivers/gpu/drm/i915/i915_gem.c | 7 +++---
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 43 -
drivers/gpu/drm/i915/i915_gem_gtt.h | 7 ++
4 files changed, 54 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 60b8bd1..e509d89 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4529,11 +4529,12 @@ void i915_gem_vma_destroy(struct i915_vma *vma)
return;
vm = vma-vm;
+ list_del(vma-vma_link);
- if (!i915_is_ggtt(vm))
+ if (!i915_is_ggtt(vm)) {
+ list_del(vma-vm_link);
i915_ppgtt_put(i915_vm_to_ppgtt(vm));
-
- list_del(vma-vma_link);
+ }
kfree(vma);
}
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index a5221d8..4319a93 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -140,7 +140,7 @@ void i915_gem_context_free(struct kref *ctx_ref)
if (i915.enable_execlists)
intel_lr_context_free(ctx);
- i915_ppgtt_put(ctx-ppgtt);
+ i915_ppgtt_destroy(ctx-ppgtt);
if (ctx-legacy_hw_ctx.rcs_state)
drm_gem_object_unreference(ctx-legacy_hw_ctx.rcs_state-base);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 6f410cf..9ef2f67 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1097,6 +1097,7 @@ static int __hw_ppgtt_init(struct drm_device *dev, struct
i915_hw_ppgtt *ppgtt)
else
BUG();
}
+
int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
{
struct drm_i915_private *dev_priv = dev-dev_private;
@@ -1108,6 +1109,8 @@ int i915_ppgtt_init(struct drm_device *dev, struct
i915_hw_ppgtt *ppgtt)
drm_mm_init(ppgtt-base.mm, ppgtt-base.start,
ppgtt-base.total);
i915_init_vm(dev_priv, ppgtt-base);
+
+ INIT_LIST_HEAD(ppgtt-vma_list);
}
return ret;
@@ -1177,14 +1180,49 @@ void i915_ppgtt_release(struct kref *kref)
/* vmas should already be unbound */
WARN_ON(!list_empty(ppgtt-base.active_list));
WARN_ON(!list_empty(ppgtt-base.inactive_list));
+ WARN_ON(!list_empty(ppgtt-vma_list));
list_del(ppgtt-base.global_link);
drm_mm_takedown(ppgtt-base.mm);
ppgtt-base.cleanup(ppgtt-base);
+
kfree(ppgtt);
}
+void
+i915_ppgtt_destroy(struct i915_hw_ppgtt *ppgtt)
+{
+ struct i915_vma *vma, *tmp;
+ struct i915_address_space *vm;
+ int ret;
+
+ if (!ppgtt)
+ return;
+
+ vm = ppgtt-base;
+
+ /*
+* If this fires it means that the context reference counting went
+* awry.
+*/
+ WARN_ON(!list_empty(ppgtt-base.active_list));
+
+ if (!list_empty(ppgtt-vma_list))
+ list_for_each_entry_safe(vma, tmp, ppgtt-vma_list, vm_link) {
+ WARN_ON(vma-pin_count != 0);
+ /*
+* The object should be inactive at this point, thus
+* its pin_count should be 0. We will zero it anyway
+* make sure that the unbind call succeeds.
+*/
+ vma-pin_count = 0;
+ ret = i915_vma_unbind(vma);
+ }
+
+ i915_ppgtt_put(ppgtt);
+}
+
static void
ppgtt_bind_vma(struct i915_vma *vma,
enum i915_cache_level cache_level,
@@ -2109,6 +2147,7 @@ static struct i915_vma *__i915_gem_vma_create(struct
drm_i915_gem_object *obj,
return ERR_PTR(-ENOMEM);
INIT_LIST_HEAD(vma-vma_link);
+ INIT_LIST_HEAD(vma-vm_link);
INIT_LIST_HEAD(vma-mm_list);
INIT_LIST_HEAD(vma-exec_list);
vma-vm = vm;
@@ -2142,8 +2181,10 @@ static struct i915_vma *__i915_gem_vma_create(struct
drm_i915_gem_object *obj,
if (i915_is_ggtt(vm))
list_add(vma-vma_link, obj-vma_list
[Intel-gfx] [RFC 0/2] Contain PPGTT memory leak/usage in true PPGTT mode
From: Rafael Barbalho rafael.barba...@intel.com This particular memory leak, if I can call it that, shows itself when i915 is in true PPGTT mode and you share a buffer object to another hardware context using flink. In the failure case harware context A creates an object does some rendering to it, in turn mapping to its PPGTT, flinks it and then shares the object with hardware context B. Hardware context B then does some rendering operation with the share object, adding a VMA to its PPGTT address space, but it's eventually exited by the user. Because i915 doesn't clean-up an object's VMAs until the object is destroyed all the PPGTT memory allocations for hardware context B will still be kept a live because an object is still referencing it. When you repeat this sharing and re-using multiple times the system eventually runs out of memory because of all these PPGTT memory allocations for old contexts are still hanging around but will actually never be used again. I am also not seeing the shrinker coming in to reap this object because it is active in another hardware contexts. This naive attempt at fixing the issue is to clean-up the PPGTT entries when the context is destroyed. Patch 1 is what I used to help me track the issue and see the VM leak, patch 2 is the naive fix. Cc: Daniel Vetter dan...@ffwll.ch Cc: Jon Bloomfield jon.bloomfi...@intel.com Rafael Barbalho (2): drm/i915: Export active PPGTTs in debugfs drm/i915: Clean-up PPGTT on context destruction drivers/gpu/drm/i915/i915_debugfs.c | 41 +-- drivers/gpu/drm/i915/i915_gem.c | 7 +++--- drivers/gpu/drm/i915/i915_gem_context.c | 2 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 43 - drivers/gpu/drm/i915/i915_gem_gtt.h | 7 ++ 5 files changed, 82 insertions(+), 18 deletions(-) -- 2.3.0 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [RFC 1/2] drm/i915: Export active PPGTTs in debugfs
From: Rafael Barbalho rafael.barba...@intel.com
It's possible to gather up basic information on all active VMs.
Signed-off-by: Rafael Barbalho rafael.barba...@intel.com
Cc: Daniel Vetter dan...@ffwll.ch
Cc: Jon Bloomfield jon.bloomfi...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c | 41 +
1 file changed, 28 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 1467cc1..0bf10c0 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -125,7 +125,7 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object
*obj)
struct i915_vma *vma;
int pin_count = 0;
- seq_printf(m, %pK: %s%s%s %8zdKiB %02x %02x %u %u %u%s%s%s,
+ seq_printf(m, %p: %s%s%s %8zdKiB %02x %02x %u %u %u%s%s%s,
obj-base,
get_pin_flag(obj),
get_tiling_flag(obj),
@@ -2013,22 +2013,37 @@ static void gen8_ppgtt_info(struct seq_file *m, struct
drm_device *dev)
struct drm_i915_private *dev_priv = dev-dev_private;
struct intel_engine_cs *ring;
struct i915_hw_ppgtt *ppgtt = dev_priv-mm.aliasing_ppgtt;
+ struct i915_address_space *vm;
int unused, i;
- if (!ppgtt)
- return;
- seq_printf(m, Page directories: %d\n, ppgtt-num_pd_pages);
- seq_printf(m, Page tables: %d\n, ppgtt-num_pd_entries);
- for_each_ring(ring, dev_priv, unused) {
- seq_printf(m, %s\n, ring-name);
- for (i = 0; i 4; i++) {
- u32 offset = 0x270 + i * 8;
- u64 pdp = I915_READ(ring-mmio_base + offset + 4);
- pdp = 32;
- pdp |= I915_READ(ring-mmio_base + offset);
- seq_printf(m, \tPDP%d 0x%016llx\n, i, pdp);
+ if (ppgtt) {
+ seq_printf(m, Page directories: %d\n, ppgtt-num_pd_pages);
+ seq_printf(m, Page tables: %d\n, ppgtt-num_pd_entries);
+ for_each_ring(ring, dev_priv, unused) {
+ seq_printf(m, %s\n, ring-name);
+ for (i = 0; i 4; i++) {
+ u32 offset = 0x270 + i * 8;
+ u64 pdp = I915_READ(ring-mmio_base + offset +
4);
+ pdp = 32;
+ pdp |= I915_READ(ring-mmio_base + offset);
+ seq_printf(m, \tPDP%d 0x%016llx\n, i, pdp);
+ }
+ }
+ } else {
+ i = 0;
+ list_for_each_entry(vm, dev_priv-vm_list, global_link) {
+ if (i915_is_ggtt(vm))
+ continue;
+ i++;
+ ppgtt = i915_vm_to_ppgtt(vm);
+ seq_printf(m, PPGTT %p - references\n, ppgtt);
+ seq_printf(m, Page directories: %d\n,
+ ppgtt-num_pd_pages);
+ seq_printf(m, Page tables: %d\n,
+ ppgtt-num_pd_entries);
}
+ seq_printf(m, Number of PPGTTs active: %d\n, i);
}
}
--
2.3.0
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Correctly read backlight PWM for pipe B on vlv/chv
From: Rafael Barbalho rafael.barba...@intel.com
Make the vlv/chv backlight setup more generic by actually looking at which
pipe the panel is attached to and read the backlight PWM registers that were
setup by the bios from that pipe.
Cc: Ville Syrjälä ville.syrj...@linux.intel.com
Signed-off-by: Rafael Barbalho rafael.barba...@intel.com
---
drivers/gpu/drm/i915/intel_panel.c | 24 ++--
1 file changed, 10 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_panel.c
b/drivers/gpu/drm/i915/intel_panel.c
index 59b028f..be75d76 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1200,32 +1200,28 @@ static int vlv_setup_backlight(struct intel_connector
*connector)
struct drm_device *dev = connector-base.dev;
struct drm_i915_private *dev_priv = dev-dev_private;
struct intel_panel *panel = connector-panel;
- enum pipe pipe;
+ enum pipe pipe = intel_get_pipe_from_connector(connector);
u32 ctl, ctl2, val;
- for_each_pipe(pipe) {
- u32 cur_val = I915_READ(VLV_BLC_PWM_CTL(pipe));
+ ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
+ panel-backlight.active_low_pwm = ctl2 BLM_POLARITY_I965;
- /* Skip if the modulation freq is already set */
- if (cur_val ~BACKLIGHT_DUTY_CYCLE_MASK)
- continue;
+ ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
- cur_val = BACKLIGHT_DUTY_CYCLE_MASK;
- I915_WRITE(VLV_BLC_PWM_CTL(pipe), (0xf42 16) |
- cur_val);
+ /* Skip if the modulation freq is already set */
+ if ((ctl ~BACKLIGHT_DUTY_CYCLE_MASK) == 0) {
+ ctl = BACKLIGHT_DUTY_CYCLE_MASK;
+ ctl |= (0xf42 16);
+ I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
}
- ctl2 = I915_READ(VLV_BLC_PWM_CTL2(PIPE_A));
- panel-backlight.active_low_pwm = ctl2 BLM_POLARITY_I965;
-
- ctl = I915_READ(VLV_BLC_PWM_CTL(PIPE_A));
panel-backlight.max = ctl 16;
if (!panel-backlight.max)
return -ENODEV;
panel-backlight.min = get_backlight_min_vbt(connector);
- val = _vlv_get_backlight(dev, PIPE_A);
+ val = _vlv_get_backlight(dev, pipe);
panel-backlight.level = intel_panel_compute_brightness(connector, val);
panel-backlight.enabled = (ctl2 BLM_PWM_ENABLE)
--
2.0.3
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Fix read back of plane stride register
From: Rafael Barbalho rafael.barba...@intel.com According to the specifications bit 6 is actually valid in the stride register. Cc: Jesse Barnes jbar...@virtuousgeek.org Cc: Ville Syrjälä ville.syrj...@linux.intel.com Signed-off-by: Rafael Barbalho rafael.barba...@intel.com --- drivers/gpu/drm/i915/intel_display.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 99eb7ca..52dab31 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -6221,7 +6221,7 @@ static void i9xx_get_plane_config(struct intel_crtc *crtc, crtc-base.primary-fb-height = ((val 0) 0xfff) + 1; val = I915_READ(DSPSTRIDE(pipe)); - crtc-base.primary-fb-pitches[0] = val 0xff80; + crtc-base.primary-fb-pitches[0] = val 0xffc0; aligned_height = intel_align_height(dev, crtc-base.primary-fb-height, plane_config-tiled); @@ -7241,7 +7241,7 @@ static void ironlake_get_plane_config(struct intel_crtc *crtc, crtc-base.primary-fb-height = ((val 0) 0xfff) + 1; val = I915_READ(DSPSTRIDE(pipe)); - crtc-base.primary-fb-pitches[0] = val 0xff80; + crtc-base.primary-fb-pitches[0] = val 0xffc0; aligned_height = intel_align_height(dev, crtc-base.primary-fb-height, plane_config-tiled); -- 2.0.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Fix crash when failing to parse MIPI VBT
From: Rafael Barbalho rafael.barba...@intel.com This particular nasty presented itself while trying to register the intelfb device (intel_fbdev.c). During the process of registering the device the driver will disable the crtc via i9xx_crtc_disable. These will also disable the panel using the generic mipi panel functions in dsi_mod_vbt_generic.c. The stale MIPI generic data sequence pointers would cause a crash within those functions. However, all of this is happening while console_lock is held from do_register_framebuffer inside fbcon.c. Which means that you got kernel log and just the device appearing to reboot/hang for no apparent reason. The fault started from the FB_EVENT_FB_REGISTERED event using the fb_notifier_call_chain call in fbcon.c. Cc: Shobhit Kumar shobhit.ku...@intel.com Signed-off-by: Rafael Barbalho rafael.barba...@intel.com --- drivers/gpu/drm/i915/intel_bios.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 608ed30..a669550 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c @@ -878,7 +878,7 @@ err: /* error during parsing so set all pointers to null * because of partial parsing */ - memset(dev_priv-vbt.dsi.sequence, 0, MIPI_SEQ_MAX); + memset(dev_priv-vbt.dsi.sequence, 0, sizeof(dev_priv-vbt.dsi.sequence)); } static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port, -- 2.0.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 3/5] android: Add makefile for the lib directory
From: Rafael Barbalho rafael.barba...@intel.com The lib directory should really be compiled as a static library on its own and be re-used by any tests or tools that require it. Signed-off-by: Rafael Barbalho rafael.barba...@intel.com --- lib/Android.mk | 31 +++ 1 file changed, 31 insertions(+) create mode 100644 lib/Android.mk diff --git a/lib/Android.mk b/lib/Android.mk new file mode 100644 index 000..23c7d42 --- /dev/null +++ b/lib/Android.mk @@ -0,0 +1,31 @@ +LOCAL_PATH := $(call my-dir) + +include $(LOCAL_PATH)/Makefile.sources + +skip_lib_list := \ +igt_kms.c \ +igt_kms.h + +lib_list := $(filter-out $(skip_lib_list),$(libintel_tools_la_SOURCES)) + +include $(CLEAR_VARS) + +LOCAL_SRC_FILES := $(lib_list) + +LOCAL_C_INCLUDES += \ + $(LOCAL_PATH)/.. + +LOCAL_EXPORT_C_INCLUDE_DIRS += $(LOCAL_PATH) + +LOCAL_CFLAGS += -DHAVE_LIBDRM_ATOMIC_PRIMITIVES +LOCAL_CFLAGS += -DHAVE_STRUCT_SYSINFO_TOTALRAM +LOCAL_CFLAGS += -DANDROID +LOCAL_CFLAGS += -std=c99 +LOCAL_MODULE:= libintel_gpu_tools + +LOCAL_SHARED_LIBRARIES := libpciaccess \ + libdrm\ + libdrm_intel + +include $(BUILD_STATIC_LIBRARY) + -- 1.8.5.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/5] android: Handle the case when android doesn't have mmap64
From: Rafael Barbalho rafael.barba...@intel.com
Not all versions of Android have the mmap64 call, thus a suitable alternative
must be called.
Signed-off-by: Rafael Barbalho rafael.barba...@intel.com
---
lib/intel_gpu_tools.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/lib/intel_gpu_tools.h b/lib/intel_gpu_tools.h
index b242243..1ae1bab 100644
--- a/lib/intel_gpu_tools.h
+++ b/lib/intel_gpu_tools.h
@@ -35,6 +35,17 @@
#include intel_chipset.h
#include intel_reg.h
+#ifdef ANDROID
+#ifndef HAVE_MMAP64
+extern void* __mmap2(void *, size_t, int, int, int, off_t);
+static inline void *mmap64(void *addr, size_t length, int prot, int flags,
+int fd, off64_t offset)
+{
+return __mmap2(addr, length, prot, flags, fd, offset 12);
+}
+#endif
+#endif
+
#define ARRAY_SIZE(arr) (sizeof(arr)/sizeof(arr[0]))
extern void *mmio;
--
1.8.5.2
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/5] android: Clean-up common makefile directives
From: Rafael Barbalho rafael.barba...@intel.com All the Android.mk files had the same directives to find the path of libdrm libpciaccess. These are no longer required as the android system now allows the libraries being used to export include paths to dependant modules programs. Signed-off-by: Rafael Barbalho rafael.barba...@intel.com --- tests/Android.mk | 20 +--- tools/Android.mk | 20 +--- 2 files changed, 2 insertions(+), 38 deletions(-) diff --git a/tests/Android.mk b/tests/Android.mk index abccb7f..0e292a9 100644 --- a/tests/Android.mk +++ b/tests/Android.mk @@ -1,21 +1,6 @@ include $(LOCAL_PATH)/tests/Makefile.sources include $(LOCAL_PATH)/lib/Makefile.sources -LIBPCIACCESS_PATH := $(firstword $(wildcard \ - $(TOP)/external/PRIVATE/libpciaccess \ - $(TOP)/hardware/intel/libpciaccess\ - $(TOP)/external/libpciaccess)) -ifeq ($(LIBPCIACCESS_PATH),) - $(error Unable to find libpciaccess!) -endif - -LIBDRM_PATH := $(firstword $(wildcard \ - $(TOP)/external/PRIVATE/drm \ - $(TOP)/external/drm)) -ifeq ($(LIBDRM_PATH),) - $(error Unable to find libdrm!) -endif - skip_lib_list := \ igt_kms.c \ igt_kms.h @@ -65,10 +50,7 @@ define add_test $(LOCAL_PATH)/config.h LOCAL_C_INCLUDES += \ - $(LOCAL_PATH)/lib \ - $(LIBDRM_PATH)/include/drm\ - $(LIBDRM_PATH)/intel \ - $(LIBPCIACCESS_PATH)/include + $(LOCAL_PATH)/lib LOCAL_CFLAGS += -DHAVE_STRUCT_SYSINFO_TOTALRAM LOCAL_CFLAGS += -DANDROID -UNDEBUG -include check-ndebug.h diff --git a/tools/Android.mk b/tools/Android.mk index 99c39b7..7227c89 100644 --- a/tools/Android.mk +++ b/tools/Android.mk @@ -1,21 +1,6 @@ include $(LOCAL_PATH)/tools/Makefile.sources include $(LOCAL_PATH)/lib/Makefile.sources -LIBPCIACCESS_PATH := $(firstword $(wildcard \ - $(TOP)/external/PRIVATE/libpciaccess \ - $(TOP)/hardware/intel/libpciaccess\ - $(TOP)/external/libpciaccess)) -ifeq ($(LIBPCIACCESS_PATH),) - $(error Unable to find libpciaccess!) -endif - -LIBDRM_PATH := $(firstword $(wildcard \ - $(TOP)/external/PRIVATE/drm \ - $(TOP)/external/drm)) -ifeq ($(LIBDRM_PATH),) - $(error Unable to find libdrm!) -endif - skip_lib_list := \ igt_kms.c \ igt_kms.h @@ -33,10 +18,7 @@ define add_tool $(LIB_SOURCES) LOCAL_C_INCLUDES += \ - $(LOCAL_PATH)/lib \ - $(LIBDRM_PATH)/include/drm\ - $(LIBDRM_PATH)/intel \ - $(LIBPCIACCESS_PATH)/include + $(LOCAL_PATH)/lib LOCAL_CFLAGS += -DHAVE_TERMIOS_H LOCAL_CFLAGS += -DHAVE_STRUCT_SYSINFO_TOTALRAM -- 1.8.5.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 4/5] android: Add the generation of vesion.h config.h to lib
From: Rafael Barbalho rafael.barba...@intel.com The lib directory is used by all the tests tools so it should really be the place where the generate files are created. Signed-off-by: Rafael Barbalho rafael.barba...@intel.com --- lib/Android.mk | 33 + 1 file changed, 33 insertions(+) diff --git a/lib/Android.mk b/lib/Android.mk index 23c7d42..724d884 100644 --- a/lib/Android.mk +++ b/lib/Android.mk @@ -1,5 +1,34 @@ LOCAL_PATH := $(call my-dir) +GPU_TOOLS_PATH := $(LOCAL_PATH)/.. + +.PHONY: version.h.tmp + +$(GPU_TOOLS_PATH)/version.h.tmp: + @touch $@ + @if test -d ../.git; then \ + if which git /dev/null; then git log -n 1 --oneline | \ + sed 's/^\([^ ]*\) .*/#define IGT_GIT_SHA1 g\1/' \ +$@ ; \ + fi \ + else \ + echo '#define IGT_GIT_SHA1 NOT-GIT' $@ ; \ + fi + +$(GPU_TOOLS_PATH)/version.h: $(GPU_TOOLS_PATH)/version.h.tmp + @echo updating version.h + @if ! cmp -s $(GPU_TOOLS_PATH)/version.h.tmp $(GPU_TOOLS_PATH)/version.h; then \ + mv $(GPU_TOOLS_PATH)/version.h.tmp $(GPU_TOOLS_PATH)/version.h ; \ + else \ + rm $(GPU_TOOLS_PATH)/version.h.tmp ; \ + fi + +# FIXME: autogenerate this info # +$(GPU_TOOLS_PATH)/config.h: + @echo updating config.h + @echo '#define PACKAGE_VERSION 1.5' $@ ; \ + echo '#define TARGET_CPU_PLATFORM android-ia' $@ ; + include $(LOCAL_PATH)/Makefile.sources skip_lib_list := \ @@ -12,6 +41,10 @@ include $(CLEAR_VARS) LOCAL_SRC_FILES := $(lib_list) +LOCAL_GENERATED_SOURCES := \ + $(GPU_TOOLS_PATH)/version.h \ + $(GPU_TOOLS_PATH)/config.h + LOCAL_C_INCLUDES += \ $(LOCAL_PATH)/.. -- 1.8.5.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 5/5] android: Change tests tools directory to use the lib directory
From: Rafael Barbalho rafael.barba...@intel.com Instead of recompiling the lib directory for every tool or tests we can just re-use the static library. This also has the nice side effect of fixing the android mm command to allow android users to only rebuild the local changes in either the test or tools directory. Signed-off-by: Rafael Barbalho rafael.barba...@intel.com --- Android.mk | 5 + lib/Android.mk | 2 +- tests/Android.mk | 51 +-- tools/Android.mk | 19 +-- 4 files changed, 12 insertions(+), 65 deletions(-) diff --git a/Android.mk b/Android.mk index 7b42d10..8aeb2d4 100644 --- a/Android.mk +++ b/Android.mk @@ -1,5 +1,2 @@ -LOCAL_PATH := $(call my-dir) - -include $(LOCAL_PATH)/tests/Android.mk -include $(LOCAL_PATH)/tools/Android.mk +include $(call all-named-subdir-makefiles, lib tests tools) diff --git a/lib/Android.mk b/lib/Android.mk index 724d884..6735255 100644 --- a/lib/Android.mk +++ b/lib/Android.mk @@ -48,7 +48,7 @@ LOCAL_GENERATED_SOURCES := \ LOCAL_C_INCLUDES += \ $(LOCAL_PATH)/.. -LOCAL_EXPORT_C_INCLUDE_DIRS += $(LOCAL_PATH) +LOCAL_EXPORT_C_INCLUDE_DIRS := $(LOCAL_PATH) LOCAL_CFLAGS += -DHAVE_LIBDRM_ATOMIC_PRIMITIVES LOCAL_CFLAGS += -DHAVE_STRUCT_SYSINFO_TOTALRAM diff --git a/tests/Android.mk b/tests/Android.mk index 0e292a9..30be4a6 100644 --- a/tests/Android.mk +++ b/tests/Android.mk @@ -1,56 +1,13 @@ -include $(LOCAL_PATH)/tests/Makefile.sources -include $(LOCAL_PATH)/lib/Makefile.sources +LOCAL_PATH := $(call my-dir) -skip_lib_list := \ -igt_kms.c \ -igt_kms.h - -lib_list := $(filter-out $(skip_lib_list),$(libintel_tools_la_SOURCES)) -LIB_SOURCES := $(addprefix lib/,$(lib_list)) -GPU_TOOLS_PATH := $(LOCAL_PATH) - -.PHONY: version.h.tmp - -$(LOCAL_PATH)/version.h.tmp: - @touch $@ - @if test -d .git; then \ - if which git /dev/null; then git log -n 1 --oneline | \ - sed 's/^\([^ ]*\) .*/#define IGT_GIT_SHA1 g\1/' \ -$@ ; \ - fi \ - else \ - echo '#define IGT_GIT_SHA1 NOT-GIT' $@ ; \ - fi - -$(LOCAL_PATH)/version.h: $(LOCAL_PATH)/version.h.tmp - @echo updating version.h - @if ! cmp -s $(GPU_TOOLS_PATH)/version.h.tmp $(GPU_TOOLS_PATH)/version.h; then \ - mv $(GPU_TOOLS_PATH)/version.h.tmp $(GPU_TOOLS_PATH)/version.h ; \ - else \ - rm $(GPU_TOOLS_PATH)/version.h.tmp ; \ - fi - -# FIXME: autogenerate this info # -$(LOCAL_PATH)/config.h: - @echo updating config.h - echo '#define PACKAGE_VERSION 1.5' $@ ; \ - echo '#define TARGET_CPU_PLATFORM android-ia' $@ ; +include $(LOCAL_PATH)/Makefile.sources ## define add_test include $(CLEAR_VARS) -LOCAL_SRC_FILES := \ - tests/$1.c \ - $(LIB_SOURCES) - -LOCAL_GENERATED_SOURCES := \ - $(LOCAL_PATH)/version.h \ - $(LOCAL_PATH)/config.h - -LOCAL_C_INCLUDES += \ - $(LOCAL_PATH)/lib +LOCAL_SRC_FILES := $1.c LOCAL_CFLAGS += -DHAVE_STRUCT_SYSINFO_TOTALRAM LOCAL_CFLAGS += -DANDROID -UNDEBUG -include check-ndebug.h @@ -63,6 +20,8 @@ define add_test LOCAL_MODULE := $1 LOCAL_MODULE_TAGS := optional +LOCAL_STATIC_LIBRARIES := libintel_gpu_tools + LOCAL_SHARED_LIBRARIES := libpciaccess \ libdrm\ libdrm_intel diff --git a/tools/Android.mk b/tools/Android.mk index 7227c89..a957ec1 100644 --- a/tools/Android.mk +++ b/tools/Android.mk @@ -1,24 +1,13 @@ -include $(LOCAL_PATH)/tools/Makefile.sources -include $(LOCAL_PATH)/lib/Makefile.sources +LOCAL_PATH := $(call my-dir) -skip_lib_list := \ -igt_kms.c \ -igt_kms.h - -lib_list := $(filter-out $(skip_lib_list),$(libintel_tools_la_SOURCES)) -LIB_SOURCES := $(addprefix lib/,$(lib_list)) +include $(LOCAL_PATH)/Makefile.sources ## define add_tool include $(CLEAR_VARS) -LOCAL_SRC_FILES := \ - tools/$1.c \ - $(LIB_SOURCES) - -LOCAL_C_INCLUDES += \ - $(LOCAL_PATH)/lib +LOCAL_SRC_FILES := $1.c LOCAL_CFLAGS += -DHAVE_TERMIOS_H LOCAL_CFLAGS += -DHAVE_STRUCT_SYSINFO_TOTALRAM @@ -32,6 +21,8 @@ define add_tool LOCAL_MODULE := $1 LOCAL_MODULE_TAGS := optional +LOCAL_STATIC_LIBRARIES := libintel_gpu_tools + LOCAL_SHARED_LIBRARIES := libpciaccess \ libdrm\ libdrm_intel -- 1.8.5.2 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] tests/gem_reloc_overflow: Add gen8+ specifc tests
From: Rafael Barbalho rafael.barba...@intel.com
Broadwell introduces 64-bit relocation addresses which add extra
corner cases. The test was refactored slightly with some tests that
were in the source offset tests were moved to the more generic reloc
test area. The source offset tests are now gen aware and called twice to
test both cpu gtt relocation paths. In addition 2 new gen8+ test
were added to the test:
* Relocation straddling page a page
* Insufficient space for a relocation at the end of the buffer.
Signed-off-by: Rafael Barbalho rafael.barba...@intel.com
Conflicts:
tests/gem_reloc_overflow.c
---
tests/gem_reloc_overflow.c | 148 +++--
1 file changed, 103 insertions(+), 45 deletions(-)
diff --git a/tests/gem_reloc_overflow.c b/tests/gem_reloc_overflow.c
index f7ba1d7..38ad2a5 100644
--- a/tests/gem_reloc_overflow.c
+++ b/tests/gem_reloc_overflow.c
@@ -24,6 +24,7 @@
* Authors:
*Kees Cook keesc...@chromium.org
*Daniel Vetter daniel.vet...@ffwll.ch
+ *Rafael Barbalho rafael.barba...@intel.com
*
*/
@@ -60,13 +61,14 @@ struct drm_i915_gem_relocation_entry *reloc;
uint32_t handle;
uint32_t batch_handle;
-
-static void source_offset_tests(void)
+static void source_offset_tests(int devid, bool reloc_gtt)
{
struct drm_i915_gem_relocation_entry single_reloc;
+ char *dst_gtt;
+ char *relocation_type;
igt_fixture {
- handle = gem_create(fd, 4096);
+ handle = gem_create(fd, 8192);
execobjs[1].handle = batch_handle;
execobjs[1].relocation_count = 0;
@@ -76,21 +78,70 @@ static void source_offset_tests(void)
execobjs[0].relocation_count = 1;
execobjs[0].relocs_ptr = (uintptr_t) single_reloc;
execbuf.buffer_count = 2;
+
+ if (reloc_gtt) {
+ dst_gtt = gem_mmap(fd, handle, 8192, PROT_READ |
PROT_WRITE);
+ igt_assert(dst_gtt != MAP_FAILED);
+ gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT,
I915_GEM_DOMAIN_GTT);
+ memset(dst_gtt, 0, 8192);
+ munmap(dst_gtt, 8192);
+ relocation_type = reloc-gtt;
+ } else {
+ relocation_type = reloc-cpu;
+ }
}
- igt_subtest(source-offset-end) {
- single_reloc.offset = 4096 - 4;
- single_reloc.delta = 0;
- single_reloc.target_handle = handle;
- single_reloc.read_domains = I915_GEM_DOMAIN_RENDER;
- single_reloc.write_domain = I915_GEM_DOMAIN_RENDER;
- single_reloc.presumed_offset = 0;
+ if (intel_gen(devid) = 8) {
+ igt_subtest_f(source-offset-page-stradle-gen8+-%s,
relocation_type) {
+ single_reloc.offset = 4096 - 4;
+ single_reloc.delta = 0;
+ single_reloc.target_handle = handle;
+ single_reloc.read_domains = I915_GEM_DOMAIN_RENDER;
+ single_reloc.write_domain = I915_GEM_DOMAIN_RENDER;
+ single_reloc.presumed_offset = 0;
+
+ igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
execbuf) == 0);
+ single_reloc.delta = 1024;
+ igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
execbuf) == 0);
+ }
- igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf)
== 0);
+ igt_subtest_f(source-offset-end-gen8+-%s, relocation_type) {
+ single_reloc.offset = 8192 - 8;
+ single_reloc.delta = 0;
+ single_reloc.target_handle = handle;
+ single_reloc.read_domains = I915_GEM_DOMAIN_RENDER;
+ single_reloc.write_domain = I915_GEM_DOMAIN_RENDER;
+ single_reloc.presumed_offset = 0;
+
+ igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
execbuf) == 0);
+ }
+
+ igt_subtest_f(source-offset-overflow-gen8+-%s,
relocation_type) {
+ single_reloc.offset = 8192 - 4;
+ single_reloc.delta = 0;
+ single_reloc.target_handle = handle;
+ single_reloc.read_domains = I915_GEM_DOMAIN_RENDER;
+ single_reloc.write_domain = I915_GEM_DOMAIN_RENDER;
+ single_reloc.presumed_offset = 0;
+
+ igt_assert(ioctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2,
execbuf) != 0);
+ igt_assert(errno == EINVAL);
+ }
+ } else {
+ igt_subtest_f(source-offset-end-%s, relocation_type) {
+ single_reloc.offset = 8192 - 4;
+ single_reloc.delta = 0
[Intel-gfx] [PATCH] drm/i915: Cleaning up the relocate entry function
From: Rafael Barbalho rafael.barba...@intel.com
As the relocate entry function was getting a bit too big I've moved
the code that used to use either the cpu or the gtt to for the
relocation into two separate functions.
Signed-off-by: Rafael Barbalho rafael.barba...@intel.com
---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 88 ++
1 file changed, 54 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 9b3b5f8..fa82396 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -208,6 +208,56 @@ static inline int use_cpu_reloc(struct drm_i915_gem_object
*obj)
}
static int
+relocate_entry_cpu(struct drm_i915_gem_object *obj,
+ struct drm_i915_gem_relocation_entry *reloc)
+{
+ uint32_t page_offset = offset_in_page(reloc-offset);
+ char *vaddr;
+ int ret = -EINVAL;
+
+ ret = i915_gem_object_set_to_cpu_domain(obj, 1);
+ if (ret)
+ return ret;
+
+ vaddr = kmap_atomic(i915_gem_object_get_page(obj,
+ reloc-offset PAGE_SHIFT));
+ *(uint32_t *)(vaddr + page_offset) = reloc-delta;
+ kunmap_atomic(vaddr);
+
+ return 0;
+}
+
+static int
+relocate_entry_gtt(struct drm_i915_gem_object *obj,
+ struct drm_i915_gem_relocation_entry *reloc)
+{
+ struct drm_device *dev = obj-base.dev;
+ struct drm_i915_private *dev_priv = dev-dev_private;
+ uint32_t __iomem *reloc_entry;
+ void __iomem *reloc_page;
+ int ret = -EINVAL;
+
+ ret = i915_gem_object_set_to_gtt_domain(obj, true);
+ if (ret)
+ return ret;
+
+ ret = i915_gem_object_put_fence(obj);
+ if (ret)
+ return ret;
+
+ /* Map the page containing the relocation we're going to perform. */
+ reloc-offset += i915_gem_obj_ggtt_offset(obj);
+ reloc_page = io_mapping_map_atomic_wc(dev_priv-gtt.mappable,
+ reloc-offset PAGE_MASK);
+ reloc_entry = (uint32_t __iomem *)
+ (reloc_page + offset_in_page(reloc-offset));
+ iowrite32(reloc-delta, reloc_entry);
+ io_mapping_unmap_atomic(reloc_page);
+
+ return 0;
+}
+
+static int
i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
struct eb_vmas *eb,
struct drm_i915_gem_relocation_entry *reloc,
@@ -293,40 +343,10 @@ i915_gem_execbuffer_relocate_entry(struct
drm_i915_gem_object *obj,
return -EFAULT;
reloc-delta += target_offset;
- if (use_cpu_reloc(obj)) {
- uint32_t page_offset = offset_in_page(reloc-offset);
- char *vaddr;
-
- ret = i915_gem_object_set_to_cpu_domain(obj, 1);
- if (ret)
- return ret;
-
- vaddr = kmap_atomic(i915_gem_object_get_page(obj,
-reloc-offset
PAGE_SHIFT));
- *(uint32_t *)(vaddr + page_offset) = reloc-delta;
- kunmap_atomic(vaddr);
- } else {
- struct drm_i915_private *dev_priv = dev-dev_private;
- uint32_t __iomem *reloc_entry;
- void __iomem *reloc_page;
-
- ret = i915_gem_object_set_to_gtt_domain(obj, true);
- if (ret)
- return ret;
-
- ret = i915_gem_object_put_fence(obj);
- if (ret)
- return ret;
-
- /* Map the page containing the relocation we're going to
perform. */
- reloc-offset += i915_gem_obj_ggtt_offset(obj);
- reloc_page = io_mapping_map_atomic_wc(dev_priv-gtt.mappable,
- reloc-offset
PAGE_MASK);
- reloc_entry = (uint32_t __iomem *)
- (reloc_page + offset_in_page(reloc-offset));
- iowrite32(reloc-delta, reloc_entry);
- io_mapping_unmap_atomic(reloc_page);
- }
+ if (use_cpu_reloc(obj))
+ ret = relocate_entry_cpu(obj, reloc);
+ else
+ ret = relocate_entry_gtt(obj, reloc);
/* and update the user's relocation entry */
reloc-presumed_offset = target_offset;
--
1.8.3.4
-
Intel Corporation (UK) Limited
Registered No. 1134945 (England)
Registered Office: Pipers Way, Swindon SN3 1RJ
VAT No: 860 2173 47
This e-mail and any attachments may contain confidential material for
the sole use of the intended recipient(s). Any review or distribution
by others is strictly prohibited. If you are not the intended
recipient, please contact the sender and delete all copies.
___
Intel-gfx mailing
