Re: [Intel-gfx] [BXT MIPI PATCH v3 01/14] drm/i915/bxt: Initialize MIPI for BXT

2015-09-23 Thread Daniel Vetter 
On Fri, Sep 18, 2015 at 03:17:51PM +0300, Jani Nikula wrote:
> On Tue, 01 Sep 2015, Uma Shankar  wrote:
> > From: Shashank Sharma 
> >
> > This patch contains following changes:
> > 1. Add BXT MIPI display address base.
> > 2. Call dsi_init from display_setup function.
> >
> > v2: Rebased on latest nightly branch
> >
> > Signed-off-by: Shashank Sharma 
> > Signed-off-by: Uma Shankar 
> 
> I'm not sure if this should be applied as the first patch or not, but

Enabling patch should be last to avoid fireworks shows. I'll reorder while
applying since this isn't the first patch series today with this problem
;-)

Cheers, Daniel

> 
> Reviewed-by: Jani Nikula 
> 
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h  |1 +
> >  drivers/gpu/drm/i915/intel_display.c |3 +++
> >  drivers/gpu/drm/i915/intel_dsi.c |2 ++
> >  3 files changed, 6 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h 
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index 2030f60..621151b 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -1641,6 +1641,7 @@ enum skl_disp_power_wells {
> >  
> >  #define VLV_DISPLAY_BASE 0x18
> >  #define VLV_MIPI_BASE VLV_DISPLAY_BASE
> > +#define BXT_MIPI_BASE 0x6
> >  
> >  #define VLV_GU_CTL0(VLV_DISPLAY_BASE + 0x2030)
> >  #define VLV_GU_CTL1(VLV_DISPLAY_BASE + 0x2034)
> > diff --git a/drivers/gpu/drm/i915/intel_display.c 
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 87476ff..b8e0310 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -13906,6 +13906,9 @@ static void intel_setup_outputs(struct drm_device 
> > *dev)
> >  * DDI_BUF_CTL_A or SFUSE_STRAP registers, find another way to
> >  * detect the ports.
> >  */
> > +   /* Initialize MIPI for BXT */
> > +   intel_dsi_init(dev);
> > +
> > intel_ddi_init(dev, PORT_A);
> > intel_ddi_init(dev, PORT_B);
> > intel_ddi_init(dev, PORT_C);
> > diff --git a/drivers/gpu/drm/i915/intel_dsi.c 
> > b/drivers/gpu/drm/i915/intel_dsi.c
> > index b5a5558..b59b828 100644
> > --- a/drivers/gpu/drm/i915/intel_dsi.c
> > +++ b/drivers/gpu/drm/i915/intel_dsi.c
> > @@ -998,6 +998,8 @@ void intel_dsi_init(struct drm_device *dev)
> >  
> > if (IS_VALLEYVIEW(dev)) {
> > dev_priv->mipi_mmio_base = VLV_MIPI_BASE;
> > +   } else if (IS_BROXTON(dev)) {
> > +   dev_priv->mipi_mmio_base = BXT_MIPI_BASE;
> > } else {
> > DRM_ERROR("Unsupported Mipi device to reg base");
> > return;
> > -- 
> > 1.7.9.5
> >
> 
> -- 
> Jani Nikula, Intel Open Source Technology Center
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Re: [Intel-gfx] [BXT MIPI PATCH v3 01/14] drm/i915/bxt: Initialize MIPI for BXT

2015-09-18 Thread Jani Nikula 
On Tue, 01 Sep 2015, Uma Shankar  wrote:
> From: Shashank Sharma 
>
> This patch contains following changes:
> 1. Add BXT MIPI display address base.
> 2. Call dsi_init from display_setup function.
>
> v2: Rebased on latest nightly branch
>
> Signed-off-by: Shashank Sharma 
> Signed-off-by: Uma Shankar 

I'm not sure if this should be applied as the first patch or not, but

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/i915_reg.h  |1 +
>  drivers/gpu/drm/i915/intel_display.c |3 +++
>  drivers/gpu/drm/i915/intel_dsi.c |2 ++
>  3 files changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 2030f60..621151b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1641,6 +1641,7 @@ enum skl_disp_power_wells {
>  
>  #define VLV_DISPLAY_BASE 0x18
>  #define VLV_MIPI_BASE VLV_DISPLAY_BASE
> +#define BXT_MIPI_BASE 0x6
>  
>  #define VLV_GU_CTL0  (VLV_DISPLAY_BASE + 0x2030)
>  #define VLV_GU_CTL1  (VLV_DISPLAY_BASE + 0x2034)
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 87476ff..b8e0310 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -13906,6 +13906,9 @@ static void intel_setup_outputs(struct drm_device 
> *dev)
>* DDI_BUF_CTL_A or SFUSE_STRAP registers, find another way to
>* detect the ports.
>*/
> + /* Initialize MIPI for BXT */
> + intel_dsi_init(dev);
> +
>   intel_ddi_init(dev, PORT_A);
>   intel_ddi_init(dev, PORT_B);
>   intel_ddi_init(dev, PORT_C);
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c 
> b/drivers/gpu/drm/i915/intel_dsi.c
> index b5a5558..b59b828 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -998,6 +998,8 @@ void intel_dsi_init(struct drm_device *dev)
>  
>   if (IS_VALLEYVIEW(dev)) {
>   dev_priv->mipi_mmio_base = VLV_MIPI_BASE;
> + } else if (IS_BROXTON(dev)) {
> + dev_priv->mipi_mmio_base = BXT_MIPI_BASE;
>   } else {
>   DRM_ERROR("Unsupported Mipi device to reg base");
>   return;
> -- 
> 1.7.9.5
>

-- 
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[Intel-gfx] [BXT MIPI PATCH v3 01/14] drm/i915/bxt: Initialize MIPI for BXT

2015-09-01 Thread Uma Shankar 
From: Shashank Sharma 

This patch contains following changes:
1. Add BXT MIPI display address base.
2. Call dsi_init from display_setup function.

v2: Rebased on latest nightly branch

Signed-off-by: Shashank Sharma 
Signed-off-by: Uma Shankar 
---
 drivers/gpu/drm/i915/i915_reg.h  |1 +
 drivers/gpu/drm/i915/intel_display.c |3 +++
 drivers/gpu/drm/i915/intel_dsi.c |2 ++
 3 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2030f60..621151b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1641,6 +1641,7 @@ enum skl_disp_power_wells {
 
 #define VLV_DISPLAY_BASE 0x18
 #define VLV_MIPI_BASE VLV_DISPLAY_BASE
+#define BXT_MIPI_BASE 0x6
 
 #define VLV_GU_CTL0(VLV_DISPLAY_BASE + 0x2030)
 #define VLV_GU_CTL1(VLV_DISPLAY_BASE + 0x2034)
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 87476ff..b8e0310 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -13906,6 +13906,9 @@ static void intel_setup_outputs(struct drm_device *dev)
 * DDI_BUF_CTL_A or SFUSE_STRAP registers, find another way to
 * detect the ports.
 */
+   /* Initialize MIPI for BXT */
+   intel_dsi_init(dev);
+
intel_ddi_init(dev, PORT_A);
intel_ddi_init(dev, PORT_B);
intel_ddi_init(dev, PORT_C);
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index b5a5558..b59b828 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -998,6 +998,8 @@ void intel_dsi_init(struct drm_device *dev)
 
if (IS_VALLEYVIEW(dev)) {
dev_priv->mipi_mmio_base = VLV_MIPI_BASE;
+   } else if (IS_BROXTON(dev)) {
+   dev_priv->mipi_mmio_base = BXT_MIPI_BASE;
} else {
DRM_ERROR("Unsupported Mipi device to reg base");
return;
-- 
1.7.9.5

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