subject:"\[Intel\-gfx\] \[CI 1\/3\] drm\/i915\: Remove unused \"valid\" parameter from pte

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

2016-10-14 Thread Michał Winiarski

We never used any invalid ptes, those were put in place for
a possibility of doing gpu faults. However our batchbuffers are not
restricted in length, so everything needs to be pointing to something
and thus out-of-bounds is pointing to scratch.

Remove the valid flag as it is always true.

v2: Expand commit msg, patch reorder (Mika)

Cc: Chris Wilson 
Cc: Michel Thierry 
Reviewed-by: Joonas Lahtinen 
Reviewed-by: Mika Kuoppala 
Signed-off-by: Michał Winiarski 
---
 drivers/gpu/drm/i915/i915_gem.c|  6 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  3 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c| 98 --
 drivers/gpu/drm/i915/i915_gem_gtt.h|  5 +-
 drivers/gpu/drm/i915/i915_gpu_error.c  |  2 +-
 5 files changed, 46 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 77dc059..0802098 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -919,8 +919,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
@@ -1228,8 +1227,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 72c7c18..6835074 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -370,8 +370,7 @@ static void reloc_cache_fini(struct reloc_cache *cache)
 
ggtt->base.clear_range(>base,
   cache->node.start,
-  cache->node.size,
-  true);
+  cache->node.size);
drm_mm_remove_node(>node);
} else {
i915_vma_unpin((struct i915_vma *)cache->node.mm);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2d846aa..48ec9c5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -191,15 +191,13 @@ static void ppgtt_unbind_vma(struct i915_vma *vma)
 {
vma->vm->clear_range(vma->vm,
 vma->node.start,
-vma->size,
-true);
+vma->size);
 }
 
 static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
- bool valid)
+ enum i915_cache_level level)
 {
-   gen8_pte_t pte = valid ? _PAGE_PRESENT | _PAGE_RW : 0;
+   gen8_pte_t pte = _PAGE_PRESENT | _PAGE_RW;
pte |= addr;
 
switch (level) {
@@ -234,9 +232,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
 
 static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -256,9 +254,9 @@ static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -280,9 +278,9 @@ static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 flags)
+u32 flags)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
if (!(flags & PTE_READ_ONLY))
@@ -296,9 +294,9 @@ static

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

2016-10-13 Thread Michał Winiarski

We never used any invalid ptes, those were put in place for
a possibility of doing gpu faults. However our batchbuffers are not
restricted in length, so everything needs to be pointing to something
and thus out-of-bounds is pointing to scratch.

Remove the valid flag as it is always true.

v2: Expand commit msg, patch reorder (Mika)

Cc: Chris Wilson 
Cc: Michel Thierry 
Reviewed-by: Joonas Lahtinen 
Reviewed-by: Mika Kuoppala 
Signed-off-by: Michał Winiarski 
---
 drivers/gpu/drm/i915/i915_gem.c|  6 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  3 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c| 98 --
 drivers/gpu/drm/i915/i915_gem_gtt.h|  5 +-
 drivers/gpu/drm/i915/i915_gpu_error.c  |  2 +-
 5 files changed, 46 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 830df36..781f5b5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -919,8 +919,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
@@ -1228,8 +1227,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 72c7c18..6835074 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -370,8 +370,7 @@ static void reloc_cache_fini(struct reloc_cache *cache)
 
ggtt->base.clear_range(>base,
   cache->node.start,
-  cache->node.size,
-  true);
+  cache->node.size);
drm_mm_remove_node(>node);
} else {
i915_vma_unpin((struct i915_vma *)cache->node.mm);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2d846aa..48ec9c5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -191,15 +191,13 @@ static void ppgtt_unbind_vma(struct i915_vma *vma)
 {
vma->vm->clear_range(vma->vm,
 vma->node.start,
-vma->size,
-true);
+vma->size);
 }
 
 static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
- bool valid)
+ enum i915_cache_level level)
 {
-   gen8_pte_t pte = valid ? _PAGE_PRESENT | _PAGE_RW : 0;
+   gen8_pte_t pte = _PAGE_PRESENT | _PAGE_RW;
pte |= addr;
 
switch (level) {
@@ -234,9 +232,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
 
 static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -256,9 +254,9 @@ static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -280,9 +278,9 @@ static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 flags)
+u32 flags)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
if (!(flags & PTE_READ_ONLY))
@@ -296,9 +294,9 @@ static

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

2016-10-12 Thread Michał Winiarski

We never used any invalid ptes, those were put in place for
a possibility of doing gpu faults. However our batchbuffers are not
restricted in length, so everything needs to be pointing to something
and thus out-of-bounds is pointing to scratch.

Remove the valid flag as it is always true.

v2: Expand commit msg, patch reorder (Mika)
v3: Rebase

Cc: Chris Wilson 
Cc: Michel Thierry 
Reviewed-by: Joonas Lahtinen 
Reviewed-by: Mika Kuoppala 
Signed-off-by: Michał Winiarski 
---
 drivers/gpu/drm/i915/i915_gem.c|  6 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  3 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c| 98 --
 drivers/gpu/drm/i915/i915_gem_gtt.h|  5 +-
 drivers/gpu/drm/i915/i915_gpu_error.c  |  2 +-
 5 files changed, 46 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fdd496e..ec2335c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -919,8 +919,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
@@ -1228,8 +1227,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 72c7c18..6835074 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -370,8 +370,7 @@ static void reloc_cache_fini(struct reloc_cache *cache)
 
ggtt->base.clear_range(>base,
   cache->node.start,
-  cache->node.size,
-  true);
+  cache->node.size);
drm_mm_remove_node(>node);
} else {
i915_vma_unpin((struct i915_vma *)cache->node.mm);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2d846aa..48ec9c5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -191,15 +191,13 @@ static void ppgtt_unbind_vma(struct i915_vma *vma)
 {
vma->vm->clear_range(vma->vm,
 vma->node.start,
-vma->size,
-true);
+vma->size);
 }
 
 static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
- bool valid)
+ enum i915_cache_level level)
 {
-   gen8_pte_t pte = valid ? _PAGE_PRESENT | _PAGE_RW : 0;
+   gen8_pte_t pte = _PAGE_PRESENT | _PAGE_RW;
pte |= addr;
 
switch (level) {
@@ -234,9 +232,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
 
 static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -256,9 +254,9 @@ static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -280,9 +278,9 @@ static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 flags)
+u32 flags)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
if (!(flags & PTE_READ_ONLY))
@@ -296,9 +294,9 @@

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

2016-10-12 Thread Michał Winiarski

We never used any invalid ptes, those were put in place for
a possibility of doing gpu faults. However our batchbuffers are not
restricted in length, so everything needs to be pointing to something
and thus out-of-bounds is pointing to scratch.

Remove the valid flag as it is always true.

v2: Expand commit msg, patch reorder (Mika)

Cc: Chris Wilson 
Cc: Michel Thierry 
Reviewed-by: Joonas Lahtinen 
Reviewed-by: Mika Kuoppala 
Signed-off-by: Michał Winiarski 
---
 drivers/gpu/drm/i915/i915_gem.c|  6 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  3 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c| 98 --
 drivers/gpu/drm/i915/i915_gem_gtt.h|  5 +-
 4 files changed, 45 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fdd496e..ec2335c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -919,8 +919,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
@@ -1228,8 +1227,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 72c7c18..6835074 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -370,8 +370,7 @@ static void reloc_cache_fini(struct reloc_cache *cache)
 
ggtt->base.clear_range(>base,
   cache->node.start,
-  cache->node.size,
-  true);
+  cache->node.size);
drm_mm_remove_node(>node);
} else {
i915_vma_unpin((struct i915_vma *)cache->node.mm);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 2d846aa..48ec9c5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -191,15 +191,13 @@ static void ppgtt_unbind_vma(struct i915_vma *vma)
 {
vma->vm->clear_range(vma->vm,
 vma->node.start,
-vma->size,
-true);
+vma->size);
 }
 
 static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
- bool valid)
+ enum i915_cache_level level)
 {
-   gen8_pte_t pte = valid ? _PAGE_PRESENT | _PAGE_RW : 0;
+   gen8_pte_t pte = _PAGE_PRESENT | _PAGE_RW;
pte |= addr;
 
switch (level) {
@@ -234,9 +232,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
 
 static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -256,9 +254,9 @@ static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -280,9 +278,9 @@ static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 flags)
+u32 flags)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
if (!(flags & PTE_READ_ONLY))
@@ -296,9 +294,9 @@ static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 
 static

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

2016-10-11 Thread Michał Winiarski

We never used any invalid ptes, those were put in place for
a possibility of doing gpu faults. However our batchbuffers are not
restricted in length, so everything needs to be pointing to something
and thus out-of-bounds is pointing to scratch.

Remove the valid flag as it is always true.

v2: Expand commit msg, patch reorder (Mika)

Cc: Chris Wilson 
Cc: Michel Thierry 
Reviewed-by: Joonas Lahtinen 
Reviewed-by: Mika Kuoppala 
Signed-off-by: Michał Winiarski 
---
 drivers/gpu/drm/i915/i915_gem.c|  6 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |  3 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c| 98 --
 drivers/gpu/drm/i915/i915_gem_gtt.h|  5 +-
 4 files changed, 45 insertions(+), 67 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index fdd496e..ec2335c 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -919,8 +919,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
@@ -1228,8 +1227,7 @@ out_unpin:
if (node.allocated) {
wmb();
ggtt->base.clear_range(>base,
-  node.start, node.size,
-  true);
+  node.start, node.size);
i915_gem_object_unpin_pages(obj);
remove_mappable_node();
} else {
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c 
b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 72c7c18..6835074 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -370,8 +370,7 @@ static void reloc_cache_fini(struct reloc_cache *cache)
 
ggtt->base.clear_range(>base,
   cache->node.start,
-  cache->node.size,
-  true);
+  cache->node.size);
drm_mm_remove_node(>node);
} else {
i915_vma_unpin((struct i915_vma *)cache->node.mm);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 0bb4232..08e2f35 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -191,15 +191,13 @@ static void ppgtt_unbind_vma(struct i915_vma *vma)
 {
vma->vm->clear_range(vma->vm,
 vma->node.start,
-vma->size,
-true);
+vma->size);
 }
 
 static gen8_pte_t gen8_pte_encode(dma_addr_t addr,
- enum i915_cache_level level,
- bool valid)
+ enum i915_cache_level level)
 {
-   gen8_pte_t pte = valid ? _PAGE_PRESENT | _PAGE_RW : 0;
+   gen8_pte_t pte = _PAGE_PRESENT | _PAGE_RW;
pte |= addr;
 
switch (level) {
@@ -234,9 +232,9 @@ static gen8_pde_t gen8_pde_encode(const dma_addr_t addr,
 
 static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -256,9 +254,9 @@ static gen6_pte_t snb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 unused)
+u32 unused)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
switch (level) {
@@ -280,9 +278,9 @@ static gen6_pte_t ivb_pte_encode(dma_addr_t addr,
 
 static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 enum i915_cache_level level,
-bool valid, u32 flags)
+u32 flags)
 {
-   gen6_pte_t pte = valid ? GEN6_PTE_VALID : 0;
+   gen6_pte_t pte = GEN6_PTE_VALID;
pte |= GEN6_PTE_ADDR_ENCODE(addr);
 
if (!(flags & PTE_READ_ONLY))
@@ -296,9 +294,9 @@ static gen6_pte_t byt_pte_encode(dma_addr_t addr,
 
 static

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

[Intel-gfx] [CI 1/3] drm/i915: Remove unused "valid" parameter from pte_encode

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