Re: [Intel-gfx] [Mesa-dev] [PATCH 1/9] intel gen4-5: fix the vue view in the fs.
On Thu, Jul 26, 2012 at 10:18:01AM -0700, Eric Anholt wrote: Olivier Galibert galib...@pobox.com writes: In some cases the fragment shader view of the vue registers was out of sync with the builder. This fixes it. s/builder/SF outputs/ ? I'd love to see the pre-gen6 code get rearranged so the FS walked the bitfield of FS inputs from SF and chose the urb offset for each. But this does look like the minimal fix. In other words, an explicit linking pass? That could be useful with geometry shaders, too. OG. ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [Mesa-dev] [PATCH 1/9] intel gen4-5: fix the vue view in the fs.
Olivier Galibert galib...@pobox.com writes: In some cases the fragment shader view of the vue registers was out of sync with the builder. This fixes it. s/builder/SF outputs/ ? I'd love to see the pre-gen6 code get rearranged so the FS walked the bitfield of FS inputs from SF and chose the urb offset for each. But this does look like the minimal fix. Reviewed-by: Eric Anholt e...@anholt.net pgp5F8dGu9BYv.pgp Description: PGP signature ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
