Re: [Intel-gfx] [PATCH] drm/i915: Always calculate 8xx WM values based on a 32-bpp framebuffer

2012-11-10 Thread Daniel Vetter 
On Mon, Oct 22, 2012 at 12:32:15PM +0100, Chris Wilson wrote:
 The specs for gen2 say that the watermark values should always be set
 assuming a 32bpp display mode, even though the display mode may be 15 or
 16 bpp.
 
 Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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[Intel-gfx] [PATCH] drm/i915: Always calculate 8xx WM values based on a 32-bpp framebuffer

2012-10-22 Thread Chris Wilson 
The specs for gen2 say that the watermark values should always be set
assuming a 32bpp display mode, even though the display mode may be 15 or
16 bpp.

Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
 drivers/gpu/drm/i915/intel_pm.c |   17 +++--
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4df221c..b5fc60a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1470,9 +1470,12 @@ static void i9xx_update_wm(struct drm_device *dev)
fifo_size = dev_priv-display.get_fifo_size(dev, 0);
crtc = intel_get_crtc_for_plane(dev, 0);
if (crtc-enabled  crtc-fb) {
+   int cpp = crtc-fb-bits_per_pixel / 8;
+   if (IS_GEN2(dev))
+   cpp = 4;
+
planea_wm = intel_calculate_wm(crtc-mode.clock,
-  wm_info, fifo_size,
-  crtc-fb-bits_per_pixel / 8,
+  wm_info, fifo_size, cpp,
   latency_ns);
enabled = crtc;
} else
@@ -1481,9 +1484,12 @@ static void i9xx_update_wm(struct drm_device *dev)
fifo_size = dev_priv-display.get_fifo_size(dev, 1);
crtc = intel_get_crtc_for_plane(dev, 1);
if (crtc-enabled  crtc-fb) {
+   int cpp = crtc-fb-bits_per_pixel / 8;
+   if (IS_GEN2(dev))
+   cpp = 4;
+
planeb_wm = intel_calculate_wm(crtc-mode.clock,
-  wm_info, fifo_size,
-  crtc-fb-bits_per_pixel / 8,
+  wm_info, fifo_size, cpp,
   latency_ns);
if (enabled == NULL)
enabled = crtc;
@@ -1573,8 +1579,7 @@ static void i830_update_wm(struct drm_device *dev)
 
planea_wm = intel_calculate_wm(crtc-mode.clock, i830_wm_info,
   dev_priv-display.get_fifo_size(dev, 0),
-  crtc-fb-bits_per_pixel / 8,
-  latency_ns);
+  4, latency_ns);
fwater_lo = I915_READ(FW_BLC)  ~0xfff;
fwater_lo |= (38) | planea_wm;
 
-- 
1.7.10.4

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Re: [Intel-gfx] [PATCH] drm/i915: Always calculate 8xx WM values based on a 32-bpp framebuffer

2012-10-22 Thread Paul Menzel 
Am Montag, den 22.10.2012, 12:32 +0100 schrieb Chris Wilson:
 The specs for gen2 say that the watermark values should always be set
 assuming a 32bpp display mode, even though the display mode may be 15 or
 16 bpp.

Does this patch fix an actual bug or is it just preemptively doing so?

 Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
 ---
  drivers/gpu/drm/i915/intel_pm.c |   17 +++--
  1 file changed, 11 insertions(+), 6 deletions(-)

[…]


Thanks,

Paul


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