[Intel-gfx] [PATCH] drm/i915: make CRTC enable/disable asynchronous v3

2014-05-30 Thread Jesse Barnes
This lets us return to userspace more quickly and should improve init
and suspend/resume times as well, allowing us to return to userspace
sooner.

This was initially motivated by slow resume time on some machines with
very long panel power sequencing times, and it should also improve boot
time when a full mode set is required.

v2: use a single enable/disable queue (Jesse/Chris)
fixup locking, test with lockdep (Jesse)
move hw state checks to sync_crtcs (Jesse)
make userspace initiated mode sets stay synchronous (Chris)
v3: take crtc lock around enable/disable (Jesse)
cancel work on suspend  unload (Chris)
complete work if alloc fails (Jesse)
drop unneeded list head init (Chris)
drop unneeded sync in cusor movement, rely on intel_crtc-active (Chris)
take mode_config mutex around cursor_set sync call (Jesse)
fix order of list_add_tail parameters (Jesse)

Signed-off-by: Jesse Barnes jbar...@virtuousgeek.org

fix order of list add
take mutex around sync in cursor_set
---
 drivers/gpu/drm/i915/i915_drv.c  |   3 +-
 drivers/gpu/drm/i915/i915_drv.h  |  12 ++-
 drivers/gpu/drm/i915/intel_display.c | 177 +++
 drivers/gpu/drm/i915/intel_drv.h |   2 +-
 4 files changed, 173 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index e2bfdda..59a583f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -527,10 +527,11 @@ static int i915_drm_freeze(struct drm_device *dev)
 * Disable CRTCs directly since we want to preserve sw state
 * for _thaw.
 */
+   cancel_work_sync(dev_priv-crtc_work);
mutex_lock(dev-mode_config.mutex);
for_each_crtc(dev, crtc) {
mutex_lock(crtc-mutex);
-   dev_priv-display.crtc_disable(crtc);
+   dev_priv-display._crtc_disable(crtc);
mutex_unlock(crtc-mutex);
}
mutex_unlock(dev-mode_config.mutex);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bea9ab40..bbfe402 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -447,8 +447,8 @@ struct drm_i915_display_funcs {
int (*crtc_mode_set)(struct drm_crtc *crtc,
 int x, int y,
 struct drm_framebuffer *old_fb);
-   void (*crtc_enable)(struct drm_crtc *crtc);
-   void (*crtc_disable)(struct drm_crtc *crtc);
+   void (*_crtc_enable)(struct drm_crtc *crtc);
+   void (*_crtc_disable)(struct drm_crtc *crtc);
void (*off)(struct drm_crtc *crtc);
void (*write_eld)(struct drm_connector *connector,
  struct drm_crtc *crtc,
@@ -1432,6 +1432,14 @@ struct drm_i915_private {
/* Display functions */
struct drm_i915_display_funcs display;
 
+   /**
+* CRTC work queue handling.  Enable/disable calls are queued
+* into the list and processed by the CRTC work function at some
+* later time, or inline by a call to intel_sync_crtcs().
+*/
+   struct list_head crtc_work_queue;
+   struct work_struct crtc_work;
+
/* PCH chipset type */
enum intel_pch pch_type;
unsigned short pch_id;
diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 731cd01..d9e5d36 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1973,6 +1973,141 @@ static void lpt_disable_pch_transcoder(struct 
drm_i915_private *dev_priv)
I915_WRITE(_TRANSA_CHICKEN2, val);
 }
 
+struct intel_crtc_work {
+   /**
+* Whether to enable or disable the given CRTC
+*/
+   bool enable;
+   /**
+* CRTC to operate on
+*/
+   struct intel_crtc *intel_crtc;
+   /**
+* Used to link to dev_priv-crtc_work_queue, protected
+* by mode_config mutex.
+*/
+   struct list_head head;
+};
+
+/**
+ * intel_sync_crtcs - complete any pending CRTC enable/disable calls
+ * @dev_priv: i915 driver struct
+ *
+ * Walk the CRTC work queue and perform the enable/disable calls in the
+ * order they were added.
+ *
+ * This function will return when the enable/disable calls have been completed,
+ * and so may take many milliseconds before returning.
+ */
+static void intel_sync_crtcs(struct drm_i915_private *dev_priv)
+{
+   struct drm_device *dev = dev_priv-dev;
+   struct intel_crtc_work *crtc_work, *tmp;
+
+   WARN(!mutex_is_locked(dev-mode_config.mutex),
+need mode_config mutex\n);
+
+   list_for_each_entry_safe(crtc_work, tmp, dev_priv-crtc_work_queue,
+head) {
+   struct drm_crtc *crtc = crtc_work-intel_crtc-base;
+
+   mutex_lock(crtc-mutex);
+   

Re: [Intel-gfx] [PATCH] drm/i915: make CRTC enable/disable asynchronous v3

2014-05-30 Thread Chris Wilson
On Fri, May 30, 2014 at 02:28:52PM -0700, Jesse Barnes wrote:
 @@ -10326,7 +10466,7 @@ static int __intel_set_mode(struct drm_crtc *crtc,
  
   for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc) {
   if (intel_crtc-base.enabled)
 - dev_priv-display.crtc_disable(intel_crtc-base);
 + intel_queue_crtc_disable(intel_crtc-base);
   }

This one looks odd. prepare_pipes are the pipes we have to turn off in
order to perform the modeset - which needs to be synchronous.

intel_sync_crtcs(prepare_pipes) ?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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Re: [Intel-gfx] [PATCH] drm/i915: make CRTC enable/disable asynchronous v3

2014-05-30 Thread Jesse Barnes
On Fri, 30 May 2014 23:02:18 +0100
Chris Wilson ch...@chris-wilson.co.uk wrote:

 On Fri, May 30, 2014 at 02:28:52PM -0700, Jesse Barnes wrote:
  @@ -10326,7 +10466,7 @@ static int __intel_set_mode(struct drm_crtc *crtc,
   
  for_each_intel_crtc_masked(dev, prepare_pipes, intel_crtc) {
  if (intel_crtc-base.enabled)
  -   dev_priv-display.crtc_disable(intel_crtc-base);
  +   intel_queue_crtc_disable(intel_crtc-base);
  }
 
 This one looks odd. prepare_pipes are the pipes we have to turn off in
 order to perform the modeset - which needs to be synchronous.
 
 intel_sync_crtcs(prepare_pipes) ?

Well, they'll happen in order.  But I was just looking at this code and
in cases where -mode_set messes with regs rather than staging it for
-crtc_enable we'll lose stuff here.

Until we have that, doing the disables for the prepare_pipe
synchronously is probably the right thing to do.

-- 
Jesse Barnes, Intel Open Source Technology Center
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