Re: [Intel-gfx] [PATCH 0/5] i915: CAGF and RC6 changes for MTL

2022-11-17 Thread Rodrigo Vivi
On Mon, Nov 14, 2022 at 06:03:43PM +0530, Badal Nilawar wrote:
> This series includes the code changes to get CAGF, RC State and C6
> Residency of MTL.
> 
> v3: Included "Use GEN12 RPSTAT register" patch
> 
> v4:
>   - Rebased
>   - Dropped "Use GEN12 RPSTAT register" patch from this series
> going to send separate series for it
> 
> v5:
>   - Included "drm/i915/gt: Change RC6 residency functions to accept register
> ID's" based on code review feedback
> 
> v6:
>   - Addressed Jani N's review comments on "drm/i915/gt: Change RC6 residency
> functions to accept register ID's"
>   - Re-add "drm/i915: Use GEN12_RPSTAT register for GT freq" to this series
> 
> v7: Rebuild, identical to v6
> 
> v8:
>   - Add "drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf" to the 
> series
> (based on Rodrigo's review) to consistently use REG_FIELD_GET
>   - Minor changes to other patches, please see individual patches for 
> changelogs
> 
> v9: Rebuild, identical to v8
> 
> v10: Address review comments from Rodrigo on Patch 5
> 
> v11: Change state name for MTL_CC0 to RC0 in Patch 5
> 
> v12: Rebased to latest upstream. Identical to v11.

Thanks for the patches and for addressing all the requests.

Just for the record:
With your authorization, while merging them, I have added your missed
Signed-off-by to the couple patches, as we had discussed offline.

> 
> Ashutosh Dixit (2):
>   drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf
>   drm/i915/gt: Use RC6 residency types as arguments to residency
> functions
> 
> Badal Nilawar (2):
>   drm/i915/mtl: Modify CAGF functions for MTL
>   drm/i915/mtl: C6 residency and C state type for MTL SAMedia
> 
> Don Hiatt (1):
>   drm/i915: Use GEN12_RPSTAT register for GT freq
> 
>  drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 88 ++-
>  drivers/gpu/drm/i915/gt/intel_gt_regs.h   | 22 +++--
>  drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   | 12 +--
>  drivers/gpu/drm/i915/gt/intel_rc6.c   | 64 +-
>  drivers/gpu/drm/i915/gt/intel_rc6.h   | 11 ++-
>  drivers/gpu/drm/i915/gt/intel_rc6_types.h | 15 +++-
>  drivers/gpu/drm/i915/gt/intel_rps.c   | 51 ---
>  drivers/gpu/drm/i915/gt/intel_rps.h   |  2 +
>  drivers/gpu/drm/i915/gt/selftest_rc6.c|  6 +-
>  drivers/gpu/drm/i915/i915_pmu.c   |  9 +-
>  10 files changed, 198 insertions(+), 82 deletions(-)
> 
> -- 
> 2.25.1
> 


[Intel-gfx] [PATCH 0/5] i915: CAGF and RC6 changes for MTL

2022-11-14 Thread Badal Nilawar
This series includes the code changes to get CAGF, RC State and C6
Residency of MTL.

v3: Included "Use GEN12 RPSTAT register" patch

v4:
  - Rebased
  - Dropped "Use GEN12 RPSTAT register" patch from this series
going to send separate series for it

v5:
  - Included "drm/i915/gt: Change RC6 residency functions to accept register
ID's" based on code review feedback

v6:
  - Addressed Jani N's review comments on "drm/i915/gt: Change RC6 residency
functions to accept register ID's"
  - Re-add "drm/i915: Use GEN12_RPSTAT register for GT freq" to this series

v7: Rebuild, identical to v6

v8:
  - Add "drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf" to the series
(based on Rodrigo's review) to consistently use REG_FIELD_GET
  - Minor changes to other patches, please see individual patches for changelogs

v9: Rebuild, identical to v8

v10: Address review comments from Rodrigo on Patch 5

v11: Change state name for MTL_CC0 to RC0 in Patch 5

v12: Rebased to latest upstream. Identical to v11.

Ashutosh Dixit (2):
  drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf
  drm/i915/gt: Use RC6 residency types as arguments to residency
functions

Badal Nilawar (2):
  drm/i915/mtl: Modify CAGF functions for MTL
  drm/i915/mtl: C6 residency and C state type for MTL SAMedia

Don Hiatt (1):
  drm/i915: Use GEN12_RPSTAT register for GT freq

 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 88 ++-
 drivers/gpu/drm/i915/gt/intel_gt_regs.h   | 22 +++--
 drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   | 12 +--
 drivers/gpu/drm/i915/gt/intel_rc6.c   | 64 +-
 drivers/gpu/drm/i915/gt/intel_rc6.h   | 11 ++-
 drivers/gpu/drm/i915/gt/intel_rc6_types.h | 15 +++-
 drivers/gpu/drm/i915/gt/intel_rps.c   | 51 ---
 drivers/gpu/drm/i915/gt/intel_rps.h   |  2 +
 drivers/gpu/drm/i915/gt/selftest_rc6.c|  6 +-
 drivers/gpu/drm/i915/i915_pmu.c   |  9 +-
 10 files changed, 198 insertions(+), 82 deletions(-)

-- 
2.25.1



[Intel-gfx] [PATCH 0/5] i915: CAGF and RC6 changes for MTL

2022-10-24 Thread Ashutosh Dixit
This series includes the code changes to get CAGF, RC State and C6
Residency of MTL.

v3: Included "Use GEN12 RPSTAT register" patch

v4:
  - Rebased
  - Dropped "Use GEN12 RPSTAT register" patch from this series
going to send separate series for it

v5:
  - Included "drm/i915/gt: Change RC6 residency functions to accept register
ID's" based on code review feedback

v6:
  - Addressed Jani N's review comments on "drm/i915/gt: Change RC6 residency
functions to accept register ID's"
  - Re-add "drm/i915: Use GEN12_RPSTAT register for GT freq" to this series

v7: Rebuild, identical to v6

v8:
  - Add "drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf" to the series
(based on Rodrigo's review) to consistently use REG_FIELD_GET
  - Minor changes to other patches, please see individual patches for changelogs

v9: Rebuild, identical to v8

v10: Address review comments from Rodrigo on Patch 5

v11: Change state name for MTL_CC0 to RC0 in Patch 5

Ashutosh Dixit (2):
  drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf
  drm/i915/gt: Use RC6 residency types as arguments to residency
functions

Badal Nilawar (2):
  drm/i915/mtl: Modify CAGF functions for MTL
  drm/i915/mtl: C6 residency and C state type for MTL SAMedia

Don Hiatt (1):
  drm/i915: Use GEN12_RPSTAT register for GT freq

 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 88 ++-
 drivers/gpu/drm/i915/gt/intel_gt_regs.h   | 22 +++--
 drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   | 12 +--
 drivers/gpu/drm/i915/gt/intel_rc6.c   | 64 +-
 drivers/gpu/drm/i915/gt/intel_rc6.h   | 11 ++-
 drivers/gpu/drm/i915/gt/intel_rc6_types.h | 15 +++-
 drivers/gpu/drm/i915/gt/intel_rps.c   | 51 ---
 drivers/gpu/drm/i915/gt/intel_rps.h   |  2 +
 drivers/gpu/drm/i915/gt/selftest_rc6.c|  6 +-
 drivers/gpu/drm/i915/i915_pmu.c   |  9 +-
 10 files changed, 198 insertions(+), 82 deletions(-)

-- 
2.38.0



[Intel-gfx] [PATCH 0/5] i915: CAGF and RC6 changes for MTL

2022-10-24 Thread Ashutosh Dixit
This series includes the code changes to get CAGF, RC State and C6
Residency of MTL.

v3: Included "Use GEN12 RPSTAT register" patch

v4:
  - Rebased
  - Dropped "Use GEN12 RPSTAT register" patch from this series
going to send separate series for it

v5:
  - Included "drm/i915/gt: Change RC6 residency functions to accept register
ID's" based on code review feedback

v6:
  - Addressed Jani N's review comments on "drm/i915/gt: Change RC6 residency
functions to accept register ID's"
  - Re-add "drm/i915: Use GEN12_RPSTAT register for GT freq" to this series

v7: Rebuild, identical to v6

v8:
  - Add "drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf" to the series
(based on Rodrigo's review) to consistently use REG_FIELD_GET
  - Minor changes to other patches, please see individual patches for changelogs

v9: Rebuild, identical to v8

v10: Address review comments from Rodrigo on Patch 5

Ashutosh Dixit (2):
  drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf
  drm/i915/gt: Use RC6 residency types as arguments to residency
functions

Badal Nilawar (2):
  drm/i915/mtl: Modify CAGF functions for MTL
  drm/i915/mtl: C6 residency and C state type for MTL SAMedia

Don Hiatt (1):
  drm/i915: Use GEN12_RPSTAT register for GT freq

 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 88 ++-
 drivers/gpu/drm/i915/gt/intel_gt_regs.h   | 22 +++--
 drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   | 12 +--
 drivers/gpu/drm/i915/gt/intel_rc6.c   | 64 +-
 drivers/gpu/drm/i915/gt/intel_rc6.h   | 11 ++-
 drivers/gpu/drm/i915/gt/intel_rc6_types.h | 15 +++-
 drivers/gpu/drm/i915/gt/intel_rps.c   | 51 ---
 drivers/gpu/drm/i915/gt/intel_rps.h   |  2 +
 drivers/gpu/drm/i915/gt/selftest_rc6.c|  6 +-
 drivers/gpu/drm/i915/i915_pmu.c   |  9 +-
 10 files changed, 198 insertions(+), 82 deletions(-)

-- 
2.38.0



[Intel-gfx] [PATCH 0/5] i915: CAGF and RC6 changes for MTL

2022-10-19 Thread Ashutosh Dixit
This series includes the code changes to get CAGF, RC State and C6
Residency of MTL.

v3: Included "Use GEN12 RPSTAT register" patch

v4:
  - Rebased
  - Dropped "Use GEN12 RPSTAT register" patch from this series
going to send separate series for it

v5:
  - Included "drm/i915/gt: Change RC6 residency functions to accept register
ID's" based on code review feedback

v6:
  - Addressed Jani N's review comments on "drm/i915/gt: Change RC6 residency
functions to accept register ID's"
  - Re-add "drm/i915: Use GEN12_RPSTAT register for GT freq" to this series

v7: Rebuild, identical to v6

v8:
  - Add "drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf" to the series
(based on Rodrigo's review) to consistently use REG_FIELD_GET
  - Minor changes to other patches, please see individual patches for changelogs

Ashutosh Dixit (2):
  drm/i915/rps: Prefer REG_FIELD_GET in intel_rps_get_cagf
  drm/i915/gt: Use RC6 residency types as arguments to residency
functions

Badal Nilawar (2):
  drm/i915/mtl: Modify CAGF functions for MTL
  drm/i915/mtl: C6 residency and C state type for MTL SAMedia

Don Hiatt (1):
  drm/i915: Use GEN12_RPSTAT register for GT freq

 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 87 ++-
 drivers/gpu/drm/i915/gt/intel_gt_regs.h   | 22 +++--
 drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   | 12 +--
 drivers/gpu/drm/i915/gt/intel_rc6.c   | 64 +-
 drivers/gpu/drm/i915/gt/intel_rc6.h   | 11 ++-
 drivers/gpu/drm/i915/gt/intel_rc6_types.h | 15 +++-
 drivers/gpu/drm/i915/gt/intel_rps.c   | 51 ---
 drivers/gpu/drm/i915/gt/intel_rps.h   |  2 +
 drivers/gpu/drm/i915/gt/selftest_rc6.c|  6 +-
 drivers/gpu/drm/i915/i915_pmu.c   |  9 +-
 10 files changed, 197 insertions(+), 82 deletions(-)

-- 
2.38.0



[Intel-gfx] [PATCH 0/5] i915: CAGF and RC6 changes for MTL

2022-09-05 Thread Badal Nilawar
This series includes the code changes to get CAGF, RC State and 
C6 Residency of MTL. The series depends on:

https://patchwork.freedesktop.org/series/107908/

We have included 3 patches from from the above series as part of this
series in order for this series to compile. These are the first 3 patches
authored by Matt Roper. Please do not review these first 3 patches. Only
patch 4 and 5 needs review.

Cc: Ashutosh Dixit 

Badal Nilawar (2):
  drm/i915/mtl: Modify CAGF functions for MTL
  drm/i915/mtl: Add C6 residency support for MTL SAMedia

Matt Roper (3):
  drm/i915: Prepare more multi-GT initialization
  drm/i915: Rename and expose common GT early init routine
  drm/i915/xelpmp: Expose media as another GT

 drivers/gpu/drm/i915/Makefile |  1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  2 +-
 drivers/gpu/drm/i915/gt/intel_gt.c| 70 +++
 drivers/gpu/drm/i915/gt/intel_gt.h|  2 +-
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 56 +++
 drivers/gpu/drm/i915/gt/intel_gt_regs.h   | 26 +++
 drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   |  9 ++-
 drivers/gpu/drm/i915/gt/intel_gt_types.h  |  3 +
 drivers/gpu/drm/i915/gt/intel_rc6.c   |  5 +-
 drivers/gpu/drm/i915/gt/intel_rps.c   |  5 ++
 drivers/gpu/drm/i915/gt/intel_sa_media.c  | 39 +++
 drivers/gpu/drm/i915/gt/intel_sa_media.h  | 15 
 drivers/gpu/drm/i915/gt/selftest_rc6.c|  9 ++-
 drivers/gpu/drm/i915/i915_drv.h   |  2 +
 drivers/gpu/drm/i915/i915_pci.c   | 15 
 drivers/gpu/drm/i915/i915_pmu.c   |  8 ++-
 drivers/gpu/drm/i915/intel_device_info.h  | 19 +
 drivers/gpu/drm/i915/intel_uncore.c   | 16 -
 drivers/gpu/drm/i915/intel_uncore.h   | 20 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  1 +
 20 files changed, 301 insertions(+), 22 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.h

-- 
2.25.1



[Intel-gfx] [PATCH 0/5] i915: CAGF and RC6 changes for MTL

2022-09-05 Thread Badal Nilawar
This series includes the code changes to get CAGF, RC State and 
C6 Residency of MTL. The series depends on:

https://patchwork.freedesktop.org/series/107908/

We have included 3 patches from from the above series as part of this
series in order for this series to compile. These are the first 3 patches
authored by Matt Roper. Please do not review these first 3 patches. Only
patch 4 and 5 needs review.

Cc: Ashutosh Dixit 

Badal Nilawar (2):
  INTEL_DII: drm/i915/mtl: Modify CAGF functions for MTL
  INTEL_DII: drm/i915/mtl: Add C6 residency support for MTL SAMedia

Matt Roper (3):
  drm/i915: Prepare more multi-GT initialization
  drm/i915: Rename and expose common GT early init routine
  drm/i915/xelpmp: Expose media as another GT

 drivers/gpu/drm/i915/Makefile |  1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c |  2 +-
 drivers/gpu/drm/i915/gt/intel_gt.c| 70 +++
 drivers/gpu/drm/i915/gt/intel_gt.h|  2 +-
 drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c | 56 +++
 drivers/gpu/drm/i915/gt/intel_gt_regs.h   | 26 +++
 drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.c   |  9 ++-
 drivers/gpu/drm/i915/gt/intel_gt_types.h  |  3 +
 drivers/gpu/drm/i915/gt/intel_rc6.c   |  5 +-
 drivers/gpu/drm/i915/gt/intel_rps.c   |  5 ++
 drivers/gpu/drm/i915/gt/intel_sa_media.c  | 39 +++
 drivers/gpu/drm/i915/gt/intel_sa_media.h  | 15 
 drivers/gpu/drm/i915/gt/selftest_rc6.c|  9 ++-
 drivers/gpu/drm/i915/i915_drv.h   |  2 +
 drivers/gpu/drm/i915/i915_pci.c   | 15 
 drivers/gpu/drm/i915/i915_pmu.c   |  8 ++-
 drivers/gpu/drm/i915/intel_device_info.h  | 19 +
 drivers/gpu/drm/i915/intel_uncore.c   | 16 -
 drivers/gpu/drm/i915/intel_uncore.h   | 20 +-
 .../gpu/drm/i915/selftests/mock_gem_device.c  |  1 +
 20 files changed, 301 insertions(+), 22 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_sa_media.h

-- 
2.25.1