Re: [Intel-gfx] [PATCH 01/19] drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv
On Tue, Oct 11, 2016 at 02:21:34PM +0100, Tvrtko Ursulin wrote: > From: Tvrtko Ursulin> > This saves 3248 bytes of .rodata strings. > > v2: Add parantheses around dev_priv. (Ville Syrjala) Reviewed-by: David Weinehall How come you didn't do HAS_PCH_LPT_{LP,H} together with the rest of the PCH-macros, BTW? > > Signed-off-by: Tvrtko Ursulin > --- > drivers/gpu/drm/i915/i915_drv.h | 8 +++--- > drivers/gpu/drm/i915/intel_crt.c | 10 +++ > drivers/gpu/drm/i915/intel_display.c | 49 > ++- > drivers/gpu/drm/i915/intel_dp.c | 16 ++-- > drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 +-- > drivers/gpu/drm/i915/intel_hdmi.c | 10 +++ > drivers/gpu/drm/i915/intel_pm.c | 4 +-- > drivers/gpu/drm/i915/intel_psr.c | 8 +++--- > 8 files changed, 56 insertions(+), 53 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 54d860e1c0fc..51dd10f25f59 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -2815,7 +2815,7 @@ struct drm_i915_cmd_table { > > #define HAS_DP_MST(dev) (INTEL_INFO(dev)->has_dp_mst) > > -#define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) > +#define HAS_DDI(dev_priv)((dev_priv)->info.has_ddi) > #define HAS_FPGA_DBG_UNCLAIMED(dev) (INTEL_INFO(dev)->has_fpga_dbg) > #define HAS_PSR(dev) (INTEL_INFO(dev)->has_psr) > #define HAS_RUNTIME_PM(dev) (INTEL_INFO(dev)->has_runtime_pm) > @@ -2854,8 +2854,10 @@ struct drm_i915_cmd_table { > #define HAS_PCH_KBP(dev) (INTEL_PCH_TYPE(dev) == PCH_KBP) > #define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT) > #define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT) > -#define HAS_PCH_LPT_LP(dev) (__I915__(dev)->pch_id == > INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) > -#define HAS_PCH_LPT_H(dev) (__I915__(dev)->pch_id == > INTEL_PCH_LPT_DEVICE_ID_TYPE) > +#define HAS_PCH_LPT_LP(dev_priv) \ > + ((dev_priv)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) > +#define HAS_PCH_LPT_H(dev_priv) \ > + ((dev_priv)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) > #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT) > #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX) > #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP) > diff --git a/drivers/gpu/drm/i915/intel_crt.c > b/drivers/gpu/drm/i915/intel_crt.c > index 4a7b6c595ec2..d4b9b166de5d 100644 > --- a/drivers/gpu/drm/i915/intel_crt.c > +++ b/drivers/gpu/drm/i915/intel_crt.c > @@ -280,13 +280,13 @@ static bool intel_crt_compute_config(struct > intel_encoder *encoder, >struct intel_crtc_state *pipe_config, >struct drm_connector_state *conn_state) > { > - struct drm_device *dev = encoder->base.dev; > + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > - if (HAS_PCH_SPLIT(dev)) > + if (HAS_PCH_SPLIT(dev_priv)) > pipe_config->has_pch_encoder = true; > > /* LPT FDI RX only supports 8bpc. */ > - if (HAS_PCH_LPT(dev)) { > + if (HAS_PCH_LPT(dev_priv)) { > if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) { > DRM_DEBUG_KMS("LPT only supports 24bpp\n"); > return false; > @@ -296,7 +296,7 @@ static bool intel_crt_compute_config(struct intel_encoder > *encoder, > } > > /* FDI must always be 2.7 GHz */ > - if (HAS_DDI(dev)) > + if (HAS_DDI(dev_priv)) > pipe_config->port_clock = 135000 * 2; > > return true; > @@ -917,7 +917,7 @@ void intel_crt_init(struct drm_device *dev) > if (I915_HAS_HOTPLUG(dev) && > !dmi_check_system(intel_spurious_crt_detect)) > crt->base.hpd_pin = HPD_CRT; > - if (HAS_DDI(dev)) { > + if (HAS_DDI(dev_priv)) { > crt->base.port = PORT_E; > crt->base.get_config = hsw_crt_get_config; > crt->base.get_hw_state = intel_ddi_get_hw_state; > diff --git a/drivers/gpu/drm/i915/intel_display.c > b/drivers/gpu/drm/i915/intel_display.c > index 23a6c7213eca..6e447b575413 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -1187,19 +1187,17 @@ void assert_fdi_rx_pll(struct drm_i915_private > *dev_priv, > onoff(state), onoff(cur_state)); > } > > -void assert_panel_unlocked(struct drm_i915_private *dev_priv, > -enum pipe pipe) > +void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe) > { > - struct drm_device *dev = _priv->drm; > i915_reg_t pp_reg; > u32 val; > enum pipe panel_pipe = PIPE_A; > bool locked = true; > > - if (WARN_ON(HAS_DDI(dev))) > + if (WARN_ON(HAS_DDI(dev_priv))) > return; > > - if (HAS_PCH_SPLIT(dev))
[Intel-gfx] [PATCH 01/19] drm/i915: Make HAS_DDI and HAS_PCH_LPT_LP only take dev_priv
From: Tvrtko UrsulinThis saves 3248 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) Signed-off-by: Tvrtko Ursulin --- drivers/gpu/drm/i915/i915_drv.h | 8 +++--- drivers/gpu/drm/i915/intel_crt.c | 10 +++ drivers/gpu/drm/i915/intel_display.c | 49 ++- drivers/gpu/drm/i915/intel_dp.c | 16 ++-- drivers/gpu/drm/i915/intel_dpll_mgr.c | 4 +-- drivers/gpu/drm/i915/intel_hdmi.c | 10 +++ drivers/gpu/drm/i915/intel_pm.c | 4 +-- drivers/gpu/drm/i915/intel_psr.c | 8 +++--- 8 files changed, 56 insertions(+), 53 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 54d860e1c0fc..51dd10f25f59 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2815,7 +2815,7 @@ struct drm_i915_cmd_table { #define HAS_DP_MST(dev)(INTEL_INFO(dev)->has_dp_mst) -#define HAS_DDI(dev) (INTEL_INFO(dev)->has_ddi) +#define HAS_DDI(dev_priv) ((dev_priv)->info.has_ddi) #define HAS_FPGA_DBG_UNCLAIMED(dev)(INTEL_INFO(dev)->has_fpga_dbg) #define HAS_PSR(dev) (INTEL_INFO(dev)->has_psr) #define HAS_RUNTIME_PM(dev)(INTEL_INFO(dev)->has_runtime_pm) @@ -2854,8 +2854,10 @@ struct drm_i915_cmd_table { #define HAS_PCH_KBP(dev) (INTEL_PCH_TYPE(dev) == PCH_KBP) #define HAS_PCH_SPT(dev) (INTEL_PCH_TYPE(dev) == PCH_SPT) #define HAS_PCH_LPT(dev) (INTEL_PCH_TYPE(dev) == PCH_LPT) -#define HAS_PCH_LPT_LP(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) -#define HAS_PCH_LPT_H(dev) (__I915__(dev)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) +#define HAS_PCH_LPT_LP(dev_priv) \ + ((dev_priv)->pch_id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) +#define HAS_PCH_LPT_H(dev_priv) \ + ((dev_priv)->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT) #define HAS_PCH_IBX(dev) (INTEL_PCH_TYPE(dev) == PCH_IBX) #define HAS_PCH_NOP(dev) (INTEL_PCH_TYPE(dev) == PCH_NOP) diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 4a7b6c595ec2..d4b9b166de5d 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c @@ -280,13 +280,13 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder, struct intel_crtc_state *pipe_config, struct drm_connector_state *conn_state) { - struct drm_device *dev = encoder->base.dev; + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); - if (HAS_PCH_SPLIT(dev)) + if (HAS_PCH_SPLIT(dev_priv)) pipe_config->has_pch_encoder = true; /* LPT FDI RX only supports 8bpc. */ - if (HAS_PCH_LPT(dev)) { + if (HAS_PCH_LPT(dev_priv)) { if (pipe_config->bw_constrained && pipe_config->pipe_bpp < 24) { DRM_DEBUG_KMS("LPT only supports 24bpp\n"); return false; @@ -296,7 +296,7 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder, } /* FDI must always be 2.7 GHz */ - if (HAS_DDI(dev)) + if (HAS_DDI(dev_priv)) pipe_config->port_clock = 135000 * 2; return true; @@ -917,7 +917,7 @@ void intel_crt_init(struct drm_device *dev) if (I915_HAS_HOTPLUG(dev) && !dmi_check_system(intel_spurious_crt_detect)) crt->base.hpd_pin = HPD_CRT; - if (HAS_DDI(dev)) { + if (HAS_DDI(dev_priv)) { crt->base.port = PORT_E; crt->base.get_config = hsw_crt_get_config; crt->base.get_hw_state = intel_ddi_get_hw_state; diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 23a6c7213eca..6e447b575413 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -1187,19 +1187,17 @@ void assert_fdi_rx_pll(struct drm_i915_private *dev_priv, onoff(state), onoff(cur_state)); } -void assert_panel_unlocked(struct drm_i915_private *dev_priv, - enum pipe pipe) +void assert_panel_unlocked(struct drm_i915_private *dev_priv, enum pipe pipe) { - struct drm_device *dev = _priv->drm; i915_reg_t pp_reg; u32 val; enum pipe panel_pipe = PIPE_A; bool locked = true; - if (WARN_ON(HAS_DDI(dev))) + if (WARN_ON(HAS_DDI(dev_priv))) return; - if (HAS_PCH_SPLIT(dev)) { + if (HAS_PCH_SPLIT(dev_priv)) { u32 port_sel; pp_reg = PP_CONTROL(0); @@ -1209,7 +1207,7 @@ void assert_panel_unlocked(struct drm_i915_private *dev_priv, I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) panel_pipe = PIPE_B; /* XXX: else fix for eDP */ -