[Intel-gfx] [PATCH 03/12] drm/i915: Simplify VLV drain latency computation

2015-03-05 Thread ville . syrjala 
From: Ville Syrjälä ville.syrj...@linux.intel.com

The current drain lantency computation relies on hardcoded limits to
determine when the to use the low vs. high precision multiplier.
Rewrite the code to use a more straightforward approach.

Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
---
 drivers/gpu/drm/i915/intel_pm.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0f0281a..d6c6c1b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -727,12 +727,15 @@ static bool vlv_compute_drain_latency(struct drm_crtc 
*crtc,
return false;
 
entries = DIV_ROUND_UP(clock, 1000) * pixel_size;
-   if (IS_CHERRYVIEW(dev))
-   *prec_mult = (entries  32) ? 16 : 8;
-   else
-   *prec_mult = (entries  128) ? 64 : 32;
+
+   *prec_mult = IS_CHERRYVIEW(dev) ? 16 : 64;
*drain_latency = (64 * (*prec_mult) * 4) / entries;
 
+   if (*drain_latency  DRAIN_LATENCY_MASK) {
+   *prec_mult /= 2;
+   *drain_latency = (64 * (*prec_mult) * 4) / entries;
+   }
+
if (*drain_latency  DRAIN_LATENCY_MASK)
*drain_latency = DRAIN_LATENCY_MASK;
 
-- 
2.0.5

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Re: [Intel-gfx] [PATCH 03/12] drm/i915: Simplify VLV drain latency computation

2015-02-27 Thread Jesse Barnes 
On 02/10/2015 05:28 AM, ville.syrj...@linux.intel.com wrote:
 From: Ville Syrjälä ville.syrj...@linux.intel.com
 
 The current drain lantency computation relies on hardcoded limits to
 determine when the to use the low vs. high precision multiplier.
 Rewrite the code to use a more straightforward approach.
 
 Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
 ---
  drivers/gpu/drm/i915/intel_pm.c | 11 +++
  1 file changed, 7 insertions(+), 4 deletions(-)
 
 diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
 index 0f0281a..d6c6c1b 100644
 --- a/drivers/gpu/drm/i915/intel_pm.c
 +++ b/drivers/gpu/drm/i915/intel_pm.c
 @@ -727,12 +727,15 @@ static bool vlv_compute_drain_latency(struct drm_crtc 
 *crtc,
   return false;
  
   entries = DIV_ROUND_UP(clock, 1000) * pixel_size;
 - if (IS_CHERRYVIEW(dev))
 - *prec_mult = (entries  32) ? 16 : 8;
 - else
 - *prec_mult = (entries  128) ? 64 : 32;
 +
 + *prec_mult = IS_CHERRYVIEW(dev) ? 16 : 64;
   *drain_latency = (64 * (*prec_mult) * 4) / entries;
  
 + if (*drain_latency  DRAIN_LATENCY_MASK) {
 + *prec_mult /= 2;
 + *drain_latency = (64 * (*prec_mult) * 4) / entries;
 + }
 +
   if (*drain_latency  DRAIN_LATENCY_MASK)
   *drain_latency = DRAIN_LATENCY_MASK;
  
 

Reviewed-by: Jesse Barnes jbar...@virtuousgeek.org
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[Intel-gfx] [PATCH 03/12] drm/i915: Simplify VLV drain latency computation

2015-02-10 Thread ville . syrjala 
From: Ville Syrjälä ville.syrj...@linux.intel.com

The current drain lantency computation relies on hardcoded limits to
determine when the to use the low vs. high precision multiplier.
Rewrite the code to use a more straightforward approach.

Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
---
 drivers/gpu/drm/i915/intel_pm.c | 11 +++
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0f0281a..d6c6c1b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -727,12 +727,15 @@ static bool vlv_compute_drain_latency(struct drm_crtc 
*crtc,
return false;
 
entries = DIV_ROUND_UP(clock, 1000) * pixel_size;
-   if (IS_CHERRYVIEW(dev))
-   *prec_mult = (entries  32) ? 16 : 8;
-   else
-   *prec_mult = (entries  128) ? 64 : 32;
+
+   *prec_mult = IS_CHERRYVIEW(dev) ? 16 : 64;
*drain_latency = (64 * (*prec_mult) * 4) / entries;
 
+   if (*drain_latency  DRAIN_LATENCY_MASK) {
+   *prec_mult /= 2;
+   *drain_latency = (64 * (*prec_mult) * 4) / entries;
+   }
+
if (*drain_latency  DRAIN_LATENCY_MASK)
*drain_latency = DRAIN_LATENCY_MASK;
 
-- 
2.0.5

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