On Tue, Jul 29, 2014 at 06:06:20PM +0100, Damien Lespiau wrote:
> Future platform will use config->ddi_pll_sel in a different way.
>
> Signed-off-by: Damien Lespiau
> ---
> drivers/gpu/drm/i915/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index ea6ff71..bdbe8f7 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -976,7 +976,7 @@ found:
> &pipe_config->dp_m2_n2);
> }
>
> - if (HAS_DDI(dev))
> + if (IS_HASWELL(dev) || IS_BROADWELL(dev))
> hsw_dp_set_ddi_pll_sel(pipe_config, intel_dp->link_bw);
> else
> intel_dp_set_clock(encoder, pipe_config, intel_dp->link_bw);
We could do an s/intel/gmch/ here too ... Or g4x.
-Daniel
> --
> 1.8.3.1
>
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--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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