Re: [Intel-gfx] [PATCH 05/11] drm/i915: Introduce i915_timeline.mutex
Quoting Tvrtko Ursulin (2019-02-28 07:43:41) > > On 26/02/2019 10:23, Chris Wilson wrote: > > A simple mutex used for guarding the flow of requests in and out of the > > timeline. In the short-term, it will be used only to guard the addition > > of requests into the timeline, taken on alloc and released on commit so > > that only one caller can construct a request into the timeline > > (important as the seqno and ring pointers must be serialised). This will > > be used by observers to ensure that the seqno/hwsp is stable. Later, > > when we have reduced retiring to only operate on a single timeline at a > > time, we can then use the mutex as the sole guard required for retiring. > > At which point does this gets used? In media scalability patches or later? It is in this series to explicitly lock i915_timeline_read_hswp(). It's real calling is in removing the global ordering, as then request alloc/retirement is under each timeline lock, and nothing but the timeline locks. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 05/11] drm/i915: Introduce i915_timeline.mutex
On 26/02/2019 10:23, Chris Wilson wrote:
A simple mutex used for guarding the flow of requests in and out of the
timeline. In the short-term, it will be used only to guard the addition
of requests into the timeline, taken on alloc and released on commit so
that only one caller can construct a request into the timeline
(important as the seqno and ring pointers must be serialised). This will
be used by observers to ensure that the seqno/hwsp is stable. Later,
when we have reduced retiring to only operate on a single timeline at a
time, we can then use the mutex as the sole guard required for retiring.
At which point does this gets used? In media scalability patches or later?
Regards,
Tvrtko
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_request.c| 6 +-
drivers/gpu/drm/i915/i915_timeline.c | 1 +
drivers/gpu/drm/i915/i915_timeline.h | 2 ++
drivers/gpu/drm/i915/selftests/i915_request.c | 4 +---
drivers/gpu/drm/i915/selftests/mock_timeline.c | 1 +
5 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index c65f6c990fdd..719d1a5ab082 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -563,6 +563,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
return ERR_CAST(ce);
reserve_gt(i915);
+ mutex_lock(>ring->timeline->mutex);
/* Move our oldest request to the slab-cache (if not in use!) */
rq = list_first_entry(>ring->request_list, typeof(*rq), ring_link);
@@ -688,6 +689,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
kmem_cache_free(global.slab_requests, rq);
err_unreserve:
+ mutex_unlock(>ring->timeline->mutex);
unreserve_gt(i915);
intel_context_unpin(ce);
return ERR_PTR(ret);
@@ -880,7 +882,7 @@ void i915_request_add(struct i915_request *request)
GEM_TRACE("%s fence %llx:%lld\n",
engine->name, request->fence.context, request->fence.seqno);
- lockdep_assert_held(>i915->drm.struct_mutex);
+ lockdep_assert_held(>timeline->mutex);
trace_i915_request_add(request);
/*
@@ -991,6 +993,8 @@ void i915_request_add(struct i915_request *request)
*/
if (prev && i915_request_completed(prev))
i915_request_retire_upto(prev);
+
+ mutex_unlock(>timeline->mutex);
}
static unsigned long local_clock_us(unsigned int *cpu)
diff --git a/drivers/gpu/drm/i915/i915_timeline.c
b/drivers/gpu/drm/i915/i915_timeline.c
index b2202d2e58a2..87a80558da28 100644
--- a/drivers/gpu/drm/i915/i915_timeline.c
+++ b/drivers/gpu/drm/i915/i915_timeline.c
@@ -162,6 +162,7 @@ int i915_timeline_init(struct drm_i915_private *i915,
timeline->fence_context = dma_fence_context_alloc(1);
spin_lock_init(>lock);
+ mutex_init(>mutex);
INIT_ACTIVE_REQUEST(>barrier);
INIT_ACTIVE_REQUEST(>last_request);
diff --git a/drivers/gpu/drm/i915/i915_timeline.h
b/drivers/gpu/drm/i915/i915_timeline.h
index 7bec7d2e45bf..36c3849f7108 100644
--- a/drivers/gpu/drm/i915/i915_timeline.h
+++ b/drivers/gpu/drm/i915/i915_timeline.h
@@ -44,6 +44,8 @@ struct i915_timeline {
#define TIMELINE_CLIENT 0 /* default subclass */
#define TIMELINE_ENGINE 1
+ struct mutex mutex; /* protects the flow of requests */
+
unsigned int pin_count;
const u32 *hwsp_seqno;
struct i915_vma *hwsp_ggtt;
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c
b/drivers/gpu/drm/i915/selftests/i915_request.c
index 7da52e3d67af..7e1b65b8eb19 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -141,14 +141,12 @@ static int igt_fence_wait(void *arg)
err = -ENOMEM;
goto out_locked;
}
- mutex_unlock(>drm.struct_mutex); /* safe as we are single user */
if (dma_fence_wait_timeout(>fence, false, T) != -ETIME) {
pr_err("fence wait success before submit (expected
timeout)!\n");
- goto out_device;
+ goto out_locked;
}
- mutex_lock(>drm.struct_mutex);
i915_request_add(request);
mutex_unlock(>drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/selftests/mock_timeline.c b/drivers/gpu/drm/i915/selftests/mock_timeline.c
index d2de9ece2118..416d85233263 100644
--- a/drivers/gpu/drm/i915/selftests/mock_timeline.c
+++ b/drivers/gpu/drm/i915/selftests/mock_timeline.c
@@ -14,6 +14,7 @@ void mock_timeline_init(struct i915_timeline *timeline, u64
context)
timeline->fence_context = context;
spin_lock_init(>lock);
+ mutex_init(>mutex);
INIT_ACTIVE_REQUEST(>barrier);
INIT_ACTIVE_REQUEST(>last_request);
___
Intel-gfx mailing list
[Intel-gfx] [PATCH 05/11] drm/i915: Introduce i915_timeline.mutex
A simple mutex used for guarding the flow of requests in and out of the
timeline. In the short-term, it will be used only to guard the addition
of requests into the timeline, taken on alloc and released on commit so
that only one caller can construct a request into the timeline
(important as the seqno and ring pointers must be serialised). This will
be used by observers to ensure that the seqno/hwsp is stable. Later,
when we have reduced retiring to only operate on a single timeline at a
time, we can then use the mutex as the sole guard required for retiring.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_request.c| 6 +-
drivers/gpu/drm/i915/i915_timeline.c | 1 +
drivers/gpu/drm/i915/i915_timeline.h | 2 ++
drivers/gpu/drm/i915/selftests/i915_request.c | 4 +---
drivers/gpu/drm/i915/selftests/mock_timeline.c | 1 +
5 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_request.c
b/drivers/gpu/drm/i915/i915_request.c
index c65f6c990fdd..719d1a5ab082 100644
--- a/drivers/gpu/drm/i915/i915_request.c
+++ b/drivers/gpu/drm/i915/i915_request.c
@@ -563,6 +563,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
return ERR_CAST(ce);
reserve_gt(i915);
+ mutex_lock(>ring->timeline->mutex);
/* Move our oldest request to the slab-cache (if not in use!) */
rq = list_first_entry(>ring->request_list, typeof(*rq), ring_link);
@@ -688,6 +689,7 @@ i915_request_alloc(struct intel_engine_cs *engine, struct
i915_gem_context *ctx)
kmem_cache_free(global.slab_requests, rq);
err_unreserve:
+ mutex_unlock(>ring->timeline->mutex);
unreserve_gt(i915);
intel_context_unpin(ce);
return ERR_PTR(ret);
@@ -880,7 +882,7 @@ void i915_request_add(struct i915_request *request)
GEM_TRACE("%s fence %llx:%lld\n",
engine->name, request->fence.context, request->fence.seqno);
- lockdep_assert_held(>i915->drm.struct_mutex);
+ lockdep_assert_held(>timeline->mutex);
trace_i915_request_add(request);
/*
@@ -991,6 +993,8 @@ void i915_request_add(struct i915_request *request)
*/
if (prev && i915_request_completed(prev))
i915_request_retire_upto(prev);
+
+ mutex_unlock(>timeline->mutex);
}
static unsigned long local_clock_us(unsigned int *cpu)
diff --git a/drivers/gpu/drm/i915/i915_timeline.c
b/drivers/gpu/drm/i915/i915_timeline.c
index b2202d2e58a2..87a80558da28 100644
--- a/drivers/gpu/drm/i915/i915_timeline.c
+++ b/drivers/gpu/drm/i915/i915_timeline.c
@@ -162,6 +162,7 @@ int i915_timeline_init(struct drm_i915_private *i915,
timeline->fence_context = dma_fence_context_alloc(1);
spin_lock_init(>lock);
+ mutex_init(>mutex);
INIT_ACTIVE_REQUEST(>barrier);
INIT_ACTIVE_REQUEST(>last_request);
diff --git a/drivers/gpu/drm/i915/i915_timeline.h
b/drivers/gpu/drm/i915/i915_timeline.h
index 7bec7d2e45bf..36c3849f7108 100644
--- a/drivers/gpu/drm/i915/i915_timeline.h
+++ b/drivers/gpu/drm/i915/i915_timeline.h
@@ -44,6 +44,8 @@ struct i915_timeline {
#define TIMELINE_CLIENT 0 /* default subclass */
#define TIMELINE_ENGINE 1
+ struct mutex mutex; /* protects the flow of requests */
+
unsigned int pin_count;
const u32 *hwsp_seqno;
struct i915_vma *hwsp_ggtt;
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c
b/drivers/gpu/drm/i915/selftests/i915_request.c
index 7da52e3d67af..7e1b65b8eb19 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -141,14 +141,12 @@ static int igt_fence_wait(void *arg)
err = -ENOMEM;
goto out_locked;
}
- mutex_unlock(>drm.struct_mutex); /* safe as we are single user */
if (dma_fence_wait_timeout(>fence, false, T) != -ETIME) {
pr_err("fence wait success before submit (expected
timeout)!\n");
- goto out_device;
+ goto out_locked;
}
- mutex_lock(>drm.struct_mutex);
i915_request_add(request);
mutex_unlock(>drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/selftests/mock_timeline.c
b/drivers/gpu/drm/i915/selftests/mock_timeline.c
index d2de9ece2118..416d85233263 100644
--- a/drivers/gpu/drm/i915/selftests/mock_timeline.c
+++ b/drivers/gpu/drm/i915/selftests/mock_timeline.c
@@ -14,6 +14,7 @@ void mock_timeline_init(struct i915_timeline *timeline, u64
context)
timeline->fence_context = context;
spin_lock_init(>lock);
+ mutex_init(>mutex);
INIT_ACTIVE_REQUEST(>barrier);
INIT_ACTIVE_REQUEST(>last_request);
--
2.20.1
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
