[Intel-gfx] [PATCH 07/10] drm/i915/guc: Simplify intel_guc_init_hw()

[Arkadiusz Hiler]

Current version of intel_guc_init_hw() does a lot:
 - cares about submission
 - loads huc
 - implement WA

This change offloads some of the logic to intel_uc_init_hw(), which now
cares about the above.

v2: rename guc_hw_reset and fix typo in define name (M. Wajdeczko)
v3: rename once again
v4: remove spurious comments and add some style (J. Lahtinen)
v5: flow changes, got rid of dead checks (M. Wajdeczko)

Cc: Anusha Srivatsa 
Cc: Michal Winiarski 
Cc: Michal Wajdeczko 
Cc: Daniele Ceraolo Spurio 
Cc: Joonas Lahtinen 
Signed-off-by: Arkadiusz Hiler 
---
 drivers/gpu/drm/i915/i915_gem.c |   2 +-
 drivers/gpu/drm/i915/intel_guc_loader.c | 147 +++-
 drivers/gpu/drm/i915/intel_uc.c | 114 +
 drivers/gpu/drm/i915/intel_uc.h |   3 +
 4 files changed, 130 insertions(+), 136 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 2c3057c..ef9f8e5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4454,7 +4454,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
intel_mocs_init_l3cc_table(dev_priv);
 
/* We can't enable contexts until all firmware is loaded */
-   ret = intel_guc_init_hw(_priv->guc);
+   ret = intel_uc_init_hw(dev_priv);
if (ret)
goto out;
 
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c 
b/drivers/gpu/drm/i915/intel_guc_loader.c
index 2761a76..f63e7e8 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -90,7 +90,7 @@ const char *intel_uc_fw_status_repr(enum intel_uc_fw_status 
status)
}
 };
 
-static void guc_interrupts_release(struct drm_i915_private *dev_priv)
+void intel_guc_release_interrupts(struct drm_i915_private *dev_priv)
 {
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -108,7 +108,7 @@ static void guc_interrupts_release(struct drm_i915_private 
*dev_priv)
I915_WRITE(GUC_WD_VECS_IER, 0);
 }
 
-static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
+void intel_guc_capture_interrupts(struct drm_i915_private *dev_priv)
 {
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -408,24 +408,6 @@ static int guc_ucode_xfer(struct drm_i915_private 
*dev_priv)
return ret;
 }
 
-static int guc_hw_reset(struct drm_i915_private *dev_priv)
-{
-   int ret;
-   u32 guc_status;
-
-   ret = intel_guc_reset(dev_priv);
-   if (ret) {
-   DRM_ERROR("GuC reset failed, ret = %d\n", ret);
-   return ret;
-   }
-
-   guc_status = I915_READ(GUC_STATUS);
-   WARN(!(guc_status & GS_MIA_IN_RESET),
-"GuC status: 0x%x, MIA core expected to be in reset\n", 
guc_status);
-
-   return ret;
-}
-
 /**
  * intel_guc_init_hw() - finish preparing the GuC for activity
  * @guc: intel_guc structure
@@ -443,42 +425,22 @@ int intel_guc_init_hw(struct intel_guc *guc)
 {
struct drm_i915_private *dev_priv = guc_to_i915(guc);
const char *fw_path = guc->fw.path;
-   int retries, ret, err;
+   int ret;
 
DRM_DEBUG_DRIVER("GuC fw status: path %s, fetch %s, load %s\n",
fw_path,
intel_uc_fw_status_repr(guc->fw.fetch_status),
intel_uc_fw_status_repr(guc->fw.load_status));
 
-   /* Loading forbidden, or no firmware to load? */
-   if (!i915.enable_guc_loading) {
-   err = 0;
-   goto fail;
-   } else if (fw_path == NULL) {
-   /* Device is known to have no uCode (e.g. no GuC) */
-   err = -ENXIO;
-   goto fail;
+   if (!fw_path) {
+   return -ENXIO;
} else if (*fw_path == '\0') {
-   /* Device has a GuC but we don't know what f/w to load? */
WARN(1, "No GuC firmware known for this platform!\n");
-   err = -ENODEV;
-   goto fail;
+   return -ENODEV;
}
 
-   /* Fetch failed, or already fetched but failed to load? */
-   if (guc->fw.fetch_status != INTEL_UC_FIRMWARE_SUCCESS) {
-   err = -EIO;
-   goto fail;
-   } else if (guc->fw.load_status == INTEL_UC_FIRMWARE_FAIL) {
-   err = -ENOEXEC;
-   goto fail;
-   }
-
-   guc_interrupts_release(dev_priv);
-   gen9_reset_guc_interrupts(dev_priv);
-
-   /* We need to notify the guc whenever we change the GGTT */
-   i915_ggtt_enable_guc(dev_priv);
+   if (guc->fw.fetch_status != INTEL_UC_FIRMWARE_SUCCESS)
+   return -EIO;
 
guc->fw.load_status = INTEL_UC_FIRMWARE_PENDING;
 
@@ -486,104 +448,19 @@ int intel_guc_init_hw(struct intel_guc *guc)

[Intel-gfx] [PATCH 07/10] drm/i915/guc: Simplify intel_guc_init_hw()

[Arkadiusz Hiler]

Current version of intel_guc_init_hw() does a lot:
 - cares about submission
 - loads huc
 - implement WA

This change offloads some of the logic to intel_uc_init_hw(), which now
cares about the above.

v2: rename guc_hw_reset and fix typo in define name (M. Wajdeczko)
v3: rename once again
v4: remove spurious comments and add some style (J. Lahtinen)
v5: flow changes, got rid of dead checks (M. Wajdeczko)

Cc: Anusha Srivatsa 
Cc: Michal Winiarski 
Cc: Michal Wajdeczko 
Cc: Daniele Ceraolo Spurio 
Cc: Joonas Lahtinen 
Signed-off-by: Arkadiusz Hiler 
---
 drivers/gpu/drm/i915/i915_gem.c |   2 +-
 drivers/gpu/drm/i915/intel_guc_loader.c | 147 +++-
 drivers/gpu/drm/i915/intel_uc.c | 114 +
 drivers/gpu/drm/i915/intel_uc.h |   3 +
 4 files changed, 130 insertions(+), 136 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 29c3bba..e91be58 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4454,7 +4454,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
intel_mocs_init_l3cc_table(dev_priv);
 
/* We can't enable contexts until all firmware is loaded */
-   ret = intel_guc_init_hw(dev_priv);
+   ret = intel_uc_init_hw(dev_priv);
if (ret)
goto out;
 
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c 
b/drivers/gpu/drm/i915/intel_guc_loader.c
index fb518e0..192f1af 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -90,7 +90,7 @@ const char *intel_uc_fw_status_repr(enum intel_uc_fw_status 
status)
}
 };
 
-static void guc_interrupts_release(struct drm_i915_private *dev_priv)
+void intel_guc_release_interrupts(struct drm_i915_private *dev_priv)
 {
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -108,7 +108,7 @@ static void guc_interrupts_release(struct drm_i915_private 
*dev_priv)
I915_WRITE(GUC_WD_VECS_IER, 0);
 }
 
-static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
+void intel_guc_capture_interrupts(struct drm_i915_private *dev_priv)
 {
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -408,24 +408,6 @@ static int guc_ucode_xfer(struct drm_i915_private 
*dev_priv)
return ret;
 }
 
-static int guc_hw_reset(struct drm_i915_private *dev_priv)
-{
-   int ret;
-   u32 guc_status;
-
-   ret = intel_guc_reset(dev_priv);
-   if (ret) {
-   DRM_ERROR("GuC reset failed, ret = %d\n", ret);
-   return ret;
-   }
-
-   guc_status = I915_READ(GUC_STATUS);
-   WARN(!(guc_status & GS_MIA_IN_RESET),
-"GuC status: 0x%x, MIA core expected to be in reset\n", 
guc_status);
-
-   return ret;
-}
-
 /**
  * intel_guc_init_hw() - finish preparing the GuC for activity
  * @dev_priv:  i915 device private
@@ -443,42 +425,22 @@ int intel_guc_init_hw(struct drm_i915_private *dev_priv)
 {
struct intel_uc_fw *guc_fw = _priv->guc.fw;
const char *fw_path = guc_fw->path;
-   int retries, ret, err;
+   int ret;
 
DRM_DEBUG_DRIVER("GuC fw status: path %s, fetch %s, load %s\n",
fw_path,
intel_uc_fw_status_repr(guc_fw->fetch_status),
intel_uc_fw_status_repr(guc_fw->load_status));
 
-   /* Loading forbidden, or no firmware to load? */
-   if (!i915.enable_guc_loading) {
-   err = 0;
-   goto fail;
-   } else if (fw_path == NULL) {
-   /* Device is known to have no uCode (e.g. no GuC) */
-   err = -ENXIO;
-   goto fail;
+   if (!fw_path) {
+   return -ENXIO;
} else if (*fw_path == '\0') {
-   /* Device has a GuC but we don't know what f/w to load? */
WARN(1, "No GuC firmware known for this platform!\n");
-   err = -ENODEV;
-   goto fail;
+   return -ENODEV;
}
 
-   /* Fetch failed, or already fetched but failed to load? */
-   if (guc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS) {
-   err = -EIO;
-   goto fail;
-   } else if (guc_fw->load_status == INTEL_UC_FIRMWARE_FAIL) {
-   err = -ENOEXEC;
-   goto fail;
-   }
-
-   guc_interrupts_release(dev_priv);
-   gen9_reset_guc_interrupts(dev_priv);
-
-   /* We need to notify the guc whenever we change the GGTT */
-   i915_ggtt_enable_guc(dev_priv);
+   if (guc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS)
+   return -EIO;
 
guc_fw->load_status = INTEL_UC_FIRMWARE_PENDING;
 
@@ -486,104 +448,19 @@ int intel_guc_init_hw(struct drm_i915_private *dev_priv)

Re: [Intel-gfx] [PATCH 07/10] drm/i915/guc: Simplify intel_guc_init_hw()

[Arkadiusz Hiler]

On Fri, Feb 24, 2017 at 06:26:10PM +0100, Michal Wajdeczko wrote:
> On Fri, Feb 24, 2017 at 04:40:01PM +0100, Arkadiusz Hiler wrote:
> > Current version of intel_guc_init_hw() does a lot:
> >  - cares about submission
> >  - loads huc
> >  - implement WA
> > 
> > This change offloads some of the logic to intel_uc_init_hw(), which now
> > cares about the above.
> > 
> > v2: rename guc_hw_reset and fix typo in define name (M. Wajdeczko)
> > v3: rename once again
> > v4: remove spurious comments and add some style (J. Lahtinen)
> > 
> > Cc: Anusha Srivatsa 
> > Cc: Michal Winiarski 
> > Cc: Michal Wajdeczko 
> > Cc: Daniele Ceraolo Spurio 
> > Cc: Joonas Lahtinen 
> > Signed-off-by: Arkadiusz Hiler 
> > ---
> >  drivers/gpu/drm/i915/i915_gem.c |   2 +-
> >  drivers/gpu/drm/i915/intel_guc_loader.c | 144 
> > 
> >  drivers/gpu/drm/i915/intel_uc.c | 110 
> >  drivers/gpu/drm/i915/intel_uc.h |   3 +
> >  4 files changed, 128 insertions(+), 131 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_gem.c 
> > b/drivers/gpu/drm/i915/i915_gem.c
> > index 5b36524..8943c4e 100644
> > @@ -443,42 +425,24 @@ int intel_guc_init_hw(struct drm_i915_private 
> > *dev_priv)
> >  {
> 
> > -   /* Loading forbidden, or no firmware to load? */
> > -   if (!i915.enable_guc_loading) {
> > -   err = 0;
> > -   goto fail;
> > -   } else if (fw_path == NULL) {
> > -   /* Device is known to have no uCode (e.g. no GuC) */
> > -   err = -ENXIO;
> > -   goto fail;
> > +   if (!fw_path) {
> > +   return -ENXIO;
> > } else if (*fw_path == '\0') {
> 
> Hmm, is this case still possible?

In this revision - yes, but unlikely.

HAS_GUC() is true but firmware for the device is not known (see
init_fw()). I think that the initial flow was designed in this case in
mind.

> > -   /* Device has a GuC but we don't know what f/w to load? */
> > WARN(1, "No GuC firmware known for this platform!\n");
> > -   err = -ENODEV;
> > -   goto fail;
> > +   return -ENODEV;
> > }
> >  
> > -   /* Fetch failed, or already fetched but failed to load? */
> > -   if (guc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS) {
> > -   err = -EIO;
> > -   goto fail;
> > -   } else if (guc_fw->load_status == INTEL_UC_FIRMWARE_FAIL) {
> > -   err = -ENOEXEC;
> > -   goto fail;
> > -   }
> > -
> > -   guc_interrupts_release(dev_priv);
> > -   gen9_reset_guc_interrupts(dev_priv);
> > -
> > -   /* We need to notify the guc whenever we change the GGTT */
> > -   i915_ggtt_enable_guc(dev_priv);
> > +   if (guc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS)
> > +   return -EIO;
> > +   else if (guc_fw->load_status == INTEL_UC_FIRMWARE_FAIL)
> > +   return -ENOEXEC;
> 
> Hmm, it looks like you're checking for load failure here, but actual
> load is about to start below ? Did I missed something ?

The status FIRMWARE_FAIL is not used at all in the GuC path (HuC) uses
it. Noted down to give it a closer look.

The check is gone, as it does not make sense, thanks.

> > guc_fw->load_status = INTEL_UC_FIRMWARE_PENDING;
> 
> I guess this status can be set in guc_ucode_xfer() as it uses guc_fw object.

> >  
> > @@ -486,104 +450,24 @@ int intel_guc_init_hw(struct drm_i915_private 
> > *dev_priv)
> > intel_uc_fw_status_repr(guc_fw->fetch_status),
> > intel_uc_fw_status_repr(guc_fw->load_status));
> >  
> > -   err = i915_guc_submission_init(dev_priv);
> > -   if (err)
> > -   goto fail;
> > -
> > /*
> >  * WaEnableuKernelHeaderValidFix:skl,bxt
> >  * For BXT, this is only upto B0 but below WA is required for later
> >  * steppings also so this is extended as well.
> >  */
> 
> Rebase issue?

Yeah. I've streamlined the whole thing to be:

--
int attempts;
const int guc_wa_hash_check_not_set_attempts = 3;



/* WaEnableuKernelHeaderValidFix:skl */
/* WaEnableGuCBootHashCheckNotSet:skl,bxt,kbl */
if (IS_GEN9(dev_priv))
attempts = guc_wa_hash_check_not_set_attempts;
else
attempts = 1;

while (attempts--) ...
--


and dropped the WA comments in the guc_init_hw()



> > +int intel_uc_init_hw(struct drm_i915_private *dev_priv)
> > +{
> 
> > +fail:
> > +   /*
> > +* We've failed to load the firmware :(
> > +*
> > +* Decide whether to disable GuC submission and fall back to
> > +* execlist mode, and whether to hide the error by returning
> > +* zero or to return -EIO, which the caller will treat as a
> > +* nonfatal error (i.e. it doesn't prevent driver load, but
> > +* marks the GPU as 

Re: [Intel-gfx] [PATCH 07/10] drm/i915/guc: Simplify intel_guc_init_hw()

[Michal Wajdeczko]

On Fri, Feb 24, 2017 at 04:40:01PM +0100, Arkadiusz Hiler wrote:
> Current version of intel_guc_init_hw() does a lot:
>  - cares about submission
>  - loads huc
>  - implement WA
> 
> This change offloads some of the logic to intel_uc_init_hw(), which now
> cares about the above.
> 
> v2: rename guc_hw_reset and fix typo in define name (M. Wajdeczko)
> v3: rename once again
> v4: remove spurious comments and add some style (J. Lahtinen)
> 
> Cc: Anusha Srivatsa 
> Cc: Michal Winiarski 
> Cc: Michal Wajdeczko 
> Cc: Daniele Ceraolo Spurio 
> Cc: Joonas Lahtinen 
> Signed-off-by: Arkadiusz Hiler 
> ---
>  drivers/gpu/drm/i915/i915_gem.c |   2 +-
>  drivers/gpu/drm/i915/intel_guc_loader.c | 144 
> 
>  drivers/gpu/drm/i915/intel_uc.c | 110 
>  drivers/gpu/drm/i915/intel_uc.h |   3 +
>  4 files changed, 128 insertions(+), 131 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 5b36524..8943c4e 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -4452,7 +4452,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
>   intel_mocs_init_l3cc_table(dev_priv);
>  
>   /* We can't enable contexts until all firmware is loaded */
> - ret = intel_guc_init_hw(dev_priv);
> + ret = intel_uc_init_hw(dev_priv);
>   if (ret)
>   goto out;
>  
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c 
> b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 5bd1e4a..8e9a2e29 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -90,7 +90,7 @@ const char *intel_uc_fw_status_repr(enum intel_uc_fw_status 
> status)
>   }
>  };
>  
> -static void guc_interrupts_release(struct drm_i915_private *dev_priv)
> +void intel_guc_interrupts_release(struct drm_i915_private *dev_priv)

Hmm, maybe better name for this function would be 
"intel_release_guc_interrupts" ?
Then it will match your subject-verb-object pattern.


>  {
>   struct intel_engine_cs *engine;
>   enum intel_engine_id id;
> @@ -108,7 +108,7 @@ static void guc_interrupts_release(struct 
> drm_i915_private *dev_priv)
>   I915_WRITE(GUC_WD_VECS_IER, 0);
>  }
>  
> -static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
> +void intel_guc_interrupts_capture(struct drm_i915_private *dev_priv)
>  {
>   struct intel_engine_cs *engine;
>   enum intel_engine_id id;
> @@ -408,24 +408,6 @@ static int guc_ucode_xfer(struct drm_i915_private 
> *dev_priv)
>   return ret;
>  }
>  
> -static int guc_hw_reset(struct drm_i915_private *dev_priv)
> -{
> - int ret;
> - u32 guc_status;
> -
> - ret = intel_guc_reset(dev_priv);
> - if (ret) {
> - DRM_ERROR("GuC reset failed, ret = %d\n", ret);
> - return ret;
> - }
> -
> - guc_status = I915_READ(GUC_STATUS);
> - WARN(!(guc_status & GS_MIA_IN_RESET),
> -  "GuC status: 0x%x, MIA core expected to be in reset\n", 
> guc_status);
> -
> - return ret;
> -}
> -
>  /**
>   * intel_guc_init_hw() - finish preparing the GuC for activity
>   * @dev_priv:i915 device private
> @@ -443,42 +425,24 @@ int intel_guc_init_hw(struct drm_i915_private *dev_priv)
>  {
>   struct intel_uc_fw *guc_fw = _priv->guc.fw;
>   const char *fw_path = guc_fw->path;
> - int retries, ret, err;
> + int ret;
>  
>   DRM_DEBUG_DRIVER("GuC fw status: path %s, fetch %s, load %s\n",
>   fw_path,
>   intel_uc_fw_status_repr(guc_fw->fetch_status),
>   intel_uc_fw_status_repr(guc_fw->load_status));
>  
> - /* Loading forbidden, or no firmware to load? */
> - if (!i915.enable_guc_loading) {
> - err = 0;
> - goto fail;
> - } else if (fw_path == NULL) {
> - /* Device is known to have no uCode (e.g. no GuC) */
> - err = -ENXIO;
> - goto fail;
> + if (!fw_path) {
> + return -ENXIO;
>   } else if (*fw_path == '\0') {

Hmm, is this case still possible?


> - /* Device has a GuC but we don't know what f/w to load? */
>   WARN(1, "No GuC firmware known for this platform!\n");
> - err = -ENODEV;
> - goto fail;
> + return -ENODEV;
>   }
>  
> - /* Fetch failed, or already fetched but failed to load? */
> - if (guc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS) {
> - err = -EIO;
> - goto fail;
> - } else if (guc_fw->load_status == INTEL_UC_FIRMWARE_FAIL) {
> - err = -ENOEXEC;
> - goto fail;
> - }
> -
> - guc_interrupts_release(dev_priv);
> - gen9_reset_guc_interrupts(dev_priv);
> -
> - 

[Intel-gfx] [PATCH 07/10] drm/i915/guc: Simplify intel_guc_init_hw()

[Arkadiusz Hiler]

Current version of intel_guc_init_hw() does a lot:
 - cares about submission
 - loads huc
 - implement WA

This change offloads some of the logic to intel_uc_init_hw(), which now
cares about the above.

v2: rename guc_hw_reset and fix typo in define name (M. Wajdeczko)
v3: rename once again
v4: remove spurious comments and add some style (J. Lahtinen)

Cc: Anusha Srivatsa 
Cc: Michal Winiarski 
Cc: Michal Wajdeczko 
Cc: Daniele Ceraolo Spurio 
Cc: Joonas Lahtinen 
Signed-off-by: Arkadiusz Hiler 
---
 drivers/gpu/drm/i915/i915_gem.c |   2 +-
 drivers/gpu/drm/i915/intel_guc_loader.c | 144 
 drivers/gpu/drm/i915/intel_uc.c | 110 
 drivers/gpu/drm/i915/intel_uc.h |   3 +
 4 files changed, 128 insertions(+), 131 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5b36524..8943c4e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4452,7 +4452,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
intel_mocs_init_l3cc_table(dev_priv);
 
/* We can't enable contexts until all firmware is loaded */
-   ret = intel_guc_init_hw(dev_priv);
+   ret = intel_uc_init_hw(dev_priv);
if (ret)
goto out;
 
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c 
b/drivers/gpu/drm/i915/intel_guc_loader.c
index 5bd1e4a..8e9a2e29 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -90,7 +90,7 @@ const char *intel_uc_fw_status_repr(enum intel_uc_fw_status 
status)
}
 };
 
-static void guc_interrupts_release(struct drm_i915_private *dev_priv)
+void intel_guc_interrupts_release(struct drm_i915_private *dev_priv)
 {
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -108,7 +108,7 @@ static void guc_interrupts_release(struct drm_i915_private 
*dev_priv)
I915_WRITE(GUC_WD_VECS_IER, 0);
 }
 
-static void guc_interrupts_capture(struct drm_i915_private *dev_priv)
+void intel_guc_interrupts_capture(struct drm_i915_private *dev_priv)
 {
struct intel_engine_cs *engine;
enum intel_engine_id id;
@@ -408,24 +408,6 @@ static int guc_ucode_xfer(struct drm_i915_private 
*dev_priv)
return ret;
 }
 
-static int guc_hw_reset(struct drm_i915_private *dev_priv)
-{
-   int ret;
-   u32 guc_status;
-
-   ret = intel_guc_reset(dev_priv);
-   if (ret) {
-   DRM_ERROR("GuC reset failed, ret = %d\n", ret);
-   return ret;
-   }
-
-   guc_status = I915_READ(GUC_STATUS);
-   WARN(!(guc_status & GS_MIA_IN_RESET),
-"GuC status: 0x%x, MIA core expected to be in reset\n", 
guc_status);
-
-   return ret;
-}
-
 /**
  * intel_guc_init_hw() - finish preparing the GuC for activity
  * @dev_priv:  i915 device private
@@ -443,42 +425,24 @@ int intel_guc_init_hw(struct drm_i915_private *dev_priv)
 {
struct intel_uc_fw *guc_fw = _priv->guc.fw;
const char *fw_path = guc_fw->path;
-   int retries, ret, err;
+   int ret;
 
DRM_DEBUG_DRIVER("GuC fw status: path %s, fetch %s, load %s\n",
fw_path,
intel_uc_fw_status_repr(guc_fw->fetch_status),
intel_uc_fw_status_repr(guc_fw->load_status));
 
-   /* Loading forbidden, or no firmware to load? */
-   if (!i915.enable_guc_loading) {
-   err = 0;
-   goto fail;
-   } else if (fw_path == NULL) {
-   /* Device is known to have no uCode (e.g. no GuC) */
-   err = -ENXIO;
-   goto fail;
+   if (!fw_path) {
+   return -ENXIO;
} else if (*fw_path == '\0') {
-   /* Device has a GuC but we don't know what f/w to load? */
WARN(1, "No GuC firmware known for this platform!\n");
-   err = -ENODEV;
-   goto fail;
+   return -ENODEV;
}
 
-   /* Fetch failed, or already fetched but failed to load? */
-   if (guc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS) {
-   err = -EIO;
-   goto fail;
-   } else if (guc_fw->load_status == INTEL_UC_FIRMWARE_FAIL) {
-   err = -ENOEXEC;
-   goto fail;
-   }
-
-   guc_interrupts_release(dev_priv);
-   gen9_reset_guc_interrupts(dev_priv);
-
-   /* We need to notify the guc whenever we change the GGTT */
-   i915_ggtt_enable_guc(dev_priv);
+   if (guc_fw->fetch_status != INTEL_UC_FIRMWARE_SUCCESS)
+   return -EIO;
+   else if (guc_fw->load_status == INTEL_UC_FIRMWARE_FAIL)
+   return -ENOEXEC;
 
guc_fw->load_status = INTEL_UC_FIRMWARE_PENDING;
 
@@ -486,104 +450,24 @@ int