Re: [Intel-gfx] [PATCH 07/15] drm/i915: gen specific ring init

2013-12-17 Thread Daniel Vetter 
On Mon, Dec 16, 2013 at 08:50:43PM -0800, Ben Widawsky wrote:
 Gen8 has already had some differentiation with how it handles rings.
 Semaphores bring yet more differences, and now is as good a time as any
 to do the split.
 
 Also, since gen8 doesn't actually use semaphores up until this point,
 put the proper NULL values in for the mbox info.
 
 v2: v1 had a stale commit message
 
 Signed-off-by: Ben Widawsky b...@bwidawsk.net

Subject should probably say gen_8_ specific ring init since for the
render ring we already have gen specific stuff. I can do this
color-adjustment when applying if nothing else pops up ;-)
-Daniel

 ---
  drivers/gpu/drm/i915/intel_ringbuffer.c | 134 
 ++--
  1 file changed, 92 insertions(+), 42 deletions(-)
 
 diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
 b/drivers/gpu/drm/i915/intel_ringbuffer.c
 index 7a8c5d8..db63a5c 100644
 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
 +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
 @@ -1857,19 +1857,33 @@ int intel_init_render_ring_buffer(struct drm_device 
 *dev)
   ring-id = RCS;
   ring-mmio_base = RENDER_RING_BASE;
  
 - if (INTEL_INFO(dev)-gen = 6) {
 + if (INTEL_INFO(dev)-gen = 8) {
 + ring-add_request = gen6_add_request;
 + ring-flush = gen8_render_ring_flush;
 + ring-irq_get = gen8_ring_get_irq;
 + ring-irq_put = gen8_ring_put_irq;
 + ring-irq_enable_mask = GT_RENDER_USER_INTERRUPT;
 + ring-get_seqno = gen6_ring_get_seqno;
 + ring-set_seqno = ring_set_seqno;
 + ring-semaphore.sync_to = gen6_ring_sync;
 + if (i915_semaphore_is_enabled(dev))
 + ring-semaphore.signal = gen6_signal;
 + ring-semaphore.signal = gen6_signal;
 + ring-semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_INVALID;
 + ring-semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
 + ring-semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
 + ring-semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
 + ring-semaphore.signal_mbox[RCS] = GEN6_NOSYNC;
 + ring-semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
 + ring-semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
 + ring-semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
 + } else if (INTEL_INFO(dev)-gen = 6) {
   ring-add_request = gen6_add_request;
   ring-flush = gen7_render_ring_flush;
   if (INTEL_INFO(dev)-gen == 6)
   ring-flush = gen6_render_ring_flush;
 - if (INTEL_INFO(dev)-gen = 8) {
 - ring-flush = gen8_render_ring_flush;
 - ring-irq_get = gen8_ring_get_irq;
 - ring-irq_put = gen8_ring_put_irq;
 - } else {
 - ring-irq_get = gen6_ring_get_irq;
 - ring-irq_put = gen6_ring_put_irq;
 - }
 + ring-irq_get = gen6_ring_get_irq;
 + ring-irq_put = gen6_ring_put_irq;
   ring-irq_enable_mask = GT_RENDER_USER_INTERRUPT;
   ring-get_seqno = gen6_ring_get_seqno;
   ring-set_seqno = ring_set_seqno;
 @@ -1911,6 +1925,7 @@ int intel_init_render_ring_buffer(struct drm_device 
 *dev)
   ring-irq_enable_mask = I915_USER_INTERRUPT;
   }
   ring-write_tail = ring_write_tail;
 +
   if (IS_HASWELL(dev))
   ring-dispatch_execbuffer = hsw_ring_dispatch_execbuffer;
   else if (IS_GEN8(dev))
 @@ -2044,24 +2059,35 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
   ring-irq_put = gen8_ring_put_irq;
   ring-dispatch_execbuffer =
   gen8_ring_dispatch_execbuffer;
 + ring-semaphore.sync_to = gen6_ring_sync;
 + if (i915_semaphore_is_enabled(dev))
 + ring-semaphore.signal = gen6_signal;
 + ring-semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_INVALID;
 + ring-semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
 + ring-semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
 + ring-semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
 + ring-semaphore.signal_mbox[RCS] = GEN6_NOSYNC;
 + ring-semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
 + ring-semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
 + ring-semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
   } else {
   ring-irq_enable_mask = GT_BSD_USER_INTERRUPT;
   ring-irq_get = gen6_ring_get_irq;
   ring-irq_put = gen6_ring_put_irq;
   ring-dispatch_execbuffer =
   gen6_ring_dispatch_execbuffer;
 + ring-semaphore.sync_to = gen6_ring_sync;
 + if

[Intel-gfx] [PATCH 07/15] drm/i915: gen specific ring init

2013-12-16 Thread Ben Widawsky 
Gen8 has already had some differentiation with how it handles rings.
Semaphores bring yet more differences, and now is as good a time as any
to do the split.

Also, since gen8 doesn't actually use semaphores up until this point,
put the proper NULL values in for the mbox info.

v2: v1 had a stale commit message

Signed-off-by: Ben Widawsky b...@bwidawsk.net
---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 134 ++--
 1 file changed, 92 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 7a8c5d8..db63a5c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1857,19 +1857,33 @@ int intel_init_render_ring_buffer(struct drm_device 
*dev)
ring-id = RCS;
ring-mmio_base = RENDER_RING_BASE;
 
-   if (INTEL_INFO(dev)-gen = 6) {
+   if (INTEL_INFO(dev)-gen = 8) {
+   ring-add_request = gen6_add_request;
+   ring-flush = gen8_render_ring_flush;
+   ring-irq_get = gen8_ring_get_irq;
+   ring-irq_put = gen8_ring_put_irq;
+   ring-irq_enable_mask = GT_RENDER_USER_INTERRUPT;
+   ring-get_seqno = gen6_ring_get_seqno;
+   ring-set_seqno = ring_set_seqno;
+   ring-semaphore.sync_to = gen6_ring_sync;
+   if (i915_semaphore_is_enabled(dev))
+   ring-semaphore.signal = gen6_signal;
+   ring-semaphore.signal = gen6_signal;
+   ring-semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_INVALID;
+   ring-semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
+   ring-semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
+   ring-semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
+   ring-semaphore.signal_mbox[RCS] = GEN6_NOSYNC;
+   ring-semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
+   ring-semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
+   ring-semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
+   } else if (INTEL_INFO(dev)-gen = 6) {
ring-add_request = gen6_add_request;
ring-flush = gen7_render_ring_flush;
if (INTEL_INFO(dev)-gen == 6)
ring-flush = gen6_render_ring_flush;
-   if (INTEL_INFO(dev)-gen = 8) {
-   ring-flush = gen8_render_ring_flush;
-   ring-irq_get = gen8_ring_get_irq;
-   ring-irq_put = gen8_ring_put_irq;
-   } else {
-   ring-irq_get = gen6_ring_get_irq;
-   ring-irq_put = gen6_ring_put_irq;
-   }
+   ring-irq_get = gen6_ring_get_irq;
+   ring-irq_put = gen6_ring_put_irq;
ring-irq_enable_mask = GT_RENDER_USER_INTERRUPT;
ring-get_seqno = gen6_ring_get_seqno;
ring-set_seqno = ring_set_seqno;
@@ -1911,6 +1925,7 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
ring-irq_enable_mask = I915_USER_INTERRUPT;
}
ring-write_tail = ring_write_tail;
+
if (IS_HASWELL(dev))
ring-dispatch_execbuffer = hsw_ring_dispatch_execbuffer;
else if (IS_GEN8(dev))
@@ -2044,24 +2059,35 @@ int intel_init_bsd_ring_buffer(struct drm_device *dev)
ring-irq_put = gen8_ring_put_irq;
ring-dispatch_execbuffer =
gen8_ring_dispatch_execbuffer;
+   ring-semaphore.sync_to = gen6_ring_sync;
+   if (i915_semaphore_is_enabled(dev))
+   ring-semaphore.signal = gen6_signal;
+   ring-semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_INVALID;
+   ring-semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_INVALID;
+   ring-semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_INVALID;
+   ring-semaphore.mbox[VECS] = MI_SEMAPHORE_SYNC_INVALID;
+   ring-semaphore.signal_mbox[RCS] = GEN6_NOSYNC;
+   ring-semaphore.signal_mbox[VCS] = GEN6_NOSYNC;
+   ring-semaphore.signal_mbox[BCS] = GEN6_NOSYNC;
+   ring-semaphore.signal_mbox[VECS] = GEN6_NOSYNC;
} else {
ring-irq_enable_mask = GT_BSD_USER_INTERRUPT;
ring-irq_get = gen6_ring_get_irq;
ring-irq_put = gen6_ring_put_irq;
ring-dispatch_execbuffer =
gen6_ring_dispatch_execbuffer;
+   ring-semaphore.sync_to = gen6_ring_sync;
+   if (i915_semaphore_is_enabled(dev))
+   ring-semaphore.signal = gen6_signal;
+   ring-semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_VR;
+   ring-semaphore.mbox[VCS] =