[Intel-gfx] [PATCH 08/19] drm/i915: Consolidate L3 remapping LRI

[Chris Wilson]

We can use a single MI_LOAD_REGISTER_IMM command packet to write all the
L3 remapping registers, shrinking the number of bytes required to emit
the context switch.

Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
Reviewed-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_gem_context.c | 16 +++-
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 7b0a82c0d6e0..1c63bea32211 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -603,16 +603,14 @@ mi_set_context(struct drm_i915_gem_request *req, u32 
hw_flags)
 
 int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 {
+   u32 *remap_info = req->i915->l3_parity.remap_info[slice];
struct intel_engine_cs *engine = req->engine;
-   struct drm_device *dev = engine->dev;
-   struct drm_i915_private *dev_priv = dev->dev_private;
-   u32 *remap_info = dev_priv->l3_parity.remap_info[slice];
int i, ret;
 
-   if (!HAS_L3_DPF(dev) || !remap_info)
+   if (!remap_info)
return 0;
 
-   ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
+   ret = intel_ring_begin(req, GEN7_L3LOG_SIZE/4 * 2 + 2);
if (ret)
return ret;
 
@@ -621,15 +619,15 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, 
int slice)
 * here because no other code should access these registers other than
 * at initialization time.
 */
-   for (i = 0; i < GEN7_L3LOG_SIZE / 4; i++) {
-   intel_ring_emit(engine, MI_LOAD_REGISTER_IMM(1));
+   intel_ring_emit(engine, MI_LOAD_REGISTER_IMM(GEN7_L3LOG_SIZE/4));
+   for (i = 0; i < GEN7_L3LOG_SIZE/4; i++) {
intel_ring_emit_reg(engine, GEN7_L3LOG(slice, i));
intel_ring_emit(engine, remap_info[i]);
}
-
+   intel_ring_emit(engine, MI_NOOP);
intel_ring_advance(engine);
 
-   return ret;
+   return 0;
 }
 
 static inline bool skip_rcs_switch(struct intel_engine_cs *engine,
-- 
2.8.1

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[Intel-gfx] [PATCH 08/19] drm/i915: Consolidate L3 remapping LRI

[Chris Wilson]

We can use a single MI_LOAD_REGISTER_IMM command packet to write all the
L3 remapping registers, shrinking the number of bytes required to emit
the context switch.

Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
Reviewed-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_gem_context.c | 16 +++-
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 7b0a82c0d6e0..1c63bea32211 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -603,16 +603,14 @@ mi_set_context(struct drm_i915_gem_request *req, u32 
hw_flags)
 
 int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 {
+   u32 *remap_info = req->i915->l3_parity.remap_info[slice];
struct intel_engine_cs *engine = req->engine;
-   struct drm_device *dev = engine->dev;
-   struct drm_i915_private *dev_priv = dev->dev_private;
-   u32 *remap_info = dev_priv->l3_parity.remap_info[slice];
int i, ret;
 
-   if (!HAS_L3_DPF(dev) || !remap_info)
+   if (!remap_info)
return 0;
 
-   ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
+   ret = intel_ring_begin(req, GEN7_L3LOG_SIZE/4 * 2 + 2);
if (ret)
return ret;
 
@@ -621,15 +619,15 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, 
int slice)
 * here because no other code should access these registers other than
 * at initialization time.
 */
-   for (i = 0; i < GEN7_L3LOG_SIZE / 4; i++) {
-   intel_ring_emit(engine, MI_LOAD_REGISTER_IMM(1));
+   intel_ring_emit(engine, MI_LOAD_REGISTER_IMM(GEN7_L3LOG_SIZE/4));
+   for (i = 0; i < GEN7_L3LOG_SIZE/4; i++) {
intel_ring_emit_reg(engine, GEN7_L3LOG(slice, i));
intel_ring_emit(engine, remap_info[i]);
}
-
+   intel_ring_emit(engine, MI_NOOP);
intel_ring_advance(engine);
 
-   return ret;
+   return 0;
 }
 
 static inline bool skip_rcs_switch(struct intel_engine_cs *engine,
-- 
2.8.1

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[Intel-gfx] [PATCH 08/19] drm/i915: Consolidate L3 remapping LRI

[Chris Wilson]

We can use a single MI_LOAD_REGISTER_IMM command packet to write all the
L3 remapping registers, shrinking the number of bytes required to emit
the context switch.

Signed-off-by: Chris Wilson 
Cc: Tvrtko Ursulin 
Reviewed-by: Tvrtko Ursulin 
---
 drivers/gpu/drm/i915/i915_gem_context.c | 16 +++-
 1 file changed, 7 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index 7b0a82c0d6e0..1c63bea32211 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -603,16 +603,14 @@ mi_set_context(struct drm_i915_gem_request *req, u32 
hw_flags)
 
 int i915_gem_l3_remap(struct drm_i915_gem_request *req, int slice)
 {
+   u32 *remap_info = req->i915->l3_parity.remap_info[slice];
struct intel_engine_cs *engine = req->engine;
-   struct drm_device *dev = engine->dev;
-   struct drm_i915_private *dev_priv = dev->dev_private;
-   u32 *remap_info = dev_priv->l3_parity.remap_info[slice];
int i, ret;
 
-   if (!HAS_L3_DPF(dev) || !remap_info)
+   if (!remap_info)
return 0;
 
-   ret = intel_ring_begin(req, GEN7_L3LOG_SIZE / 4 * 3);
+   ret = intel_ring_begin(req, GEN7_L3LOG_SIZE/4 * 2 + 2);
if (ret)
return ret;
 
@@ -621,15 +619,15 @@ int i915_gem_l3_remap(struct drm_i915_gem_request *req, 
int slice)
 * here because no other code should access these registers other than
 * at initialization time.
 */
-   for (i = 0; i < GEN7_L3LOG_SIZE / 4; i++) {
-   intel_ring_emit(engine, MI_LOAD_REGISTER_IMM(1));
+   intel_ring_emit(engine, MI_LOAD_REGISTER_IMM(GEN7_L3LOG_SIZE/4));
+   for (i = 0; i < GEN7_L3LOG_SIZE/4; i++) {
intel_ring_emit_reg(engine, GEN7_L3LOG(slice, i));
intel_ring_emit(engine, remap_info[i]);
}
-
+   intel_ring_emit(engine, MI_NOOP);
intel_ring_advance(engine);
 
-   return ret;
+   return 0;
 }
 
 static inline bool skip_rcs_switch(struct intel_engine_cs *engine,
-- 
2.8.1

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