Re: [Intel-gfx] [PATCH 1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset

2017-04-05 Thread Kamble, Sagar A 



On 4/5/2017 2:30 PM, Chris Wilson wrote:

On Wed, Apr 05, 2017 at 11:04:34AM +0530, Sagar Arun Kamble wrote:

During S3/S4 suspend, i915 sends HOST2GUC with ENTER_S_STATE action
for suspending GuC. GuC stops scheduling at this point. i915 is
currently doing explicit GPU reset during suspend ensuring GEM is idle.
Suspend GuC prior to triggering GPU Reset to ensure GuC stays idle too.

Why would a gpu reset cause the guc to think it was not idle, and
futhermore ignore the suspend request afterwards? Should we not be
completely disabling the guc along the system suspend path? Especially
if it is so easily confused?
-Chris
Post GPU reset, GuC firmware is unloaded and GuC is not ready till we 
reinitialize the firmware so
all Host to GuC actions are bound to fail. ENTER_S_STATE is disabling 
GuC scheduling completely.
GuC is saving the needed state and ensuring wake events are disabled. So 
we need to trigger this

action prior to resetting GPU in suspend path.




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Re: [Intel-gfx] [PATCH 1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset

2017-04-05 Thread Chris Wilson 
On Wed, Apr 05, 2017 at 11:04:34AM +0530, Sagar Arun Kamble wrote:
> During S3/S4 suspend, i915 sends HOST2GUC with ENTER_S_STATE action
> for suspending GuC. GuC stops scheduling at this point. i915 is
> currently doing explicit GPU reset during suspend ensuring GEM is idle.
> Suspend GuC prior to triggering GPU Reset to ensure GuC stays idle too.

Why would a gpu reset cause the guc to think it was not idle, and
futhermore ignore the suspend request afterwards? Should we not be
completely disabling the guc along the system suspend path? Especially
if it is so easily confused?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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[Intel-gfx] [PATCH 1/1] drm/i915: Suspend GuC during GEM Suspend prior to GPU Reset

2017-04-04 Thread Sagar Arun Kamble 
During S3/S4 suspend, i915 sends HOST2GUC with ENTER_S_STATE action
for suspending GuC. GuC stops scheduling at this point. i915 is
currently doing explicit GPU reset during suspend ensuring GEM is idle.
Suspend GuC prior to triggering GPU Reset to ensure GuC stays idle too.

Cc: Jeff McGee 
Cc: Daniele Ceraolo Spurio 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Signed-off-by: Sagar Arun Kamble 
---
 drivers/gpu/drm/i915/i915_drv.c | 2 --
 drivers/gpu/drm/i915/i915_gem.c | 2 ++
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c616b4e..7b4fa84 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1469,8 +1469,6 @@ static int i915_drm_suspend(struct drm_device *dev)
goto out;
}
 
-   intel_guc_suspend(dev_priv);
-
intel_display_suspend(dev);
 
intel_dp_mst_suspend(dev);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index bbc6f1c..9234334 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4456,6 +4456,8 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
i915_gem_context_lost(dev_priv);
mutex_unlock(>struct_mutex);
 
+   intel_guc_suspend(dev_priv);
+
cancel_delayed_work_sync(_priv->gpu_error.hangcheck_work);
cancel_delayed_work_sync(_priv->gt.retire_work);
 
-- 
1.9.1

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