Re: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Extend Wa_16014892111 to MTL

2023-05-11 Thread Gustavo Sousa
Quoting Radhakrishna Sripada (2023-05-10 19:35:51)
>The dg2 workaround which is used for performance tuning
>is needed for Meteorlake.
>
>Bspec: 68331
>Cc: Matt Roper 
>Cc: Gustavo Sousa 
>Signed-off-by: Radhakrishna Sripada 

The workaround for MTL seems to be necessary only prior to B0 steppings. I
wonder if we would have any significant benefit from having the performance
tuning done with the workaround infrastructure for B0+ steppings. My gut tells
me that having two separate implementations for the performance tuning would not
be worth it - someone more experienced with the driver might have the right
answer here.

Anyways,

Reviewed-by: Gustavo Sousa 

>---
> drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
>b/drivers/gpu/drm/i915/gt/intel_lrc.c
>index 81a96c52a92b..78ec350188b6 100644
>--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
>+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
>@@ -1370,7 +1370,7 @@ gen12_emit_indirect_ctx_rcs(const struct intel_context 
>*ce, u32 *cs)
>   cs, GEN12_GFX_CCS_AUX_NV);
> 
> /* Wa_16014892111 */
>-if (IS_DG2(ce->engine->i915))
>+if (IS_DG2(ce->engine->i915) || IS_METEORLAKE(ce->engine->i915))
> cs = dg2_emit_draw_watermark_setting(cs);
> 
> return cs;
>-- 
>2.34.1


[Intel-gfx] [PATCH 1/2] drm/i915/mtl: Extend Wa_16014892111 to MTL

2023-05-10 Thread Radhakrishna Sripada
The dg2 workaround which is used for performance tuning
is needed for Meteorlake.

Bspec: 68331
Cc: Matt Roper 
Cc: Gustavo Sousa 
Signed-off-by: Radhakrishna Sripada 
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 81a96c52a92b..78ec350188b6 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1370,7 +1370,7 @@ gen12_emit_indirect_ctx_rcs(const struct intel_context 
*ce, u32 *cs)
  cs, GEN12_GFX_CCS_AUX_NV);
 
/* Wa_16014892111 */
-   if (IS_DG2(ce->engine->i915))
+   if (IS_DG2(ce->engine->i915) || IS_METEORLAKE(ce->engine->i915))
cs = dg2_emit_draw_watermark_setting(cs);
 
return cs;
-- 
2.34.1