Re: [Intel-gfx] [PATCH 1/2] drm/i915: s/GRAPHICS_VER/DISPLAY_VER/ where appropriate

2022-01-24 Thread Jani Nikula 
On Mon, 24 Jan 2022, Ville Syrjala  wrote:
> From: Ville Syrjälä 
>
> Use DISPLAY_VER rather than GRAPHICS_VER to determine
> availability of display hardware features.
>
> Signed-off-by: Ville Syrjälä 

On both patches,

Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/i915_drv.h | 18 +-
>  1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 44c1f98144b4..e2b8409f9174 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1463,8 +1463,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv) \
>   (IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv))
>  
> -#define HAS_GMBUS_IRQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 4)
> -#define HAS_GMBUS_BURST_READ(dev_priv) (GRAPHICS_VER(dev_priv) >= 11 || \
> +#define HAS_GMBUS_IRQ(dev_priv) (DISPLAY_VER(dev_priv) >= 4)
> +#define HAS_GMBUS_BURST_READ(dev_priv) (DISPLAY_VER(dev_priv) >= 11 || \
>   IS_GEMINILAKE(dev_priv) || \
>   IS_KABYLAKE(dev_priv))
>  
> @@ -1476,9 +1476,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define SUPPORTS_TV(dev_priv)
> (INTEL_INFO(dev_priv)->display.supports_tv)
>  #define I915_HAS_HOTPLUG(dev_priv)   
> (INTEL_INFO(dev_priv)->display.has_hotplug)
>  
> -#define HAS_FW_BLC(dev_priv) (GRAPHICS_VER(dev_priv) > 2)
> +#define HAS_FW_BLC(dev_priv) (DISPLAY_VER(dev_priv) > 2)
>  #define HAS_FBC(dev_priv)(INTEL_INFO(dev_priv)->display.fbc_mask != 0)
> -#define HAS_CUR_FBC(dev_priv)(!HAS_GMCH(dev_priv) && 
> GRAPHICS_VER(dev_priv) >= 7)
> +#define HAS_CUR_FBC(dev_priv)(!HAS_GMCH(dev_priv) && 
> DISPLAY_VER(dev_priv) >= 7)
>  
>  #define HAS_IPS(dev_priv)(IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
>  
> @@ -1491,7 +1491,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define HAS_PSR(dev_priv) (INTEL_INFO(dev_priv)->display.has_psr)
>  #define HAS_PSR_HW_TRACKING(dev_priv) \
>   (INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
> -#define HAS_PSR2_SEL_FETCH(dev_priv)  (GRAPHICS_VER(dev_priv) >= 12)
> +#define HAS_PSR2_SEL_FETCH(dev_priv)  (DISPLAY_VER(dev_priv) >= 12)
>  #define HAS_TRANSCODER(dev_priv, trans)   
> ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
>  
>  #define HAS_RC6(dev_priv) (INTEL_INFO(dev_priv)->has_rc6)
> @@ -1502,7 +1502,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  
>  #define HAS_DMC(dev_priv)(INTEL_INFO(dev_priv)->display.has_dmc)
>  
> -#define HAS_MSO(i915)(GRAPHICS_VER(i915) >= 12)
> +#define HAS_MSO(i915)(DISPLAY_VER(i915) >= 12)
>  
>  #define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm)
>  #define HAS_64BIT_RELOC(dev_priv) (INTEL_INFO(dev_priv)->has_64bit_reloc)
> @@ -1535,7 +1535,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  
>  #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
>  
> -#define HAS_LSPCON(dev_priv) (IS_GRAPHICS_VER(dev_priv, 9, 10))
> +#define HAS_LSPCON(dev_priv) (IS_DISPLAY_VER(dev_priv, 9, 10))
>  
>  /* DPF == dynamic parity feature */
>  #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
> @@ -1549,7 +1549,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  
>  #define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->display.pipe_mask != 0)
>  
> -#define HAS_VRR(i915)(GRAPHICS_VER(i915) >= 11)
> +#define HAS_VRR(i915)(DISPLAY_VER(i915) >= 11)
>  
>  #define HAS_ASYNC_FLIPS(i915)(DISPLAY_VER(i915) >= 5)
>  
> @@ -1579,7 +1579,7 @@ i915_print_iommu_status(struct drm_i915_private *i915, 
> struct drm_printer *p);
>  
>  static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private 
> *dev_priv)
>  {
> - return GRAPHICS_VER(dev_priv) >= 6 && intel_vtd_active(dev_priv);
> + return DISPLAY_VER(dev_priv) >= 6 && intel_vtd_active(dev_priv);
>  }
>  
>  static inline bool

-- 
Jani Nikula, Intel Open Source Graphics Center

[Intel-gfx] [PATCH 1/2] drm/i915: s/GRAPHICS_VER/DISPLAY_VER/ where appropriate

2022-01-24 Thread Ville Syrjala 
From: Ville Syrjälä 

Use DISPLAY_VER rather than GRAPHICS_VER to determine
availability of display hardware features.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/i915_drv.h | 18 +-
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 44c1f98144b4..e2b8409f9174 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1463,8 +1463,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define NEEDS_WaRsDisableCoarsePowerGating(dev_priv)   \
(IS_SKL_GT3(dev_priv) || IS_SKL_GT4(dev_priv))
 
-#define HAS_GMBUS_IRQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 4)
-#define HAS_GMBUS_BURST_READ(dev_priv) (GRAPHICS_VER(dev_priv) >= 11 || \
+#define HAS_GMBUS_IRQ(dev_priv) (DISPLAY_VER(dev_priv) >= 4)
+#define HAS_GMBUS_BURST_READ(dev_priv) (DISPLAY_VER(dev_priv) >= 11 || \
IS_GEMINILAKE(dev_priv) || \
IS_KABYLAKE(dev_priv))
 
@@ -1476,9 +1476,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define SUPPORTS_TV(dev_priv)  
(INTEL_INFO(dev_priv)->display.supports_tv)
 #define I915_HAS_HOTPLUG(dev_priv) 
(INTEL_INFO(dev_priv)->display.has_hotplug)
 
-#define HAS_FW_BLC(dev_priv)   (GRAPHICS_VER(dev_priv) > 2)
+#define HAS_FW_BLC(dev_priv)   (DISPLAY_VER(dev_priv) > 2)
 #define HAS_FBC(dev_priv)  (INTEL_INFO(dev_priv)->display.fbc_mask != 0)
-#define HAS_CUR_FBC(dev_priv)  (!HAS_GMCH(dev_priv) && GRAPHICS_VER(dev_priv) 
>= 7)
+#define HAS_CUR_FBC(dev_priv)  (!HAS_GMCH(dev_priv) && DISPLAY_VER(dev_priv) 
>= 7)
 
 #define HAS_IPS(dev_priv)  (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
 
@@ -1491,7 +1491,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_PSR(dev_priv)   (INTEL_INFO(dev_priv)->display.has_psr)
 #define HAS_PSR_HW_TRACKING(dev_priv) \
(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
-#define HAS_PSR2_SEL_FETCH(dev_priv)(GRAPHICS_VER(dev_priv) >= 12)
+#define HAS_PSR2_SEL_FETCH(dev_priv)(DISPLAY_VER(dev_priv) >= 12)
 #define HAS_TRANSCODER(dev_priv, trans) 
((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
 
 #define HAS_RC6(dev_priv)   (INTEL_INFO(dev_priv)->has_rc6)
@@ -1502,7 +1502,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_DMC(dev_priv)  (INTEL_INFO(dev_priv)->display.has_dmc)
 
-#define HAS_MSO(i915)  (GRAPHICS_VER(i915) >= 12)
+#define HAS_MSO(i915)  (DISPLAY_VER(i915) >= 12)
 
 #define HAS_RUNTIME_PM(dev_priv) (INTEL_INFO(dev_priv)->has_runtime_pm)
 #define HAS_64BIT_RELOC(dev_priv) (INTEL_INFO(dev_priv)->has_64bit_reloc)
@@ -1535,7 +1535,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_GMCH(dev_priv) (INTEL_INFO(dev_priv)->display.has_gmch)
 
-#define HAS_LSPCON(dev_priv) (IS_GRAPHICS_VER(dev_priv, 9, 10))
+#define HAS_LSPCON(dev_priv) (IS_DISPLAY_VER(dev_priv, 9, 10))
 
 /* DPF == dynamic parity feature */
 #define HAS_L3_DPF(dev_priv) (INTEL_INFO(dev_priv)->has_l3_dpf)
@@ -1549,7 +1549,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_DISPLAY(dev_priv) (INTEL_INFO(dev_priv)->display.pipe_mask != 0)
 
-#define HAS_VRR(i915)  (GRAPHICS_VER(i915) >= 11)
+#define HAS_VRR(i915)  (DISPLAY_VER(i915) >= 11)
 
 #define HAS_ASYNC_FLIPS(i915)  (DISPLAY_VER(i915) >= 5)
 
@@ -1579,7 +1579,7 @@ i915_print_iommu_status(struct drm_i915_private *i915, 
struct drm_printer *p);
 
 static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private 
*dev_priv)
 {
-   return GRAPHICS_VER(dev_priv) >= 6 && intel_vtd_active(dev_priv);
+   return DISPLAY_VER(dev_priv) >= 6 && intel_vtd_active(dev_priv);
 }
 
 static inline bool
-- 
2.34.1