Re: [Intel-gfx] [PATCH 1/3] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB

[Ville Syrjälä]

On Mon, May 23, 2016 at 03:30:04PM +0100, Chris Wilson wrote:
> On Mon, May 23, 2016 at 05:09:41PM +0300, ville.syrj...@linux.intel.com wrote:
> > From: Ville Syrjälä 
> > 
> > SNB (and IVB too I suppose) starts to misbehave if the GPU gets stuck
> > in an infinite batch buffer loop. The GPU apparently hogs something
> > critical and CPUs start to lose interrupts and whatnot. We can keep
> > the system limping along by unmasking some interrupts in
> > GEN6_PMINTRMSK. The EI up interrupt has been previously chosen for
> > that task, so let's never mask it.
> > 
> > Signed-off-by: Ville Syrjälä 
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c 
> > b/drivers/gpu/drm/i915/intel_pm.c
> > index 29bdd79d9039..576e98744a2d 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4719,7 +4719,7 @@ void gen6_rps_idle(struct drm_i915_private *dev_priv)
> > else
> > gen6_set_rps(dev_priv, dev_priv->rps.idle_freq);
> > dev_priv->rps.last_adj = 0;
> > -   I915_WRITE(GEN6_PMINTRMSK, 0x);
> > +   I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, ~0));
> 
> gen6_sanitize_rps_pm_mask()

Doh. That's what I had on the other machine. Shouldn't copy patches
by retyping them by hand.

> 
> With that,
> Reviewed-by: Chris Wilson 
> -Chris
> 
> -- 
> Chris Wilson, Intel Open Source Technology Centre

-- 
Ville Syrjälä
Intel OTC
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Re: [Intel-gfx] [PATCH 1/3] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB

[Chris Wilson]

On Mon, May 23, 2016 at 05:09:41PM +0300, ville.syrj...@linux.intel.com wrote:
> From: Ville Syrjälä 
> 
> SNB (and IVB too I suppose) starts to misbehave if the GPU gets stuck
> in an infinite batch buffer loop. The GPU apparently hogs something
> critical and CPUs start to lose interrupts and whatnot. We can keep
> the system limping along by unmasking some interrupts in
> GEN6_PMINTRMSK. The EI up interrupt has been previously chosen for
> that task, so let's never mask it.
> 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 29bdd79d9039..576e98744a2d 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4719,7 +4719,7 @@ void gen6_rps_idle(struct drm_i915_private *dev_priv)
>   else
>   gen6_set_rps(dev_priv, dev_priv->rps.idle_freq);
>   dev_priv->rps.last_adj = 0;
> - I915_WRITE(GEN6_PMINTRMSK, 0x);
> + I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, ~0));

gen6_sanitize_rps_pm_mask()

With that,
Reviewed-by: Chris Wilson 
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
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[Intel-gfx] [PATCH 1/3] drm/i915: Never fully mask the the EI up rps interrupt on SNB/IVB

[ville . syrjala]

From: Ville Syrjälä 

SNB (and IVB too I suppose) starts to misbehave if the GPU gets stuck
in an infinite batch buffer loop. The GPU apparently hogs something
critical and CPUs start to lose interrupts and whatnot. We can keep
the system limping along by unmasking some interrupts in
GEN6_PMINTRMSK. The EI up interrupt has been previously chosen for
that task, so let's never mask it.

Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_pm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 29bdd79d9039..576e98744a2d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4719,7 +4719,7 @@ void gen6_rps_idle(struct drm_i915_private *dev_priv)
else
gen6_set_rps(dev_priv, dev_priv->rps.idle_freq);
dev_priv->rps.last_adj = 0;
-   I915_WRITE(GEN6_PMINTRMSK, 0x);
+   I915_WRITE(GEN6_PMINTRMSK, gen6_rps_pm_mask(dev_priv, ~0));
}
mutex_unlock(_priv->rps.hw_lock);
 
-- 
2.7.4

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