Re: [Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions
On Mon, Jan 24, 2022 at 11:06:50AM +0200, Stanislav Lisovskiy wrote:
> Sometimes we might need to change the way we calculate
> watermarks, based on which particular plane it is calculated
> for. Thus it would be convenient to pass plane struct to those
> functions.
>
> v2: Pass plane instead of plane_id
> v3: Do not pass plane to skl_cursor_allocation(Ville Syrjälä)
> v4: - Make intel_crtc_get_plane static again(Ville Syrjälä)
> - s/cursor_plane/plane(Ville Syrjälä)
> - Pass plane to skl_compute_wm_* instead of plane_id(Ville Syrjälä)
>
> Signed-off-by: Stanislav Lisovskiy
Reviewed-by: Ville Syrjälä
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 37 +++
> 2 files changed, 22 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index 7907f601598e..ead789709477 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -16,6 +16,7 @@ struct intel_crtc;
> struct intel_crtc_state;
> struct intel_plane;
> struct intel_plane_state;
> +enum plane_id;
>
> unsigned int intel_adjusted_rate(const struct drm_rect *src,
>const struct drm_rect *dst,
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 2ec8e48806b6..06707d2b5fc5 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4240,7 +4240,9 @@ static int skl_compute_wm_params(const struct
> intel_crtc_state *crtc_state,
>u64 modifier, unsigned int rotation,
>u32 plane_pixel_rate, struct skl_wm_params *wp,
>int color_plane);
> +
> static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
> + struct intel_plane *plane,
>int level,
>unsigned int latency,
>const struct skl_wm_params *wp,
> @@ -4251,6 +4253,7 @@ static unsigned int
> skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
> int num_active)
> {
> + struct intel_plane *plane =
> to_intel_plane(crtc_state->uapi.crtc->cursor);
> struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> int level, max_level = ilk_wm_max_level(dev_priv);
> struct skl_wm_level wm = {};
> @@ -4267,7 +4270,7 @@ skl_cursor_allocation(const struct intel_crtc_state
> *crtc_state,
> for (level = 0; level <= max_level; level++) {
> unsigned int latency = dev_priv->wm.skl_latency[level];
>
> - skl_compute_plane_wm(crtc_state, level, latency, , , );
> + skl_compute_plane_wm(crtc_state, plane, level, latency, ,
> , );
> if (wm.min_ddb_alloc == U16_MAX)
> break;
>
> @@ -5495,6 +5498,7 @@ static int skl_wm_max_lines(struct drm_i915_private
> *dev_priv)
> }
>
> static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
> + struct intel_plane *plane,
>int level,
>unsigned int latency,
>const struct skl_wm_params *wp,
> @@ -5622,6 +5626,7 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *crtc_state,
>
> static void
> skl_compute_wm_levels(const struct intel_crtc_state *crtc_state,
> + struct intel_plane *plane,
> const struct skl_wm_params *wm_params,
> struct skl_wm_level *levels)
> {
> @@ -5633,7 +5638,7 @@ skl_compute_wm_levels(const struct intel_crtc_state
> *crtc_state,
> struct skl_wm_level *result = [level];
> unsigned int latency = dev_priv->wm.skl_latency[level];
>
> - skl_compute_plane_wm(crtc_state, level, latency,
> + skl_compute_plane_wm(crtc_state, plane, level, latency,
>wm_params, result_prev, result);
>
> result_prev = result;
> @@ -5641,6 +5646,7 @@ skl_compute_wm_levels(const struct intel_crtc_state
> *crtc_state,
> }
>
> static void tgl_compute_sagv_wm(const struct intel_crtc_state *crtc_state,
> + struct intel_plane *plane,
> const struct skl_wm_params *wm_params,
> struct skl_plane_wm *plane_wm)
> {
> @@ -5649,7 +5655,7 @@ static void tgl_compute_sagv_wm(const struct
> intel_crtc_state *crtc_state,
> struct skl_wm_level *levels = plane_wm->wm;
> unsigned int latency = dev_priv->wm.skl_latency[0] +
> dev_priv->sagv_block_time_us;
>
> - skl_compute_plane_wm(crtc_state, 0, latency,
> +
[Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions
Sometimes we might need to change the way we calculate
watermarks, based on which particular plane it is calculated
for. Thus it would be convenient to pass plane struct to those
functions.
v2: Pass plane instead of plane_id
v3: Do not pass plane to skl_cursor_allocation(Ville Syrjälä)
v4: - Make intel_crtc_get_plane static again(Ville Syrjälä)
- s/cursor_plane/plane(Ville Syrjälä)
- Pass plane to skl_compute_wm_* instead of plane_id(Ville Syrjälä)
Signed-off-by: Stanislav Lisovskiy
---
.../gpu/drm/i915/display/intel_atomic_plane.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 37 +++
2 files changed, 22 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 7907f601598e..ead789709477 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -16,6 +16,7 @@ struct intel_crtc;
struct intel_crtc_state;
struct intel_plane;
struct intel_plane_state;
+enum plane_id;
unsigned int intel_adjusted_rate(const struct drm_rect *src,
const struct drm_rect *dst,
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2ec8e48806b6..06707d2b5fc5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4240,7 +4240,9 @@ static int skl_compute_wm_params(const struct
intel_crtc_state *crtc_state,
u64 modifier, unsigned int rotation,
u32 plane_pixel_rate, struct skl_wm_params *wp,
int color_plane);
+
static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
+struct intel_plane *plane,
int level,
unsigned int latency,
const struct skl_wm_params *wp,
@@ -4251,6 +4253,7 @@ static unsigned int
skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
int num_active)
{
+ struct intel_plane *plane =
to_intel_plane(crtc_state->uapi.crtc->cursor);
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
int level, max_level = ilk_wm_max_level(dev_priv);
struct skl_wm_level wm = {};
@@ -4267,7 +4270,7 @@ skl_cursor_allocation(const struct intel_crtc_state
*crtc_state,
for (level = 0; level <= max_level; level++) {
unsigned int latency = dev_priv->wm.skl_latency[level];
- skl_compute_plane_wm(crtc_state, level, latency, , , );
+ skl_compute_plane_wm(crtc_state, plane, level, latency, ,
, );
if (wm.min_ddb_alloc == U16_MAX)
break;
@@ -5495,6 +5498,7 @@ static int skl_wm_max_lines(struct drm_i915_private
*dev_priv)
}
static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
+struct intel_plane *plane,
int level,
unsigned int latency,
const struct skl_wm_params *wp,
@@ -5622,6 +5626,7 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *crtc_state,
static void
skl_compute_wm_levels(const struct intel_crtc_state *crtc_state,
+ struct intel_plane *plane,
const struct skl_wm_params *wm_params,
struct skl_wm_level *levels)
{
@@ -5633,7 +5638,7 @@ skl_compute_wm_levels(const struct intel_crtc_state
*crtc_state,
struct skl_wm_level *result = [level];
unsigned int latency = dev_priv->wm.skl_latency[level];
- skl_compute_plane_wm(crtc_state, level, latency,
+ skl_compute_plane_wm(crtc_state, plane, level, latency,
wm_params, result_prev, result);
result_prev = result;
@@ -5641,6 +5646,7 @@ skl_compute_wm_levels(const struct intel_crtc_state
*crtc_state,
}
static void tgl_compute_sagv_wm(const struct intel_crtc_state *crtc_state,
+ struct intel_plane *plane,
const struct skl_wm_params *wm_params,
struct skl_plane_wm *plane_wm)
{
@@ -5649,7 +5655,7 @@ static void tgl_compute_sagv_wm(const struct
intel_crtc_state *crtc_state,
struct skl_wm_level *levels = plane_wm->wm;
unsigned int latency = dev_priv->wm.skl_latency[0] +
dev_priv->sagv_block_time_us;
- skl_compute_plane_wm(crtc_state, 0, latency,
+ skl_compute_plane_wm(crtc_state, plane, 0, latency,
wm_params, [0],
sagv_wm);
}
@@ -5719,11 +5725,11 @@ static void skl_compute_transition_wm(struct
drm_i915_private *dev_priv,
static int
Re: [Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions
On Fri, Jan 21, 2022 at 10:06:12AM +0200, Stanislav Lisovskiy wrote:
> Sometimes we might need to change the way we calculate
> watermarks, based on which particular plane it is calculated
> for. Thus it would be convenient to pass plane struct to those
> functions.
>
> v2: Pass plane instead of plane_id
> v3: Do not pass plane to skl_cursor_allocation(Ville Syrjälä)
>
> Signed-off-by: Stanislav Lisovskiy
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 2 +-
> .../gpu/drm/i915/display/intel_atomic_plane.h | 3 +++
> drivers/gpu/drm/i915/intel_pm.c | 20 +--
> 3 files changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index c2c512cd8ec0..d1344e9c06de 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -373,7 +373,7 @@ int intel_plane_atomic_check_with_state(const struct
> intel_crtc_state *old_crtc_
> old_plane_state,
> new_plane_state);
> }
>
> -static struct intel_plane *
> +struct intel_plane *
> intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
> {
> struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index 7907f601598e..c1499bb7370e 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -16,10 +16,13 @@ struct intel_crtc;
> struct intel_crtc_state;
> struct intel_plane;
> struct intel_plane_state;
> +enum plane_id;
>
> unsigned int intel_adjusted_rate(const struct drm_rect *src,
>const struct drm_rect *dst,
>unsigned int rate);
> +struct intel_plane *intel_crtc_get_plane(struct intel_crtc *crtc,
> + enum plane_id plane_id);
You're no longer using that, so can stay static.
> unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> *crtc_state,
> const struct intel_plane_state
> *plane_state);
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 3981aa856cc2..35d0bd8c6e57 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4252,7 +4252,9 @@ static int skl_compute_wm_params(const struct
> intel_crtc_state *crtc_state,
>u64 modifier, unsigned int rotation,
>u32 plane_pixel_rate, struct skl_wm_params *wp,
>int color_plane);
> +
> static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
> + const struct intel_plane *plane,
>int level,
>unsigned int latency,
>const struct skl_wm_params *wp,
> @@ -4268,6 +4270,7 @@ skl_cursor_allocation(const struct intel_crtc_state
> *crtc_state,
> struct skl_wm_level wm = {};
> int ret, min_ddb_alloc = 0;
> struct skl_wm_params wp;
> + const struct intel_plane *cursor_plane =
> to_intel_plane(crtc_state->uapi.crtc->cursor);
I think just 'plane' would suffice since we know from the context what
it is. Also sticking to the reverse christmas tree order would look a
bit neater imo.
>
> ret = skl_compute_wm_params(crtc_state, 256,
> drm_format_info(DRM_FORMAT_ARGB),
> @@ -4279,7 +4282,7 @@ skl_cursor_allocation(const struct intel_crtc_state
> *crtc_state,
> for (level = 0; level <= max_level; level++) {
> unsigned int latency = dev_priv->wm.skl_latency[level];
>
> - skl_compute_plane_wm(crtc_state, level, latency, , , );
> + skl_compute_plane_wm(crtc_state, cursor_plane, level, latency,
> , , );
> if (wm.min_ddb_alloc == U16_MAX)
> break;
>
> @@ -5508,6 +5511,7 @@ static int skl_wm_max_lines(struct drm_i915_private
> *dev_priv)
> }
>
> static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
> + const struct intel_plane *plane,
>int level,
>unsigned int latency,
>const struct skl_wm_params *wp,
> @@ -5635,6 +5639,7 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *crtc_state,
>
> static void
> skl_compute_wm_levels(const struct intel_crtc_state *crtc_state,
> + const struct intel_plane *plane,
> const struct skl_wm_params *wm_params,
> struct skl_wm_level *levels)
> {
> @@ -5646,7 +5651,7 @@ skl_compute_wm_levels(const
[Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions
Sometimes we might need to change the way we calculate
watermarks, based on which particular plane it is calculated
for. Thus it would be convenient to pass plane struct to those
functions.
v2: Pass plane instead of plane_id
v3: Do not pass plane to skl_cursor_allocation(Ville Syrjälä)
Signed-off-by: Stanislav Lisovskiy
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 2 +-
.../gpu/drm/i915/display/intel_atomic_plane.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 20 +--
3 files changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index c2c512cd8ec0..d1344e9c06de 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -373,7 +373,7 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
old_plane_state,
new_plane_state);
}
-static struct intel_plane *
+struct intel_plane *
intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
{
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 7907f601598e..c1499bb7370e 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -16,10 +16,13 @@ struct intel_crtc;
struct intel_crtc_state;
struct intel_plane;
struct intel_plane_state;
+enum plane_id;
unsigned int intel_adjusted_rate(const struct drm_rect *src,
const struct drm_rect *dst,
unsigned int rate);
+struct intel_plane *intel_crtc_get_plane(struct intel_crtc *crtc,
+enum plane_id plane_id);
unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state
*plane_state);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3981aa856cc2..35d0bd8c6e57 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4252,7 +4252,9 @@ static int skl_compute_wm_params(const struct
intel_crtc_state *crtc_state,
u64 modifier, unsigned int rotation,
u32 plane_pixel_rate, struct skl_wm_params *wp,
int color_plane);
+
static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
+const struct intel_plane *plane,
int level,
unsigned int latency,
const struct skl_wm_params *wp,
@@ -4268,6 +4270,7 @@ skl_cursor_allocation(const struct intel_crtc_state
*crtc_state,
struct skl_wm_level wm = {};
int ret, min_ddb_alloc = 0;
struct skl_wm_params wp;
+ const struct intel_plane *cursor_plane =
to_intel_plane(crtc_state->uapi.crtc->cursor);
ret = skl_compute_wm_params(crtc_state, 256,
drm_format_info(DRM_FORMAT_ARGB),
@@ -4279,7 +4282,7 @@ skl_cursor_allocation(const struct intel_crtc_state
*crtc_state,
for (level = 0; level <= max_level; level++) {
unsigned int latency = dev_priv->wm.skl_latency[level];
- skl_compute_plane_wm(crtc_state, level, latency, , , );
+ skl_compute_plane_wm(crtc_state, cursor_plane, level, latency,
, , );
if (wm.min_ddb_alloc == U16_MAX)
break;
@@ -5508,6 +5511,7 @@ static int skl_wm_max_lines(struct drm_i915_private
*dev_priv)
}
static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
+const struct intel_plane *plane,
int level,
unsigned int latency,
const struct skl_wm_params *wp,
@@ -5635,6 +5639,7 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *crtc_state,
static void
skl_compute_wm_levels(const struct intel_crtc_state *crtc_state,
+ const struct intel_plane *plane,
const struct skl_wm_params *wm_params,
struct skl_wm_level *levels)
{
@@ -5646,7 +5651,7 @@ skl_compute_wm_levels(const struct intel_crtc_state
*crtc_state,
struct skl_wm_level *result = [level];
unsigned int latency = dev_priv->wm.skl_latency[level];
- skl_compute_plane_wm(crtc_state, level, latency,
+ skl_compute_plane_wm(crtc_state, plane, level, latency,
wm_params, result_prev, result);
result_prev = result;
@@ -5654,6 +5659,7
Re: [Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions
On Tue, Jan 18, 2022 at 12:48:36PM +0200, Stanislav Lisovskiy wrote:
> Sometimes we might need to change the way we calculate
> watermarks, based on which particular plane it is calculated
> for. Thus it would be convenient to pass plane struct to those
> functions.
>
> v2: Pass plane instead of plane_id
>
> Signed-off-by: Stanislav Lisovskiy
> ---
> .../gpu/drm/i915/display/intel_atomic_plane.c | 2 +-
> .../gpu/drm/i915/display/intel_atomic_plane.h | 3 +++
> drivers/gpu/drm/i915/intel_pm.c | 23 +--
> 3 files changed, 20 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index c2c512cd8ec0..d1344e9c06de 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -373,7 +373,7 @@ int intel_plane_atomic_check_with_state(const struct
> intel_crtc_state *old_crtc_
> old_plane_state,
> new_plane_state);
> }
>
> -static struct intel_plane *
> +struct intel_plane *
> intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
> {
> struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index 7907f601598e..c1499bb7370e 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -16,10 +16,13 @@ struct intel_crtc;
> struct intel_crtc_state;
> struct intel_plane;
> struct intel_plane_state;
> +enum plane_id;
>
> unsigned int intel_adjusted_rate(const struct drm_rect *src,
>const struct drm_rect *dst,
>unsigned int rate);
> +struct intel_plane *intel_crtc_get_plane(struct intel_crtc *crtc,
> + enum plane_id plane_id);
> unsigned int intel_plane_pixel_rate(const struct intel_crtc_state
> *crtc_state,
> const struct intel_plane_state
> *plane_state);
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 62fde21fac39..dc1203d21c46 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4252,7 +4252,9 @@ static int skl_compute_wm_params(const struct
> intel_crtc_state *crtc_state,
>u64 modifier, unsigned int rotation,
>u32 plane_pixel_rate, struct skl_wm_params *wp,
>int color_plane);
> +
> static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
> + const struct intel_plane *plane,
>int level,
>unsigned int latency,
>const struct skl_wm_params *wp,
> @@ -4261,6 +4263,7 @@ static void skl_compute_plane_wm(const struct
> intel_crtc_state *crtc_state,
>
> static unsigned int
> skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
> + const struct intel_plane *plane,
I don't see a reason for having the caller pass this in. We can just
keep it local to this function.
Also we don't usually const these things.
> int num_active)
> {
> struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> @@ -4279,7 +4282,7 @@ skl_cursor_allocation(const struct intel_crtc_state
> *crtc_state,
> for (level = 0; level <= max_level; level++) {
> unsigned int latency = dev_priv->wm.skl_latency[level];
>
> - skl_compute_plane_wm(crtc_state, level, latency, , , );
> + skl_compute_plane_wm(crtc_state, plane, level, latency, ,
> , );
> if (wm.min_ddb_alloc == U16_MAX)
> break;
>
> @@ -5124,6 +5127,7 @@ skl_allocate_plane_ddb(struct intel_atomic_state *state,
> intel_atomic_get_new_crtc_state(state, crtc);
> const struct intel_dbuf_state *dbuf_state =
> intel_atomic_get_new_dbuf_state(state);
> + const struct intel_plane *cursor_plane = intel_crtc_get_plane(crtc,
> PLANE_CURSOR);
Could be just to_intel_plane(crtc->base.cursor)
Apart from that looks OK.
> const struct skl_ddb_entry *alloc = _state->ddb[crtc->pipe];
> int num_active = hweight8(dbuf_state->active_pipes);
> u16 alloc_size, start = 0;
> @@ -5153,7 +5157,7 @@ skl_allocate_plane_ddb(struct intel_atomic_state *state,
> return 0;
>
> /* Allocate fixed number of blocks for cursor. */
> - total[PLANE_CURSOR] = skl_cursor_allocation(crtc_state, num_active);
> + total[PLANE_CURSOR] = skl_cursor_allocation(crtc_state, cursor_plane,
> num_active);
> alloc_size -= total[PLANE_CURSOR];
>
[Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions
Sometimes we might need to change the way we calculate
watermarks, based on which particular plane it is calculated
for. Thus it would be convenient to pass plane struct to those
functions.
v2: Pass plane instead of plane_id
Signed-off-by: Stanislav Lisovskiy
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 2 +-
.../gpu/drm/i915/display/intel_atomic_plane.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 23 +--
3 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index c2c512cd8ec0..d1344e9c06de 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -373,7 +373,7 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
old_plane_state,
new_plane_state);
}
-static struct intel_plane *
+struct intel_plane *
intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
{
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 7907f601598e..c1499bb7370e 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -16,10 +16,13 @@ struct intel_crtc;
struct intel_crtc_state;
struct intel_plane;
struct intel_plane_state;
+enum plane_id;
unsigned int intel_adjusted_rate(const struct drm_rect *src,
const struct drm_rect *dst,
unsigned int rate);
+struct intel_plane *intel_crtc_get_plane(struct intel_crtc *crtc,
+enum plane_id plane_id);
unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state
*plane_state);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 62fde21fac39..dc1203d21c46 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4252,7 +4252,9 @@ static int skl_compute_wm_params(const struct
intel_crtc_state *crtc_state,
u64 modifier, unsigned int rotation,
u32 plane_pixel_rate, struct skl_wm_params *wp,
int color_plane);
+
static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
+const struct intel_plane *plane,
int level,
unsigned int latency,
const struct skl_wm_params *wp,
@@ -4261,6 +4263,7 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *crtc_state,
static unsigned int
skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
+ const struct intel_plane *plane,
int num_active)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
@@ -4279,7 +4282,7 @@ skl_cursor_allocation(const struct intel_crtc_state
*crtc_state,
for (level = 0; level <= max_level; level++) {
unsigned int latency = dev_priv->wm.skl_latency[level];
- skl_compute_plane_wm(crtc_state, level, latency, , , );
+ skl_compute_plane_wm(crtc_state, plane, level, latency, ,
, );
if (wm.min_ddb_alloc == U16_MAX)
break;
@@ -5124,6 +5127,7 @@ skl_allocate_plane_ddb(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_dbuf_state *dbuf_state =
intel_atomic_get_new_dbuf_state(state);
+ const struct intel_plane *cursor_plane = intel_crtc_get_plane(crtc,
PLANE_CURSOR);
const struct skl_ddb_entry *alloc = _state->ddb[crtc->pipe];
int num_active = hweight8(dbuf_state->active_pipes);
u16 alloc_size, start = 0;
@@ -5153,7 +5157,7 @@ skl_allocate_plane_ddb(struct intel_atomic_state *state,
return 0;
/* Allocate fixed number of blocks for cursor. */
- total[PLANE_CURSOR] = skl_cursor_allocation(crtc_state, num_active);
+ total[PLANE_CURSOR] = skl_cursor_allocation(crtc_state, cursor_plane,
num_active);
alloc_size -= total[PLANE_CURSOR];
crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR].start =
alloc->end - total[PLANE_CURSOR];
@@ -5507,6 +5511,7 @@ static int skl_wm_max_lines(struct drm_i915_private
*dev_priv)
}
static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
+const struct intel_plane *plane,
int level,
unsigned int latency,
[Intel-gfx] [PATCH 1/4] drm/i915: Pass plane to watermark calculation functions
Sometimes we might need to change the way we calculate
watermarks, based on which particular plane it is calculated
for. Thus it would be convenient to pass plane struct to those
functions.
v2: Pass plane instead of plane_id
Signed-off-by: Stanislav Lisovskiy
---
.../gpu/drm/i915/display/intel_atomic_plane.c | 2 +-
.../gpu/drm/i915/display/intel_atomic_plane.h | 3 +++
drivers/gpu/drm/i915/intel_pm.c | 23 +--
3 files changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 27b8f99dd099..023747fb5052 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -372,7 +372,7 @@ int intel_plane_atomic_check_with_state(const struct
intel_crtc_state *old_crtc_
old_plane_state,
new_plane_state);
}
-static struct intel_plane *
+struct intel_plane *
intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
{
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 7907f601598e..c1499bb7370e 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -16,10 +16,13 @@ struct intel_crtc;
struct intel_crtc_state;
struct intel_plane;
struct intel_plane_state;
+enum plane_id;
unsigned int intel_adjusted_rate(const struct drm_rect *src,
const struct drm_rect *dst,
unsigned int rate);
+struct intel_plane *intel_crtc_get_plane(struct intel_crtc *crtc,
+enum plane_id plane_id);
unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
const struct intel_plane_state
*plane_state);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index fe3787425780..79dac38d9eb2 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4238,7 +4238,9 @@ static int skl_compute_wm_params(const struct
intel_crtc_state *crtc_state,
u64 modifier, unsigned int rotation,
u32 plane_pixel_rate, struct skl_wm_params *wp,
int color_plane);
+
static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
+const struct intel_plane *plane,
int level,
unsigned int latency,
const struct skl_wm_params *wp,
@@ -4247,6 +4249,7 @@ static void skl_compute_plane_wm(const struct
intel_crtc_state *crtc_state,
static unsigned int
skl_cursor_allocation(const struct intel_crtc_state *crtc_state,
+ const struct intel_plane *plane,
int num_active)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
@@ -4265,7 +4268,7 @@ skl_cursor_allocation(const struct intel_crtc_state
*crtc_state,
for (level = 0; level <= max_level; level++) {
unsigned int latency = dev_priv->wm.skl_latency[level];
- skl_compute_plane_wm(crtc_state, level, latency, , , );
+ skl_compute_plane_wm(crtc_state, plane, level, latency, ,
, );
if (wm.min_ddb_alloc == U16_MAX)
break;
@@ -5111,6 +5114,7 @@ skl_allocate_plane_ddb(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
const struct intel_dbuf_state *dbuf_state =
intel_atomic_get_new_dbuf_state(state);
+ const struct intel_plane *cursor_plane = intel_crtc_get_plane(crtc,
PLANE_CURSOR);
const struct skl_ddb_entry *alloc = _state->ddb[crtc->pipe];
int num_active = hweight8(dbuf_state->active_pipes);
u16 alloc_size, start = 0;
@@ -5140,7 +5144,7 @@ skl_allocate_plane_ddb(struct intel_atomic_state *state,
return 0;
/* Allocate fixed number of blocks for cursor. */
- total[PLANE_CURSOR] = skl_cursor_allocation(crtc_state, num_active);
+ total[PLANE_CURSOR] = skl_cursor_allocation(crtc_state, cursor_plane,
num_active);
alloc_size -= total[PLANE_CURSOR];
crtc_state->wm.skl.plane_ddb_y[PLANE_CURSOR].start =
alloc->end - total[PLANE_CURSOR];
@@ -5494,6 +5498,7 @@ static int skl_wm_max_lines(struct drm_i915_private
*dev_priv)
}
static void skl_compute_plane_wm(const struct intel_crtc_state *crtc_state,
+const struct intel_plane *plane,
int level,
unsigned int latency,
