Re: [Intel-gfx] [PATCH 1/5 v5] drm/i915: Stop using AGP layer for GEN6+

2012-11-09 Thread Chris Wilson
On Sun,  4 Nov 2012 09:21:27 -0800, Ben Widawsky b...@bwidawsk.net wrote:
  void i915_gem_gtt_bind_object(struct drm_i915_gem_object *obj,
 enum i915_cache_level cache_level)
  {
   struct drm_device *dev = obj-base.dev;
 - unsigned int agp_type = cache_level_to_agp_type(dev, cache_level);
 + if (INTEL_INFO(dev)-gen  6) {
 + unsigned int flags = (cache_level == I915_CACHE_LLC) ?
 + AGP_USER_CACHED_MEMORY : AGP_USER_MEMORY;

And we still failed to get this right. :(
  cache_level == I915_CACHE_NONE ? AGP_USER_MEMORY : AGP_USER_CACHED_MEMORY;
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx


[Intel-gfx] [PATCH 1/5 v5] drm/i915: Stop using AGP layer for GEN6+

2012-11-04 Thread Ben Widawsky
As a quick hack we make the old intel_gtt structure mutable so we can
fool a bunch of the existing code which depends on elements in that data
structure. We can/should try to remove this in a subsequent patch.

This should preserve the old gtt init behavior which upon writing these
patches seems incorrect. The next patch will fix these things.

The one exception is VLV which doesn't have the preserved flush control
write behavior. Since we want to do that for all GEN6+ stuff, we'll
handle that in a later patch. Mainstream VLV support doesn't actually
exist yet anyway.

v2: Update the comment to remove the voodoo
Check that the last pte written matches what we readback

v3: actually kill cache_level_to_agp_type since most of the flags will
disappear in an upcoming patch

v4: v3 was actually not what we wanted (Daniel)
Make the ggtt bind assertions better and stricter (Chris)
Fix some uncaught errors at gtt init (Chris)
Some other random stuff that Chris wanted

v5: check for i==0 in gen6_ggtt_bind_object to shut up gcc (Ben)

Signed-off-by: Ben Widawsky b...@bwidawsk.net
Reviewed-by [v4]: Chris Wilson ch...@chris-wilson.co.uk
---
 drivers/char/agp/intel-gtt.c   |   2 +-
 drivers/gpu/drm/i915/i915_dma.c|  16 +-
 drivers/gpu/drm/i915/i915_drv.h|  10 +-
 drivers/gpu/drm/i915/i915_gem.c|  12 +-
 drivers/gpu/drm/i915/i915_gem_execbuffer.c |   2 +-
 drivers/gpu/drm/i915/i915_gem_gtt.c| 257 +
 drivers/gpu/drm/i915/i915_reg.h|   6 +
 include/drm/intel-gtt.h|   3 +-
 8 files changed, 257 insertions(+), 51 deletions(-)

diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c
index 38390f7..4dfbb80 100644
--- a/drivers/char/agp/intel-gtt.c
+++ b/drivers/char/agp/intel-gtt.c
@@ -1686,7 +1686,7 @@ int intel_gmch_probe(struct pci_dev *bridge_pdev, struct 
pci_dev *gpu_pdev,
 }
 EXPORT_SYMBOL(intel_gmch_probe);
 
-const struct intel_gtt *intel_gtt_get(void)
+struct intel_gtt *intel_gtt_get(void)
 {
return intel_private.base;
 }
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index d04facb..d9b4a49 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1494,19 +1494,9 @@ int i915_driver_load(struct drm_device *dev, unsigned 
long flags)
goto free_priv;
}
 
-   ret = intel_gmch_probe(dev_priv-bridge_dev, dev-pdev, NULL);
-   if (!ret) {
-   DRM_ERROR(failed to set up gmch\n);
-   ret = -EIO;
+   ret = i915_gem_gtt_init(dev);
+   if (ret)
goto put_bridge;
-   }
-
-   dev_priv-mm.gtt = intel_gtt_get();
-   if (!dev_priv-mm.gtt) {
-   DRM_ERROR(Failed to initialize GTT\n);
-   ret = -ENODEV;
-   goto put_gmch;
-   }
 
i915_kick_out_firmware_fb(dev_priv);
 
@@ -1680,7 +1670,7 @@ out_mtrrfree:
 out_rmmap:
pci_iounmap(dev-pdev, dev_priv-regs);
 put_gmch:
-   intel_gmch_remove();
+   i915_gem_gtt_fini(dev);
 put_bridge:
pci_dev_put(dev_priv-bridge_dev);
 free_priv:
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a2c5e89..7274360 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -686,7 +686,7 @@ typedef struct drm_i915_private {
 
struct {
/** Bridge to intel-gtt-ko */
-   const struct intel_gtt *gtt;
+   struct intel_gtt *gtt;
/** Memory allocator for GTT stolen memory */
struct drm_mm stolen;
/** Memory allocator for GTT */
@@ -1505,6 +1505,14 @@ void i915_gem_init_global_gtt(struct drm_device *dev,
  unsigned long start,
  unsigned long mappable_end,
  unsigned long end);
+int i915_gem_gtt_init(struct drm_device *dev);
+void i915_gem_gtt_fini(struct drm_device *dev);
+extern inline void i915_gem_chipset_flush(struct drm_device *dev)
+{
+   if (INTEL_INFO(dev)-gen  6)
+   intel_gtt_chipset_flush();
+}
+
 
 /* i915_gem_evict.c */
 int __must_check i915_gem_evict_something(struct drm_device *dev, int min_size,
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 7dd1034..859ac4f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -845,12 +845,12 @@ out:
 * domain anymore. */
if (obj-base.write_domain != I915_GEM_DOMAIN_CPU) {
i915_gem_clflush_object(obj);
-   intel_gtt_chipset_flush();
+   i915_gem_chipset_flush(dev);
}
}
 
if (needs_clflush_after)
-   intel_gtt_chipset_flush();
+   i915_gem_chipset_flush(dev);
 
return ret;
 }
@@ -3058,7 +3058,7 @@