Re: [Intel-gfx] [PATCH 14/20] drm/i915/dg2: add gsc with special gsc bar offsets

2022-04-13 Thread Ceraolo Spurio, Daniele 




On 4/7/2022 5:58 AM, Alexander Usyskin wrote:

From: Tomas Winkler 

DG2 uses different GSC offsets on memory bar
and uses PXP head (HECI1).

Signed-off-by: Alexander Usyskin 
Signed-off-by: Tomas Winkler 


Reviewed-by: Daniele Ceraolo Spurio 

Daniele


---
  drivers/gpu/drm/i915/gt/intel_gsc.c | 15 +++
  drivers/gpu/drm/i915/i915_pci.c |  1 +
  drivers/gpu/drm/i915/i915_reg.h |  2 ++
  3 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c 
b/drivers/gpu/drm/i915/gt/intel_gsc.c
index ffe6716590f0..bfc307e49bf9 100644
--- a/drivers/gpu/drm/i915/gt/intel_gsc.c
+++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
@@ -69,6 +69,19 @@ static const struct gsc_def gsc_def_xehpsdv[] = {
}
  };
  
+static const struct gsc_def gsc_def_dg2[] = {

+   {
+   .name = "mei-gsc",
+   .bar = DG2_GSC_HECI1_BASE,
+   .bar_size = GSC_BAR_LENGTH,
+   },
+   {
+   .name = "mei-gscfi",
+   .bar = DG2_GSC_HECI2_BASE,
+   .bar_size = GSC_BAR_LENGTH,
+   }
+};
+
  static void gsc_release_dev(struct device *dev)
  {
struct auxiliary_device *aux_dev = to_auxiliary_dev(dev);
@@ -109,6 +122,8 @@ static void gsc_init_one(struct drm_i915_private *i915,
def = _def_dg1[intf_id];
} else if (IS_XEHPSDV(i915)) {
def = _def_xehpsdv[intf_id];
+   } else if (IS_DG2(i915)) {
+   def = _def_dg2[intf_id];
} else {
drm_warn_once(>drm, "Unknown platform\n");
return;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 06e6dad0d7f7..cb6dcc3f48f4 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1051,6 +1051,7 @@ static const struct intel_device_info xehpsdv_info = {
.has_4tile = 1, \
.has_64k_pages = 1, \
.has_guc_deprivilege = 1, \
+   .has_heci_pxp = 1, \
.needs_compact_pt = 1, \
.platform_engine_mask = \
BIT(RCS0) | BIT(BCS0) | \
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1dd7b7de6002..efcfe32cd8eb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -978,6 +978,8 @@
  #define BLT_RING_BASE 0x22000
  #define DG1_GSC_HECI1_BASE0x00258000
  #define DG1_GSC_HECI2_BASE0x00259000
+#define DG2_GSC_HECI1_BASE 0x00373000
+#define DG2_GSC_HECI2_BASE 0x00374000

[Intel-gfx] [PATCH 14/20] drm/i915/dg2: add gsc with special gsc bar offsets

2022-04-07 Thread Alexander Usyskin 
From: Tomas Winkler 

DG2 uses different GSC offsets on memory bar
and uses PXP head (HECI1).

Signed-off-by: Alexander Usyskin 
Signed-off-by: Tomas Winkler 
---
 drivers/gpu/drm/i915/gt/intel_gsc.c | 15 +++
 drivers/gpu/drm/i915/i915_pci.c |  1 +
 drivers/gpu/drm/i915/i915_reg.h |  2 ++
 3 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gsc.c 
b/drivers/gpu/drm/i915/gt/intel_gsc.c
index ffe6716590f0..bfc307e49bf9 100644
--- a/drivers/gpu/drm/i915/gt/intel_gsc.c
+++ b/drivers/gpu/drm/i915/gt/intel_gsc.c
@@ -69,6 +69,19 @@ static const struct gsc_def gsc_def_xehpsdv[] = {
}
 };
 
+static const struct gsc_def gsc_def_dg2[] = {
+   {
+   .name = "mei-gsc",
+   .bar = DG2_GSC_HECI1_BASE,
+   .bar_size = GSC_BAR_LENGTH,
+   },
+   {
+   .name = "mei-gscfi",
+   .bar = DG2_GSC_HECI2_BASE,
+   .bar_size = GSC_BAR_LENGTH,
+   }
+};
+
 static void gsc_release_dev(struct device *dev)
 {
struct auxiliary_device *aux_dev = to_auxiliary_dev(dev);
@@ -109,6 +122,8 @@ static void gsc_init_one(struct drm_i915_private *i915,
def = _def_dg1[intf_id];
} else if (IS_XEHPSDV(i915)) {
def = _def_xehpsdv[intf_id];
+   } else if (IS_DG2(i915)) {
+   def = _def_dg2[intf_id];
} else {
drm_warn_once(>drm, "Unknown platform\n");
return;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 06e6dad0d7f7..cb6dcc3f48f4 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1051,6 +1051,7 @@ static const struct intel_device_info xehpsdv_info = {
.has_4tile = 1, \
.has_64k_pages = 1, \
.has_guc_deprivilege = 1, \
+   .has_heci_pxp = 1, \
.needs_compact_pt = 1, \
.platform_engine_mask = \
BIT(RCS0) | BIT(BCS0) | \
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 1dd7b7de6002..efcfe32cd8eb 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -978,6 +978,8 @@
 #define BLT_RING_BASE  0x22000
 #define DG1_GSC_HECI1_BASE 0x00258000
 #define DG1_GSC_HECI2_BASE 0x00259000
+#define DG2_GSC_HECI1_BASE 0x00373000
+#define DG2_GSC_HECI2_BASE 0x00374000
 
 
 
-- 
2.32.0