Re: [Intel-gfx] [PATCH 16/43] drm/i915/bdw: GEN-specific logical ring init

2014-08-11 Thread Daniel Vetter 
On Thu, Jul 24, 2014 at 05:04:24PM +0100, Thomas Daniel wrote:
 From: Oscar Mateo oscar.ma...@intel.com
 
 Logical rings do not need most of the initialization their
 legacy ringbuffer counterparts do: we just need the pipe
 control object for the render ring, enable Execlists on the
 hardware and a few workarounds.
 
 v2: Squash with: drm/i915: Extract pipe control fini  make
 init outside accesible.
 
 Signed-off-by: Oscar Mateo oscar.ma...@intel.com
 ---
  drivers/gpu/drm/i915/intel_lrc.c|   54 
 +++
  drivers/gpu/drm/i915/intel_ringbuffer.c |   34 +++
  drivers/gpu/drm/i915/intel_ringbuffer.h |3 ++
  3 files changed, 78 insertions(+), 13 deletions(-)
 
 diff --git a/drivers/gpu/drm/i915/intel_lrc.c 
 b/drivers/gpu/drm/i915/intel_lrc.c
 index 05b7069..7c8b75e 100644
 --- a/drivers/gpu/drm/i915/intel_lrc.c
 +++ b/drivers/gpu/drm/i915/intel_lrc.c
 @@ -106,6 +106,49 @@ void intel_logical_ring_stop(struct intel_engine_cs 
 *ring)
   /* TODO */
  }
  
 +static int gen8_init_common_ring(struct intel_engine_cs *ring)
 +{
 + struct drm_device *dev = ring-dev;
 + struct drm_i915_private *dev_priv = dev-dev_private;
 +
 + I915_WRITE(RING_MODE_GEN7(ring),
 + _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
 + _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));

Please build up a bit a closer relationship with checkpatch.pl, thanks.

Fixed while merging.
-Daniel

 + POSTING_READ(RING_MODE_GEN7(ring));
 + DRM_DEBUG_DRIVER(Execlists enabled for %s\n, ring-name);
 +
 + memset(ring-hangcheck, 0, sizeof(ring-hangcheck));
 +
 + return 0;
 +}
 +
 +static int gen8_init_render_ring(struct intel_engine_cs *ring)
 +{
 + struct drm_device *dev = ring-dev;
 + struct drm_i915_private *dev_priv = dev-dev_private;
 + int ret;
 +
 + ret = gen8_init_common_ring(ring);
 + if (ret)
 + return ret;
 +
 + /* We need to disable the AsyncFlip performance optimisations in order
 +  * to use MI_WAIT_FOR_EVENT within the CS. It should already be
 +  * programmed to '1' on all products.
 +  *
 +  * WaDisableAsyncFlipPerfMode:snb,ivb,hsw,vlv,bdw,chv
 +  */
 + I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(ASYNC_FLIP_PERF_DISABLE));
 +
 + ret = intel_init_pipe_control(ring);
 + if (ret)
 + return ret;
 +
 + I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
 +
 + return ret;
 +}
 +
  void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
  {
   if (!intel_ring_initialized(ring))
 @@ -176,6 +219,9 @@ static int logical_render_ring_init(struct drm_device 
 *dev)
   ring-irq_enable_mask =
   GT_RENDER_USER_INTERRUPT  GEN8_RCS_IRQ_SHIFT;
  
 + ring-init = gen8_init_render_ring;
 + ring-cleanup = intel_fini_pipe_control;
 +
   return logical_ring_init(dev, ring);
  }
  
 @@ -190,6 +236,8 @@ static int logical_bsd_ring_init(struct drm_device *dev)
   ring-irq_enable_mask =
   GT_RENDER_USER_INTERRUPT  GEN8_VCS1_IRQ_SHIFT;
  
 + ring-init = gen8_init_common_ring;
 +
   return logical_ring_init(dev, ring);
  }
  
 @@ -204,6 +252,8 @@ static int logical_bsd2_ring_init(struct drm_device *dev)
   ring-irq_enable_mask =
   GT_RENDER_USER_INTERRUPT  GEN8_VCS2_IRQ_SHIFT;
  
 + ring-init = gen8_init_common_ring;
 +
   return logical_ring_init(dev, ring);
  }
  
 @@ -218,6 +268,8 @@ static int logical_blt_ring_init(struct drm_device *dev)
   ring-irq_enable_mask =
   GT_RENDER_USER_INTERRUPT  GEN8_BCS_IRQ_SHIFT;
  
 + ring-init = gen8_init_common_ring;
 +
   return logical_ring_init(dev, ring);
  }
  
 @@ -232,6 +284,8 @@ static int logical_vebox_ring_init(struct drm_device *dev)
   ring-irq_enable_mask =
   GT_RENDER_USER_INTERRUPT  GEN8_VECS_IRQ_SHIFT;
  
 + ring-init = gen8_init_common_ring;
 +
   return logical_ring_init(dev, ring);
  }
  
 diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
 b/drivers/gpu/drm/i915/intel_ringbuffer.c
 index 20eb1a4..ca45c58 100644
 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
 +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
 @@ -573,8 +573,25 @@ out:
   return ret;
  }
  
 -static int
 -init_pipe_control(struct intel_engine_cs *ring)
 +void
 +intel_fini_pipe_control(struct intel_engine_cs *ring)
 +{
 + struct drm_device *dev = ring-dev;
 +
 + if (ring-scratch.obj == NULL)
 + return;
 +
 + if (INTEL_INFO(dev)-gen = 5) {
 + kunmap(sg_page(ring-scratch.obj-pages-sgl));
 + i915_gem_object_ggtt_unpin(ring-scratch.obj);
 + }
 +
 + drm_gem_object_unreference(ring-scratch.obj-base);
 + ring-scratch.obj = NULL;
 +}
 +
 +int
 +intel_init_pipe_control(struct intel_engine_cs *ring)
  {
   int ret;
  
 @@ -649,7 +666,7 @@ static int init_render_ring(struct intel_engine_cs *ring)
  _MASKED_BIT_ENABLE(GFX_REPLAY_MODE));
  
   if

[Intel-gfx] [PATCH 16/43] drm/i915/bdw: GEN-specific logical ring init

2014-07-24 Thread Thomas Daniel 
From: Oscar Mateo oscar.ma...@intel.com

Logical rings do not need most of the initialization their
legacy ringbuffer counterparts do: we just need the pipe
control object for the render ring, enable Execlists on the
hardware and a few workarounds.

v2: Squash with: drm/i915: Extract pipe control fini  make
init outside accesible.

Signed-off-by: Oscar Mateo oscar.ma...@intel.com
---
 drivers/gpu/drm/i915/intel_lrc.c|   54 +++
 drivers/gpu/drm/i915/intel_ringbuffer.c |   34 +++
 drivers/gpu/drm/i915/intel_ringbuffer.h |3 ++
 3 files changed, 78 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 05b7069..7c8b75e 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -106,6 +106,49 @@ void intel_logical_ring_stop(struct intel_engine_cs *ring)
/* TODO */
 }
 
+static int gen8_init_common_ring(struct intel_engine_cs *ring)
+{
+   struct drm_device *dev = ring-dev;
+   struct drm_i915_private *dev_priv = dev-dev_private;
+
+   I915_WRITE(RING_MODE_GEN7(ring),
+   _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
+   _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
+   POSTING_READ(RING_MODE_GEN7(ring));
+   DRM_DEBUG_DRIVER(Execlists enabled for %s\n, ring-name);
+
+   memset(ring-hangcheck, 0, sizeof(ring-hangcheck));
+
+   return 0;
+}
+
+static int gen8_init_render_ring(struct intel_engine_cs *ring)
+{
+   struct drm_device *dev = ring-dev;
+   struct drm_i915_private *dev_priv = dev-dev_private;
+   int ret;
+
+   ret = gen8_init_common_ring(ring);
+   if (ret)
+   return ret;
+
+   /* We need to disable the AsyncFlip performance optimisations in order
+* to use MI_WAIT_FOR_EVENT within the CS. It should already be
+* programmed to '1' on all products.
+*
+* WaDisableAsyncFlipPerfMode:snb,ivb,hsw,vlv,bdw,chv
+*/
+   I915_WRITE(MI_MODE, _MASKED_BIT_ENABLE(ASYNC_FLIP_PERF_DISABLE));
+
+   ret = intel_init_pipe_control(ring);
+   if (ret)
+   return ret;
+
+   I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
+
+   return ret;
+}
+
 void intel_logical_ring_cleanup(struct intel_engine_cs *ring)
 {
if (!intel_ring_initialized(ring))
@@ -176,6 +219,9 @@ static int logical_render_ring_init(struct drm_device *dev)
ring-irq_enable_mask =
GT_RENDER_USER_INTERRUPT  GEN8_RCS_IRQ_SHIFT;
 
+   ring-init = gen8_init_render_ring;
+   ring-cleanup = intel_fini_pipe_control;
+
return logical_ring_init(dev, ring);
 }
 
@@ -190,6 +236,8 @@ static int logical_bsd_ring_init(struct drm_device *dev)
ring-irq_enable_mask =
GT_RENDER_USER_INTERRUPT  GEN8_VCS1_IRQ_SHIFT;
 
+   ring-init = gen8_init_common_ring;
+
return logical_ring_init(dev, ring);
 }
 
@@ -204,6 +252,8 @@ static int logical_bsd2_ring_init(struct drm_device *dev)
ring-irq_enable_mask =
GT_RENDER_USER_INTERRUPT  GEN8_VCS2_IRQ_SHIFT;
 
+   ring-init = gen8_init_common_ring;
+
return logical_ring_init(dev, ring);
 }
 
@@ -218,6 +268,8 @@ static int logical_blt_ring_init(struct drm_device *dev)
ring-irq_enable_mask =
GT_RENDER_USER_INTERRUPT  GEN8_BCS_IRQ_SHIFT;
 
+   ring-init = gen8_init_common_ring;
+
return logical_ring_init(dev, ring);
 }
 
@@ -232,6 +284,8 @@ static int logical_vebox_ring_init(struct drm_device *dev)
ring-irq_enable_mask =
GT_RENDER_USER_INTERRUPT  GEN8_VECS_IRQ_SHIFT;
 
+   ring-init = gen8_init_common_ring;
+
return logical_ring_init(dev, ring);
 }
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c 
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 20eb1a4..ca45c58 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -573,8 +573,25 @@ out:
return ret;
 }
 
-static int
-init_pipe_control(struct intel_engine_cs *ring)
+void
+intel_fini_pipe_control(struct intel_engine_cs *ring)
+{
+   struct drm_device *dev = ring-dev;
+
+   if (ring-scratch.obj == NULL)
+   return;
+
+   if (INTEL_INFO(dev)-gen = 5) {
+   kunmap(sg_page(ring-scratch.obj-pages-sgl));
+   i915_gem_object_ggtt_unpin(ring-scratch.obj);
+   }
+
+   drm_gem_object_unreference(ring-scratch.obj-base);
+   ring-scratch.obj = NULL;
+}
+
+int
+intel_init_pipe_control(struct intel_engine_cs *ring)
 {
int ret;
 
@@ -649,7 +666,7 @@ static int init_render_ring(struct intel_engine_cs *ring)
   _MASKED_BIT_ENABLE(GFX_REPLAY_MODE));
 
if (INTEL_INFO(dev)-gen = 5) {
-   ret = init_pipe_control(ring);
+   ret = intel_init_pipe_control(ring);
if (ret)
return ret;
}
@@