Re: [Intel-gfx] [PATCH 2/3] drm/i915/tgl: Read SAGV block time from PCODE
On Wed, Sep 25, 2019 at 01:33:51PM -0700, James Ausmus wrote:
> Starting from TGL, we now need to read the SAGV block time via a PCODE
> mailbox, rather than having a static value.
>
> BSpec: 49326
>
> Cc: Ville Syrjälä
Wrong address. I ignore all patches going there, so it's not doing you
any good.
> Cc: Stanislav Lisovskiy
> Cc: Lucas De Marchi
> Signed-off-by: James Ausmus
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 20 +++-
> 2 files changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e752de9470bd..84ae6553485b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8865,6 +8865,7 @@ enum {
> #define GEN9_SAGV_DISABLE0x0
> #define GEN9_SAGV_IS_DISABLED0x1
> #define GEN9_SAGV_ENABLE 0x3
> +#define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US 0x23
> #define GEN6_PCODE_DATA _MMIO(0x138128)
> #define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
> #define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 5ad72dcb0faa..ca2bec09edb5 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3665,16 +3665,26 @@ intel_has_sagv(struct drm_i915_private *dev_priv)
> static int
> intel_get_sagv_block_time_us(struct drm_i915_private *dev_priv)
> {
> - int sagv_block_time_us = 1000; /* Default to unusable block time */
> + uint val = 0;
> + int ret, sagv_block_time_us = 1000; /* Default to unusable block time */
>
> - if (IS_GEN(dev_priv, 11))
> + if (INTEL_GEN(dev_priv) >= 12) {
> + ret = sandybridge_pcode_read(dev_priv,
> +
> GEN12_PCODE_READ_SAGV_BLOCK_TIME_US,
> + , NULL);
> + if (!ret)
> + sagv_block_time_us = val;
> + else
> + DRM_DEBUG_DRIVER("Couldn't read SAGV block time!\n");
> + } else if (IS_GEN(dev_priv, 11)) {
> sagv_block_time_us = 10;
> - else if (IS_GEN(dev_priv, 10))
> + } else if (IS_GEN(dev_priv, 10)) {
> sagv_block_time_us = 20;
> - else if (IS_GEN(dev_priv, 9))
> + } else if (IS_GEN(dev_priv, 9)) {
> sagv_block_time_us = 30;
> - else
> + } else {
> MISSING_CASE(INTEL_GEN(dev_priv));
> + }
>
> return sagv_block_time_us;
> }
> --
> 2.22.1
>
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--
Ville Syrjälä
Intel
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Re: [Intel-gfx] [PATCH 2/3] drm/i915/tgl: Read SAGV block time from PCODE
On Wed, Sep 25, 2019 at 01:33:51PM -0700, James Ausmus wrote:
> Starting from TGL, we now need to read the SAGV block time via a PCODE
> mailbox, rather than having a static value.
>
> BSpec: 49326
>
> Cc: Ville Syrjälä
> Cc: Stanislav Lisovskiy
> Cc: Lucas De Marchi
> Signed-off-by: James Ausmus
> ---
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 20 +++-
> 2 files changed, 16 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index e752de9470bd..84ae6553485b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8865,6 +8865,7 @@ enum {
> #define GEN9_SAGV_DISABLE0x0
> #define GEN9_SAGV_IS_DISABLED0x1
> #define GEN9_SAGV_ENABLE 0x3
> +#define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US 0x23
> #define GEN6_PCODE_DATA _MMIO(0x138128)
> #define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
> #define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 5ad72dcb0faa..ca2bec09edb5 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3665,16 +3665,26 @@ intel_has_sagv(struct drm_i915_private *dev_priv)
> static int
> intel_get_sagv_block_time_us(struct drm_i915_private *dev_priv)
> {
> - int sagv_block_time_us = 1000; /* Default to unusable block time */
> + uint val = 0;
uint?
> + int ret, sagv_block_time_us = 1000; /* Default to unusable block time */
val+ret could live in a tighter scope.
>
> - if (IS_GEN(dev_priv, 11))
> + if (INTEL_GEN(dev_priv) >= 12) {
> + ret = sandybridge_pcode_read(dev_priv,
> +
> GEN12_PCODE_READ_SAGV_BLOCK_TIME_US,
> + , NULL);
We should probably stash this somewhere so we don't have to keep
asking pcode about it every single time.
Magic numbers look correct
Reviewed-by: Ville Syrjälä
> + if (!ret)
> + sagv_block_time_us = val;
> + else
> + DRM_DEBUG_DRIVER("Couldn't read SAGV block time!\n");
> + } else if (IS_GEN(dev_priv, 11)) {
> sagv_block_time_us = 10;
> - else if (IS_GEN(dev_priv, 10))
> + } else if (IS_GEN(dev_priv, 10)) {
> sagv_block_time_us = 20;
> - else if (IS_GEN(dev_priv, 9))
> + } else if (IS_GEN(dev_priv, 9)) {
> sagv_block_time_us = 30;
> - else
> + } else {
> MISSING_CASE(INTEL_GEN(dev_priv));
> + }
>
> return sagv_block_time_us;
> }
> --
> 2.22.1
>
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--
Ville Syrjälä
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[Intel-gfx] [PATCH 2/3] drm/i915/tgl: Read SAGV block time from PCODE
Starting from TGL, we now need to read the SAGV block time via a PCODE
mailbox, rather than having a static value.
BSpec: 49326
Cc: Ville Syrjälä
Cc: Stanislav Lisovskiy
Cc: Lucas De Marchi
Signed-off-by: James Ausmus
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 20 +++-
2 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index e752de9470bd..84ae6553485b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8865,6 +8865,7 @@ enum {
#define GEN9_SAGV_DISABLE 0x0
#define GEN9_SAGV_IS_DISABLED 0x1
#define GEN9_SAGV_ENABLE 0x3
+#define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US0x23
#define GEN6_PCODE_DATA_MMIO(0x138128)
#define GEN6_PCODE_FREQ_IA_RATIO_SHIFT 8
#define GEN6_PCODE_FREQ_RING_RATIO_SHIFT 16
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 5ad72dcb0faa..ca2bec09edb5 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3665,16 +3665,26 @@ intel_has_sagv(struct drm_i915_private *dev_priv)
static int
intel_get_sagv_block_time_us(struct drm_i915_private *dev_priv)
{
- int sagv_block_time_us = 1000; /* Default to unusable block time */
+ uint val = 0;
+ int ret, sagv_block_time_us = 1000; /* Default to unusable block time */
- if (IS_GEN(dev_priv, 11))
+ if (INTEL_GEN(dev_priv) >= 12) {
+ ret = sandybridge_pcode_read(dev_priv,
+
GEN12_PCODE_READ_SAGV_BLOCK_TIME_US,
+, NULL);
+ if (!ret)
+ sagv_block_time_us = val;
+ else
+ DRM_DEBUG_DRIVER("Couldn't read SAGV block time!\n");
+ } else if (IS_GEN(dev_priv, 11)) {
sagv_block_time_us = 10;
- else if (IS_GEN(dev_priv, 10))
+ } else if (IS_GEN(dev_priv, 10)) {
sagv_block_time_us = 20;
- else if (IS_GEN(dev_priv, 9))
+ } else if (IS_GEN(dev_priv, 9)) {
sagv_block_time_us = 30;
- else
+ } else {
MISSING_CASE(INTEL_GEN(dev_priv));
+ }
return sagv_block_time_us;
}
--
2.22.1
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