subject:"\[Intel\-gfx\] \[PATCH 2\/7\] drm\/i915\: Renaming DP training vswing pre emph defines"

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Renaming DP training vswing pre emph defines

2014-08-11 Thread Damien Lespiau

On Fri, Aug 08, 2014 at 04:23:41PM +0530, sonika.jin...@intel.com wrote:
 From: Sonika Jindal sonika.jin...@intel.com
 
 Rename the defines to have levels instead of values for vswing and
 pre-emph levels as the values may differ in other scenarios like low vswing of
 eDP1.4 where the values are different.
 
 Done using following cocci patch for each define:
 @@
 @@
 
  # define DP_TRAIN_VOLTAGE_SWING_400 (0  0)
 + # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0  0)
 
 ...
 
 Signed-off-by: Sonika Jindal sonika.jin...@intel.com

Reviewed-by: Damien Lespiau damien.lesp...@intel.com

-- 
Damien

 ---
  drivers/gpu/drm/i915/intel_bios.c |   16 +--
  drivers/gpu/drm/i915/intel_dp.c   |  194 
 ++---
  2 files changed, 105 insertions(+), 105 deletions(-)
 
 diff --git a/drivers/gpu/drm/i915/intel_bios.c 
 b/drivers/gpu/drm/i915/intel_bios.c
 index 031c565..e871f68 100644
 --- a/drivers/gpu/drm/i915/intel_bios.c
 +++ b/drivers/gpu/drm/i915/intel_bios.c
 @@ -627,16 +627,16 @@ parse_edp(struct drm_i915_private *dev_priv, struct 
 bdb_header *bdb)
  
   switch (edp_link_params-preemphasis) {
   case EDP_PREEMPHASIS_NONE:
 - dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
 + dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
   break;
   case EDP_PREEMPHASIS_3_5dB:
 - dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
 + dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
   break;
   case EDP_PREEMPHASIS_6dB:
 - dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
 + dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
   break;
   case EDP_PREEMPHASIS_9_5dB:
 - dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
 + dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
   break;
   default:
   DRM_DEBUG_KMS(VBT has unknown eDP pre-emphasis value %u\n,
 @@ -646,16 +646,16 @@ parse_edp(struct drm_i915_private *dev_priv, struct 
 bdb_header *bdb)
  
   switch (edp_link_params-vswing) {
   case EDP_VSWING_0_4V:
 - dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400;
 + dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
   break;
   case EDP_VSWING_0_6V:
 - dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600;
 + dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
   break;
   case EDP_VSWING_0_8V:
 - dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800;
 + dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
   break;
   case EDP_VSWING_1_2V:
 - dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200;
 + dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
   break;
   default:
   DRM_DEBUG_KMS(VBT has unknown eDP voltage swing value %u\n,
 diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
 index 34e3c47..01f264c 100644
 --- a/drivers/gpu/drm/i915/intel_dp.c
 +++ b/drivers/gpu/drm/i915/intel_dp.c
 @@ -2381,13 +2381,13 @@ intel_dp_voltage_max(struct intel_dp *intel_dp)
   enum port port = dp_to_dig_port(intel_dp)-port;
  
   if (IS_VALLEYVIEW(dev))
 - return DP_TRAIN_VOLTAGE_SWING_1200;
 + return DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
   else if (IS_GEN7(dev)  port == PORT_A)
 - return DP_TRAIN_VOLTAGE_SWING_800;
 + return DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
   else if (HAS_PCH_CPT(dev)  port != PORT_A)
 - return DP_TRAIN_VOLTAGE_SWING_1200;
 + return DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
   else
 - return DP_TRAIN_VOLTAGE_SWING_800;
 + return DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
  }
  
  static uint8_t
 @@ -2398,49 +2398,49 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, 
 uint8_t voltage_swing)
  
   if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
   switch (voltage_swing  DP_TRAIN_VOLTAGE_SWING_MASK) {
 - case DP_TRAIN_VOLTAGE_SWING_400:
 - return DP_TRAIN_PRE_EMPHASIS_9_5;
 - case DP_TRAIN_VOLTAGE_SWING_600:
 - return DP_TRAIN_PRE_EMPHASIS_6;
 - case DP_TRAIN_VOLTAGE_SWING_800:
 - return DP_TRAIN_PRE_EMPHASIS_3_5;
 - case DP_TRAIN_VOLTAGE_SWING_1200:
 + case DP_TRAIN_VOLTAGE_SWING_LEVEL_0:
 + return DP_TRAIN_PRE_EMPH_LEVEL_3;
 + case DP_TRAIN_VOLTAGE_SWING_LEVEL_1:
 + return DP_TRAIN_PRE_EMPH_LEVEL_2;
 + case DP_TRAIN_VOLTAGE_SWING_LEVEL_2:
 + return DP_TRAIN_PRE_EMPH_LEVEL_1;
 + case DP_TRAIN_VOLTAGE_SWING_LEVEL_3:
   default:
 - return DP_TRAIN_PRE_EMPHASIS_0;
 +

[Intel-gfx] [PATCH 2/7] drm/i915: Renaming DP training vswing pre emph defines

2014-08-08 Thread sonika . jindal

From: Sonika Jindal sonika.jin...@intel.com

Rename the defines to have levels instead of values for vswing and
pre-emph levels as the values may differ in other scenarios like low vswing of
eDP1.4 where the values are different.

Done using following cocci patch for each define:
@@
@@

 # define DP_TRAIN_VOLTAGE_SWING_400 (0  0)
+ # define DP_TRAIN_VOLTAGE_SWING_LEVEL_0 (0  0)

...

Signed-off-by: Sonika Jindal sonika.jin...@intel.com
---
 drivers/gpu/drm/i915/intel_bios.c |   16 +--
 drivers/gpu/drm/i915/intel_dp.c   |  194 ++---
 2 files changed, 105 insertions(+), 105 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c 
b/drivers/gpu/drm/i915/intel_bios.c
index 031c565..e871f68 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -627,16 +627,16 @@ parse_edp(struct drm_i915_private *dev_priv, struct 
bdb_header *bdb)
 
switch (edp_link_params-preemphasis) {
case EDP_PREEMPHASIS_NONE:
-   dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
+   dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
break;
case EDP_PREEMPHASIS_3_5dB:
-   dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
+   dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
break;
case EDP_PREEMPHASIS_6dB:
-   dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
+   dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
break;
case EDP_PREEMPHASIS_9_5dB:
-   dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
+   dev_priv-vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
break;
default:
DRM_DEBUG_KMS(VBT has unknown eDP pre-emphasis value %u\n,
@@ -646,16 +646,16 @@ parse_edp(struct drm_i915_private *dev_priv, struct 
bdb_header *bdb)
 
switch (edp_link_params-vswing) {
case EDP_VSWING_0_4V:
-   dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400;
+   dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
break;
case EDP_VSWING_0_6V:
-   dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600;
+   dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
break;
case EDP_VSWING_0_8V:
-   dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800;
+   dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
break;
case EDP_VSWING_1_2V:
-   dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200;
+   dev_priv-vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
break;
default:
DRM_DEBUG_KMS(VBT has unknown eDP voltage swing value %u\n,
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 34e3c47..01f264c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2381,13 +2381,13 @@ intel_dp_voltage_max(struct intel_dp *intel_dp)
enum port port = dp_to_dig_port(intel_dp)-port;
 
if (IS_VALLEYVIEW(dev))
-   return DP_TRAIN_VOLTAGE_SWING_1200;
+   return DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
else if (IS_GEN7(dev)  port == PORT_A)
-   return DP_TRAIN_VOLTAGE_SWING_800;
+   return DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
else if (HAS_PCH_CPT(dev)  port != PORT_A)
-   return DP_TRAIN_VOLTAGE_SWING_1200;
+   return DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
else
-   return DP_TRAIN_VOLTAGE_SWING_800;
+   return DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
 }
 
 static uint8_t
@@ -2398,49 +2398,49 @@ intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, 
uint8_t voltage_swing)
 
if (IS_HASWELL(dev) || IS_BROADWELL(dev)) {
switch (voltage_swing  DP_TRAIN_VOLTAGE_SWING_MASK) {
-   case DP_TRAIN_VOLTAGE_SWING_400:
-   return DP_TRAIN_PRE_EMPHASIS_9_5;
-   case DP_TRAIN_VOLTAGE_SWING_600:
-   return DP_TRAIN_PRE_EMPHASIS_6;
-   case DP_TRAIN_VOLTAGE_SWING_800:
-   return DP_TRAIN_PRE_EMPHASIS_3_5;
-   case DP_TRAIN_VOLTAGE_SWING_1200:
+   case DP_TRAIN_VOLTAGE_SWING_LEVEL_0:
+   return DP_TRAIN_PRE_EMPH_LEVEL_3;
+   case DP_TRAIN_VOLTAGE_SWING_LEVEL_1:
+   return DP_TRAIN_PRE_EMPH_LEVEL_2;
+   case DP_TRAIN_VOLTAGE_SWING_LEVEL_2:
+   return DP_TRAIN_PRE_EMPH_LEVEL_1;
+   case DP_TRAIN_VOLTAGE_SWING_LEVEL_3:
default:
-   return DP_TRAIN_PRE_EMPHASIS_0;
+   return DP_TRAIN_PRE_EMPH_LEVEL_0;
}
} else if (IS_VALLEYVIEW(dev)) {

Re: [Intel-gfx] [PATCH 2/7] drm/i915: Renaming DP training vswing pre emph defines

[Intel-gfx] [PATCH 2/7] drm/i915: Renaming DP training vswing pre emph defines

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