subject:"\[Intel\-gfx\] \[PATCH 23\/24\] drm\/i915\: constify clock gating init vtable."

[Intel-gfx] [PATCH 23/24] drm/i915: constify clock gating init vtable.

2021-09-28 Thread Jani Nikula

From: Dave Airlie 

I used a macro to avoid making any really silly mistakes here.

Reviewed-by: Jani Nikula 
Signed-off-by: Dave Airlie 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h |  2 +-
 drivers/gpu/drm/i915/intel_pm.c | 78 +++--
 2 files changed, 55 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c94a70155937..21f2e97bf122 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -975,7 +975,7 @@ struct drm_i915_private {
struct workqueue_struct *flip_wq;
 
/* pm private clock gating functions */
-   struct drm_i915_clock_gating_funcs clock_gating_funcs;
+   const struct drm_i915_clock_gating_funcs *clock_gating_funcs;
 
/* pm display functions */
struct drm_i915_wm_disp_funcs wm_disp;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b37888781ec9..08e0195edeb7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7869,7 +7869,7 @@ static void i830_init_clock_gating(struct 
drm_i915_private *dev_priv)
 
 void intel_init_clock_gating(struct drm_i915_private *dev_priv)
 {
-   dev_priv->clock_gating_funcs.init_clock_gating(dev_priv);
+   dev_priv->clock_gating_funcs->init_clock_gating(dev_priv);
 }
 
 void intel_suspend_hw(struct drm_i915_private *dev_priv)
@@ -7884,6 +7884,36 @@ static void nop_init_clock_gating(struct 
drm_i915_private *dev_priv)
"No clock gating settings or workarounds applied.\n");
 }
 
+#define CG_FUNCS(platform) \
+static const struct drm_i915_clock_gating_funcs platform##_clock_gating_funcs 
= { \
+   .init_clock_gating = platform##_init_clock_gating,  \
+}
+
+CG_FUNCS(adlp);
+CG_FUNCS(dg1);
+CG_FUNCS(gen12lp);
+CG_FUNCS(icl);
+CG_FUNCS(cfl);
+CG_FUNCS(skl);
+CG_FUNCS(kbl);
+CG_FUNCS(bxt);
+CG_FUNCS(glk);
+CG_FUNCS(bdw);
+CG_FUNCS(chv);
+CG_FUNCS(hsw);
+CG_FUNCS(ivb);
+CG_FUNCS(vlv);
+CG_FUNCS(gen6);
+CG_FUNCS(ilk);
+CG_FUNCS(g4x);
+CG_FUNCS(i965gm);
+CG_FUNCS(i965g);
+CG_FUNCS(gen3);
+CG_FUNCS(i85x);
+CG_FUNCS(i830);
+CG_FUNCS(nop);
+#undef CG_FUNCS
+
 /**
  * intel_init_clock_gating_hooks - setup the clock gating hooks
  * @dev_priv: device private
@@ -7896,52 +7926,52 @@ static void nop_init_clock_gating(struct 
drm_i915_private *dev_priv)
 void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 {
if (IS_ALDERLAKE_P(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
adlp_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_DG1(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
dg1_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (GRAPHICS_VER(dev_priv) == 12)
-   dev_priv->clock_gating_funcs.init_clock_gating = 
gen12lp_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (GRAPHICS_VER(dev_priv) == 11)
-   dev_priv->clock_gating_funcs.init_clock_gating = 
icl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
cfl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_SKYLAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
skl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_KABYLAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
kbl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_BROXTON(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
bxt_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_GEMINILAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
glk_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_BROADWELL(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
bdw_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_CHERRYVIEW(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
chv_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_HASWELL(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
hsw_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_IVYBRIDGE(dev_priv))
-

[Intel-gfx] [PATCH 23/24] drm/i915: constify clock gating init vtable.

2021-09-22 Thread Jani Nikula

From: Dave Airlie 

I used a macro to avoid making any really silly mistakes here.

Reviewed-by: Jani Nikula 
Signed-off-by: Dave Airlie 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h |  2 +-
 drivers/gpu/drm/i915/intel_pm.c | 78 +++--
 2 files changed, 55 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6a6d08219526..390091b898d5 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -975,7 +975,7 @@ struct drm_i915_private {
struct workqueue_struct *flip_wq;
 
/* pm private clock gating functions */
-   struct drm_i915_clock_gating_funcs clock_gating_funcs;
+   const struct drm_i915_clock_gating_funcs *clock_gating_funcs;
 
/* pm display functions */
struct drm_i915_wm_disp_funcs wm_disp;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 826216a115fd..0a5c1e3c798b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7871,7 +7871,7 @@ static void i830_init_clock_gating(struct 
drm_i915_private *dev_priv)
 
 void intel_init_clock_gating(struct drm_i915_private *dev_priv)
 {
-   dev_priv->clock_gating_funcs.init_clock_gating(dev_priv);
+   dev_priv->clock_gating_funcs->init_clock_gating(dev_priv);
 }
 
 void intel_suspend_hw(struct drm_i915_private *dev_priv)
@@ -7886,6 +7886,36 @@ static void nop_init_clock_gating(struct 
drm_i915_private *dev_priv)
"No clock gating settings or workarounds applied.\n");
 }
 
+#define CG_FUNCS(platform) \
+static const struct drm_i915_clock_gating_funcs platform##_clock_gating_funcs 
= { \
+   .init_clock_gating = platform##_init_clock_gating,  \
+}
+
+CG_FUNCS(adlp);
+CG_FUNCS(dg1);
+CG_FUNCS(gen12lp);
+CG_FUNCS(icl);
+CG_FUNCS(cfl);
+CG_FUNCS(skl);
+CG_FUNCS(kbl);
+CG_FUNCS(bxt);
+CG_FUNCS(glk);
+CG_FUNCS(bdw);
+CG_FUNCS(chv);
+CG_FUNCS(hsw);
+CG_FUNCS(ivb);
+CG_FUNCS(vlv);
+CG_FUNCS(gen6);
+CG_FUNCS(ilk);
+CG_FUNCS(g4x);
+CG_FUNCS(i965gm);
+CG_FUNCS(i965g);
+CG_FUNCS(gen3);
+CG_FUNCS(i85x);
+CG_FUNCS(i830);
+CG_FUNCS(nop);
+#undef CG_FUNCS
+
 /**
  * intel_init_clock_gating_hooks - setup the clock gating hooks
  * @dev_priv: device private
@@ -7898,52 +7928,52 @@ static void nop_init_clock_gating(struct 
drm_i915_private *dev_priv)
 void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 {
if (IS_ALDERLAKE_P(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
adlp_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_DG1(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
dg1_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (GRAPHICS_VER(dev_priv) == 12)
-   dev_priv->clock_gating_funcs.init_clock_gating = 
gen12lp_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (GRAPHICS_VER(dev_priv) == 11)
-   dev_priv->clock_gating_funcs.init_clock_gating = 
icl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
cfl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_SKYLAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
skl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_KABYLAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
kbl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_BROXTON(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
bxt_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_GEMINILAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
glk_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_BROADWELL(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
bdw_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_CHERRYVIEW(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
chv_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_HASWELL(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
hsw_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_IVYBRIDGE(dev_priv))
-

[Intel-gfx] [PATCH 23/24] drm/i915: constify clock gating init vtable.

2021-09-14 Thread Jani Nikula

From: Dave Airlie 

I used a macro to avoid making any really silly mistakes here.

Reviewed-by: Jani Nikula 
Signed-off-by: Dave Airlie 
Signed-off-by: Jani Nikula 
---
 drivers/gpu/drm/i915/i915_drv.h |  2 +-
 drivers/gpu/drm/i915/intel_pm.c | 78 +++--
 2 files changed, 55 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2d0800b9b671..be85934d2ac4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -975,7 +975,7 @@ struct drm_i915_private {
struct workqueue_struct *flip_wq;
 
/* pm private clock gating functions */
-   struct drm_i915_clock_gating_funcs clock_gating_funcs;
+   const struct drm_i915_clock_gating_funcs *clock_gating_funcs;
 
/* pm display functions */
struct drm_i915_wm_disp_funcs wm_disp;
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 826216a115fd..0a5c1e3c798b 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7871,7 +7871,7 @@ static void i830_init_clock_gating(struct 
drm_i915_private *dev_priv)
 
 void intel_init_clock_gating(struct drm_i915_private *dev_priv)
 {
-   dev_priv->clock_gating_funcs.init_clock_gating(dev_priv);
+   dev_priv->clock_gating_funcs->init_clock_gating(dev_priv);
 }
 
 void intel_suspend_hw(struct drm_i915_private *dev_priv)
@@ -7886,6 +7886,36 @@ static void nop_init_clock_gating(struct 
drm_i915_private *dev_priv)
"No clock gating settings or workarounds applied.\n");
 }
 
+#define CG_FUNCS(platform) \
+static const struct drm_i915_clock_gating_funcs platform##_clock_gating_funcs 
= { \
+   .init_clock_gating = platform##_init_clock_gating,  \
+}
+
+CG_FUNCS(adlp);
+CG_FUNCS(dg1);
+CG_FUNCS(gen12lp);
+CG_FUNCS(icl);
+CG_FUNCS(cfl);
+CG_FUNCS(skl);
+CG_FUNCS(kbl);
+CG_FUNCS(bxt);
+CG_FUNCS(glk);
+CG_FUNCS(bdw);
+CG_FUNCS(chv);
+CG_FUNCS(hsw);
+CG_FUNCS(ivb);
+CG_FUNCS(vlv);
+CG_FUNCS(gen6);
+CG_FUNCS(ilk);
+CG_FUNCS(g4x);
+CG_FUNCS(i965gm);
+CG_FUNCS(i965g);
+CG_FUNCS(gen3);
+CG_FUNCS(i85x);
+CG_FUNCS(i830);
+CG_FUNCS(nop);
+#undef CG_FUNCS
+
 /**
  * intel_init_clock_gating_hooks - setup the clock gating hooks
  * @dev_priv: device private
@@ -7898,52 +7928,52 @@ static void nop_init_clock_gating(struct 
drm_i915_private *dev_priv)
 void intel_init_clock_gating_hooks(struct drm_i915_private *dev_priv)
 {
if (IS_ALDERLAKE_P(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
adlp_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_DG1(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
dg1_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (GRAPHICS_VER(dev_priv) == 12)
-   dev_priv->clock_gating_funcs.init_clock_gating = 
gen12lp_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (GRAPHICS_VER(dev_priv) == 11)
-   dev_priv->clock_gating_funcs.init_clock_gating = 
icl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_COFFEELAKE(dev_priv) || IS_COMETLAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
cfl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_SKYLAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
skl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_KABYLAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
kbl_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_BROXTON(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
bxt_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_GEMINILAKE(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
glk_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_BROADWELL(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
bdw_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_CHERRYVIEW(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
chv_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_HASWELL(dev_priv))
-   dev_priv->clock_gating_funcs.init_clock_gating = 
hsw_init_clock_gating;
+   dev_priv->clock_gating_funcs = _clock_gating_funcs;
else if (IS_IVYBRIDGE(dev_priv))
-

[Intel-gfx] [PATCH 23/24] drm/i915: constify clock gating init vtable.

[Intel-gfx] [PATCH 23/24] drm/i915: constify clock gating init vtable.

[Intel-gfx] [PATCH 23/24] drm/i915: constify clock gating init vtable.

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