subject:"\[Intel\-gfx\] \[PATCH 3\/6\] drm\/i915\: Check PSR setup time vs. vblank length"

Re: [Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

2016-08-25 Thread Rodrigo Vivi

On Mon, Aug 8, 2016 at 1:33 AM, Jani Nikula  wrote:
> On Sat, 06 Aug 2016, Rodrigo Vivi  wrote:
>> This patch is blocking PSR on panels that we know that our hardware support.
>
> And it also fixes a regression on Linus' laptop, and it's been merged
> upstream...

yeap, this patch is like setting i915.enable_psr=0...

I still believe we have an error somewhere else.
With this patch in place there is no panel out there with PSR
supported with preferred mode.

Maybe this ultra fast vblank is confusing this PSR blocks if this are
the expected timings...

>
> BR,
> Jani.
>
>>
>> I wonder if:
>> 1. This restrictions was for older platforms and spec is out dated
>> 2. Or Spec is not documenting the restriction properly
>> 3. Or we have some issue with out setup time calculation.
>>
>>
>> On Tue, May 31, 2016 at 8:50 AM,   wrote:
>>> From: Ville Syrjälä 
>>>
>>> Bspec says:
>>> "Restriction : SRD must not be enabled when the PSR Setup time from DPCD
>>> 00071h is greater than the time for vertical blank minus one line."
>>>
>>> Let's check for that and disallow PSR if we exceed the limit.
>>>
>>> Cc: Daniel Vetter 
>>> Reviewed-by: Daniel Vetter 
>>> Signed-off-by: Ville Syrjälä 
>>> ---
>>>  drivers/gpu/drm/i915/intel_drv.h|  2 ++
>>>  drivers/gpu/drm/i915/intel_psr.c| 19 ++-
>>>  drivers/gpu/drm/i915/intel_sprite.c |  6 +++---
>>>  3 files changed, 23 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
>>> b/drivers/gpu/drm/i915/intel_drv.h
>>> index 9b5f6634c558..56ae3b78e25e 100644
>>> --- a/drivers/gpu/drm/i915/intel_drv.h
>>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>>> @@ -1672,6 +1672,8 @@ bool intel_sdvo_init(struct drm_device *dev,
>>>
>>>
>>>  /* intel_sprite.c */
>>> +int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
>>> +int usecs);
>>>  int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
>>>  int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
>>>   struct drm_file *file_priv);
>>> diff --git a/drivers/gpu/drm/i915/intel_psr.c 
>>> b/drivers/gpu/drm/i915/intel_psr.c
>>> index 29a09bf6bd18..aacd8d1767f2 100644
>>> --- a/drivers/gpu/drm/i915/intel_psr.c
>>> +++ b/drivers/gpu/drm/i915/intel_psr.c
>>> @@ -327,6 +327,9 @@ static bool intel_psr_match_conditions(struct intel_dp 
>>> *intel_dp)
>>> struct drm_i915_private *dev_priv = dev->dev_private;
>>> struct drm_crtc *crtc = dig_port->base.base.crtc;
>>> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>>> +   const struct drm_display_mode *adjusted_mode =
>>> +   _crtc->config->base.adjusted_mode;
>>> +   int psr_setup_time;
>>>
>>> lockdep_assert_held(_priv->psr.lock);
>>> WARN_ON(!drm_modeset_is_locked(>mode_config.connection_mutex));
>>> @@ -365,11 +368,25 @@ static bool intel_psr_match_conditions(struct 
>>> intel_dp *intel_dp)
>>> }
>>>
>>> if (IS_HASWELL(dev) &&
>>> -   intel_crtc->config->base.adjusted_mode.flags & 
>>> DRM_MODE_FLAG_INTERLACE) {
>>> +   adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
>>> DRM_DEBUG_KMS("PSR condition failed: Interlaced is 
>>> Enabled\n");
>>> return false;
>>> }
>>>
>>> +   psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
>>> +   if (psr_setup_time < 0) {
>>> +   DRM_DEBUG_KMS("PSR condition failed: Invalid PSR setup time 
>>> (0x%02x)\n",
>>> + intel_dp->psr_dpcd[1]);
>>> +   return false;
>>> +   }
>>> +
>>> +   if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
>>> +   adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
>>> +   DRM_DEBUG_KMS("PSR condition failed: PSR setup time (%d us) 
>>> too long\n",
>>> + psr_setup_time);
>>> +   return false;
>>> +   }
>>> +
>>> dev_priv->psr.source_ok = true;
>>> return true;
>>>  }
>>> diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
>>> b/drivers/gpu/drm/i915/intel_sprite.c
>>> index 324ccb06397d..293b48007006 100644
>>> --- a/drivers/gpu/drm/i915/intel_sprite.c
>>> +++ b/drivers/gpu/drm/i915/intel_sprite.c
>>> @@ -53,8 +53,8 @@ format_is_yuv(uint32_t format)
>>> }
>>>  }
>>>
>>> -static int usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
>>> - int usecs)
>>> +int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
>>> +int usecs)
>>>  {
>>> /* paranoia */
>>> if (!adjusted_mode->crtc_htotal)
>>> @@ -91,7 +91,7 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
>>>

Re: [Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

2016-08-08 Thread Jani Nikula

On Sat, 06 Aug 2016, Rodrigo Vivi  wrote:
> This patch is blocking PSR on panels that we know that our hardware support.

And it also fixes a regression on Linus' laptop, and it's been merged
upstream...

BR,
Jani.

>
> I wonder if:
> 1. This restrictions was for older platforms and spec is out dated
> 2. Or Spec is not documenting the restriction properly
> 3. Or we have some issue with out setup time calculation.
>
>
> On Tue, May 31, 2016 at 8:50 AM,   wrote:
>> From: Ville Syrjälä 
>>
>> Bspec says:
>> "Restriction : SRD must not be enabled when the PSR Setup time from DPCD
>> 00071h is greater than the time for vertical blank minus one line."
>>
>> Let's check for that and disallow PSR if we exceed the limit.
>>
>> Cc: Daniel Vetter 
>> Reviewed-by: Daniel Vetter 
>> Signed-off-by: Ville Syrjälä 
>> ---
>>  drivers/gpu/drm/i915/intel_drv.h|  2 ++
>>  drivers/gpu/drm/i915/intel_psr.c| 19 ++-
>>  drivers/gpu/drm/i915/intel_sprite.c |  6 +++---
>>  3 files changed, 23 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
>> b/drivers/gpu/drm/i915/intel_drv.h
>> index 9b5f6634c558..56ae3b78e25e 100644
>> --- a/drivers/gpu/drm/i915/intel_drv.h
>> +++ b/drivers/gpu/drm/i915/intel_drv.h
>> @@ -1672,6 +1672,8 @@ bool intel_sdvo_init(struct drm_device *dev,
>>
>>
>>  /* intel_sprite.c */
>> +int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
>> +int usecs);
>>  int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
>>  int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
>>   struct drm_file *file_priv);
>> diff --git a/drivers/gpu/drm/i915/intel_psr.c 
>> b/drivers/gpu/drm/i915/intel_psr.c
>> index 29a09bf6bd18..aacd8d1767f2 100644
>> --- a/drivers/gpu/drm/i915/intel_psr.c
>> +++ b/drivers/gpu/drm/i915/intel_psr.c
>> @@ -327,6 +327,9 @@ static bool intel_psr_match_conditions(struct intel_dp 
>> *intel_dp)
>> struct drm_i915_private *dev_priv = dev->dev_private;
>> struct drm_crtc *crtc = dig_port->base.base.crtc;
>> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>> +   const struct drm_display_mode *adjusted_mode =
>> +   _crtc->config->base.adjusted_mode;
>> +   int psr_setup_time;
>>
>> lockdep_assert_held(_priv->psr.lock);
>> WARN_ON(!drm_modeset_is_locked(>mode_config.connection_mutex));
>> @@ -365,11 +368,25 @@ static bool intel_psr_match_conditions(struct intel_dp 
>> *intel_dp)
>> }
>>
>> if (IS_HASWELL(dev) &&
>> -   intel_crtc->config->base.adjusted_mode.flags & 
>> DRM_MODE_FLAG_INTERLACE) {
>> +   adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
>> DRM_DEBUG_KMS("PSR condition failed: Interlaced is 
>> Enabled\n");
>> return false;
>> }
>>
>> +   psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
>> +   if (psr_setup_time < 0) {
>> +   DRM_DEBUG_KMS("PSR condition failed: Invalid PSR setup time 
>> (0x%02x)\n",
>> + intel_dp->psr_dpcd[1]);
>> +   return false;
>> +   }
>> +
>> +   if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
>> +   adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
>> +   DRM_DEBUG_KMS("PSR condition failed: PSR setup time (%d us) 
>> too long\n",
>> + psr_setup_time);
>> +   return false;
>> +   }
>> +
>> dev_priv->psr.source_ok = true;
>> return true;
>>  }
>> diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
>> b/drivers/gpu/drm/i915/intel_sprite.c
>> index 324ccb06397d..293b48007006 100644
>> --- a/drivers/gpu/drm/i915/intel_sprite.c
>> +++ b/drivers/gpu/drm/i915/intel_sprite.c
>> @@ -53,8 +53,8 @@ format_is_yuv(uint32_t format)
>> }
>>  }
>>
>> -static int usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
>> - int usecs)
>> +int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
>> +int usecs)
>>  {
>> /* paranoia */
>> if (!adjusted_mode->crtc_htotal)
>> @@ -91,7 +91,7 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
>> vblank_start = DIV_ROUND_UP(vblank_start, 2);
>>
>> /* FIXME needs to be calibrated sensibly */
>> -   min = vblank_start - usecs_to_scanlines(adjusted_mode, 100);
>> +   min = vblank_start - intel_usecs_to_scanlines(adjusted_mode, 100);
>> max = vblank_start - 1;
>>
>> local_irq_disable();
>> --
>> 2.7.4
>>
>> ___
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>>

Re: [Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

2016-08-08 Thread Ville Syrjälä

On Fri, Aug 05, 2016 at 03:10:51PM -0700, Rodrigo Vivi wrote:
> This patch is blocking PSR on panels that we know that our hardware support.

How do we know that?

> I wonder if:
> 1. This restrictions was for older platforms and spec is out dated
> 2. Or Spec is not documenting the restriction properly

I doubt it. AFAICS the only way that restriction could be lifted is by
adding support for the "Frame Capture Indication" bit in the PSR DPCD
register 0x170. That would cause the panel to wait one extra frame
between receiving the PSR entry indication and capturing the last
active frame. But I see no knob in Bspec that would allow us to tell
the source to send out that one extra active frame.

But maybe I've missed something. Art?

> 3. Or we have some issue with out setup time calculation.

I don't think so. Well, unless the panel is crap and reports a
totally bogus setup time.

I did notice that my SKL RVP stops trying to do PSR with this patch.
The EDID specifies two modes: 3200x1800@60Hz with 146us vblank,
and 3200x1800@48Hz with with ~2.5ms vblank. The setup time is
declared as 330us, so with the default mode we won't use PSR. We
could use the other timings I suppose, but I'm not sure everyone
would be happy with a 48Hz refresh rate. This is really a question
policy that shouldn't be handled in the kernel. What we could do is
expose both 60Hz and 48Hz modes, and let userspace choose the
refresh rate.

> On Tue, May 31, 2016 at 8:50 AM,   wrote:
> > From: Ville Syrjälä 
> >
> > Bspec says:
> > "Restriction : SRD must not be enabled when the PSR Setup time from DPCD
> > 00071h is greater than the time for vertical blank minus one line."
> >
> > Let's check for that and disallow PSR if we exceed the limit.
> >
> > Cc: Daniel Vetter 
> > Reviewed-by: Daniel Vetter 
> > Signed-off-by: Ville Syrjälä 
> > ---
> >  drivers/gpu/drm/i915/intel_drv.h|  2 ++
> >  drivers/gpu/drm/i915/intel_psr.c| 19 ++-
> >  drivers/gpu/drm/i915/intel_sprite.c |  6 +++---
> >  3 files changed, 23 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 9b5f6634c558..56ae3b78e25e 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1672,6 +1672,8 @@ bool intel_sdvo_init(struct drm_device *dev,
> >
> >
> >  /* intel_sprite.c */
> > +int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
> > +int usecs);
> >  int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
> >  int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
> >   struct drm_file *file_priv);
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c 
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 29a09bf6bd18..aacd8d1767f2 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -327,6 +327,9 @@ static bool intel_psr_match_conditions(struct intel_dp 
> > *intel_dp)
> > struct drm_i915_private *dev_priv = dev->dev_private;
> > struct drm_crtc *crtc = dig_port->base.base.crtc;
> > struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> > +   const struct drm_display_mode *adjusted_mode =
> > +   _crtc->config->base.adjusted_mode;
> > +   int psr_setup_time;
> >
> > lockdep_assert_held(_priv->psr.lock);
> > WARN_ON(!drm_modeset_is_locked(>mode_config.connection_mutex));
> > @@ -365,11 +368,25 @@ static bool intel_psr_match_conditions(struct 
> > intel_dp *intel_dp)
> > }
> >
> > if (IS_HASWELL(dev) &&
> > -   intel_crtc->config->base.adjusted_mode.flags & 
> > DRM_MODE_FLAG_INTERLACE) {
> > +   adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
> > DRM_DEBUG_KMS("PSR condition failed: Interlaced is 
> > Enabled\n");
> > return false;
> > }
> >
> > +   psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
> > +   if (psr_setup_time < 0) {
> > +   DRM_DEBUG_KMS("PSR condition failed: Invalid PSR setup time 
> > (0x%02x)\n",
> > + intel_dp->psr_dpcd[1]);
> > +   return false;
> > +   }
> > +
> > +   if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
> > +   adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
> > +   DRM_DEBUG_KMS("PSR condition failed: PSR setup time (%d us) 
> > too long\n",
> > + psr_setup_time);
> > +   return false;
> > +   }
> > +
> > dev_priv->psr.source_ok = true;
> > return true;
> >  }
> > diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
> > b/drivers/gpu/drm/i915/intel_sprite.c
> > index 324ccb06397d..293b48007006 100644

Re: [Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

2016-08-05 Thread Rodrigo Vivi

This patch is blocking PSR on panels that we know that our hardware support.

I wonder if:
1. This restrictions was for older platforms and spec is out dated
2. Or Spec is not documenting the restriction properly
3. Or we have some issue with out setup time calculation.


On Tue, May 31, 2016 at 8:50 AM,   wrote:
> From: Ville Syrjälä 
>
> Bspec says:
> "Restriction : SRD must not be enabled when the PSR Setup time from DPCD
> 00071h is greater than the time for vertical blank minus one line."
>
> Let's check for that and disallow PSR if we exceed the limit.
>
> Cc: Daniel Vetter 
> Reviewed-by: Daniel Vetter 
> Signed-off-by: Ville Syrjälä 
> ---
>  drivers/gpu/drm/i915/intel_drv.h|  2 ++
>  drivers/gpu/drm/i915/intel_psr.c| 19 ++-
>  drivers/gpu/drm/i915/intel_sprite.c |  6 +++---
>  3 files changed, 23 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 9b5f6634c558..56ae3b78e25e 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1672,6 +1672,8 @@ bool intel_sdvo_init(struct drm_device *dev,
>
>
>  /* intel_sprite.c */
> +int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
> +int usecs);
>  int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
>  int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
>   struct drm_file *file_priv);
> diff --git a/drivers/gpu/drm/i915/intel_psr.c 
> b/drivers/gpu/drm/i915/intel_psr.c
> index 29a09bf6bd18..aacd8d1767f2 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -327,6 +327,9 @@ static bool intel_psr_match_conditions(struct intel_dp 
> *intel_dp)
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct drm_crtc *crtc = dig_port->base.base.crtc;
> struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> +   const struct drm_display_mode *adjusted_mode =
> +   _crtc->config->base.adjusted_mode;
> +   int psr_setup_time;
>
> lockdep_assert_held(_priv->psr.lock);
> WARN_ON(!drm_modeset_is_locked(>mode_config.connection_mutex));
> @@ -365,11 +368,25 @@ static bool intel_psr_match_conditions(struct intel_dp 
> *intel_dp)
> }
>
> if (IS_HASWELL(dev) &&
> -   intel_crtc->config->base.adjusted_mode.flags & 
> DRM_MODE_FLAG_INTERLACE) {
> +   adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
> DRM_DEBUG_KMS("PSR condition failed: Interlaced is 
> Enabled\n");
> return false;
> }
>
> +   psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
> +   if (psr_setup_time < 0) {
> +   DRM_DEBUG_KMS("PSR condition failed: Invalid PSR setup time 
> (0x%02x)\n",
> + intel_dp->psr_dpcd[1]);
> +   return false;
> +   }
> +
> +   if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
> +   adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
> +   DRM_DEBUG_KMS("PSR condition failed: PSR setup time (%d us) 
> too long\n",
> + psr_setup_time);
> +   return false;
> +   }
> +
> dev_priv->psr.source_ok = true;
> return true;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
> b/drivers/gpu/drm/i915/intel_sprite.c
> index 324ccb06397d..293b48007006 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -53,8 +53,8 @@ format_is_yuv(uint32_t format)
> }
>  }
>
> -static int usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
> - int usecs)
> +int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
> +int usecs)
>  {
> /* paranoia */
> if (!adjusted_mode->crtc_htotal)
> @@ -91,7 +91,7 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
> vblank_start = DIV_ROUND_UP(vblank_start, 2);
>
> /* FIXME needs to be calibrated sensibly */
> -   min = vblank_start - usecs_to_scanlines(adjusted_mode, 100);
> +   min = vblank_start - intel_usecs_to_scanlines(adjusted_mode, 100);
> max = vblank_start - 1;
>
> local_irq_disable();
> --
> 2.7.4
>
> ___
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

2016-05-31 Thread ville . syrjala

From: Ville Syrjälä 

Bspec says:
"Restriction : SRD must not be enabled when the PSR Setup time from DPCD
00071h is greater than the time for vertical blank minus one line."

Let's check for that and disallow PSR if we exceed the limit.

Cc: Daniel Vetter 
Reviewed-by: Daniel Vetter 
Signed-off-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/intel_drv.h|  2 ++
 drivers/gpu/drm/i915/intel_psr.c| 19 ++-
 drivers/gpu/drm/i915/intel_sprite.c |  6 +++---
 3 files changed, 23 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 9b5f6634c558..56ae3b78e25e 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1672,6 +1672,8 @@ bool intel_sdvo_init(struct drm_device *dev,
 
 
 /* intel_sprite.c */
+int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
+int usecs);
 int intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane);
 int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
  struct drm_file *file_priv);
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 29a09bf6bd18..aacd8d1767f2 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -327,6 +327,9 @@ static bool intel_psr_match_conditions(struct intel_dp 
*intel_dp)
struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_crtc *crtc = dig_port->base.base.crtc;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
+   const struct drm_display_mode *adjusted_mode =
+   _crtc->config->base.adjusted_mode;
+   int psr_setup_time;
 
lockdep_assert_held(_priv->psr.lock);
WARN_ON(!drm_modeset_is_locked(>mode_config.connection_mutex));
@@ -365,11 +368,25 @@ static bool intel_psr_match_conditions(struct intel_dp 
*intel_dp)
}
 
if (IS_HASWELL(dev) &&
-   intel_crtc->config->base.adjusted_mode.flags & 
DRM_MODE_FLAG_INTERLACE) {
+   adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
DRM_DEBUG_KMS("PSR condition failed: Interlaced is Enabled\n");
return false;
}
 
+   psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
+   if (psr_setup_time < 0) {
+   DRM_DEBUG_KMS("PSR condition failed: Invalid PSR setup time 
(0x%02x)\n",
+ intel_dp->psr_dpcd[1]);
+   return false;
+   }
+
+   if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
+   adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
+   DRM_DEBUG_KMS("PSR condition failed: PSR setup time (%d us) too 
long\n",
+ psr_setup_time);
+   return false;
+   }
+
dev_priv->psr.source_ok = true;
return true;
 }
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index 324ccb06397d..293b48007006 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -53,8 +53,8 @@ format_is_yuv(uint32_t format)
}
 }
 
-static int usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
- int usecs)
+int intel_usecs_to_scanlines(const struct drm_display_mode *adjusted_mode,
+int usecs)
 {
/* paranoia */
if (!adjusted_mode->crtc_htotal)
@@ -91,7 +91,7 @@ void intel_pipe_update_start(struct intel_crtc *crtc)
vblank_start = DIV_ROUND_UP(vblank_start, 2);
 
/* FIXME needs to be calibrated sensibly */
-   min = vblank_start - usecs_to_scanlines(adjusted_mode, 100);
+   min = vblank_start - intel_usecs_to_scanlines(adjusted_mode, 100);
max = vblank_start - 1;
 
local_irq_disable();
-- 
2.7.4

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Re: [Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

Re: [Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

Re: [Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

Re: [Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

[Intel-gfx] [PATCH 3/6] drm/i915: Check PSR setup time vs. vblank length

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