Re: [Intel-gfx] [PATCH 4/4] drm/i915: Add support for CCS modifiers

2017-07-24 Thread kbuild test robot
Hi Ben,

[auto build test ERROR on drm/drm-next]
[also build test ERROR on v4.13-rc2 next-20170724]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improve the system]

url:
https://github.com/0day-ci/linux/commits/Ben-Widawsky/drm-Plumb-modifiers-through-plane-init/20170725-062539
base:   git://people.freedesktop.org/~airlied/linux.git drm-next
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64 

All error/warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/intel_display.c:105:2: error: 
>> 'I915_FORMAT_MOD_Yf_TILED_CCS' undeclared here (not in a function)
 I915_FORMAT_MOD_Yf_TILED_CCS,
 ^~~~
>> drivers/gpu/drm/i915/intel_display.c:106:2: error: 
>> 'I915_FORMAT_MOD_Y_TILED_CCS' undeclared here (not in a function)
 I915_FORMAT_MOD_Y_TILED_CCS,
 ^~~
   drivers/gpu/drm/i915/intel_display.c: In function 'skl_mod_supported':
>> drivers/gpu/drm/i915/intel_display.c:13642:16: warning: comparison between 
>> pointer and integer
  if (modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
   ^~
   drivers/gpu/drm/i915/intel_display.c:13643:16: warning: comparison between 
pointer and integer
  modifier == I915_FORMAT_MOD_Y_TILED_CCS)
   ^~
--
>> drivers/gpu/drm/i915/intel_sprite.c:1092:2: error: 
>> 'I915_FORMAT_MOD_Yf_TILED_CCS' undeclared here (not in a function)
 I915_FORMAT_MOD_Yf_TILED_CCS,
 ^~~~
>> drivers/gpu/drm/i915/intel_sprite.c:1093:2: error: 
>> 'I915_FORMAT_MOD_Y_TILED_CCS' undeclared here (not in a function)
 I915_FORMAT_MOD_Y_TILED_CCS,
 ^~~

vim +/I915_FORMAT_MOD_Yf_TILED_CCS +105 drivers/gpu/drm/i915/intel_display.c

   103  
   104  static const uint64_t skl_format_modifiers_ccs[] = {
 > 105  I915_FORMAT_MOD_Yf_TILED_CCS,
 > 106  I915_FORMAT_MOD_Y_TILED_CCS,
   107  I915_FORMAT_MOD_Yf_TILED,
   108  I915_FORMAT_MOD_Y_TILED,
   109  I915_FORMAT_MOD_X_TILED,
   110  DRM_FORMAT_MOD_LINEAR,
   111  DRM_FORMAT_MOD_INVALID
   112  };
   113  

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: application/gzip
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[Intel-gfx] [PATCH 4/4] drm/i915: Add support for CCS modifiers

2017-07-23 Thread Ben Widawsky
v2:
Support sprite plane.
Support pipe C/D limitation on GEN9.

v3:
Rename structure (Ville)
Handle GLK (Ville)

This requires rebase on the correct Ville patches

Cc: Daniel Stone 
Cc: Kristian Høgsberg 
Signed-off-by: Ben Widawsky 
---
 drivers/gpu/drm/i915/intel_display.c | 30 +++---
 drivers/gpu/drm/i915/intel_sprite.c  | 25 -
 2 files changed, 51 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 34c37f82acb2..44747ed9ee38 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -88,7 +88,17 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_VYUY,
 };
 
-static const uint64_t skl_format_modifiers[] = {
+static const uint64_t skl_format_modifiers_noccs[] = {
+   I915_FORMAT_MOD_Yf_TILED,
+   I915_FORMAT_MOD_Y_TILED,
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
+static const uint64_t skl_format_modifiers_ccs[] = {
+   I915_FORMAT_MOD_Yf_TILED_CCS,
+   I915_FORMAT_MOD_Y_TILED_CCS,
I915_FORMAT_MOD_Yf_TILED,
I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_X_TILED,
@@ -12862,6 +12872,10 @@ static bool skl_mod_supported(uint32_t format, 
uint64_t modifier)
case DRM_FORMAT_XBGR:
case DRM_FORMAT_ARGB:
case DRM_FORMAT_ABGR:
+   if (modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
+   modifier == I915_FORMAT_MOD_Y_TILED_CCS)
+   return true;
+   /* fall through */
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
@@ -13108,10 +13122,20 @@ intel_primary_plane_create(struct drm_i915_private 
*dev_priv, enum pipe pipe)
primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
primary->check_plane = intel_check_primary_plane;
 
-   if (INTEL_GEN(dev_priv) >= 9) {
+   if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
+   intel_primary_formats = skl_primary_formats;
+   num_formats = ARRAY_SIZE(skl_primary_formats);
+   modifiers = skl_format_modifiers_ccs;
+
+   primary->update_plane = skylake_update_primary_plane;
+   primary->disable_plane = skylake_disable_primary_plane;
+   } else if (INTEL_GEN(dev_priv) >= 9) {
intel_primary_formats = skl_primary_formats;
num_formats = ARRAY_SIZE(skl_primary_formats);
-   modifiers = skl_format_modifiers;
+   if (pipe >= PIPE_C)
+   modifiers = skl_format_modifiers_ccs;
+   else
+   modifiers = skl_format_modifiers_noccs;
 
primary->update_plane = skylake_update_primary_plane;
primary->disable_plane = skylake_disable_primary_plane;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index 05a15063ee97..97d29cc061ad 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1079,7 +1079,17 @@ static uint32_t skl_plane_formats[] = {
DRM_FORMAT_VYUY,
 };
 
+static const uint64_t skl_plane_format_modifiers_noccs[] = {
+   I915_FORMAT_MOD_Yf_TILED,
+   I915_FORMAT_MOD_Y_TILED,
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 static const uint64_t skl_plane_format_modifiers[] = {
+   I915_FORMAT_MOD_Yf_TILED_CCS,
+   I915_FORMAT_MOD_Y_TILED_CCS,
I915_FORMAT_MOD_Yf_TILED,
I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_X_TILED,
@@ -1224,7 +1234,7 @@ intel_sprite_plane_create(struct drm_i915_private 
*dev_priv,
}
intel_plane->base.state = &state->base;
 
-   if (INTEL_GEN(dev_priv) >= 9) {
+   if (INTEL_GEN(dev_priv) >= 10) {
intel_plane->can_scale = true;
state->scaler_id = -1;
 
@@ -1234,6 +1244,19 @@ intel_sprite_plane_create(struct drm_i915_private 
*dev_priv,
plane_formats = skl_plane_formats;
num_plane_formats = ARRAY_SIZE(skl_plane_formats);
modifiers = skl_plane_format_modifiers;
+   } else if (INTEL_GEN(dev_priv) >= 9) {
+   intel_plane->can_scale = true;
+   state->scaler_id = -1;
+
+   intel_plane->update_plane = skl_update_plane;
+   intel_plane->disable_plane = skl_disable_plane;
+
+   plane_formats = skl_plane_formats;
+   num_plane_formats = ARRAY_SIZE(skl_plane_formats);
+   if (pipe >= PIPE_C)
+   modifiers = skl_plane_format_modifiers_noccs;
+   else
+   modifiers = skl_plane_format_modifiers;
} else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
intel_plane->can_scale = false;
i

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Add support for CCS modifiers

2017-07-21 Thread Ben Widawsky

On 17-06-29 23:02:08, Ville Syrjälä wrote:

On Fri, Jun 23, 2017 at 09:45:44AM -0700, Ben Widawsky wrote:

v2:
Support sprite plane.
Support pipe C/D limitation on GEN9.

This requires rebase on the correct Ville patches

Cc: Daniel Stone 
Cc: Kristian Høgsberg 
Signed-off-by: Ben Widawsky 
---
 drivers/gpu/drm/i915/intel_display.c | 34 +--
 drivers/gpu/drm/i915/intel_sprite.c  | 39 +++-
 2 files changed, 66 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 877a51514c61..2a0e5cd26059 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -93,7 +93,17 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_VYUY,
 };

+static const uint64_t skl_format_modifiers_noccs[] = {
+   I915_FORMAT_MOD_Yf_TILED,
+   I915_FORMAT_MOD_Y_TILED,
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 static const uint64_t skl_format_modifiers[] = {


Maybe calls this _ccs[] then?


+   I915_FORMAT_MOD_Yf_TILED_CCS,
+   I915_FORMAT_MOD_Y_TILED_CCS,
I915_FORMAT_MOD_Yf_TILED,
I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_X_TILED,
@@ -13872,17 +13882,13 @@ static bool skl_mod_supported(uint32_t format, 
uint64_t modifier)
return false;
}
case DRM_FORMAT_RGB565:
-   case DRM_FORMAT_XRGB:
-   case DRM_FORMAT_XBGR:
-   case DRM_FORMAT_ARGB:
-   case DRM_FORMAT_ABGR:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
-   /* All i915 modifiers are fine */
+   /* All non-ccs i915 modifiers are fine */
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
case I915_FORMAT_MOD_X_TILED:
@@ -13892,6 +13898,12 @@ static bool skl_mod_supported(uint32_t format, 
uint64_t modifier)
default:
return false;
}
+   case DRM_FORMAT_XRGB:
+   case DRM_FORMAT_XBGR:
+   case DRM_FORMAT_ARGB:
+   case DRM_FORMAT_ABGR:
+   /* All i915 modifiers are fine */
+   return true;
default:
return false;
}
@@ -14123,13 +14135,23 @@ intel_primary_plane_create(struct drm_i915_private 
*dev_priv, enum pipe pipe)
primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
primary->check_plane = intel_check_primary_plane;

-   if (INTEL_GEN(dev_priv) >= 9) {
+   if (INTEL_GEN(dev_priv) >= 10) {
intel_primary_formats = skl_primary_formats;
num_formats = ARRAY_SIZE(skl_primary_formats);
intel_format_modifiers = skl_format_modifiers;

primary->update_plane = skylake_update_primary_plane;
primary->disable_plane = skylake_disable_primary_plane;
+   } else if (INTEL_GEN(dev_priv) >= 9) {
+   intel_primary_formats = skl_primary_formats;
+   num_formats = ARRAY_SIZE(skl_primary_formats);
+   if (pipe >= PIPE_C)


I think I'd keep the gen10 stuff in the same branch still. Also this
misses GLK. So maybe something like this:

if (GEN >= 10 || IS_GLK || pipe != PIPE_C)



I'd really like to keep the pipe C limitation in the gen9 block, but yes, it was
missing GLK. (Patches were originally written before GLK, I believe) Thanks for
catching that.

I really suspect we're going to need to split display version out of INTEL_GEN.
Maybe you guys are already doing this.

I'm fine with ccs rename, and you were right in the previous patch about how
reorganizing made this diff nicer.

+   intel_format_modifiers = skl_format_modifiers;
+   else
+   intel_format_modifiers = skl_format_modifiers_noccs;
+
+   primary->update_plane = skylake_update_primary_plane;
+   primary->disable_plane = skylake_disable_primary_plane;
} else if (INTEL_GEN(dev_priv) >= 4) {
intel_primary_formats = i965_primary_formats;
num_formats = ARRAY_SIZE(i965_primary_formats);
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index e80834cb1f4c..de4454a8ef9e 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1085,7 +1085,17 @@ static uint32_t skl_plane_formats[] = {
DRM_FORMAT_VYUY,
 };

+static const uint64_t skl_plane_format_modifiers_noccs[] = {
+   I915_FORMAT_MOD_Yf_TILED,
+   I915_FORMAT_MOD_Y_TILED,
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 static const uint64_t skl_plane_format_modifiers[] = {


Again _ccs

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Add support for CCS modifiers

2017-06-29 Thread Ville Syrjälä
On Fri, Jun 23, 2017 at 09:45:44AM -0700, Ben Widawsky wrote:
> v2:
> Support sprite plane.
> Support pipe C/D limitation on GEN9.
> 
> This requires rebase on the correct Ville patches
> 
> Cc: Daniel Stone 
> Cc: Kristian Høgsberg 
> Signed-off-by: Ben Widawsky 
> ---
>  drivers/gpu/drm/i915/intel_display.c | 34 +--
>  drivers/gpu/drm/i915/intel_sprite.c  | 39 
> +++-
>  2 files changed, 66 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 877a51514c61..2a0e5cd26059 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -93,7 +93,17 @@ static const uint32_t skl_primary_formats[] = {
>   DRM_FORMAT_VYUY,
>  };
>  
> +static const uint64_t skl_format_modifiers_noccs[] = {
> + I915_FORMAT_MOD_Yf_TILED,
> + I915_FORMAT_MOD_Y_TILED,
> + I915_FORMAT_MOD_X_TILED,
> + DRM_FORMAT_MOD_LINEAR,
> + DRM_FORMAT_MOD_INVALID
> +};
> +
>  static const uint64_t skl_format_modifiers[] = {

Maybe calls this _ccs[] then?

> + I915_FORMAT_MOD_Yf_TILED_CCS,
> + I915_FORMAT_MOD_Y_TILED_CCS,
>   I915_FORMAT_MOD_Yf_TILED,
>   I915_FORMAT_MOD_Y_TILED,
>   I915_FORMAT_MOD_X_TILED,
> @@ -13872,17 +13882,13 @@ static bool skl_mod_supported(uint32_t format, 
> uint64_t modifier)
>   return false;
>   }
>   case DRM_FORMAT_RGB565:
> - case DRM_FORMAT_XRGB:
> - case DRM_FORMAT_XBGR:
> - case DRM_FORMAT_ARGB:
> - case DRM_FORMAT_ABGR:
>   case DRM_FORMAT_XRGB2101010:
>   case DRM_FORMAT_XBGR2101010:
>   case DRM_FORMAT_YUYV:
>   case DRM_FORMAT_YVYU:
>   case DRM_FORMAT_UYVY:
>   case DRM_FORMAT_VYUY:
> - /* All i915 modifiers are fine */
> + /* All non-ccs i915 modifiers are fine */
>   switch (modifier) {
>   case DRM_FORMAT_MOD_LINEAR:
>   case I915_FORMAT_MOD_X_TILED:
> @@ -13892,6 +13898,12 @@ static bool skl_mod_supported(uint32_t format, 
> uint64_t modifier)
>   default:
>   return false;
>   }
> + case DRM_FORMAT_XRGB:
> + case DRM_FORMAT_XBGR:
> + case DRM_FORMAT_ARGB:
> + case DRM_FORMAT_ABGR:
> + /* All i915 modifiers are fine */
> + return true;
>   default:
>   return false;
>   }
> @@ -14123,13 +14135,23 @@ intel_primary_plane_create(struct drm_i915_private 
> *dev_priv, enum pipe pipe)
>   primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
>   primary->check_plane = intel_check_primary_plane;
>  
> - if (INTEL_GEN(dev_priv) >= 9) {
> + if (INTEL_GEN(dev_priv) >= 10) {
>   intel_primary_formats = skl_primary_formats;
>   num_formats = ARRAY_SIZE(skl_primary_formats);
>   intel_format_modifiers = skl_format_modifiers;
>  
>   primary->update_plane = skylake_update_primary_plane;
>   primary->disable_plane = skylake_disable_primary_plane;
> + } else if (INTEL_GEN(dev_priv) >= 9) {
> + intel_primary_formats = skl_primary_formats;
> + num_formats = ARRAY_SIZE(skl_primary_formats);
> + if (pipe >= PIPE_C)

I think I'd keep the gen10 stuff in the same branch still. Also this
misses GLK. So maybe something like this:

if (GEN >= 10 || IS_GLK || pipe != PIPE_C)

> + intel_format_modifiers = skl_format_modifiers;
> + else
> + intel_format_modifiers = skl_format_modifiers_noccs;
> +
> + primary->update_plane = skylake_update_primary_plane;
> + primary->disable_plane = skylake_disable_primary_plane;
>   } else if (INTEL_GEN(dev_priv) >= 4) {
>   intel_primary_formats = i965_primary_formats;
>   num_formats = ARRAY_SIZE(i965_primary_formats);
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
> b/drivers/gpu/drm/i915/intel_sprite.c
> index e80834cb1f4c..de4454a8ef9e 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -1085,7 +1085,17 @@ static uint32_t skl_plane_formats[] = {
>   DRM_FORMAT_VYUY,
>  };
>  
> +static const uint64_t skl_plane_format_modifiers_noccs[] = {
> + I915_FORMAT_MOD_Yf_TILED,
> + I915_FORMAT_MOD_Y_TILED,
> + I915_FORMAT_MOD_X_TILED,
> + DRM_FORMAT_MOD_LINEAR,
> + DRM_FORMAT_MOD_INVALID
> +};
> +
>  static const uint64_t skl_plane_format_modifiers[] = {

Again _ccs[] maybe?

> + I915_FORMAT_MOD_Yf_TILED_CCS,
> + I915_FORMAT_MOD_Y_TILED_CCS,
>   I915_FORMAT_MOD_Yf_TILED,
>   I915_FORMAT_MOD_Y_TILED,
>   I915_FORMAT_MOD_X_TILED,
> @@ -1108,6 +1118,20 @@ static bool 
> intel_sprite_plane_format_mod_supported(struct drm_plane *plane,
>   modifier != DRM_FORMAT_MOD_LINEAR)
>   return 

[Intel-gfx] [PATCH 4/4] drm/i915: Add support for CCS modifiers

2017-06-23 Thread Ben Widawsky
v2:
Support sprite plane.
Support pipe C/D limitation on GEN9.

This requires rebase on the correct Ville patches

Cc: Daniel Stone 
Cc: Kristian Høgsberg 
Signed-off-by: Ben Widawsky 
---
 drivers/gpu/drm/i915/intel_display.c | 34 +--
 drivers/gpu/drm/i915/intel_sprite.c  | 39 +++-
 2 files changed, 66 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 877a51514c61..2a0e5cd26059 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -93,7 +93,17 @@ static const uint32_t skl_primary_formats[] = {
DRM_FORMAT_VYUY,
 };
 
+static const uint64_t skl_format_modifiers_noccs[] = {
+   I915_FORMAT_MOD_Yf_TILED,
+   I915_FORMAT_MOD_Y_TILED,
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 static const uint64_t skl_format_modifiers[] = {
+   I915_FORMAT_MOD_Yf_TILED_CCS,
+   I915_FORMAT_MOD_Y_TILED_CCS,
I915_FORMAT_MOD_Yf_TILED,
I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_X_TILED,
@@ -13872,17 +13882,13 @@ static bool skl_mod_supported(uint32_t format, 
uint64_t modifier)
return false;
}
case DRM_FORMAT_RGB565:
-   case DRM_FORMAT_XRGB:
-   case DRM_FORMAT_XBGR:
-   case DRM_FORMAT_ARGB:
-   case DRM_FORMAT_ABGR:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
case DRM_FORMAT_VYUY:
-   /* All i915 modifiers are fine */
+   /* All non-ccs i915 modifiers are fine */
switch (modifier) {
case DRM_FORMAT_MOD_LINEAR:
case I915_FORMAT_MOD_X_TILED:
@@ -13892,6 +13898,12 @@ static bool skl_mod_supported(uint32_t format, 
uint64_t modifier)
default:
return false;
}
+   case DRM_FORMAT_XRGB:
+   case DRM_FORMAT_XBGR:
+   case DRM_FORMAT_ARGB:
+   case DRM_FORMAT_ABGR:
+   /* All i915 modifiers are fine */
+   return true;
default:
return false;
}
@@ -14123,13 +14135,23 @@ intel_primary_plane_create(struct drm_i915_private 
*dev_priv, enum pipe pipe)
primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
primary->check_plane = intel_check_primary_plane;
 
-   if (INTEL_GEN(dev_priv) >= 9) {
+   if (INTEL_GEN(dev_priv) >= 10) {
intel_primary_formats = skl_primary_formats;
num_formats = ARRAY_SIZE(skl_primary_formats);
intel_format_modifiers = skl_format_modifiers;
 
primary->update_plane = skylake_update_primary_plane;
primary->disable_plane = skylake_disable_primary_plane;
+   } else if (INTEL_GEN(dev_priv) >= 9) {
+   intel_primary_formats = skl_primary_formats;
+   num_formats = ARRAY_SIZE(skl_primary_formats);
+   if (pipe >= PIPE_C)
+   intel_format_modifiers = skl_format_modifiers;
+   else
+   intel_format_modifiers = skl_format_modifiers_noccs;
+
+   primary->update_plane = skylake_update_primary_plane;
+   primary->disable_plane = skylake_disable_primary_plane;
} else if (INTEL_GEN(dev_priv) >= 4) {
intel_primary_formats = i965_primary_formats;
num_formats = ARRAY_SIZE(i965_primary_formats);
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index e80834cb1f4c..de4454a8ef9e 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -1085,7 +1085,17 @@ static uint32_t skl_plane_formats[] = {
DRM_FORMAT_VYUY,
 };
 
+static const uint64_t skl_plane_format_modifiers_noccs[] = {
+   I915_FORMAT_MOD_Yf_TILED,
+   I915_FORMAT_MOD_Y_TILED,
+   I915_FORMAT_MOD_X_TILED,
+   DRM_FORMAT_MOD_LINEAR,
+   DRM_FORMAT_MOD_INVALID
+};
+
 static const uint64_t skl_plane_format_modifiers[] = {
+   I915_FORMAT_MOD_Yf_TILED_CCS,
+   I915_FORMAT_MOD_Y_TILED_CCS,
I915_FORMAT_MOD_Yf_TILED,
I915_FORMAT_MOD_Y_TILED,
I915_FORMAT_MOD_X_TILED,
@@ -1108,6 +1118,20 @@ static bool 
intel_sprite_plane_format_mod_supported(struct drm_plane *plane,
modifier != DRM_FORMAT_MOD_LINEAR)
return false;
 
+   switch (modifier) {
+   case I915_FORMAT_MOD_Yf_TILED_CCS:
+   case I915_FORMAT_MOD_Y_TILED_CCS:
+   switch (format) {
+   case DRM_FORMAT_ABGR:
+   case DRM_FORMAT_ARGB:
+   case DRM_FORMAT_XBGR:
+   case DRM_FORMAT_XRGB:
+   return true;
+