Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Tue, Mar 21, 2023 at 6:24 AM Jonas Ådahl wrote: > > On Fri, Mar 17, 2023 at 08:59:48AM -0700, Rob Clark wrote: > > On Fri, Mar 17, 2023 at 3:23 AM Jonas Ådahl wrote: > > > > > > On Thu, Mar 16, 2023 at 09:28:55AM -0700, Rob Clark wrote: > > > > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: > > > > > > > > > > On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > > > > > > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl > > > > > > wrote: > > > > > > > > > > > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > > > > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl > > > > > > > > wrote: > > > > > > > > > > > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > > > > > > From: Rob Clark > > > > > > > > > > > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming > > > > > > > > > > deadline, such as > > > > > > > > > > vblank, which the fence waiter would prefer not to miss. > > > > > > > > > > This is to aid > > > > > > > > > > the fence signaler in making power management decisions, > > > > > > > > > > like boosting > > > > > > > > > > frequency as the deadline approaches and awareness of > > > > > > > > > > missing deadlines > > > > > > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter > > > > > > > > > > duplicate > > > > > > > > > > deadlines, to avoid increasing dma_fence size. The > > > > > > > > > > fence-context > > > > > > > > > > implementation will need similar logic to track > > > > > > > > > > deadlines of all > > > > > > > > > > the fences on the same timeline. [ckoenig] > > > > > > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > > > > > > v4: Clarify in docs comment that this is a hint > > > > > > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > > > > > > v6: More docs > > > > > > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > > > > > > > > > > > Signed-off-by: Rob Clark > > > > > > > > > > Reviewed-by: Christian König > > > > > > > > > > Acked-by: Pekka Paalanen > > > > > > > > > > Reviewed-by: Bagas Sanjaya > > > > > > > > > > --- > > > > > > > > > > > > > > > > > > Hi Rob! > > > > > > > > > > > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > > > :doc: fence signalling annotation > > > > > > > > > > > > > > > > > > > > +DMA Fence Deadline Hints > > > > > > > > > > + > > > > > > > > > > + > > > > > > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > > > + :doc: deadline hints > > > > > > > > > > + > > > > > > > > > > DMA Fences Functions Reference > > > > > > > > > > ~~ > > > > > > > > > > > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c > > > > > > > > > > b/drivers/dma-buf/dma-fence.c > > > > > > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct > > > > > > > > > > dma_fence **fences, uint32_t count, > > > > > > > > > > } > > > > > > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > > > > > > > > > > > +/** > > > > > > > > > > + * DOC: deadline hints > > > > > > > > > > + * > > > > > > > > > > + * In an ideal world, it would be possible to pipeline a > > > > > > > > > > workload sufficiently > > > > > > > > > > + * that a utilization based device frequency governor > > > > > > > > > > could arrive at a minimum > > > > > > > > > > + * frequency that meets the requirements of the use-case, > > > > > > > > > > in order to minimize > > > > > > > > > > + * power consumption. But in the real world there are > > > > > > > > > > many workloads which > > > > > > > > > > + * defy this ideal. For example, but not limited to: > > > > > > > > > > + * > > > > > > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > > > > > > alternating periods > > > > > > > > > > + * of CPU waiting for device, and device waiting on CPU. > > > > > > > > > > This can result in > > > > > > > > > > +
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Fri, Mar 17, 2023 at 08:59:48AM -0700, Rob Clark wrote: > On Fri, Mar 17, 2023 at 3:23 AM Jonas Ådahl wrote: > > > > On Thu, Mar 16, 2023 at 09:28:55AM -0700, Rob Clark wrote: > > > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: > > > > > > > > On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > > > > > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > > > > > > > > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > > > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl > > > > > > > wrote: > > > > > > > > > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > > > > > From: Rob Clark > > > > > > > > > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming > > > > > > > > > deadline, such as > > > > > > > > > vblank, which the fence waiter would prefer not to miss. > > > > > > > > > This is to aid > > > > > > > > > the fence signaler in making power management decisions, like > > > > > > > > > boosting > > > > > > > > > frequency as the deadline approaches and awareness of missing > > > > > > > > > deadlines > > > > > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter > > > > > > > > > duplicate > > > > > > > > > deadlines, to avoid increasing dma_fence size. The > > > > > > > > > fence-context > > > > > > > > > implementation will need similar logic to track deadlines > > > > > > > > > of all > > > > > > > > > the fences on the same timeline. [ckoenig] > > > > > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > > > > > v4: Clarify in docs comment that this is a hint > > > > > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > > > > > v6: More docs > > > > > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > > > > > > > > > Signed-off-by: Rob Clark > > > > > > > > > Reviewed-by: Christian König > > > > > > > > > Acked-by: Pekka Paalanen > > > > > > > > > Reviewed-by: Bagas Sanjaya > > > > > > > > > --- > > > > > > > > > > > > > > > > Hi Rob! > > > > > > > > > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > > :doc: fence signalling annotation > > > > > > > > > > > > > > > > > > +DMA Fence Deadline Hints > > > > > > > > > + > > > > > > > > > + > > > > > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > > + :doc: deadline hints > > > > > > > > > + > > > > > > > > > DMA Fences Functions Reference > > > > > > > > > ~~ > > > > > > > > > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c > > > > > > > > > b/drivers/dma-buf/dma-fence.c > > > > > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct > > > > > > > > > dma_fence **fences, uint32_t count, > > > > > > > > > } > > > > > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > > > > > > > > > +/** > > > > > > > > > + * DOC: deadline hints > > > > > > > > > + * > > > > > > > > > + * In an ideal world, it would be possible to pipeline a > > > > > > > > > workload sufficiently > > > > > > > > > + * that a utilization based device frequency governor could > > > > > > > > > arrive at a minimum > > > > > > > > > + * frequency that meets the requirements of the use-case, in > > > > > > > > > order to minimize > > > > > > > > > + * power consumption. But in the real world there are many > > > > > > > > > workloads which > > > > > > > > > + * defy this ideal. For example, but not limited to: > > > > > > > > > + * > > > > > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > > > > > alternating periods > > > > > > > > > + * of CPU waiting for device, and device waiting on CPU. > > > > > > > > > This can result in > > > > > > > > > + * devfreq and cpufreq seeing idle time in their > > > > > > > > > respective domains and in > > > > > > > > > + * result reduce frequency. > > > > > > > > > + * > > > > > > > > > + * * Workloads that interact with a periodic time based > > > > > > > > > deadl
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Fri, Mar 17, 2023 at 3:23 AM Jonas Ådahl wrote: > > On Thu, Mar 16, 2023 at 09:28:55AM -0700, Rob Clark wrote: > > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: > > > > > > On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > > > > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > > > > > > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl > > > > > > wrote: > > > > > > > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > > > > From: Rob Clark > > > > > > > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming > > > > > > > > deadline, such as > > > > > > > > vblank, which the fence waiter would prefer not to miss. This > > > > > > > > is to aid > > > > > > > > the fence signaler in making power management decisions, like > > > > > > > > boosting > > > > > > > > frequency as the deadline approaches and awareness of missing > > > > > > > > deadlines > > > > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter > > > > > > > > duplicate > > > > > > > > deadlines, to avoid increasing dma_fence size. The > > > > > > > > fence-context > > > > > > > > implementation will need similar logic to track deadlines > > > > > > > > of all > > > > > > > > the fences on the same timeline. [ckoenig] > > > > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > > > > v4: Clarify in docs comment that this is a hint > > > > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > > > > v6: More docs > > > > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > > > > > > > Signed-off-by: Rob Clark > > > > > > > > Reviewed-by: Christian König > > > > > > > > Acked-by: Pekka Paalanen > > > > > > > > Reviewed-by: Bagas Sanjaya > > > > > > > > --- > > > > > > > > > > > > > > Hi Rob! > > > > > > > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > :doc: fence signalling annotation > > > > > > > > > > > > > > > > +DMA Fence Deadline Hints > > > > > > > > + > > > > > > > > + > > > > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > + :doc: deadline hints > > > > > > > > + > > > > > > > > DMA Fences Functions Reference > > > > > > > > ~~ > > > > > > > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c > > > > > > > > b/drivers/dma-buf/dma-fence.c > > > > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct > > > > > > > > dma_fence **fences, uint32_t count, > > > > > > > > } > > > > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > > > > > > > +/** > > > > > > > > + * DOC: deadline hints > > > > > > > > + * > > > > > > > > + * In an ideal world, it would be possible to pipeline a > > > > > > > > workload sufficiently > > > > > > > > + * that a utilization based device frequency governor could > > > > > > > > arrive at a minimum > > > > > > > > + * frequency that meets the requirements of the use-case, in > > > > > > > > order to minimize > > > > > > > > + * power consumption. But in the real world there are many > > > > > > > > workloads which > > > > > > > > + * defy this ideal. For example, but not limited to: > > > > > > > > + * > > > > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > > > > alternating periods > > > > > > > > + * of CPU waiting for device, and device waiting on CPU. > > > > > > > > This can result in > > > > > > > > + * devfreq and cpufreq seeing idle time in their respective > > > > > > > > domains and in > > > > > > > > + * result reduce frequency. > > > > > > > > + * > > > > > > > > + * * Workloads that interact with a periodic time based > > > > > > > > deadline, such as double > > > > > > > > + * buffered GPU rendering vs vblank sync'd page flipping. > > > > > > > > In this scenario, > > > > > > > > + * missing a vblank deadline results in an *increase* in > > > > > > > > idle time on the GPU > > > > > > > > +
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Thu, Mar 16, 2023 at 11:59 PM Rob Clark wrote: > > On Thu, Mar 16, 2023 at 3:22 PM Sebastian Wick > wrote: > > > > On Thu, Mar 16, 2023 at 5:29 PM Rob Clark wrote: > > > > > > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: > > > > > > > > On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > > > > > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > > > > > > > > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > > > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl > > > > > > > wrote: > > > > > > > > > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > > > > > From: Rob Clark > > > > > > > > > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming > > > > > > > > > deadline, such as > > > > > > > > > vblank, which the fence waiter would prefer not to miss. > > > > > > > > > This is to aid > > > > > > > > > the fence signaler in making power management decisions, like > > > > > > > > > boosting > > > > > > > > > frequency as the deadline approaches and awareness of missing > > > > > > > > > deadlines > > > > > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter > > > > > > > > > duplicate > > > > > > > > > deadlines, to avoid increasing dma_fence size. The > > > > > > > > > fence-context > > > > > > > > > implementation will need similar logic to track deadlines > > > > > > > > > of all > > > > > > > > > the fences on the same timeline. [ckoenig] > > > > > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > > > > > v4: Clarify in docs comment that this is a hint > > > > > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > > > > > v6: More docs > > > > > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > > > > > > > > > Signed-off-by: Rob Clark > > > > > > > > > Reviewed-by: Christian König > > > > > > > > > Acked-by: Pekka Paalanen > > > > > > > > > Reviewed-by: Bagas Sanjaya > > > > > > > > > --- > > > > > > > > > > > > > > > > Hi Rob! > > > > > > > > > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > > :doc: fence signalling annotation > > > > > > > > > > > > > > > > > > +DMA Fence Deadline Hints > > > > > > > > > + > > > > > > > > > + > > > > > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > > + :doc: deadline hints > > > > > > > > > + > > > > > > > > > DMA Fences Functions Reference > > > > > > > > > ~~ > > > > > > > > > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c > > > > > > > > > b/drivers/dma-buf/dma-fence.c > > > > > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct > > > > > > > > > dma_fence **fences, uint32_t count, > > > > > > > > > } > > > > > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > > > > > > > > > +/** > > > > > > > > > + * DOC: deadline hints > > > > > > > > > + * > > > > > > > > > + * In an ideal world, it would be possible to pipeline a > > > > > > > > > workload sufficiently > > > > > > > > > + * that a utilization based device frequency governor could > > > > > > > > > arrive at a minimum > > > > > > > > > + * frequency that meets the requirements of the use-case, in > > > > > > > > > order to minimize > > > > > > > > > + * power consumption. But in the real world there are many > > > > > > > > > workloads which > > > > > > > > > + * defy this ideal. For example, but not limited to: > > > > > > > > > + * > > > > > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > > > > > alternating periods > > > > > > > > > + * of CPU waiting for device, and device waiting on CPU. > > > > > > > > > This can result in > > > > > > > > > + * devfreq and cpufreq seeing idle time in their > > > > > > > > > respective domains and in > > > > > > > > > + * result reduce frequency. > > > > > > > > > + * > > > > > > > > > + * * Workloads that interact with a periodic time based > > > > > > > > > deadline,
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Thu, Mar 16, 2023 at 09:28:55AM -0700, Rob Clark wrote: > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: > > > > On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > > > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > > > > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote: > > > > > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > > > From: Rob Clark > > > > > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming deadline, > > > > > > > such as > > > > > > > vblank, which the fence waiter would prefer not to miss. This is > > > > > > > to aid > > > > > > > the fence signaler in making power management decisions, like > > > > > > > boosting > > > > > > > frequency as the deadline approaches and awareness of missing > > > > > > > deadlines > > > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter duplicate > > > > > > > deadlines, to avoid increasing dma_fence size. The > > > > > > > fence-context > > > > > > > implementation will need similar logic to track deadlines of > > > > > > > all > > > > > > > the fences on the same timeline. [ckoenig] > > > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > > > v4: Clarify in docs comment that this is a hint > > > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > > > v6: More docs > > > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > > > > > Signed-off-by: Rob Clark > > > > > > > Reviewed-by: Christian König > > > > > > > Acked-by: Pekka Paalanen > > > > > > > Reviewed-by: Bagas Sanjaya > > > > > > > --- > > > > > > > > > > > > Hi Rob! > > > > > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > :doc: fence signalling annotation > > > > > > > > > > > > > > +DMA Fence Deadline Hints > > > > > > > + > > > > > > > + > > > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > + :doc: deadline hints > > > > > > > + > > > > > > > DMA Fences Functions Reference > > > > > > > ~~ > > > > > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c > > > > > > > b/drivers/dma-buf/dma-fence.c > > > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence > > > > > > > **fences, uint32_t count, > > > > > > > } > > > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > > > > > +/** > > > > > > > + * DOC: deadline hints > > > > > > > + * > > > > > > > + * In an ideal world, it would be possible to pipeline a > > > > > > > workload sufficiently > > > > > > > + * that a utilization based device frequency governor could > > > > > > > arrive at a minimum > > > > > > > + * frequency that meets the requirements of the use-case, in > > > > > > > order to minimize > > > > > > > + * power consumption. But in the real world there are many > > > > > > > workloads which > > > > > > > + * defy this ideal. For example, but not limited to: > > > > > > > + * > > > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > > > alternating periods > > > > > > > + * of CPU waiting for device, and device waiting on CPU. This > > > > > > > can result in > > > > > > > + * devfreq and cpufreq seeing idle time in their respective > > > > > > > domains and in > > > > > > > + * result reduce frequency. > > > > > > > + * > > > > > > > + * * Workloads that interact with a periodic time based > > > > > > > deadline, such as double > > > > > > > + * buffered GPU rendering vs vblank sync'd page flipping. In > > > > > > > this scenario, > > > > > > > + * missing a vblank deadline results in an *increase* in idle > > > > > > > time on the GPU > > > > > > > + * (since it has to wait an additional vblank period), sending > > > > > > > a signal to > > > > > > > + * the GPU's devfreq to reduce frequency, when in fact the > > > > > > > opposite is what is > > > > > > > + * needed. > > > > > > > > > > > > This is the use case I'd like to get s
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Fri, 17 Mar 2023 11:17:37 +0200 Pekka Paalanen wrote: > On Fri, 17 Mar 2023 11:09:21 +0200 > Pekka Paalanen wrote: > > > On Thu, 16 Mar 2023 23:22:24 +0100 > > Sebastian Wick wrote: > > > > Vblank can be really long, especially with VRR where the additional > > > time you get to finish the frame comes from making vblank longer. > > Btw. VRR extends front porch, not vblank. Need to correct myself too. vblank includes front porch, vsync does not. https://electronics.stackexchange.com/questions/166681/how-exactly-does-a-vga-cable-work Thanks, pq pgpzeEAnV538p.pgp Description: OpenPGP digital signature
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Fri, 17 Mar 2023 11:09:21 +0200 Pekka Paalanen wrote: > On Thu, 16 Mar 2023 23:22:24 +0100 > Sebastian Wick wrote: > > Vblank can be really long, especially with VRR where the additional > > time you get to finish the frame comes from making vblank longer. Btw. VRR extends front porch, not vblank. Thanks, pq pgpuLvW94b5v6.pgp Description: OpenPGP digital signature
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On 3/16/23 23:22, Sebastian Wick wrote: > On Thu, Mar 16, 2023 at 5:29 PM Rob Clark wrote: >> On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: >>> On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: >> On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote: >>> + * + * To this end, deadline hint(s) can be set on a &dma_fence via &dma_fence_set_deadline. + * The deadline hint provides a way for the waiting driver, or userspace, to + * convey an appropriate sense of urgency to the signaling driver. + * + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for userspace + * facing APIs). The time could either be some point in the future (such as + * the vblank based deadline for page-flipping, or the start of a compositor's + * composition cycle), or the current time to indicate an immediate deadline + * hint (Ie. forward progress cannot be made until this fence is signaled). >>> >>> Is it guaranteed that a GPU driver will use the actual start of the >>> vblank as the effective deadline? I have some memories of seing >>> something about vblank evasion browsing driver code, which I might have >>> misunderstood, but I have yet to find whether this is something >>> userspace can actually expect to be something it can rely on. >> >> I guess you mean s/GPU driver/display driver/ ? It makes things more >> clear if we talk about them separately even if they happen to be the >> same device. > > Sure, sorry about being unclear about that. > >> >> Assuming that is what you mean, nothing strongly defines what the >> deadline is. In practice there is probably some buffering in the >> display controller. For ex, block based (including bandwidth >> compressed) formats, you need to buffer up a row of blocks to >> efficiently linearize for scanout. So you probably need to latch some >> time before you start sending pixel data to the display. But details >> like this are heavily implementation dependent. I think the most >> reasonable thing to target is start of vblank. > > The driver exposing those details would be quite useful for userspace > though, so that it can delay committing updates to late, but not too > late. Setting a deadline to be the vblank seems easy enough, but it > isn't enough for scheduling the actual commit. I'm not entirely sure how that would even work.. but OTOH I think you are talking about something on the order of 100us? But that is a bit of another topic. >>> >>> Yes, something like that. But yea, it's not really related. Scheduling >>> commits closer to the deadline has more complex behavior than that too, >>> e.g. the need for real time scheduling, and knowing how long it usually >>> takes to create and commit and for the kernel to process. > > Vblank can be really long, especially with VRR where the additional > time you get to finish the frame comes from making vblank longer. > Using the start of vblank as a deadline makes VRR useless. Not really. We normally still want to aim for start of vblank with VRR, which would result in the maximum refresh rate. Missing that target just incurs less of a penalty than with fixed refresh rate. -- Earthling Michel Dänzer| https://redhat.com Libre software enthusiast | Mesa and Xwayland developer
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Thu, 16 Mar 2023 23:22:24 +0100 Sebastian Wick wrote: > On Thu, Mar 16, 2023 at 5:29 PM Rob Clark wrote: > > > > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: > > > > > > On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > > > > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > > > > > > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl > > > > > > wrote: > > > > > > > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > > > > From: Rob Clark > > > > > > > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming > > > > > > > > deadline, such as > > > > > > > > vblank, which the fence waiter would prefer not to miss. This > > > > > > > > is to aid > > > > > > > > the fence signaler in making power management decisions, like > > > > > > > > boosting > > > > > > > > frequency as the deadline approaches and awareness of missing > > > > > > > > deadlines > > > > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter > > > > > > > > duplicate > > > > > > > > deadlines, to avoid increasing dma_fence size. The > > > > > > > > fence-context > > > > > > > > implementation will need similar logic to track deadlines > > > > > > > > of all > > > > > > > > the fences on the same timeline. [ckoenig] > > > > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > > > > v4: Clarify in docs comment that this is a hint > > > > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > > > > v6: More docs > > > > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > > > > > > > Signed-off-by: Rob Clark > > > > > > > > Reviewed-by: Christian König > > > > > > > > Acked-by: Pekka Paalanen > > > > > > > > Reviewed-by: Bagas Sanjaya > > > > > > > > --- > > > > > > > > > > > > > > Hi Rob! > > > > > > > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > :doc: fence signalling annotation > > > > > > > > > > > > > > > > +DMA Fence Deadline Hints > > > > > > > > + > > > > > > > > + > > > > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > + :doc: deadline hints > > > > > > > > + > > > > > > > > DMA Fences Functions Reference > > > > > > > > ~~ > > > > > > > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c > > > > > > > > b/drivers/dma-buf/dma-fence.c > > > > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct > > > > > > > > dma_fence **fences, uint32_t count, > > > > > > > > } > > > > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > > > > > > > +/** > > > > > > > > + * DOC: deadline hints > > > > > > > > + * > > > > > > > > + * In an ideal world, it would be possible to pipeline a > > > > > > > > workload sufficiently > > > > > > > > + * that a utilization based device frequency governor could > > > > > > > > arrive at a minimum > > > > > > > > + * frequency that meets the requirements of the use-case, in > > > > > > > > order to minimize > > > > > > > > + * power consumption. But in the real world there are many > > > > > > > > workloads which > > > > > > > > + * defy this ideal. For example, but not limited to: > > > > > > > > + * > > > > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > > > > alternating periods > > > > > > > > + * of CPU waiting for device, and device waiting on CPU. > > > > > > > > This can result in > > > > > > > > + * devfreq and cpufreq seeing idle time in their respective > > > > > > > > domains and in > > > > > > > > + * result reduce frequency. > > > > > > > > + * > > > > > > > > + * * Workloads that interact with a periodic time based > > > > > > > > deadline, such as double > > > > > > > > + * buffered GPU rendering vs vblank sync'd page flipping. > > > > > > > > In this scenario, > > > > > > > > + * missing a vblank deadline results in an *increase* in > > > > > > > > idle time on the GPU >
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Thu, Mar 16, 2023 at 3:22 PM Sebastian Wick wrote: > > On Thu, Mar 16, 2023 at 5:29 PM Rob Clark wrote: > > > > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: > > > > > > On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > > > > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > > > > > > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl > > > > > > wrote: > > > > > > > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > > > > From: Rob Clark > > > > > > > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming > > > > > > > > deadline, such as > > > > > > > > vblank, which the fence waiter would prefer not to miss. This > > > > > > > > is to aid > > > > > > > > the fence signaler in making power management decisions, like > > > > > > > > boosting > > > > > > > > frequency as the deadline approaches and awareness of missing > > > > > > > > deadlines > > > > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter > > > > > > > > duplicate > > > > > > > > deadlines, to avoid increasing dma_fence size. The > > > > > > > > fence-context > > > > > > > > implementation will need similar logic to track deadlines > > > > > > > > of all > > > > > > > > the fences on the same timeline. [ckoenig] > > > > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > > > > v4: Clarify in docs comment that this is a hint > > > > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > > > > v6: More docs > > > > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > > > > > > > Signed-off-by: Rob Clark > > > > > > > > Reviewed-by: Christian König > > > > > > > > Acked-by: Pekka Paalanen > > > > > > > > Reviewed-by: Bagas Sanjaya > > > > > > > > --- > > > > > > > > > > > > > > Hi Rob! > > > > > > > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > :doc: fence signalling annotation > > > > > > > > > > > > > > > > +DMA Fence Deadline Hints > > > > > > > > + > > > > > > > > + > > > > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > > + :doc: deadline hints > > > > > > > > + > > > > > > > > DMA Fences Functions Reference > > > > > > > > ~~ > > > > > > > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c > > > > > > > > b/drivers/dma-buf/dma-fence.c > > > > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct > > > > > > > > dma_fence **fences, uint32_t count, > > > > > > > > } > > > > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > > > > > > > +/** > > > > > > > > + * DOC: deadline hints > > > > > > > > + * > > > > > > > > + * In an ideal world, it would be possible to pipeline a > > > > > > > > workload sufficiently > > > > > > > > + * that a utilization based device frequency governor could > > > > > > > > arrive at a minimum > > > > > > > > + * frequency that meets the requirements of the use-case, in > > > > > > > > order to minimize > > > > > > > > + * power consumption. But in the real world there are many > > > > > > > > workloads which > > > > > > > > + * defy this ideal. For example, but not limited to: > > > > > > > > + * > > > > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > > > > alternating periods > > > > > > > > + * of CPU waiting for device, and device waiting on CPU. > > > > > > > > This can result in > > > > > > > > + * devfreq and cpufreq seeing idle time in their respective > > > > > > > > domains and in > > > > > > > > + * result reduce frequency. > > > > > > > > + * > > > > > > > > + * * Workloads that interact with a periodic time based > > > > > > > > deadline, such as double > > > > > > > > + * buffered GPU rendering vs vblank sync'd page flipping. > > > > > > > > In this scenario, > > > > > > > > + * missing a vblank deadline results in an *increase* in > > > > > > > > idle time on the GPU > > > > > > > > + *
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Thu, Mar 16, 2023 at 5:29 PM Rob Clark wrote: > > On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: > > > > On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > > > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > > > > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote: > > > > > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > > > From: Rob Clark > > > > > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming deadline, > > > > > > > such as > > > > > > > vblank, which the fence waiter would prefer not to miss. This is > > > > > > > to aid > > > > > > > the fence signaler in making power management decisions, like > > > > > > > boosting > > > > > > > frequency as the deadline approaches and awareness of missing > > > > > > > deadlines > > > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter duplicate > > > > > > > deadlines, to avoid increasing dma_fence size. The > > > > > > > fence-context > > > > > > > implementation will need similar logic to track deadlines of > > > > > > > all > > > > > > > the fences on the same timeline. [ckoenig] > > > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > > > v4: Clarify in docs comment that this is a hint > > > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > > > v6: More docs > > > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > > > > > Signed-off-by: Rob Clark > > > > > > > Reviewed-by: Christian König > > > > > > > Acked-by: Pekka Paalanen > > > > > > > Reviewed-by: Bagas Sanjaya > > > > > > > --- > > > > > > > > > > > > Hi Rob! > > > > > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > :doc: fence signalling annotation > > > > > > > > > > > > > > +DMA Fence Deadline Hints > > > > > > > + > > > > > > > + > > > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > > + :doc: deadline hints > > > > > > > + > > > > > > > DMA Fences Functions Reference > > > > > > > ~~ > > > > > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c > > > > > > > b/drivers/dma-buf/dma-fence.c > > > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence > > > > > > > **fences, uint32_t count, > > > > > > > } > > > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > > > > > +/** > > > > > > > + * DOC: deadline hints > > > > > > > + * > > > > > > > + * In an ideal world, it would be possible to pipeline a > > > > > > > workload sufficiently > > > > > > > + * that a utilization based device frequency governor could > > > > > > > arrive at a minimum > > > > > > > + * frequency that meets the requirements of the use-case, in > > > > > > > order to minimize > > > > > > > + * power consumption. But in the real world there are many > > > > > > > workloads which > > > > > > > + * defy this ideal. For example, but not limited to: > > > > > > > + * > > > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > > > alternating periods > > > > > > > + * of CPU waiting for device, and device waiting on CPU. This > > > > > > > can result in > > > > > > > + * devfreq and cpufreq seeing idle time in their respective > > > > > > > domains and in > > > > > > > + * result reduce frequency. > > > > > > > + * > > > > > > > + * * Workloads that interact with a periodic time based > > > > > > > deadline, such as double > > > > > > > + * buffered GPU rendering vs vblank sync'd page flipping. In > > > > > > > this scenario, > > > > > > > + * missing a vblank deadline results in an *increase* in idle > > > > > > > time on the GPU > > > > > > > + * (since it has to wait an additional vblank period), sending > > > > > > > a signal to > > > > > > > + * the GPU's devfreq to reduce frequency, when in fact the > > > > > > > opposite is what is > > > > > > > + * needed. > > > > > > > > > > > > This is the use case I'd like to get some bet
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Thu, Mar 16, 2023 at 2:26 AM Jonas Ådahl wrote: > > On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote: > > > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > > From: Rob Clark > > > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming deadline, > > > > > > such as > > > > > > vblank, which the fence waiter would prefer not to miss. This is > > > > > > to aid > > > > > > the fence signaler in making power management decisions, like > > > > > > boosting > > > > > > frequency as the deadline approaches and awareness of missing > > > > > > deadlines > > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter duplicate > > > > > > deadlines, to avoid increasing dma_fence size. The > > > > > > fence-context > > > > > > implementation will need similar logic to track deadlines of all > > > > > > the fences on the same timeline. [ckoenig] > > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > > v4: Clarify in docs comment that this is a hint > > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > > v6: More docs > > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > > > Signed-off-by: Rob Clark > > > > > > Reviewed-by: Christian König > > > > > > Acked-by: Pekka Paalanen > > > > > > Reviewed-by: Bagas Sanjaya > > > > > > --- > > > > > > > > > > Hi Rob! > > > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > :doc: fence signalling annotation > > > > > > > > > > > > +DMA Fence Deadline Hints > > > > > > + > > > > > > + > > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > > + :doc: deadline hints > > > > > > + > > > > > > DMA Fences Functions Reference > > > > > > ~~ > > > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c > > > > > > b/drivers/dma-buf/dma-fence.c > > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence > > > > > > **fences, uint32_t count, > > > > > > } > > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > > > +/** > > > > > > + * DOC: deadline hints > > > > > > + * > > > > > > + * In an ideal world, it would be possible to pipeline a workload > > > > > > sufficiently > > > > > > + * that a utilization based device frequency governor could arrive > > > > > > at a minimum > > > > > > + * frequency that meets the requirements of the use-case, in order > > > > > > to minimize > > > > > > + * power consumption. But in the real world there are many > > > > > > workloads which > > > > > > + * defy this ideal. For example, but not limited to: > > > > > > + * > > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > > alternating periods > > > > > > + * of CPU waiting for device, and device waiting on CPU. This > > > > > > can result in > > > > > > + * devfreq and cpufreq seeing idle time in their respective > > > > > > domains and in > > > > > > + * result reduce frequency. > > > > > > + * > > > > > > + * * Workloads that interact with a periodic time based deadline, > > > > > > such as double > > > > > > + * buffered GPU rendering vs vblank sync'd page flipping. In > > > > > > this scenario, > > > > > > + * missing a vblank deadline results in an *increase* in idle > > > > > > time on the GPU > > > > > > + * (since it has to wait an additional vblank period), sending a > > > > > > signal to > > > > > > + * the GPU's devfreq to reduce frequency, when in fact the > > > > > > opposite is what is > > > > > > + * needed. > > > > > > > > > > This is the use case I'd like to get some better understanding about > > > > > how > > > > > this series intends to work, as the problematic scheduling behavior > > > > > triggered by missed deadlines has plagued compositing display servers > > > > > for a long time. > > > > > > > > > > I apologize, I'm not a GPU driver devel
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Wed, Mar 15, 2023 at 09:19:49AM -0700, Rob Clark wrote: > On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote: > > > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > > From: Rob Clark > > > > > > > > > > Add a way to hint to the fence signaler of an upcoming deadline, such > > > > > as > > > > > vblank, which the fence waiter would prefer not to miss. This is to > > > > > aid > > > > > the fence signaler in making power management decisions, like boosting > > > > > frequency as the deadline approaches and awareness of missing > > > > > deadlines > > > > > so that can be factored in to the frequency scaling. > > > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter duplicate > > > > > deadlines, to avoid increasing dma_fence size. The fence-context > > > > > implementation will need similar logic to track deadlines of all > > > > > the fences on the same timeline. [ckoenig] > > > > > v3: Clarify locking wrt. set_deadline callback > > > > > v4: Clarify in docs comment that this is a hint > > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > > v6: More docs > > > > > v7: Fix typo, clarify past deadlines > > > > > > > > > > Signed-off-by: Rob Clark > > > > > Reviewed-by: Christian König > > > > > Acked-by: Pekka Paalanen > > > > > Reviewed-by: Bagas Sanjaya > > > > > --- > > > > > > > > Hi Rob! > > > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > > drivers/dma-buf/dma-fence.c | 59 > > > > > > > > > > include/linux/dma-fence.h| 22 +++ > > > > > 3 files changed, 87 insertions(+) > > > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > > b/Documentation/driver-api/dma-buf.rst > > > > > index 622b8156d212..183e480d8cea 100644 > > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > :doc: fence signalling annotation > > > > > > > > > > +DMA Fence Deadline Hints > > > > > + > > > > > + > > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > > + :doc: deadline hints > > > > > + > > > > > DMA Fences Functions Reference > > > > > ~~ > > > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > > --- a/drivers/dma-buf/dma-fence.c > > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence > > > > > **fences, uint32_t count, > > > > > } > > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > > > +/** > > > > > + * DOC: deadline hints > > > > > + * > > > > > + * In an ideal world, it would be possible to pipeline a workload > > > > > sufficiently > > > > > + * that a utilization based device frequency governor could arrive > > > > > at a minimum > > > > > + * frequency that meets the requirements of the use-case, in order > > > > > to minimize > > > > > + * power consumption. But in the real world there are many > > > > > workloads which > > > > > + * defy this ideal. For example, but not limited to: > > > > > + * > > > > > + * * Workloads that ping-pong between device and CPU, with > > > > > alternating periods > > > > > + * of CPU waiting for device, and device waiting on CPU. This can > > > > > result in > > > > > + * devfreq and cpufreq seeing idle time in their respective > > > > > domains and in > > > > > + * result reduce frequency. > > > > > + * > > > > > + * * Workloads that interact with a periodic time based deadline, > > > > > such as double > > > > > + * buffered GPU rendering vs vblank sync'd page flipping. In this > > > > > scenario, > > > > > + * missing a vblank deadline results in an *increase* in idle time > > > > > on the GPU > > > > > + * (since it has to wait an additional vblank period), sending a > > > > > signal to > > > > > + * the GPU's devfreq to reduce frequency, when in fact the > > > > > opposite is what is > > > > > + * needed. > > > > > > > > This is the use case I'd like to get some better understanding about how > > > > this series intends to work, as the problematic scheduling behavior > > > > triggered by missed deadlines has plagued compositing display servers > > > > for a long time. > > > > > > > > I apologize, I'm not a GPU driver developer, nor an OpenGL driver > > > > developer, so I will need some hand holding when it comes to > > > > understanding exactly what piece of software is responsible for > > > > communicating what piece of information. > > > > > > > > > + * > > > > > + * To this end, deadline hint(s) can be set on a &dma_fence via > > >
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Wed, Mar 15, 2023 at 6:53 AM Jonas Ådahl wrote: > > On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote: > > > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > > From: Rob Clark > > > > > > > > Add a way to hint to the fence signaler of an upcoming deadline, such as > > > > vblank, which the fence waiter would prefer not to miss. This is to aid > > > > the fence signaler in making power management decisions, like boosting > > > > frequency as the deadline approaches and awareness of missing deadlines > > > > so that can be factored in to the frequency scaling. > > > > > > > > v2: Drop dma_fence::deadline and related logic to filter duplicate > > > > deadlines, to avoid increasing dma_fence size. The fence-context > > > > implementation will need similar logic to track deadlines of all > > > > the fences on the same timeline. [ckoenig] > > > > v3: Clarify locking wrt. set_deadline callback > > > > v4: Clarify in docs comment that this is a hint > > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > > v6: More docs > > > > v7: Fix typo, clarify past deadlines > > > > > > > > Signed-off-by: Rob Clark > > > > Reviewed-by: Christian König > > > > Acked-by: Pekka Paalanen > > > > Reviewed-by: Bagas Sanjaya > > > > --- > > > > > > Hi Rob! > > > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > > drivers/dma-buf/dma-fence.c | 59 > > > > include/linux/dma-fence.h| 22 +++ > > > > 3 files changed, 87 insertions(+) > > > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > > b/Documentation/driver-api/dma-buf.rst > > > > index 622b8156d212..183e480d8cea 100644 > > > > --- a/Documentation/driver-api/dma-buf.rst > > > > +++ b/Documentation/driver-api/dma-buf.rst > > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > :doc: fence signalling annotation > > > > > > > > +DMA Fence Deadline Hints > > > > + > > > > + > > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > > + :doc: deadline hints > > > > + > > > > DMA Fences Functions Reference > > > > ~~ > > > > > > > > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > > > > index 0de0482cd36e..f177c56269bb 100644 > > > > --- a/drivers/dma-buf/dma-fence.c > > > > +++ b/drivers/dma-buf/dma-fence.c > > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence > > > > **fences, uint32_t count, > > > > } > > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > > > +/** > > > > + * DOC: deadline hints > > > > + * > > > > + * In an ideal world, it would be possible to pipeline a workload > > > > sufficiently > > > > + * that a utilization based device frequency governor could arrive at > > > > a minimum > > > > + * frequency that meets the requirements of the use-case, in order to > > > > minimize > > > > + * power consumption. But in the real world there are many workloads > > > > which > > > > + * defy this ideal. For example, but not limited to: > > > > + * > > > > + * * Workloads that ping-pong between device and CPU, with alternating > > > > periods > > > > + * of CPU waiting for device, and device waiting on CPU. This can > > > > result in > > > > + * devfreq and cpufreq seeing idle time in their respective domains > > > > and in > > > > + * result reduce frequency. > > > > + * > > > > + * * Workloads that interact with a periodic time based deadline, such > > > > as double > > > > + * buffered GPU rendering vs vblank sync'd page flipping. In this > > > > scenario, > > > > + * missing a vblank deadline results in an *increase* in idle time > > > > on the GPU > > > > + * (since it has to wait an additional vblank period), sending a > > > > signal to > > > > + * the GPU's devfreq to reduce frequency, when in fact the opposite > > > > is what is > > > > + * needed. > > > > > > This is the use case I'd like to get some better understanding about how > > > this series intends to work, as the problematic scheduling behavior > > > triggered by missed deadlines has plagued compositing display servers > > > for a long time. > > > > > > I apologize, I'm not a GPU driver developer, nor an OpenGL driver > > > developer, so I will need some hand holding when it comes to > > > understanding exactly what piece of software is responsible for > > > communicating what piece of information. > > > > > > > + * > > > > + * To this end, deadline hint(s) can be set on a &dma_fence via > > > > &dma_fence_set_deadline. > > > > + * The deadline hint provides a way for the waiting driver, or > > > > userspace, to > > > > + * convey an appropriate sense of urgency to the signaling driver. > > > > + * > > > > + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for > > > > userspace > > > > + * fac
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Fri, Mar 10, 2023 at 09:38:18AM -0800, Rob Clark wrote: > On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote: > > > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > > From: Rob Clark > > > > > > Add a way to hint to the fence signaler of an upcoming deadline, such as > > > vblank, which the fence waiter would prefer not to miss. This is to aid > > > the fence signaler in making power management decisions, like boosting > > > frequency as the deadline approaches and awareness of missing deadlines > > > so that can be factored in to the frequency scaling. > > > > > > v2: Drop dma_fence::deadline and related logic to filter duplicate > > > deadlines, to avoid increasing dma_fence size. The fence-context > > > implementation will need similar logic to track deadlines of all > > > the fences on the same timeline. [ckoenig] > > > v3: Clarify locking wrt. set_deadline callback > > > v4: Clarify in docs comment that this is a hint > > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > > v6: More docs > > > v7: Fix typo, clarify past deadlines > > > > > > Signed-off-by: Rob Clark > > > Reviewed-by: Christian König > > > Acked-by: Pekka Paalanen > > > Reviewed-by: Bagas Sanjaya > > > --- > > > > Hi Rob! > > > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > > drivers/dma-buf/dma-fence.c | 59 > > > include/linux/dma-fence.h| 22 +++ > > > 3 files changed, 87 insertions(+) > > > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > > b/Documentation/driver-api/dma-buf.rst > > > index 622b8156d212..183e480d8cea 100644 > > > --- a/Documentation/driver-api/dma-buf.rst > > > +++ b/Documentation/driver-api/dma-buf.rst > > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > > :doc: fence signalling annotation > > > > > > +DMA Fence Deadline Hints > > > + > > > + > > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > > + :doc: deadline hints > > > + > > > DMA Fences Functions Reference > > > ~~ > > > > > > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > > > index 0de0482cd36e..f177c56269bb 100644 > > > --- a/drivers/dma-buf/dma-fence.c > > > +++ b/drivers/dma-buf/dma-fence.c > > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence > > > **fences, uint32_t count, > > > } > > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > > > +/** > > > + * DOC: deadline hints > > > + * > > > + * In an ideal world, it would be possible to pipeline a workload > > > sufficiently > > > + * that a utilization based device frequency governor could arrive at a > > > minimum > > > + * frequency that meets the requirements of the use-case, in order to > > > minimize > > > + * power consumption. But in the real world there are many workloads > > > which > > > + * defy this ideal. For example, but not limited to: > > > + * > > > + * * Workloads that ping-pong between device and CPU, with alternating > > > periods > > > + * of CPU waiting for device, and device waiting on CPU. This can > > > result in > > > + * devfreq and cpufreq seeing idle time in their respective domains > > > and in > > > + * result reduce frequency. > > > + * > > > + * * Workloads that interact with a periodic time based deadline, such > > > as double > > > + * buffered GPU rendering vs vblank sync'd page flipping. In this > > > scenario, > > > + * missing a vblank deadline results in an *increase* in idle time on > > > the GPU > > > + * (since it has to wait an additional vblank period), sending a > > > signal to > > > + * the GPU's devfreq to reduce frequency, when in fact the opposite is > > > what is > > > + * needed. > > > > This is the use case I'd like to get some better understanding about how > > this series intends to work, as the problematic scheduling behavior > > triggered by missed deadlines has plagued compositing display servers > > for a long time. > > > > I apologize, I'm not a GPU driver developer, nor an OpenGL driver > > developer, so I will need some hand holding when it comes to > > understanding exactly what piece of software is responsible for > > communicating what piece of information. > > > > > + * > > > + * To this end, deadline hint(s) can be set on a &dma_fence via > > > &dma_fence_set_deadline. > > > + * The deadline hint provides a way for the waiting driver, or > > > userspace, to > > > + * convey an appropriate sense of urgency to the signaling driver. > > > + * > > > + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for > > > userspace > > > + * facing APIs). The time could either be some point in the future > > > (such as > > > + * the vblank based deadline for page-flipping, or the start of a > > > compositor's > > > + * composition cycle), or the current time to indicate an immediate > > > deadline > > > + * hint (Ie. fo
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Fri, Mar 10, 2023 at 7:45 AM Jonas Ådahl wrote: > > On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > > From: Rob Clark > > > > Add a way to hint to the fence signaler of an upcoming deadline, such as > > vblank, which the fence waiter would prefer not to miss. This is to aid > > the fence signaler in making power management decisions, like boosting > > frequency as the deadline approaches and awareness of missing deadlines > > so that can be factored in to the frequency scaling. > > > > v2: Drop dma_fence::deadline and related logic to filter duplicate > > deadlines, to avoid increasing dma_fence size. The fence-context > > implementation will need similar logic to track deadlines of all > > the fences on the same timeline. [ckoenig] > > v3: Clarify locking wrt. set_deadline callback > > v4: Clarify in docs comment that this is a hint > > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > > v6: More docs > > v7: Fix typo, clarify past deadlines > > > > Signed-off-by: Rob Clark > > Reviewed-by: Christian König > > Acked-by: Pekka Paalanen > > Reviewed-by: Bagas Sanjaya > > --- > > Hi Rob! > > > Documentation/driver-api/dma-buf.rst | 6 +++ > > drivers/dma-buf/dma-fence.c | 59 > > include/linux/dma-fence.h| 22 +++ > > 3 files changed, 87 insertions(+) > > > > diff --git a/Documentation/driver-api/dma-buf.rst > > b/Documentation/driver-api/dma-buf.rst > > index 622b8156d212..183e480d8cea 100644 > > --- a/Documentation/driver-api/dma-buf.rst > > +++ b/Documentation/driver-api/dma-buf.rst > > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > > .. kernel-doc:: drivers/dma-buf/dma-fence.c > > :doc: fence signalling annotation > > > > +DMA Fence Deadline Hints > > + > > + > > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > > + :doc: deadline hints > > + > > DMA Fences Functions Reference > > ~~ > > > > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > > index 0de0482cd36e..f177c56269bb 100644 > > --- a/drivers/dma-buf/dma-fence.c > > +++ b/drivers/dma-buf/dma-fence.c > > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence **fences, > > uint32_t count, > > } > > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > > > +/** > > + * DOC: deadline hints > > + * > > + * In an ideal world, it would be possible to pipeline a workload > > sufficiently > > + * that a utilization based device frequency governor could arrive at a > > minimum > > + * frequency that meets the requirements of the use-case, in order to > > minimize > > + * power consumption. But in the real world there are many workloads which > > + * defy this ideal. For example, but not limited to: > > + * > > + * * Workloads that ping-pong between device and CPU, with alternating > > periods > > + * of CPU waiting for device, and device waiting on CPU. This can > > result in > > + * devfreq and cpufreq seeing idle time in their respective domains and > > in > > + * result reduce frequency. > > + * > > + * * Workloads that interact with a periodic time based deadline, such as > > double > > + * buffered GPU rendering vs vblank sync'd page flipping. In this > > scenario, > > + * missing a vblank deadline results in an *increase* in idle time on > > the GPU > > + * (since it has to wait an additional vblank period), sending a signal > > to > > + * the GPU's devfreq to reduce frequency, when in fact the opposite is > > what is > > + * needed. > > This is the use case I'd like to get some better understanding about how > this series intends to work, as the problematic scheduling behavior > triggered by missed deadlines has plagued compositing display servers > for a long time. > > I apologize, I'm not a GPU driver developer, nor an OpenGL driver > developer, so I will need some hand holding when it comes to > understanding exactly what piece of software is responsible for > communicating what piece of information. > > > + * > > + * To this end, deadline hint(s) can be set on a &dma_fence via > > &dma_fence_set_deadline. > > + * The deadline hint provides a way for the waiting driver, or userspace, > > to > > + * convey an appropriate sense of urgency to the signaling driver. > > + * > > + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for > > userspace > > + * facing APIs). The time could either be some point in the future (such > > as > > + * the vblank based deadline for page-flipping, or the start of a > > compositor's > > + * composition cycle), or the current time to indicate an immediate > > deadline > > + * hint (Ie. forward progress cannot be made until this fence is signaled). > > Is it guaranteed that a GPU driver will use the actual start of the > vblank as the effective deadline? I have some memories of seing > something about vblank evasion browsing driver code, which I might have > misunderstood, but I have yet
Re: [Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
On Wed, Mar 08, 2023 at 07:52:52AM -0800, Rob Clark wrote: > From: Rob Clark > > Add a way to hint to the fence signaler of an upcoming deadline, such as > vblank, which the fence waiter would prefer not to miss. This is to aid > the fence signaler in making power management decisions, like boosting > frequency as the deadline approaches and awareness of missing deadlines > so that can be factored in to the frequency scaling. > > v2: Drop dma_fence::deadline and related logic to filter duplicate > deadlines, to avoid increasing dma_fence size. The fence-context > implementation will need similar logic to track deadlines of all > the fences on the same timeline. [ckoenig] > v3: Clarify locking wrt. set_deadline callback > v4: Clarify in docs comment that this is a hint > v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT. > v6: More docs > v7: Fix typo, clarify past deadlines > > Signed-off-by: Rob Clark > Reviewed-by: Christian König > Acked-by: Pekka Paalanen > Reviewed-by: Bagas Sanjaya > --- Hi Rob! > Documentation/driver-api/dma-buf.rst | 6 +++ > drivers/dma-buf/dma-fence.c | 59 > include/linux/dma-fence.h| 22 +++ > 3 files changed, 87 insertions(+) > > diff --git a/Documentation/driver-api/dma-buf.rst > b/Documentation/driver-api/dma-buf.rst > index 622b8156d212..183e480d8cea 100644 > --- a/Documentation/driver-api/dma-buf.rst > +++ b/Documentation/driver-api/dma-buf.rst > @@ -164,6 +164,12 @@ DMA Fence Signalling Annotations > .. kernel-doc:: drivers/dma-buf/dma-fence.c > :doc: fence signalling annotation > > +DMA Fence Deadline Hints > + > + > +.. kernel-doc:: drivers/dma-buf/dma-fence.c > + :doc: deadline hints > + > DMA Fences Functions Reference > ~~ > > diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c > index 0de0482cd36e..f177c56269bb 100644 > --- a/drivers/dma-buf/dma-fence.c > +++ b/drivers/dma-buf/dma-fence.c > @@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence **fences, > uint32_t count, > } > EXPORT_SYMBOL(dma_fence_wait_any_timeout); > > +/** > + * DOC: deadline hints > + * > + * In an ideal world, it would be possible to pipeline a workload > sufficiently > + * that a utilization based device frequency governor could arrive at a > minimum > + * frequency that meets the requirements of the use-case, in order to > minimize > + * power consumption. But in the real world there are many workloads which > + * defy this ideal. For example, but not limited to: > + * > + * * Workloads that ping-pong between device and CPU, with alternating > periods > + * of CPU waiting for device, and device waiting on CPU. This can result > in > + * devfreq and cpufreq seeing idle time in their respective domains and in > + * result reduce frequency. > + * > + * * Workloads that interact with a periodic time based deadline, such as > double > + * buffered GPU rendering vs vblank sync'd page flipping. In this > scenario, > + * missing a vblank deadline results in an *increase* in idle time on the > GPU > + * (since it has to wait an additional vblank period), sending a signal to > + * the GPU's devfreq to reduce frequency, when in fact the opposite is > what is > + * needed. This is the use case I'd like to get some better understanding about how this series intends to work, as the problematic scheduling behavior triggered by missed deadlines has plagued compositing display servers for a long time. I apologize, I'm not a GPU driver developer, nor an OpenGL driver developer, so I will need some hand holding when it comes to understanding exactly what piece of software is responsible for communicating what piece of information. > + * > + * To this end, deadline hint(s) can be set on a &dma_fence via > &dma_fence_set_deadline. > + * The deadline hint provides a way for the waiting driver, or userspace, to > + * convey an appropriate sense of urgency to the signaling driver. > + * > + * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for userspace > + * facing APIs). The time could either be some point in the future (such as > + * the vblank based deadline for page-flipping, or the start of a > compositor's > + * composition cycle), or the current time to indicate an immediate deadline > + * hint (Ie. forward progress cannot be made until this fence is signaled). Is it guaranteed that a GPU driver will use the actual start of the vblank as the effective deadline? I have some memories of seing something about vblank evasion browsing driver code, which I might have misunderstood, but I have yet to find whether this is something userspace can actually expect to be something it can rely on. Can userspace set a deadline that targets the next vblank deadline before GPU work has been flushed e.g. at the start of a paint cycle, and still be sure that the kernel has the information it needs to
[Intel-gfx] [PATCH v10 01/15] dma-buf/dma-fence: Add deadline awareness
From: Rob Clark
Add a way to hint to the fence signaler of an upcoming deadline, such as
vblank, which the fence waiter would prefer not to miss. This is to aid
the fence signaler in making power management decisions, like boosting
frequency as the deadline approaches and awareness of missing deadlines
so that can be factored in to the frequency scaling.
v2: Drop dma_fence::deadline and related logic to filter duplicate
deadlines, to avoid increasing dma_fence size. The fence-context
implementation will need similar logic to track deadlines of all
the fences on the same timeline. [ckoenig]
v3: Clarify locking wrt. set_deadline callback
v4: Clarify in docs comment that this is a hint
v5: Drop DMA_FENCE_FLAG_HAS_DEADLINE_BIT.
v6: More docs
v7: Fix typo, clarify past deadlines
Signed-off-by: Rob Clark
Reviewed-by: Christian König
Acked-by: Pekka Paalanen
Reviewed-by: Bagas Sanjaya
---
Documentation/driver-api/dma-buf.rst | 6 +++
drivers/dma-buf/dma-fence.c | 59
include/linux/dma-fence.h| 22 +++
3 files changed, 87 insertions(+)
diff --git a/Documentation/driver-api/dma-buf.rst
b/Documentation/driver-api/dma-buf.rst
index 622b8156d212..183e480d8cea 100644
--- a/Documentation/driver-api/dma-buf.rst
+++ b/Documentation/driver-api/dma-buf.rst
@@ -164,6 +164,12 @@ DMA Fence Signalling Annotations
.. kernel-doc:: drivers/dma-buf/dma-fence.c
:doc: fence signalling annotation
+DMA Fence Deadline Hints
+
+
+.. kernel-doc:: drivers/dma-buf/dma-fence.c
+ :doc: deadline hints
+
DMA Fences Functions Reference
~~
diff --git a/drivers/dma-buf/dma-fence.c b/drivers/dma-buf/dma-fence.c
index 0de0482cd36e..f177c56269bb 100644
--- a/drivers/dma-buf/dma-fence.c
+++ b/drivers/dma-buf/dma-fence.c
@@ -912,6 +912,65 @@ dma_fence_wait_any_timeout(struct dma_fence **fences,
uint32_t count,
}
EXPORT_SYMBOL(dma_fence_wait_any_timeout);
+/**
+ * DOC: deadline hints
+ *
+ * In an ideal world, it would be possible to pipeline a workload sufficiently
+ * that a utilization based device frequency governor could arrive at a minimum
+ * frequency that meets the requirements of the use-case, in order to minimize
+ * power consumption. But in the real world there are many workloads which
+ * defy this ideal. For example, but not limited to:
+ *
+ * * Workloads that ping-pong between device and CPU, with alternating periods
+ * of CPU waiting for device, and device waiting on CPU. This can result in
+ * devfreq and cpufreq seeing idle time in their respective domains and in
+ * result reduce frequency.
+ *
+ * * Workloads that interact with a periodic time based deadline, such as
double
+ * buffered GPU rendering vs vblank sync'd page flipping. In this scenario,
+ * missing a vblank deadline results in an *increase* in idle time on the GPU
+ * (since it has to wait an additional vblank period), sending a signal to
+ * the GPU's devfreq to reduce frequency, when in fact the opposite is what
is
+ * needed.
+ *
+ * To this end, deadline hint(s) can be set on a &dma_fence via
&dma_fence_set_deadline.
+ * The deadline hint provides a way for the waiting driver, or userspace, to
+ * convey an appropriate sense of urgency to the signaling driver.
+ *
+ * A deadline hint is given in absolute ktime (CLOCK_MONOTONIC for userspace
+ * facing APIs). The time could either be some point in the future (such as
+ * the vblank based deadline for page-flipping, or the start of a compositor's
+ * composition cycle), or the current time to indicate an immediate deadline
+ * hint (Ie. forward progress cannot be made until this fence is signaled).
+ *
+ * Multiple deadlines may be set on a given fence, even in parallel. See the
+ * documentation for &dma_fence_ops.set_deadline.
+ *
+ * The deadline hint is just that, a hint. The driver that created the fence
+ * may react by increasing frequency, making different scheduling choices, etc.
+ * Or doing nothing at all.
+ */
+
+/**
+ * dma_fence_set_deadline - set desired fence-wait deadline hint
+ * @fence:the fence that is to be waited on
+ * @deadline: the time by which the waiter hopes for the fence to be
+ *signaled
+ *
+ * Give the fence signaler a hint about an upcoming deadline, such as
+ * vblank, by which point the waiter would prefer the fence to be
+ * signaled by. This is intended to give feedback to the fence signaler
+ * to aid in power management decisions, such as boosting GPU frequency
+ * if a periodic vblank deadline is approaching but the fence is not
+ * yet signaled..
+ */
+void dma_fence_set_deadline(struct dma_fence *fence, ktime_t deadline)
+{
+ if (fence->ops->set_deadline && !dma_fence_is_signaled(fence))
+ fence->ops->set_deadline(fence, deadline);
+}
+EXPORT_SYMBOL(dma_fence_set_deadline);
+
/**
* dma_fence_describe - Dump fence describtion into seq_file
* @fence: the 6f
