Re: [Intel-gfx] [PATCH v2 1/5] drm/i915/gt: Start adding module oriented dmesg output

2022-11-22 Thread Michal Wajdeczko 



On 18.11.2022 02:58, john.c.harri...@intel.com wrote:
> From: John Harrison 
> 
> When trying to analyse bug reports from CI, customers, etc. it can be
> difficult to work out exactly what is happening on which GT in a
> multi-GT system. So add GT oriented debug/error message wrappers. If
> used instead of the drm_ equivalents, you get the same output but with
> a GT# prefix on it.
> 
> v2: Go back to using lower case names (combined review feedback).
> Convert intel_gt.c as a first step.
> 
> Signed-off-by: John Harrison 
> ---
>  drivers/gpu/drm/i915/gt/intel_gt.c | 96 ++
>  drivers/gpu/drm/i915/gt/intel_gt.h | 35 +++
>  2 files changed, 81 insertions(+), 50 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
> b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 0325f071046ca..349fcfdd14a6d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -90,9 +90,8 @@ static int intel_gt_probe_lmem(struct intel_gt *gt)
>   if (err == -ENODEV)
>   return 0;
>  
> - drm_err(>drm,
> - "Failed to setup region(%d) type=%d\n",
> - err, INTEL_MEMORY_LOCAL);
> + gt_err(gt, "Failed to setup region(%d) type=%d\n",
> +err, INTEL_MEMORY_LOCAL);
>   return err;
>   }
>  
> @@ -192,14 +191,14 @@ int intel_gt_init_hw(struct intel_gt *gt)
>  
>   ret = i915_ppgtt_init_hw(gt);
>   if (ret) {
> - drm_err(>drm, "Enabling PPGTT failed (%d)\n", ret);
> + gt_err(gt, "Enabling PPGTT failed (%d)\n", ret);
>   goto out;
>   }
>  
>   /* We can't enable contexts until all firmware is loaded */
>   ret = intel_uc_init_hw(>uc);
>   if (ret) {
> - i915_probe_error(i915, "Enabling uc failed (%d)\n", ret);
> + gt_probe_error(gt, "Enabling uc failed (%d)\n", ret);
>   goto out;
>   }
>  
> @@ -264,7 +263,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
>* some errors might have become stuck,
>* mask them.
>*/
> - drm_dbg(>i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
> + gt_dbg(gt, "EIR stuck: 0x%08x, masking\n", eir);
>   rmw_set(uncore, EMR, eir);
>   intel_uncore_write(uncore, GEN2_IIR,
>  I915_MASTER_ERROR_INTERRUPT);
> @@ -298,16 +297,16 @@ static void gen6_check_faults(struct intel_gt *gt)
>   for_each_engine(engine, gt, id) {
>   fault = GEN6_RING_FAULT_REG_READ(engine);
>   if (fault & RING_FAULT_VALID) {
> - drm_dbg(>i915->drm, "Unexpected fault\n"
> - "\tAddr: 0x%08lx\n"
> - "\tAddress space: %s\n"
> - "\tSource ID: %d\n"
> - "\tType: %d\n",
> - fault & PAGE_MASK,
> - fault & RING_FAULT_GTTSEL_MASK ?
> - "GGTT" : "PPGTT",
> - RING_FAULT_SRCID(fault),
> - RING_FAULT_FAULT_TYPE(fault));
> + gt_dbg(gt, "Unexpected fault\n"
> +"\tAddr: 0x%08lx\n"
> +"\tAddress space: %s\n"
> +"\tSource ID: %d\n"
> +"\tType: %d\n",
> +fault & PAGE_MASK,
> +fault & RING_FAULT_GTTSEL_MASK ?
> +"GGTT" : "PPGTT",
> +RING_FAULT_SRCID(fault),
> +RING_FAULT_FAULT_TYPE(fault));
>   }
>   }
>  }
> @@ -334,17 +333,17 @@ static void xehp_check_faults(struct intel_gt *gt)
>   fault_addr = ((u64)(fault_data1 & FAULT_VA_HIGH_BITS) << 44) |
>((u64)fault_data0 << 12);
>  
> - drm_dbg(>i915->drm, "Unexpected fault\n"
> - "\tAddr: 0x%08x_%08x\n"
> - "\tAddress space: %s\n"
> - "\tEngine ID: %d\n"
> - "\tSource ID: %d\n"
> - "\tType: %d\n",
> - upper_32_bits(fault_addr), lower_32_bits(fault_addr),
> - fault_data1 & FAULT_GTT_SEL ? "GGTT" : "PPGTT",
> - GEN8_RING_FAULT_ENGINE_ID(fault),
> - RING_FAULT_SRCID(fault),
> - RING_FAULT_FAULT_TYPE(fault));
> + gt_dbg(gt, "Unexpected fault\n"
> +"\tAddr: 0x%08x_%08x\n"
> +"\tAddress space: %s\n"
> +"\tEngine ID: %d\n"
> +"\tSource ID: %d\n"
> +"\tType: %d\n",
> +upper_32_bits(fault_addr), lower_32_bits(fault_addr),
> +

[Intel-gfx] [PATCH v2 1/5] drm/i915/gt: Start adding module oriented dmesg output

2022-11-17 Thread John . C . Harrison 
From: John Harrison 

When trying to analyse bug reports from CI, customers, etc. it can be
difficult to work out exactly what is happening on which GT in a
multi-GT system. So add GT oriented debug/error message wrappers. If
used instead of the drm_ equivalents, you get the same output but with
a GT# prefix on it.

v2: Go back to using lower case names (combined review feedback).
Convert intel_gt.c as a first step.

Signed-off-by: John Harrison 
---
 drivers/gpu/drm/i915/gt/intel_gt.c | 96 ++
 drivers/gpu/drm/i915/gt/intel_gt.h | 35 +++
 2 files changed, 81 insertions(+), 50 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c 
b/drivers/gpu/drm/i915/gt/intel_gt.c
index 0325f071046ca..349fcfdd14a6d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -90,9 +90,8 @@ static int intel_gt_probe_lmem(struct intel_gt *gt)
if (err == -ENODEV)
return 0;
 
-   drm_err(>drm,
-   "Failed to setup region(%d) type=%d\n",
-   err, INTEL_MEMORY_LOCAL);
+   gt_err(gt, "Failed to setup region(%d) type=%d\n",
+  err, INTEL_MEMORY_LOCAL);
return err;
}
 
@@ -192,14 +191,14 @@ int intel_gt_init_hw(struct intel_gt *gt)
 
ret = i915_ppgtt_init_hw(gt);
if (ret) {
-   drm_err(>drm, "Enabling PPGTT failed (%d)\n", ret);
+   gt_err(gt, "Enabling PPGTT failed (%d)\n", ret);
goto out;
}
 
/* We can't enable contexts until all firmware is loaded */
ret = intel_uc_init_hw(>uc);
if (ret) {
-   i915_probe_error(i915, "Enabling uc failed (%d)\n", ret);
+   gt_probe_error(gt, "Enabling uc failed (%d)\n", ret);
goto out;
}
 
@@ -264,7 +263,7 @@ intel_gt_clear_error_registers(struct intel_gt *gt,
 * some errors might have become stuck,
 * mask them.
 */
-   drm_dbg(>i915->drm, "EIR stuck: 0x%08x, masking\n", eir);
+   gt_dbg(gt, "EIR stuck: 0x%08x, masking\n", eir);
rmw_set(uncore, EMR, eir);
intel_uncore_write(uncore, GEN2_IIR,
   I915_MASTER_ERROR_INTERRUPT);
@@ -298,16 +297,16 @@ static void gen6_check_faults(struct intel_gt *gt)
for_each_engine(engine, gt, id) {
fault = GEN6_RING_FAULT_REG_READ(engine);
if (fault & RING_FAULT_VALID) {
-   drm_dbg(>i915->drm, "Unexpected fault\n"
-   "\tAddr: 0x%08lx\n"
-   "\tAddress space: %s\n"
-   "\tSource ID: %d\n"
-   "\tType: %d\n",
-   fault & PAGE_MASK,
-   fault & RING_FAULT_GTTSEL_MASK ?
-   "GGTT" : "PPGTT",
-   RING_FAULT_SRCID(fault),
-   RING_FAULT_FAULT_TYPE(fault));
+   gt_dbg(gt, "Unexpected fault\n"
+  "\tAddr: 0x%08lx\n"
+  "\tAddress space: %s\n"
+  "\tSource ID: %d\n"
+  "\tType: %d\n",
+  fault & PAGE_MASK,
+  fault & RING_FAULT_GTTSEL_MASK ?
+  "GGTT" : "PPGTT",
+  RING_FAULT_SRCID(fault),
+  RING_FAULT_FAULT_TYPE(fault));
}
}
 }
@@ -334,17 +333,17 @@ static void xehp_check_faults(struct intel_gt *gt)
fault_addr = ((u64)(fault_data1 & FAULT_VA_HIGH_BITS) << 44) |
 ((u64)fault_data0 << 12);
 
-   drm_dbg(>i915->drm, "Unexpected fault\n"
-   "\tAddr: 0x%08x_%08x\n"
-   "\tAddress space: %s\n"
-   "\tEngine ID: %d\n"
-   "\tSource ID: %d\n"
-   "\tType: %d\n",
-   upper_32_bits(fault_addr), lower_32_bits(fault_addr),
-   fault_data1 & FAULT_GTT_SEL ? "GGTT" : "PPGTT",
-   GEN8_RING_FAULT_ENGINE_ID(fault),
-   RING_FAULT_SRCID(fault),
-   RING_FAULT_FAULT_TYPE(fault));
+   gt_dbg(gt, "Unexpected fault\n"
+  "\tAddr: 0x%08x_%08x\n"
+  "\tAddress space: %s\n"
+  "\tEngine ID: %d\n"
+  "\tSource ID: %d\n"
+  "\tType: %d\n",
+  upper_32_bits(fault_addr), lower_32_bits(fault_addr),
+  fault_data1 & FAULT_GTT_SEL ? "GGTT" : "PPGTT",
+  GEN8_RING_FAULT_ENGINE_ID(fault),
+