[Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines

2023-08-01 Thread Dnyaneshwar Bhadane 
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P

v2:
- Replace IS_ADLP_RPLU with IS_RAPTORLAKE_U (Tvrtko/Lucas)
- Change the subject

Cc: Tvrtko Ursulin 
Cc: Jani Nikula 
Cc: Anusha Srivatsa 
Signed-off-by: Dnyaneshwar Bhadane 
Reviewed-by: Anusha Srivatsa 
Acked-by: Jani Nikula 
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
 drivers/gpu/drm/i915/i915_drv.h| 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 57113fb01fb2..2fb030b1ff1d 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3570,7 +3570,7 @@ void intel_init_cdclk_hooks(struct drm_i915_private 
*dev_priv)
if (IS_ALDERLAKE_P(dev_priv) && IS_DISPLAY_STEP(dev_priv, 
STEP_A0, STEP_B0)) {
dev_priv->display.cdclk.table = adlp_a_step_cdclk_table;
dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
-   } else if (IS_ADLP_RPLU(dev_priv)) {
+   } else if (IS_RAPTORLAKE_U(dev_priv)) {
dev_priv->display.cdclk.table = rplu_cdclk_table;
dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
} else {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4e07ba69642d..d3a621e5a36b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -590,7 +590,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
 #define IS_RAPTORLAKE_P(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
-#define IS_ADLP_RPLU(i915) \
+#define IS_RAPTORLAKE_U(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
 #define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
(INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
-- 
2.34.1

Re: [Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines

2023-07-31 Thread Srivatsa, Anusha 



> -Original Message-
> From: Bhadane, Dnyaneshwar 
> Sent: Wednesday, July 26, 2023 1:07 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Ursulin, Tvrtko ; jani.nik...@linux.intel.com;
> Srivatsa, Anusha ; Atwood, Matthew S
> ; Roper, Matthew D
> ; Bhadane, Dnyaneshwar
> ; Srivatsa, Anusha
> 
> Subject: [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in
> RPLU defines
> 
> Follow consistent naming convention. Replace ADLP with ALDERLAKE_P
> 
> v2:
> - Replace IS_ADLP_RPLU with IS_RAPTORLAKE_U (Tvrtko/Lucas)
> - Change the subject
> 
> Cc: Tvrtko Ursulin 
> Cc: Jani Nikula 
> Cc: Anusha Srivatsa 
> Signed-off-by: Dnyaneshwar Bhadane 

Reviewed-by: Anusha Srivatsa 

> ---
>  drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
>  drivers/gpu/drm/i915/i915_drv.h| 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 57113fb01fb2..2fb030b1ff1d 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -3570,7 +3570,7 @@ void intel_init_cdclk_hooks(struct drm_i915_private
> *dev_priv)
>   if (IS_ALDERLAKE_P(dev_priv) && IS_DISPLAY_STEP(dev_priv,
> STEP_A0, STEP_B0)) {
>   dev_priv->display.cdclk.table =
> adlp_a_step_cdclk_table;
>   dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
> - } else if (IS_ADLP_RPLU(dev_priv)) {
> + } else if (IS_RAPTORLAKE_U(dev_priv)) {
>   dev_priv->display.cdclk.table = rplu_cdclk_table;
>   dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
>   } else {
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 4e07ba69642d..d3a621e5a36b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -590,7 +590,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>   IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P,
> INTEL_SUBPLATFORM_N)  #define IS_RAPTORLAKE_P(i915) \
>   IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P,
> INTEL_SUBPLATFORM_RPL) -#define IS_ADLP_RPLU(i915) \
> +#define IS_RAPTORLAKE_U(i915) \
>   IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P,
> INTEL_SUBPLATFORM_RPLU)  #define IS_HASWELL_EARLY_SDV(i915)
> (IS_HASWELL(i915) && \
>   (INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
> --
> 2.34.1

[Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines

2023-07-26 Thread Dnyaneshwar Bhadane 
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P

v2:
- Replace IS_ADLP_RPLU with IS_RAPTORLAKE_U (Tvrtko/Lucas)
- Change the subject

Cc: Tvrtko Ursulin 
Cc: Jani Nikula 
Cc: Anusha Srivatsa 
Signed-off-by: Dnyaneshwar Bhadane 
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
 drivers/gpu/drm/i915/i915_drv.h| 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 57113fb01fb2..2fb030b1ff1d 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3570,7 +3570,7 @@ void intel_init_cdclk_hooks(struct drm_i915_private 
*dev_priv)
if (IS_ALDERLAKE_P(dev_priv) && IS_DISPLAY_STEP(dev_priv, 
STEP_A0, STEP_B0)) {
dev_priv->display.cdclk.table = adlp_a_step_cdclk_table;
dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
-   } else if (IS_ADLP_RPLU(dev_priv)) {
+   } else if (IS_RAPTORLAKE_U(dev_priv)) {
dev_priv->display.cdclk.table = rplu_cdclk_table;
dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
} else {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4e07ba69642d..d3a621e5a36b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -590,7 +590,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
 #define IS_RAPTORLAKE_P(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
-#define IS_ADLP_RPLU(i915) \
+#define IS_RAPTORLAKE_U(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
 #define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
(INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
-- 
2.34.1

[Intel-gfx] [PATCH v2 12/14] drm/i915/rplu: s/ADLP_RPLU/RAPTORLAKE_U in RPLU defines

2023-07-26 Thread Dnyaneshwar Bhadane 
Follow consistent naming convention. Replace ADLP with
ALDERLAKE_P

v2:
- Replace IS_ADLP_RPLU with IS_RAPTORLAKE_U (Tvrtko/Lucas)
- Change the subject

Cc: Tvrtko Ursulin 
Cc: Jani Nikula 
Cc: Anusha Srivatsa 
Signed-off-by: Dnyaneshwar Bhadane 

---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 2 +-
 drivers/gpu/drm/i915/i915_drv.h| 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c 
b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 57113fb01fb2..2fb030b1ff1d 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3570,7 +3570,7 @@ void intel_init_cdclk_hooks(struct drm_i915_private 
*dev_priv)
if (IS_ALDERLAKE_P(dev_priv) && IS_DISPLAY_STEP(dev_priv, 
STEP_A0, STEP_B0)) {
dev_priv->display.cdclk.table = adlp_a_step_cdclk_table;
dev_priv->display.funcs.cdclk = &tgl_cdclk_funcs;
-   } else if (IS_ADLP_RPLU(dev_priv)) {
+   } else if (IS_RAPTORLAKE_U(dev_priv)) {
dev_priv->display.cdclk.table = rplu_cdclk_table;
dev_priv->display.funcs.cdclk = &rplu_cdclk_funcs;
} else {
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 4e07ba69642d..d3a621e5a36b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -590,7 +590,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
 #define IS_RAPTORLAKE_P(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
-#define IS_ADLP_RPLU(i915) \
+#define IS_RAPTORLAKE_U(i915) \
IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPLU)
 #define IS_HASWELL_EARLY_SDV(i915) (IS_HASWELL(i915) && \
(INTEL_DEVID(i915) & 0xFF00) == 0x0C00)
-- 
2.34.1