Re: [Intel-gfx] [PATCH v2 17/25] drm/i915: factor out gen6_update_ring_freq
On Mon, Apr 14, 2014 at 08:24:38PM +0300, Imre Deak wrote:
This is needed by the next patch moving the call out from platform
specific RPM callbacks to platform independent code.
No functional change.
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 2 --
drivers/gpu/drm/i915/intel_display.c | 2 --
drivers/gpu/drm/i915/intel_pm.c | 18 +++---
3 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f3f9a33..afc31e3 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -899,9 +899,7 @@ static void snb_runtime_resume(struct drm_i915_private
*dev_priv)
intel_init_pch_refclk(dev);
i915_gem_init_swizzling(dev);
- mutex_lock(dev_priv-rps.hw_lock);
gen6_update_ring_freq(dev);
- mutex_unlock(dev_priv-rps.hw_lock);
}
static void hsw_runtime_resume(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index bda79ec..596ae69 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7088,9 +7088,7 @@ void hsw_disable_pc8(struct drm_i915_private *dev_priv)
intel_prepare_ddi(dev);
i915_gem_init_swizzling(dev);
- mutex_lock(dev_priv-rps.hw_lock);
gen6_update_ring_freq(dev);
- mutex_unlock(dev_priv-rps.hw_lock);
}
static void snb_modeset_global_resources(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3068f51..f88d64d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3522,7 +3522,7 @@ static void gen6_enable_rps(struct drm_device *dev)
gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
}
-void gen6_update_ring_freq(struct drm_device *dev)
+static void __gen6_update_ring_freq(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
int min_freq = 15;
@@ -3592,6 +3592,18 @@ void gen6_update_ring_freq(struct drm_device *dev)
}
}
+void gen6_update_ring_freq(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev-dev_private;
+
+ if (!(INTEL_INFO(dev)-gen = 6 !IS_VALLEYVIEW(dev)))
This is a bit hard to parse.
if (gen 6 || VLV)
would be easier.
+ return;
+
+ mutex_lock(dev_priv-rps.hw_lock);
+ __gen6_update_ring_freq(dev);
+ mutex_unlock(dev_priv-rps.hw_lock);
+}
+
int valleyview_rps_max_freq(struct drm_i915_private *dev_priv)
{
u32 val, rp0;
@@ -4563,10 +4575,10 @@ static void intel_gen6_powersave_work(struct
work_struct *work)
valleyview_enable_rps(dev);
} else if (IS_BROADWELL(dev)) {
gen8_enable_rps(dev);
- gen6_update_ring_freq(dev);
+ __gen6_update_ring_freq(dev);
} else {
gen6_enable_rps(dev);
- gen6_update_ring_freq(dev);
+ __gen6_update_ring_freq(dev);
}
dev_priv-rps.enabled = true;
mutex_unlock(dev_priv-rps.hw_lock);
--
1.8.4
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Ville Syrjälä
Intel OTC
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[Intel-gfx] [PATCH v2 17/25] drm/i915: factor out gen6_update_ring_freq
This is needed by the next patch moving the call out from platform
specific RPM callbacks to platform independent code.
No functional change.
Signed-off-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/i915/i915_drv.c | 2 --
drivers/gpu/drm/i915/intel_display.c | 2 --
drivers/gpu/drm/i915/intel_pm.c | 18 +++---
3 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f3f9a33..afc31e3 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -899,9 +899,7 @@ static void snb_runtime_resume(struct drm_i915_private
*dev_priv)
intel_init_pch_refclk(dev);
i915_gem_init_swizzling(dev);
- mutex_lock(dev_priv-rps.hw_lock);
gen6_update_ring_freq(dev);
- mutex_unlock(dev_priv-rps.hw_lock);
}
static void hsw_runtime_resume(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index bda79ec..596ae69 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -7088,9 +7088,7 @@ void hsw_disable_pc8(struct drm_i915_private *dev_priv)
intel_prepare_ddi(dev);
i915_gem_init_swizzling(dev);
- mutex_lock(dev_priv-rps.hw_lock);
gen6_update_ring_freq(dev);
- mutex_unlock(dev_priv-rps.hw_lock);
}
static void snb_modeset_global_resources(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 3068f51..f88d64d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -3522,7 +3522,7 @@ static void gen6_enable_rps(struct drm_device *dev)
gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
}
-void gen6_update_ring_freq(struct drm_device *dev)
+static void __gen6_update_ring_freq(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev-dev_private;
int min_freq = 15;
@@ -3592,6 +3592,18 @@ void gen6_update_ring_freq(struct drm_device *dev)
}
}
+void gen6_update_ring_freq(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev-dev_private;
+
+ if (!(INTEL_INFO(dev)-gen = 6 !IS_VALLEYVIEW(dev)))
+ return;
+
+ mutex_lock(dev_priv-rps.hw_lock);
+ __gen6_update_ring_freq(dev);
+ mutex_unlock(dev_priv-rps.hw_lock);
+}
+
int valleyview_rps_max_freq(struct drm_i915_private *dev_priv)
{
u32 val, rp0;
@@ -4563,10 +4575,10 @@ static void intel_gen6_powersave_work(struct
work_struct *work)
valleyview_enable_rps(dev);
} else if (IS_BROADWELL(dev)) {
gen8_enable_rps(dev);
- gen6_update_ring_freq(dev);
+ __gen6_update_ring_freq(dev);
} else {
gen6_enable_rps(dev);
- gen6_update_ring_freq(dev);
+ __gen6_update_ring_freq(dev);
}
dev_priv-rps.enabled = true;
mutex_unlock(dev_priv-rps.hw_lock);
--
1.8.4
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